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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001#ifndef _MSM_VIDC_DEC_H_
2#define _MSM_VIDC_DEC_H_
3
4#include <linux/types.h>
5#include <linux/ioctl.h>
6
7/* STATUS CODES */
8/* Base value for status codes */
9#define VDEC_S_BASE 0x40000000
10/* Success */
11#define VDEC_S_SUCCESS (VDEC_S_BASE)
12/* General failure */
13#define VDEC_S_EFAIL (VDEC_S_BASE + 1)
14/* Fatal irrecoverable failure. Need to tear down session. */
15#define VDEC_S_EFATAL (VDEC_S_BASE + 2)
16/* Error detected in the passed parameters */
17#define VDEC_S_EBADPARAM (VDEC_S_BASE + 3)
18/* Command called in invalid state. */
19#define VDEC_S_EINVALSTATE (VDEC_S_BASE + 4)
20 /* Insufficient OS resources - thread, memory etc. */
21#define VDEC_S_ENOSWRES (VDEC_S_BASE + 5)
22 /* Insufficient HW resources - core capacity maxed out. */
23#define VDEC_S_ENOHWRES (VDEC_S_BASE + 6)
24/* Invalid command called */
25#define VDEC_S_EINVALCMD (VDEC_S_BASE + 7)
26/* Command timeout. */
27#define VDEC_S_ETIMEOUT (VDEC_S_BASE + 8)
28/* Pre-requirement is not met for API. */
29#define VDEC_S_ENOPREREQ (VDEC_S_BASE + 9)
30/* Command queue is full. */
31#define VDEC_S_ECMDQFULL (VDEC_S_BASE + 10)
32/* Command is not supported by this driver */
33#define VDEC_S_ENOTSUPP (VDEC_S_BASE + 11)
34/* Command is not implemented by thedriver. */
35#define VDEC_S_ENOTIMPL (VDEC_S_BASE + 12)
36/* Command is not implemented by the driver. */
37#define VDEC_S_BUSY (VDEC_S_BASE + 13)
Gopikrishnaiah Anandan746d9ab2011-07-07 11:55:13 -070038#define VDEC_S_INPUT_BITSTREAM_ERR (VDEC_S_BASE + 14)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070039
40#define VDEC_INTF_VER 1
41#define VDEC_MSG_BASE 0x0000000
42/* Codes to identify asynchronous message responses and events that driver
43 wants to communicate to the app.*/
44#define VDEC_MSG_INVALID (VDEC_MSG_BASE + 0)
45#define VDEC_MSG_RESP_INPUT_BUFFER_DONE (VDEC_MSG_BASE + 1)
46#define VDEC_MSG_RESP_OUTPUT_BUFFER_DONE (VDEC_MSG_BASE + 2)
47#define VDEC_MSG_RESP_INPUT_FLUSHED (VDEC_MSG_BASE + 3)
48#define VDEC_MSG_RESP_OUTPUT_FLUSHED (VDEC_MSG_BASE + 4)
49#define VDEC_MSG_RESP_FLUSH_INPUT_DONE (VDEC_MSG_BASE + 5)
50#define VDEC_MSG_RESP_FLUSH_OUTPUT_DONE (VDEC_MSG_BASE + 6)
51#define VDEC_MSG_RESP_START_DONE (VDEC_MSG_BASE + 7)
52#define VDEC_MSG_RESP_STOP_DONE (VDEC_MSG_BASE + 8)
53#define VDEC_MSG_RESP_PAUSE_DONE (VDEC_MSG_BASE + 9)
54#define VDEC_MSG_RESP_RESUME_DONE (VDEC_MSG_BASE + 10)
55#define VDEC_MSG_RESP_RESOURCE_LOADED (VDEC_MSG_BASE + 11)
56#define VDEC_EVT_RESOURCES_LOST (VDEC_MSG_BASE + 12)
57#define VDEC_MSG_EVT_CONFIG_CHANGED (VDEC_MSG_BASE + 13)
58#define VDEC_MSG_EVT_HW_ERROR (VDEC_MSG_BASE + 14)
59#define VDEC_MSG_EVT_INFO_CONFIG_CHANGED (VDEC_MSG_BASE + 15)
Gopikrishnaiah Anandan248eac22011-07-12 14:24:14 -070060#define VDEC_MSG_EVT_INFO_FIELD_DROPPED (VDEC_MSG_BASE + 16)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061
62/*Buffer flags bits masks.*/
63#define VDEC_BUFFERFLAG_EOS 0x00000001
64#define VDEC_BUFFERFLAG_DECODEONLY 0x00000004
65#define VDEC_BUFFERFLAG_DATACORRUPT 0x00000008
66#define VDEC_BUFFERFLAG_ENDOFFRAME 0x00000010
67#define VDEC_BUFFERFLAG_SYNCFRAME 0x00000020
68#define VDEC_BUFFERFLAG_EXTRADATA 0x00000040
69#define VDEC_BUFFERFLAG_CODECCONFIG 0x00000080
70
71/*Post processing flags bit masks*/
72#define VDEC_EXTRADATA_NONE 0x001
73#define VDEC_EXTRADATA_QP 0x004
74#define VDEC_EXTRADATA_MB_ERROR_MAP 0x008
75#define VDEC_EXTRADATA_SEI 0x010
76#define VDEC_EXTRADATA_VUI 0x020
77#define VDEC_EXTRADATA_VC1 0x040
78
Shobhit Pandey4a607992012-08-01 14:02:20 +053079#define VDEC_EXTRADATA_EXT_DATA 0x0800
80#define VDEC_EXTRADATA_USER_DATA 0x1000
81
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070082#define VDEC_CMDBASE 0x800
83#define VDEC_CMD_SET_INTF_VERSION (VDEC_CMDBASE)
84
85#define VDEC_IOCTL_MAGIC 'v'
86
87struct vdec_ioctl_msg {
88 void __user *in;
89 void __user *out;
90};
91
92/* CMD params: InputParam:enum vdec_codec
93 OutputParam: struct vdec_profile_level*/
94#define VDEC_IOCTL_GET_PROFILE_LEVEL_SUPPORTED \
95 _IOWR(VDEC_IOCTL_MAGIC, 0, struct vdec_ioctl_msg)
96
97/*CMD params:InputParam: NULL
98 OutputParam: uint32_t(bitmask)*/
99#define VDEC_IOCTL_GET_INTERLACE_FORMAT \
100 _IOR(VDEC_IOCTL_MAGIC, 1, struct vdec_ioctl_msg)
101
102/* CMD params: InputParam: enum vdec_codec
103 OutputParam: struct vdec_profile_level*/
104#define VDEC_IOCTL_GET_CURRENT_PROFILE_LEVEL \
105 _IOWR(VDEC_IOCTL_MAGIC, 2, struct vdec_ioctl_msg)
106
107/*CMD params: SET: InputParam: enum vdec_output_fromat OutputParam: NULL
108 GET: InputParam: NULL OutputParam: enum vdec_output_fromat*/
109#define VDEC_IOCTL_SET_OUTPUT_FORMAT \
110 _IOWR(VDEC_IOCTL_MAGIC, 3, struct vdec_ioctl_msg)
111#define VDEC_IOCTL_GET_OUTPUT_FORMAT \
112 _IOWR(VDEC_IOCTL_MAGIC, 4, struct vdec_ioctl_msg)
113
114/*CMD params: SET: InputParam: enum vdec_codec OutputParam: NULL
115 GET: InputParam: NULL OutputParam: enum vdec_codec*/
116#define VDEC_IOCTL_SET_CODEC \
117 _IOW(VDEC_IOCTL_MAGIC, 5, struct vdec_ioctl_msg)
118#define VDEC_IOCTL_GET_CODEC \
119 _IOR(VDEC_IOCTL_MAGIC, 6, struct vdec_ioctl_msg)
120
121/*CMD params: SET: InputParam: struct vdec_picsize outputparam: NULL
122 GET: InputParam: NULL outputparam: struct vdec_picsize*/
123#define VDEC_IOCTL_SET_PICRES \
124 _IOW(VDEC_IOCTL_MAGIC, 7, struct vdec_ioctl_msg)
125#define VDEC_IOCTL_GET_PICRES \
126 _IOR(VDEC_IOCTL_MAGIC, 8, struct vdec_ioctl_msg)
127
128#define VDEC_IOCTL_SET_EXTRADATA \
129 _IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_ioctl_msg)
130#define VDEC_IOCTL_GET_EXTRADATA \
131 _IOR(VDEC_IOCTL_MAGIC, 10, struct vdec_ioctl_msg)
132
133#define VDEC_IOCTL_SET_SEQUENCE_HEADER \
134 _IOW(VDEC_IOCTL_MAGIC, 11, struct vdec_ioctl_msg)
135
136/* CMD params: SET: InputParam - vdec_allocatorproperty, OutputParam - NULL
137 GET: InputParam - NULL, OutputParam - vdec_allocatorproperty*/
138#define VDEC_IOCTL_SET_BUFFER_REQ \
139 _IOW(VDEC_IOCTL_MAGIC, 12, struct vdec_ioctl_msg)
140#define VDEC_IOCTL_GET_BUFFER_REQ \
141 _IOR(VDEC_IOCTL_MAGIC, 13, struct vdec_ioctl_msg)
142/* CMD params: InputParam - vdec_buffer, OutputParam - uint8_t** */
143#define VDEC_IOCTL_ALLOCATE_BUFFER \
144 _IOWR(VDEC_IOCTL_MAGIC, 14, struct vdec_ioctl_msg)
145/* CMD params: InputParam - uint8_t *, OutputParam - NULL.*/
146#define VDEC_IOCTL_FREE_BUFFER \
147 _IOW(VDEC_IOCTL_MAGIC, 15, struct vdec_ioctl_msg)
148
149/*CMD params: CMD: InputParam - struct vdec_setbuffer_cmd, OutputParam - NULL*/
150#define VDEC_IOCTL_SET_BUFFER \
151 _IOW(VDEC_IOCTL_MAGIC, 16, struct vdec_ioctl_msg)
152
153/* CMD params: InputParam - struct vdec_fillbuffer_cmd, OutputParam - NULL*/
154#define VDEC_IOCTL_FILL_OUTPUT_BUFFER \
155 _IOW(VDEC_IOCTL_MAGIC, 17, struct vdec_ioctl_msg)
156
157/*CMD params: InputParam - struct vdec_frameinfo , OutputParam - NULL*/
158#define VDEC_IOCTL_DECODE_FRAME \
159 _IOW(VDEC_IOCTL_MAGIC, 18, struct vdec_ioctl_msg)
160
161#define VDEC_IOCTL_LOAD_RESOURCES _IO(VDEC_IOCTL_MAGIC, 19)
162#define VDEC_IOCTL_CMD_START _IO(VDEC_IOCTL_MAGIC, 20)
163#define VDEC_IOCTL_CMD_STOP _IO(VDEC_IOCTL_MAGIC, 21)
164#define VDEC_IOCTL_CMD_PAUSE _IO(VDEC_IOCTL_MAGIC, 22)
165#define VDEC_IOCTL_CMD_RESUME _IO(VDEC_IOCTL_MAGIC, 23)
166
167/*CMD params: InputParam - enum vdec_bufferflush , OutputParam - NULL */
168#define VDEC_IOCTL_CMD_FLUSH _IOW(VDEC_IOCTL_MAGIC, 24, struct vdec_ioctl_msg)
169
170/* ========================================================
171 * IOCTL for getting asynchronous notification from driver
172 * ========================================================*/
173
174/*IOCTL params: InputParam - NULL, OutputParam - struct vdec_msginfo*/
175#define VDEC_IOCTL_GET_NEXT_MSG \
176 _IOR(VDEC_IOCTL_MAGIC, 25, struct vdec_ioctl_msg)
177
178#define VDEC_IOCTL_STOP_NEXT_MSG _IO(VDEC_IOCTL_MAGIC, 26)
179
180#define VDEC_IOCTL_GET_NUMBER_INSTANCES \
181 _IOR(VDEC_IOCTL_MAGIC, 27, struct vdec_ioctl_msg)
182
183#define VDEC_IOCTL_SET_PICTURE_ORDER \
184 _IOW(VDEC_IOCTL_MAGIC, 28, struct vdec_ioctl_msg)
185
186#define VDEC_IOCTL_SET_FRAME_RATE \
187 _IOW(VDEC_IOCTL_MAGIC, 29, struct vdec_ioctl_msg)
188
189#define VDEC_IOCTL_SET_H264_MV_BUFFER \
190 _IOW(VDEC_IOCTL_MAGIC, 30, struct vdec_ioctl_msg)
191
192#define VDEC_IOCTL_FREE_H264_MV_BUFFER \
193 _IOW(VDEC_IOCTL_MAGIC, 31, struct vdec_ioctl_msg)
194
195#define VDEC_IOCTL_GET_MV_BUFFER_SIZE \
196 _IOR(VDEC_IOCTL_MAGIC, 32, struct vdec_ioctl_msg)
197
198#define VDEC_IOCTL_SET_IDR_ONLY_DECODING \
199 _IO(VDEC_IOCTL_MAGIC, 33)
200
201#define VDEC_IOCTL_SET_CONT_ON_RECONFIG \
202 _IO(VDEC_IOCTL_MAGIC, 34)
203
Deepika Pepakayalaa5ede602011-12-02 11:33:26 -0800204#define VDEC_IOCTL_SET_DISABLE_DMX \
205 _IOW(VDEC_IOCTL_MAGIC, 35, struct vdec_ioctl_msg)
206
207#define VDEC_IOCTL_GET_DISABLE_DMX \
208 _IOR(VDEC_IOCTL_MAGIC, 36, struct vdec_ioctl_msg)
209
210#define VDEC_IOCTL_GET_DISABLE_DMX_SUPPORT \
211 _IOR(VDEC_IOCTL_MAGIC, 37, struct vdec_ioctl_msg)
212
Arun Menon152c3c72012-06-20 11:50:08 -0700213#define VDEC_IOCTL_SET_PERF_CLK \
214 _IOR(VDEC_IOCTL_MAGIC, 38, struct vdec_ioctl_msg)
215
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700216enum vdec_picture {
217 PICTURE_TYPE_I,
218 PICTURE_TYPE_P,
219 PICTURE_TYPE_B,
220 PICTURE_TYPE_BI,
221 PICTURE_TYPE_SKIP,
Maheshwar Ajja1d053f82011-07-20 20:45:11 +0530222 PICTURE_TYPE_IDR,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700223 PICTURE_TYPE_UNKNOWN
224};
225
226enum vdec_buffer {
227 VDEC_BUFFER_TYPE_INPUT,
228 VDEC_BUFFER_TYPE_OUTPUT
229};
230
231struct vdec_allocatorproperty {
232 enum vdec_buffer buffer_type;
233 uint32_t mincount;
234 uint32_t maxcount;
235 uint32_t actualcount;
236 size_t buffer_size;
237 uint32_t alignment;
238 uint32_t buf_poolid;
239};
240
241struct vdec_bufferpayload {
242 void __user *bufferaddr;
243 size_t buffer_len;
244 int pmem_fd;
245 size_t offset;
246 size_t mmaped_size;
247};
248
249struct vdec_setbuffer_cmd {
250 enum vdec_buffer buffer_type;
251 struct vdec_bufferpayload buffer;
252};
253
254struct vdec_fillbuffer_cmd {
255 struct vdec_bufferpayload buffer;
256 void *client_data;
257};
258
259enum vdec_bufferflush {
260 VDEC_FLUSH_TYPE_INPUT,
261 VDEC_FLUSH_TYPE_OUTPUT,
262 VDEC_FLUSH_TYPE_ALL
263};
264
265enum vdec_codec {
266 VDEC_CODECTYPE_H264 = 0x1,
267 VDEC_CODECTYPE_H263 = 0x2,
268 VDEC_CODECTYPE_MPEG4 = 0x3,
269 VDEC_CODECTYPE_DIVX_3 = 0x4,
270 VDEC_CODECTYPE_DIVX_4 = 0x5,
271 VDEC_CODECTYPE_DIVX_5 = 0x6,
272 VDEC_CODECTYPE_DIVX_6 = 0x7,
273 VDEC_CODECTYPE_XVID = 0x8,
274 VDEC_CODECTYPE_MPEG1 = 0x9,
275 VDEC_CODECTYPE_MPEG2 = 0xa,
276 VDEC_CODECTYPE_VC1 = 0xb,
277 VDEC_CODECTYPE_VC1_RCV = 0xc
278};
279
280enum vdec_mpeg2_profile {
281 VDEC_MPEG2ProfileSimple = 0x1,
282 VDEC_MPEG2ProfileMain = 0x2,
283 VDEC_MPEG2Profile422 = 0x4,
284 VDEC_MPEG2ProfileSNR = 0x8,
285 VDEC_MPEG2ProfileSpatial = 0x10,
286 VDEC_MPEG2ProfileHigh = 0x20,
287 VDEC_MPEG2ProfileKhronosExtensions = 0x6F000000,
288 VDEC_MPEG2ProfileVendorStartUnused = 0x7F000000,
289 VDEC_MPEG2ProfileMax = 0x7FFFFFFF
290};
291
292enum vdec_mpeg2_level {
293
294 VDEC_MPEG2LevelLL = 0x1,
295 VDEC_MPEG2LevelML = 0x2,
296 VDEC_MPEG2LevelH14 = 0x4,
297 VDEC_MPEG2LevelHL = 0x8,
298 VDEC_MPEG2LevelKhronosExtensions = 0x6F000000,
299 VDEC_MPEG2LevelVendorStartUnused = 0x7F000000,
300 VDEC_MPEG2LevelMax = 0x7FFFFFFF
301};
302
303enum vdec_mpeg4_profile {
304 VDEC_MPEG4ProfileSimple = 0x01,
305 VDEC_MPEG4ProfileSimpleScalable = 0x02,
306 VDEC_MPEG4ProfileCore = 0x04,
307 VDEC_MPEG4ProfileMain = 0x08,
308 VDEC_MPEG4ProfileNbit = 0x10,
309 VDEC_MPEG4ProfileScalableTexture = 0x20,
310 VDEC_MPEG4ProfileSimpleFace = 0x40,
311 VDEC_MPEG4ProfileSimpleFBA = 0x80,
312 VDEC_MPEG4ProfileBasicAnimated = 0x100,
313 VDEC_MPEG4ProfileHybrid = 0x200,
314 VDEC_MPEG4ProfileAdvancedRealTime = 0x400,
315 VDEC_MPEG4ProfileCoreScalable = 0x800,
316 VDEC_MPEG4ProfileAdvancedCoding = 0x1000,
317 VDEC_MPEG4ProfileAdvancedCore = 0x2000,
318 VDEC_MPEG4ProfileAdvancedScalable = 0x4000,
319 VDEC_MPEG4ProfileAdvancedSimple = 0x8000,
320 VDEC_MPEG4ProfileKhronosExtensions = 0x6F000000,
321 VDEC_MPEG4ProfileVendorStartUnused = 0x7F000000,
322 VDEC_MPEG4ProfileMax = 0x7FFFFFFF
323};
324
325enum vdec_mpeg4_level {
326 VDEC_MPEG4Level0 = 0x01,
327 VDEC_MPEG4Level0b = 0x02,
328 VDEC_MPEG4Level1 = 0x04,
329 VDEC_MPEG4Level2 = 0x08,
330 VDEC_MPEG4Level3 = 0x10,
331 VDEC_MPEG4Level4 = 0x20,
332 VDEC_MPEG4Level4a = 0x40,
333 VDEC_MPEG4Level5 = 0x80,
334 VDEC_MPEG4LevelKhronosExtensions = 0x6F000000,
335 VDEC_MPEG4LevelVendorStartUnused = 0x7F000000,
336 VDEC_MPEG4LevelMax = 0x7FFFFFFF
337};
338
339enum vdec_avc_profile {
340 VDEC_AVCProfileBaseline = 0x01,
341 VDEC_AVCProfileMain = 0x02,
342 VDEC_AVCProfileExtended = 0x04,
343 VDEC_AVCProfileHigh = 0x08,
344 VDEC_AVCProfileHigh10 = 0x10,
345 VDEC_AVCProfileHigh422 = 0x20,
346 VDEC_AVCProfileHigh444 = 0x40,
347 VDEC_AVCProfileKhronosExtensions = 0x6F000000,
348 VDEC_AVCProfileVendorStartUnused = 0x7F000000,
349 VDEC_AVCProfileMax = 0x7FFFFFFF
350};
351
352enum vdec_avc_level {
353 VDEC_AVCLevel1 = 0x01,
354 VDEC_AVCLevel1b = 0x02,
355 VDEC_AVCLevel11 = 0x04,
356 VDEC_AVCLevel12 = 0x08,
357 VDEC_AVCLevel13 = 0x10,
358 VDEC_AVCLevel2 = 0x20,
359 VDEC_AVCLevel21 = 0x40,
360 VDEC_AVCLevel22 = 0x80,
361 VDEC_AVCLevel3 = 0x100,
362 VDEC_AVCLevel31 = 0x200,
363 VDEC_AVCLevel32 = 0x400,
364 VDEC_AVCLevel4 = 0x800,
365 VDEC_AVCLevel41 = 0x1000,
366 VDEC_AVCLevel42 = 0x2000,
367 VDEC_AVCLevel5 = 0x4000,
368 VDEC_AVCLevel51 = 0x8000,
369 VDEC_AVCLevelKhronosExtensions = 0x6F000000,
370 VDEC_AVCLevelVendorStartUnused = 0x7F000000,
371 VDEC_AVCLevelMax = 0x7FFFFFFF
372};
373
374enum vdec_divx_profile {
375 VDEC_DIVXProfile_qMobile = 0x01,
376 VDEC_DIVXProfile_Mobile = 0x02,
377 VDEC_DIVXProfile_HD = 0x04,
378 VDEC_DIVXProfile_Handheld = 0x08,
379 VDEC_DIVXProfile_Portable = 0x10,
380 VDEC_DIVXProfile_HomeTheater = 0x20
381};
382
383enum vdec_xvid_profile {
384 VDEC_XVIDProfile_Simple = 0x1,
385 VDEC_XVIDProfile_Advanced_Realtime_Simple = 0x2,
386 VDEC_XVIDProfile_Advanced_Simple = 0x4
387};
388
389enum vdec_xvid_level {
390 VDEC_XVID_LEVEL_S_L0 = 0x1,
391 VDEC_XVID_LEVEL_S_L1 = 0x2,
392 VDEC_XVID_LEVEL_S_L2 = 0x4,
393 VDEC_XVID_LEVEL_S_L3 = 0x8,
394 VDEC_XVID_LEVEL_ARTS_L1 = 0x10,
395 VDEC_XVID_LEVEL_ARTS_L2 = 0x20,
396 VDEC_XVID_LEVEL_ARTS_L3 = 0x40,
397 VDEC_XVID_LEVEL_ARTS_L4 = 0x80,
398 VDEC_XVID_LEVEL_AS_L0 = 0x100,
399 VDEC_XVID_LEVEL_AS_L1 = 0x200,
400 VDEC_XVID_LEVEL_AS_L2 = 0x400,
401 VDEC_XVID_LEVEL_AS_L3 = 0x800,
402 VDEC_XVID_LEVEL_AS_L4 = 0x1000
403};
404
405enum vdec_h263profile {
406 VDEC_H263ProfileBaseline = 0x01,
407 VDEC_H263ProfileH320Coding = 0x02,
408 VDEC_H263ProfileBackwardCompatible = 0x04,
409 VDEC_H263ProfileISWV2 = 0x08,
410 VDEC_H263ProfileISWV3 = 0x10,
411 VDEC_H263ProfileHighCompression = 0x20,
412 VDEC_H263ProfileInternet = 0x40,
413 VDEC_H263ProfileInterlace = 0x80,
414 VDEC_H263ProfileHighLatency = 0x100,
415 VDEC_H263ProfileKhronosExtensions = 0x6F000000,
416 VDEC_H263ProfileVendorStartUnused = 0x7F000000,
417 VDEC_H263ProfileMax = 0x7FFFFFFF
418};
419
420enum vdec_h263level {
421 VDEC_H263Level10 = 0x01,
422 VDEC_H263Level20 = 0x02,
423 VDEC_H263Level30 = 0x04,
424 VDEC_H263Level40 = 0x08,
425 VDEC_H263Level45 = 0x10,
426 VDEC_H263Level50 = 0x20,
427 VDEC_H263Level60 = 0x40,
428 VDEC_H263Level70 = 0x80,
429 VDEC_H263LevelKhronosExtensions = 0x6F000000,
430 VDEC_H263LevelVendorStartUnused = 0x7F000000,
431 VDEC_H263LevelMax = 0x7FFFFFFF
432};
433
434enum vdec_wmv_format {
435 VDEC_WMVFormatUnused = 0x01,
436 VDEC_WMVFormat7 = 0x02,
437 VDEC_WMVFormat8 = 0x04,
438 VDEC_WMVFormat9 = 0x08,
439 VDEC_WMFFormatKhronosExtensions = 0x6F000000,
440 VDEC_WMFFormatVendorStartUnused = 0x7F000000,
441 VDEC_WMVFormatMax = 0x7FFFFFFF
442};
443
444enum vdec_vc1_profile {
445 VDEC_VC1ProfileSimple = 0x1,
446 VDEC_VC1ProfileMain = 0x2,
447 VDEC_VC1ProfileAdvanced = 0x4
448};
449
450enum vdec_vc1_level {
451 VDEC_VC1_LEVEL_S_Low = 0x1,
452 VDEC_VC1_LEVEL_S_Medium = 0x2,
453 VDEC_VC1_LEVEL_M_Low = 0x4,
454 VDEC_VC1_LEVEL_M_Medium = 0x8,
455 VDEC_VC1_LEVEL_M_High = 0x10,
456 VDEC_VC1_LEVEL_A_L0 = 0x20,
457 VDEC_VC1_LEVEL_A_L1 = 0x40,
458 VDEC_VC1_LEVEL_A_L2 = 0x80,
459 VDEC_VC1_LEVEL_A_L3 = 0x100,
460 VDEC_VC1_LEVEL_A_L4 = 0x200
461};
462
463struct vdec_profile_level {
464 uint32_t profiles;
465 uint32_t levels;
466};
467
468enum vdec_interlaced_format {
469 VDEC_InterlaceFrameProgressive = 0x1,
470 VDEC_InterlaceInterleaveFrameTopFieldFirst = 0x2,
471 VDEC_InterlaceInterleaveFrameBottomFieldFirst = 0x4
472};
473
474enum vdec_output_fromat {
475 VDEC_YUV_FORMAT_NV12 = 0x1,
476 VDEC_YUV_FORMAT_TILE_4x2 = 0x2
477};
478
479enum vdec_output_order {
480 VDEC_ORDER_DISPLAY = 0x1,
481 VDEC_ORDER_DECODE = 0x2
482};
483
484struct vdec_picsize {
485 uint32_t frame_width;
486 uint32_t frame_height;
487 uint32_t stride;
488 uint32_t scan_lines;
489};
490
491struct vdec_seqheader {
492 void __user *ptr_seqheader;
493 size_t seq_header_len;
494 int pmem_fd;
495 size_t pmem_offset;
496};
497
498struct vdec_mberror {
499 void __user *ptr_errormap;
500 size_t err_mapsize;
501};
502
503struct vdec_input_frameinfo {
504 void __user *bufferaddr;
505 size_t offset;
506 size_t datalen;
507 uint32_t flags;
508 int64_t timestamp;
509 void *client_data;
510 int pmem_fd;
511 size_t pmem_offset;
Deepika Pepakayalaa5ede602011-12-02 11:33:26 -0800512 void __user *desc_addr;
513 uint32_t desc_size;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700514};
515
516struct vdec_framesize {
517 uint32_t left;
518 uint32_t top;
519 uint32_t right;
520 uint32_t bottom;
521};
522
Arun Menond5a02972012-03-01 10:51:06 -0800523struct vdec_aspectratioinfo {
524 uint32_t aspect_ratio;
525 uint32_t par_width;
526 uint32_t par_height;
527};
528
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700529struct vdec_output_frameinfo {
530 void __user *bufferaddr;
531 size_t offset;
532 size_t len;
533 uint32_t flags;
534 int64_t time_stamp;
535 enum vdec_picture pic_type;
536 void *client_data;
537 void *input_frame_clientdata;
538 struct vdec_framesize framesize;
539 enum vdec_interlaced_format interlaced_format;
Arun Menond5a02972012-03-01 10:51:06 -0800540 struct vdec_aspectratioinfo aspect_ratio_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700541};
542
543union vdec_msgdata {
544 struct vdec_output_frameinfo output_frame;
545 void *input_frame_clientdata;
546};
547
548struct vdec_msginfo {
549 uint32_t status_code;
550 uint32_t msgcode;
551 union vdec_msgdata msgdata;
552 size_t msgdatasize;
553};
554
555struct vdec_framerate {
556 unsigned long fps_denominator;
557 unsigned long fps_numerator;
558};
559
560struct vdec_h264_mv{
561 size_t size;
562 int count;
563 int pmem_fd;
564 int offset;
565};
566
567struct vdec_mv_buff_size{
568 int width;
569 int height;
570 int size;
571 int alignment;
572};
573
574#endif /* end of macro _VDECDECODER_H_ */