Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/moduleparam.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/reboot.h> |
| 19 | #include <linux/io.h> |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/pm.h> |
| 22 | #include <linux/mfd/pmic8058.h> |
| 23 | #include <linux/mfd/pmic8901.h> |
| 24 | |
| 25 | #include <asm/mach-types.h> |
| 26 | |
| 27 | #include <mach/msm_iomap.h> |
| 28 | #include <mach/restart.h> |
| 29 | #include <mach/scm-io.h> |
| 30 | #include <mach/socinfo.h> |
| 31 | |
| 32 | #define TCSR_WDT_CFG 0x30 |
| 33 | |
| 34 | #define WDT0_RST (MSM_TMR0_BASE + 0x38) |
| 35 | #define WDT0_EN (MSM_TMR0_BASE + 0x40) |
| 36 | #define WDT0_BARK_TIME (MSM_TMR0_BASE + 0x4C) |
| 37 | #define WDT0_BITE_TIME (MSM_TMR0_BASE + 0x5C) |
| 38 | |
| 39 | #define PSHOLD_CTL_SU (MSM_TLMM_BASE + 0x820) |
| 40 | |
| 41 | #define RESTART_REASON_ADDR 0x65C |
| 42 | #define DLOAD_MODE_ADDR 0x0 |
| 43 | |
| 44 | static int restart_mode; |
| 45 | void *restart_reason; |
| 46 | |
| 47 | #ifdef CONFIG_MSM_DLOAD_MODE |
| 48 | static int in_panic; |
| 49 | static void *dload_mode_addr; |
| 50 | |
| 51 | /* Download mode master kill-switch */ |
| 52 | static int dload_set(const char *val, struct kernel_param *kp); |
| 53 | static int download_mode = 1; |
| 54 | module_param_call(download_mode, dload_set, param_get_int, |
| 55 | &download_mode, 0644); |
| 56 | |
| 57 | static int panic_prep_restart(struct notifier_block *this, |
| 58 | unsigned long event, void *ptr) |
| 59 | { |
| 60 | in_panic = 1; |
| 61 | return NOTIFY_DONE; |
| 62 | } |
| 63 | |
| 64 | static struct notifier_block panic_blk = { |
| 65 | .notifier_call = panic_prep_restart, |
| 66 | }; |
| 67 | |
| 68 | static void set_dload_mode(int on) |
| 69 | { |
| 70 | if (dload_mode_addr) { |
| 71 | __raw_writel(on ? 0xE47B337D : 0, dload_mode_addr); |
| 72 | __raw_writel(on ? 0xCE14091A : 0, |
| 73 | dload_mode_addr + sizeof(unsigned int)); |
| 74 | mb(); |
| 75 | } |
| 76 | } |
| 77 | |
| 78 | static int dload_set(const char *val, struct kernel_param *kp) |
| 79 | { |
| 80 | int ret; |
| 81 | int old_val = download_mode; |
| 82 | |
| 83 | ret = param_set_int(val, kp); |
| 84 | |
| 85 | if (ret) |
| 86 | return ret; |
| 87 | |
| 88 | /* If download_mode is not zero or one, ignore. */ |
| 89 | if (download_mode >> 1) { |
| 90 | download_mode = old_val; |
| 91 | return -EINVAL; |
| 92 | } |
| 93 | |
| 94 | set_dload_mode(download_mode); |
| 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | #else |
| 99 | #define set_dload_mode(x) do {} while (0) |
| 100 | #endif |
| 101 | |
| 102 | void msm_set_restart_mode(int mode) |
| 103 | { |
| 104 | restart_mode = mode; |
| 105 | } |
| 106 | EXPORT_SYMBOL(msm_set_restart_mode); |
| 107 | |
| 108 | static void msm_power_off(void) |
| 109 | { |
| 110 | printk(KERN_NOTICE "Powering off the SoC\n"); |
| 111 | #ifdef CONFIG_MSM_DLOAD_MODE |
| 112 | set_dload_mode(0); |
| 113 | #endif |
| 114 | if (cpu_is_msm8x60()) { |
| 115 | pm8058_reset_pwr_off(0); |
| 116 | pm8901_reset_pwr_off(0); |
| 117 | } |
| 118 | __raw_writel(0, PSHOLD_CTL_SU); |
| 119 | mdelay(10000); |
| 120 | printk(KERN_ERR "Powering off has failed\n"); |
| 121 | return; |
| 122 | } |
| 123 | |
| 124 | void arch_reset(char mode, const char *cmd) |
| 125 | { |
| 126 | |
| 127 | #ifdef CONFIG_MSM_DLOAD_MODE |
| 128 | |
| 129 | /* This looks like a normal reboot at this point. */ |
| 130 | set_dload_mode(0); |
| 131 | |
| 132 | /* Write download mode flags if we're panic'ing */ |
| 133 | set_dload_mode(in_panic); |
| 134 | |
| 135 | /* Write download mode flags if restart_mode says so */ |
| 136 | if (restart_mode == RESTART_DLOAD) |
| 137 | set_dload_mode(1); |
| 138 | |
| 139 | /* Kill download mode if master-kill switch is set */ |
| 140 | if (!download_mode) |
| 141 | set_dload_mode(0); |
| 142 | #endif |
| 143 | |
| 144 | printk(KERN_NOTICE "Going down for restart now\n"); |
| 145 | |
| 146 | if (cpu_is_msm8x60()) |
| 147 | pm8058_reset_pwr_off(1); |
| 148 | |
| 149 | if (cmd != NULL) { |
| 150 | if (!strncmp(cmd, "bootloader", 10)) { |
| 151 | __raw_writel(0x77665500, restart_reason); |
| 152 | } else if (!strncmp(cmd, "recovery", 8)) { |
| 153 | __raw_writel(0x77665502, restart_reason); |
| 154 | } else if (!strncmp(cmd, "oem-", 4)) { |
| 155 | unsigned long code; |
| 156 | code = simple_strtoul(cmd + 4, NULL, 16) & 0xff; |
| 157 | __raw_writel(0x6f656d00 | code, restart_reason); |
| 158 | } else { |
| 159 | __raw_writel(0x77665501, restart_reason); |
| 160 | } |
| 161 | } |
| 162 | |
| 163 | __raw_writel(0, WDT0_EN); |
| 164 | if (!(machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())) { |
| 165 | mb(); |
| 166 | __raw_writel(0, PSHOLD_CTL_SU); /* Actually reset the chip */ |
| 167 | mdelay(5000); |
| 168 | pr_notice("PS_HOLD didn't work, falling back to watchdog\n"); |
| 169 | } |
| 170 | |
| 171 | __raw_writel(1, WDT0_RST); |
| 172 | __raw_writel(5*0x31F3, WDT0_BARK_TIME); |
| 173 | __raw_writel(0x31F3, WDT0_BITE_TIME); |
| 174 | __raw_writel(3, WDT0_EN); |
| 175 | secure_writel(3, MSM_TCSR_BASE + TCSR_WDT_CFG); |
| 176 | |
| 177 | mdelay(10000); |
| 178 | printk(KERN_ERR "Restarting has failed\n"); |
| 179 | } |
| 180 | |
| 181 | static int __init msm_restart_init(void) |
| 182 | { |
| 183 | #ifdef CONFIG_MSM_DLOAD_MODE |
| 184 | atomic_notifier_chain_register(&panic_notifier_list, &panic_blk); |
| 185 | dload_mode_addr = MSM_IMEM_BASE + DLOAD_MODE_ADDR; |
| 186 | |
| 187 | /* Reset detection is switched on below.*/ |
| 188 | set_dload_mode(1); |
| 189 | #endif |
| 190 | restart_reason = MSM_IMEM_BASE + RESTART_REASON_ADDR; |
| 191 | pm_power_off = msm_power_off; |
| 192 | |
| 193 | return 0; |
| 194 | } |
| 195 | |
| 196 | late_initcall(msm_restart_init); |