Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Paul Gortmaker | 3396c78 | 2012-01-27 13:36:01 +0000 | [diff] [blame] | 2 | drivers/net/ethernet/dec/tulip/tulip.h |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | |
| 4 | Copyright 2000,2001 The Linux Kernel Team |
| 5 | Written/copyright 1994-2001 by Donald Becker. |
| 6 | |
| 7 | This software may be used and distributed according to the terms |
| 8 | of the GNU General Public License, incorporated herein by reference. |
| 9 | |
Grant Grundler | 78a6551 | 2008-06-05 00:38:55 -0600 | [diff] [blame] | 10 | Please submit bugs to http://bugzilla.kernel.org/ . |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #ifndef __NET_TULIP_H__ |
| 14 | #define __NET_TULIP_H__ |
| 15 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/kernel.h> |
| 17 | #include <linux/types.h> |
| 18 | #include <linux/spinlock.h> |
| 19 | #include <linux/netdevice.h> |
Steven Walter | db6f300 | 2010-05-31 12:34:43 +0000 | [diff] [blame] | 20 | #include <linux/ethtool.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | #include <linux/timer.h> |
| 22 | #include <linux/delay.h> |
Jean Delvare | 6473d16 | 2007-03-06 02:45:12 -0800 | [diff] [blame] | 23 | #include <linux/pci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <asm/io.h> |
| 25 | #include <asm/irq.h> |
Harvey Harrison | 6caf52a | 2008-04-29 01:03:36 -0700 | [diff] [blame] | 26 | #include <asm/unaligned.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
| 28 | |
| 29 | |
| 30 | /* undefine, or define to various debugging levels (>4 == obscene levels) */ |
| 31 | #define TULIP_DEBUG 1 |
| 32 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #ifdef CONFIG_TULIP_MMIO |
Grant Grundler | 7f2b124 | 2006-09-08 11:15:39 -0700 | [diff] [blame] | 34 | #define TULIP_BAR 1 /* CBMA */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #else |
Grant Grundler | 7f2b124 | 2006-09-08 11:15:39 -0700 | [diff] [blame] | 36 | #define TULIP_BAR 0 /* CBIO */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | #endif |
| 38 | |
| 39 | |
| 40 | |
| 41 | struct tulip_chip_table { |
| 42 | char *chip_name; |
| 43 | int io_size; |
| 44 | int valid_intrs; /* CSR7 interrupt enable settings */ |
| 45 | int flags; |
Francois Romieu | 0bb3cf7 | 2006-09-08 11:15:38 -0700 | [diff] [blame] | 46 | void (*media_timer) (unsigned long); |
David Howells | c402895 | 2006-11-22 14:57:56 +0000 | [diff] [blame] | 47 | work_func_t media_task; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | }; |
| 49 | |
| 50 | |
| 51 | enum tbl_flag { |
Steven Walter | db6f300 | 2010-05-31 12:34:43 +0000 | [diff] [blame] | 52 | HAS_MII = 0x00001, |
| 53 | HAS_MEDIA_TABLE = 0x00002, |
| 54 | CSR12_IN_SROM = 0x00004, |
| 55 | ALWAYS_CHECK_MII = 0x00008, |
| 56 | HAS_ACPI = 0x00010, |
| 57 | MC_HASH_ONLY = 0x00020, /* Hash-only multicast filter. */ |
| 58 | HAS_PNICNWAY = 0x00080, |
| 59 | HAS_NWAY = 0x00040, /* Uses internal NWay xcvr. */ |
| 60 | HAS_INTR_MITIGATION = 0x00100, |
| 61 | IS_ASIX = 0x00200, |
| 62 | HAS_8023X = 0x00400, |
| 63 | COMET_MAC_ADDR = 0x00800, |
| 64 | HAS_PCI_MWI = 0x01000, |
| 65 | HAS_PHY_IRQ = 0x02000, |
| 66 | HAS_SWAPPED_SEEPROM = 0x04000, |
| 67 | NEEDS_FAKE_MEDIA_TABLE = 0x08000, |
| 68 | COMET_PM = 0x10000, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | }; |
| 70 | |
| 71 | |
| 72 | /* chip types. careful! order is VERY IMPORTANT here, as these |
| 73 | * are used throughout the driver as indices into arrays */ |
| 74 | /* Note 21142 == 21143. */ |
| 75 | enum chips { |
| 76 | DC21040 = 0, |
| 77 | DC21041 = 1, |
| 78 | DC21140 = 2, |
| 79 | DC21142 = 3, DC21143 = 3, |
| 80 | LC82C168, |
| 81 | MX98713, |
| 82 | MX98715, |
| 83 | MX98725, |
| 84 | AX88140, |
| 85 | PNIC2, |
| 86 | COMET, |
| 87 | COMPEX9881, |
| 88 | I21145, |
| 89 | DM910X, |
| 90 | CONEXANT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | }; |
| 92 | |
| 93 | |
| 94 | enum MediaIs { |
| 95 | MediaIsFD = 1, |
| 96 | MediaAlwaysFD = 2, |
| 97 | MediaIsMII = 4, |
| 98 | MediaIsFx = 8, |
| 99 | MediaIs100 = 16 |
| 100 | }; |
| 101 | |
| 102 | |
| 103 | /* Offsets to the Command and Status Registers, "CSRs". All accesses |
| 104 | must be longword instructions and quadword aligned. */ |
| 105 | enum tulip_offsets { |
| 106 | CSR0 = 0, |
| 107 | CSR1 = 0x08, |
| 108 | CSR2 = 0x10, |
| 109 | CSR3 = 0x18, |
| 110 | CSR4 = 0x20, |
| 111 | CSR5 = 0x28, |
| 112 | CSR6 = 0x30, |
| 113 | CSR7 = 0x38, |
| 114 | CSR8 = 0x40, |
| 115 | CSR9 = 0x48, |
| 116 | CSR10 = 0x50, |
| 117 | CSR11 = 0x58, |
| 118 | CSR12 = 0x60, |
| 119 | CSR13 = 0x68, |
| 120 | CSR14 = 0x70, |
| 121 | CSR15 = 0x78, |
Steven Walter | db6f300 | 2010-05-31 12:34:43 +0000 | [diff] [blame] | 122 | CSR18 = 0x88, |
| 123 | CSR19 = 0x8c, |
| 124 | CSR20 = 0x90, |
| 125 | CSR27 = 0xAC, |
| 126 | CSR28 = 0xB0, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | }; |
| 128 | |
| 129 | /* register offset and bits for CFDD PCI config reg */ |
| 130 | enum pci_cfg_driver_reg { |
| 131 | CFDD = 0x40, |
| 132 | CFDD_Sleep = (1 << 31), |
| 133 | CFDD_Snooze = (1 << 30), |
| 134 | }; |
| 135 | |
| 136 | #define RxPollInt (RxIntr|RxNoBuf|RxDied|RxJabber) |
| 137 | |
| 138 | /* The bits in the CSR5 status registers, mostly interrupt sources. */ |
| 139 | enum status_bits { |
| 140 | TimerInt = 0x800, |
Valerie Henson | 1ddb986 | 2007-03-12 02:31:33 -0700 | [diff] [blame] | 141 | SystemError = 0x2000, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | TPLnkFail = 0x1000, |
| 143 | TPLnkPass = 0x10, |
| 144 | NormalIntr = 0x10000, |
| 145 | AbnormalIntr = 0x8000, |
| 146 | RxJabber = 0x200, |
| 147 | RxDied = 0x100, |
| 148 | RxNoBuf = 0x80, |
| 149 | RxIntr = 0x40, |
| 150 | TxFIFOUnderflow = 0x20, |
Grant Grundler | 7f2b124 | 2006-09-08 11:15:39 -0700 | [diff] [blame] | 151 | RxErrIntr = 0x10, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | TxJabber = 0x08, |
| 153 | TxNoBuf = 0x04, |
| 154 | TxDied = 0x02, |
| 155 | TxIntr = 0x01, |
| 156 | }; |
| 157 | |
| 158 | /* bit mask for CSR5 TX/RX process state */ |
| 159 | #define CSR5_TS 0x00700000 |
| 160 | #define CSR5_RS 0x000e0000 |
| 161 | |
| 162 | enum tulip_mode_bits { |
| 163 | TxThreshold = (1 << 22), |
| 164 | FullDuplex = (1 << 9), |
| 165 | TxOn = 0x2000, |
| 166 | AcceptBroadcast = 0x0100, |
| 167 | AcceptAllMulticast = 0x0080, |
| 168 | AcceptAllPhys = 0x0040, |
| 169 | AcceptRunt = 0x0008, |
| 170 | RxOn = 0x0002, |
| 171 | RxTx = (TxOn | RxOn), |
| 172 | }; |
| 173 | |
| 174 | |
| 175 | enum tulip_busconfig_bits { |
| 176 | MWI = (1 << 24), |
| 177 | MRL = (1 << 23), |
| 178 | MRM = (1 << 21), |
| 179 | CALShift = 14, |
| 180 | BurstLenShift = 8, |
| 181 | }; |
| 182 | |
| 183 | |
| 184 | /* The Tulip Rx and Tx buffer descriptors. */ |
| 185 | struct tulip_rx_desc { |
Al Viro | c559a5b | 2007-08-23 00:43:22 -0400 | [diff] [blame] | 186 | __le32 status; |
| 187 | __le32 length; |
| 188 | __le32 buffer1; |
| 189 | __le32 buffer2; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | }; |
| 191 | |
| 192 | |
| 193 | struct tulip_tx_desc { |
Al Viro | c559a5b | 2007-08-23 00:43:22 -0400 | [diff] [blame] | 194 | __le32 status; |
| 195 | __le32 length; |
| 196 | __le32 buffer1; |
| 197 | __le32 buffer2; /* We use only buffer 1. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | }; |
| 199 | |
| 200 | |
| 201 | enum desc_status_bits { |
Grant Grundler | 7f2b124 | 2006-09-08 11:15:39 -0700 | [diff] [blame] | 202 | DescOwned = 0x80000000, |
| 203 | DescWholePkt = 0x60000000, |
| 204 | DescEndPkt = 0x40000000, |
| 205 | DescStartPkt = 0x20000000, |
| 206 | DescEndRing = 0x02000000, |
| 207 | DescUseLink = 0x01000000, |
Tomasz Lemiech | 1f8ae0a | 2009-03-13 15:43:38 -0700 | [diff] [blame] | 208 | |
| 209 | /* |
| 210 | * Error summary flag is logical or of 'CRC Error', 'Collision Seen', |
| 211 | * 'Frame Too Long', 'Runt' and 'Descriptor Error' flags generated |
| 212 | * within tulip chip. |
| 213 | */ |
| 214 | RxDescErrorSummary = 0x8000, |
| 215 | RxDescCRCError = 0x0002, |
| 216 | RxDescCollisionSeen = 0x0040, |
| 217 | |
| 218 | /* |
| 219 | * 'Frame Too Long' flag is set if packet length including CRC exceeds |
| 220 | * 1518. However, a full sized VLAN tagged frame is 1522 bytes |
| 221 | * including CRC. |
| 222 | * |
| 223 | * The tulip chip does not block oversized frames, and if this flag is |
| 224 | * set on a receive descriptor it does not indicate the frame has been |
| 225 | * truncated. The receive descriptor also includes the actual length. |
| 226 | * Therefore we can safety ignore this flag and check the length |
| 227 | * ourselves. |
| 228 | */ |
| 229 | RxDescFrameTooLong = 0x0080, |
| 230 | RxDescRunt = 0x0800, |
| 231 | RxDescDescErr = 0x4000, |
Grant Grundler | 7f2b124 | 2006-09-08 11:15:39 -0700 | [diff] [blame] | 232 | RxWholePkt = 0x00000300, |
Tomasz Lemiech | 1f8ae0a | 2009-03-13 15:43:38 -0700 | [diff] [blame] | 233 | /* |
| 234 | * Top three bits of 14 bit frame length (status bits 27-29) should |
| 235 | * never be set as that would make frame over 2047 bytes. The Receive |
| 236 | * Watchdog flag (bit 4) may indicate the length is over 2048 and the |
| 237 | * length field is invalid. |
| 238 | */ |
| 239 | RxLengthOver2047 = 0x38000010 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | }; |
| 241 | |
| 242 | |
| 243 | enum t21143_csr6_bits { |
| 244 | csr6_sc = (1<<31), |
| 245 | csr6_ra = (1<<30), |
| 246 | csr6_ign_dest_msb = (1<<26), |
| 247 | csr6_mbo = (1<<25), |
| 248 | csr6_scr = (1<<24), /* scramble mode flag: can't be set */ |
| 249 | csr6_pcs = (1<<23), /* Enables PCS functions (symbol mode requires csr6_ps be set) default is set */ |
| 250 | csr6_ttm = (1<<22), /* Transmit Threshold Mode, set for 10baseT, 0 for 100BaseTX */ |
| 251 | csr6_sf = (1<<21), /* Store and forward. If set ignores TR bits */ |
| 252 | csr6_hbd = (1<<19), /* Heart beat disable. Disables SQE function in 10baseT */ |
| 253 | csr6_ps = (1<<18), /* Port Select. 0 (defualt) = 10baseT, 1 = 100baseTX: can't be set */ |
| 254 | csr6_ca = (1<<17), /* Collision Offset Enable. If set uses special algorithm in low collision situations */ |
| 255 | csr6_trh = (1<<15), /* Transmit Threshold high bit */ |
| 256 | csr6_trl = (1<<14), /* Transmit Threshold low bit */ |
| 257 | |
| 258 | /*************************************************************** |
| 259 | * This table shows transmit threshold values based on media * |
| 260 | * and these two registers (from PNIC1 & 2 docs) Note: this is * |
| 261 | * all meaningless if sf is set. * |
| 262 | ***************************************************************/ |
| 263 | |
| 264 | /*********************************** |
| 265 | * (trh,trl) * 100BaseTX * 10BaseT * |
| 266 | *********************************** |
| 267 | * (0,0) * 128 * 72 * |
| 268 | * (0,1) * 256 * 96 * |
| 269 | * (1,0) * 512 * 128 * |
| 270 | * (1,1) * 1024 * 160 * |
| 271 | ***********************************/ |
| 272 | |
| 273 | csr6_fc = (1<<12), /* Forces a collision in next transmission (for testing in loopback mode) */ |
| 274 | csr6_om_int_loop = (1<<10), /* internal (FIFO) loopback flag */ |
| 275 | csr6_om_ext_loop = (1<<11), /* external (PMD) loopback flag */ |
| 276 | /* set both and you get (PHY) loopback */ |
| 277 | csr6_fd = (1<<9), /* Full duplex mode, disables hearbeat, no loopback */ |
| 278 | csr6_pm = (1<<7), /* Pass All Multicast */ |
| 279 | csr6_pr = (1<<6), /* Promiscuous mode */ |
| 280 | csr6_sb = (1<<5), /* Start(1)/Stop(0) backoff counter */ |
| 281 | csr6_if = (1<<4), /* Inverse Filtering, rejects only addresses in address table: can't be set */ |
| 282 | csr6_pb = (1<<3), /* Pass Bad Frames, (1) causes even bad frames to be passed on */ |
| 283 | csr6_ho = (1<<2), /* Hash-only filtering mode: can't be set */ |
| 284 | csr6_hp = (1<<0), /* Hash/Perfect Receive Filtering Mode: can't be set */ |
| 285 | |
| 286 | csr6_mask_capture = (csr6_sc | csr6_ca), |
| 287 | csr6_mask_defstate = (csr6_mask_capture | csr6_mbo), |
| 288 | csr6_mask_hdcap = (csr6_mask_defstate | csr6_hbd | csr6_ps), |
| 289 | csr6_mask_hdcaptt = (csr6_mask_hdcap | csr6_trh | csr6_trl), |
| 290 | csr6_mask_fullcap = (csr6_mask_hdcaptt | csr6_fd), |
| 291 | csr6_mask_fullpromisc = (csr6_pr | csr6_pm), |
| 292 | csr6_mask_filters = (csr6_hp | csr6_ho | csr6_if), |
| 293 | csr6_mask_100bt = (csr6_scr | csr6_pcs | csr6_hbd), |
| 294 | }; |
| 295 | |
Steven Walter | db6f300 | 2010-05-31 12:34:43 +0000 | [diff] [blame] | 296 | enum tulip_comet_csr13_bits { |
| 297 | /* The LINKOFFE and LINKONE work in conjunction with LSCE, i.e. they |
| 298 | * determine which link status transition wakes up if LSCE is |
| 299 | * enabled */ |
| 300 | comet_csr13_linkoffe = (1 << 17), |
| 301 | comet_csr13_linkone = (1 << 16), |
| 302 | comet_csr13_wfre = (1 << 10), |
| 303 | comet_csr13_mpre = (1 << 9), |
| 304 | comet_csr13_lsce = (1 << 8), |
| 305 | comet_csr13_wfr = (1 << 2), |
| 306 | comet_csr13_mpr = (1 << 1), |
| 307 | comet_csr13_lsc = (1 << 0), |
| 308 | }; |
| 309 | |
| 310 | enum tulip_comet_csr18_bits { |
| 311 | comet_csr18_pmes_sticky = (1 << 24), |
| 312 | comet_csr18_pm_mode = (1 << 19), |
| 313 | comet_csr18_apm_mode = (1 << 18), |
| 314 | comet_csr18_d3a = (1 << 7) |
| 315 | }; |
| 316 | |
| 317 | enum tulip_comet_csr20_bits { |
| 318 | comet_csr20_pmes = (1 << 15), |
| 319 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | |
| 321 | /* Keep the ring sizes a power of two for efficiency. |
| 322 | Making the Tx ring too large decreases the effectiveness of channel |
| 323 | bonding and packet priority. |
| 324 | There are no ill effects from too-large receive rings. */ |
| 325 | |
| 326 | #define TX_RING_SIZE 32 |
Jeff Garzik | f3b197a | 2006-05-26 21:39:03 -0400 | [diff] [blame] | 327 | #define RX_RING_SIZE 128 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 328 | #define MEDIA_MASK 31 |
| 329 | |
Peter Horton | 10c6462 | 2008-03-25 12:39:09 +0100 | [diff] [blame] | 330 | /* The receiver on the DC21143 rev 65 can fail to close the last |
| 331 | * receive descriptor in certain circumstances (see errata) when |
| 332 | * using MWI. This can only occur if the receive buffer ends on |
| 333 | * a cache line boundary, so the "+ 4" below ensures it doesn't. |
| 334 | */ |
| 335 | #define PKT_BUF_SZ (1536 + 4) /* Size of each temporary Rx buffer. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | |
| 337 | #define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */ |
| 338 | |
| 339 | #if defined(__sparc__) || defined(__hppa__) |
| 340 | /* The UltraSparc PCI controllers will disconnect at every 64-byte |
| 341 | * crossing anyways so it makes no sense to tell Tulip to burst |
| 342 | * any more than that. |
| 343 | */ |
| 344 | #define TULIP_MAX_CACHE_LINE 16 /* in units of 32-bit words */ |
| 345 | #else |
| 346 | #define TULIP_MAX_CACHE_LINE 32 /* in units of 32-bit words */ |
| 347 | #endif |
| 348 | |
| 349 | |
| 350 | /* Ring-wrap flag in length field, use for last ring entry. |
| 351 | 0x01000000 means chain on buffer2 address, |
| 352 | 0x02000000 means use the ring start address in CSR2/3. |
| 353 | Note: Some work-alike chips do not function correctly in chained mode. |
| 354 | The ASIX chip works only in chained mode. |
| 355 | Thus we indicates ring mode, but always write the 'next' field for |
| 356 | chained mode as well. |
| 357 | */ |
| 358 | #define DESC_RING_WRAP 0x02000000 |
| 359 | |
| 360 | |
| 361 | #define EEPROM_SIZE 512 /* 2 << EEPROM_ADDRLEN */ |
| 362 | |
| 363 | |
| 364 | #define RUN_AT(x) (jiffies + (x)) |
| 365 | |
Harvey Harrison | 6caf52a | 2008-04-29 01:03:36 -0700 | [diff] [blame] | 366 | #define get_u16(ptr) get_unaligned_le16((ptr)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 367 | |
| 368 | struct medialeaf { |
| 369 | u8 type; |
| 370 | u8 media; |
| 371 | unsigned char *leafdata; |
| 372 | }; |
| 373 | |
| 374 | |
| 375 | struct mediatable { |
| 376 | u16 defaultmedia; |
| 377 | u8 leafcount; |
| 378 | u8 csr12dir; /* General purpose pin directions. */ |
| 379 | unsigned has_mii:1; |
| 380 | unsigned has_nonmii:1; |
| 381 | unsigned has_reset:6; |
| 382 | u32 csr15dir; |
| 383 | u32 csr15val; /* 21143 NWay setting. */ |
| 384 | struct medialeaf mleaf[0]; |
| 385 | }; |
| 386 | |
| 387 | |
| 388 | struct mediainfo { |
| 389 | struct mediainfo *next; |
| 390 | int info_type; |
| 391 | int index; |
| 392 | unsigned char *info; |
| 393 | }; |
| 394 | |
| 395 | struct ring_info { |
| 396 | struct sk_buff *skb; |
| 397 | dma_addr_t mapping; |
| 398 | }; |
| 399 | |
| 400 | |
| 401 | struct tulip_private { |
| 402 | const char *product_name; |
| 403 | struct net_device *next_module; |
| 404 | struct tulip_rx_desc *rx_ring; |
| 405 | struct tulip_tx_desc *tx_ring; |
| 406 | dma_addr_t rx_ring_dma; |
| 407 | dma_addr_t tx_ring_dma; |
| 408 | /* The saved address of a sent-in-place packet/buffer, for skfree(). */ |
| 409 | struct ring_info tx_buffers[TX_RING_SIZE]; |
| 410 | /* The addresses of receive-in-place skbuffs. */ |
| 411 | struct ring_info rx_buffers[RX_RING_SIZE]; |
| 412 | u16 setup_frame[96]; /* Pseudo-Tx frame to init address table. */ |
| 413 | int chip_id; |
| 414 | int revision; |
| 415 | int flags; |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 416 | struct napi_struct napi; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | struct timer_list timer; /* Media selection timer. */ |
| 418 | struct timer_list oom_timer; /* Out of memory timer. */ |
| 419 | u32 mc_filter[2]; |
| 420 | spinlock_t lock; |
| 421 | spinlock_t mii_lock; |
| 422 | unsigned int cur_rx, cur_tx; /* The next free ring entry */ |
| 423 | unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */ |
| 424 | |
| 425 | #ifdef CONFIG_TULIP_NAPI_HW_MITIGATION |
| 426 | int mit_on; |
| 427 | #endif |
| 428 | unsigned int full_duplex:1; /* Full-duplex operation requested. */ |
| 429 | unsigned int full_duplex_lock:1; |
| 430 | unsigned int fake_addr:1; /* Multiport board faked address. */ |
| 431 | unsigned int default_port:4; /* Last dev->if_port value. */ |
| 432 | unsigned int media2:4; /* Secondary monitored media port. */ |
| 433 | unsigned int medialock:1; /* Don't sense media type. */ |
| 434 | unsigned int mediasense:1; /* Media sensing in progress. */ |
| 435 | unsigned int nway:1, nwayset:1; /* 21143 internal NWay. */ |
Francois Romieu | 0bb3cf7 | 2006-09-08 11:15:38 -0700 | [diff] [blame] | 436 | unsigned int timeout_recovery:1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 437 | unsigned int csr0; /* CSR0 setting. */ |
| 438 | unsigned int csr6; /* Current CSR6 control settings. */ |
| 439 | unsigned char eeprom[EEPROM_SIZE]; /* Serial EEPROM contents. */ |
| 440 | void (*link_change) (struct net_device * dev, int csr5); |
Steven Walter | db6f300 | 2010-05-31 12:34:43 +0000 | [diff] [blame] | 441 | struct ethtool_wolinfo wolinfo; /* WOL settings */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | u16 sym_advertise, mii_advertise; /* NWay capabilities advertised. */ |
| 443 | u16 lpar; /* 21143 Link partner ability. */ |
| 444 | u16 advertising[4]; |
| 445 | signed char phys[4], mii_cnt; /* MII device addresses. */ |
| 446 | struct mediatable *mtable; |
| 447 | int cur_index; /* Current media index. */ |
| 448 | int saved_if_port; |
| 449 | struct pci_dev *pdev; |
| 450 | int ttimer; |
| 451 | int susp_rx; |
| 452 | unsigned long nir; |
| 453 | void __iomem *base_addr; |
| 454 | int csr12_shadow; |
| 455 | int pad0; /* Used for 8-byte alignment */ |
Francois Romieu | 0bb3cf7 | 2006-09-08 11:15:38 -0700 | [diff] [blame] | 456 | struct work_struct media_work; |
David Howells | c402895 | 2006-11-22 14:57:56 +0000 | [diff] [blame] | 457 | struct net_device *dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | }; |
| 459 | |
| 460 | |
| 461 | struct eeprom_fixup { |
| 462 | char *name; |
| 463 | unsigned char addr0; |
| 464 | unsigned char addr1; |
| 465 | unsigned char addr2; |
| 466 | u16 newtable[32]; /* Max length below. */ |
| 467 | }; |
| 468 | |
| 469 | |
| 470 | /* 21142.c */ |
| 471 | extern u16 t21142_csr14[]; |
David Howells | c402895 | 2006-11-22 14:57:56 +0000 | [diff] [blame] | 472 | void t21142_media_task(struct work_struct *work); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 473 | void t21142_start_nway(struct net_device *dev); |
| 474 | void t21142_lnk_change(struct net_device *dev, int csr5); |
| 475 | |
| 476 | |
| 477 | /* PNIC2.c */ |
| 478 | void pnic2_lnk_change(struct net_device *dev, int csr5); |
| 479 | void pnic2_timer(unsigned long data); |
| 480 | void pnic2_start_nway(struct net_device *dev); |
| 481 | void pnic2_lnk_change(struct net_device *dev, int csr5); |
| 482 | |
| 483 | /* eeprom.c */ |
| 484 | void tulip_parse_eeprom(struct net_device *dev); |
| 485 | int tulip_read_eeprom(struct net_device *dev, int location, int addr_len); |
| 486 | |
| 487 | /* interrupt.c */ |
| 488 | extern unsigned int tulip_max_interrupt_work; |
| 489 | extern int tulip_rx_copybreak; |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 490 | irqreturn_t tulip_interrupt(int irq, void *dev_instance); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 491 | int tulip_refill_rx(struct net_device *dev); |
| 492 | #ifdef CONFIG_TULIP_NAPI |
Stephen Hemminger | bea3348 | 2007-10-03 16:41:36 -0700 | [diff] [blame] | 493 | int tulip_poll(struct napi_struct *napi, int budget); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 494 | #endif |
| 495 | |
| 496 | |
| 497 | /* media.c */ |
| 498 | int tulip_mdio_read(struct net_device *dev, int phy_id, int location); |
| 499 | void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int value); |
| 500 | void tulip_select_media(struct net_device *dev, int startup); |
| 501 | int tulip_check_duplex(struct net_device *dev); |
| 502 | void tulip_find_mii (struct net_device *dev, int board_idx); |
| 503 | |
| 504 | /* pnic.c */ |
| 505 | void pnic_do_nway(struct net_device *dev); |
| 506 | void pnic_lnk_change(struct net_device *dev, int csr5); |
| 507 | void pnic_timer(unsigned long data); |
| 508 | |
| 509 | /* timer.c */ |
David Howells | c402895 | 2006-11-22 14:57:56 +0000 | [diff] [blame] | 510 | void tulip_media_task(struct work_struct *work); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 511 | void mxic_timer(unsigned long data); |
| 512 | void comet_timer(unsigned long data); |
| 513 | |
| 514 | /* tulip_core.c */ |
| 515 | extern int tulip_debug; |
| 516 | extern const char * const medianame[]; |
| 517 | extern const char tulip_media_cap[]; |
| 518 | extern struct tulip_chip_table tulip_tbl[]; |
| 519 | void oom_timer(unsigned long data); |
| 520 | extern u8 t21040_csr13[]; |
| 521 | |
| 522 | static inline void tulip_start_rxtx(struct tulip_private *tp) |
| 523 | { |
| 524 | void __iomem *ioaddr = tp->base_addr; |
| 525 | iowrite32(tp->csr6 | RxTx, ioaddr + CSR6); |
| 526 | barrier(); |
| 527 | (void) ioread32(ioaddr + CSR6); /* mmio sync */ |
| 528 | } |
| 529 | |
| 530 | static inline void tulip_stop_rxtx(struct tulip_private *tp) |
| 531 | { |
| 532 | void __iomem *ioaddr = tp->base_addr; |
| 533 | u32 csr6 = ioread32(ioaddr + CSR6); |
| 534 | |
| 535 | if (csr6 & RxTx) { |
| 536 | unsigned i=1300/10; |
| 537 | iowrite32(csr6 & ~RxTx, ioaddr + CSR6); |
| 538 | barrier(); |
| 539 | /* wait until in-flight frame completes. |
| 540 | * Max time @ 10BT: 1500*8b/10Mbps == 1200us (+ 100us margin) |
| 541 | * Typically expect this loop to end in < 50 us on 100BT. |
| 542 | */ |
| 543 | while (--i && (ioread32(ioaddr + CSR5) & (CSR5_TS|CSR5_RS))) |
| 544 | udelay(10); |
| 545 | |
| 546 | if (!i) |
Joe Perches | 726b65a | 2011-05-09 09:45:22 +0000 | [diff] [blame] | 547 | netdev_dbg(tp->dev, "tulip_stop_rxtx() failed (CSR5 0x%x CSR6 0x%x)\n", |
| 548 | ioread32(ioaddr + CSR5), |
| 549 | ioread32(ioaddr + CSR6)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 550 | } |
| 551 | } |
| 552 | |
| 553 | static inline void tulip_restart_rxtx(struct tulip_private *tp) |
| 554 | { |
Peer Chen | ea8f400 | 2005-08-11 15:09:23 -0400 | [diff] [blame] | 555 | tulip_stop_rxtx(tp); |
| 556 | udelay(5); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 557 | tulip_start_rxtx(tp); |
| 558 | } |
| 559 | |
Francois Romieu | 0bb3cf7 | 2006-09-08 11:15:38 -0700 | [diff] [blame] | 560 | static inline void tulip_tx_timeout_complete(struct tulip_private *tp, void __iomem *ioaddr) |
| 561 | { |
| 562 | /* Stop and restart the chip's Tx processes. */ |
| 563 | tulip_restart_rxtx(tp); |
| 564 | /* Trigger an immediate transmit demand. */ |
| 565 | iowrite32(0, ioaddr + CSR1); |
| 566 | |
Eric Dumazet | 1a18aba | 2010-09-03 03:52:43 +0000 | [diff] [blame] | 567 | tp->dev->stats.tx_errors++; |
Francois Romieu | 0bb3cf7 | 2006-09-08 11:15:38 -0700 | [diff] [blame] | 568 | } |
| 569 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 570 | #endif /* __NET_TULIP_H__ */ |