blob: 3ee41da130c2e683063799421bb58019dfa4621e [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Joe Perchesada1db52010-02-17 15:01:59 +000025#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
Stephen Hemminger793b8832005-09-14 16:06:14 -070027#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070028#include <linux/kernel.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070029#include <linux/module.h>
30#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080031#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070032#include <linux/etherdevice.h>
33#include <linux/ethtool.h>
34#include <linux/pci.h>
35#include <linux/ip.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/slab.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030037#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070038#include <linux/tcp.h>
39#include <linux/in.h>
40#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080041#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070042#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080043#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070044#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080045#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070046
47#include <asm/irq.h>
48
49#include "sky2.h"
50
51#define DRV_NAME "sky2"
stephen hemmingere0a67e22010-05-13 06:12:53 +000052#define DRV_VERSION "1.28"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070053
54/*
55 * The Yukon II chipset takes 64 bit command blocks (called list elements)
56 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070057 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070058 */
59
Stephen Hemminger14d02632006-09-26 11:57:43 -070060#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070061#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070062#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080063#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070064
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +000065/* This is the worst case number of transmit list elements for a single skb:
Stephen Hemminger07e31632009-09-14 06:12:55 +000066 VLAN:GSO + CKSUM + Data + skb_frags * DMA */
67#define MAX_SKB_TX_LE (2 + (sizeof(dma_addr_t)/sizeof(u32))*(MAX_SKB_FRAGS+1))
Stephen Hemmingere9c1be82009-06-17 07:30:37 +000068#define TX_MIN_PENDING (MAX_SKB_TX_LE+1)
stephen hemmingerefe91932010-04-22 13:42:56 +000069#define TX_MAX_PENDING 1024
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +000070#define TX_DEF_PENDING 127
Stephen Hemminger793b8832005-09-14 16:06:14 -070071
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070072#define TX_WATCHDOG (5 * HZ)
73#define NAPI_WEIGHT 64
74#define PHY_RETRIES 1000
75
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070076#define SKY2_EEPROM_MAGIC 0x9955aabb
77
Mike McCormack060b9462010-07-29 03:34:52 +000078#define RING_NEXT(x, s) (((x)+1) & ((s)-1))
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070079
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070080static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070081 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
82 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080083 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070084
Stephen Hemminger793b8832005-09-14 16:06:14 -070085static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070086module_param(debug, int, 0);
87MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88
Stephen Hemminger14d02632006-09-26 11:57:43 -070089static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080090module_param(copybreak, int, 0);
91MODULE_PARM_DESC(copybreak, "Receive copy threshold");
92
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080093static int disable_msi = 0;
94module_param(disable_msi, int, 0);
95MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
96
Stephen Hemmingere6cac9b2008-06-17 09:04:26 -070097static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -080098 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
99 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemmingere30a4ac2009-10-29 06:37:05 +0000100 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700101 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700102 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800103 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800104 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800105 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
106 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
107 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingera3b4fce2008-06-14 10:32:15 -0700118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4355) }, /* 88E8040T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4357) }, /* 88E8042 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700137 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000138 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700139 { 0 }
140};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700141
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700142MODULE_DEVICE_TABLE(pci, sky2_id_table);
143
144/* Avoid conditionals by using array */
145static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
146static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700147static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700148
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100149static void sky2_set_multicast(struct net_device *dev);
150
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800151/* Access to PHY via serial interconnect */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800152static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700153{
154 int i;
155
156 gma_write16(hw, port, GM_SMI_DATA, val);
157 gma_write16(hw, port, GM_SMI_CTRL,
158 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
159
160 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800161 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
162 if (ctrl == 0xffff)
163 goto io_error;
164
165 if (!(ctrl & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800166 return 0;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800167
168 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700169 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800170
Mike McCormack060b9462010-07-29 03:34:52 +0000171 dev_warn(&hw->pdev->dev, "%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800172 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800173
174io_error:
175 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
176 return -EIO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700177}
178
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800179static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700180{
181 int i;
182
Stephen Hemminger793b8832005-09-14 16:06:14 -0700183 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700184 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
185
186 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800187 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
188 if (ctrl == 0xffff)
189 goto io_error;
190
191 if (ctrl & GM_SMI_CT_RD_VAL) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800192 *val = gma_read16(hw, port, GM_SMI_DATA);
193 return 0;
194 }
195
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800196 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700197 }
198
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800199 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800200 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800201io_error:
202 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
203 return -EIO;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800204}
205
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800206static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800207{
208 u16 v;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800209 __gm_phy_read(hw, port, reg, &v);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800210 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700211}
212
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800213
214static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700215{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800216 /* switch power to VCC (WA for VAUX problem) */
217 sky2_write8(hw, B0_POWER_CTRL,
218 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700219
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800220 /* disable Core Clock Division, */
221 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700222
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000223 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800224 /* enable bits are inverted */
225 sky2_write8(hw, B2_Y2_CLK_GATE,
226 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
227 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
228 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
229 else
230 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700231
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700232 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700233 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700234
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800235 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700236
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800237 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700238 /* set all bits to 0 except bits 15..12 and 8 */
239 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800240 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700241
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800242 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700243 /* set all bits to 0 except bits 28 & 27 */
244 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800245 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700246
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800247 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700248
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000249 sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON);
250
Stephen Hemminger8f709202007-06-04 17:23:25 -0700251 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
252 reg = sky2_read32(hw, B2_GP_IO);
253 reg |= GLB_GPIO_STAT_RACE_DIS;
254 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700255
256 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700257 }
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000258
259 /* Turn on "driver loaded" LED */
260 sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800261}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700262
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800263static void sky2_power_aux(struct sky2_hw *hw)
264{
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000265 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800266 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
267 else
268 /* enable bits are inverted */
269 sky2_write8(hw, B2_Y2_CLK_GATE,
270 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
271 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
272 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
273
Stephen Hemmingerc23ddf82009-09-03 06:16:25 +0000274 /* switch power to VAUX if supported and PME from D3cold */
275 if ( (sky2_read32(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
276 pci_pme_capable(hw->pdev, PCI_D3cold))
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800277 sky2_write8(hw, B0_POWER_CTRL,
278 (PC_VAUX_ENA | PC_VCC_ENA |
279 PC_VAUX_ON | PC_VCC_OFF));
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000280
281 /* turn off "driver loaded LED" */
282 sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700283}
284
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700285static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700286{
287 u16 reg;
288
289 /* disable all GMAC IRQ's */
290 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700291
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700292 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
293 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
294 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
295 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
296
297 reg = gma_read16(hw, port, GM_RX_CTRL);
298 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
299 gma_write16(hw, port, GM_RX_CTRL, reg);
300}
301
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700302/* flow control to advertise bits */
303static const u16 copper_fc_adv[] = {
304 [FC_NONE] = 0,
305 [FC_TX] = PHY_M_AN_ASP,
306 [FC_RX] = PHY_M_AN_PC,
307 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
308};
309
310/* flow control to advertise bits when using 1000BaseX */
311static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700312 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700313 [FC_TX] = PHY_M_P_ASYM_MD_X,
314 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700315 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700316};
317
318/* flow control to GMA disable bits */
319static const u16 gm_fc_disable[] = {
320 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
321 [FC_TX] = GM_GPCR_FC_RX_DIS,
322 [FC_RX] = GM_GPCR_FC_TX_DIS,
323 [FC_BOTH] = 0,
324};
325
326
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700327static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
328{
329 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700330 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700331
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700332 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700333 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700334 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
335
336 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700337 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700338 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
339
Stephen Hemminger53419c62007-05-14 12:38:11 -0700340 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700341 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700342 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700343 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
344 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700345 /* set master & slave downshift counter to 1x */
346 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700347
348 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
349 }
350
351 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700352 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700353 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700354 /* enable automatic crossover */
355 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700356
357 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
358 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
359 u16 spec;
360
361 /* Enable Class A driver for FE+ A0 */
362 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
363 spec |= PHY_M_FESC_SEL_CL_A;
364 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
365 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700366 } else {
367 /* disable energy detect */
368 ctrl &= ~PHY_M_PC_EN_DET_MSK;
369
370 /* enable automatic crossover */
371 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
372
Stephen Hemminger53419c62007-05-14 12:38:11 -0700373 /* downshift on PHY 88E1112 and 88E1149 is changed */
Joe Perches8e95a202009-12-03 07:58:21 +0000374 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
375 (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700376 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700377 ctrl &= ~PHY_M_PC_DSC_MSK;
378 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
379 }
380 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700381 } else {
382 /* workaround for deviation #4.88 (CRC errors) */
383 /* disable Automatic Crossover */
384
385 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700386 }
387
388 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
389
390 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700391 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700392 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
393
394 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
395 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
396 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
397 ctrl &= ~PHY_M_MAC_MD_MSK;
398 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700399 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
400
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700401 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700402 /* select page 1 to access Fiber registers */
403 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700404
405 /* for SFP-module set SIGDET polarity to low */
406 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
407 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700408 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700409 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700410
411 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700412 }
413
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700414 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700415 ct1000 = 0;
416 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700417 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700418
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700419 if (sky2->flags & SKY2_FLAG_AUTO_SPEED) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700420 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700421 if (sky2->advertising & ADVERTISED_1000baseT_Full)
422 ct1000 |= PHY_M_1000C_AFD;
423 if (sky2->advertising & ADVERTISED_1000baseT_Half)
424 ct1000 |= PHY_M_1000C_AHD;
425 if (sky2->advertising & ADVERTISED_100baseT_Full)
426 adv |= PHY_M_AN_100_FD;
427 if (sky2->advertising & ADVERTISED_100baseT_Half)
428 adv |= PHY_M_AN_100_HD;
429 if (sky2->advertising & ADVERTISED_10baseT_Full)
430 adv |= PHY_M_AN_10_FD;
431 if (sky2->advertising & ADVERTISED_10baseT_Half)
432 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700433
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700434 } else { /* special defines for FIBER (88E1040S only) */
435 if (sky2->advertising & ADVERTISED_1000baseT_Full)
436 adv |= PHY_M_AN_1000X_AFD;
437 if (sky2->advertising & ADVERTISED_1000baseT_Half)
438 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700439 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700440
441 /* Restart Auto-negotiation */
442 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
443 } else {
444 /* forced speed/duplex settings */
445 ct1000 = PHY_M_1000C_MSE;
446
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700447 /* Disable auto update for duplex flow control and duplex */
448 reg |= GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_SPD_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700449
450 switch (sky2->speed) {
451 case SPEED_1000:
452 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700453 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700454 break;
455 case SPEED_100:
456 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700457 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700458 break;
459 }
460
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700461 if (sky2->duplex == DUPLEX_FULL) {
462 reg |= GM_GPCR_DUP_FULL;
463 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700464 } else if (sky2->speed < SPEED_1000)
465 sky2->flow_mode = FC_NONE;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700466 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700467
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700468 if (sky2->flags & SKY2_FLAG_AUTO_PAUSE) {
469 if (sky2_is_copper(hw))
470 adv |= copper_fc_adv[sky2->flow_mode];
471 else
472 adv |= fiber_fc_adv[sky2->flow_mode];
473 } else {
474 reg |= GM_GPCR_AU_FCT_DIS;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700475 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700476
477 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700478 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700479 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
480 else
481 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700482 }
483
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700484 gma_write16(hw, port, GM_GP_CTRL, reg);
485
Stephen Hemminger05745c42007-09-19 15:36:45 -0700486 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700487 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
488
489 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
490 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
491
492 /* Setup Phy LED's */
493 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
494 ledover = 0;
495
496 switch (hw->chip_id) {
497 case CHIP_ID_YUKON_FE:
498 /* on 88E3082 these bits are at 11..9 (shifted left) */
499 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
500
501 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
502
503 /* delete ACT LED control bits */
504 ctrl &= ~PHY_M_FELP_LED1_MSK;
505 /* change ACT LED control to blink mode */
506 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
507 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
508 break;
509
Stephen Hemminger05745c42007-09-19 15:36:45 -0700510 case CHIP_ID_YUKON_FE_P:
511 /* Enable Link Partner Next Page */
512 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
513 ctrl |= PHY_M_PC_ENA_LIP_NP;
514
515 /* disable Energy Detect and enable scrambler */
516 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
517 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
518
519 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
520 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
521 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
522 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
523
524 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
525 break;
526
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700527 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700528 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700529
530 /* select page 3 to access LED control register */
531 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
532
533 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700534 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
535 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
536 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
537 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
538 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700539
540 /* set Polarity Control register */
541 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700542 (PHY_M_POLC_LS1_P_MIX(4) |
543 PHY_M_POLC_IS0_P_MIX(4) |
544 PHY_M_POLC_LOS_CTRL(2) |
545 PHY_M_POLC_INIT_CTRL(2) |
546 PHY_M_POLC_STA1_CTRL(2) |
547 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700548
549 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700550 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700551 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800552
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700553 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800554 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800555 case CHIP_ID_YUKON_SUPR:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700556 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
557
558 /* select page 3 to access LED control register */
559 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
560
561 /* set LED Function Control register */
562 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
563 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
564 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
565 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
566 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
567
568 /* set Blink Rate in LED Timer Control Register */
569 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
570 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
571 /* restore page register */
572 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
573 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700574
575 default:
576 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
577 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800578
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700579 /* turn off the Rx LED (LED_RX) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800580 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700581 }
582
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700583 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800584 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700585 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
586
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800587 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700588 gm_phy_write(hw, port, 0x18, 0xaa99);
589 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700590
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700591 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
592 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
593 gm_phy_write(hw, port, 0x18, 0xa204);
594 gm_phy_write(hw, port, 0x17, 0x2002);
595 }
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800596
597 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700598 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700599 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
600 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
601 /* apply workaround for integrated resistors calibration */
602 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
603 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000604 } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
605 /* apply fixes in PHY AFE */
606 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
607
608 /* apply RDAC termination workaround */
609 gm_phy_write(hw, port, 24, 0x2800);
610 gm_phy_write(hw, port, 23, 0x2001);
611
612 /* set page register back to 0 */
613 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingere1a74b32008-06-17 09:04:24 -0700614 } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
615 hw->chip_id < CHIP_ID_YUKON_SUPR) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700616 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800617 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
618
Joe Perches8e95a202009-12-03 07:58:21 +0000619 if (!(sky2->flags & SKY2_FLAG_AUTO_SPEED) ||
620 sky2->speed == SPEED_100) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800621 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800622 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800623 }
624
625 if (ledover)
626 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
627
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700628 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700629
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700630 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700631 if (sky2->flags & SKY2_FLAG_AUTO_SPEED)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700632 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
633 else
634 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
635}
636
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700637static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
638static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
639
640static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700641{
642 u32 reg1;
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700643
stephen hemmingera40ccc62010-01-24 18:46:06 +0000644 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800645 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700646 reg1 &= ~phy_power[port];
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700647
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000648 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerff351642007-10-11 19:47:44 -0700649 reg1 |= coma_mode[port];
650
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800651 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000652 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger82637e82008-01-23 19:16:04 -0800653 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -0700654
655 if (hw->chip_id == CHIP_ID_YUKON_FE)
656 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE);
657 else if (hw->flags & SKY2_HW_ADV_POWER_CTL)
658 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700659}
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700660
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700661static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
662{
663 u32 reg1;
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700664 u16 ctrl;
665
666 /* release GPHY Control reset */
667 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
668
669 /* release GMAC reset */
670 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
671
672 if (hw->flags & SKY2_HW_NEWER_PHY) {
673 /* select page 2 to access MAC control register */
674 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
675
676 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
677 /* allow GMII Power Down */
678 ctrl &= ~PHY_M_MAC_GMIF_PUP;
679 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
680
681 /* set page register back to 0 */
682 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
683 }
684
685 /* setup General Purpose Control Register */
686 gma_write16(hw, port, GM_GP_CTRL,
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700687 GM_GPCR_FL_PASS | GM_GPCR_SPEED_100 |
688 GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS |
689 GM_GPCR_AU_SPD_DIS);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700690
691 if (hw->chip_id != CHIP_ID_YUKON_EC) {
692 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200693 /* select page 2 to access MAC control register */
694 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700695
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200696 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700697 /* enable Power Down */
698 ctrl |= PHY_M_PC_POW_D_ENA;
699 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200700
701 /* set page register back to 0 */
702 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700703 }
704
705 /* set IEEE compatible Power Down Mode (dev. #4.99) */
706 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN);
707 }
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700708
stephen hemmingera40ccc62010-01-24 18:46:06 +0000709 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700710 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700711 reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700712 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000713 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700714}
715
Brandon Philips38000a92010-06-16 16:21:58 +0000716/* Enable Rx/Tx */
717static void sky2_enable_rx_tx(struct sky2_port *sky2)
718{
719 struct sky2_hw *hw = sky2->hw;
720 unsigned port = sky2->port;
721 u16 reg;
722
723 reg = gma_read16(hw, port, GM_GP_CTRL);
724 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
725 gma_write16(hw, port, GM_GP_CTRL, reg);
726}
727
Stephen Hemminger1b537562005-12-20 15:08:07 -0800728/* Force a renegotiation */
729static void sky2_phy_reinit(struct sky2_port *sky2)
730{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800731 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800732 sky2_phy_init(sky2->hw, sky2->port);
Brandon Philips38000a92010-06-16 16:21:58 +0000733 sky2_enable_rx_tx(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800734 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800735}
736
Stephen Hemmingere3173832007-02-06 10:45:39 -0800737/* Put device in state to listen for Wake On Lan */
738static void sky2_wol_init(struct sky2_port *sky2)
739{
740 struct sky2_hw *hw = sky2->hw;
741 unsigned port = sky2->port;
742 enum flow_control save_mode;
743 u16 ctrl;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800744
745 /* Bring hardware out of reset */
746 sky2_write16(hw, B0_CTST, CS_RST_CLR);
747 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
748
749 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
750 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
751
752 /* Force to 10/100
753 * sky2_reset will re-enable on resume
754 */
755 save_mode = sky2->flow_mode;
756 ctrl = sky2->advertising;
757
758 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
759 sky2->flow_mode = FC_NONE;
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700760
761 spin_lock_bh(&sky2->phy_lock);
762 sky2_phy_power_up(hw, port);
763 sky2_phy_init(hw, port);
764 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800765
766 sky2->flow_mode = save_mode;
767 sky2->advertising = ctrl;
768
769 /* Set GMAC to no flow control and auto update for speed/duplex */
770 gma_write16(hw, port, GM_GP_CTRL,
771 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
772 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
773
774 /* Set WOL address */
775 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
776 sky2->netdev->dev_addr, ETH_ALEN);
777
778 /* Turn on appropriate WOL control bits */
779 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
780 ctrl = 0;
781 if (sky2->wol & WAKE_PHY)
782 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
783 else
784 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
785
786 if (sky2->wol & WAKE_MAGIC)
787 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
788 else
Joe Perchesa419aef2009-08-18 11:18:35 -0700789 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800790
791 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
792 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
793
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000794 /* Disable PiG firmware */
795 sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF);
796
Stephen Hemmingere3173832007-02-06 10:45:39 -0800797 /* block receiver */
798 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800799}
800
Stephen Hemminger69161612007-06-04 17:23:26 -0700801static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
802{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700803 struct net_device *dev = hw->dev[port];
804
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800805 if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
806 hw->chip_rev != CHIP_REV_YU_EX_A0) ||
Stephen Hemminger877c8572009-10-29 06:37:08 +0000807 hw->chip_id >= CHIP_ID_YUKON_FE_P) {
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800808 /* Yukon-Extreme B0 and further Extreme devices */
stephen hemminger44dde562010-02-12 06:58:01 +0000809 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
810 } else if (dev->mtu > ETH_DATA_LEN) {
811 /* set Tx GMAC FIFO Almost Empty Threshold */
812 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
813 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger69161612007-06-04 17:23:26 -0700814
stephen hemminger44dde562010-02-12 06:58:01 +0000815 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
816 } else
817 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700818}
819
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700820static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
821{
822 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
823 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100824 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700825 int i;
826 const u8 *addr = hw->dev[port]->dev_addr;
827
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700828 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
829 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700830
831 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
832
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000833 if (hw->chip_id == CHIP_ID_YUKON_XL &&
834 hw->chip_rev == CHIP_REV_YU_XL_A0 &&
835 port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700836 /* WA DEV_472 -- looks like crossed wires on port 2 */
837 /* clear GMAC 1 Control reset */
838 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
839 do {
840 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
841 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
842 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
843 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
844 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
845 }
846
Stephen Hemminger793b8832005-09-14 16:06:14 -0700847 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700848
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700849 /* Enable Transmit FIFO Underrun */
850 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
851
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800852 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700853 sky2_phy_power_up(hw, port);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700854 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800855 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700856
857 /* MIB clear */
858 reg = gma_read16(hw, port, GM_PHY_ADDR);
859 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
860
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700861 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
862 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700863 gma_write16(hw, port, GM_PHY_ADDR, reg);
864
865 /* transmit control */
866 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
867
868 /* receive control reg: unicast + multicast + no FCS */
869 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700870 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700871
872 /* transmit flow control */
873 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
874
875 /* transmit parameter */
876 gma_write16(hw, port, GM_TX_PARAM,
877 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
878 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
879 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
880 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
881
882 /* serial mode register */
883 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700884 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700885
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700886 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700887 reg |= GM_SMOD_JUMBO_ENA;
888
stephen hemmingerc1cd0a82010-03-29 07:36:18 +0000889 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
890 hw->chip_rev == CHIP_REV_YU_EC_U_B1)
891 reg |= GM_NEW_FLOW_CTRL;
892
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700893 gma_write16(hw, port, GM_SERIAL_MODE, reg);
894
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700895 /* virtual address for data */
896 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
897
Stephen Hemminger793b8832005-09-14 16:06:14 -0700898 /* physical address: used for pause frames */
899 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
900
901 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700902 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
903 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
904 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
905
906 /* Configure Rx MAC FIFO */
907 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100908 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700909 if (hw->chip_id == CHIP_ID_YUKON_EX ||
910 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100911 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700912
Al Viro25cccec2007-07-20 16:07:33 +0100913 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700914
Stephen Hemminger798fdd02007-12-07 15:22:15 -0800915 if (hw->chip_id == CHIP_ID_YUKON_XL) {
916 /* Hardware errata - clear flush mask */
917 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
918 } else {
919 /* Flush Rx MAC FIFO on any flow control or error */
920 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
921 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700922
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800923 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700924 reg = RX_GMF_FL_THR_DEF + 1;
925 /* Another magic mystery workaround from sk98lin */
926 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
927 hw->chip_rev == CHIP_REV_YU_FE2_A0)
928 reg = 0x178;
929 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700930
931 /* Configure Tx MAC FIFO */
932 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
933 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800934
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300935 /* On chips without ram buffer, pause is controlled by MAC level */
Stephen Hemminger39dbd952008-02-04 19:45:13 -0800936 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +0000937 /* Pause threshold is scaled by 8 in bytes */
Joe Perches8e95a202009-12-03 07:58:21 +0000938 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
939 hw->chip_rev == CHIP_REV_YU_FE2_A0)
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +0000940 reg = 1568 / 8;
941 else
942 reg = 1024 / 8;
943 sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg);
944 sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -0700945
Stephen Hemminger69161612007-06-04 17:23:26 -0700946 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800947 }
948
Stephen Hemmingere970d1f2007-11-27 11:02:07 -0800949 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
950 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
951 /* disable dynamic watermark */
952 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
953 reg &= ~TX_DYN_WM_ENA;
954 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
955 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700956}
957
Stephen Hemminger67712902006-12-04 15:53:45 -0800958/* Assign Ram Buffer allocation to queue */
959static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700960{
Stephen Hemminger67712902006-12-04 15:53:45 -0800961 u32 end;
962
963 /* convert from K bytes to qwords used for hw register */
964 start *= 1024/8;
965 space *= 1024/8;
966 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700967
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700968 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
969 sky2_write32(hw, RB_ADDR(q, RB_START), start);
970 sky2_write32(hw, RB_ADDR(q, RB_END), end);
971 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
972 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
973
974 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800975 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700976
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800977 /* On receive queue's set the thresholds
978 * give receiver priority when > 3/4 full
979 * send pause when down to 2K
980 */
981 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
982 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700983
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800984 tp = space - 2048/8;
985 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
986 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700987 } else {
988 /* Enable store & forward on Tx queue's because
989 * Tx FIFO is only 1K on Yukon
990 */
991 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
992 }
993
994 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700995 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700996}
997
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700998/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800999static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001000{
1001 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
1002 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
1003 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001004 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001005}
1006
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001007/* Setup prefetch unit registers. This is the interface between
1008 * hardware and driver list elements
1009 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001010static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001011 dma_addr_t addr, u32 last)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001012{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001013 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
1014 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001015 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), upper_32_bits(addr));
1016 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), lower_32_bits(addr));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001017 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
1018 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001019
1020 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001021}
1022
Mike McCormack9b289c32009-08-14 05:15:12 +00001023static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001024{
Mike McCormack9b289c32009-08-14 05:15:12 +00001025 struct sky2_tx_le *le = sky2->tx_le + *slot;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001026
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001027 *slot = RING_NEXT(*slot, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001028 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001029 return le;
1030}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001031
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001032static void tx_init(struct sky2_port *sky2)
1033{
1034 struct sky2_tx_le *le;
1035
1036 sky2->tx_prod = sky2->tx_cons = 0;
1037 sky2->tx_tcpsum = 0;
1038 sky2->tx_last_mss = 0;
1039
Mike McCormack9b289c32009-08-14 05:15:12 +00001040 le = get_tx_le(sky2, &sky2->tx_prod);
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001041 le->addr = 0;
1042 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001043 sky2->tx_last_upper = 0;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001044}
1045
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001046/* Update chip's next pointer */
1047static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001048{
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001049 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -08001050 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001051 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
1052
1053 /* Synchronize I/O on since next processor may write to tail */
1054 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001055}
1056
Stephen Hemminger793b8832005-09-14 16:06:14 -07001057
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001058static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
1059{
1060 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001061 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001062 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001063 return le;
1064}
1065
Mike McCormack060b9462010-07-29 03:34:52 +00001066static unsigned sky2_get_rx_threshold(struct sky2_port *sky2)
Mike McCormack39ef1102010-02-12 06:58:02 +00001067{
1068 unsigned size;
1069
1070 /* Space needed for frame data + headers rounded up */
1071 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1072
1073 /* Stopping point for hardware truncation */
1074 return (size - 8) / sizeof(u32);
1075}
1076
Mike McCormack060b9462010-07-29 03:34:52 +00001077static unsigned sky2_get_rx_data_size(struct sky2_port *sky2)
Mike McCormack39ef1102010-02-12 06:58:02 +00001078{
1079 struct rx_ring_info *re;
1080 unsigned size;
1081
1082 /* Space needed for frame data + headers rounded up */
1083 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1084
1085 sky2->rx_nfrags = size >> PAGE_SHIFT;
1086 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1087
1088 /* Compute residue after pages */
1089 size -= sky2->rx_nfrags << PAGE_SHIFT;
1090
1091 /* Optimize to handle small packets and headers */
1092 if (size < copybreak)
1093 size = copybreak;
1094 if (size < ETH_HLEN)
1095 size = ETH_HLEN;
1096
1097 return size;
1098}
1099
Stephen Hemminger14d02632006-09-26 11:57:43 -07001100/* Build description to hardware for one receive segment */
Mike McCormack060b9462010-07-29 03:34:52 +00001101static void sky2_rx_add(struct sky2_port *sky2, u8 op,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001102 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001103{
1104 struct sky2_rx_le *le;
1105
Stephen Hemminger86c68872008-01-10 16:14:12 -08001106 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001107 le = sky2_next_rx(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001108 le->addr = cpu_to_le32(upper_32_bits(map));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001109 le->opcode = OP_ADDR64 | HW_OWNER;
1110 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001111
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001112 le = sky2_next_rx(sky2);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001113 le->addr = cpu_to_le32(lower_32_bits(map));
Stephen Hemminger734d1862005-12-09 11:35:00 -08001114 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001115 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001116}
1117
Stephen Hemminger14d02632006-09-26 11:57:43 -07001118/* Build description to hardware for one possibly fragmented skb */
1119static void sky2_rx_submit(struct sky2_port *sky2,
1120 const struct rx_ring_info *re)
1121{
1122 int i;
1123
1124 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
1125
1126 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
1127 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
1128}
1129
1130
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001131static int sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001132 unsigned size)
1133{
1134 struct sk_buff *skb = re->skb;
1135 int i;
1136
1137 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001138 if (pci_dma_mapping_error(pdev, re->data_addr))
1139 goto mapping_error;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001140
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001141 dma_unmap_len_set(re, data_size, size);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001142
stephen hemminger3fbd9182010-02-01 13:45:41 +00001143 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1144 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1145
1146 re->frag_addr[i] = pci_map_page(pdev, frag->page,
1147 frag->page_offset,
1148 frag->size,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001149 PCI_DMA_FROMDEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001150
1151 if (pci_dma_mapping_error(pdev, re->frag_addr[i]))
1152 goto map_page_error;
1153 }
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001154 return 0;
stephen hemminger3fbd9182010-02-01 13:45:41 +00001155
1156map_page_error:
1157 while (--i >= 0) {
1158 pci_unmap_page(pdev, re->frag_addr[i],
1159 skb_shinfo(skb)->frags[i].size,
1160 PCI_DMA_FROMDEVICE);
1161 }
1162
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001163 pci_unmap_single(pdev, re->data_addr, dma_unmap_len(re, data_size),
stephen hemminger3fbd9182010-02-01 13:45:41 +00001164 PCI_DMA_FROMDEVICE);
1165
1166mapping_error:
1167 if (net_ratelimit())
1168 dev_warn(&pdev->dev, "%s: rx mapping error\n",
1169 skb->dev->name);
1170 return -EIO;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001171}
1172
1173static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1174{
1175 struct sk_buff *skb = re->skb;
1176 int i;
1177
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001178 pci_unmap_single(pdev, re->data_addr, dma_unmap_len(re, data_size),
Stephen Hemminger14d02632006-09-26 11:57:43 -07001179 PCI_DMA_FROMDEVICE);
1180
1181 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1182 pci_unmap_page(pdev, re->frag_addr[i],
1183 skb_shinfo(skb)->frags[i].size,
1184 PCI_DMA_FROMDEVICE);
1185}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001186
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001187/* Tell chip where to start receive checksum.
1188 * Actually has two checksums, but set both same to avoid possible byte
1189 * order problems.
1190 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001191static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001192{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001193 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001194
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001195 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1196 le->ctrl = 0;
1197 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001198
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001199 sky2_write32(sky2->hw,
1200 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
Michał Mirosławf5d64032011-04-10 03:13:21 +00001201 (sky2->netdev->features & NETIF_F_RXCSUM)
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07001202 ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001203}
1204
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001205/* Enable/disable receive hash calculation (RSS) */
Michał Mirosławf5d64032011-04-10 03:13:21 +00001206static void rx_set_rss(struct net_device *dev, u32 features)
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001207{
1208 struct sky2_port *sky2 = netdev_priv(dev);
1209 struct sky2_hw *hw = sky2->hw;
1210 int i, nkeys = 4;
1211
1212 /* Supports IPv6 and other modes */
1213 if (hw->flags & SKY2_HW_NEW_LE) {
1214 nkeys = 10;
1215 sky2_write32(hw, SK_REG(sky2->port, RSS_CFG), HASH_ALL);
1216 }
1217
1218 /* Program RSS initial values */
Michał Mirosławf5d64032011-04-10 03:13:21 +00001219 if (features & NETIF_F_RXHASH) {
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001220 u32 key[nkeys];
1221
1222 get_random_bytes(key, nkeys * sizeof(u32));
1223 for (i = 0; i < nkeys; i++)
1224 sky2_write32(hw, SK_REG(sky2->port, RSS_KEY + i * 4),
1225 key[i]);
1226
1227 /* Need to turn on (undocumented) flag to make hashing work */
1228 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T),
1229 RX_STFW_ENA);
1230
1231 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1232 BMU_ENA_RX_RSS_HASH);
1233 } else
1234 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1235 BMU_DIS_RX_RSS_HASH);
1236}
1237
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001238/*
1239 * The RX Stop command will not work for Yukon-2 if the BMU does not
1240 * reach the end of packet and since we can't make sure that we have
1241 * incoming data, we must reset the BMU while it is not doing a DMA
1242 * transfer. Since it is possible that the RX path is still active,
1243 * the RX RAM buffer will be stopped first, so any possible incoming
1244 * data will not trigger a DMA. After the RAM buffer is stopped, the
1245 * BMU is polled until any DMA in progress is ended and only then it
1246 * will be reset.
1247 */
1248static void sky2_rx_stop(struct sky2_port *sky2)
1249{
1250 struct sky2_hw *hw = sky2->hw;
1251 unsigned rxq = rxqaddr[sky2->port];
1252 int i;
1253
1254 /* disable the RAM Buffer receive queue */
1255 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1256
1257 for (i = 0; i < 0xffff; i++)
1258 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1259 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1260 goto stopped;
1261
Joe Perchesada1db52010-02-17 15:01:59 +00001262 netdev_warn(sky2->netdev, "receiver stop failed\n");
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001263stopped:
1264 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1265
1266 /* reset the Rx prefetch unit */
1267 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger3d1454dd2009-07-16 13:20:57 +00001268 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001269}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001270
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001271/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001272static void sky2_rx_clean(struct sky2_port *sky2)
1273{
1274 unsigned i;
1275
1276 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001277 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001278 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001279
1280 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001281 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001282 kfree_skb(re->skb);
1283 re->skb = NULL;
1284 }
1285 }
1286}
1287
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001288/* Basic MII support */
1289static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1290{
1291 struct mii_ioctl_data *data = if_mii(ifr);
1292 struct sky2_port *sky2 = netdev_priv(dev);
1293 struct sky2_hw *hw = sky2->hw;
1294 int err = -EOPNOTSUPP;
1295
1296 if (!netif_running(dev))
1297 return -ENODEV; /* Phy still in reset */
1298
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001299 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001300 case SIOCGMIIPHY:
1301 data->phy_id = PHY_ADDR_MARV;
1302
1303 /* fallthru */
1304 case SIOCGMIIREG: {
1305 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001306
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001307 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001308 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001309 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001310
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001311 data->val_out = val;
1312 break;
1313 }
1314
1315 case SIOCSMIIREG:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001316 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001317 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1318 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001319 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001320 break;
1321 }
1322 return err;
1323}
1324
Michał Mirosławf5d64032011-04-10 03:13:21 +00001325#define SKY2_VLAN_OFFLOADS (NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO)
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001326
Michał Mirosławf5d64032011-04-10 03:13:21 +00001327static void sky2_vlan_mode(struct net_device *dev, u32 features)
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001328{
1329 struct sky2_port *sky2 = netdev_priv(dev);
1330 struct sky2_hw *hw = sky2->hw;
1331 u16 port = sky2->port;
1332
Michał Mirosławf5d64032011-04-10 03:13:21 +00001333 if (features & NETIF_F_HW_VLAN_RX)
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001334 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1335 RX_VLAN_STRIP_ON);
1336 else
1337 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1338 RX_VLAN_STRIP_OFF);
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001339
Michał Mirosławf5d64032011-04-10 03:13:21 +00001340 if (features & NETIF_F_HW_VLAN_TX) {
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001341 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1342 TX_VLAN_TAG_ON);
Michał Mirosławf5d64032011-04-10 03:13:21 +00001343
1344 dev->vlan_features |= SKY2_VLAN_OFFLOADS;
1345 } else {
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001346 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1347 TX_VLAN_TAG_OFF);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001348
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001349 /* Can't do transmit offload of vlan without hw vlan */
Michał Mirosławf5d64032011-04-10 03:13:21 +00001350 dev->vlan_features &= ~SKY2_VLAN_OFFLOADS;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001351 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001352}
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001353
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001354/* Amount of required worst case padding in rx buffer */
1355static inline unsigned sky2_rx_pad(const struct sky2_hw *hw)
1356{
1357 return (hw->flags & SKY2_HW_RAM_BUFFER) ? 8 : 2;
1358}
1359
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001360/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001361 * Allocate an skb for receiving. If the MTU is large enough
1362 * make the skb non-linear with a fragment list of pages.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001363 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001364static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001365{
1366 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001367 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001368
Stephen Hemminger724b6942009-08-18 15:17:10 +00001369 skb = netdev_alloc_skb(sky2->netdev,
1370 sky2->rx_data_size + sky2_rx_pad(sky2->hw));
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001371 if (!skb)
1372 goto nomem;
1373
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001374 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001375 unsigned char *start;
1376 /*
1377 * Workaround for a bug in FIFO that cause hang
1378 * if the FIFO if the receive buffer is not 64 byte aligned.
1379 * The buffer returned from netdev_alloc_skb is
1380 * aligned except if slab debugging is enabled.
1381 */
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001382 start = PTR_ALIGN(skb->data, 8);
1383 skb_reserve(skb, start - skb->data);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001384 } else
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001385 skb_reserve(skb, NET_IP_ALIGN);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001386
1387 for (i = 0; i < sky2->rx_nfrags; i++) {
1388 struct page *page = alloc_page(GFP_ATOMIC);
1389
1390 if (!page)
1391 goto free_partial;
1392 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001393 }
1394
1395 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001396free_partial:
1397 kfree_skb(skb);
1398nomem:
1399 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001400}
1401
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001402static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1403{
1404 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1405}
1406
Mike McCormack200ac492010-02-12 06:58:03 +00001407static int sky2_alloc_rx_skbs(struct sky2_port *sky2)
1408{
1409 struct sky2_hw *hw = sky2->hw;
1410 unsigned i;
1411
1412 sky2->rx_data_size = sky2_get_rx_data_size(sky2);
1413
1414 /* Fill Rx ring */
1415 for (i = 0; i < sky2->rx_pending; i++) {
1416 struct rx_ring_info *re = sky2->rx_ring + i;
1417
1418 re->skb = sky2_rx_alloc(sky2);
1419 if (!re->skb)
1420 return -ENOMEM;
1421
1422 if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) {
1423 dev_kfree_skb(re->skb);
1424 re->skb = NULL;
1425 return -ENOMEM;
1426 }
1427 }
1428 return 0;
1429}
1430
Stephen Hemminger82788c72006-01-17 13:43:10 -08001431/*
Mike McCormack200ac492010-02-12 06:58:03 +00001432 * Setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001433 * Normal case this ends up creating one list element for skb
1434 * in the receive ring. Worst case if using large MTU and each
1435 * allocation falls on a different 64 bit region, that results
1436 * in 6 list elements per ring entry.
1437 * One element is used for checksum enable/disable, and one
1438 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001439 */
Mike McCormack200ac492010-02-12 06:58:03 +00001440static void sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001441{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001442 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001443 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001444 unsigned rxq = rxqaddr[sky2->port];
Mike McCormack39ef1102010-02-12 06:58:02 +00001445 unsigned i, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001446
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001447 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001448 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001449
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001450 /* On PCI express lowering the watermark gives better performance */
1451 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1452 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1453
1454 /* These chips have no ram buffer?
1455 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001456 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
stephen hemmingerc1cd0a82010-03-29 07:36:18 +00001457 hw->chip_rev > CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001458 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001459
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001460 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1461
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001462 if (!(hw->flags & SKY2_HW_NEW_LE))
1463 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001464
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001465 if (!(hw->flags & SKY2_HW_RSS_BROKEN))
Michał Mirosławf5d64032011-04-10 03:13:21 +00001466 rx_set_rss(sky2->netdev, sky2->netdev->features);
Stephen Hemmingerbf731302010-04-24 20:04:12 -07001467
Mike McCormack200ac492010-02-12 06:58:03 +00001468 /* submit Rx ring */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001469 for (i = 0; i < sky2->rx_pending; i++) {
1470 re = sky2->rx_ring + i;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001471 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001472 }
1473
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001474 /*
1475 * The receiver hangs if it receives frames larger than the
1476 * packet buffer. As a workaround, truncate oversize frames, but
1477 * the register is limited to 9 bits, so if you do frames > 2052
1478 * you better get the MTU right!
1479 */
Mike McCormack39ef1102010-02-12 06:58:02 +00001480 thresh = sky2_get_rx_threshold(sky2);
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001481 if (thresh > 0x1ff)
1482 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1483 else {
1484 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1485 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1486 }
1487
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001488 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001489 sky2_rx_update(sky2, rxq);
Stephen Hemminger877c8572009-10-29 06:37:08 +00001490
1491 if (hw->chip_id == CHIP_ID_YUKON_EX ||
1492 hw->chip_id == CHIP_ID_YUKON_SUPR) {
1493 /*
1494 * Disable flushing of non ASF packets;
1495 * must be done after initializing the BMUs;
1496 * drivers without ASF support should do this too, otherwise
1497 * it may happen that they cannot run on ASF devices;
1498 * remember that the MAC FIFO isn't reset during initialization.
1499 */
1500 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF);
1501 }
1502
1503 if (hw->chip_id >= CHIP_ID_YUKON_SUPR) {
1504 /* Enable RX Home Address & Routing Header checksum fix */
1505 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL),
1506 RX_IPV6_SA_MOB_ENA | RX_IPV6_DA_MOB_ENA);
1507
1508 /* Enable TX Home Address & Routing Header checksum fix */
1509 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST),
1510 TBMU_TEST_HOME_ADD_FIX_EN | TBMU_TEST_ROUTING_ADD_FIX_EN);
1511 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001512}
1513
Mike McCormack90bbebb2009-09-01 03:21:35 +00001514static int sky2_alloc_buffers(struct sky2_port *sky2)
1515{
1516 struct sky2_hw *hw = sky2->hw;
1517
1518 /* must be power of 2 */
1519 sky2->tx_le = pci_alloc_consistent(hw->pdev,
1520 sky2->tx_ring_size *
1521 sizeof(struct sky2_tx_le),
1522 &sky2->tx_le_map);
1523 if (!sky2->tx_le)
1524 goto nomem;
1525
1526 sky2->tx_ring = kcalloc(sky2->tx_ring_size, sizeof(struct tx_ring_info),
1527 GFP_KERNEL);
1528 if (!sky2->tx_ring)
1529 goto nomem;
1530
1531 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1532 &sky2->rx_le_map);
1533 if (!sky2->rx_le)
1534 goto nomem;
1535 memset(sky2->rx_le, 0, RX_LE_BYTES);
1536
1537 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
1538 GFP_KERNEL);
1539 if (!sky2->rx_ring)
1540 goto nomem;
1541
Mike McCormack200ac492010-02-12 06:58:03 +00001542 return sky2_alloc_rx_skbs(sky2);
Mike McCormack90bbebb2009-09-01 03:21:35 +00001543nomem:
1544 return -ENOMEM;
1545}
1546
1547static void sky2_free_buffers(struct sky2_port *sky2)
1548{
1549 struct sky2_hw *hw = sky2->hw;
1550
Mike McCormack200ac492010-02-12 06:58:03 +00001551 sky2_rx_clean(sky2);
1552
Mike McCormack90bbebb2009-09-01 03:21:35 +00001553 if (sky2->rx_le) {
1554 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1555 sky2->rx_le, sky2->rx_le_map);
1556 sky2->rx_le = NULL;
1557 }
1558 if (sky2->tx_le) {
1559 pci_free_consistent(hw->pdev,
1560 sky2->tx_ring_size * sizeof(struct sky2_tx_le),
1561 sky2->tx_le, sky2->tx_le_map);
1562 sky2->tx_le = NULL;
1563 }
1564 kfree(sky2->tx_ring);
1565 kfree(sky2->rx_ring);
1566
1567 sky2->tx_ring = NULL;
1568 sky2->rx_ring = NULL;
1569}
1570
Mike McCormackea0f71e2010-02-12 06:58:04 +00001571static void sky2_hw_up(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001572{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001573 struct sky2_hw *hw = sky2->hw;
1574 unsigned port = sky2->port;
Mike McCormackea0f71e2010-02-12 06:58:04 +00001575 u32 ramsize;
1576 int cap;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001577 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001578
Mike McCormackea0f71e2010-02-12 06:58:04 +00001579 tx_init(sky2);
1580
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001581 /*
1582 * On dual port PCI-X card, there is an problem where status
1583 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001584 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001585 if (otherdev && netif_running(otherdev) &&
1586 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001587 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001588
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001589 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001590 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001591 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001592 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001593
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001594 sky2_mac_init(hw, port);
1595
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001596 /* Register is number of 4K blocks on internal RAM buffer. */
1597 ramsize = sky2_read8(hw, B2_E_0) * 4;
1598 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001599 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001600
Joe Perchesada1db52010-02-17 15:01:59 +00001601 netdev_dbg(sky2->netdev, "ram buffer %dK\n", ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001602 if (ramsize < 16)
1603 rxspace = ramsize / 2;
1604 else
1605 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001606
Stephen Hemminger67712902006-12-04 15:53:45 -08001607 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1608 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1609
1610 /* Make sure SyncQ is disabled */
1611 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1612 RB_RST_SET);
1613 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001614
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001615 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001616
Stephen Hemminger69161612007-06-04 17:23:26 -07001617 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1618 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1619 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1620
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001621 /* Set almost empty threshold */
Joe Perches8e95a202009-12-03 07:58:21 +00001622 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
1623 hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001624 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001625
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001626 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001627 sky2->tx_ring_size - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001628
Michał Mirosławf5d64032011-04-10 03:13:21 +00001629 sky2_vlan_mode(sky2->netdev, sky2->netdev->features);
1630 netdev_update_features(sky2->netdev);
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001631
Mike McCormack200ac492010-02-12 06:58:03 +00001632 sky2_rx_start(sky2);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001633}
1634
1635/* Bring up network interface. */
1636static int sky2_up(struct net_device *dev)
1637{
1638 struct sky2_port *sky2 = netdev_priv(dev);
1639 struct sky2_hw *hw = sky2->hw;
1640 unsigned port = sky2->port;
1641 u32 imask;
1642 int err;
1643
1644 netif_carrier_off(dev);
1645
1646 err = sky2_alloc_buffers(sky2);
1647 if (err)
1648 goto err_out;
1649
1650 sky2_hw_up(sky2);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001651
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001652 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001653 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001654 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001655 sky2_write32(hw, B0_IMSK, imask);
Stephen Hemminger1fd82f32009-06-17 07:30:34 +00001656 sky2_read32(hw, B0_IMSK);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001657
Joe Perches6c35aba2010-02-15 08:34:21 +00001658 netif_info(sky2, ifup, dev, "enabling interface\n");
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07001659
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001660 return 0;
1661
1662err_out:
Mike McCormack90bbebb2009-09-01 03:21:35 +00001663 sky2_free_buffers(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001664 return err;
1665}
1666
Stephen Hemminger793b8832005-09-14 16:06:14 -07001667/* Modular subtraction in ring */
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001668static inline int tx_inuse(const struct sky2_port *sky2)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001669{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001670 return (sky2->tx_prod - sky2->tx_cons) & (sky2->tx_ring_size - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001671}
1672
1673/* Number of list elements available for next tx */
1674static inline int tx_avail(const struct sky2_port *sky2)
1675{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001676 return sky2->tx_pending - tx_inuse(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001677}
1678
1679/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001680static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001681{
1682 unsigned count;
1683
Stephen Hemminger07e31632009-09-14 06:12:55 +00001684 count = (skb_shinfo(skb)->nr_frags + 1)
1685 * (sizeof(dma_addr_t) / sizeof(u32));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001686
Herbert Xu89114af2006-07-08 13:34:32 -07001687 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001688 ++count;
Stephen Hemminger07e31632009-09-14 06:12:55 +00001689 else if (sizeof(dma_addr_t) == sizeof(u32))
1690 ++count; /* possible vlan */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001691
Patrick McHardy84fa7932006-08-29 16:44:56 -07001692 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001693 ++count;
1694
1695 return count;
1696}
1697
stephen hemmingerf6815072010-02-01 13:41:47 +00001698static void sky2_tx_unmap(struct pci_dev *pdev, struct tx_ring_info *re)
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001699{
1700 if (re->flags & TX_MAP_SINGLE)
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001701 pci_unmap_single(pdev, dma_unmap_addr(re, mapaddr),
1702 dma_unmap_len(re, maplen),
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001703 PCI_DMA_TODEVICE);
1704 else if (re->flags & TX_MAP_PAGE)
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001705 pci_unmap_page(pdev, dma_unmap_addr(re, mapaddr),
1706 dma_unmap_len(re, maplen),
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001707 PCI_DMA_TODEVICE);
stephen hemmingerf6815072010-02-01 13:41:47 +00001708 re->flags = 0;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001709}
1710
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001711/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001712 * Put one packet in ring for transmit.
1713 * A single packet can generate multiple list elements, and
1714 * the number of ring elements will probably be less than the number
1715 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001716 */
Stephen Hemminger613573252009-08-31 19:50:58 +00001717static netdev_tx_t sky2_xmit_frame(struct sk_buff *skb,
1718 struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001719{
1720 struct sky2_port *sky2 = netdev_priv(dev);
1721 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001722 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001723 struct tx_ring_info *re;
Mike McCormack9b289c32009-08-14 05:15:12 +00001724 unsigned i, len;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001725 dma_addr_t mapping;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001726 u32 upper;
1727 u16 slot;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001728 u16 mss;
1729 u8 ctrl;
1730
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001731 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1732 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001733
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001734 len = skb_headlen(skb);
1735 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001736
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001737 if (pci_dma_mapping_error(hw->pdev, mapping))
1738 goto mapping_error;
1739
Mike McCormack9b289c32009-08-14 05:15:12 +00001740 slot = sky2->tx_prod;
Joe Perches6c35aba2010-02-15 08:34:21 +00001741 netif_printk(sky2, tx_queued, KERN_DEBUG, dev,
1742 "tx queued, slot %u, len %d\n", slot, skb->len);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001743
Stephen Hemminger86c68872008-01-10 16:14:12 -08001744 /* Send high bits if needed */
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001745 upper = upper_32_bits(mapping);
1746 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001747 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001748 le->addr = cpu_to_le32(upper);
1749 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001750 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001751 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001752
1753 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001754 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001755 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001756
1757 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001758 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001759
Stephen Hemminger69161612007-06-04 17:23:26 -07001760 if (mss != sky2->tx_last_mss) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001761 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001762 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001763
1764 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001765 le->opcode = OP_MSS | HW_OWNER;
1766 else
1767 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001768 sky2->tx_last_mss = mss;
1769 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001770 }
1771
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001772 ctrl = 0;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08001773
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001774 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
Jesse Grosseab6d182010-10-20 13:56:03 +00001775 if (vlan_tx_tag_present(skb)) {
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001776 if (!le) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001777 le = get_tx_le(sky2, &slot);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001778 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001779 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001780 } else
1781 le->opcode |= OP_VLAN;
1782 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1783 ctrl |= INS_VLAN;
1784 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001785
1786 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001787 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001788 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001789 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001790 ctrl |= CALSUM; /* auto checksum */
1791 else {
1792 const unsigned offset = skb_transport_offset(skb);
1793 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001794
Stephen Hemminger69161612007-06-04 17:23:26 -07001795 tcpsum = offset << 16; /* sum start */
1796 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001797
Stephen Hemminger69161612007-06-04 17:23:26 -07001798 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1799 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1800 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001801
Stephen Hemminger69161612007-06-04 17:23:26 -07001802 if (tcpsum != sky2->tx_tcpsum) {
1803 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001804
Mike McCormack9b289c32009-08-14 05:15:12 +00001805 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001806 le->addr = cpu_to_le32(tcpsum);
1807 le->length = 0; /* initial checksum value */
1808 le->ctrl = 1; /* one packet */
1809 le->opcode = OP_TCPLISW | HW_OWNER;
1810 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001811 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001812 }
1813
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001814 re = sky2->tx_ring + slot;
1815 re->flags = TX_MAP_SINGLE;
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001816 dma_unmap_addr_set(re, mapaddr, mapping);
1817 dma_unmap_len_set(re, maplen, len);
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001818
Mike McCormack9b289c32009-08-14 05:15:12 +00001819 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001820 le->addr = cpu_to_le32(lower_32_bits(mapping));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001821 le->length = cpu_to_le16(len);
1822 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001823 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001824
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001825
1826 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001827 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001828
1829 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1830 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001831
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001832 if (pci_dma_mapping_error(hw->pdev, mapping))
1833 goto mapping_unwind;
1834
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001835 upper = upper_32_bits(mapping);
1836 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001837 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001838 le->addr = cpu_to_le32(upper);
1839 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001840 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001841 }
1842
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001843 re = sky2->tx_ring + slot;
1844 re->flags = TX_MAP_PAGE;
FUJITA Tomonori7cd26ce2010-04-27 14:57:05 +00001845 dma_unmap_addr_set(re, mapaddr, mapping);
1846 dma_unmap_len_set(re, maplen, frag->size);
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001847
Mike McCormack9b289c32009-08-14 05:15:12 +00001848 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001849 le->addr = cpu_to_le32(lower_32_bits(mapping));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001850 le->length = cpu_to_le16(frag->size);
1851 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001852 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001853 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001854
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001855 re->skb = skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001856 le->ctrl |= EOP;
1857
Mike McCormack9b289c32009-08-14 05:15:12 +00001858 sky2->tx_prod = slot;
1859
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001860 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1861 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001862
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001863 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001864
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001865 return NETDEV_TX_OK;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001866
1867mapping_unwind:
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001868 for (i = sky2->tx_prod; i != slot; i = RING_NEXT(i, sky2->tx_ring_size)) {
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001869 re = sky2->tx_ring + i;
1870
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001871 sky2_tx_unmap(hw->pdev, re);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001872 }
1873
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001874mapping_error:
1875 if (net_ratelimit())
1876 dev_warn(&hw->pdev->dev, "%s: tx mapping error\n", dev->name);
1877 dev_kfree_skb(skb);
1878 return NETDEV_TX_OK;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001879}
1880
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001881/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001882 * Free ring elements from starting at tx_cons until "done"
1883 *
Stephen Hemminger481cea42009-08-14 15:33:19 -07001884 * NB:
1885 * 1. The hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001886 * buffers so make sure not to free skb to early.
Stephen Hemminger481cea42009-08-14 15:33:19 -07001887 * 2. This may run in parallel start_xmit because the it only
1888 * looks at the tail of the queue of FIFO (tx_cons), not
1889 * the head (tx_prod)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001890 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001891static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001892{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001893 struct net_device *dev = sky2->netdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001894 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001895
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001896 BUG_ON(done >= sky2->tx_ring_size);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001897
Stephen Hemminger291ea612006-09-26 11:57:41 -07001898 for (idx = sky2->tx_cons; idx != done;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001899 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001900 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001901 struct sk_buff *skb = re->skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001902
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001903 sky2_tx_unmap(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001904
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001905 if (skb) {
Joe Perches6c35aba2010-02-15 08:34:21 +00001906 netif_printk(sky2, tx_done, KERN_DEBUG, dev,
1907 "tx done %u\n", idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001908
stephen hemminger0885a302010-12-31 15:34:27 +00001909 u64_stats_update_begin(&sky2->tx_stats.syncp);
1910 ++sky2->tx_stats.packets;
1911 sky2->tx_stats.bytes += skb->len;
1912 u64_stats_update_end(&sky2->tx_stats.syncp);
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001913
stephen hemmingerf6815072010-02-01 13:41:47 +00001914 re->skb = NULL;
Stephen Hemminger724b6942009-08-18 15:17:10 +00001915 dev_kfree_skb_any(skb);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001916
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001917 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001918 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001919 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001920
Stephen Hemminger291ea612006-09-26 11:57:41 -07001921 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001922 smp_mb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001923}
1924
Mike McCormack264bb4f2009-08-14 05:15:14 +00001925static void sky2_tx_reset(struct sky2_hw *hw, unsigned port)
Mike McCormacka5109962009-08-14 05:15:13 +00001926{
Mike McCormacka5109962009-08-14 05:15:13 +00001927 /* Disable Force Sync bit and Enable Alloc bit */
1928 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1929 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1930
1931 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1932 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1933 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1934
1935 /* Reset the PCI FIFO of the async Tx queue */
1936 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1937 BMU_RST_SET | BMU_FIFO_RST);
1938
1939 /* Reset the Tx prefetch units */
1940 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1941 PREF_UNIT_RST_SET);
1942
1943 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1944 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1945}
1946
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001947static void sky2_hw_down(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001948{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001949 struct sky2_hw *hw = sky2->hw;
1950 unsigned port = sky2->port;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001951 u16 ctrl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001952
Stephen Hemmingerd104aca2009-06-17 07:30:32 +00001953 /* Force flow control off */
1954 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001955
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001956 /* Stop transmitter */
1957 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1958 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1959
1960 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001961 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001962
1963 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001964 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001965 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1966
1967 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1968
1969 /* Workaround shared GMAC reset */
Joe Perches8e95a202009-12-03 07:58:21 +00001970 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 &&
1971 port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001972 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1973
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001974 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001975
Stephen Hemminger6c835042009-06-17 07:30:35 +00001976 /* Force any delayed status interrrupt and NAPI */
1977 sky2_write32(hw, STAT_LEV_TIMER_CNT, 0);
1978 sky2_write32(hw, STAT_TX_TIMER_CNT, 0);
1979 sky2_write32(hw, STAT_ISR_TIMER_CNT, 0);
1980 sky2_read8(hw, STAT_ISR_TIMER_CTRL);
1981
Mike McCormacka947a392009-07-21 20:57:56 -07001982 sky2_rx_stop(sky2);
1983
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00001984 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -07001985 sky2_phy_power_down(hw, port);
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00001986 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001987
Mike McCormack264bb4f2009-08-14 05:15:14 +00001988 sky2_tx_reset(hw, port);
1989
Stephen Hemminger481cea42009-08-14 15:33:19 -07001990 /* Free any pending frames stuck in HW queue */
1991 sky2_tx_complete(sky2, sky2->tx_prod);
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001992}
1993
1994/* Network shutdown */
1995static int sky2_down(struct net_device *dev)
1996{
1997 struct sky2_port *sky2 = netdev_priv(dev);
Mike McCormack8a0c9222010-02-12 06:58:06 +00001998 struct sky2_hw *hw = sky2->hw;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001999
2000 /* Never really got started! */
2001 if (!sky2->tx_le)
2002 return 0;
2003
Joe Perches6c35aba2010-02-15 08:34:21 +00002004 netif_info(sky2, ifdown, dev, "disabling interface\n");
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002005
Mike McCormack8a0c9222010-02-12 06:58:06 +00002006 /* Disable port IRQ */
2007 sky2_write32(hw, B0_IMSK,
2008 sky2_read32(hw, B0_IMSK) & ~portirq_msk[sky2->port]);
2009 sky2_read32(hw, B0_IMSK);
2010
2011 synchronize_irq(hw->pdev->irq);
2012 napi_synchronize(&hw->napi);
2013
Mike McCormackf2b31cb2010-02-12 06:58:05 +00002014 sky2_hw_down(sky2);
Stephen Hemminger481cea42009-08-14 15:33:19 -07002015
Mike McCormack90bbebb2009-09-01 03:21:35 +00002016 sky2_free_buffers(sky2);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002017
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002018 return 0;
2019}
2020
2021static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
2022{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002023 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002024 return SPEED_1000;
2025
Stephen Hemminger05745c42007-09-19 15:36:45 -07002026 if (!(hw->flags & SKY2_HW_GIGABIT)) {
2027 if (aux & PHY_M_PS_SPEED_100)
2028 return SPEED_100;
2029 else
2030 return SPEED_10;
2031 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002032
2033 switch (aux & PHY_M_PS_SPEED_MSK) {
2034 case PHY_M_PS_SPEED_1000:
2035 return SPEED_1000;
2036 case PHY_M_PS_SPEED_100:
2037 return SPEED_100;
2038 default:
2039 return SPEED_10;
2040 }
2041}
2042
2043static void sky2_link_up(struct sky2_port *sky2)
2044{
2045 struct sky2_hw *hw = sky2->hw;
2046 unsigned port = sky2->port;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002047 static const char *fc_name[] = {
2048 [FC_NONE] = "none",
2049 [FC_TX] = "tx",
2050 [FC_RX] = "rx",
2051 [FC_BOTH] = "both",
2052 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002053
Brandon Philips38000a92010-06-16 16:21:58 +00002054 sky2_enable_rx_tx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002055
2056 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
2057
2058 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002059
Stephen Hemminger75e80682007-09-19 15:36:46 -07002060 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002061
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002062 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002063 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002064 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
2065
Joe Perches6c35aba2010-02-15 08:34:21 +00002066 netif_info(sky2, link, sky2->netdev,
2067 "Link is up at %d Mbps, %s duplex, flow control %s\n",
2068 sky2->speed,
2069 sky2->duplex == DUPLEX_FULL ? "full" : "half",
2070 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002071}
2072
2073static void sky2_link_down(struct sky2_port *sky2)
2074{
2075 struct sky2_hw *hw = sky2->hw;
2076 unsigned port = sky2->port;
2077 u16 reg;
2078
2079 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
2080
2081 reg = gma_read16(hw, port, GM_GP_CTRL);
2082 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
2083 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002084
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002085 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002086
Brandon Philips809aaaa2009-10-29 17:01:49 -07002087 /* Turn off link LED */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002088 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
2089
Joe Perches6c35aba2010-02-15 08:34:21 +00002090 netif_info(sky2, link, sky2->netdev, "Link is down\n");
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002091
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002092 sky2_phy_init(hw, port);
2093}
2094
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002095static enum flow_control sky2_flow(int rx, int tx)
2096{
2097 if (rx)
2098 return tx ? FC_BOTH : FC_RX;
2099 else
2100 return tx ? FC_TX : FC_NONE;
2101}
2102
Stephen Hemminger793b8832005-09-14 16:06:14 -07002103static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
2104{
2105 struct sky2_hw *hw = sky2->hw;
2106 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002107 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002108
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002109 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002110 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002111 if (lpa & PHY_M_AN_RF) {
Joe Perchesada1db52010-02-17 15:01:59 +00002112 netdev_err(sky2->netdev, "remote fault\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002113 return -1;
2114 }
2115
Stephen Hemminger793b8832005-09-14 16:06:14 -07002116 if (!(aux & PHY_M_PS_SPDUP_RES)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002117 netdev_err(sky2->netdev, "speed/duplex mismatch\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002118 return -1;
2119 }
2120
Stephen Hemminger793b8832005-09-14 16:06:14 -07002121 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07002122 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002123
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002124 /* Since the pause result bits seem to in different positions on
2125 * different chips. look at registers.
2126 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002127 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002128 /* Shift for bits in fiber PHY */
2129 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
2130 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002131
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002132 if (advert & ADVERTISE_1000XPAUSE)
2133 advert |= ADVERTISE_PAUSE_CAP;
2134 if (advert & ADVERTISE_1000XPSE_ASYM)
2135 advert |= ADVERTISE_PAUSE_ASYM;
2136 if (lpa & LPA_1000XPAUSE)
2137 lpa |= LPA_PAUSE_CAP;
2138 if (lpa & LPA_1000XPAUSE_ASYM)
2139 lpa |= LPA_PAUSE_ASYM;
2140 }
2141
2142 sky2->flow_status = FC_NONE;
2143 if (advert & ADVERTISE_PAUSE_CAP) {
2144 if (lpa & LPA_PAUSE_CAP)
2145 sky2->flow_status = FC_BOTH;
2146 else if (advert & ADVERTISE_PAUSE_ASYM)
2147 sky2->flow_status = FC_RX;
2148 } else if (advert & ADVERTISE_PAUSE_ASYM) {
2149 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
2150 sky2->flow_status = FC_TX;
2151 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002152
Joe Perches8e95a202009-12-03 07:58:21 +00002153 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 &&
2154 !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002155 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002156
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002157 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002158 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
2159 else
2160 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
2161
2162 return 0;
2163}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002164
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002165/* Interrupt from PHY */
2166static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002167{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002168 struct net_device *dev = hw->dev[port];
2169 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002170 u16 istatus, phystat;
2171
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07002172 if (!netif_running(dev))
2173 return;
2174
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002175 spin_lock(&sky2->phy_lock);
2176 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
2177 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
2178
Joe Perches6c35aba2010-02-15 08:34:21 +00002179 netif_info(sky2, intr, sky2->netdev, "phy interrupt status 0x%x 0x%x\n",
2180 istatus, phystat);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002181
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07002182 if (istatus & PHY_M_IS_AN_COMPL) {
stephen hemminger9badba22010-03-29 07:36:20 +00002183 if (sky2_autoneg_done(sky2, phystat) == 0 &&
2184 !netif_carrier_ok(dev))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002185 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002186 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002187 }
2188
Stephen Hemminger793b8832005-09-14 16:06:14 -07002189 if (istatus & PHY_M_IS_LSP_CHANGE)
2190 sky2->speed = sky2_phy_speed(hw, phystat);
2191
2192 if (istatus & PHY_M_IS_DUP_CHANGE)
2193 sky2->duplex =
2194 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
2195
2196 if (istatus & PHY_M_IS_LST_CHANGE) {
2197 if (phystat & PHY_M_PS_LINK_UP)
2198 sky2_link_up(sky2);
2199 else
2200 sky2_link_down(sky2);
2201 }
2202out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002203 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002204}
2205
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002206/* Special quick link interrupt (Yukon-2 Optima only) */
2207static void sky2_qlink_intr(struct sky2_hw *hw)
2208{
2209 struct sky2_port *sky2 = netdev_priv(hw->dev[0]);
2210 u32 imask;
2211 u16 phy;
2212
2213 /* disable irq */
2214 imask = sky2_read32(hw, B0_IMSK);
2215 imask &= ~Y2_IS_PHY_QLNK;
2216 sky2_write32(hw, B0_IMSK, imask);
2217
2218 /* reset PHY Link Detect */
2219 phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002220 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002221 sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002222 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002223
2224 sky2_link_up(sky2);
2225}
2226
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002227/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08002228 * and tx queue is full (stopped).
2229 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002230static void sky2_tx_timeout(struct net_device *dev)
2231{
2232 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002233 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002234
Joe Perches6c35aba2010-02-15 08:34:21 +00002235 netif_err(sky2, timer, dev, "tx timeout\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002236
Joe Perchesada1db52010-02-17 15:01:59 +00002237 netdev_printk(KERN_DEBUG, dev, "transmit ring %u .. %u report=%u done=%u\n",
2238 sky2->tx_cons, sky2->tx_prod,
2239 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
2240 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002241
Stephen Hemminger81906792007-02-15 16:40:33 -08002242 /* can't restart safely under softirq */
2243 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002244}
2245
2246static int sky2_change_mtu(struct net_device *dev, int new_mtu)
2247{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002248 struct sky2_port *sky2 = netdev_priv(dev);
2249 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002250 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002251 int err;
2252 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002253 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002254
stephen hemminger44dde562010-02-12 06:58:01 +00002255 /* MTU size outside the spec */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002256 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2257 return -EINVAL;
2258
stephen hemminger44dde562010-02-12 06:58:01 +00002259 /* MTU > 1500 on yukon FE and FE+ not allowed */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002260 if (new_mtu > ETH_DATA_LEN &&
2261 (hw->chip_id == CHIP_ID_YUKON_FE ||
2262 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002263 return -EINVAL;
2264
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002265 if (!netif_running(dev)) {
2266 dev->mtu = new_mtu;
Michał Mirosławf5d64032011-04-10 03:13:21 +00002267 netdev_update_features(dev);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002268 return 0;
2269 }
2270
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002271 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002272 sky2_write32(hw, B0_IMSK, 0);
2273
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002274 dev->trans_start = jiffies; /* prevent tx timeout */
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002275 napi_disable(&hw->napi);
Mike McCormackdf010932010-05-13 06:12:49 +00002276 netif_tx_disable(dev);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002277
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002278 synchronize_irq(hw->pdev->irq);
2279
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002280 if (!(hw->flags & SKY2_HW_RAM_BUFFER))
Stephen Hemminger69161612007-06-04 17:23:26 -07002281 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002282
2283 ctl = gma_read16(hw, port, GM_GP_CTRL);
2284 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002285 sky2_rx_stop(sky2);
2286 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002287
2288 dev->mtu = new_mtu;
Michał Mirosławf5d64032011-04-10 03:13:21 +00002289 netdev_update_features(dev);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002290
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002291 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2292 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002293
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002294 if (dev->mtu > ETH_DATA_LEN)
2295 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002296
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002297 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002298
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002299 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002300
Mike McCormack200ac492010-02-12 06:58:03 +00002301 err = sky2_alloc_rx_skbs(sky2);
2302 if (!err)
2303 sky2_rx_start(sky2);
2304 else
2305 sky2_rx_clean(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002306 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002307
David S. Millerd1d08d12008-01-07 20:53:33 -08002308 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002309 napi_enable(&hw->napi);
2310
Stephen Hemminger1b537562005-12-20 15:08:07 -08002311 if (err)
2312 dev_close(dev);
2313 else {
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002314 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002315
Stephen Hemminger1b537562005-12-20 15:08:07 -08002316 netif_wake_queue(dev);
2317 }
2318
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002319 return err;
2320}
2321
Stephen Hemminger14d02632006-09-26 11:57:43 -07002322/* For small just reuse existing skb for next receive */
2323static struct sk_buff *receive_copy(struct sky2_port *sky2,
2324 const struct rx_ring_info *re,
2325 unsigned length)
2326{
2327 struct sk_buff *skb;
2328
Eric Dumazet89d71a62009-10-13 05:34:20 +00002329 skb = netdev_alloc_skb_ip_align(sky2->netdev, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002330 if (likely(skb)) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07002331 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2332 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002333 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002334 skb->ip_summed = re->skb->ip_summed;
2335 skb->csum = re->skb->csum;
2336 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2337 length, PCI_DMA_FROMDEVICE);
2338 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002339 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002340 }
2341 return skb;
2342}
2343
2344/* Adjust length of skb with fragments to match received data */
2345static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2346 unsigned int length)
2347{
2348 int i, num_frags;
2349 unsigned int size;
2350
2351 /* put header into skb */
2352 size = min(length, hdr_space);
2353 skb->tail += size;
2354 skb->len += size;
2355 length -= size;
2356
2357 num_frags = skb_shinfo(skb)->nr_frags;
2358 for (i = 0; i < num_frags; i++) {
2359 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2360
2361 if (length == 0) {
2362 /* don't need this page */
2363 __free_page(frag->page);
2364 --skb_shinfo(skb)->nr_frags;
2365 } else {
2366 size = min(length, (unsigned) PAGE_SIZE);
2367
2368 frag->size = size;
2369 skb->data_len += size;
2370 skb->truesize += size;
2371 skb->len += size;
2372 length -= size;
2373 }
2374 }
2375}
2376
2377/* Normal packet - take skb from ring element and put in a new one */
2378static struct sk_buff *receive_new(struct sky2_port *sky2,
2379 struct rx_ring_info *re,
2380 unsigned int length)
2381{
stephen hemminger3fbd9182010-02-01 13:45:41 +00002382 struct sk_buff *skb;
2383 struct rx_ring_info nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002384 unsigned hdr_space = sky2->rx_data_size;
2385
stephen hemminger3fbd9182010-02-01 13:45:41 +00002386 nre.skb = sky2_rx_alloc(sky2);
2387 if (unlikely(!nre.skb))
2388 goto nobuf;
2389
2390 if (sky2_rx_map_skb(sky2->hw->pdev, &nre, hdr_space))
2391 goto nomap;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002392
2393 skb = re->skb;
2394 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002395 prefetch(skb->data);
stephen hemminger3fbd9182010-02-01 13:45:41 +00002396 *re = nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002397
2398 if (skb_shinfo(skb)->nr_frags)
2399 skb_put_frags(skb, hdr_space, length);
2400 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002401 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002402 return skb;
stephen hemminger3fbd9182010-02-01 13:45:41 +00002403
2404nomap:
2405 dev_kfree_skb(nre.skb);
2406nobuf:
2407 return NULL;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002408}
2409
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002410/*
2411 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002412 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002413 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002414static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002415 u16 length, u32 status)
2416{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002417 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002418 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002419 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002420 u16 count = (status & GMR_FS_LEN) >> 16;
2421
Stephen Hemminger86aa7782011-01-09 15:54:15 -08002422 if (status & GMR_FS_VLAN)
2423 count -= VLAN_HLEN; /* Account for vlan tag */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002424
Joe Perches6c35aba2010-02-15 08:34:21 +00002425 netif_printk(sky2, rx_status, KERN_DEBUG, dev,
2426 "rx slot %u status 0x%x len %d\n",
2427 sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002428
Stephen Hemminger793b8832005-09-14 16:06:14 -07002429 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002430 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002431
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002432 /* This chip has hardware problems that generates bogus status.
2433 * So do only marginal checking and expect higher level protocols
2434 * to handle crap frames.
2435 */
2436 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2437 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2438 length != count)
2439 goto okay;
2440
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002441 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002442 goto error;
2443
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002444 if (!(status & GMR_FS_RX_OK))
2445 goto resubmit;
2446
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002447 /* if length reported by DMA does not match PHY, packet was truncated */
2448 if (length != count)
stephen hemminger0885a302010-12-31 15:34:27 +00002449 goto error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002450
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002451okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002452 if (length < copybreak)
2453 skb = receive_copy(sky2, re, length);
2454 else
2455 skb = receive_new(sky2, re, length);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002456
2457 dev->stats.rx_dropped += (skb == NULL);
2458
Stephen Hemminger793b8832005-09-14 16:06:14 -07002459resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002460 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002461
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002462 return skb;
2463
2464error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002465 ++dev->stats.rx_errors;
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002466
Joe Perches6c35aba2010-02-15 08:34:21 +00002467 if (net_ratelimit())
2468 netif_info(sky2, rx_err, dev,
2469 "rx error, status 0x%x length %d\n", status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002470
Stephen Hemminger793b8832005-09-14 16:06:14 -07002471 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002472}
2473
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002474/* Transmit complete */
2475static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002476{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002477 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002478
Mike McCormack8a0c9222010-02-12 06:58:06 +00002479 if (netif_running(dev)) {
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002480 sky2_tx_complete(sky2, last);
Mike McCormack8a0c9222010-02-12 06:58:06 +00002481
2482 /* Wake unless it's detached, and called e.g. from sky2_down() */
2483 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
2484 netif_wake_queue(dev);
2485 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002486}
2487
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002488static inline void sky2_skb_rx(const struct sky2_port *sky2,
2489 u32 status, struct sk_buff *skb)
2490{
Stephen Hemminger86aa7782011-01-09 15:54:15 -08002491 if (status & GMR_FS_VLAN)
2492 __vlan_hwaccel_put_tag(skb, be16_to_cpu(sky2->rx_tag));
2493
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002494 if (skb->ip_summed == CHECKSUM_NONE)
2495 netif_receive_skb(skb);
2496 else
2497 napi_gro_receive(&sky2->hw->napi, skb);
2498}
2499
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002500static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port,
2501 unsigned packets, unsigned bytes)
2502{
stephen hemminger0885a302010-12-31 15:34:27 +00002503 struct net_device *dev = hw->dev[port];
2504 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002505
stephen hemminger0885a302010-12-31 15:34:27 +00002506 if (packets == 0)
2507 return;
2508
2509 u64_stats_update_begin(&sky2->rx_stats.syncp);
2510 sky2->rx_stats.packets += packets;
2511 sky2->rx_stats.bytes += bytes;
2512 u64_stats_update_end(&sky2->rx_stats.syncp);
2513
2514 dev->last_rx = jiffies;
2515 sky2_rx_update(netdev_priv(dev), rxqaddr[port]);
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002516}
2517
stephen hemminger375c5682010-02-07 06:28:36 +00002518static void sky2_rx_checksum(struct sky2_port *sky2, u32 status)
2519{
2520 /* If this happens then driver assuming wrong format for chip type */
2521 BUG_ON(sky2->hw->flags & SKY2_HW_NEW_LE);
2522
2523 /* Both checksum counters are programmed to start at
2524 * the same offset, so unless there is a problem they
2525 * should match. This failure is an early indication that
2526 * hardware receive checksumming won't work.
2527 */
2528 if (likely((u16)(status >> 16) == (u16)status)) {
2529 struct sk_buff *skb = sky2->rx_ring[sky2->rx_next].skb;
2530 skb->ip_summed = CHECKSUM_COMPLETE;
2531 skb->csum = le16_to_cpu(status);
2532 } else {
2533 dev_notice(&sky2->hw->pdev->dev,
2534 "%s: receive checksum problem (status = %#x)\n",
2535 sky2->netdev->name, status);
2536
Michał Mirosławf5d64032011-04-10 03:13:21 +00002537 /* Disable checksum offload
2538 * It will be reenabled on next ndo_set_features, but if it's
2539 * really broken, will get disabled again
2540 */
2541 sky2->netdev->features &= ~NETIF_F_RXCSUM;
stephen hemminger375c5682010-02-07 06:28:36 +00002542 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
2543 BMU_DIS_RX_CHKSUM);
2544 }
2545}
2546
Stephen Hemmingerbf731302010-04-24 20:04:12 -07002547static void sky2_rx_hash(struct sky2_port *sky2, u32 status)
2548{
2549 struct sk_buff *skb;
2550
2551 skb = sky2->rx_ring[sky2->rx_next].skb;
2552 skb->rxhash = le32_to_cpu(status);
2553}
2554
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002555/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002556static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002557{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002558 int work_done = 0;
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002559 unsigned int total_bytes[2] = { 0 };
2560 unsigned int total_packets[2] = { 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002561
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002562 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002563 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002564 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002565 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002566 unsigned port;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002567 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002568 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002569 u32 status;
2570 u16 length;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002571 u8 opcode = le->opcode;
2572
2573 if (!(opcode & HW_OWNER))
2574 break;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002575
stephen hemmingerefe91932010-04-22 13:42:56 +00002576 hw->st_idx = RING_NEXT(hw->st_idx, hw->st_size);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002577
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002578 port = le->css & CSS_LINK_BIT;
Stephen Hemminger69161612007-06-04 17:23:26 -07002579 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002580 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002581 length = le16_to_cpu(le->length);
2582 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002583
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002584 le->opcode = 0;
2585 switch (opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002586 case OP_RXSTAT:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002587 total_packets[port]++;
2588 total_bytes[port] += length;
Stephen Hemminger90c30332010-02-03 08:31:12 +00002589
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002590 skb = sky2_receive(dev, length, status);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002591 if (!skb)
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002592 break;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002593
Stephen Hemminger69161612007-06-04 17:23:26 -07002594 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002595 if (hw->flags & SKY2_HW_NEW_LE) {
Michał Mirosławf5d64032011-04-10 03:13:21 +00002596 if ((dev->features & NETIF_F_RXCSUM) &&
Stephen Hemminger69161612007-06-04 17:23:26 -07002597 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2598 (le->css & CSS_TCPUDPCSOK))
2599 skb->ip_summed = CHECKSUM_UNNECESSARY;
2600 else
2601 skb->ip_summed = CHECKSUM_NONE;
2602 }
2603
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002604 skb->protocol = eth_type_trans(skb, dev);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002605
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002606 sky2_skb_rx(sky2, status, skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002607
Stephen Hemminger22e11702006-07-12 15:23:48 -07002608 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002609 if (++work_done >= to_do)
2610 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002611 break;
2612
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002613 case OP_RXVLAN:
2614 sky2->rx_tag = length;
2615 break;
2616
2617 case OP_RXCHKSVLAN:
2618 sky2->rx_tag = length;
2619 /* fall through */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002620 case OP_RXCHKS:
Michał Mirosławf5d64032011-04-10 03:13:21 +00002621 if (likely(dev->features & NETIF_F_RXCSUM))
stephen hemminger375c5682010-02-07 06:28:36 +00002622 sky2_rx_checksum(sky2, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002623 break;
2624
Stephen Hemmingerbf731302010-04-24 20:04:12 -07002625 case OP_RSS_HASH:
2626 sky2_rx_hash(sky2, status);
2627 break;
2628
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002629 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002630 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002631 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002632 if (hw->dev[1])
2633 sky2_tx_done(hw->dev[1],
2634 ((status >> 24) & 0xff)
2635 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002636 break;
2637
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002638 default:
2639 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002640 pr_warning("unknown status opcode 0x%x\n", opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002641 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002642 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002643
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002644 /* Fully processed status ring so clear irq */
2645 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2646
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002647exit_loop:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002648 sky2_rx_done(hw, 0, total_packets[0], total_bytes[0]);
2649 sky2_rx_done(hw, 1, total_packets[1], total_bytes[1]);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002650
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002651 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002652}
2653
2654static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2655{
2656 struct net_device *dev = hw->dev[port];
2657
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002658 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002659 netdev_info(dev, "hw error interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002660
2661 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002662 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002663 netdev_err(dev, "ram data read parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002664 /* Clear IRQ */
2665 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2666 }
2667
2668 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002669 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002670 netdev_err(dev, "ram data write parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002671
2672 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2673 }
2674
2675 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002676 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002677 netdev_err(dev, "MAC parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002678 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2679 }
2680
2681 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002682 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002683 netdev_err(dev, "RX parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002684 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2685 }
2686
2687 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002688 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002689 netdev_err(dev, "TCP segmentation error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002690 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2691 }
2692}
2693
2694static void sky2_hw_intr(struct sky2_hw *hw)
2695{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002696 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002697 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002698 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2699
2700 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002701
Stephen Hemminger793b8832005-09-14 16:06:14 -07002702 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002703 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002704
2705 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002706 u16 pci_err;
2707
stephen hemmingera40ccc62010-01-24 18:46:06 +00002708 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002709 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002710 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002711 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002712 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002713
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002714 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002715 pci_err | PCI_STATUS_ERROR_BITS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002716 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002717 }
2718
2719 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002720 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002721 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002722
stephen hemmingera40ccc62010-01-24 18:46:06 +00002723 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002724 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
2725 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2726 0xfffffffful);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002727 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002728 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
Stephen Hemmingercf06ffb2007-11-05 15:52:13 -08002729
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002730 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002731 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002732 }
2733
2734 if (status & Y2_HWE_L1_MASK)
2735 sky2_hw_error(hw, 0, status);
2736 status >>= 8;
2737 if (status & Y2_HWE_L1_MASK)
2738 sky2_hw_error(hw, 1, status);
2739}
2740
2741static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2742{
2743 struct net_device *dev = hw->dev[port];
2744 struct sky2_port *sky2 = netdev_priv(dev);
2745 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2746
Joe Perches6c35aba2010-02-15 08:34:21 +00002747 netif_info(sky2, intr, dev, "mac interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002748
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002749 if (status & GM_IS_RX_CO_OV)
2750 gma_read16(hw, port, GM_RX_IRQ_SRC);
2751
2752 if (status & GM_IS_TX_CO_OV)
2753 gma_read16(hw, port, GM_TX_IRQ_SRC);
2754
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002755 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002756 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002757 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2758 }
2759
2760 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002761 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002762 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2763 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002764}
2765
Stephen Hemminger40b01722007-04-11 14:47:59 -07002766/* This should never happen it is a bug. */
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002767static void sky2_le_error(struct sky2_hw *hw, unsigned port, u16 q)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002768{
2769 struct net_device *dev = hw->dev[port];
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002770 u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002771
Joe Perchesada1db52010-02-17 15:01:59 +00002772 dev_err(&hw->pdev->dev, "%s: descriptor error q=%#x get=%u put=%u\n",
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002773 dev->name, (unsigned) q, (unsigned) idx,
2774 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002775
Stephen Hemminger40b01722007-04-11 14:47:59 -07002776 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002777}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002778
Stephen Hemminger75e80682007-09-19 15:36:46 -07002779static int sky2_rx_hung(struct net_device *dev)
2780{
2781 struct sky2_port *sky2 = netdev_priv(dev);
2782 struct sky2_hw *hw = sky2->hw;
2783 unsigned port = sky2->port;
2784 unsigned rxq = rxqaddr[port];
2785 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2786 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2787 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2788 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2789
2790 /* If idle and MAC or PCI is stuck */
2791 if (sky2->check.last == dev->last_rx &&
2792 ((mac_rp == sky2->check.mac_rp &&
2793 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2794 /* Check if the PCI RX hang */
2795 (fifo_rp == sky2->check.fifo_rp &&
2796 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
Joe Perchesada1db52010-02-17 15:01:59 +00002797 netdev_printk(KERN_DEBUG, dev,
2798 "hung mac %d:%d fifo %d (%d:%d)\n",
2799 mac_lev, mac_rp, fifo_lev,
2800 fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
Stephen Hemminger75e80682007-09-19 15:36:46 -07002801 return 1;
2802 } else {
2803 sky2->check.last = dev->last_rx;
2804 sky2->check.mac_rp = mac_rp;
2805 sky2->check.mac_lev = mac_lev;
2806 sky2->check.fifo_rp = fifo_rp;
2807 sky2->check.fifo_lev = fifo_lev;
2808 return 0;
2809 }
2810}
2811
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002812static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002813{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002814 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002815
Stephen Hemminger75e80682007-09-19 15:36:46 -07002816 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002817 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002818 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002819 } else {
2820 int i, active = 0;
2821
2822 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002823 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002824 if (!netif_running(dev))
2825 continue;
2826 ++active;
2827
2828 /* For chips with Rx FIFO, check if stuck */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002829 if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002830 sky2_rx_hung(dev)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002831 netdev_info(dev, "receiver hang detected\n");
Stephen Hemminger75e80682007-09-19 15:36:46 -07002832 schedule_work(&hw->restart_work);
2833 return;
2834 }
2835 }
2836
2837 if (active == 0)
2838 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002839 }
2840
Stephen Hemminger75e80682007-09-19 15:36:46 -07002841 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002842}
2843
Stephen Hemminger40b01722007-04-11 14:47:59 -07002844/* Hardware/software error handling */
2845static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002846{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002847 if (net_ratelimit())
2848 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002849
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002850 if (status & Y2_IS_HW_ERR)
2851 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002852
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002853 if (status & Y2_IS_IRQ_MAC1)
2854 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002855
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002856 if (status & Y2_IS_IRQ_MAC2)
2857 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002858
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002859 if (status & Y2_IS_CHK_RX1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002860 sky2_le_error(hw, 0, Q_R1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002861
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002862 if (status & Y2_IS_CHK_RX2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002863 sky2_le_error(hw, 1, Q_R2);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002864
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002865 if (status & Y2_IS_CHK_TXA1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002866 sky2_le_error(hw, 0, Q_XA1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002867
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002868 if (status & Y2_IS_CHK_TXA2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002869 sky2_le_error(hw, 1, Q_XA2);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002870}
2871
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002872static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002873{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002874 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002875 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07002876 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07002877 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002878
2879 if (unlikely(status & Y2_IS_ERROR))
2880 sky2_err_intr(hw, status);
2881
2882 if (status & Y2_IS_IRQ_PHY1)
2883 sky2_phy_intr(hw, 0);
2884
2885 if (status & Y2_IS_IRQ_PHY2)
2886 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002887
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002888 if (status & Y2_IS_PHY_QLNK)
2889 sky2_qlink_intr(hw);
2890
Stephen Hemminger26691832007-10-11 18:31:13 -07002891 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
2892 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002893
David S. Miller6f535762007-10-11 18:08:29 -07002894 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07002895 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002896 }
David S. Miller6f535762007-10-11 18:08:29 -07002897
Stephen Hemminger26691832007-10-11 18:31:13 -07002898 napi_complete(napi);
2899 sky2_read32(hw, B0_Y2_SP_LISR);
2900done:
2901
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002902 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002903}
2904
David Howells7d12e782006-10-05 14:55:46 +01002905static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002906{
2907 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002908 u32 status;
2909
2910 /* Reading this mask interrupts as side effect */
2911 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2912 if (status == 0 || status == ~0)
2913 return IRQ_NONE;
2914
2915 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002916
2917 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002918
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002919 return IRQ_HANDLED;
2920}
2921
2922#ifdef CONFIG_NET_POLL_CONTROLLER
2923static void sky2_netpoll(struct net_device *dev)
2924{
2925 struct sky2_port *sky2 = netdev_priv(dev);
2926
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002927 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002928}
2929#endif
2930
2931/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002932static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002933{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002934 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002935 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002936 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08002937 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002938 case CHIP_ID_YUKON_SUPR:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07002939 case CHIP_ID_YUKON_UL_2:
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002940 case CHIP_ID_YUKON_OPT:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002941 return 125;
2942
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002943 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002944 return 100;
2945
2946 case CHIP_ID_YUKON_FE_P:
2947 return 50;
2948
2949 case CHIP_ID_YUKON_XL:
2950 return 156;
2951
2952 default:
2953 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002954 }
2955}
2956
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002957static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2958{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002959 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002960}
2961
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002962static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2963{
2964 return clk / sky2_mhz(hw);
2965}
2966
2967
Stephen Hemmingere3173832007-02-06 10:45:39 -08002968static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002969{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002970 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002971
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002972 /* Enable all clocks and check for bad PCI access */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002973 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger451af332007-06-04 17:23:24 -07002974
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002975 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08002976
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002977 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002978 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
2979
Mike McCormack060b9462010-07-29 03:34:52 +00002980 switch (hw->chip_id) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002981 case CHIP_ID_YUKON_XL:
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002982 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07002983 if (hw->chip_rev < CHIP_REV_YU_XL_A2)
2984 hw->flags |= SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002985 break;
2986
2987 case CHIP_ID_YUKON_EC_U:
2988 hw->flags = SKY2_HW_GIGABIT
2989 | SKY2_HW_NEWER_PHY
2990 | SKY2_HW_ADV_POWER_CTL;
2991 break;
2992
2993 case CHIP_ID_YUKON_EX:
2994 hw->flags = SKY2_HW_GIGABIT
2995 | SKY2_HW_NEWER_PHY
2996 | SKY2_HW_NEW_LE
2997 | SKY2_HW_ADV_POWER_CTL;
2998
2999 /* New transmit checksum */
3000 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
3001 hw->flags |= SKY2_HW_AUTO_TX_SUM;
3002 break;
3003
3004 case CHIP_ID_YUKON_EC:
3005 /* This rev is really old, and requires untested workarounds */
3006 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
3007 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
3008 return -EOPNOTSUPP;
3009 }
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003010 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003011 break;
3012
3013 case CHIP_ID_YUKON_FE:
Stephen Hemmingerbf731302010-04-24 20:04:12 -07003014 hw->flags = SKY2_HW_RSS_BROKEN;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003015 break;
3016
Stephen Hemminger05745c42007-09-19 15:36:45 -07003017 case CHIP_ID_YUKON_FE_P:
3018 hw->flags = SKY2_HW_NEWER_PHY
3019 | SKY2_HW_NEW_LE
3020 | SKY2_HW_AUTO_TX_SUM
3021 | SKY2_HW_ADV_POWER_CTL;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08003022
3023 /* The workaround for status conflicts VLAN tag detection. */
3024 if (hw->chip_rev == CHIP_REV_YU_FE2_A0)
3025 hw->flags |= SKY2_HW_VLAN_BROKEN;
Stephen Hemminger05745c42007-09-19 15:36:45 -07003026 break;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003027
3028 case CHIP_ID_YUKON_SUPR:
3029 hw->flags = SKY2_HW_GIGABIT
3030 | SKY2_HW_NEWER_PHY
3031 | SKY2_HW_NEW_LE
3032 | SKY2_HW_AUTO_TX_SUM
3033 | SKY2_HW_ADV_POWER_CTL;
3034 break;
3035
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003036 case CHIP_ID_YUKON_UL_2:
Takashi Iwaib3386822009-12-03 05:12:01 +00003037 hw->flags = SKY2_HW_GIGABIT
3038 | SKY2_HW_ADV_POWER_CTL;
3039 break;
3040
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003041 case CHIP_ID_YUKON_OPT:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003042 hw->flags = SKY2_HW_GIGABIT
Takashi Iwaib3386822009-12-03 05:12:01 +00003043 | SKY2_HW_NEW_LE
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003044 | SKY2_HW_ADV_POWER_CTL;
3045 break;
3046
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003047 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003048 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
3049 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003050 return -EOPNOTSUPP;
3051 }
3052
Stephen Hemmingere3173832007-02-06 10:45:39 -08003053 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003054 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
3055 hw->flags |= SKY2_HW_FIBRE_PHY;
3056
Stephen Hemmingere3173832007-02-06 10:45:39 -08003057 hw->ports = 1;
3058 t8 = sky2_read8(hw, B2_Y2_HW_RES);
3059 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
3060 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
3061 ++hw->ports;
3062 }
3063
Mike McCormack74a61eb2009-09-21 04:08:52 +00003064 if (sky2_read8(hw, B2_E_0))
3065 hw->flags |= SKY2_HW_RAM_BUFFER;
3066
Stephen Hemmingere3173832007-02-06 10:45:39 -08003067 return 0;
3068}
3069
3070static void sky2_reset(struct sky2_hw *hw)
3071{
Stephen Hemminger555382c2007-08-29 12:58:14 -07003072 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003073 u16 status;
Stephen Hemminger555382c2007-08-29 12:58:14 -07003074 int i, cap;
3075 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003076
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003077 /* disable ASF */
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003078 if (hw->chip_id == CHIP_ID_YUKON_EX
3079 || hw->chip_id == CHIP_ID_YUKON_SUPR) {
3080 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003081 status = sky2_read16(hw, HCU_CCSR);
3082 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
3083 HCU_CCSR_UC_STATE_MSK);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003084 /*
3085 * CPU clock divider shouldn't be used because
3086 * - ASF firmware may malfunction
3087 * - Yukon-Supreme: Parallel FLASH doesn't support divided clocks
3088 */
3089 status &= ~HCU_CCSR_CPU_CLK_DIVIDE_MSK;
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003090 sky2_write16(hw, HCU_CCSR, status);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003091 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003092 } else
3093 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
3094 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003095
3096 /* do a SW reset */
3097 sky2_write8(hw, B0_CTST, CS_RST_SET);
3098 sky2_write8(hw, B0_CTST, CS_RST_CLR);
3099
Stephen Hemmingerac93a392007-11-05 15:52:08 -08003100 /* allow writes to PCI config */
3101 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
3102
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003103 /* clear PCI errors, if any */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003104 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003105 status |= PCI_STATUS_ERROR_BITS;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003106 sky2_pci_write16(hw, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003107
3108 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
3109
Stephen Hemminger555382c2007-08-29 12:58:14 -07003110 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
3111 if (cap) {
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003112 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
3113 0xfffffffful);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07003114
Stephen Hemminger555382c2007-08-29 12:58:14 -07003115 /* If error bit is stuck on ignore it */
3116 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
3117 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003118 else
Stephen Hemminger555382c2007-08-29 12:58:14 -07003119 hwe_mask |= Y2_IS_PCI_EXP;
3120 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003121
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003122 sky2_power_on(hw);
stephen hemmingera40ccc62010-01-24 18:46:06 +00003123 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003124
3125 for (i = 0; i < hw->ports; i++) {
3126 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
3127 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07003128
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003129 if (hw->chip_id == CHIP_ID_YUKON_EX ||
3130 hw->chip_id == CHIP_ID_YUKON_SUPR)
Stephen Hemminger69161612007-06-04 17:23:26 -07003131 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
3132 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
3133 | GMC_BYP_RETR_ON);
Stephen Hemminger877c8572009-10-29 06:37:08 +00003134
3135 }
3136
3137 if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) {
3138 /* enable MACSec clock gating */
3139 sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003140 }
3141
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003142 if (hw->chip_id == CHIP_ID_YUKON_OPT) {
3143 u16 reg;
3144 u32 msk;
3145
3146 if (hw->chip_rev == 0) {
3147 /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */
3148 sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7));
3149
3150 /* set PHY Link Detect Timer to 1.1 second (11x 100ms) */
3151 reg = 10;
3152 } else {
3153 /* set PHY Link Detect Timer to 0.4 second (4x 100ms) */
3154 reg = 3;
3155 }
3156
3157 reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;
3158
3159 /* reset PHY Link Detect */
stephen hemmingera40ccc62010-01-24 18:46:06 +00003160 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003161 sky2_pci_write16(hw, PSM_CONFIG_REG4,
3162 reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT);
3163 sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
3164
3165
3166 /* enable PHY Quick Link */
3167 msk = sky2_read32(hw, B0_IMSK);
3168 msk |= Y2_IS_PHY_QLNK;
3169 sky2_write32(hw, B0_IMSK, msk);
3170
3171 /* check if PSMv2 was running before */
3172 reg = sky2_pci_read16(hw, PSM_CONFIG_REG3);
3173 if (reg & PCI_EXP_LNKCTL_ASPMC) {
stephen hemminger8b055432010-02-12 06:57:58 +00003174 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003175 /* restore the PCIe Link Control register */
3176 sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg);
3177 }
stephen hemmingera40ccc62010-01-24 18:46:06 +00003178 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003179
3180 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
3181 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
3182 }
3183
Stephen Hemminger793b8832005-09-14 16:06:14 -07003184 /* Clear I2C IRQ noise */
3185 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003186
3187 /* turn off hardware timer (unused) */
3188 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
3189 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003190
Stephen Hemminger69634ee2005-12-09 11:35:06 -08003191 /* Turn off descriptor polling */
3192 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003193
3194 /* Turn off receive timestamp */
3195 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003196 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003197
3198 /* enable the Tx Arbiters */
3199 for (i = 0; i < hw->ports; i++)
3200 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
3201
3202 /* Initialize ram interface */
3203 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003204 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003205
3206 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
3207 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
3208 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
3209 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
3210 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
3211 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
3212 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
3213 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
3214 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
3215 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
3216 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
3217 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
3218 }
3219
Stephen Hemminger555382c2007-08-29 12:58:14 -07003220 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003221
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003222 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07003223 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003224
stephen hemmingerefe91932010-04-22 13:42:56 +00003225 memset(hw->st_le, 0, hw->st_size * sizeof(struct sky2_status_le));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003226 hw->st_idx = 0;
3227
3228 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
3229 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
3230
3231 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003232 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003233
3234 /* Set the list last index */
stephen hemmingerefe91932010-04-22 13:42:56 +00003235 sky2_write16(hw, STAT_LAST_IDX, hw->st_size - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003236
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003237 sky2_write16(hw, STAT_TX_IDX_TH, 10);
3238 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003239
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003240 /* set Status-FIFO ISR watermark */
3241 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
3242 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
3243 else
3244 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003245
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003246 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003247 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
3248 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003249
Stephen Hemminger793b8832005-09-14 16:06:14 -07003250 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003251 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
3252
3253 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3254 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3255 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003256}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003257
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003258/* Take device down (offline).
3259 * Equivalent to doing dev_stop() but this does not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003260 * inform upper layers of the transition.
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003261 */
3262static void sky2_detach(struct net_device *dev)
3263{
3264 if (netif_running(dev)) {
Mike McCormackc36531b2009-12-31 00:55:31 +00003265 netif_tx_lock(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003266 netif_device_detach(dev); /* stop txq */
Mike McCormackc36531b2009-12-31 00:55:31 +00003267 netif_tx_unlock(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003268 sky2_down(dev);
3269 }
3270}
3271
3272/* Bring device back after doing sky2_detach */
3273static int sky2_reattach(struct net_device *dev)
3274{
3275 int err = 0;
3276
3277 if (netif_running(dev)) {
3278 err = sky2_up(dev);
3279 if (err) {
Joe Perchesada1db52010-02-17 15:01:59 +00003280 netdev_info(dev, "could not restart %d\n", err);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003281 dev_close(dev);
3282 } else {
3283 netif_device_attach(dev);
3284 sky2_set_multicast(dev);
3285 }
3286 }
3287
3288 return err;
3289}
3290
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003291static void sky2_all_down(struct sky2_hw *hw)
Stephen Hemminger81906792007-02-15 16:40:33 -08003292{
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003293 int i;
Stephen Hemminger81906792007-02-15 16:40:33 -08003294
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003295 sky2_read32(hw, B0_IMSK);
Stephen Hemminger8cfcbe92007-12-03 17:02:17 -08003296 sky2_write32(hw, B0_IMSK, 0);
Mike McCormack93135a32010-05-13 06:12:50 +00003297 synchronize_irq(hw->pdev->irq);
3298 napi_disable(&hw->napi);
Stephen Hemminger81906792007-02-15 16:40:33 -08003299
Mike McCormack8a0c9222010-02-12 06:58:06 +00003300 for (i = 0; i < hw->ports; i++) {
3301 struct net_device *dev = hw->dev[i];
3302 struct sky2_port *sky2 = netdev_priv(dev);
3303
3304 if (!netif_running(dev))
3305 continue;
3306
3307 netif_carrier_off(dev);
3308 netif_tx_disable(dev);
3309 sky2_hw_down(sky2);
3310 }
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003311}
Mike McCormack8a0c9222010-02-12 06:58:06 +00003312
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003313static void sky2_all_up(struct sky2_hw *hw)
3314{
3315 u32 imask = Y2_IS_BASE;
3316 int i;
Mike McCormack8a0c9222010-02-12 06:58:06 +00003317
3318 for (i = 0; i < hw->ports; i++) {
3319 struct net_device *dev = hw->dev[i];
3320 struct sky2_port *sky2 = netdev_priv(dev);
3321
3322 if (!netif_running(dev))
3323 continue;
3324
3325 sky2_hw_up(sky2);
Mike McCormack37652522010-05-13 06:12:48 +00003326 sky2_set_multicast(dev);
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003327 imask |= portirq_msk[i];
Mike McCormack8a0c9222010-02-12 06:58:06 +00003328 netif_wake_queue(dev);
3329 }
3330
3331 sky2_write32(hw, B0_IMSK, imask);
3332 sky2_read32(hw, B0_IMSK);
3333
3334 sky2_read32(hw, B0_Y2_SP_LISR);
3335 napi_enable(&hw->napi);
Mike McCormackd72ff8f2010-05-13 06:12:51 +00003336}
3337
3338static void sky2_restart(struct work_struct *work)
3339{
3340 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
3341
3342 rtnl_lock();
3343
3344 sky2_all_down(hw);
3345 sky2_reset(hw);
3346 sky2_all_up(hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08003347
Stephen Hemminger81906792007-02-15 16:40:33 -08003348 rtnl_unlock();
3349}
3350
Stephen Hemmingere3173832007-02-06 10:45:39 -08003351static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
3352{
3353 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
3354}
3355
3356static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3357{
3358 const struct sky2_port *sky2 = netdev_priv(dev);
3359
3360 wol->supported = sky2_wol_supported(sky2->hw);
3361 wol->wolopts = sky2->wol;
3362}
3363
3364static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3365{
3366 struct sky2_port *sky2 = netdev_priv(dev);
3367 struct sky2_hw *hw = sky2->hw;
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00003368 bool enable_wakeup = false;
3369 int i;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003370
Joe Perches8e95a202009-12-03 07:58:21 +00003371 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) ||
3372 !device_can_wakeup(&hw->pdev->dev))
Stephen Hemmingere3173832007-02-06 10:45:39 -08003373 return -EOPNOTSUPP;
3374
3375 sky2->wol = wol->wolopts;
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00003376
3377 for (i = 0; i < hw->ports; i++) {
3378 struct net_device *dev = hw->dev[i];
3379 struct sky2_port *sky2 = netdev_priv(dev);
3380
3381 if (sky2->wol)
3382 enable_wakeup = true;
3383 }
3384 device_set_wakeup_enable(&hw->pdev->dev, enable_wakeup);
3385
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003386 return 0;
3387}
3388
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003389static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003390{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003391 if (sky2_is_copper(hw)) {
3392 u32 modes = SUPPORTED_10baseT_Half
3393 | SUPPORTED_10baseT_Full
3394 | SUPPORTED_100baseT_Half
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003395 | SUPPORTED_100baseT_Full;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003396
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003397 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003398 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003399 | SUPPORTED_1000baseT_Full;
3400 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003401 } else
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003402 return SUPPORTED_1000baseT_Half
3403 | SUPPORTED_1000baseT_Full;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003404}
3405
Stephen Hemminger793b8832005-09-14 16:06:14 -07003406static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003407{
3408 struct sky2_port *sky2 = netdev_priv(dev);
3409 struct sky2_hw *hw = sky2->hw;
3410
3411 ecmd->transceiver = XCVR_INTERNAL;
3412 ecmd->supported = sky2_supported_modes(hw);
3413 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003414 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003415 ecmd->port = PORT_TP;
David Decotigny70739492011-04-27 18:32:40 +00003416 ethtool_cmd_speed_set(ecmd, sky2->speed);
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003417 ecmd->supported |= SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003418 } else {
David Decotigny70739492011-04-27 18:32:40 +00003419 ethtool_cmd_speed_set(ecmd, SPEED_1000);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003420 ecmd->port = PORT_FIBRE;
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003421 ecmd->supported |= SUPPORTED_Autoneg | SUPPORTED_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003422 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003423
3424 ecmd->advertising = sky2->advertising;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003425 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_SPEED)
3426 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003427 ecmd->duplex = sky2->duplex;
3428 return 0;
3429}
3430
3431static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3432{
3433 struct sky2_port *sky2 = netdev_priv(dev);
3434 const struct sky2_hw *hw = sky2->hw;
3435 u32 supported = sky2_supported_modes(hw);
3436
3437 if (ecmd->autoneg == AUTONEG_ENABLE) {
Stephen Hemminger2aca31e2011-01-06 18:40:36 +00003438 if (ecmd->advertising & ~supported)
3439 return -EINVAL;
3440
3441 if (sky2_is_copper(hw))
3442 sky2->advertising = ecmd->advertising |
3443 ADVERTISED_TP |
3444 ADVERTISED_Autoneg;
3445 else
3446 sky2->advertising = ecmd->advertising |
3447 ADVERTISED_FIBRE |
3448 ADVERTISED_Autoneg;
3449
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003450 sky2->flags |= SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003451 sky2->duplex = -1;
3452 sky2->speed = -1;
3453 } else {
3454 u32 setting;
David Decotigny25db0332011-04-27 18:32:39 +00003455 u32 speed = ethtool_cmd_speed(ecmd);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003456
David Decotigny25db0332011-04-27 18:32:39 +00003457 switch (speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003458 case SPEED_1000:
3459 if (ecmd->duplex == DUPLEX_FULL)
3460 setting = SUPPORTED_1000baseT_Full;
3461 else if (ecmd->duplex == DUPLEX_HALF)
3462 setting = SUPPORTED_1000baseT_Half;
3463 else
3464 return -EINVAL;
3465 break;
3466 case SPEED_100:
3467 if (ecmd->duplex == DUPLEX_FULL)
3468 setting = SUPPORTED_100baseT_Full;
3469 else if (ecmd->duplex == DUPLEX_HALF)
3470 setting = SUPPORTED_100baseT_Half;
3471 else
3472 return -EINVAL;
3473 break;
3474
3475 case SPEED_10:
3476 if (ecmd->duplex == DUPLEX_FULL)
3477 setting = SUPPORTED_10baseT_Full;
3478 else if (ecmd->duplex == DUPLEX_HALF)
3479 setting = SUPPORTED_10baseT_Half;
3480 else
3481 return -EINVAL;
3482 break;
3483 default:
3484 return -EINVAL;
3485 }
3486
3487 if ((setting & supported) == 0)
3488 return -EINVAL;
3489
David Decotigny25db0332011-04-27 18:32:39 +00003490 sky2->speed = speed;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003491 sky2->duplex = ecmd->duplex;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003492 sky2->flags &= ~SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003493 }
3494
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003495 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003496 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003497 sky2_set_multicast(dev);
3498 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003499
3500 return 0;
3501}
3502
3503static void sky2_get_drvinfo(struct net_device *dev,
3504 struct ethtool_drvinfo *info)
3505{
3506 struct sky2_port *sky2 = netdev_priv(dev);
3507
3508 strcpy(info->driver, DRV_NAME);
3509 strcpy(info->version, DRV_VERSION);
3510 strcpy(info->fw_version, "N/A");
3511 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3512}
3513
3514static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003515 char name[ETH_GSTRING_LEN];
3516 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003517} sky2_stats[] = {
3518 { "tx_bytes", GM_TXO_OK_HI },
3519 { "rx_bytes", GM_RXO_OK_HI },
3520 { "tx_broadcast", GM_TXF_BC_OK },
3521 { "rx_broadcast", GM_RXF_BC_OK },
3522 { "tx_multicast", GM_TXF_MC_OK },
3523 { "rx_multicast", GM_RXF_MC_OK },
3524 { "tx_unicast", GM_TXF_UC_OK },
3525 { "rx_unicast", GM_RXF_UC_OK },
3526 { "tx_mac_pause", GM_TXF_MPAUSE },
3527 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003528 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003529 { "late_collision",GM_TXF_LAT_COL },
3530 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003531 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003532 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003533
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003534 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003535 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003536 { "rx_64_byte_packets", GM_RXF_64B },
3537 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3538 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3539 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3540 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3541 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3542 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003543 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003544 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3545 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003546 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003547
3548 { "tx_64_byte_packets", GM_TXF_64B },
3549 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3550 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3551 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3552 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3553 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3554 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3555 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003556};
3557
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003558static u32 sky2_get_msglevel(struct net_device *netdev)
3559{
3560 struct sky2_port *sky2 = netdev_priv(netdev);
3561 return sky2->msg_enable;
3562}
3563
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003564static int sky2_nway_reset(struct net_device *dev)
3565{
3566 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003567
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003568 if (!netif_running(dev) || !(sky2->flags & SKY2_FLAG_AUTO_SPEED))
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003569 return -EINVAL;
3570
Stephen Hemminger1b537562005-12-20 15:08:07 -08003571 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003572 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003573
3574 return 0;
3575}
3576
Stephen Hemminger793b8832005-09-14 16:06:14 -07003577static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003578{
3579 struct sky2_hw *hw = sky2->hw;
3580 unsigned port = sky2->port;
3581 int i;
3582
stephen hemminger0885a302010-12-31 15:34:27 +00003583 data[0] = get_stats64(hw, port, GM_TXO_OK_LO);
3584 data[1] = get_stats64(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003585
Stephen Hemminger793b8832005-09-14 16:06:14 -07003586 for (i = 2; i < count; i++)
stephen hemminger0885a302010-12-31 15:34:27 +00003587 data[i] = get_stats32(hw, port, sky2_stats[i].offset);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003588}
3589
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003590static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3591{
3592 struct sky2_port *sky2 = netdev_priv(netdev);
3593 sky2->msg_enable = value;
3594}
3595
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003596static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003597{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003598 switch (sset) {
3599 case ETH_SS_STATS:
3600 return ARRAY_SIZE(sky2_stats);
3601 default:
3602 return -EOPNOTSUPP;
3603 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003604}
3605
3606static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003607 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003608{
3609 struct sky2_port *sky2 = netdev_priv(dev);
3610
Stephen Hemminger793b8832005-09-14 16:06:14 -07003611 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003612}
3613
Stephen Hemminger793b8832005-09-14 16:06:14 -07003614static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003615{
3616 int i;
3617
3618 switch (stringset) {
3619 case ETH_SS_STATS:
3620 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3621 memcpy(data + i * ETH_GSTRING_LEN,
3622 sky2_stats[i].name, ETH_GSTRING_LEN);
3623 break;
3624 }
3625}
3626
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003627static int sky2_set_mac_address(struct net_device *dev, void *p)
3628{
3629 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003630 struct sky2_hw *hw = sky2->hw;
3631 unsigned port = sky2->port;
3632 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003633
3634 if (!is_valid_ether_addr(addr->sa_data))
3635 return -EADDRNOTAVAIL;
3636
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003637 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003638 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003639 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003640 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003641 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003642
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003643 /* virtual address for data */
3644 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3645
3646 /* physical address: used for pause frames */
3647 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003648
3649 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003650}
3651
Mike McCormack060b9462010-07-29 03:34:52 +00003652static inline void sky2_add_filter(u8 filter[8], const u8 *addr)
Stephen Hemmingera052b522006-10-17 10:24:23 -07003653{
3654 u32 bit;
3655
3656 bit = ether_crc(ETH_ALEN, addr) & 63;
3657 filter[bit >> 3] |= 1 << (bit & 7);
3658}
3659
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003660static void sky2_set_multicast(struct net_device *dev)
3661{
3662 struct sky2_port *sky2 = netdev_priv(dev);
3663 struct sky2_hw *hw = sky2->hw;
3664 unsigned port = sky2->port;
Jiri Pirko22bedad2010-04-01 21:22:57 +00003665 struct netdev_hw_addr *ha;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003666 u16 reg;
3667 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003668 int rx_pause;
3669 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003670
Stephen Hemmingera052b522006-10-17 10:24:23 -07003671 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003672 memset(filter, 0, sizeof(filter));
3673
3674 reg = gma_read16(hw, port, GM_RX_CTRL);
3675 reg |= GM_RXCR_UCF_ENA;
3676
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003677 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003678 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003679 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003680 memset(filter, 0xff, sizeof(filter));
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00003681 else if (netdev_mc_empty(dev) && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003682 reg &= ~GM_RXCR_MCF_ENA;
3683 else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003684 reg |= GM_RXCR_MCF_ENA;
3685
Stephen Hemmingera052b522006-10-17 10:24:23 -07003686 if (rx_pause)
3687 sky2_add_filter(filter, pause_mc_addr);
3688
Jiri Pirko22bedad2010-04-01 21:22:57 +00003689 netdev_for_each_mc_addr(ha, dev)
3690 sky2_add_filter(filter, ha->addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003691 }
3692
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003693 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003694 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003695 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003696 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003697 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003698 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003699 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003700 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003701
3702 gma_write16(hw, port, GM_RX_CTRL, reg);
3703}
3704
stephen hemminger0885a302010-12-31 15:34:27 +00003705static struct rtnl_link_stats64 *sky2_get_stats(struct net_device *dev,
3706 struct rtnl_link_stats64 *stats)
3707{
3708 struct sky2_port *sky2 = netdev_priv(dev);
3709 struct sky2_hw *hw = sky2->hw;
3710 unsigned port = sky2->port;
3711 unsigned int start;
3712 u64 _bytes, _packets;
3713
3714 do {
3715 start = u64_stats_fetch_begin_bh(&sky2->rx_stats.syncp);
3716 _bytes = sky2->rx_stats.bytes;
3717 _packets = sky2->rx_stats.packets;
3718 } while (u64_stats_fetch_retry_bh(&sky2->rx_stats.syncp, start));
3719
3720 stats->rx_packets = _packets;
3721 stats->rx_bytes = _bytes;
3722
3723 do {
3724 start = u64_stats_fetch_begin_bh(&sky2->tx_stats.syncp);
3725 _bytes = sky2->tx_stats.bytes;
3726 _packets = sky2->tx_stats.packets;
3727 } while (u64_stats_fetch_retry_bh(&sky2->tx_stats.syncp, start));
3728
3729 stats->tx_packets = _packets;
3730 stats->tx_bytes = _bytes;
3731
3732 stats->multicast = get_stats32(hw, port, GM_RXF_MC_OK)
3733 + get_stats32(hw, port, GM_RXF_BC_OK);
3734
3735 stats->collisions = get_stats32(hw, port, GM_TXF_COL);
3736
3737 stats->rx_length_errors = get_stats32(hw, port, GM_RXF_LNG_ERR);
3738 stats->rx_crc_errors = get_stats32(hw, port, GM_RXF_FCS_ERR);
3739 stats->rx_frame_errors = get_stats32(hw, port, GM_RXF_SHT)
3740 + get_stats32(hw, port, GM_RXE_FRAG);
3741 stats->rx_over_errors = get_stats32(hw, port, GM_RXE_FIFO_OV);
3742
3743 stats->rx_dropped = dev->stats.rx_dropped;
3744 stats->rx_fifo_errors = dev->stats.rx_fifo_errors;
3745 stats->tx_fifo_errors = dev->stats.tx_fifo_errors;
3746
3747 return stats;
3748}
3749
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003750/* Can have one global because blinking is controlled by
3751 * ethtool and that is always under RTNL mutex
3752 */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003753static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003754{
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003755 struct sky2_hw *hw = sky2->hw;
3756 unsigned port = sky2->port;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003757
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003758 spin_lock_bh(&sky2->phy_lock);
3759 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3760 hw->chip_id == CHIP_ID_YUKON_EX ||
3761 hw->chip_id == CHIP_ID_YUKON_SUPR) {
3762 u16 pg;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003763 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3764 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003765
3766 switch (mode) {
3767 case MO_LED_OFF:
3768 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3769 PHY_M_LEDC_LOS_CTRL(8) |
3770 PHY_M_LEDC_INIT_CTRL(8) |
3771 PHY_M_LEDC_STA1_CTRL(8) |
3772 PHY_M_LEDC_STA0_CTRL(8));
3773 break;
3774 case MO_LED_ON:
3775 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3776 PHY_M_LEDC_LOS_CTRL(9) |
3777 PHY_M_LEDC_INIT_CTRL(9) |
3778 PHY_M_LEDC_STA1_CTRL(9) |
3779 PHY_M_LEDC_STA0_CTRL(9));
3780 break;
3781 case MO_LED_BLINK:
3782 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3783 PHY_M_LEDC_LOS_CTRL(0xa) |
3784 PHY_M_LEDC_INIT_CTRL(0xa) |
3785 PHY_M_LEDC_STA1_CTRL(0xa) |
3786 PHY_M_LEDC_STA0_CTRL(0xa));
3787 break;
3788 case MO_LED_NORM:
3789 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3790 PHY_M_LEDC_LOS_CTRL(1) |
3791 PHY_M_LEDC_INIT_CTRL(8) |
3792 PHY_M_LEDC_STA1_CTRL(7) |
3793 PHY_M_LEDC_STA0_CTRL(7));
3794 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003795
3796 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003797 } else
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04003798 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003799 PHY_M_LED_MO_DUP(mode) |
3800 PHY_M_LED_MO_10(mode) |
3801 PHY_M_LED_MO_100(mode) |
3802 PHY_M_LED_MO_1000(mode) |
3803 PHY_M_LED_MO_RX(mode) |
3804 PHY_M_LED_MO_TX(mode));
3805
3806 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003807}
3808
3809/* blink LED's for finding board */
stephen hemminger74e532f2011-04-04 08:43:41 +00003810static int sky2_set_phys_id(struct net_device *dev,
3811 enum ethtool_phys_id_state state)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003812{
3813 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003814
stephen hemminger74e532f2011-04-04 08:43:41 +00003815 switch (state) {
3816 case ETHTOOL_ID_ACTIVE:
Allan, Bruce Wfce55922011-04-13 13:09:10 +00003817 return 1; /* cycle on/off once per second */
stephen hemminger74e532f2011-04-04 08:43:41 +00003818 case ETHTOOL_ID_INACTIVE:
3819 sky2_led(sky2, MO_LED_NORM);
3820 break;
3821 case ETHTOOL_ID_ON:
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003822 sky2_led(sky2, MO_LED_ON);
stephen hemminger74e532f2011-04-04 08:43:41 +00003823 break;
3824 case ETHTOOL_ID_OFF:
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003825 sky2_led(sky2, MO_LED_OFF);
stephen hemminger74e532f2011-04-04 08:43:41 +00003826 break;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003827 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003828
3829 return 0;
3830}
3831
3832static void sky2_get_pauseparam(struct net_device *dev,
3833 struct ethtool_pauseparam *ecmd)
3834{
3835 struct sky2_port *sky2 = netdev_priv(dev);
3836
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003837 switch (sky2->flow_mode) {
3838 case FC_NONE:
3839 ecmd->tx_pause = ecmd->rx_pause = 0;
3840 break;
3841 case FC_TX:
3842 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3843 break;
3844 case FC_RX:
3845 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3846 break;
3847 case FC_BOTH:
3848 ecmd->tx_pause = ecmd->rx_pause = 1;
3849 }
3850
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003851 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_PAUSE)
3852 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003853}
3854
3855static int sky2_set_pauseparam(struct net_device *dev,
3856 struct ethtool_pauseparam *ecmd)
3857{
3858 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003859
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003860 if (ecmd->autoneg == AUTONEG_ENABLE)
3861 sky2->flags |= SKY2_FLAG_AUTO_PAUSE;
3862 else
3863 sky2->flags &= ~SKY2_FLAG_AUTO_PAUSE;
3864
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003865 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003866
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003867 if (netif_running(dev))
3868 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003869
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003870 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003871}
3872
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003873static int sky2_get_coalesce(struct net_device *dev,
3874 struct ethtool_coalesce *ecmd)
3875{
3876 struct sky2_port *sky2 = netdev_priv(dev);
3877 struct sky2_hw *hw = sky2->hw;
3878
3879 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3880 ecmd->tx_coalesce_usecs = 0;
3881 else {
3882 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3883 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3884 }
3885 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3886
3887 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3888 ecmd->rx_coalesce_usecs = 0;
3889 else {
3890 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3891 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3892 }
3893 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3894
3895 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3896 ecmd->rx_coalesce_usecs_irq = 0;
3897 else {
3898 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3899 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3900 }
3901
3902 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3903
3904 return 0;
3905}
3906
3907/* Note: this affect both ports */
3908static int sky2_set_coalesce(struct net_device *dev,
3909 struct ethtool_coalesce *ecmd)
3910{
3911 struct sky2_port *sky2 = netdev_priv(dev);
3912 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003913 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003914
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003915 if (ecmd->tx_coalesce_usecs > tmax ||
3916 ecmd->rx_coalesce_usecs > tmax ||
3917 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003918 return -EINVAL;
3919
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003920 if (ecmd->tx_max_coalesced_frames >= sky2->tx_ring_size-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003921 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003922 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003923 return -EINVAL;
Mike McCormack060b9462010-07-29 03:34:52 +00003924 if (ecmd->rx_max_coalesced_frames_irq > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003925 return -EINVAL;
3926
3927 if (ecmd->tx_coalesce_usecs == 0)
3928 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3929 else {
3930 sky2_write32(hw, STAT_TX_TIMER_INI,
3931 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3932 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3933 }
3934 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3935
3936 if (ecmd->rx_coalesce_usecs == 0)
3937 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3938 else {
3939 sky2_write32(hw, STAT_LEV_TIMER_INI,
3940 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3941 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3942 }
3943 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3944
3945 if (ecmd->rx_coalesce_usecs_irq == 0)
3946 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3947 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003948 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003949 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3950 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3951 }
3952 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3953 return 0;
3954}
3955
Stephen Hemminger793b8832005-09-14 16:06:14 -07003956static void sky2_get_ringparam(struct net_device *dev,
3957 struct ethtool_ringparam *ering)
3958{
3959 struct sky2_port *sky2 = netdev_priv(dev);
3960
3961 ering->rx_max_pending = RX_MAX_PENDING;
3962 ering->rx_mini_max_pending = 0;
3963 ering->rx_jumbo_max_pending = 0;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003964 ering->tx_max_pending = TX_MAX_PENDING;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003965
3966 ering->rx_pending = sky2->rx_pending;
3967 ering->rx_mini_pending = 0;
3968 ering->rx_jumbo_pending = 0;
3969 ering->tx_pending = sky2->tx_pending;
3970}
3971
3972static int sky2_set_ringparam(struct net_device *dev,
3973 struct ethtool_ringparam *ering)
3974{
3975 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003976
3977 if (ering->rx_pending > RX_MAX_PENDING ||
3978 ering->rx_pending < 8 ||
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003979 ering->tx_pending < TX_MIN_PENDING ||
3980 ering->tx_pending > TX_MAX_PENDING)
Stephen Hemminger793b8832005-09-14 16:06:14 -07003981 return -EINVAL;
3982
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003983 sky2_detach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003984
3985 sky2->rx_pending = ering->rx_pending;
3986 sky2->tx_pending = ering->tx_pending;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003987 sky2->tx_ring_size = roundup_pow_of_two(sky2->tx_pending+1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003988
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003989 return sky2_reattach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003990}
3991
Stephen Hemminger793b8832005-09-14 16:06:14 -07003992static int sky2_get_regs_len(struct net_device *dev)
3993{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003994 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003995}
3996
Mike McCormackc32bbff2009-12-31 00:49:43 +00003997static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b)
3998{
3999 /* This complicated switch statement is to make sure and
4000 * only access regions that are unreserved.
4001 * Some blocks are only valid on dual port cards.
4002 */
4003 switch (b) {
4004 /* second port */
4005 case 5: /* Tx Arbiter 2 */
4006 case 9: /* RX2 */
4007 case 14 ... 15: /* TX2 */
4008 case 17: case 19: /* Ram Buffer 2 */
4009 case 22 ... 23: /* Tx Ram Buffer 2 */
4010 case 25: /* Rx MAC Fifo 1 */
4011 case 27: /* Tx MAC Fifo 2 */
4012 case 31: /* GPHY 2 */
4013 case 40 ... 47: /* Pattern Ram 2 */
4014 case 52: case 54: /* TCP Segmentation 2 */
4015 case 112 ... 116: /* GMAC 2 */
4016 return hw->ports > 1;
4017
4018 case 0: /* Control */
4019 case 2: /* Mac address */
4020 case 4: /* Tx Arbiter 1 */
4021 case 7: /* PCI express reg */
4022 case 8: /* RX1 */
4023 case 12 ... 13: /* TX1 */
4024 case 16: case 18:/* Rx Ram Buffer 1 */
4025 case 20 ... 21: /* Tx Ram Buffer 1 */
4026 case 24: /* Rx MAC Fifo 1 */
4027 case 26: /* Tx MAC Fifo 1 */
4028 case 28 ... 29: /* Descriptor and status unit */
4029 case 30: /* GPHY 1*/
4030 case 32 ... 39: /* Pattern Ram 1 */
4031 case 48: case 50: /* TCP Segmentation 1 */
4032 case 56 ... 60: /* PCI space */
4033 case 80 ... 84: /* GMAC 1 */
4034 return 1;
4035
4036 default:
4037 return 0;
4038 }
4039}
4040
Stephen Hemminger793b8832005-09-14 16:06:14 -07004041/*
4042 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07004043 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07004044 */
4045static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
4046 void *p)
4047{
4048 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004049 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004050 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004051
4052 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004053
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004054 for (b = 0; b < 128; b++) {
Mike McCormackc32bbff2009-12-31 00:49:43 +00004055 /* skip poisonous diagnostic ram region in block 3 */
4056 if (b == 3)
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004057 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
Mike McCormackc32bbff2009-12-31 00:49:43 +00004058 else if (sky2_reg_access_ok(sky2->hw, b))
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004059 memcpy_fromio(p, io, 128);
Mike McCormackc32bbff2009-12-31 00:49:43 +00004060 else
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004061 memset(p, 0, 128);
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07004062
Stephen Hemminger295b54c2007-10-11 19:47:22 -07004063 p += 128;
4064 io += 128;
4065 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07004066}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004067
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004068static int sky2_get_eeprom_len(struct net_device *dev)
4069{
4070 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004071 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004072 u16 reg2;
4073
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004074 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004075 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4076}
4077
Stephen Hemminger14132352008-08-27 20:46:26 -07004078static int sky2_vpd_wait(const struct sky2_hw *hw, int cap, u16 busy)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004079{
Stephen Hemminger14132352008-08-27 20:46:26 -07004080 unsigned long start = jiffies;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004081
Stephen Hemminger14132352008-08-27 20:46:26 -07004082 while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) {
4083 /* Can take up to 10.6 ms for write */
4084 if (time_after(jiffies, start + HZ/4)) {
Joe Perchesada1db52010-02-17 15:01:59 +00004085 dev_err(&hw->pdev->dev, "VPD cycle timed out\n");
Stephen Hemminger14132352008-08-27 20:46:26 -07004086 return -ETIMEDOUT;
4087 }
4088 mdelay(1);
4089 }
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004090
Stephen Hemminger14132352008-08-27 20:46:26 -07004091 return 0;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004092}
4093
Stephen Hemminger14132352008-08-27 20:46:26 -07004094static int sky2_vpd_read(struct sky2_hw *hw, int cap, void *data,
4095 u16 offset, size_t length)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004096{
Stephen Hemminger14132352008-08-27 20:46:26 -07004097 int rc = 0;
4098
4099 while (length > 0) {
4100 u32 val;
4101
4102 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
4103 rc = sky2_vpd_wait(hw, cap, 0);
4104 if (rc)
4105 break;
4106
4107 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
4108
4109 memcpy(data, &val, min(sizeof(val), length));
4110 offset += sizeof(u32);
4111 data += sizeof(u32);
4112 length -= sizeof(u32);
4113 }
4114
4115 return rc;
4116}
4117
4118static int sky2_vpd_write(struct sky2_hw *hw, int cap, const void *data,
4119 u16 offset, unsigned int length)
4120{
4121 unsigned int i;
4122 int rc = 0;
4123
4124 for (i = 0; i < length; i += sizeof(u32)) {
4125 u32 val = *(u32 *)(data + i);
4126
4127 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val);
4128 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
4129
4130 rc = sky2_vpd_wait(hw, cap, PCI_VPD_ADDR_F);
4131 if (rc)
4132 break;
4133 }
4134 return rc;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004135}
4136
4137static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4138 u8 *data)
4139{
4140 struct sky2_port *sky2 = netdev_priv(dev);
4141 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004142
4143 if (!cap)
4144 return -EINVAL;
4145
4146 eeprom->magic = SKY2_EEPROM_MAGIC;
4147
Stephen Hemminger14132352008-08-27 20:46:26 -07004148 return sky2_vpd_read(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004149}
4150
4151static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4152 u8 *data)
4153{
4154 struct sky2_port *sky2 = netdev_priv(dev);
4155 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004156
4157 if (!cap)
4158 return -EINVAL;
4159
4160 if (eeprom->magic != SKY2_EEPROM_MAGIC)
4161 return -EINVAL;
4162
Stephen Hemminger14132352008-08-27 20:46:26 -07004163 /* Partial writes not supported */
4164 if ((eeprom->offset & 3) || (eeprom->len & 3))
4165 return -EINVAL;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004166
Stephen Hemminger14132352008-08-27 20:46:26 -07004167 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004168}
4169
Michał Mirosławf5d64032011-04-10 03:13:21 +00004170static u32 sky2_fix_features(struct net_device *dev, u32 features)
4171{
4172 const struct sky2_port *sky2 = netdev_priv(dev);
4173 const struct sky2_hw *hw = sky2->hw;
4174
4175 /* In order to do Jumbo packets on these chips, need to turn off the
4176 * transmit store/forward. Therefore checksum offload won't work.
4177 */
4178 if (dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U)
4179 features &= ~(NETIF_F_TSO|NETIF_F_SG|NETIF_F_ALL_CSUM);
4180
4181 return features;
4182}
4183
4184static int sky2_set_features(struct net_device *dev, u32 features)
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004185{
4186 struct sky2_port *sky2 = netdev_priv(dev);
Michał Mirosławf5d64032011-04-10 03:13:21 +00004187 u32 changed = dev->features ^ features;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004188
Michał Mirosławf5d64032011-04-10 03:13:21 +00004189 if (changed & NETIF_F_RXCSUM) {
4190 u32 on = features & NETIF_F_RXCSUM;
4191 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
4192 on ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
4193 }
Stephen Hemminger86aa7782011-01-09 15:54:15 -08004194
Michał Mirosławf5d64032011-04-10 03:13:21 +00004195 if (changed & NETIF_F_RXHASH)
4196 rx_set_rss(dev, features);
Stephen Hemminger86aa7782011-01-09 15:54:15 -08004197
Michał Mirosławf5d64032011-04-10 03:13:21 +00004198 if (changed & (NETIF_F_HW_VLAN_TX|NETIF_F_HW_VLAN_RX))
4199 sky2_vlan_mode(dev, features);
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004200
4201 return 0;
4202}
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004203
Jeff Garzik7282d492006-09-13 14:30:00 -04004204static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004205 .get_settings = sky2_get_settings,
4206 .set_settings = sky2_set_settings,
4207 .get_drvinfo = sky2_get_drvinfo,
4208 .get_wol = sky2_get_wol,
4209 .set_wol = sky2_set_wol,
4210 .get_msglevel = sky2_get_msglevel,
4211 .set_msglevel = sky2_set_msglevel,
4212 .nway_reset = sky2_nway_reset,
4213 .get_regs_len = sky2_get_regs_len,
4214 .get_regs = sky2_get_regs,
4215 .get_link = ethtool_op_get_link,
4216 .get_eeprom_len = sky2_get_eeprom_len,
4217 .get_eeprom = sky2_get_eeprom,
4218 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004219 .get_strings = sky2_get_strings,
4220 .get_coalesce = sky2_get_coalesce,
4221 .set_coalesce = sky2_set_coalesce,
4222 .get_ringparam = sky2_get_ringparam,
4223 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004224 .get_pauseparam = sky2_get_pauseparam,
4225 .set_pauseparam = sky2_set_pauseparam,
stephen hemminger74e532f2011-04-04 08:43:41 +00004226 .set_phys_id = sky2_set_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004227 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004228 .get_ethtool_stats = sky2_get_ethtool_stats,
4229};
4230
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004231#ifdef CONFIG_SKY2_DEBUG
4232
4233static struct dentry *sky2_debug;
4234
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004235
4236/*
4237 * Read and parse the first part of Vital Product Data
4238 */
4239#define VPD_SIZE 128
4240#define VPD_MAGIC 0x82
4241
4242static const struct vpd_tag {
4243 char tag[2];
4244 char *label;
4245} vpd_tags[] = {
4246 { "PN", "Part Number" },
4247 { "EC", "Engineering Level" },
4248 { "MN", "Manufacturer" },
4249 { "SN", "Serial Number" },
4250 { "YA", "Asset Tag" },
4251 { "VL", "First Error Log Message" },
4252 { "VF", "Second Error Log Message" },
4253 { "VB", "Boot Agent ROM Configuration" },
4254 { "VE", "EFI UNDI Configuration" },
4255};
4256
4257static void sky2_show_vpd(struct seq_file *seq, struct sky2_hw *hw)
4258{
4259 size_t vpd_size;
4260 loff_t offs;
4261 u8 len;
4262 unsigned char *buf;
4263 u16 reg2;
4264
4265 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
4266 vpd_size = 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4267
4268 seq_printf(seq, "%s Product Data\n", pci_name(hw->pdev));
4269 buf = kmalloc(vpd_size, GFP_KERNEL);
4270 if (!buf) {
4271 seq_puts(seq, "no memory!\n");
4272 return;
4273 }
4274
4275 if (pci_read_vpd(hw->pdev, 0, vpd_size, buf) < 0) {
4276 seq_puts(seq, "VPD read failed\n");
4277 goto out;
4278 }
4279
4280 if (buf[0] != VPD_MAGIC) {
4281 seq_printf(seq, "VPD tag mismatch: %#x\n", buf[0]);
4282 goto out;
4283 }
4284 len = buf[1];
4285 if (len == 0 || len > vpd_size - 4) {
4286 seq_printf(seq, "Invalid id length: %d\n", len);
4287 goto out;
4288 }
4289
4290 seq_printf(seq, "%.*s\n", len, buf + 3);
4291 offs = len + 3;
4292
4293 while (offs < vpd_size - 4) {
4294 int i;
4295
4296 if (!memcmp("RW", buf + offs, 2)) /* end marker */
4297 break;
4298 len = buf[offs + 2];
4299 if (offs + len + 3 >= vpd_size)
4300 break;
4301
4302 for (i = 0; i < ARRAY_SIZE(vpd_tags); i++) {
4303 if (!memcmp(vpd_tags[i].tag, buf + offs, 2)) {
4304 seq_printf(seq, " %s: %.*s\n",
4305 vpd_tags[i].label, len, buf + offs + 3);
4306 break;
4307 }
4308 }
4309 offs += len + 3;
4310 }
4311out:
4312 kfree(buf);
4313}
4314
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004315static int sky2_debug_show(struct seq_file *seq, void *v)
4316{
4317 struct net_device *dev = seq->private;
4318 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004319 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004320 unsigned port = sky2->port;
4321 unsigned idx, last;
4322 int sop;
4323
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004324 sky2_show_vpd(seq, hw);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004325
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004326 seq_printf(seq, "\nIRQ src=%x mask=%x control=%x\n",
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004327 sky2_read32(hw, B0_ISRC),
4328 sky2_read32(hw, B0_IMSK),
4329 sky2_read32(hw, B0_Y2_SP_ICR));
4330
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004331 if (!netif_running(dev)) {
4332 seq_printf(seq, "network not running\n");
4333 return 0;
4334 }
4335
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004336 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004337 last = sky2_read16(hw, STAT_PUT_IDX);
4338
stephen hemmingerefe91932010-04-22 13:42:56 +00004339 seq_printf(seq, "Status ring %u\n", hw->st_size);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004340 if (hw->st_idx == last)
4341 seq_puts(seq, "Status ring (empty)\n");
4342 else {
4343 seq_puts(seq, "Status ring\n");
stephen hemmingerefe91932010-04-22 13:42:56 +00004344 for (idx = hw->st_idx; idx != last && idx < hw->st_size;
4345 idx = RING_NEXT(idx, hw->st_size)) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004346 const struct sky2_status_le *le = hw->st_le + idx;
4347 seq_printf(seq, "[%d] %#x %d %#x\n",
4348 idx, le->opcode, le->length, le->status);
4349 }
4350 seq_puts(seq, "\n");
4351 }
4352
4353 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
4354 sky2->tx_cons, sky2->tx_prod,
4355 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
4356 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
4357
4358 /* Dump contents of tx ring */
4359 sop = 1;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004360 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < sky2->tx_ring_size;
4361 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004362 const struct sky2_tx_le *le = sky2->tx_le + idx;
4363 u32 a = le32_to_cpu(le->addr);
4364
4365 if (sop)
4366 seq_printf(seq, "%u:", idx);
4367 sop = 0;
4368
Mike McCormack060b9462010-07-29 03:34:52 +00004369 switch (le->opcode & ~HW_OWNER) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004370 case OP_ADDR64:
4371 seq_printf(seq, " %#x:", a);
4372 break;
4373 case OP_LRGLEN:
4374 seq_printf(seq, " mtu=%d", a);
4375 break;
4376 case OP_VLAN:
4377 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
4378 break;
4379 case OP_TCPLISW:
4380 seq_printf(seq, " csum=%#x", a);
4381 break;
4382 case OP_LARGESEND:
4383 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
4384 break;
4385 case OP_PACKET:
4386 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
4387 break;
4388 case OP_BUFFER:
4389 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
4390 break;
4391 default:
4392 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
4393 a, le16_to_cpu(le->length));
4394 }
4395
4396 if (le->ctrl & EOP) {
4397 seq_putc(seq, '\n');
4398 sop = 1;
4399 }
4400 }
4401
4402 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
4403 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
Mike McCormackc409c342009-07-21 14:51:20 +00004404 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004405 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
4406
David S. Millerd1d08d12008-01-07 20:53:33 -08004407 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004408 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004409 return 0;
4410}
4411
4412static int sky2_debug_open(struct inode *inode, struct file *file)
4413{
4414 return single_open(file, sky2_debug_show, inode->i_private);
4415}
4416
4417static const struct file_operations sky2_debug_fops = {
4418 .owner = THIS_MODULE,
4419 .open = sky2_debug_open,
4420 .read = seq_read,
4421 .llseek = seq_lseek,
4422 .release = single_release,
4423};
4424
4425/*
4426 * Use network device events to create/remove/rename
4427 * debugfs file entries
4428 */
4429static int sky2_device_event(struct notifier_block *unused,
4430 unsigned long event, void *ptr)
4431{
4432 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004433 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004434
Stephen Hemminger1436b302008-11-19 21:59:54 -08004435 if (dev->netdev_ops->ndo_open != sky2_up || !sky2_debug)
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004436 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004437
Mike McCormack060b9462010-07-29 03:34:52 +00004438 switch (event) {
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004439 case NETDEV_CHANGENAME:
4440 if (sky2->debugfs) {
4441 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
4442 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004443 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004444 break;
4445
4446 case NETDEV_GOING_DOWN:
4447 if (sky2->debugfs) {
Joe Perchesada1db52010-02-17 15:01:59 +00004448 netdev_printk(KERN_DEBUG, dev, "remove debugfs\n");
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004449 debugfs_remove(sky2->debugfs);
4450 sky2->debugfs = NULL;
4451 }
4452 break;
4453
4454 case NETDEV_UP:
4455 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
4456 sky2_debug, dev,
4457 &sky2_debug_fops);
4458 if (IS_ERR(sky2->debugfs))
4459 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004460 }
4461
4462 return NOTIFY_DONE;
4463}
4464
4465static struct notifier_block sky2_notifier = {
4466 .notifier_call = sky2_device_event,
4467};
4468
4469
4470static __init void sky2_debug_init(void)
4471{
4472 struct dentry *ent;
4473
4474 ent = debugfs_create_dir("sky2", NULL);
4475 if (!ent || IS_ERR(ent))
4476 return;
4477
4478 sky2_debug = ent;
4479 register_netdevice_notifier(&sky2_notifier);
4480}
4481
4482static __exit void sky2_debug_cleanup(void)
4483{
4484 if (sky2_debug) {
4485 unregister_netdevice_notifier(&sky2_notifier);
4486 debugfs_remove(sky2_debug);
4487 sky2_debug = NULL;
4488 }
4489}
4490
4491#else
4492#define sky2_debug_init()
4493#define sky2_debug_cleanup()
4494#endif
4495
Stephen Hemminger1436b302008-11-19 21:59:54 -08004496/* Two copies of network device operations to handle special case of
4497 not allowing netpoll on second port */
4498static const struct net_device_ops sky2_netdev_ops[2] = {
4499 {
4500 .ndo_open = sky2_up,
4501 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004502 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004503 .ndo_do_ioctl = sky2_ioctl,
4504 .ndo_validate_addr = eth_validate_addr,
4505 .ndo_set_mac_address = sky2_set_mac_address,
4506 .ndo_set_multicast_list = sky2_set_multicast,
4507 .ndo_change_mtu = sky2_change_mtu,
Michał Mirosławf5d64032011-04-10 03:13:21 +00004508 .ndo_fix_features = sky2_fix_features,
4509 .ndo_set_features = sky2_set_features,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004510 .ndo_tx_timeout = sky2_tx_timeout,
stephen hemminger0885a302010-12-31 15:34:27 +00004511 .ndo_get_stats64 = sky2_get_stats,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004512#ifdef CONFIG_NET_POLL_CONTROLLER
4513 .ndo_poll_controller = sky2_netpoll,
4514#endif
4515 },
4516 {
4517 .ndo_open = sky2_up,
4518 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004519 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004520 .ndo_do_ioctl = sky2_ioctl,
4521 .ndo_validate_addr = eth_validate_addr,
4522 .ndo_set_mac_address = sky2_set_mac_address,
4523 .ndo_set_multicast_list = sky2_set_multicast,
4524 .ndo_change_mtu = sky2_change_mtu,
Michał Mirosławf5d64032011-04-10 03:13:21 +00004525 .ndo_fix_features = sky2_fix_features,
4526 .ndo_set_features = sky2_set_features,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004527 .ndo_tx_timeout = sky2_tx_timeout,
stephen hemminger0885a302010-12-31 15:34:27 +00004528 .ndo_get_stats64 = sky2_get_stats,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004529 },
4530};
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004531
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004532/* Initialize network device */
4533static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08004534 unsigned port,
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004535 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004536{
4537 struct sky2_port *sky2;
4538 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
4539
4540 if (!dev) {
Joe Perches898eb712007-10-18 03:06:30 -07004541 dev_err(&hw->pdev->dev, "etherdev alloc failed\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004542 return NULL;
4543 }
4544
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004545 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004546 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004547 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004548 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemminger1436b302008-11-19 21:59:54 -08004549 dev->netdev_ops = &sky2_netdev_ops[port];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004550
4551 sky2 = netdev_priv(dev);
4552 sky2->netdev = dev;
4553 sky2->hw = hw;
4554 sky2->msg_enable = netif_msg_init(debug, default_msg);
4555
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004556 /* Auto speed and flow control */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07004557 sky2->flags = SKY2_FLAG_AUTO_SPEED | SKY2_FLAG_AUTO_PAUSE;
4558 if (hw->chip_id != CHIP_ID_YUKON_XL)
Michał Mirosławf5d64032011-04-10 03:13:21 +00004559 dev->hw_features |= NETIF_F_RXCSUM;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07004560
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004561 sky2->flow_mode = FC_BOTH;
4562
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004563 sky2->duplex = -1;
4564 sky2->speed = -1;
4565 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004566 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08004567
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08004568 spin_lock_init(&sky2->phy_lock);
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004569
Stephen Hemminger793b8832005-09-14 16:06:14 -07004570 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004571 sky2->tx_ring_size = roundup_pow_of_two(TX_DEF_PENDING+1);
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004572 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004573
4574 hw->dev[port] = dev;
4575
4576 sky2->port = port;
4577
Michał Mirosławf5d64032011-04-10 03:13:21 +00004578 dev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_TSO;
Stephen Hemminger86aa7782011-01-09 15:54:15 -08004579
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004580 if (highmem)
4581 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004582
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004583 /* Enable receive hashing unless hardware is known broken */
4584 if (!(hw->flags & SKY2_HW_RSS_BROKEN))
Michał Mirosławf5d64032011-04-10 03:13:21 +00004585 dev->hw_features |= NETIF_F_RXHASH;
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004586
Michał Mirosławf5d64032011-04-10 03:13:21 +00004587 if (!(hw->flags & SKY2_HW_VLAN_BROKEN)) {
4588 dev->hw_features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
4589 dev->vlan_features |= SKY2_VLAN_OFFLOADS;
4590 }
4591
4592 dev->features |= dev->hw_features;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004593
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004594 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004595 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07004596 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004597
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004598 return dev;
4599}
4600
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004601static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004602{
4603 const struct sky2_port *sky2 = netdev_priv(dev);
4604
Joe Perches6c35aba2010-02-15 08:34:21 +00004605 netif_info(sky2, probe, dev, "addr %pM\n", dev->dev_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004606}
4607
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004608/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004609static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004610{
4611 struct sky2_hw *hw = dev_id;
4612 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4613
4614 if (status == 0)
4615 return IRQ_NONE;
4616
4617 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004618 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004619 wake_up(&hw->msi_wait);
4620 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4621 }
4622 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4623
4624 return IRQ_HANDLED;
4625}
4626
4627/* Test interrupt path by forcing a a software IRQ */
4628static int __devinit sky2_test_msi(struct sky2_hw *hw)
4629{
4630 struct pci_dev *pdev = hw->pdev;
4631 int err;
4632
Mike McCormack060b9462010-07-29 03:34:52 +00004633 init_waitqueue_head(&hw->msi_wait);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004634
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004635 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4636
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004637 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004638 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004639 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004640 return err;
4641 }
4642
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004643 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004644 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004645
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004646 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004647
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004648 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004649 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004650 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4651 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004652
4653 err = -EOPNOTSUPP;
4654 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4655 }
4656
4657 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004658 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004659
4660 free_irq(pdev->irq, hw);
4661
4662 return err;
4663}
4664
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004665/* This driver supports yukon2 chipset only */
4666static const char *sky2_name(u8 chipid, char *buf, int sz)
4667{
4668 const char *name[] = {
4669 "XL", /* 0xb3 */
4670 "EC Ultra", /* 0xb4 */
4671 "Extreme", /* 0xb5 */
4672 "EC", /* 0xb6 */
4673 "FE", /* 0xb7 */
4674 "FE+", /* 0xb8 */
4675 "Supreme", /* 0xb9 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004676 "UL 2", /* 0xba */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00004677 "Unknown", /* 0xbb */
4678 "Optima", /* 0xbc */
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004679 };
4680
stephen hemmingerdae3a512009-12-14 08:33:47 +00004681 if (chipid >= CHIP_ID_YUKON_XL && chipid <= CHIP_ID_YUKON_OPT)
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004682 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
4683 else
4684 snprintf(buf, sz, "(chip %#x)", chipid);
4685 return buf;
4686}
4687
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004688static int __devinit sky2_probe(struct pci_dev *pdev,
4689 const struct pci_device_id *ent)
4690{
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004691 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004692 struct sky2_hw *hw;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004693 int err, using_dac = 0, wol_default;
Stephen Hemminger38345072009-02-03 11:27:30 +00004694 u32 reg;
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004695 char buf1[16];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004696
Stephen Hemminger793b8832005-09-14 16:06:14 -07004697 err = pci_enable_device(pdev);
4698 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004699 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004700 goto err_out;
4701 }
4702
Stephen Hemminger6cc90a52009-06-11 07:03:47 +00004703 /* Get configuration information
4704 * Note: only regular PCI config access once to test for HW issues
4705 * other PCI access through shared memory for speed and to
4706 * avoid MMCONFIG problems.
4707 */
4708 err = pci_read_config_dword(pdev, PCI_DEV_REG2, &reg);
4709 if (err) {
4710 dev_err(&pdev->dev, "PCI read config failed\n");
4711 goto err_out;
4712 }
4713
4714 if (~reg == 0) {
4715 dev_err(&pdev->dev, "PCI configuration read error\n");
4716 goto err_out;
4717 }
4718
Stephen Hemminger793b8832005-09-14 16:06:14 -07004719 err = pci_request_regions(pdev, DRV_NAME);
4720 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004721 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004722 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004723 }
4724
4725 pci_set_master(pdev);
4726
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004727 if (sizeof(dma_addr_t) > sizeof(u32) &&
Yang Hongyang6a355282009-04-06 19:01:13 -07004728 !(err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))) {
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004729 using_dac = 1;
Yang Hongyang6a355282009-04-06 19:01:13 -07004730 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004731 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004732 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4733 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004734 goto err_out_free_regions;
4735 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004736 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07004737 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004738 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004739 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004740 goto err_out_free_regions;
4741 }
4742 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004743
Stephen Hemminger38345072009-02-03 11:27:30 +00004744
4745#ifdef __BIG_ENDIAN
4746 /* The sk98lin vendor driver uses hardware byte swapping but
4747 * this driver uses software swapping.
4748 */
4749 reg &= ~PCI_REV_DESC;
Mike McCormack060b9462010-07-29 03:34:52 +00004750 err = pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
Stephen Hemminger38345072009-02-03 11:27:30 +00004751 if (err) {
4752 dev_err(&pdev->dev, "PCI write config failed\n");
4753 goto err_out_free_regions;
4754 }
4755#endif
4756
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07004757 wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004758
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004759 err = -ENOMEM;
Stephen Hemminger66466792009-10-01 07:11:46 +00004760
4761 hw = kzalloc(sizeof(*hw) + strlen(DRV_NAME "@pci:")
4762 + strlen(pci_name(pdev)) + 1, GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004763 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004764 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004765 goto err_out_free_regions;
4766 }
4767
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004768 hw->pdev = pdev;
Stephen Hemminger66466792009-10-01 07:11:46 +00004769 sprintf(hw->irq_name, DRV_NAME "@pci:%s", pci_name(pdev));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004770
4771 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4772 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004773 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004774 goto err_out_free_hw;
4775 }
4776
Stephen Hemmingere3173832007-02-06 10:45:39 -08004777 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004778 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004779 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004780
stephen hemmingerefe91932010-04-22 13:42:56 +00004781 /* ring for status responses */
Stephen Hemmingerbf731302010-04-24 20:04:12 -07004782 hw->st_size = hw->ports * roundup_pow_of_two(3*RX_MAX_PENDING + TX_MAX_PENDING);
stephen hemmingerefe91932010-04-22 13:42:56 +00004783 hw->st_le = pci_alloc_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
4784 &hw->st_dma);
4785 if (!hw->st_le)
4786 goto err_out_reset;
4787
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004788 dev_info(&pdev->dev, "Yukon-2 %s chip revision %d\n",
4789 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004790
Stephen Hemmingere3173832007-02-06 10:45:39 -08004791 sky2_reset(hw);
4792
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004793 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004794 if (!dev) {
4795 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004796 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004797 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004798
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004799 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4800 err = sky2_test_msi(hw);
4801 if (err == -EOPNOTSUPP)
4802 pci_disable_msi(pdev);
4803 else if (err)
4804 goto err_out_free_netdev;
4805 }
4806
Stephen Hemminger793b8832005-09-14 16:06:14 -07004807 err = register_netdev(dev);
4808 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004809 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004810 goto err_out_free_netdev;
4811 }
4812
Brandon Philips33cb7d32009-10-29 13:58:07 +00004813 netif_carrier_off(dev);
4814
Stephen Hemminger6de16232007-10-17 13:26:42 -07004815 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4816
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004817 err = request_irq(pdev->irq, sky2_intr,
4818 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemminger66466792009-10-01 07:11:46 +00004819 hw->irq_name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004820 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004821 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004822 goto err_out_unregister;
4823 }
4824 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004825 napi_enable(&hw->napi);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004826
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004827 sky2_show_addr(dev);
4828
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004829 if (hw->ports > 1) {
4830 struct net_device *dev1;
4831
Stephen Hemmingerca519272009-09-14 06:22:29 +00004832 err = -ENOMEM;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004833 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerca519272009-09-14 06:22:29 +00004834 if (dev1 && (err = register_netdev(dev1)) == 0)
4835 sky2_show_addr(dev1);
4836 else {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004837 dev_warn(&pdev->dev,
4838 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004839 hw->dev[1] = NULL;
Stephen Hemmingerca519272009-09-14 06:22:29 +00004840 hw->ports = 1;
4841 if (dev1)
4842 free_netdev(dev1);
4843 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004844 }
4845
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004846 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004847 INIT_WORK(&hw->restart_work, sky2_restart);
4848
Stephen Hemminger793b8832005-09-14 16:06:14 -07004849 pci_set_drvdata(pdev, hw);
Rafael J. Wysocki1ae861e2009-12-31 12:15:54 +01004850 pdev->d3_delay = 150;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004851
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004852 return 0;
4853
Stephen Hemminger793b8832005-09-14 16:06:14 -07004854err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004855 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004856 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004857 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004858err_out_free_netdev:
4859 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004860err_out_free_pci:
stephen hemmingerefe91932010-04-22 13:42:56 +00004861 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
4862 hw->st_le, hw->st_dma);
4863err_out_reset:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004864 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004865err_out_iounmap:
4866 iounmap(hw->regs);
4867err_out_free_hw:
4868 kfree(hw);
4869err_out_free_regions:
4870 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004871err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004872 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004873err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004874 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004875 return err;
4876}
4877
4878static void __devexit sky2_remove(struct pci_dev *pdev)
4879{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004880 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004881 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004882
Stephen Hemminger793b8832005-09-14 16:06:14 -07004883 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004884 return;
4885
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004886 del_timer_sync(&hw->watchdog_timer);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004887 cancel_work_sync(&hw->restart_work);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004888
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004889 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004890 unregister_netdev(hw->dev[i]);
Stephen Hemminger81906792007-02-15 16:40:33 -08004891
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004892 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004893
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004894 sky2_power_aux(hw);
4895
Stephen Hemminger793b8832005-09-14 16:06:14 -07004896 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004897 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004898
4899 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004900 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004901 pci_disable_msi(pdev);
stephen hemmingerefe91932010-04-22 13:42:56 +00004902 pci_free_consistent(pdev, hw->st_size * sizeof(struct sky2_status_le),
4903 hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004904 pci_release_regions(pdev);
4905 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004906
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004907 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004908 free_netdev(hw->dev[i]);
4909
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004910 iounmap(hw->regs);
4911 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004912
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004913 pci_set_drvdata(pdev, NULL);
4914}
4915
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00004916static int sky2_suspend(struct device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004917{
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00004918 struct pci_dev *pdev = to_pci_dev(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004919 struct sky2_hw *hw = pci_get_drvdata(pdev);
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00004920 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004921
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004922 if (!hw)
4923 return 0;
4924
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004925 del_timer_sync(&hw->watchdog_timer);
4926 cancel_work_sync(&hw->restart_work);
4927
Stephen Hemminger19720732009-08-14 05:15:16 +00004928 rtnl_lock();
Mike McCormack3403aca2010-05-13 06:12:52 +00004929
4930 sky2_all_down(hw);
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004931 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004932 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08004933 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004934
Stephen Hemmingere3173832007-02-06 10:45:39 -08004935 if (sky2->wol)
4936 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004937 }
4938
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004939 sky2_power_aux(hw);
Stephen Hemminger19720732009-08-14 05:15:16 +00004940 rtnl_unlock();
Stephen Hemmingere3173832007-02-06 10:45:39 -08004941
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09004942 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004943}
4944
Michel Lespinasse94252762011-03-06 16:14:50 +00004945#ifdef CONFIG_PM_SLEEP
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00004946static int sky2_resume(struct device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004947{
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00004948 struct pci_dev *pdev = to_pci_dev(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004949 struct sky2_hw *hw = pci_get_drvdata(pdev);
Mike McCormack3403aca2010-05-13 06:12:52 +00004950 int err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004951
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004952 if (!hw)
4953 return 0;
4954
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004955 /* Re-enable all clocks */
stephen hemmingera0db28b2010-02-07 06:23:53 +00004956 err = pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
4957 if (err) {
4958 dev_err(&pdev->dev, "PCI write config failed\n");
4959 goto out;
4960 }
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004961
Mike McCormack3403aca2010-05-13 06:12:52 +00004962 rtnl_lock();
Stephen Hemmingere3173832007-02-06 10:45:39 -08004963 sky2_reset(hw);
Mike McCormack3403aca2010-05-13 06:12:52 +00004964 sky2_all_up(hw);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004965 rtnl_unlock();
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004966
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004967 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004968out:
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004969
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004970 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004971 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004972 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004973}
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00004974
4975static SIMPLE_DEV_PM_OPS(sky2_pm_ops, sky2_suspend, sky2_resume);
4976#define SKY2_PM_OPS (&sky2_pm_ops)
4977
4978#else
4979
4980#define SKY2_PM_OPS NULL
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004981#endif
4982
Stephen Hemmingere3173832007-02-06 10:45:39 -08004983static void sky2_shutdown(struct pci_dev *pdev)
4984{
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00004985 sky2_suspend(&pdev->dev);
4986 pci_wake_from_d3(pdev, device_may_wakeup(&pdev->dev));
4987 pci_set_power_state(pdev, PCI_D3hot);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004988}
4989
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004990static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07004991 .name = DRV_NAME,
4992 .id_table = sky2_id_table,
4993 .probe = sky2_probe,
4994 .remove = __devexit_p(sky2_remove),
Stephen Hemmingere3173832007-02-06 10:45:39 -08004995 .shutdown = sky2_shutdown,
Rafael J. Wysocki0f333d12010-12-26 08:44:32 +00004996 .driver.pm = SKY2_PM_OPS,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004997};
4998
4999static int __init sky2_init_module(void)
5000{
Joe Perchesada1db52010-02-17 15:01:59 +00005001 pr_info("driver version " DRV_VERSION "\n");
Stephen Hemmingerc844d482008-08-27 20:48:23 -07005002
Stephen Hemminger3cf26752007-07-09 15:33:35 -07005003 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08005004 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005005}
5006
5007static void __exit sky2_cleanup_module(void)
5008{
5009 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07005010 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005011}
5012
5013module_init(sky2_init_module);
5014module_exit(sky2_cleanup_module);
5015
5016MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe632007-01-23 11:38:57 -08005017MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07005018MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08005019MODULE_VERSION(DRV_VERSION);