Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 1 | /* |
| 2 | * wm8580.c -- WM8580 ALSA Soc Audio driver |
| 3 | * |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 4 | * Copyright 2008, 2009 Wolfson Microelectronics PLC. |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | * |
| 11 | * Notes: |
| 12 | * The WM8580 is a multichannel codec with S/PDIF support, featuring six |
| 13 | * DAC channels and two ADC channels. |
| 14 | * |
| 15 | * Currently only the primary audio interface is supported - S/PDIF and |
| 16 | * the secondary audio interfaces are not. |
| 17 | */ |
| 18 | |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/moduleparam.h> |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 21 | #include <linux/kernel.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/pm.h> |
| 25 | #include <linux/i2c.h> |
| 26 | #include <linux/platform_device.h> |
Mark Brown | a583cd5 | 2009-06-17 17:30:14 +0100 | [diff] [blame] | 27 | #include <linux/regulator/consumer.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame^] | 28 | #include <linux/slab.h> |
Mark Brown | a583cd5 | 2009-06-17 17:30:14 +0100 | [diff] [blame] | 29 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 30 | #include <sound/core.h> |
| 31 | #include <sound/pcm.h> |
| 32 | #include <sound/pcm_params.h> |
| 33 | #include <sound/soc.h> |
| 34 | #include <sound/soc-dapm.h> |
| 35 | #include <sound/tlv.h> |
| 36 | #include <sound/initval.h> |
| 37 | #include <asm/div64.h> |
| 38 | |
| 39 | #include "wm8580.h" |
| 40 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 41 | /* WM8580 register space */ |
| 42 | #define WM8580_PLLA1 0x00 |
| 43 | #define WM8580_PLLA2 0x01 |
| 44 | #define WM8580_PLLA3 0x02 |
| 45 | #define WM8580_PLLA4 0x03 |
| 46 | #define WM8580_PLLB1 0x04 |
| 47 | #define WM8580_PLLB2 0x05 |
| 48 | #define WM8580_PLLB3 0x06 |
| 49 | #define WM8580_PLLB4 0x07 |
| 50 | #define WM8580_CLKSEL 0x08 |
| 51 | #define WM8580_PAIF1 0x09 |
| 52 | #define WM8580_PAIF2 0x0A |
| 53 | #define WM8580_SAIF1 0x0B |
| 54 | #define WM8580_PAIF3 0x0C |
| 55 | #define WM8580_PAIF4 0x0D |
| 56 | #define WM8580_SAIF2 0x0E |
| 57 | #define WM8580_DAC_CONTROL1 0x0F |
| 58 | #define WM8580_DAC_CONTROL2 0x10 |
| 59 | #define WM8580_DAC_CONTROL3 0x11 |
| 60 | #define WM8580_DAC_CONTROL4 0x12 |
| 61 | #define WM8580_DAC_CONTROL5 0x13 |
| 62 | #define WM8580_DIGITAL_ATTENUATION_DACL1 0x14 |
| 63 | #define WM8580_DIGITAL_ATTENUATION_DACR1 0x15 |
| 64 | #define WM8580_DIGITAL_ATTENUATION_DACL2 0x16 |
| 65 | #define WM8580_DIGITAL_ATTENUATION_DACR2 0x17 |
| 66 | #define WM8580_DIGITAL_ATTENUATION_DACL3 0x18 |
| 67 | #define WM8580_DIGITAL_ATTENUATION_DACR3 0x19 |
| 68 | #define WM8580_MASTER_DIGITAL_ATTENUATION 0x1C |
| 69 | #define WM8580_ADC_CONTROL1 0x1D |
| 70 | #define WM8580_SPDTXCHAN0 0x1E |
| 71 | #define WM8580_SPDTXCHAN1 0x1F |
| 72 | #define WM8580_SPDTXCHAN2 0x20 |
| 73 | #define WM8580_SPDTXCHAN3 0x21 |
| 74 | #define WM8580_SPDTXCHAN4 0x22 |
| 75 | #define WM8580_SPDTXCHAN5 0x23 |
| 76 | #define WM8580_SPDMODE 0x24 |
| 77 | #define WM8580_INTMASK 0x25 |
| 78 | #define WM8580_GPO1 0x26 |
| 79 | #define WM8580_GPO2 0x27 |
| 80 | #define WM8580_GPO3 0x28 |
| 81 | #define WM8580_GPO4 0x29 |
| 82 | #define WM8580_GPO5 0x2A |
| 83 | #define WM8580_INTSTAT 0x2B |
| 84 | #define WM8580_SPDRXCHAN1 0x2C |
| 85 | #define WM8580_SPDRXCHAN2 0x2D |
| 86 | #define WM8580_SPDRXCHAN3 0x2E |
| 87 | #define WM8580_SPDRXCHAN4 0x2F |
| 88 | #define WM8580_SPDRXCHAN5 0x30 |
| 89 | #define WM8580_SPDSTAT 0x31 |
| 90 | #define WM8580_PWRDN1 0x32 |
| 91 | #define WM8580_PWRDN2 0x33 |
| 92 | #define WM8580_READBACK 0x34 |
| 93 | #define WM8580_RESET 0x35 |
| 94 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 95 | #define WM8580_MAX_REGISTER 0x35 |
| 96 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 97 | /* PLLB4 (register 7h) */ |
| 98 | #define WM8580_PLLB4_MCLKOUTSRC_MASK 0x60 |
| 99 | #define WM8580_PLLB4_MCLKOUTSRC_PLLA 0x20 |
| 100 | #define WM8580_PLLB4_MCLKOUTSRC_PLLB 0x40 |
| 101 | #define WM8580_PLLB4_MCLKOUTSRC_OSC 0x60 |
| 102 | |
| 103 | #define WM8580_PLLB4_CLKOUTSRC_MASK 0x180 |
| 104 | #define WM8580_PLLB4_CLKOUTSRC_PLLACLK 0x080 |
| 105 | #define WM8580_PLLB4_CLKOUTSRC_PLLBCLK 0x100 |
| 106 | #define WM8580_PLLB4_CLKOUTSRC_OSCCLK 0x180 |
| 107 | |
| 108 | /* CLKSEL (register 8h) */ |
| 109 | #define WM8580_CLKSEL_DAC_CLKSEL_MASK 0x03 |
| 110 | #define WM8580_CLKSEL_DAC_CLKSEL_PLLA 0x01 |
| 111 | #define WM8580_CLKSEL_DAC_CLKSEL_PLLB 0x02 |
| 112 | |
| 113 | /* AIF control 1 (registers 9h-bh) */ |
| 114 | #define WM8580_AIF_RATE_MASK 0x7 |
| 115 | #define WM8580_AIF_RATE_128 0x0 |
| 116 | #define WM8580_AIF_RATE_192 0x1 |
| 117 | #define WM8580_AIF_RATE_256 0x2 |
| 118 | #define WM8580_AIF_RATE_384 0x3 |
| 119 | #define WM8580_AIF_RATE_512 0x4 |
| 120 | #define WM8580_AIF_RATE_768 0x5 |
| 121 | #define WM8580_AIF_RATE_1152 0x6 |
| 122 | |
| 123 | #define WM8580_AIF_BCLKSEL_MASK 0x18 |
| 124 | #define WM8580_AIF_BCLKSEL_64 0x00 |
| 125 | #define WM8580_AIF_BCLKSEL_128 0x08 |
| 126 | #define WM8580_AIF_BCLKSEL_256 0x10 |
| 127 | #define WM8580_AIF_BCLKSEL_SYSCLK 0x18 |
| 128 | |
| 129 | #define WM8580_AIF_MS 0x20 |
| 130 | |
| 131 | #define WM8580_AIF_CLKSRC_MASK 0xc0 |
| 132 | #define WM8580_AIF_CLKSRC_PLLA 0x40 |
| 133 | #define WM8580_AIF_CLKSRC_PLLB 0x40 |
| 134 | #define WM8580_AIF_CLKSRC_MCLK 0xc0 |
| 135 | |
| 136 | /* AIF control 2 (registers ch-eh) */ |
| 137 | #define WM8580_AIF_FMT_MASK 0x03 |
| 138 | #define WM8580_AIF_FMT_RIGHTJ 0x00 |
| 139 | #define WM8580_AIF_FMT_LEFTJ 0x01 |
| 140 | #define WM8580_AIF_FMT_I2S 0x02 |
| 141 | #define WM8580_AIF_FMT_DSP 0x03 |
| 142 | |
| 143 | #define WM8580_AIF_LENGTH_MASK 0x0c |
| 144 | #define WM8580_AIF_LENGTH_16 0x00 |
| 145 | #define WM8580_AIF_LENGTH_20 0x04 |
| 146 | #define WM8580_AIF_LENGTH_24 0x08 |
| 147 | #define WM8580_AIF_LENGTH_32 0x0c |
| 148 | |
| 149 | #define WM8580_AIF_LRP 0x10 |
| 150 | #define WM8580_AIF_BCP 0x20 |
| 151 | |
| 152 | /* Powerdown Register 1 (register 32h) */ |
| 153 | #define WM8580_PWRDN1_PWDN 0x001 |
| 154 | #define WM8580_PWRDN1_ALLDACPD 0x040 |
| 155 | |
| 156 | /* Powerdown Register 2 (register 33h) */ |
| 157 | #define WM8580_PWRDN2_OSSCPD 0x001 |
| 158 | #define WM8580_PWRDN2_PLLAPD 0x002 |
| 159 | #define WM8580_PWRDN2_PLLBPD 0x004 |
| 160 | #define WM8580_PWRDN2_SPDIFPD 0x008 |
| 161 | #define WM8580_PWRDN2_SPDIFTXD 0x010 |
| 162 | #define WM8580_PWRDN2_SPDIFRXD 0x020 |
| 163 | |
| 164 | #define WM8580_DAC_CONTROL5_MUTEALL 0x10 |
| 165 | |
| 166 | /* |
| 167 | * wm8580 register cache |
| 168 | * We can't read the WM8580 register space when we |
| 169 | * are using 2 wire for device control, so we cache them instead. |
| 170 | */ |
| 171 | static const u16 wm8580_reg[] = { |
| 172 | 0x0121, 0x017e, 0x007d, 0x0014, /*R3*/ |
| 173 | 0x0121, 0x017e, 0x007d, 0x0194, /*R7*/ |
| 174 | 0x001c, 0x0002, 0x0002, 0x00c2, /*R11*/ |
| 175 | 0x0182, 0x0082, 0x000a, 0x0024, /*R15*/ |
| 176 | 0x0009, 0x0000, 0x00ff, 0x0000, /*R19*/ |
| 177 | 0x00ff, 0x00ff, 0x00ff, 0x00ff, /*R23*/ |
| 178 | 0x00ff, 0x00ff, 0x00ff, 0x00ff, /*R27*/ |
| 179 | 0x01f0, 0x0040, 0x0000, 0x0000, /*R31(0x1F)*/ |
| 180 | 0x0000, 0x0000, 0x0031, 0x000b, /*R35*/ |
| 181 | 0x0039, 0x0000, 0x0010, 0x0032, /*R39*/ |
| 182 | 0x0054, 0x0076, 0x0098, 0x0000, /*R43(0x2B)*/ |
| 183 | 0x0000, 0x0000, 0x0000, 0x0000, /*R47*/ |
| 184 | 0x0000, 0x0000, 0x005e, 0x003e, /*R51(0x33)*/ |
| 185 | 0x0000, 0x0000 /*R53*/ |
| 186 | }; |
| 187 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 188 | struct pll_state { |
| 189 | unsigned int in; |
| 190 | unsigned int out; |
| 191 | }; |
| 192 | |
Mark Brown | a583cd5 | 2009-06-17 17:30:14 +0100 | [diff] [blame] | 193 | #define WM8580_NUM_SUPPLIES 3 |
| 194 | static const char *wm8580_supply_names[WM8580_NUM_SUPPLIES] = { |
| 195 | "AVDD", |
| 196 | "DVDD", |
| 197 | "PVDD", |
| 198 | }; |
| 199 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 200 | /* codec private data */ |
| 201 | struct wm8580_priv { |
| 202 | struct snd_soc_codec codec; |
Mark Brown | a583cd5 | 2009-06-17 17:30:14 +0100 | [diff] [blame] | 203 | struct regulator_bulk_data supplies[WM8580_NUM_SUPPLIES]; |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 204 | u16 reg_cache[WM8580_MAX_REGISTER + 1]; |
| 205 | struct pll_state a; |
| 206 | struct pll_state b; |
| 207 | }; |
| 208 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 209 | static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); |
| 210 | |
| 211 | static int wm8580_out_vu(struct snd_kcontrol *kcontrol, |
| 212 | struct snd_ctl_elem_value *ucontrol) |
| 213 | { |
Mark Brown | ccb077f | 2009-04-21 12:57:00 +0100 | [diff] [blame] | 214 | struct soc_mixer_control *mc = |
| 215 | (struct soc_mixer_control *)kcontrol->private_value; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 216 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 217 | u16 *reg_cache = codec->reg_cache; |
Mark Brown | ccb077f | 2009-04-21 12:57:00 +0100 | [diff] [blame] | 218 | unsigned int reg = mc->reg; |
| 219 | unsigned int reg2 = mc->rreg; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 220 | int ret; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 221 | |
| 222 | /* Clear the register cache so we write without VU set */ |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 223 | reg_cache[reg] = 0; |
| 224 | reg_cache[reg2] = 0; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 225 | |
| 226 | ret = snd_soc_put_volsw_2r(kcontrol, ucontrol); |
| 227 | if (ret < 0) |
| 228 | return ret; |
| 229 | |
| 230 | /* Now write again with the volume update bit set */ |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 231 | snd_soc_update_bits(codec, reg, 0x100, 0x100); |
| 232 | snd_soc_update_bits(codec, reg2, 0x100, 0x100); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 233 | |
| 234 | return 0; |
| 235 | } |
| 236 | |
Mark Brown | ccb077f | 2009-04-21 12:57:00 +0100 | [diff] [blame] | 237 | #define SOC_WM8580_OUT_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, \ |
| 238 | xinvert, tlv_array) \ |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 239 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
| 240 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ |
| 241 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ |
| 242 | .tlv.p = (tlv_array), \ |
| 243 | .info = snd_soc_info_volsw_2r, \ |
| 244 | .get = snd_soc_get_volsw_2r, .put = wm8580_out_vu, \ |
Mark Brown | ccb077f | 2009-04-21 12:57:00 +0100 | [diff] [blame] | 245 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
| 246 | {.reg = reg_left, .rreg = reg_right, .shift = xshift, \ |
| 247 | .max = xmax, .invert = xinvert} } |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 248 | |
| 249 | static const struct snd_kcontrol_new wm8580_snd_controls[] = { |
| 250 | SOC_WM8580_OUT_DOUBLE_R_TLV("DAC1 Playback Volume", |
| 251 | WM8580_DIGITAL_ATTENUATION_DACL1, |
| 252 | WM8580_DIGITAL_ATTENUATION_DACR1, |
| 253 | 0, 0xff, 0, dac_tlv), |
| 254 | SOC_WM8580_OUT_DOUBLE_R_TLV("DAC2 Playback Volume", |
| 255 | WM8580_DIGITAL_ATTENUATION_DACL2, |
| 256 | WM8580_DIGITAL_ATTENUATION_DACR2, |
| 257 | 0, 0xff, 0, dac_tlv), |
| 258 | SOC_WM8580_OUT_DOUBLE_R_TLV("DAC3 Playback Volume", |
| 259 | WM8580_DIGITAL_ATTENUATION_DACL3, |
| 260 | WM8580_DIGITAL_ATTENUATION_DACR3, |
| 261 | 0, 0xff, 0, dac_tlv), |
| 262 | |
| 263 | SOC_SINGLE("DAC1 Deemphasis Switch", WM8580_DAC_CONTROL3, 0, 1, 0), |
| 264 | SOC_SINGLE("DAC2 Deemphasis Switch", WM8580_DAC_CONTROL3, 1, 1, 0), |
| 265 | SOC_SINGLE("DAC3 Deemphasis Switch", WM8580_DAC_CONTROL3, 2, 1, 0), |
| 266 | |
| 267 | SOC_DOUBLE("DAC1 Invert Switch", WM8580_DAC_CONTROL4, 0, 1, 1, 0), |
| 268 | SOC_DOUBLE("DAC2 Invert Switch", WM8580_DAC_CONTROL4, 2, 3, 1, 0), |
| 269 | SOC_DOUBLE("DAC3 Invert Switch", WM8580_DAC_CONTROL4, 4, 5, 1, 0), |
| 270 | |
| 271 | SOC_SINGLE("DAC ZC Switch", WM8580_DAC_CONTROL5, 5, 1, 0), |
| 272 | SOC_SINGLE("DAC1 Switch", WM8580_DAC_CONTROL5, 0, 1, 0), |
| 273 | SOC_SINGLE("DAC2 Switch", WM8580_DAC_CONTROL5, 1, 1, 0), |
| 274 | SOC_SINGLE("DAC3 Switch", WM8580_DAC_CONTROL5, 2, 1, 0), |
| 275 | |
| 276 | SOC_DOUBLE("ADC Mute Switch", WM8580_ADC_CONTROL1, 0, 1, 1, 0), |
| 277 | SOC_SINGLE("ADC High-Pass Filter Switch", WM8580_ADC_CONTROL1, 4, 1, 0), |
| 278 | }; |
| 279 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 280 | static const struct snd_soc_dapm_widget wm8580_dapm_widgets[] = { |
| 281 | SND_SOC_DAPM_DAC("DAC1", "Playback", WM8580_PWRDN1, 2, 1), |
| 282 | SND_SOC_DAPM_DAC("DAC2", "Playback", WM8580_PWRDN1, 3, 1), |
| 283 | SND_SOC_DAPM_DAC("DAC3", "Playback", WM8580_PWRDN1, 4, 1), |
| 284 | |
| 285 | SND_SOC_DAPM_OUTPUT("VOUT1L"), |
| 286 | SND_SOC_DAPM_OUTPUT("VOUT1R"), |
| 287 | SND_SOC_DAPM_OUTPUT("VOUT2L"), |
| 288 | SND_SOC_DAPM_OUTPUT("VOUT2R"), |
| 289 | SND_SOC_DAPM_OUTPUT("VOUT3L"), |
| 290 | SND_SOC_DAPM_OUTPUT("VOUT3R"), |
| 291 | |
| 292 | SND_SOC_DAPM_ADC("ADC", "Capture", WM8580_PWRDN1, 1, 1), |
| 293 | |
| 294 | SND_SOC_DAPM_INPUT("AINL"), |
| 295 | SND_SOC_DAPM_INPUT("AINR"), |
| 296 | }; |
| 297 | |
| 298 | static const struct snd_soc_dapm_route audio_map[] = { |
| 299 | { "VOUT1L", NULL, "DAC1" }, |
| 300 | { "VOUT1R", NULL, "DAC1" }, |
| 301 | |
| 302 | { "VOUT2L", NULL, "DAC2" }, |
| 303 | { "VOUT2R", NULL, "DAC2" }, |
| 304 | |
| 305 | { "VOUT3L", NULL, "DAC3" }, |
| 306 | { "VOUT3R", NULL, "DAC3" }, |
| 307 | |
| 308 | { "ADC", NULL, "AINL" }, |
| 309 | { "ADC", NULL, "AINR" }, |
| 310 | }; |
| 311 | |
| 312 | static int wm8580_add_widgets(struct snd_soc_codec *codec) |
| 313 | { |
| 314 | snd_soc_dapm_new_controls(codec, wm8580_dapm_widgets, |
| 315 | ARRAY_SIZE(wm8580_dapm_widgets)); |
| 316 | |
| 317 | snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); |
| 318 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 319 | return 0; |
| 320 | } |
| 321 | |
| 322 | /* PLL divisors */ |
| 323 | struct _pll_div { |
| 324 | u32 prescale:1; |
| 325 | u32 postscale:1; |
| 326 | u32 freqmode:2; |
| 327 | u32 n:4; |
| 328 | u32 k:24; |
| 329 | }; |
| 330 | |
| 331 | /* The size in bits of the pll divide */ |
| 332 | #define FIXED_PLL_SIZE (1 << 22) |
| 333 | |
| 334 | /* PLL rate to output rate divisions */ |
| 335 | static struct { |
| 336 | unsigned int div; |
| 337 | unsigned int freqmode; |
| 338 | unsigned int postscale; |
| 339 | } post_table[] = { |
| 340 | { 2, 0, 0 }, |
| 341 | { 4, 0, 1 }, |
| 342 | { 4, 1, 0 }, |
| 343 | { 8, 1, 1 }, |
| 344 | { 8, 2, 0 }, |
| 345 | { 16, 2, 1 }, |
| 346 | { 12, 3, 0 }, |
| 347 | { 24, 3, 1 } |
| 348 | }; |
| 349 | |
| 350 | static int pll_factors(struct _pll_div *pll_div, unsigned int target, |
| 351 | unsigned int source) |
| 352 | { |
| 353 | u64 Kpart; |
| 354 | unsigned int K, Ndiv, Nmod; |
| 355 | int i; |
| 356 | |
Roel Kluin | 449bd54 | 2009-05-27 17:08:39 -0700 | [diff] [blame] | 357 | pr_debug("wm8580: PLL %uHz->%uHz\n", source, target); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 358 | |
| 359 | /* Scale the output frequency up; the PLL should run in the |
| 360 | * region of 90-100MHz. |
| 361 | */ |
| 362 | for (i = 0; i < ARRAY_SIZE(post_table); i++) { |
| 363 | if (target * post_table[i].div >= 90000000 && |
| 364 | target * post_table[i].div <= 100000000) { |
| 365 | pll_div->freqmode = post_table[i].freqmode; |
| 366 | pll_div->postscale = post_table[i].postscale; |
| 367 | target *= post_table[i].div; |
| 368 | break; |
| 369 | } |
| 370 | } |
| 371 | |
| 372 | if (i == ARRAY_SIZE(post_table)) { |
| 373 | printk(KERN_ERR "wm8580: Unable to scale output frequency " |
| 374 | "%u\n", target); |
| 375 | return -EINVAL; |
| 376 | } |
| 377 | |
| 378 | Ndiv = target / source; |
| 379 | |
| 380 | if (Ndiv < 5) { |
| 381 | source /= 2; |
| 382 | pll_div->prescale = 1; |
| 383 | Ndiv = target / source; |
| 384 | } else |
| 385 | pll_div->prescale = 0; |
| 386 | |
| 387 | if ((Ndiv < 5) || (Ndiv > 13)) { |
| 388 | printk(KERN_ERR |
Roel Kluin | 449bd54 | 2009-05-27 17:08:39 -0700 | [diff] [blame] | 389 | "WM8580 N=%u outside supported range\n", Ndiv); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 390 | return -EINVAL; |
| 391 | } |
| 392 | |
| 393 | pll_div->n = Ndiv; |
| 394 | Nmod = target % source; |
| 395 | Kpart = FIXED_PLL_SIZE * (long long)Nmod; |
| 396 | |
| 397 | do_div(Kpart, source); |
| 398 | |
| 399 | K = Kpart & 0xFFFFFFFF; |
| 400 | |
| 401 | pll_div->k = K; |
| 402 | |
| 403 | pr_debug("PLL %x.%x prescale %d freqmode %d postscale %d\n", |
| 404 | pll_div->n, pll_div->k, pll_div->prescale, pll_div->freqmode, |
| 405 | pll_div->postscale); |
| 406 | |
| 407 | return 0; |
| 408 | } |
| 409 | |
Mark Brown | 8548803 | 2009-09-05 18:52:16 +0100 | [diff] [blame] | 410 | static int wm8580_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, |
| 411 | int source, unsigned int freq_in, unsigned int freq_out) |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 412 | { |
| 413 | int offset; |
| 414 | struct snd_soc_codec *codec = codec_dai->codec; |
| 415 | struct wm8580_priv *wm8580 = codec->private_data; |
| 416 | struct pll_state *state; |
| 417 | struct _pll_div pll_div; |
| 418 | unsigned int reg; |
| 419 | unsigned int pwr_mask; |
| 420 | int ret; |
| 421 | |
| 422 | /* GCC isn't able to work out the ifs below for initialising/using |
| 423 | * pll_div so suppress warnings. |
| 424 | */ |
| 425 | memset(&pll_div, 0, sizeof(pll_div)); |
| 426 | |
| 427 | switch (pll_id) { |
| 428 | case WM8580_PLLA: |
| 429 | state = &wm8580->a; |
| 430 | offset = 0; |
| 431 | pwr_mask = WM8580_PWRDN2_PLLAPD; |
| 432 | break; |
| 433 | case WM8580_PLLB: |
| 434 | state = &wm8580->b; |
| 435 | offset = 4; |
| 436 | pwr_mask = WM8580_PWRDN2_PLLBPD; |
| 437 | break; |
| 438 | default: |
| 439 | return -ENODEV; |
| 440 | } |
| 441 | |
| 442 | if (freq_in && freq_out) { |
| 443 | ret = pll_factors(&pll_div, freq_out, freq_in); |
| 444 | if (ret != 0) |
| 445 | return ret; |
| 446 | } |
| 447 | |
| 448 | state->in = freq_in; |
| 449 | state->out = freq_out; |
| 450 | |
| 451 | /* Always disable the PLL - it is not safe to leave it running |
| 452 | * while reprogramming it. |
| 453 | */ |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 454 | reg = snd_soc_read(codec, WM8580_PWRDN2); |
| 455 | snd_soc_write(codec, WM8580_PWRDN2, reg | pwr_mask); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 456 | |
| 457 | if (!freq_in || !freq_out) |
| 458 | return 0; |
| 459 | |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 460 | snd_soc_write(codec, WM8580_PLLA1 + offset, pll_div.k & 0x1ff); |
jassi brar | 5c0d38c | 2009-09-01 11:35:08 +0900 | [diff] [blame] | 461 | snd_soc_write(codec, WM8580_PLLA2 + offset, (pll_div.k >> 9) & 0x1ff); |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 462 | snd_soc_write(codec, WM8580_PLLA3 + offset, |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 463 | (pll_div.k >> 18 & 0xf) | (pll_div.n << 4)); |
| 464 | |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 465 | reg = snd_soc_read(codec, WM8580_PLLA4 + offset); |
jassi brar | 5c0d38c | 2009-09-01 11:35:08 +0900 | [diff] [blame] | 466 | reg &= ~0x1b; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 467 | reg |= pll_div.prescale | pll_div.postscale << 1 | |
Mark Brown | ce88168 | 2009-04-21 12:35:15 +0100 | [diff] [blame] | 468 | pll_div.freqmode << 3; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 469 | |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 470 | snd_soc_write(codec, WM8580_PLLA4 + offset, reg); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 471 | |
| 472 | /* All done, turn it on */ |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 473 | reg = snd_soc_read(codec, WM8580_PWRDN2); |
| 474 | snd_soc_write(codec, WM8580_PWRDN2, reg & ~pwr_mask); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 475 | |
| 476 | return 0; |
| 477 | } |
| 478 | |
| 479 | /* |
| 480 | * Set PCM DAI bit size and sample rate. |
| 481 | */ |
| 482 | static int wm8580_paif_hw_params(struct snd_pcm_substream *substream, |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 483 | struct snd_pcm_hw_params *params, |
| 484 | struct snd_soc_dai *dai) |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 485 | { |
| 486 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 487 | struct snd_soc_device *socdev = rtd->socdev; |
Mark Brown | 6627a65 | 2009-01-23 22:55:23 +0000 | [diff] [blame] | 488 | struct snd_soc_codec *codec = socdev->card->codec; |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 489 | u16 paifb = snd_soc_read(codec, WM8580_PAIF3 + dai->id); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 490 | |
| 491 | paifb &= ~WM8580_AIF_LENGTH_MASK; |
| 492 | /* bit size */ |
| 493 | switch (params_format(params)) { |
| 494 | case SNDRV_PCM_FORMAT_S16_LE: |
| 495 | break; |
| 496 | case SNDRV_PCM_FORMAT_S20_3LE: |
| 497 | paifb |= WM8580_AIF_LENGTH_20; |
| 498 | break; |
| 499 | case SNDRV_PCM_FORMAT_S24_LE: |
| 500 | paifb |= WM8580_AIF_LENGTH_24; |
| 501 | break; |
| 502 | case SNDRV_PCM_FORMAT_S32_LE: |
| 503 | paifb |= WM8580_AIF_LENGTH_24; |
| 504 | break; |
| 505 | default: |
| 506 | return -EINVAL; |
| 507 | } |
| 508 | |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 509 | snd_soc_write(codec, WM8580_PAIF3 + dai->id, paifb); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 510 | return 0; |
| 511 | } |
| 512 | |
| 513 | static int wm8580_set_paif_dai_fmt(struct snd_soc_dai *codec_dai, |
| 514 | unsigned int fmt) |
| 515 | { |
| 516 | struct snd_soc_codec *codec = codec_dai->codec; |
| 517 | unsigned int aifa; |
| 518 | unsigned int aifb; |
| 519 | int can_invert_lrclk; |
| 520 | |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 521 | aifa = snd_soc_read(codec, WM8580_PAIF1 + codec_dai->id); |
| 522 | aifb = snd_soc_read(codec, WM8580_PAIF3 + codec_dai->id); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 523 | |
| 524 | aifb &= ~(WM8580_AIF_FMT_MASK | WM8580_AIF_LRP | WM8580_AIF_BCP); |
| 525 | |
| 526 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 527 | case SND_SOC_DAIFMT_CBS_CFS: |
| 528 | aifa &= ~WM8580_AIF_MS; |
| 529 | break; |
| 530 | case SND_SOC_DAIFMT_CBM_CFM: |
| 531 | aifa |= WM8580_AIF_MS; |
| 532 | break; |
| 533 | default: |
| 534 | return -EINVAL; |
| 535 | } |
| 536 | |
| 537 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 538 | case SND_SOC_DAIFMT_I2S: |
| 539 | can_invert_lrclk = 1; |
| 540 | aifb |= WM8580_AIF_FMT_I2S; |
| 541 | break; |
| 542 | case SND_SOC_DAIFMT_RIGHT_J: |
| 543 | can_invert_lrclk = 1; |
| 544 | aifb |= WM8580_AIF_FMT_RIGHTJ; |
| 545 | break; |
| 546 | case SND_SOC_DAIFMT_LEFT_J: |
| 547 | can_invert_lrclk = 1; |
| 548 | aifb |= WM8580_AIF_FMT_LEFTJ; |
| 549 | break; |
| 550 | case SND_SOC_DAIFMT_DSP_A: |
| 551 | can_invert_lrclk = 0; |
| 552 | aifb |= WM8580_AIF_FMT_DSP; |
| 553 | break; |
| 554 | case SND_SOC_DAIFMT_DSP_B: |
| 555 | can_invert_lrclk = 0; |
| 556 | aifb |= WM8580_AIF_FMT_DSP; |
| 557 | aifb |= WM8580_AIF_LRP; |
| 558 | break; |
| 559 | default: |
| 560 | return -EINVAL; |
| 561 | } |
| 562 | |
| 563 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
| 564 | case SND_SOC_DAIFMT_NB_NF: |
| 565 | break; |
| 566 | |
| 567 | case SND_SOC_DAIFMT_IB_IF: |
| 568 | if (!can_invert_lrclk) |
| 569 | return -EINVAL; |
| 570 | aifb |= WM8580_AIF_BCP; |
| 571 | aifb |= WM8580_AIF_LRP; |
| 572 | break; |
| 573 | |
| 574 | case SND_SOC_DAIFMT_IB_NF: |
| 575 | aifb |= WM8580_AIF_BCP; |
| 576 | break; |
| 577 | |
| 578 | case SND_SOC_DAIFMT_NB_IF: |
| 579 | if (!can_invert_lrclk) |
| 580 | return -EINVAL; |
| 581 | aifb |= WM8580_AIF_LRP; |
| 582 | break; |
| 583 | |
| 584 | default: |
| 585 | return -EINVAL; |
| 586 | } |
| 587 | |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 588 | snd_soc_write(codec, WM8580_PAIF1 + codec_dai->id, aifa); |
| 589 | snd_soc_write(codec, WM8580_PAIF3 + codec_dai->id, aifb); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 590 | |
| 591 | return 0; |
| 592 | } |
| 593 | |
| 594 | static int wm8580_set_dai_clkdiv(struct snd_soc_dai *codec_dai, |
| 595 | int div_id, int div) |
| 596 | { |
| 597 | struct snd_soc_codec *codec = codec_dai->codec; |
| 598 | unsigned int reg; |
| 599 | |
| 600 | switch (div_id) { |
| 601 | case WM8580_MCLK: |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 602 | reg = snd_soc_read(codec, WM8580_PLLB4); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 603 | reg &= ~WM8580_PLLB4_MCLKOUTSRC_MASK; |
| 604 | |
| 605 | switch (div) { |
| 606 | case WM8580_CLKSRC_MCLK: |
| 607 | /* Input */ |
| 608 | break; |
| 609 | |
| 610 | case WM8580_CLKSRC_PLLA: |
| 611 | reg |= WM8580_PLLB4_MCLKOUTSRC_PLLA; |
| 612 | break; |
| 613 | case WM8580_CLKSRC_PLLB: |
| 614 | reg |= WM8580_PLLB4_MCLKOUTSRC_PLLB; |
| 615 | break; |
| 616 | |
| 617 | case WM8580_CLKSRC_OSC: |
| 618 | reg |= WM8580_PLLB4_MCLKOUTSRC_OSC; |
| 619 | break; |
| 620 | |
| 621 | default: |
| 622 | return -EINVAL; |
| 623 | } |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 624 | snd_soc_write(codec, WM8580_PLLB4, reg); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 625 | break; |
| 626 | |
| 627 | case WM8580_DAC_CLKSEL: |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 628 | reg = snd_soc_read(codec, WM8580_CLKSEL); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 629 | reg &= ~WM8580_CLKSEL_DAC_CLKSEL_MASK; |
| 630 | |
| 631 | switch (div) { |
| 632 | case WM8580_CLKSRC_MCLK: |
| 633 | break; |
| 634 | |
| 635 | case WM8580_CLKSRC_PLLA: |
| 636 | reg |= WM8580_CLKSEL_DAC_CLKSEL_PLLA; |
| 637 | break; |
| 638 | |
| 639 | case WM8580_CLKSRC_PLLB: |
| 640 | reg |= WM8580_CLKSEL_DAC_CLKSEL_PLLB; |
| 641 | break; |
| 642 | |
| 643 | default: |
| 644 | return -EINVAL; |
| 645 | } |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 646 | snd_soc_write(codec, WM8580_CLKSEL, reg); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 647 | break; |
| 648 | |
| 649 | case WM8580_CLKOUTSRC: |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 650 | reg = snd_soc_read(codec, WM8580_PLLB4); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 651 | reg &= ~WM8580_PLLB4_CLKOUTSRC_MASK; |
| 652 | |
| 653 | switch (div) { |
| 654 | case WM8580_CLKSRC_NONE: |
| 655 | break; |
| 656 | |
| 657 | case WM8580_CLKSRC_PLLA: |
| 658 | reg |= WM8580_PLLB4_CLKOUTSRC_PLLACLK; |
| 659 | break; |
| 660 | |
| 661 | case WM8580_CLKSRC_PLLB: |
| 662 | reg |= WM8580_PLLB4_CLKOUTSRC_PLLBCLK; |
| 663 | break; |
| 664 | |
| 665 | case WM8580_CLKSRC_OSC: |
| 666 | reg |= WM8580_PLLB4_CLKOUTSRC_OSCCLK; |
| 667 | break; |
| 668 | |
| 669 | default: |
| 670 | return -EINVAL; |
| 671 | } |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 672 | snd_soc_write(codec, WM8580_PLLB4, reg); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 673 | break; |
| 674 | |
| 675 | default: |
| 676 | return -EINVAL; |
| 677 | } |
| 678 | |
| 679 | return 0; |
| 680 | } |
| 681 | |
| 682 | static int wm8580_digital_mute(struct snd_soc_dai *codec_dai, int mute) |
| 683 | { |
| 684 | struct snd_soc_codec *codec = codec_dai->codec; |
| 685 | unsigned int reg; |
| 686 | |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 687 | reg = snd_soc_read(codec, WM8580_DAC_CONTROL5); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 688 | |
| 689 | if (mute) |
| 690 | reg |= WM8580_DAC_CONTROL5_MUTEALL; |
| 691 | else |
| 692 | reg &= ~WM8580_DAC_CONTROL5_MUTEALL; |
| 693 | |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 694 | snd_soc_write(codec, WM8580_DAC_CONTROL5, reg); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 695 | |
| 696 | return 0; |
| 697 | } |
| 698 | |
| 699 | static int wm8580_set_bias_level(struct snd_soc_codec *codec, |
| 700 | enum snd_soc_bias_level level) |
| 701 | { |
| 702 | u16 reg; |
| 703 | switch (level) { |
| 704 | case SND_SOC_BIAS_ON: |
| 705 | case SND_SOC_BIAS_PREPARE: |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 706 | break; |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 707 | |
| 708 | case SND_SOC_BIAS_STANDBY: |
| 709 | if (codec->bias_level == SND_SOC_BIAS_OFF) { |
| 710 | /* Power up and get individual control of the DACs */ |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 711 | reg = snd_soc_read(codec, WM8580_PWRDN1); |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 712 | reg &= ~(WM8580_PWRDN1_PWDN | WM8580_PWRDN1_ALLDACPD); |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 713 | snd_soc_write(codec, WM8580_PWRDN1, reg); |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 714 | |
| 715 | /* Make VMID high impedence */ |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 716 | reg = snd_soc_read(codec, WM8580_ADC_CONTROL1); |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 717 | reg &= ~0x100; |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 718 | snd_soc_write(codec, WM8580_ADC_CONTROL1, reg); |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 719 | } |
| 720 | break; |
| 721 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 722 | case SND_SOC_BIAS_OFF: |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 723 | reg = snd_soc_read(codec, WM8580_PWRDN1); |
| 724 | snd_soc_write(codec, WM8580_PWRDN1, reg | WM8580_PWRDN1_PWDN); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 725 | break; |
| 726 | } |
| 727 | codec->bias_level = level; |
| 728 | return 0; |
| 729 | } |
| 730 | |
| 731 | #define WM8580_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
| 732 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
| 733 | |
Eric Miao | 6335d05 | 2009-03-03 09:41:00 +0800 | [diff] [blame] | 734 | static struct snd_soc_dai_ops wm8580_dai_ops_playback = { |
| 735 | .hw_params = wm8580_paif_hw_params, |
| 736 | .set_fmt = wm8580_set_paif_dai_fmt, |
| 737 | .set_clkdiv = wm8580_set_dai_clkdiv, |
| 738 | .set_pll = wm8580_set_dai_pll, |
| 739 | .digital_mute = wm8580_digital_mute, |
| 740 | }; |
| 741 | |
| 742 | static struct snd_soc_dai_ops wm8580_dai_ops_capture = { |
| 743 | .hw_params = wm8580_paif_hw_params, |
| 744 | .set_fmt = wm8580_set_paif_dai_fmt, |
| 745 | .set_clkdiv = wm8580_set_dai_clkdiv, |
| 746 | .set_pll = wm8580_set_dai_pll, |
| 747 | }; |
| 748 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 749 | struct snd_soc_dai wm8580_dai[] = { |
| 750 | { |
| 751 | .name = "WM8580 PAIFRX", |
| 752 | .id = 0, |
| 753 | .playback = { |
| 754 | .stream_name = "Playback", |
| 755 | .channels_min = 1, |
| 756 | .channels_max = 6, |
| 757 | .rates = SNDRV_PCM_RATE_8000_192000, |
| 758 | .formats = WM8580_FORMATS, |
| 759 | }, |
Eric Miao | 6335d05 | 2009-03-03 09:41:00 +0800 | [diff] [blame] | 760 | .ops = &wm8580_dai_ops_playback, |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 761 | }, |
| 762 | { |
| 763 | .name = "WM8580 PAIFTX", |
| 764 | .id = 1, |
| 765 | .capture = { |
| 766 | .stream_name = "Capture", |
| 767 | .channels_min = 2, |
| 768 | .channels_max = 2, |
| 769 | .rates = SNDRV_PCM_RATE_8000_192000, |
| 770 | .formats = WM8580_FORMATS, |
| 771 | }, |
Eric Miao | 6335d05 | 2009-03-03 09:41:00 +0800 | [diff] [blame] | 772 | .ops = &wm8580_dai_ops_capture, |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 773 | }, |
| 774 | }; |
| 775 | EXPORT_SYMBOL_GPL(wm8580_dai); |
| 776 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 777 | static struct snd_soc_codec *wm8580_codec; |
| 778 | |
| 779 | static int wm8580_probe(struct platform_device *pdev) |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 780 | { |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 781 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 782 | struct snd_soc_codec *codec; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 783 | int ret = 0; |
| 784 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 785 | if (wm8580_codec == NULL) { |
| 786 | dev_err(&pdev->dev, "Codec device not registered\n"); |
| 787 | return -ENODEV; |
| 788 | } |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 789 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 790 | socdev->card->codec = wm8580_codec; |
| 791 | codec = wm8580_codec; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 792 | |
| 793 | /* register pcms */ |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 794 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 795 | if (ret < 0) { |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 796 | dev_err(codec->dev, "failed to create pcms: %d\n", ret); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 797 | goto pcm_err; |
| 798 | } |
| 799 | |
Ian Molton | 3e8e195 | 2009-01-09 00:23:21 +0000 | [diff] [blame] | 800 | snd_soc_add_controls(codec, wm8580_snd_controls, |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 801 | ARRAY_SIZE(wm8580_snd_controls)); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 802 | wm8580_add_widgets(codec); |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 803 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 804 | return ret; |
| 805 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 806 | pcm_err: |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 807 | return ret; |
| 808 | } |
| 809 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 810 | /* power down chip */ |
| 811 | static int wm8580_remove(struct platform_device *pdev) |
| 812 | { |
| 813 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 814 | |
| 815 | snd_soc_free_pcms(socdev); |
| 816 | snd_soc_dapm_free(socdev); |
| 817 | |
| 818 | return 0; |
| 819 | } |
| 820 | |
| 821 | struct snd_soc_codec_device soc_codec_dev_wm8580 = { |
| 822 | .probe = wm8580_probe, |
| 823 | .remove = wm8580_remove, |
| 824 | }; |
| 825 | EXPORT_SYMBOL_GPL(soc_codec_dev_wm8580); |
| 826 | |
Mark Brown | 7084a42 | 2009-07-10 22:24:27 +0100 | [diff] [blame] | 827 | static int wm8580_register(struct wm8580_priv *wm8580, |
| 828 | enum snd_soc_control_type control) |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 829 | { |
| 830 | int ret, i; |
| 831 | struct snd_soc_codec *codec = &wm8580->codec; |
| 832 | |
| 833 | if (wm8580_codec) { |
| 834 | dev_err(codec->dev, "Another WM8580 is registered\n"); |
| 835 | ret = -EINVAL; |
| 836 | goto err; |
| 837 | } |
| 838 | |
| 839 | mutex_init(&codec->mutex); |
| 840 | INIT_LIST_HEAD(&codec->dapm_widgets); |
| 841 | INIT_LIST_HEAD(&codec->dapm_paths); |
| 842 | |
| 843 | codec->private_data = wm8580; |
| 844 | codec->name = "WM8580"; |
| 845 | codec->owner = THIS_MODULE; |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 846 | codec->bias_level = SND_SOC_BIAS_OFF; |
| 847 | codec->set_bias_level = wm8580_set_bias_level; |
| 848 | codec->dai = wm8580_dai; |
| 849 | codec->num_dai = ARRAY_SIZE(wm8580_dai); |
| 850 | codec->reg_cache_size = ARRAY_SIZE(wm8580->reg_cache); |
| 851 | codec->reg_cache = &wm8580->reg_cache; |
| 852 | |
| 853 | memcpy(codec->reg_cache, wm8580_reg, sizeof(wm8580_reg)); |
| 854 | |
Mark Brown | 7084a42 | 2009-07-10 22:24:27 +0100 | [diff] [blame] | 855 | ret = snd_soc_codec_set_cache_io(codec, 7, 9, control); |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 856 | if (ret < 0) { |
| 857 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
| 858 | goto err; |
| 859 | } |
| 860 | |
Mark Brown | a583cd5 | 2009-06-17 17:30:14 +0100 | [diff] [blame] | 861 | for (i = 0; i < ARRAY_SIZE(wm8580->supplies); i++) |
| 862 | wm8580->supplies[i].supply = wm8580_supply_names[i]; |
| 863 | |
| 864 | ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8580->supplies), |
| 865 | wm8580->supplies); |
| 866 | if (ret != 0) { |
| 867 | dev_err(codec->dev, "Failed to request supplies: %d\n", ret); |
| 868 | goto err; |
| 869 | } |
| 870 | |
| 871 | ret = regulator_bulk_enable(ARRAY_SIZE(wm8580->supplies), |
| 872 | wm8580->supplies); |
| 873 | if (ret != 0) { |
| 874 | dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); |
| 875 | goto err_regulator_get; |
| 876 | } |
| 877 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 878 | /* Get the codec into a known state */ |
Mark Brown | f6f1eb1 | 2009-07-05 17:57:57 +0100 | [diff] [blame] | 879 | ret = snd_soc_write(codec, WM8580_RESET, 0); |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 880 | if (ret != 0) { |
| 881 | dev_err(codec->dev, "Failed to reset codec: %d\n", ret); |
Mark Brown | a583cd5 | 2009-06-17 17:30:14 +0100 | [diff] [blame] | 882 | goto err_regulator_enable; |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 883 | } |
| 884 | |
| 885 | for (i = 0; i < ARRAY_SIZE(wm8580_dai); i++) |
| 886 | wm8580_dai[i].dev = codec->dev; |
| 887 | |
| 888 | wm8580_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 889 | |
| 890 | wm8580_codec = codec; |
| 891 | |
| 892 | ret = snd_soc_register_codec(codec); |
| 893 | if (ret != 0) { |
| 894 | dev_err(codec->dev, "Failed to register codec: %d\n", ret); |
Mark Brown | a583cd5 | 2009-06-17 17:30:14 +0100 | [diff] [blame] | 895 | goto err_regulator_enable; |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 896 | } |
| 897 | |
| 898 | ret = snd_soc_register_dais(wm8580_dai, ARRAY_SIZE(wm8580_dai)); |
| 899 | if (ret != 0) { |
| 900 | dev_err(codec->dev, "Failed to register DAI: %d\n", ret); |
| 901 | goto err_codec; |
| 902 | } |
| 903 | |
| 904 | return 0; |
| 905 | |
| 906 | err_codec: |
| 907 | snd_soc_unregister_codec(codec); |
Mark Brown | a583cd5 | 2009-06-17 17:30:14 +0100 | [diff] [blame] | 908 | err_regulator_enable: |
| 909 | regulator_bulk_disable(ARRAY_SIZE(wm8580->supplies), wm8580->supplies); |
| 910 | err_regulator_get: |
| 911 | regulator_bulk_free(ARRAY_SIZE(wm8580->supplies), wm8580->supplies); |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 912 | err: |
| 913 | kfree(wm8580); |
| 914 | return ret; |
| 915 | } |
| 916 | |
| 917 | static void wm8580_unregister(struct wm8580_priv *wm8580) |
| 918 | { |
| 919 | wm8580_set_bias_level(&wm8580->codec, SND_SOC_BIAS_OFF); |
| 920 | snd_soc_unregister_dais(wm8580_dai, ARRAY_SIZE(wm8580_dai)); |
| 921 | snd_soc_unregister_codec(&wm8580->codec); |
Mark Brown | a583cd5 | 2009-06-17 17:30:14 +0100 | [diff] [blame] | 922 | regulator_bulk_disable(ARRAY_SIZE(wm8580->supplies), wm8580->supplies); |
| 923 | regulator_bulk_free(ARRAY_SIZE(wm8580->supplies), wm8580->supplies); |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 924 | kfree(wm8580); |
| 925 | wm8580_codec = NULL; |
| 926 | } |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 927 | |
| 928 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
Jean Delvare | 17be552 | 2008-10-15 19:57:12 +0200 | [diff] [blame] | 929 | static int wm8580_i2c_probe(struct i2c_client *i2c, |
| 930 | const struct i2c_device_id *id) |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 931 | { |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 932 | struct wm8580_priv *wm8580; |
| 933 | struct snd_soc_codec *codec; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 934 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 935 | wm8580 = kzalloc(sizeof(struct wm8580_priv), GFP_KERNEL); |
| 936 | if (wm8580 == NULL) |
| 937 | return -ENOMEM; |
| 938 | |
| 939 | codec = &wm8580->codec; |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 940 | |
| 941 | i2c_set_clientdata(i2c, wm8580); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 942 | codec->control_data = i2c; |
| 943 | |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 944 | codec->dev = &i2c->dev; |
| 945 | |
Mark Brown | 7084a42 | 2009-07-10 22:24:27 +0100 | [diff] [blame] | 946 | return wm8580_register(wm8580, SND_SOC_I2C); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 947 | } |
| 948 | |
Jean Delvare | 17be552 | 2008-10-15 19:57:12 +0200 | [diff] [blame] | 949 | static int wm8580_i2c_remove(struct i2c_client *client) |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 950 | { |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 951 | struct wm8580_priv *wm8580 = i2c_get_clientdata(client); |
| 952 | wm8580_unregister(wm8580); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 953 | return 0; |
| 954 | } |
| 955 | |
Jean Delvare | 17be552 | 2008-10-15 19:57:12 +0200 | [diff] [blame] | 956 | static const struct i2c_device_id wm8580_i2c_id[] = { |
| 957 | { "wm8580", 0 }, |
| 958 | { } |
| 959 | }; |
| 960 | MODULE_DEVICE_TABLE(i2c, wm8580_i2c_id); |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 961 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 962 | static struct i2c_driver wm8580_i2c_driver = { |
| 963 | .driver = { |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 964 | .name = "wm8580", |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 965 | .owner = THIS_MODULE, |
| 966 | }, |
Jean Delvare | 17be552 | 2008-10-15 19:57:12 +0200 | [diff] [blame] | 967 | .probe = wm8580_i2c_probe, |
| 968 | .remove = wm8580_i2c_remove, |
| 969 | .id_table = wm8580_i2c_id, |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 970 | }; |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 971 | #endif |
| 972 | |
Takashi Iwai | c9b3a40 | 2008-12-10 07:47:22 +0100 | [diff] [blame] | 973 | static int __init wm8580_modinit(void) |
Mark Brown | 64089b8 | 2008-12-08 19:17:58 +0000 | [diff] [blame] | 974 | { |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 975 | int ret; |
| 976 | |
| 977 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
| 978 | ret = i2c_add_driver(&wm8580_i2c_driver); |
| 979 | if (ret != 0) { |
| 980 | pr_err("Failed to register WM8580 I2C driver: %d\n", ret); |
| 981 | } |
| 982 | #endif |
| 983 | |
| 984 | return 0; |
Mark Brown | 64089b8 | 2008-12-08 19:17:58 +0000 | [diff] [blame] | 985 | } |
| 986 | module_init(wm8580_modinit); |
| 987 | |
| 988 | static void __exit wm8580_exit(void) |
| 989 | { |
Mark Brown | 6f7cb44 | 2009-03-11 18:31:08 +0000 | [diff] [blame] | 990 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
| 991 | i2c_del_driver(&wm8580_i2c_driver); |
| 992 | #endif |
Mark Brown | 64089b8 | 2008-12-08 19:17:58 +0000 | [diff] [blame] | 993 | } |
| 994 | module_exit(wm8580_exit); |
| 995 | |
Mark Brown | e88ba01 | 2008-08-06 13:18:26 +0100 | [diff] [blame] | 996 | MODULE_DESCRIPTION("ASoC WM8580 driver"); |
| 997 | MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); |
| 998 | MODULE_LICENSE("GPL"); |