blob: 6fa3754f293a96ac500da979d2f049b606da8afd [file] [log] [blame]
Zang Roy-r619114b3afca2006-08-25 16:43:25 +08001/*
2 * MPC7448HPC2 (Taiga) board Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 * 2006 Roy Zang <Roy Zang at freescale.com>.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13
14/ {
15 model = "mpc7448hpc2";
16 compatible = "mpc74xx";
17 #address-cells = <1>;
18 #size-cells = <1>;
19 linux,phandle = <100>;
20
21 cpus {
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080022 #address-cells = <1>;
23 #size-cells =<0>;
24 linux,phandle = <200>;
25
26 PowerPC,7448@0 {
27 device_type = "cpu";
28 reg = <0>;
29 d-cache-line-size = <20>; // 32 bytes
30 i-cache-line-size = <20>; // 32 bytes
31 d-cache-size = <8000>; // L1, 32K bytes
32 i-cache-size = <8000>; // L1, 32K bytes
33 timebase-frequency = <0>; // 33 MHz, from uboot
34 clock-frequency = <0>; // From U-Boot
35 bus-frequency = <0>; // From U-Boot
36 32-bit;
37 linux,phandle = <201>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080038 };
39 };
40
41 memory {
42 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 20000000 // DDR2 512M at 0
45 >;
46 };
47
48 tsi108@c0000000 {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 #interrupt-cells = <2>;
52 device_type = "tsi-bridge";
53 ranges = <00000000 c0000000 00010000>;
54 reg = <c0000000 00010000>;
55 bus-frequency = <0>;
56
57 i2c@7000 {
58 interrupt-parent = <7400>;
59 interrupts = <E 0>;
60 reg = <7000 400>;
61 device_type = "i2c";
62 compatible = "tsi-i2c";
63 };
64
65 mdio@6000 {
66 device_type = "mdio";
67 compatible = "tsi-ethernet";
68
69 ethernet-phy@6000 {
70 linux,phandle = <6000>;
71 interrupt-parent = <7400>;
72 interrupts = <2 1>;
73 reg = <6000 50>;
74 phy-id = <8>;
75 device_type = "ethernet-phy";
76 };
77
78 ethernet-phy@6400 {
79 linux,phandle = <6400>;
80 interrupt-parent = <7400>;
81 interrupts = <2 1>;
82 reg = <6000 50>;
83 phy-id = <9>;
84 device_type = "ethernet-phy";
85 };
86
87 };
88
89 ethernet@6200 {
90 #size-cells = <0>;
91 device_type = "network";
92 model = "TSI-ETH";
93 compatible = "tsi-ethernet";
94 reg = <6000 200>;
95 address = [ 00 06 D2 00 00 01 ];
96 interrupts = <10 2>;
97 interrupt-parent = <7400>;
98 phy-handle = <6000>;
99 };
100
101 ethernet@6600 {
102 #address-cells = <1>;
103 #size-cells = <0>;
104 device_type = "network";
105 model = "TSI-ETH";
106 compatible = "tsi-ethernet";
107 reg = <6400 200>;
108 address = [ 00 06 D2 00 00 02 ];
109 interrupts = <11 2>;
110 interrupt-parent = <7400>;
111 phy-handle = <6400>;
112 };
113
114 serial@7808 {
115 device_type = "serial";
116 compatible = "ns16550";
117 reg = <7808 200>;
118 clock-frequency = <3f6b5a00>;
119 interrupts = <c 0>;
120 interrupt-parent = <7400>;
121 };
122
123 serial@7c08 {
124 device_type = "serial";
125 compatible = "ns16550";
126 reg = <7c08 200>;
127 clock-frequency = <3f6b5a00>;
128 interrupts = <d 0>;
129 interrupt-parent = <7400>;
130 };
131
132 pic@7400 {
133 linux,phandle = <7400>;
134 clock-frequency = <0>;
135 interrupt-controller;
136 #address-cells = <0>;
137 #interrupt-cells = <2>;
138 reg = <7400 400>;
139 built-in;
140 compatible = "chrp,open-pic";
141 device_type = "open-pic";
142 big-endian;
143 };
144 pci@1000 {
145 compatible = "tsi10x";
146 device_type = "pci";
147 linux,phandle = <1000>;
148 #interrupt-cells = <1>;
149 #size-cells = <2>;
150 #address-cells = <3>;
151 reg = <1000 1000>;
152 bus-range = <0 0>;
153 ranges = <02000000 0 e0000000 e0000000 0 1A000000
154 01000000 0 00000000 fa000000 0 00010000>;
155 clock-frequency = <7f28154>;
156 interrupt-parent = <7400>;
157 interrupts = <17 2>;
158 interrupt-map-mask = <f800 0 0 7>;
159 interrupt-map = <
160
161 /* IDSEL 0x11 */
Zang Roy-r619115873c9b2006-11-14 14:31:50 +0800162 0800 0 0 1 1180 24 0
163 0800 0 0 2 1180 25 0
164 0800 0 0 3 1180 26 0
165 0800 0 0 4 1180 27 0
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800166
167 /* IDSEL 0x12 */
Zang Roy-r619115873c9b2006-11-14 14:31:50 +0800168 1000 0 0 1 1180 25 0
169 1000 0 0 2 1180 26 0
170 1000 0 0 3 1180 27 0
171 1000 0 0 4 1180 24 0
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800172
173 /* IDSEL 0x13 */
Zang Roy-r619115873c9b2006-11-14 14:31:50 +0800174 1800 0 0 1 1180 26 0
175 1800 0 0 2 1180 27 0
176 1800 0 0 3 1180 24 0
177 1800 0 0 4 1180 25 0
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800178
179 /* IDSEL 0x14 */
Zang Roy-r619115873c9b2006-11-14 14:31:50 +0800180 2000 0 0 1 1180 27 0
181 2000 0 0 2 1180 24 0
182 2000 0 0 3 1180 25 0
183 2000 0 0 4 1180 26 0
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800184 >;
Zang Roy-r619115873c9b2006-11-14 14:31:50 +0800185 router@1180 {
186 linux,phandle = <1180>;
187 clock-frequency = <0>;
188 interrupt-controller;
189 device_type = "pic-router";
190 #address-cells = <0>;
191 #interrupt-cells = <2>;
192 built-in;
193 big-endian;
194 interrupts = <17 2>;
195 interrupt-parent = <7400>;
196 };
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800197 };
198 };
199
200};