Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1 | /* |
Pierre Ossman | 70f1048 | 2007-07-11 20:04:50 +0200 | [diff] [blame] | 2 | * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3 | * |
Pierre Ossman | b69c905 | 2008-03-08 23:44:25 +0100 | [diff] [blame] | 4 | * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
Pierre Ossman | 643f720 | 2006-09-30 23:27:52 -0700 | [diff] [blame] | 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or (at |
| 9 | * your option) any later version. |
Pierre Ossman | 84c46a5 | 2007-12-02 19:58:16 +0100 | [diff] [blame] | 10 | * |
| 11 | * Thanks to the following companies for their support: |
| 12 | * |
| 13 | * - JMicron (hardware and technical support) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 14 | */ |
| 15 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 16 | #include <linux/delay.h> |
| 17 | #include <linux/highmem.h> |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 18 | #include <linux/io.h> |
Paul Gortmaker | 88b4767 | 2011-07-03 15:15:51 -0400 | [diff] [blame] | 19 | #include <linux/module.h> |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 20 | #include <linux/dma-mapping.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 21 | #include <linux/slab.h> |
Ralf Baechle | 1176360 | 2007-10-23 20:42:11 +0200 | [diff] [blame] | 22 | #include <linux/scatterlist.h> |
Marek Szyprowski | 9bea3c8 | 2010-08-10 18:01:59 -0700 | [diff] [blame] | 23 | #include <linux/regulator/consumer.h> |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 24 | #include <linux/pm_runtime.h> |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 25 | |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 26 | #include <linux/leds.h> |
| 27 | |
Aries Lee | 22113ef | 2010-12-15 08:14:24 +0100 | [diff] [blame] | 28 | #include <linux/mmc/mmc.h> |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 29 | #include <linux/mmc/host.h> |
Konstantin Dorfman | 66e7ce7 | 2013-09-22 15:43:24 +0300 | [diff] [blame] | 30 | #include <linux/mmc/card.h> |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 31 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 32 | #include "sdhci.h" |
| 33 | |
| 34 | #define DRIVER_NAME "sdhci" |
Asutosh Das | 5e7101e | 2013-06-13 13:56:02 +0530 | [diff] [blame] | 35 | #define SDHCI_SUSPEND_TIMEOUT 300 /* 300 ms */ |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 36 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 37 | #define DBG(f, x...) \ |
Russell King | c656317 | 2006-03-29 09:30:20 +0100 | [diff] [blame] | 38 | pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 39 | |
Pierre Ossman | f913431 | 2008-12-21 17:01:48 +0100 | [diff] [blame] | 40 | #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \ |
| 41 | defined(CONFIG_MMC_SDHCI_MODULE)) |
| 42 | #define SDHCI_USE_LEDS_CLASS |
| 43 | #endif |
| 44 | |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 45 | #define MAX_TUNING_LOOP 40 |
| 46 | |
Pierre Ossman | df673b2 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 47 | static unsigned int debug_quirks = 0; |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 48 | static unsigned int debug_quirks2; |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 49 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 50 | static void sdhci_finish_data(struct sdhci_host *); |
| 51 | |
| 52 | static void sdhci_send_command(struct sdhci_host *, struct mmc_command *); |
| 53 | static void sdhci_finish_command(struct sdhci_host *); |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 54 | static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode); |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 55 | static void sdhci_tuning_timer(unsigned long data); |
Sahitya Tummala | 1b248c4 | 2013-05-24 14:08:10 +0530 | [diff] [blame] | 56 | static bool sdhci_check_state(struct sdhci_host *); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 57 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 58 | #ifdef CONFIG_PM_RUNTIME |
| 59 | static int sdhci_runtime_pm_get(struct sdhci_host *host); |
| 60 | static int sdhci_runtime_pm_put(struct sdhci_host *host); |
| 61 | #else |
| 62 | static inline int sdhci_runtime_pm_get(struct sdhci_host *host) |
| 63 | { |
| 64 | return 0; |
| 65 | } |
| 66 | static inline int sdhci_runtime_pm_put(struct sdhci_host *host) |
| 67 | { |
| 68 | return 0; |
| 69 | } |
| 70 | #endif |
| 71 | |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 72 | static inline int sdhci_get_async_int_status(struct sdhci_host *host) |
| 73 | { |
Sahitya Tummala | 784f6e0 | 2013-11-21 10:03:17 +0530 | [diff] [blame] | 74 | return (sdhci_readw(host, SDHCI_HOST_CONTROL2) & |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 75 | SDHCI_CTRL_ASYNC_INT_ENABLE) >> 14; |
| 76 | } |
| 77 | |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 78 | static void sdhci_dump_state(struct sdhci_host *host) |
| 79 | { |
| 80 | struct mmc_host *mmc = host->mmc; |
| 81 | |
| 82 | pr_info("%s: clk: %d clk-gated: %d claimer: %s pwr: %d\n", |
| 83 | mmc_hostname(mmc), host->clock, mmc->clk_gated, |
| 84 | mmc->claimer->comm, host->pwr); |
| 85 | pr_info("%s: rpmstatus[pltfm](runtime-suspend:usage_count:disable_depth)(%d:%d:%d)\n", |
| 86 | mmc_hostname(mmc), mmc->parent->power.runtime_status, |
| 87 | atomic_read(&mmc->parent->power.usage_count), |
| 88 | mmc->parent->power.disable_depth); |
| 89 | } |
| 90 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 91 | static void sdhci_dumpregs(struct sdhci_host *host) |
| 92 | { |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 93 | pr_info(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n", |
Philip Rakity | 412ab65 | 2010-09-22 15:25:13 -0700 | [diff] [blame] | 94 | mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 95 | |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 96 | pr_info(DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 97 | sdhci_readl(host, SDHCI_DMA_ADDRESS), |
| 98 | sdhci_readw(host, SDHCI_HOST_VERSION)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 99 | pr_info(DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n", |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 100 | sdhci_readw(host, SDHCI_BLOCK_SIZE), |
| 101 | sdhci_readw(host, SDHCI_BLOCK_COUNT)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 102 | pr_info(DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n", |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 103 | sdhci_readl(host, SDHCI_ARGUMENT), |
| 104 | sdhci_readw(host, SDHCI_TRANSFER_MODE)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 105 | pr_info(DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n", |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 106 | sdhci_readl(host, SDHCI_PRESENT_STATE), |
| 107 | sdhci_readb(host, SDHCI_HOST_CONTROL)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 108 | pr_info(DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n", |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 109 | sdhci_readb(host, SDHCI_POWER_CONTROL), |
| 110 | sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 111 | pr_info(DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n", |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 112 | sdhci_readb(host, SDHCI_WAKE_UP_CONTROL), |
| 113 | sdhci_readw(host, SDHCI_CLOCK_CONTROL)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 114 | pr_info(DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n", |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 115 | sdhci_readb(host, SDHCI_TIMEOUT_CONTROL), |
| 116 | sdhci_readl(host, SDHCI_INT_STATUS)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 117 | pr_info(DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n", |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 118 | sdhci_readl(host, SDHCI_INT_ENABLE), |
| 119 | sdhci_readl(host, SDHCI_SIGNAL_ENABLE)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 120 | pr_info(DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n", |
Sahitya Tummala | 8f6c000 | 2013-08-07 18:40:29 +0530 | [diff] [blame] | 121 | host->auto_cmd_err_sts, |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 122 | sdhci_readw(host, SDHCI_SLOT_INT_STATUS)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 123 | pr_info(DRIVER_NAME ": Caps: 0x%08x | Caps_1: 0x%08x\n", |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 124 | sdhci_readl(host, SDHCI_CAPABILITIES), |
Philip Rakity | e8120ad | 2010-11-30 00:55:23 -0500 | [diff] [blame] | 125 | sdhci_readl(host, SDHCI_CAPABILITIES_1)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 126 | pr_info(DRIVER_NAME ": Cmd: 0x%08x | Max curr: 0x%08x\n", |
Philip Rakity | e8120ad | 2010-11-30 00:55:23 -0500 | [diff] [blame] | 127 | sdhci_readw(host, SDHCI_COMMAND), |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 128 | sdhci_readl(host, SDHCI_MAX_CURRENT)); |
Asutosh Das | 80c0255 | 2013-07-23 16:20:34 +0530 | [diff] [blame] | 129 | pr_info(DRIVER_NAME ": Resp 1: 0x%08x | Resp 0: 0x%08x\n", |
| 130 | sdhci_readl(host, SDHCI_RESPONSE + 0x4), |
| 131 | sdhci_readl(host, SDHCI_RESPONSE)); |
| 132 | pr_info(DRIVER_NAME ": Resp 3: 0x%08x | Resp 2: 0x%08x\n", |
| 133 | sdhci_readl(host, SDHCI_RESPONSE + 0xC), |
| 134 | sdhci_readl(host, SDHCI_RESPONSE + 0x8)); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 135 | pr_info(DRIVER_NAME ": Host ctl2: 0x%08x\n", |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 136 | sdhci_readw(host, SDHCI_HOST_CONTROL2)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 137 | |
Ben Dooks | be3f4ae | 2009-06-08 23:33:52 +0100 | [diff] [blame] | 138 | if (host->flags & SDHCI_USE_ADMA) |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 139 | pr_info(DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n", |
Ben Dooks | be3f4ae | 2009-06-08 23:33:52 +0100 | [diff] [blame] | 140 | readl(host->ioaddr + SDHCI_ADMA_ERROR), |
| 141 | readl(host->ioaddr + SDHCI_ADMA_ADDRESS)); |
| 142 | |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 143 | sdhci_dump_state(host); |
| 144 | pr_info(DRIVER_NAME ": ===========================================\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 145 | } |
| 146 | |
Sujit Reddy Thumma | 693af8d | 2013-06-19 20:25:38 +0530 | [diff] [blame] | 147 | #define MAX_PM_QOS_TIMEOUT_VALUE 100000 /* 100 ms */ |
| 148 | static ssize_t |
| 149 | show_sdhci_pm_qos_tout(struct device *dev, struct device_attribute *attr, |
| 150 | char *buf) |
| 151 | { |
| 152 | struct sdhci_host *host = dev_get_drvdata(dev); |
| 153 | |
| 154 | return snprintf(buf, PAGE_SIZE, "%d us\n", host->pm_qos_timeout_us); |
| 155 | } |
| 156 | |
| 157 | static ssize_t |
| 158 | store_sdhci_pm_qos_tout(struct device *dev, struct device_attribute *attr, |
| 159 | const char *buf, size_t count) |
| 160 | { |
| 161 | struct sdhci_host *host = dev_get_drvdata(dev); |
| 162 | uint32_t value; |
| 163 | unsigned long flags; |
| 164 | |
| 165 | if (!kstrtou32(buf, 0, &value)) { |
| 166 | spin_lock_irqsave(&host->lock, flags); |
| 167 | if (value <= MAX_PM_QOS_TIMEOUT_VALUE) |
| 168 | host->pm_qos_timeout_us = value; |
| 169 | spin_unlock_irqrestore(&host->lock, flags); |
| 170 | } |
| 171 | return count; |
| 172 | } |
| 173 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 174 | /*****************************************************************************\ |
| 175 | * * |
| 176 | * Low level functions * |
| 177 | * * |
| 178 | \*****************************************************************************/ |
| 179 | |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 180 | static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set) |
| 181 | { |
| 182 | u32 ier; |
| 183 | |
| 184 | ier = sdhci_readl(host, SDHCI_INT_ENABLE); |
| 185 | ier &= ~clear; |
| 186 | ier |= set; |
| 187 | sdhci_writel(host, ier, SDHCI_INT_ENABLE); |
| 188 | sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE); |
| 189 | } |
| 190 | |
| 191 | static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs) |
| 192 | { |
| 193 | sdhci_clear_set_irqs(host, 0, irqs); |
| 194 | } |
| 195 | |
| 196 | static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs) |
| 197 | { |
| 198 | sdhci_clear_set_irqs(host, irqs, 0); |
| 199 | } |
| 200 | |
| 201 | static void sdhci_set_card_detection(struct sdhci_host *host, bool enable) |
| 202 | { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 203 | u32 present, irqs; |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 204 | |
Adrian Hunter | c79396c | 2011-12-27 15:48:42 +0200 | [diff] [blame] | 205 | if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || |
Daniel Drake | 87b87a3 | 2012-04-10 00:14:20 +0100 | [diff] [blame] | 206 | (host->mmc->caps & MMC_CAP_NONREMOVABLE)) |
Adrian Hunter | 66fd8ad | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 207 | return; |
| 208 | |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 209 | present = sdhci_readl(host, SDHCI_PRESENT_STATE) & |
| 210 | SDHCI_CARD_PRESENT; |
| 211 | irqs = present ? SDHCI_INT_CARD_REMOVE : SDHCI_INT_CARD_INSERT; |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 212 | |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 213 | if (enable) |
| 214 | sdhci_unmask_irqs(host, irqs); |
| 215 | else |
| 216 | sdhci_mask_irqs(host, irqs); |
| 217 | } |
| 218 | |
| 219 | static void sdhci_enable_card_detection(struct sdhci_host *host) |
| 220 | { |
| 221 | sdhci_set_card_detection(host, true); |
| 222 | } |
| 223 | |
| 224 | static void sdhci_disable_card_detection(struct sdhci_host *host) |
| 225 | { |
| 226 | sdhci_set_card_detection(host, false); |
| 227 | } |
| 228 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 229 | static void sdhci_reset(struct sdhci_host *host, u8 mask) |
| 230 | { |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 231 | unsigned long timeout; |
Anton Vorontsov | 063a9db | 2009-03-17 00:14:02 +0300 | [diff] [blame] | 232 | u32 uninitialized_var(ier); |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 233 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 234 | if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 235 | if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & |
Pierre Ossman | 8a4da14 | 2006-10-04 02:15:40 -0700 | [diff] [blame] | 236 | SDHCI_CARD_PRESENT)) |
| 237 | return; |
| 238 | } |
| 239 | |
Anton Vorontsov | 063a9db | 2009-03-17 00:14:02 +0300 | [diff] [blame] | 240 | if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) |
| 241 | ier = sdhci_readl(host, SDHCI_INT_ENABLE); |
| 242 | |
Philip Rakity | 393c1a3 | 2011-01-21 11:26:40 -0800 | [diff] [blame] | 243 | if (host->ops->platform_reset_enter) |
| 244 | host->ops->platform_reset_enter(host, mask); |
| 245 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 246 | sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 247 | |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 248 | if (mask & SDHCI_RESET_ALL) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 249 | host->clock = 0; |
| 250 | |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 251 | /* Wait max 100 ms */ |
| 252 | timeout = 100; |
| 253 | |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 254 | if (host->ops->check_power_status && host->pwr && |
| 255 | (mask & SDHCI_RESET_ALL)) |
Sahitya Tummala | 179e738 | 2013-03-20 19:24:01 +0530 | [diff] [blame] | 256 | host->ops->check_power_status(host, REQ_BUS_OFF); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 257 | |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 258 | /* hw clears the bit when it's done */ |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 259 | while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) { |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 260 | if (timeout == 0) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 261 | pr_err("%s: Reset 0x%x never completed.\n", |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 262 | mmc_hostname(host->mmc), (int)mask); |
| 263 | sdhci_dumpregs(host); |
| 264 | return; |
| 265 | } |
| 266 | timeout--; |
| 267 | mdelay(1); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 268 | } |
Anton Vorontsov | 063a9db | 2009-03-17 00:14:02 +0300 | [diff] [blame] | 269 | |
Philip Rakity | 393c1a3 | 2011-01-21 11:26:40 -0800 | [diff] [blame] | 270 | if (host->ops->platform_reset_exit) |
| 271 | host->ops->platform_reset_exit(host, mask); |
| 272 | |
Anton Vorontsov | 063a9db | 2009-03-17 00:14:02 +0300 | [diff] [blame] | 273 | if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) |
| 274 | sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 275 | |
| 276 | if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { |
| 277 | if ((host->ops->enable_dma) && (mask & SDHCI_RESET_ALL)) |
| 278 | host->ops->enable_dma(host); |
| 279 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 280 | } |
| 281 | |
Nicolas Pitre | 2f4cbb3 | 2010-03-05 13:43:32 -0800 | [diff] [blame] | 282 | static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios); |
| 283 | |
| 284 | static void sdhci_init(struct sdhci_host *host, int soft) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 285 | { |
Nicolas Pitre | 2f4cbb3 | 2010-03-05 13:43:32 -0800 | [diff] [blame] | 286 | if (soft) |
| 287 | sdhci_reset(host, SDHCI_RESET_CMD|SDHCI_RESET_DATA); |
| 288 | else |
| 289 | sdhci_reset(host, SDHCI_RESET_ALL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 290 | |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 291 | sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, |
| 292 | SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 293 | SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | |
| 294 | SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT | |
Asutosh Das | 80c0255 | 2013-07-23 16:20:34 +0530 | [diff] [blame] | 295 | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE | |
| 296 | SDHCI_INT_AUTO_CMD_ERR); |
Nicolas Pitre | 2f4cbb3 | 2010-03-05 13:43:32 -0800 | [diff] [blame] | 297 | |
| 298 | if (soft) { |
| 299 | /* force clock reconfiguration */ |
| 300 | host->clock = 0; |
| 301 | sdhci_set_ios(host->mmc, &host->mmc->ios); |
| 302 | } |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 303 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 304 | |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 305 | static void sdhci_reinit(struct sdhci_host *host) |
| 306 | { |
Nicolas Pitre | 2f4cbb3 | 2010-03-05 13:43:32 -0800 | [diff] [blame] | 307 | sdhci_init(host, 0); |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 308 | sdhci_enable_card_detection(host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 309 | } |
| 310 | |
| 311 | static void sdhci_activate_led(struct sdhci_host *host) |
| 312 | { |
| 313 | u8 ctrl; |
| 314 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 315 | ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 316 | ctrl |= SDHCI_CTRL_LED; |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 317 | sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 318 | } |
| 319 | |
| 320 | static void sdhci_deactivate_led(struct sdhci_host *host) |
| 321 | { |
| 322 | u8 ctrl; |
| 323 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 324 | ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 325 | ctrl &= ~SDHCI_CTRL_LED; |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 326 | sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 327 | } |
| 328 | |
Pierre Ossman | f913431 | 2008-12-21 17:01:48 +0100 | [diff] [blame] | 329 | #ifdef SDHCI_USE_LEDS_CLASS |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 330 | static void sdhci_led_control(struct led_classdev *led, |
| 331 | enum led_brightness brightness) |
| 332 | { |
| 333 | struct sdhci_host *host = container_of(led, struct sdhci_host, led); |
| 334 | unsigned long flags; |
| 335 | |
| 336 | spin_lock_irqsave(&host->lock, flags); |
| 337 | |
Sahitya Tummala | 1b248c4 | 2013-05-24 14:08:10 +0530 | [diff] [blame] | 338 | if (host->runtime_suspended || sdhci_check_state(host)) |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 339 | goto out; |
| 340 | |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 341 | if (brightness == LED_OFF) |
| 342 | sdhci_deactivate_led(host); |
| 343 | else |
| 344 | sdhci_activate_led(host); |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 345 | out: |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 346 | spin_unlock_irqrestore(&host->lock, flags); |
| 347 | } |
| 348 | #endif |
| 349 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 350 | /*****************************************************************************\ |
| 351 | * * |
| 352 | * Core functions * |
| 353 | * * |
| 354 | \*****************************************************************************/ |
| 355 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 356 | static void sdhci_read_block_pio(struct sdhci_host *host) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 357 | { |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 358 | unsigned long flags; |
| 359 | size_t blksize, len, chunk; |
Steven Noonan | 7244b85 | 2008-10-01 01:50:25 -0700 | [diff] [blame] | 360 | u32 uninitialized_var(scratch); |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 361 | u8 *buf; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 362 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 363 | DBG("PIO reading\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 364 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 365 | blksize = host->data->blksz; |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 366 | chunk = 0; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 367 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 368 | local_irq_save(flags); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 369 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 370 | while (blksize) { |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 371 | if (!sg_miter_next(&host->sg_miter)) |
| 372 | BUG(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 373 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 374 | len = min(host->sg_miter.length, blksize); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 375 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 376 | blksize -= len; |
| 377 | host->sg_miter.consumed = len; |
Alex Dubov | 14d836e | 2007-04-13 19:04:38 +0200 | [diff] [blame] | 378 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 379 | buf = host->sg_miter.addr; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 380 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 381 | while (len) { |
| 382 | if (chunk == 0) { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 383 | scratch = sdhci_readl(host, SDHCI_BUFFER); |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 384 | chunk = 4; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 385 | } |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 386 | |
| 387 | *buf = scratch & 0xFF; |
| 388 | |
| 389 | buf++; |
| 390 | scratch >>= 8; |
| 391 | chunk--; |
| 392 | len--; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 393 | } |
| 394 | } |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 395 | |
| 396 | sg_miter_stop(&host->sg_miter); |
| 397 | |
| 398 | local_irq_restore(flags); |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 399 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 400 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 401 | static void sdhci_write_block_pio(struct sdhci_host *host) |
| 402 | { |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 403 | unsigned long flags; |
| 404 | size_t blksize, len, chunk; |
| 405 | u32 scratch; |
| 406 | u8 *buf; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 407 | |
| 408 | DBG("PIO writing\n"); |
| 409 | |
| 410 | blksize = host->data->blksz; |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 411 | chunk = 0; |
| 412 | scratch = 0; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 413 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 414 | local_irq_save(flags); |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 415 | |
| 416 | while (blksize) { |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 417 | if (!sg_miter_next(&host->sg_miter)) |
| 418 | BUG(); |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 419 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 420 | len = min(host->sg_miter.length, blksize); |
Alex Dubov | 14d836e | 2007-04-13 19:04:38 +0200 | [diff] [blame] | 421 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 422 | blksize -= len; |
| 423 | host->sg_miter.consumed = len; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 424 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 425 | buf = host->sg_miter.addr; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 426 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 427 | while (len) { |
| 428 | scratch |= (u32)*buf << (chunk * 8); |
| 429 | |
| 430 | buf++; |
| 431 | chunk++; |
| 432 | len--; |
| 433 | |
| 434 | if ((chunk == 4) || ((len == 0) && (blksize == 0))) { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 435 | sdhci_writel(host, scratch, SDHCI_BUFFER); |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 436 | chunk = 0; |
| 437 | scratch = 0; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 438 | } |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 439 | } |
| 440 | } |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 441 | |
| 442 | sg_miter_stop(&host->sg_miter); |
| 443 | |
| 444 | local_irq_restore(flags); |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 445 | } |
| 446 | |
| 447 | static void sdhci_transfer_pio(struct sdhci_host *host) |
| 448 | { |
| 449 | u32 mask; |
| 450 | |
| 451 | BUG_ON(!host->data); |
| 452 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 453 | if (host->blocks == 0) |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 454 | return; |
| 455 | |
| 456 | if (host->data->flags & MMC_DATA_READ) |
| 457 | mask = SDHCI_DATA_AVAILABLE; |
| 458 | else |
| 459 | mask = SDHCI_SPACE_AVAILABLE; |
| 460 | |
Pierre Ossman | 4a3cba3 | 2008-07-29 00:11:16 +0200 | [diff] [blame] | 461 | /* |
| 462 | * Some controllers (JMicron JMB38x) mess up the buffer bits |
| 463 | * for transfers < 4 bytes. As long as it is just one block, |
| 464 | * we can ignore the bits. |
| 465 | */ |
| 466 | if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && |
| 467 | (host->data->blocks == 1)) |
| 468 | mask = ~0; |
| 469 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 470 | while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { |
Anton Vorontsov | 3e3bf20 | 2009-03-17 00:14:00 +0300 | [diff] [blame] | 471 | if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) |
| 472 | udelay(100); |
| 473 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 474 | if (host->data->flags & MMC_DATA_READ) |
| 475 | sdhci_read_block_pio(host); |
| 476 | else |
| 477 | sdhci_write_block_pio(host); |
| 478 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 479 | host->blocks--; |
| 480 | if (host->blocks == 0) |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 481 | break; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 482 | } |
| 483 | |
| 484 | DBG("PIO transfer complete.\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 485 | } |
| 486 | |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 487 | static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags) |
| 488 | { |
| 489 | local_irq_save(*flags); |
Cong Wang | 9a4bf3b | 2011-11-27 13:27:00 +0800 | [diff] [blame] | 490 | return kmap_atomic(sg_page(sg)) + sg->offset; |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 491 | } |
| 492 | |
| 493 | static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags) |
| 494 | { |
Cong Wang | 9a4bf3b | 2011-11-27 13:27:00 +0800 | [diff] [blame] | 495 | kunmap_atomic(buffer); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 496 | local_irq_restore(*flags); |
| 497 | } |
| 498 | |
Ben Dooks | 118cd17 | 2010-03-05 13:43:26 -0800 | [diff] [blame] | 499 | static void sdhci_set_adma_desc(u8 *desc, u32 addr, int len, unsigned cmd) |
| 500 | { |
Ben Dooks | 9e506f3 | 2010-03-05 13:43:29 -0800 | [diff] [blame] | 501 | __le32 *dataddr = (__le32 __force *)(desc + 4); |
| 502 | __le16 *cmdlen = (__le16 __force *)desc; |
Ben Dooks | 118cd17 | 2010-03-05 13:43:26 -0800 | [diff] [blame] | 503 | |
Ben Dooks | 9e506f3 | 2010-03-05 13:43:29 -0800 | [diff] [blame] | 504 | /* SDHCI specification says ADMA descriptors should be 4 byte |
| 505 | * aligned, so using 16 or 32bit operations should be safe. */ |
Ben Dooks | 118cd17 | 2010-03-05 13:43:26 -0800 | [diff] [blame] | 506 | |
Ben Dooks | 9e506f3 | 2010-03-05 13:43:29 -0800 | [diff] [blame] | 507 | cmdlen[0] = cpu_to_le16(cmd); |
| 508 | cmdlen[1] = cpu_to_le16(len); |
| 509 | |
| 510 | dataddr[0] = cpu_to_le32(addr); |
Ben Dooks | 118cd17 | 2010-03-05 13:43:26 -0800 | [diff] [blame] | 511 | } |
| 512 | |
Shawn Guo | 6f9ad6f | 2011-04-17 00:48:36 +0800 | [diff] [blame] | 513 | static int sdhci_pre_dma_transfer(struct sdhci_host *host, |
| 514 | struct mmc_data *data, |
| 515 | struct sdhci_next *next) |
| 516 | { |
| 517 | int sg_count; |
| 518 | |
| 519 | if (!next && data->host_cookie && |
| 520 | data->host_cookie != host->next_data.cookie) { |
| 521 | printk(KERN_WARNING "[%s] invalid cookie: data->host_cookie %d" |
| 522 | " host->next_data.cookie %d\n", |
| 523 | __func__, data->host_cookie, host->next_data.cookie); |
| 524 | data->host_cookie = 0; |
| 525 | } |
| 526 | |
| 527 | /* Check if next job is already prepared */ |
| 528 | if (next || |
| 529 | (!next && data->host_cookie != host->next_data.cookie)) { |
| 530 | sg_count = dma_map_sg(mmc_dev(host->mmc), data->sg, |
| 531 | data->sg_len, |
| 532 | (data->flags & MMC_DATA_WRITE) ? |
| 533 | DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| 534 | } else { |
| 535 | sg_count = host->next_data.sg_count; |
| 536 | host->next_data.sg_count = 0; |
| 537 | } |
| 538 | |
| 539 | if (sg_count == 0) |
| 540 | return -EINVAL; |
| 541 | |
| 542 | if (next) { |
| 543 | next->sg_count = sg_count; |
| 544 | data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie; |
| 545 | } else |
| 546 | host->sg_count = sg_count; |
| 547 | |
| 548 | return sg_count; |
| 549 | } |
| 550 | |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 551 | static int sdhci_adma_table_pre(struct sdhci_host *host, |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 552 | struct mmc_data *data) |
| 553 | { |
| 554 | int direction; |
| 555 | |
| 556 | u8 *desc; |
| 557 | u8 *align; |
| 558 | dma_addr_t addr; |
| 559 | dma_addr_t align_addr; |
| 560 | int len, offset; |
| 561 | |
| 562 | struct scatterlist *sg; |
| 563 | int i; |
| 564 | char *buffer; |
| 565 | unsigned long flags; |
| 566 | |
| 567 | /* |
| 568 | * The spec does not specify endianness of descriptor table. |
| 569 | * We currently guess that it is LE. |
| 570 | */ |
| 571 | |
| 572 | if (data->flags & MMC_DATA_READ) |
| 573 | direction = DMA_FROM_DEVICE; |
| 574 | else |
| 575 | direction = DMA_TO_DEVICE; |
| 576 | |
| 577 | /* |
| 578 | * The ADMA descriptor table is mapped further down as we |
| 579 | * need to fill it with data first. |
| 580 | */ |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 581 | host->align_addr = dma_map_single(mmc_dev(host->mmc), |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 582 | host->align_buffer, |
| 583 | host->align_buf_sz, |
| 584 | direction); |
FUJITA Tomonori | 8d8bb39 | 2008-07-25 19:44:49 -0700 | [diff] [blame] | 585 | if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr)) |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 586 | goto fail; |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 587 | BUG_ON(host->align_addr & 0x3); |
| 588 | |
Shawn Guo | 6f9ad6f | 2011-04-17 00:48:36 +0800 | [diff] [blame] | 589 | host->sg_count = sdhci_pre_dma_transfer(host, data, NULL); |
| 590 | if (host->sg_count < 0) |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 591 | goto unmap_align; |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 592 | |
| 593 | desc = host->adma_desc; |
| 594 | align = host->align_buffer; |
| 595 | |
| 596 | align_addr = host->align_addr; |
| 597 | |
| 598 | for_each_sg(data->sg, sg, host->sg_count, i) { |
| 599 | addr = sg_dma_address(sg); |
| 600 | len = sg_dma_len(sg); |
| 601 | |
| 602 | /* |
| 603 | * The SDHCI specification states that ADMA |
| 604 | * addresses must be 32-bit aligned. If they |
| 605 | * aren't, then we use a bounce buffer for |
| 606 | * the (up to three) bytes that screw up the |
| 607 | * alignment. |
| 608 | */ |
| 609 | offset = (4 - (addr & 0x3)) & 0x3; |
| 610 | if (offset) { |
| 611 | if (data->flags & MMC_DATA_WRITE) { |
| 612 | buffer = sdhci_kmap_atomic(sg, &flags); |
Pierre Ossman | 6cefd05 | 2008-07-21 00:45:15 +0200 | [diff] [blame] | 613 | WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 614 | memcpy(align, buffer, offset); |
| 615 | sdhci_kunmap_atomic(buffer, &flags); |
| 616 | } |
| 617 | |
Ben Dooks | 118cd17 | 2010-03-05 13:43:26 -0800 | [diff] [blame] | 618 | /* tran, valid */ |
| 619 | sdhci_set_adma_desc(desc, align_addr, offset, 0x21); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 620 | |
| 621 | BUG_ON(offset > 65536); |
| 622 | |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 623 | align += 4; |
| 624 | align_addr += 4; |
| 625 | |
| 626 | desc += 8; |
| 627 | |
| 628 | addr += offset; |
| 629 | len -= offset; |
| 630 | } |
| 631 | |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 632 | BUG_ON(len > 65536); |
| 633 | |
Ben Dooks | 118cd17 | 2010-03-05 13:43:26 -0800 | [diff] [blame] | 634 | /* tran, valid */ |
| 635 | sdhci_set_adma_desc(desc, addr, len, 0x21); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 636 | desc += 8; |
| 637 | |
| 638 | /* |
| 639 | * If this triggers then we have a calculation bug |
| 640 | * somewhere. :/ |
| 641 | */ |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 642 | WARN_ON((desc - host->adma_desc) > host->adma_desc_sz); |
| 643 | |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 644 | } |
| 645 | |
Thomas Abraham | 70764a9 | 2010-05-26 14:42:04 -0700 | [diff] [blame] | 646 | if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { |
| 647 | /* |
| 648 | * Mark the last descriptor as the terminating descriptor |
| 649 | */ |
| 650 | if (desc != host->adma_desc) { |
| 651 | desc -= 8; |
| 652 | desc[0] |= 0x2; /* end */ |
| 653 | } |
| 654 | } else { |
| 655 | /* |
| 656 | * Add a terminating entry. |
| 657 | */ |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 658 | |
Thomas Abraham | 70764a9 | 2010-05-26 14:42:04 -0700 | [diff] [blame] | 659 | /* nop, end, valid */ |
| 660 | sdhci_set_adma_desc(desc, 0, 0, 0x3); |
| 661 | } |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 662 | |
| 663 | /* |
| 664 | * Resync align buffer as we might have changed it. |
| 665 | */ |
| 666 | if (data->flags & MMC_DATA_WRITE) { |
| 667 | dma_sync_single_for_device(mmc_dev(host->mmc), |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 668 | host->align_addr, |
| 669 | host->align_buf_sz, |
| 670 | direction); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 671 | } |
| 672 | |
| 673 | host->adma_addr = dma_map_single(mmc_dev(host->mmc), |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 674 | host->adma_desc, |
| 675 | host->adma_desc_sz, |
| 676 | DMA_TO_DEVICE); |
Pierre Ossman | 980167b | 2008-07-29 00:53:20 +0200 | [diff] [blame] | 677 | if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr)) |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 678 | goto unmap_entries; |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 679 | BUG_ON(host->adma_addr & 0x3); |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 680 | |
| 681 | return 0; |
| 682 | |
| 683 | unmap_entries: |
| 684 | dma_unmap_sg(mmc_dev(host->mmc), data->sg, |
| 685 | data->sg_len, direction); |
| 686 | unmap_align: |
| 687 | dma_unmap_single(mmc_dev(host->mmc), host->align_addr, |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 688 | host->align_buf_sz, direction); |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 689 | fail: |
| 690 | return -EINVAL; |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 691 | } |
| 692 | |
| 693 | static void sdhci_adma_table_post(struct sdhci_host *host, |
| 694 | struct mmc_data *data) |
| 695 | { |
| 696 | int direction; |
| 697 | |
| 698 | struct scatterlist *sg; |
| 699 | int i, size; |
| 700 | u8 *align; |
| 701 | char *buffer; |
| 702 | unsigned long flags; |
| 703 | |
| 704 | if (data->flags & MMC_DATA_READ) |
| 705 | direction = DMA_FROM_DEVICE; |
| 706 | else |
| 707 | direction = DMA_TO_DEVICE; |
| 708 | |
| 709 | dma_unmap_single(mmc_dev(host->mmc), host->adma_addr, |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 710 | host->adma_desc_sz, DMA_TO_DEVICE); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 711 | |
| 712 | dma_unmap_single(mmc_dev(host->mmc), host->align_addr, |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 713 | host->align_buf_sz, direction); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 714 | |
| 715 | if (data->flags & MMC_DATA_READ) { |
| 716 | dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, |
| 717 | data->sg_len, direction); |
| 718 | |
| 719 | align = host->align_buffer; |
| 720 | |
| 721 | for_each_sg(data->sg, sg, host->sg_count, i) { |
| 722 | if (sg_dma_address(sg) & 0x3) { |
| 723 | size = 4 - (sg_dma_address(sg) & 0x3); |
| 724 | |
| 725 | buffer = sdhci_kmap_atomic(sg, &flags); |
Pierre Ossman | 6cefd05 | 2008-07-21 00:45:15 +0200 | [diff] [blame] | 726 | WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3)); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 727 | memcpy(buffer, align, size); |
| 728 | sdhci_kunmap_atomic(buffer, &flags); |
| 729 | |
| 730 | align += 4; |
| 731 | } |
| 732 | } |
| 733 | } |
| 734 | |
Shawn Guo | 6f9ad6f | 2011-04-17 00:48:36 +0800 | [diff] [blame] | 735 | if (!data->host_cookie) |
| 736 | dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, |
| 737 | direction); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 738 | } |
| 739 | |
Andrei Warkentin | a3c7778 | 2011-04-11 16:13:42 -0500 | [diff] [blame] | 740 | static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 741 | { |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 742 | u8 count; |
Andrei Warkentin | a3c7778 | 2011-04-11 16:13:42 -0500 | [diff] [blame] | 743 | struct mmc_data *data = cmd->data; |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 744 | unsigned target_timeout, current_timeout; |
Sahitya Tummala | f667cc1 | 2013-06-10 16:32:51 +0530 | [diff] [blame] | 745 | u32 curr_clk = 0; /* In KHz */ |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 746 | |
Pierre Ossman | ee53ab5 | 2008-07-05 00:25:15 +0200 | [diff] [blame] | 747 | /* |
| 748 | * If the host controller provides us with an incorrect timeout |
| 749 | * value, just skip the check and use 0xE. The hardware may take |
| 750 | * longer to time out, but that's much better than having a too-short |
| 751 | * timeout value. |
| 752 | */ |
Pierre Ossman | 11a2f1b | 2009-06-21 20:59:33 +0200 | [diff] [blame] | 753 | if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) |
Pierre Ossman | ee53ab5 | 2008-07-05 00:25:15 +0200 | [diff] [blame] | 754 | return 0xE; |
Pierre Ossman | e538fbe | 2007-08-12 16:46:32 +0200 | [diff] [blame] | 755 | |
Andrei Warkentin | a3c7778 | 2011-04-11 16:13:42 -0500 | [diff] [blame] | 756 | /* Unspecified timeout, assume max */ |
| 757 | if (!data && !cmd->cmd_timeout_ms) |
| 758 | return 0xE; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 759 | |
Andrei Warkentin | a3c7778 | 2011-04-11 16:13:42 -0500 | [diff] [blame] | 760 | /* timeout in us */ |
| 761 | if (!data) |
| 762 | target_timeout = cmd->cmd_timeout_ms * 1000; |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 763 | else { |
| 764 | target_timeout = data->timeout_ns / 1000; |
| 765 | if (host->clock) |
| 766 | target_timeout += data->timeout_clks / host->clock; |
| 767 | } |
Anton Vorontsov | 81b3980 | 2009-09-22 16:45:13 -0700 | [diff] [blame] | 768 | |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 769 | /* |
| 770 | * Figure out needed cycles. |
| 771 | * We do this in steps in order to fit inside a 32 bit int. |
| 772 | * The first step is the minimum timeout, which will have a |
| 773 | * minimum resolution of 6 bits: |
| 774 | * (1) 2^13*1000 > 2^22, |
| 775 | * (2) host->timeout_clk < 2^16 |
| 776 | * => |
| 777 | * (1) / (2) > 2^6 |
| 778 | */ |
| 779 | count = 0; |
Sahitya Tummala | f667cc1 | 2013-06-10 16:32:51 +0530 | [diff] [blame] | 780 | if (host->quirks2 & SDHCI_QUIRK2_ALWAYS_USE_BASE_CLOCK) { |
| 781 | curr_clk = host->clock / 1000; |
| 782 | if (host->quirks2 & SDHCI_QUIRK2_DIVIDE_TOUT_BY_4) |
| 783 | curr_clk /= 4; |
| 784 | current_timeout = (1 << 13) * 1000 / curr_clk; |
| 785 | } else { |
| 786 | current_timeout = (1 << 13) * 1000 / host->timeout_clk; |
| 787 | } |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 788 | while (current_timeout < target_timeout) { |
| 789 | count++; |
| 790 | current_timeout <<= 1; |
| 791 | if (count >= 0xF) |
| 792 | break; |
| 793 | } |
| 794 | |
Sahitya Tummala | 4d12d0b | 2013-04-12 11:59:25 +0530 | [diff] [blame] | 795 | if (!(host->quirks2 & SDHCI_QUIRK2_USE_RESERVED_MAX_TIMEOUT)) { |
| 796 | if (count >= 0xF) { |
| 797 | DBG("%s: Too large timeout 0x%x requested for CMD%d!\n", |
| 798 | mmc_hostname(host->mmc), count, cmd->opcode); |
| 799 | count = 0xE; |
| 800 | } |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 801 | } |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 802 | |
Pierre Ossman | ee53ab5 | 2008-07-05 00:25:15 +0200 | [diff] [blame] | 803 | return count; |
| 804 | } |
| 805 | |
Anton Vorontsov | 6aa943a | 2009-03-17 00:13:50 +0300 | [diff] [blame] | 806 | static void sdhci_set_transfer_irqs(struct sdhci_host *host) |
| 807 | { |
| 808 | u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL; |
| 809 | u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR; |
| 810 | |
| 811 | if (host->flags & SDHCI_REQ_USE_DMA) |
| 812 | sdhci_clear_set_irqs(host, pio_irqs, dma_irqs); |
| 813 | else |
| 814 | sdhci_clear_set_irqs(host, dma_irqs, pio_irqs); |
| 815 | } |
| 816 | |
Andrei Warkentin | a3c7778 | 2011-04-11 16:13:42 -0500 | [diff] [blame] | 817 | static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) |
Pierre Ossman | ee53ab5 | 2008-07-05 00:25:15 +0200 | [diff] [blame] | 818 | { |
| 819 | u8 count; |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 820 | u8 ctrl; |
Andrei Warkentin | a3c7778 | 2011-04-11 16:13:42 -0500 | [diff] [blame] | 821 | struct mmc_data *data = cmd->data; |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 822 | int ret; |
Pierre Ossman | ee53ab5 | 2008-07-05 00:25:15 +0200 | [diff] [blame] | 823 | |
| 824 | WARN_ON(host->data); |
| 825 | |
Andrei Warkentin | a3c7778 | 2011-04-11 16:13:42 -0500 | [diff] [blame] | 826 | if (data || (cmd->flags & MMC_RSP_BUSY)) { |
| 827 | count = sdhci_calc_timeout(host, cmd); |
| 828 | sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL); |
| 829 | } |
| 830 | |
| 831 | if (!data) |
Pierre Ossman | ee53ab5 | 2008-07-05 00:25:15 +0200 | [diff] [blame] | 832 | return; |
| 833 | |
| 834 | /* Sanity checks */ |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 835 | BUG_ON(data->blksz * data->blocks > host->mmc->max_req_size); |
Pierre Ossman | ee53ab5 | 2008-07-05 00:25:15 +0200 | [diff] [blame] | 836 | BUG_ON(data->blksz > host->mmc->max_blk_size); |
| 837 | BUG_ON(data->blocks > 65535); |
| 838 | |
| 839 | host->data = data; |
| 840 | host->data_early = 0; |
Mikko Vinni | f6a03cb | 2011-04-12 09:36:18 -0400 | [diff] [blame] | 841 | host->data->bytes_xfered = 0; |
Pierre Ossman | ee53ab5 | 2008-07-05 00:25:15 +0200 | [diff] [blame] | 842 | |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 843 | if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) |
Pierre Ossman | c9fddbc | 2007-12-02 19:52:11 +0100 | [diff] [blame] | 844 | host->flags |= SDHCI_REQ_USE_DMA; |
| 845 | |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 846 | /* |
| 847 | * FIXME: This doesn't account for merging when mapping the |
| 848 | * scatterlist. |
| 849 | */ |
| 850 | if (host->flags & SDHCI_REQ_USE_DMA) { |
| 851 | int broken, i; |
| 852 | struct scatterlist *sg; |
| 853 | |
| 854 | broken = 0; |
| 855 | if (host->flags & SDHCI_USE_ADMA) { |
| 856 | if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) |
| 857 | broken = 1; |
| 858 | } else { |
| 859 | if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) |
| 860 | broken = 1; |
| 861 | } |
| 862 | |
| 863 | if (unlikely(broken)) { |
| 864 | for_each_sg(data->sg, sg, data->sg_len, i) { |
| 865 | if (sg->length & 0x3) { |
| 866 | DBG("Reverting to PIO because of " |
| 867 | "transfer size (%d)\n", |
| 868 | sg->length); |
| 869 | host->flags &= ~SDHCI_REQ_USE_DMA; |
| 870 | break; |
| 871 | } |
| 872 | } |
| 873 | } |
Pierre Ossman | c9fddbc | 2007-12-02 19:52:11 +0100 | [diff] [blame] | 874 | } |
| 875 | |
| 876 | /* |
| 877 | * The assumption here being that alignment is the same after |
| 878 | * translation to device address space. |
| 879 | */ |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 880 | if (host->flags & SDHCI_REQ_USE_DMA) { |
| 881 | int broken, i; |
| 882 | struct scatterlist *sg; |
| 883 | |
| 884 | broken = 0; |
| 885 | if (host->flags & SDHCI_USE_ADMA) { |
| 886 | /* |
| 887 | * As we use 3 byte chunks to work around |
| 888 | * alignment problems, we need to check this |
| 889 | * quirk. |
| 890 | */ |
| 891 | if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) |
| 892 | broken = 1; |
| 893 | } else { |
| 894 | if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) |
| 895 | broken = 1; |
| 896 | } |
| 897 | |
| 898 | if (unlikely(broken)) { |
| 899 | for_each_sg(data->sg, sg, data->sg_len, i) { |
| 900 | if (sg->offset & 0x3) { |
| 901 | DBG("Reverting to PIO because of " |
| 902 | "bad alignment\n"); |
| 903 | host->flags &= ~SDHCI_REQ_USE_DMA; |
| 904 | break; |
| 905 | } |
| 906 | } |
| 907 | } |
| 908 | } |
| 909 | |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 910 | if (host->flags & SDHCI_REQ_USE_DMA) { |
| 911 | if (host->flags & SDHCI_USE_ADMA) { |
| 912 | ret = sdhci_adma_table_pre(host, data); |
| 913 | if (ret) { |
| 914 | /* |
| 915 | * This only happens when someone fed |
| 916 | * us an invalid request. |
| 917 | */ |
| 918 | WARN_ON(1); |
Pierre Ossman | ebd6d35 | 2008-07-29 00:45:51 +0200 | [diff] [blame] | 919 | host->flags &= ~SDHCI_REQ_USE_DMA; |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 920 | } else { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 921 | sdhci_writel(host, host->adma_addr, |
| 922 | SDHCI_ADMA_ADDRESS); |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 923 | } |
| 924 | } else { |
Tomas Winkler | c8b3e02 | 2008-07-05 19:52:04 +0300 | [diff] [blame] | 925 | int sg_cnt; |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 926 | |
Shawn Guo | 6f9ad6f | 2011-04-17 00:48:36 +0800 | [diff] [blame] | 927 | sg_cnt = sdhci_pre_dma_transfer(host, data, NULL); |
Tomas Winkler | c8b3e02 | 2008-07-05 19:52:04 +0300 | [diff] [blame] | 928 | if (sg_cnt == 0) { |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 929 | /* |
| 930 | * This only happens when someone fed |
| 931 | * us an invalid request. |
| 932 | */ |
| 933 | WARN_ON(1); |
Pierre Ossman | ebd6d35 | 2008-07-29 00:45:51 +0200 | [diff] [blame] | 934 | host->flags &= ~SDHCI_REQ_USE_DMA; |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 935 | } else { |
Pierre Ossman | 719a61b | 2008-07-22 13:23:23 +0200 | [diff] [blame] | 936 | WARN_ON(sg_cnt != 1); |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 937 | sdhci_writel(host, sg_dma_address(data->sg), |
| 938 | SDHCI_DMA_ADDRESS); |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 939 | } |
| 940 | } |
| 941 | } |
| 942 | |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 943 | /* |
| 944 | * Always adjust the DMA selection as some controllers |
| 945 | * (e.g. JMicron) can't do PIO properly when the selection |
| 946 | * is ADMA. |
| 947 | */ |
| 948 | if (host->version >= SDHCI_SPEC_200) { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 949 | ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 950 | ctrl &= ~SDHCI_CTRL_DMA_MASK; |
| 951 | if ((host->flags & SDHCI_REQ_USE_DMA) && |
| 952 | (host->flags & SDHCI_USE_ADMA)) |
| 953 | ctrl |= SDHCI_CTRL_ADMA32; |
| 954 | else |
| 955 | ctrl |= SDHCI_CTRL_SDMA; |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 956 | sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); |
Pierre Ossman | c9fddbc | 2007-12-02 19:52:11 +0100 | [diff] [blame] | 957 | } |
| 958 | |
Pierre Ossman | 8f1934c | 2008-06-30 21:15:49 +0200 | [diff] [blame] | 959 | if (!(host->flags & SDHCI_REQ_USE_DMA)) { |
Sebastian Andrzej Siewior | da60a91 | 2009-06-18 09:33:32 +0200 | [diff] [blame] | 960 | int flags; |
| 961 | |
| 962 | flags = SG_MITER_ATOMIC; |
| 963 | if (host->data->flags & MMC_DATA_READ) |
| 964 | flags |= SG_MITER_TO_SG; |
| 965 | else |
| 966 | flags |= SG_MITER_FROM_SG; |
| 967 | sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 968 | host->blocks = data->blocks; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 969 | } |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 970 | |
Anton Vorontsov | 6aa943a | 2009-03-17 00:13:50 +0300 | [diff] [blame] | 971 | sdhci_set_transfer_irqs(host); |
| 972 | |
Mikko Vinni | f6a03cb | 2011-04-12 09:36:18 -0400 | [diff] [blame] | 973 | /* Set the DMA boundary value and block size */ |
| 974 | sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, |
| 975 | data->blksz), SDHCI_BLOCK_SIZE); |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 976 | sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 977 | } |
| 978 | |
| 979 | static void sdhci_set_transfer_mode(struct sdhci_host *host, |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 980 | struct mmc_command *cmd) |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 981 | { |
| 982 | u16 mode; |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 983 | struct mmc_data *data = cmd->data; |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 984 | |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 985 | if (data == NULL) |
| 986 | return; |
| 987 | |
Pierre Ossman | e538fbe | 2007-08-12 16:46:32 +0200 | [diff] [blame] | 988 | WARN_ON(!host->data); |
| 989 | |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 990 | mode = SDHCI_TRNS_BLK_CNT_EN; |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 991 | if (mmc_op_multi(cmd->opcode) || data->blocks > 1) { |
| 992 | mode |= SDHCI_TRNS_MULTI; |
| 993 | /* |
| 994 | * If we are sending CMD23, CMD12 never gets sent |
| 995 | * on successful completion (so no Auto-CMD12). |
| 996 | */ |
| 997 | if (!host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) |
| 998 | mode |= SDHCI_TRNS_AUTO_CMD12; |
Andrei Warkentin | 8edf6371 | 2011-05-23 15:06:39 -0500 | [diff] [blame] | 999 | else if (host->mrq->sbc && (host->flags & SDHCI_AUTO_CMD23)) { |
| 1000 | mode |= SDHCI_TRNS_AUTO_CMD23; |
| 1001 | sdhci_writel(host, host->mrq->sbc->arg, SDHCI_ARGUMENT2); |
| 1002 | } |
Jerry Huang | c4512f7 | 2010-08-10 18:01:59 -0700 | [diff] [blame] | 1003 | } |
Andrei Warkentin | 8edf6371 | 2011-05-23 15:06:39 -0500 | [diff] [blame] | 1004 | |
Sahitya Tummala | 239e5a8 | 2013-02-25 15:45:32 +0530 | [diff] [blame] | 1005 | if (data->flags & MMC_DATA_READ) { |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 1006 | mode |= SDHCI_TRNS_READ; |
Sahitya Tummala | 239e5a8 | 2013-02-25 15:45:32 +0530 | [diff] [blame] | 1007 | if (host->ops->toggle_cdr) |
| 1008 | host->ops->toggle_cdr(host, true); |
| 1009 | } |
| 1010 | if (host->ops->toggle_cdr && (data->flags & MMC_DATA_WRITE)) |
| 1011 | host->ops->toggle_cdr(host, false); |
Pierre Ossman | c9fddbc | 2007-12-02 19:52:11 +0100 | [diff] [blame] | 1012 | if (host->flags & SDHCI_REQ_USE_DMA) |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 1013 | mode |= SDHCI_TRNS_DMA; |
| 1014 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1015 | sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1016 | } |
| 1017 | |
| 1018 | static void sdhci_finish_data(struct sdhci_host *host) |
| 1019 | { |
| 1020 | struct mmc_data *data; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1021 | |
| 1022 | BUG_ON(!host->data); |
| 1023 | |
| 1024 | data = host->data; |
| 1025 | host->data = NULL; |
| 1026 | |
Pierre Ossman | c9fddbc | 2007-12-02 19:52:11 +0100 | [diff] [blame] | 1027 | if (host->flags & SDHCI_REQ_USE_DMA) { |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 1028 | if (host->flags & SDHCI_USE_ADMA) |
| 1029 | sdhci_adma_table_post(host, data); |
| 1030 | else { |
Shawn Guo | 6f9ad6f | 2011-04-17 00:48:36 +0800 | [diff] [blame] | 1031 | if (!data->host_cookie) |
| 1032 | dma_unmap_sg(mmc_dev(host->mmc), data->sg, |
| 1033 | data->sg_len, |
| 1034 | (data->flags & MMC_DATA_READ) ? |
| 1035 | DMA_FROM_DEVICE : DMA_TO_DEVICE); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 1036 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1037 | } |
| 1038 | |
| 1039 | /* |
Pierre Ossman | c9b74c5 | 2008-04-18 20:41:49 +0200 | [diff] [blame] | 1040 | * The specification states that the block count register must |
| 1041 | * be updated, but it does not specify at what point in the |
| 1042 | * data flow. That makes the register entirely useless to read |
| 1043 | * back so we have to assume that nothing made it to the card |
| 1044 | * in the event of an error. |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1045 | */ |
Pierre Ossman | c9b74c5 | 2008-04-18 20:41:49 +0200 | [diff] [blame] | 1046 | if (data->error) |
| 1047 | data->bytes_xfered = 0; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1048 | else |
Pierre Ossman | c9b74c5 | 2008-04-18 20:41:49 +0200 | [diff] [blame] | 1049 | data->bytes_xfered = data->blksz * data->blocks; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1050 | |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 1051 | /* |
| 1052 | * Need to send CMD12 if - |
| 1053 | * a) open-ended multiblock transfer (no CMD23) |
| 1054 | * b) error in multiblock transfer |
| 1055 | */ |
| 1056 | if (data->stop && |
| 1057 | (data->error || |
| 1058 | !host->mrq->sbc)) { |
| 1059 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1060 | /* |
| 1061 | * The controller needs a reset of internal state machines |
| 1062 | * upon error conditions. |
| 1063 | */ |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 1064 | if (data->error) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1065 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 1066 | sdhci_reset(host, SDHCI_RESET_DATA); |
| 1067 | } |
| 1068 | |
| 1069 | sdhci_send_command(host, data->stop); |
| 1070 | } else |
| 1071 | tasklet_schedule(&host->finish_tasklet); |
| 1072 | } |
| 1073 | |
Sahitya Tummala | a03d9af | 2013-02-11 15:59:03 +0530 | [diff] [blame] | 1074 | #define SDHCI_REQUEST_TIMEOUT 10 /* Default request timeout in seconds */ |
| 1075 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1076 | static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) |
| 1077 | { |
| 1078 | int flags; |
Pierre Ossman | fd2208d | 2006-06-30 02:22:28 -0700 | [diff] [blame] | 1079 | u32 mask; |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1080 | unsigned long timeout; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1081 | |
| 1082 | WARN_ON(host->cmd); |
| 1083 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1084 | /* Wait max 10 ms */ |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1085 | timeout = 10; |
Pierre Ossman | fd2208d | 2006-06-30 02:22:28 -0700 | [diff] [blame] | 1086 | |
| 1087 | mask = SDHCI_CMD_INHIBIT; |
| 1088 | if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) |
| 1089 | mask |= SDHCI_DATA_INHIBIT; |
| 1090 | |
| 1091 | /* We shouldn't wait for data inihibit for stop commands, even |
| 1092 | though they might use busy signaling */ |
| 1093 | if (host->mrq->data && (cmd == host->mrq->data->stop)) |
| 1094 | mask &= ~SDHCI_DATA_INHIBIT; |
| 1095 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1096 | while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1097 | if (timeout == 0) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1098 | pr_err("%s: Controller never released " |
Pierre Ossman | acf1da4 | 2007-02-09 08:29:19 +0100 | [diff] [blame] | 1099 | "inhibit bit(s).\n", mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1100 | sdhci_dumpregs(host); |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 1101 | cmd->error = -EIO; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1102 | tasklet_schedule(&host->finish_tasklet); |
| 1103 | return; |
| 1104 | } |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1105 | timeout--; |
| 1106 | mdelay(1); |
| 1107 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1108 | |
Sahitya Tummala | a03d9af | 2013-02-11 15:59:03 +0530 | [diff] [blame] | 1109 | mod_timer(&host->timer, jiffies + SDHCI_REQUEST_TIMEOUT * HZ); |
| 1110 | |
| 1111 | if (cmd->cmd_timeout_ms > SDHCI_REQUEST_TIMEOUT * MSEC_PER_SEC) |
| 1112 | mod_timer(&host->timer, jiffies + |
| 1113 | (msecs_to_jiffies(cmd->cmd_timeout_ms * 2))); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1114 | |
| 1115 | host->cmd = cmd; |
| 1116 | |
Andrei Warkentin | a3c7778 | 2011-04-11 16:13:42 -0500 | [diff] [blame] | 1117 | sdhci_prepare_data(host, cmd); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1118 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1119 | sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1120 | |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 1121 | sdhci_set_transfer_mode(host, cmd); |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 1122 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1123 | if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1124 | pr_err("%s: Unsupported response type!\n", |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1125 | mmc_hostname(host->mmc)); |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 1126 | cmd->error = -EINVAL; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1127 | tasklet_schedule(&host->finish_tasklet); |
| 1128 | return; |
| 1129 | } |
| 1130 | |
| 1131 | if (!(cmd->flags & MMC_RSP_PRESENT)) |
| 1132 | flags = SDHCI_CMD_RESP_NONE; |
| 1133 | else if (cmd->flags & MMC_RSP_136) |
| 1134 | flags = SDHCI_CMD_RESP_LONG; |
| 1135 | else if (cmd->flags & MMC_RSP_BUSY) |
| 1136 | flags = SDHCI_CMD_RESP_SHORT_BUSY; |
| 1137 | else |
| 1138 | flags = SDHCI_CMD_RESP_SHORT; |
| 1139 | |
| 1140 | if (cmd->flags & MMC_RSP_CRC) |
| 1141 | flags |= SDHCI_CMD_CRC; |
| 1142 | if (cmd->flags & MMC_RSP_OPCODE) |
| 1143 | flags |= SDHCI_CMD_INDEX; |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 1144 | |
| 1145 | /* CMD19 is special in that the Data Present Select should be set */ |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 1146 | if (cmd->data || cmd->opcode == MMC_SEND_TUNING_BLOCK || |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 1147 | cmd->opcode == MMC_SEND_TUNING_BLOCK_HS400 || |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 1148 | cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1149 | flags |= SDHCI_CMD_DATA; |
| 1150 | |
Sahitya Tummala | 48b458e | 2013-04-08 12:53:44 +0530 | [diff] [blame] | 1151 | if (cmd->data) |
| 1152 | host->data_start_time = ktime_get(); |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1153 | sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1154 | } |
| 1155 | |
| 1156 | static void sdhci_finish_command(struct sdhci_host *host) |
| 1157 | { |
| 1158 | int i; |
| 1159 | |
| 1160 | BUG_ON(host->cmd == NULL); |
| 1161 | |
| 1162 | if (host->cmd->flags & MMC_RSP_PRESENT) { |
| 1163 | if (host->cmd->flags & MMC_RSP_136) { |
| 1164 | /* CRC is stripped so we need to do some shifting. */ |
| 1165 | for (i = 0;i < 4;i++) { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1166 | host->cmd->resp[i] = sdhci_readl(host, |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1167 | SDHCI_RESPONSE + (3-i)*4) << 8; |
| 1168 | if (i != 3) |
| 1169 | host->cmd->resp[i] |= |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1170 | sdhci_readb(host, |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1171 | SDHCI_RESPONSE + (3-i)*4-1); |
| 1172 | } |
| 1173 | } else { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1174 | host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1175 | } |
| 1176 | } |
| 1177 | |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 1178 | host->cmd->error = 0; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1179 | |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 1180 | /* Finished CMD23, now send actual command. */ |
| 1181 | if (host->cmd == host->mrq->sbc) { |
| 1182 | host->cmd = NULL; |
| 1183 | sdhci_send_command(host, host->mrq->cmd); |
| 1184 | } else { |
Pierre Ossman | e538fbe | 2007-08-12 16:46:32 +0200 | [diff] [blame] | 1185 | |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 1186 | /* Processed actual command. */ |
| 1187 | if (host->data && host->data_early) |
| 1188 | sdhci_finish_data(host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1189 | |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 1190 | if (!host->cmd->data) |
| 1191 | tasklet_schedule(&host->finish_tasklet); |
| 1192 | |
| 1193 | host->cmd = NULL; |
| 1194 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1195 | } |
| 1196 | |
| 1197 | static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) |
| 1198 | { |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 1199 | int div = 0; /* Initialized for compiler warning */ |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1200 | int real_div = div, clk_mul = 1; |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 1201 | u16 clk = 0; |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1202 | unsigned long timeout; |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1203 | unsigned long flags; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1204 | |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1205 | spin_lock_irqsave(&host->lock, flags); |
Todd Poynor | 30832ab | 2011-12-27 15:48:46 +0200 | [diff] [blame] | 1206 | if (clock && clock == host->clock) |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1207 | goto ret; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1208 | |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1209 | host->mmc->actual_clock = 0; |
| 1210 | |
Anton Vorontsov | 8114634 | 2009-03-17 00:13:59 +0300 | [diff] [blame] | 1211 | if (host->ops->set_clock) { |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1212 | spin_unlock_irqrestore(&host->lock, flags); |
Anton Vorontsov | 8114634 | 2009-03-17 00:13:59 +0300 | [diff] [blame] | 1213 | host->ops->set_clock(host, clock); |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1214 | spin_lock_irqsave(&host->lock, flags); |
Anton Vorontsov | 8114634 | 2009-03-17 00:13:59 +0300 | [diff] [blame] | 1215 | if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1216 | goto ret; |
Anton Vorontsov | 8114634 | 2009-03-17 00:13:59 +0300 | [diff] [blame] | 1217 | } |
| 1218 | |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1219 | if (host->clock) |
| 1220 | sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1221 | |
| 1222 | if (clock == 0) |
| 1223 | goto out; |
| 1224 | |
Zhangfei Gao | 85105c5 | 2010-08-06 07:10:01 +0800 | [diff] [blame] | 1225 | if (host->version >= SDHCI_SPEC_300) { |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 1226 | /* |
| 1227 | * Check if the Host Controller supports Programmable Clock |
| 1228 | * Mode. |
| 1229 | */ |
| 1230 | if (host->clk_mul) { |
| 1231 | u16 ctrl; |
| 1232 | |
| 1233 | /* |
| 1234 | * We need to figure out whether the Host Driver needs |
| 1235 | * to select Programmable Clock Mode, or the value can |
| 1236 | * be set automatically by the Host Controller based on |
| 1237 | * the Preset Value registers. |
| 1238 | */ |
| 1239 | ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 1240 | if (!(ctrl & SDHCI_CTRL_PRESET_VAL_ENABLE)) { |
| 1241 | for (div = 1; div <= 1024; div++) { |
| 1242 | if (((host->max_clk * host->clk_mul) / |
| 1243 | div) <= clock) |
| 1244 | break; |
| 1245 | } |
| 1246 | /* |
| 1247 | * Set Programmable Clock Mode in the Clock |
| 1248 | * Control register. |
| 1249 | */ |
| 1250 | clk = SDHCI_PROG_CLOCK_MODE; |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1251 | real_div = div; |
| 1252 | clk_mul = host->clk_mul; |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 1253 | div--; |
Zhangfei Gao | 85105c5 | 2010-08-06 07:10:01 +0800 | [diff] [blame] | 1254 | } |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 1255 | } else { |
| 1256 | /* Version 3.00 divisors must be a multiple of 2. */ |
| 1257 | if (host->max_clk <= clock) |
| 1258 | div = 1; |
| 1259 | else { |
| 1260 | for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; |
| 1261 | div += 2) { |
| 1262 | if ((host->max_clk / div) <= clock) |
| 1263 | break; |
| 1264 | } |
| 1265 | } |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1266 | real_div = div; |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 1267 | div >>= 1; |
Zhangfei Gao | 85105c5 | 2010-08-06 07:10:01 +0800 | [diff] [blame] | 1268 | } |
| 1269 | } else { |
| 1270 | /* Version 2.00 divisors must be a power of 2. */ |
Zhangfei Gao | 0397526 | 2010-09-20 15:15:18 -0400 | [diff] [blame] | 1271 | for (div = 1; div < SDHCI_MAX_DIV_SPEC_200; div *= 2) { |
Zhangfei Gao | 85105c5 | 2010-08-06 07:10:01 +0800 | [diff] [blame] | 1272 | if ((host->max_clk / div) <= clock) |
| 1273 | break; |
| 1274 | } |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1275 | real_div = div; |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 1276 | div >>= 1; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1277 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1278 | |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1279 | if (real_div) |
| 1280 | host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div; |
| 1281 | |
Sahitya Tummala | 0024012 | 2013-02-28 19:50:51 +0530 | [diff] [blame] | 1282 | if (host->quirks2 & SDHCI_QUIRK2_ALWAYS_USE_BASE_CLOCK) |
| 1283 | div = 0; |
| 1284 | |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 1285 | clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; |
Zhangfei Gao | 85105c5 | 2010-08-06 07:10:01 +0800 | [diff] [blame] | 1286 | clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) |
| 1287 | << SDHCI_DIVIDER_HI_SHIFT; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1288 | clk |= SDHCI_CLOCK_INT_EN; |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1289 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1290 | |
Chris Ball | 27f6cb1 | 2009-09-22 16:45:31 -0700 | [diff] [blame] | 1291 | /* Wait max 20 ms */ |
| 1292 | timeout = 20; |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1293 | while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1294 | & SDHCI_CLOCK_INT_STABLE)) { |
| 1295 | if (timeout == 0) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1296 | pr_err("%s: Internal clock never " |
Pierre Ossman | acf1da4 | 2007-02-09 08:29:19 +0100 | [diff] [blame] | 1297 | "stabilised.\n", mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1298 | sdhci_dumpregs(host); |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1299 | goto ret; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1300 | } |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1301 | timeout--; |
| 1302 | mdelay(1); |
| 1303 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1304 | |
| 1305 | clk |= SDHCI_CLOCK_CARD_EN; |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1306 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1307 | |
| 1308 | out: |
| 1309 | host->clock = clock; |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1310 | ret: |
| 1311 | spin_unlock_irqrestore(&host->lock, flags); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1312 | } |
| 1313 | |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1314 | static int sdhci_set_power(struct sdhci_host *host, unsigned short power) |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1315 | { |
Giuseppe Cavallaro | 8364248 | 2010-09-28 10:41:28 +0200 | [diff] [blame] | 1316 | u8 pwr = 0; |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1317 | |
Giuseppe Cavallaro | 8364248 | 2010-09-28 10:41:28 +0200 | [diff] [blame] | 1318 | if (power != (unsigned short)-1) { |
Pierre Ossman | ae62890 | 2009-05-03 20:45:03 +0200 | [diff] [blame] | 1319 | switch (1 << power) { |
| 1320 | case MMC_VDD_165_195: |
| 1321 | pwr = SDHCI_POWER_180; |
| 1322 | break; |
| 1323 | case MMC_VDD_29_30: |
| 1324 | case MMC_VDD_30_31: |
| 1325 | pwr = SDHCI_POWER_300; |
| 1326 | break; |
| 1327 | case MMC_VDD_32_33: |
| 1328 | case MMC_VDD_33_34: |
| 1329 | pwr = SDHCI_POWER_330; |
| 1330 | break; |
| 1331 | default: |
| 1332 | BUG(); |
| 1333 | } |
| 1334 | } |
| 1335 | |
| 1336 | if (host->pwr == pwr) |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1337 | return -1; |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1338 | |
Pierre Ossman | ae62890 | 2009-05-03 20:45:03 +0200 | [diff] [blame] | 1339 | host->pwr = pwr; |
| 1340 | |
| 1341 | if (pwr == 0) { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1342 | sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1343 | if (host->ops->check_power_status) |
Sahitya Tummala | 179e738 | 2013-03-20 19:24:01 +0530 | [diff] [blame] | 1344 | host->ops->check_power_status(host, REQ_BUS_OFF); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1345 | return 0; |
Darren Salt | 9e9dc5f | 2007-01-27 15:32:31 +0100 | [diff] [blame] | 1346 | } |
| 1347 | |
| 1348 | /* |
| 1349 | * Spec says that we should clear the power reg before setting |
| 1350 | * a new value. Some controllers don't seem to like this though. |
| 1351 | */ |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1352 | if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1353 | sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1354 | if (host->ops->check_power_status) |
Sahitya Tummala | 179e738 | 2013-03-20 19:24:01 +0530 | [diff] [blame] | 1355 | host->ops->check_power_status(host, REQ_BUS_OFF); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1356 | } |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1357 | |
Andres Salomon | e08c169 | 2008-07-04 10:00:03 -0700 | [diff] [blame] | 1358 | /* |
Andres Salomon | c71f651 | 2008-07-07 17:25:56 -0400 | [diff] [blame] | 1359 | * At least the Marvell CaFe chip gets confused if we set the voltage |
Andres Salomon | e08c169 | 2008-07-04 10:00:03 -0700 | [diff] [blame] | 1360 | * and set turn on power at the same time, so set the voltage first. |
| 1361 | */ |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1362 | if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) { |
Pierre Ossman | ae62890 | 2009-05-03 20:45:03 +0200 | [diff] [blame] | 1363 | sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1364 | if (host->ops->check_power_status) |
Sahitya Tummala | 179e738 | 2013-03-20 19:24:01 +0530 | [diff] [blame] | 1365 | host->ops->check_power_status(host, REQ_BUS_ON); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1366 | } |
Pierre Ossman | ae62890 | 2009-05-03 20:45:03 +0200 | [diff] [blame] | 1367 | |
| 1368 | pwr |= SDHCI_POWER_ON; |
Andres Salomon | e08c169 | 2008-07-04 10:00:03 -0700 | [diff] [blame] | 1369 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1370 | sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1371 | if (host->ops->check_power_status) |
Sahitya Tummala | 179e738 | 2013-03-20 19:24:01 +0530 | [diff] [blame] | 1372 | host->ops->check_power_status(host, REQ_BUS_ON); |
Harald Welte | 557b069 | 2009-06-18 16:53:38 +0200 | [diff] [blame] | 1373 | |
| 1374 | /* |
| 1375 | * Some controllers need an extra 10ms delay of 10ms before they |
| 1376 | * can apply clock after applying power |
| 1377 | */ |
Pierre Ossman | 11a2f1b | 2009-06-21 20:59:33 +0200 | [diff] [blame] | 1378 | if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) |
Harald Welte | 557b069 | 2009-06-18 16:53:38 +0200 | [diff] [blame] | 1379 | mdelay(10); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1380 | |
| 1381 | return power; |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1382 | } |
| 1383 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1384 | /*****************************************************************************\ |
| 1385 | * * |
| 1386 | * MMC callbacks * |
| 1387 | * * |
| 1388 | \*****************************************************************************/ |
| 1389 | |
Sahitya Tummala | b4e8404 | 2013-03-10 07:03:17 +0530 | [diff] [blame] | 1390 | static int sdhci_enable(struct mmc_host *mmc) |
| 1391 | { |
| 1392 | struct sdhci_host *host = mmc_priv(mmc); |
| 1393 | |
| 1394 | if (host->cpu_dma_latency_us) |
| 1395 | pm_qos_update_request(&host->pm_qos_req_dma, |
| 1396 | host->cpu_dma_latency_us); |
Sahitya Tummala | 9f5cbb8 | 2013-03-10 14:12:52 +0530 | [diff] [blame] | 1397 | if (host->ops->platform_bus_voting) |
| 1398 | host->ops->platform_bus_voting(host, 1); |
| 1399 | |
Sahitya Tummala | b4e8404 | 2013-03-10 07:03:17 +0530 | [diff] [blame] | 1400 | return 0; |
| 1401 | } |
| 1402 | |
| 1403 | static int sdhci_disable(struct mmc_host *mmc) |
| 1404 | { |
| 1405 | struct sdhci_host *host = mmc_priv(mmc); |
| 1406 | |
Sujit Reddy Thumma | deb1ada | 2013-06-19 20:15:37 +0530 | [diff] [blame] | 1407 | if (host->cpu_dma_latency_us) { |
| 1408 | /* |
| 1409 | * In performance mode, release QoS vote after a timeout to |
| 1410 | * make sure back-to-back requests don't suffer from latencies |
| 1411 | * that are involved to wake CPU from low power modes in cases |
| 1412 | * where the CPU goes into low power mode as soon as QoS vote is |
| 1413 | * released. |
| 1414 | */ |
| 1415 | if (host->power_policy == SDHCI_PERFORMANCE_MODE) |
| 1416 | pm_qos_update_request_timeout(&host->pm_qos_req_dma, |
| 1417 | host->cpu_dma_latency_us, |
| 1418 | host->pm_qos_timeout_us); |
| 1419 | else |
| 1420 | pm_qos_update_request(&host->pm_qos_req_dma, |
Sahitya Tummala | b4e8404 | 2013-03-10 07:03:17 +0530 | [diff] [blame] | 1421 | PM_QOS_DEFAULT_VALUE); |
Sujit Reddy Thumma | deb1ada | 2013-06-19 20:15:37 +0530 | [diff] [blame] | 1422 | } |
| 1423 | |
Sahitya Tummala | 9f5cbb8 | 2013-03-10 14:12:52 +0530 | [diff] [blame] | 1424 | if (host->ops->platform_bus_voting) |
| 1425 | host->ops->platform_bus_voting(host, 0); |
| 1426 | |
Sahitya Tummala | b4e8404 | 2013-03-10 07:03:17 +0530 | [diff] [blame] | 1427 | return 0; |
| 1428 | } |
| 1429 | |
Sujit Reddy Thumma | deb1ada | 2013-06-19 20:15:37 +0530 | [diff] [blame] | 1430 | static inline void sdhci_update_power_policy(struct sdhci_host *host, |
| 1431 | enum sdhci_power_policy policy) |
| 1432 | { |
| 1433 | host->power_policy = policy; |
| 1434 | } |
| 1435 | |
| 1436 | static int sdhci_notify_load(struct mmc_host *mmc, enum mmc_load state) |
| 1437 | { |
| 1438 | int err = 0; |
| 1439 | struct sdhci_host *host = mmc_priv(mmc); |
| 1440 | |
| 1441 | switch (state) { |
| 1442 | case MMC_LOAD_HIGH: |
| 1443 | sdhci_update_power_policy(host, SDHCI_PERFORMANCE_MODE); |
| 1444 | break; |
| 1445 | case MMC_LOAD_LOW: |
| 1446 | sdhci_update_power_policy(host, SDHCI_POWER_SAVE_MODE); |
| 1447 | break; |
| 1448 | default: |
| 1449 | err = -EINVAL; |
| 1450 | break; |
| 1451 | } |
| 1452 | |
| 1453 | return err; |
| 1454 | } |
| 1455 | |
Shawn Guo | 6f9ad6f | 2011-04-17 00:48:36 +0800 | [diff] [blame] | 1456 | static void sdhci_pre_req(struct mmc_host *mmc, struct mmc_request *mrq, |
| 1457 | bool is_first_req) |
| 1458 | { |
| 1459 | struct sdhci_host *host = mmc_priv(mmc); |
| 1460 | |
| 1461 | if (mrq->data->host_cookie) { |
| 1462 | mrq->data->host_cookie = 0; |
| 1463 | return; |
| 1464 | } |
| 1465 | |
| 1466 | if (host->flags & SDHCI_REQ_USE_DMA) |
| 1467 | if (sdhci_pre_dma_transfer(host, mrq->data, &host->next_data) < 0) |
| 1468 | mrq->data->host_cookie = 0; |
| 1469 | } |
| 1470 | |
| 1471 | static void sdhci_post_req(struct mmc_host *mmc, struct mmc_request *mrq, |
| 1472 | int err) |
| 1473 | { |
| 1474 | struct sdhci_host *host = mmc_priv(mmc); |
| 1475 | struct mmc_data *data = mrq->data; |
| 1476 | |
| 1477 | if (host->flags & SDHCI_REQ_USE_DMA) { |
| 1478 | dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, |
| 1479 | (data->flags & MMC_DATA_WRITE) ? |
| 1480 | DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| 1481 | data->host_cookie = 0; |
| 1482 | } |
| 1483 | } |
| 1484 | |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 1485 | static bool sdhci_check_state(struct sdhci_host *host) |
| 1486 | { |
| 1487 | struct mmc_host *mmc = host->mmc; |
| 1488 | |
| 1489 | if (!host->clock || !host->pwr || |
Sahitya Tummala | 1b248c4 | 2013-05-24 14:08:10 +0530 | [diff] [blame] | 1490 | (mmc_use_core_runtime_pm(mmc) ? |
| 1491 | pm_runtime_suspended(mmc->parent) : 0)) |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 1492 | return true; |
| 1493 | else |
| 1494 | return false; |
| 1495 | } |
| 1496 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1497 | static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) |
| 1498 | { |
| 1499 | struct sdhci_host *host; |
Anton Vorontsov | 68d1fb7 | 2009-03-17 00:13:52 +0300 | [diff] [blame] | 1500 | bool present; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1501 | unsigned long flags; |
Aaron Lu | 11052c7 | 2012-07-03 17:27:49 +0800 | [diff] [blame] | 1502 | u32 tuning_opcode; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1503 | |
| 1504 | host = mmc_priv(mmc); |
| 1505 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1506 | sdhci_runtime_pm_get(host); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 1507 | if (sdhci_check_state(host)) { |
| 1508 | sdhci_dump_state(host); |
| 1509 | WARN(1, "sdhci in bad state"); |
| 1510 | mrq->cmd->error = -EIO; |
| 1511 | if (mrq->data) |
| 1512 | mrq->data->error = -EIO; |
Asutosh Das | d9264b0 | 2014-02-21 11:28:36 +0530 | [diff] [blame] | 1513 | mmc_request_done(host->mmc, mrq); |
| 1514 | sdhci_runtime_pm_put(host); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 1515 | return; |
| 1516 | } |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1517 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1518 | spin_lock_irqsave(&host->lock, flags); |
| 1519 | |
| 1520 | WARN_ON(host->mrq != NULL); |
| 1521 | |
Pierre Ossman | f913431 | 2008-12-21 17:01:48 +0100 | [diff] [blame] | 1522 | #ifndef SDHCI_USE_LEDS_CLASS |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1523 | sdhci_activate_led(host); |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 1524 | #endif |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 1525 | |
| 1526 | /* |
| 1527 | * Ensure we don't send the STOP for non-SET_BLOCK_COUNTED |
| 1528 | * requests if Auto-CMD12 is enabled. |
| 1529 | */ |
| 1530 | if (!mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) { |
Jerry Huang | c4512f7 | 2010-08-10 18:01:59 -0700 | [diff] [blame] | 1531 | if (mrq->stop) { |
| 1532 | mrq->data->stop = NULL; |
| 1533 | mrq->stop = NULL; |
| 1534 | } |
| 1535 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1536 | |
| 1537 | host->mrq = mrq; |
| 1538 | |
Anton Vorontsov | 68d1fb7 | 2009-03-17 00:13:52 +0300 | [diff] [blame] | 1539 | /* If polling, assume that the card is always present. */ |
| 1540 | if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) |
| 1541 | present = true; |
| 1542 | else |
| 1543 | present = sdhci_readl(host, SDHCI_PRESENT_STATE) & |
| 1544 | SDHCI_CARD_PRESENT; |
| 1545 | |
| 1546 | if (!present || host->flags & SDHCI_DEVICE_DEAD) { |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 1547 | host->mrq->cmd->error = -ENOMEDIUM; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1548 | tasklet_schedule(&host->finish_tasklet); |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 1549 | } else { |
| 1550 | u32 present_state; |
| 1551 | |
| 1552 | present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); |
| 1553 | /* |
| 1554 | * Check if the re-tuning timer has already expired and there |
| 1555 | * is no on-going data transfer. If so, we need to execute |
| 1556 | * tuning procedure before sending command. |
| 1557 | */ |
Asutosh Das | 6ec99eb | 2013-12-12 16:12:43 +0530 | [diff] [blame] | 1558 | if ((mrq->cmd->opcode != MMC_SEND_TUNING_BLOCK) && |
| 1559 | (mrq->cmd->opcode != MMC_SEND_TUNING_BLOCK_HS400) && |
| 1560 | (mrq->cmd->opcode != MMC_SEND_TUNING_BLOCK_HS200) && |
| 1561 | (host->flags & SDHCI_NEEDS_RETUNING) && |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 1562 | !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { |
Chris Ball | cb77808 | 2012-11-05 14:29:49 -0500 | [diff] [blame] | 1563 | if (mmc->card) { |
| 1564 | /* eMMC uses cmd21 but sd and sdio use cmd19 */ |
| 1565 | tuning_opcode = |
| 1566 | mmc->card->type == MMC_TYPE_MMC ? |
| 1567 | MMC_SEND_TUNING_BLOCK_HS200 : |
| 1568 | MMC_SEND_TUNING_BLOCK; |
Asutosh Das | 6ec99eb | 2013-12-12 16:12:43 +0530 | [diff] [blame] | 1569 | host->mrq = NULL; |
Chris Ball | cb77808 | 2012-11-05 14:29:49 -0500 | [diff] [blame] | 1570 | spin_unlock_irqrestore(&host->lock, flags); |
| 1571 | sdhci_execute_tuning(mmc, tuning_opcode); |
| 1572 | spin_lock_irqsave(&host->lock, flags); |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 1573 | |
Chris Ball | cb77808 | 2012-11-05 14:29:49 -0500 | [diff] [blame] | 1574 | /* Restore original mmc_request structure */ |
| 1575 | host->mrq = mrq; |
| 1576 | } |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 1577 | } |
| 1578 | |
Andrei Warkentin | 8edf6371 | 2011-05-23 15:06:39 -0500 | [diff] [blame] | 1579 | if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 1580 | sdhci_send_command(host, mrq->sbc); |
| 1581 | else |
| 1582 | sdhci_send_command(host, mrq->cmd); |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 1583 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1584 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 1585 | mmiowb(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1586 | spin_unlock_irqrestore(&host->lock, flags); |
| 1587 | } |
| 1588 | |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 1589 | static void sdhci_cfg_async_intr(struct sdhci_host *host, bool enable) |
| 1590 | { |
| 1591 | if (!host->async_int_supp) |
| 1592 | return; |
| 1593 | |
| 1594 | if (enable) |
Sahitya Tummala | 784f6e0 | 2013-11-21 10:03:17 +0530 | [diff] [blame] | 1595 | sdhci_writew(host, |
| 1596 | sdhci_readw(host, SDHCI_HOST_CONTROL2) | |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 1597 | SDHCI_CTRL_ASYNC_INT_ENABLE, |
| 1598 | SDHCI_HOST_CONTROL2); |
| 1599 | else |
Sahitya Tummala | 784f6e0 | 2013-11-21 10:03:17 +0530 | [diff] [blame] | 1600 | sdhci_writew(host, sdhci_readw(host, SDHCI_HOST_CONTROL2) & |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 1601 | ~SDHCI_CTRL_ASYNC_INT_ENABLE, |
| 1602 | SDHCI_HOST_CONTROL2); |
| 1603 | } |
| 1604 | |
| 1605 | static void sdhci_cfg_irq(struct sdhci_host *host, bool enable) |
| 1606 | { |
| 1607 | if (enable && !host->irq_enabled) { |
| 1608 | enable_irq(host->irq); |
| 1609 | host->irq_enabled = true; |
| 1610 | } else if (!enable && host->irq_enabled) { |
| 1611 | disable_irq_nosync(host->irq); |
| 1612 | host->irq_enabled = false; |
| 1613 | } |
| 1614 | } |
| 1615 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1616 | static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1617 | { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1618 | unsigned long flags; |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1619 | int vdd_bit = -1; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1620 | u8 ctrl; |
Asutosh Das | d02c09a | 2013-11-08 12:31:48 +0530 | [diff] [blame] | 1621 | int ret; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1622 | |
Sahitya Tummala | 40474e4 | 2013-07-10 14:40:37 +0530 | [diff] [blame] | 1623 | mutex_lock(&host->ios_mutex); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1624 | if (host->flags & SDHCI_DEVICE_DEAD) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1625 | if (host->vmmc && ios->power_mode == MMC_POWER_OFF) |
| 1626 | mmc_regulator_set_ocr(host->mmc, host->vmmc, 0); |
Sahitya Tummala | 40474e4 | 2013-07-10 14:40:37 +0530 | [diff] [blame] | 1627 | mutex_unlock(&host->ios_mutex); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1628 | return; |
| 1629 | } |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 1630 | |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 1631 | spin_lock_irqsave(&host->lock, flags); |
| 1632 | /* lock is being released intermittently below, hence disable irq */ |
| 1633 | sdhci_cfg_irq(host, false); |
| 1634 | spin_unlock_irqrestore(&host->lock, flags); |
| 1635 | if (ios->clock) { |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1636 | sdhci_set_clock(host, ios->clock); |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 1637 | if (host->async_int_supp && sdhci_get_async_int_status(host)) { |
| 1638 | if (host->disable_sdio_irq_deferred) { |
| 1639 | pr_debug("%s: %s: disable sdio irq\n", |
| 1640 | mmc_hostname(host->mmc), __func__); |
| 1641 | host->mmc->ops->enable_sdio_irq(host->mmc, 0); |
| 1642 | host->disable_sdio_irq_deferred = false; |
| 1643 | } |
| 1644 | spin_lock_irqsave(&host->lock, flags); |
| 1645 | sdhci_cfg_async_intr(host, false); |
| 1646 | spin_unlock_irqrestore(&host->lock, flags); |
| 1647 | pr_debug("%s: %s: unconfig async intr\n", |
| 1648 | mmc_hostname(host->mmc), __func__); |
| 1649 | } |
| 1650 | } |
Asutosh Das | d02c09a | 2013-11-08 12:31:48 +0530 | [diff] [blame] | 1651 | /* |
| 1652 | * The controller clocks may be off during power-up and we may end up |
| 1653 | * enabling card clock before giving power to the card. Hence, during |
| 1654 | * MMC_POWER_UP enable the controller clock and turn-on the regulators. |
| 1655 | * The mmc_power_up would provide the necessary delay before turning on |
| 1656 | * the clocks to the card. |
| 1657 | */ |
| 1658 | if (ios->power_mode & MMC_POWER_UP) { |
| 1659 | if (host->ops->enable_controller_clock) { |
| 1660 | ret = host->ops->enable_controller_clock(host); |
| 1661 | if (ret) { |
| 1662 | pr_err("%s: enabling controller clock: failed: %d\n", |
| 1663 | mmc_hostname(host->mmc), ret); |
| 1664 | } else { |
| 1665 | vdd_bit = sdhci_set_power(host, ios->vdd); |
| 1666 | |
| 1667 | if (host->vmmc && vdd_bit != -1) |
| 1668 | mmc_regulator_set_ocr(host->mmc, |
| 1669 | host->vmmc, |
| 1670 | vdd_bit); |
| 1671 | } |
| 1672 | } |
| 1673 | } |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1674 | spin_lock_irqsave(&host->lock, flags); |
| 1675 | if (!host->clock) { |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 1676 | sdhci_cfg_irq(host, true); |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1677 | spin_unlock_irqrestore(&host->lock, flags); |
Sahitya Tummala | 40474e4 | 2013-07-10 14:40:37 +0530 | [diff] [blame] | 1678 | mutex_unlock(&host->ios_mutex); |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1679 | return; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1680 | } |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1681 | spin_unlock_irqrestore(&host->lock, flags); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1682 | |
Asutosh Das | d02c09a | 2013-11-08 12:31:48 +0530 | [diff] [blame] | 1683 | if (!host->ops->enable_controller_clock && (ios->power_mode & |
| 1684 | (MMC_POWER_UP | |
| 1685 | MMC_POWER_ON))) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1686 | vdd_bit = sdhci_set_power(host, ios->vdd); |
| 1687 | |
Asutosh Das | d02c09a | 2013-11-08 12:31:48 +0530 | [diff] [blame] | 1688 | if (host->vmmc && vdd_bit != -1) |
| 1689 | mmc_regulator_set_ocr(host->mmc, host->vmmc, vdd_bit); |
| 1690 | } |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1691 | |
| 1692 | spin_lock_irqsave(&host->lock, flags); |
Philip Rakity | 643a81f | 2010-09-23 08:24:32 -0700 | [diff] [blame] | 1693 | if (host->ops->platform_send_init_74_clocks) |
| 1694 | host->ops->platform_send_init_74_clocks(host, ios->power_mode); |
| 1695 | |
Philip Rakity | 15ec446 | 2010-11-19 16:48:39 -0500 | [diff] [blame] | 1696 | /* |
| 1697 | * If your platform has 8-bit width support but is not a v3 controller, |
| 1698 | * or if it requires special setup code, you should implement that in |
| 1699 | * platform_8bit_width(). |
| 1700 | */ |
| 1701 | if (host->ops->platform_8bit_width) |
| 1702 | host->ops->platform_8bit_width(host, ios->bus_width); |
| 1703 | else { |
| 1704 | ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); |
| 1705 | if (ios->bus_width == MMC_BUS_WIDTH_8) { |
| 1706 | ctrl &= ~SDHCI_CTRL_4BITBUS; |
| 1707 | if (host->version >= SDHCI_SPEC_300) |
| 1708 | ctrl |= SDHCI_CTRL_8BITBUS; |
| 1709 | } else { |
| 1710 | if (host->version >= SDHCI_SPEC_300) |
| 1711 | ctrl &= ~SDHCI_CTRL_8BITBUS; |
| 1712 | if (ios->bus_width == MMC_BUS_WIDTH_4) |
| 1713 | ctrl |= SDHCI_CTRL_4BITBUS; |
| 1714 | else |
| 1715 | ctrl &= ~SDHCI_CTRL_4BITBUS; |
| 1716 | } |
| 1717 | sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); |
| 1718 | } |
| 1719 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 1720 | ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); |
Pierre Ossman | cd9277c | 2007-02-18 12:07:47 +0100 | [diff] [blame] | 1721 | |
Philip Rakity | 3ab9c8d | 2010-10-06 11:57:23 -0700 | [diff] [blame] | 1722 | if ((ios->timing == MMC_TIMING_SD_HS || |
| 1723 | ios->timing == MMC_TIMING_MMC_HS) |
| 1724 | && !(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) |
Pierre Ossman | cd9277c | 2007-02-18 12:07:47 +0100 | [diff] [blame] | 1725 | ctrl |= SDHCI_CTRL_HISPD; |
| 1726 | else |
| 1727 | ctrl &= ~SDHCI_CTRL_HISPD; |
| 1728 | |
Arindam Nath | d6d50a1 | 2011-05-05 12:18:59 +0530 | [diff] [blame] | 1729 | if (host->version >= SDHCI_SPEC_300) { |
Arindam Nath | 49c468f | 2011-05-05 12:19:01 +0530 | [diff] [blame] | 1730 | u16 clk, ctrl_2; |
| 1731 | unsigned int clock; |
| 1732 | |
| 1733 | /* In case of UHS-I modes, set High Speed Enable */ |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 1734 | if ((ios->timing == MMC_TIMING_MMC_HS400) || |
| 1735 | (ios->timing == MMC_TIMING_MMC_HS200) || |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 1736 | (ios->timing == MMC_TIMING_UHS_SDR50) || |
Arindam Nath | 49c468f | 2011-05-05 12:19:01 +0530 | [diff] [blame] | 1737 | (ios->timing == MMC_TIMING_UHS_SDR104) || |
| 1738 | (ios->timing == MMC_TIMING_UHS_DDR50) || |
Alexander Elbs | dd8df17 | 2012-01-03 23:26:53 -0500 | [diff] [blame] | 1739 | (ios->timing == MMC_TIMING_UHS_SDR25)) |
Arindam Nath | 49c468f | 2011-05-05 12:19:01 +0530 | [diff] [blame] | 1740 | ctrl |= SDHCI_CTRL_HISPD; |
Arindam Nath | d6d50a1 | 2011-05-05 12:18:59 +0530 | [diff] [blame] | 1741 | |
| 1742 | ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 1743 | if (!(ctrl_2 & SDHCI_CTRL_PRESET_VAL_ENABLE)) { |
Arindam Nath | 758535c | 2011-05-05 12:19:00 +0530 | [diff] [blame] | 1744 | sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); |
Arindam Nath | d6d50a1 | 2011-05-05 12:18:59 +0530 | [diff] [blame] | 1745 | /* |
| 1746 | * We only need to set Driver Strength if the |
| 1747 | * preset value enable is not set. |
| 1748 | */ |
| 1749 | ctrl_2 &= ~SDHCI_CTRL_DRV_TYPE_MASK; |
| 1750 | if (ios->drv_type == MMC_SET_DRIVER_TYPE_A) |
| 1751 | ctrl_2 |= SDHCI_CTRL_DRV_TYPE_A; |
| 1752 | else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C) |
| 1753 | ctrl_2 |= SDHCI_CTRL_DRV_TYPE_C; |
| 1754 | |
| 1755 | sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); |
Arindam Nath | 758535c | 2011-05-05 12:19:00 +0530 | [diff] [blame] | 1756 | } else { |
| 1757 | /* |
| 1758 | * According to SDHC Spec v3.00, if the Preset Value |
| 1759 | * Enable in the Host Control 2 register is set, we |
| 1760 | * need to reset SD Clock Enable before changing High |
| 1761 | * Speed Enable to avoid generating clock gliches. |
| 1762 | */ |
Arindam Nath | 758535c | 2011-05-05 12:19:00 +0530 | [diff] [blame] | 1763 | |
| 1764 | /* Reset SD Clock Enable */ |
| 1765 | clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); |
| 1766 | clk &= ~SDHCI_CLOCK_CARD_EN; |
| 1767 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
| 1768 | |
| 1769 | sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); |
| 1770 | |
| 1771 | /* Re-enable SD Clock */ |
| 1772 | clock = host->clock; |
| 1773 | host->clock = 0; |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1774 | spin_unlock_irqrestore(&host->lock, flags); |
Arindam Nath | 758535c | 2011-05-05 12:19:00 +0530 | [diff] [blame] | 1775 | sdhci_set_clock(host, clock); |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1776 | spin_lock_irqsave(&host->lock, flags); |
Arindam Nath | d6d50a1 | 2011-05-05 12:18:59 +0530 | [diff] [blame] | 1777 | } |
Arindam Nath | 49c468f | 2011-05-05 12:19:01 +0530 | [diff] [blame] | 1778 | |
Arindam Nath | 49c468f | 2011-05-05 12:19:01 +0530 | [diff] [blame] | 1779 | /* Reset SD Clock Enable */ |
| 1780 | clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); |
| 1781 | clk &= ~SDHCI_CLOCK_CARD_EN; |
| 1782 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
| 1783 | |
Philip Rakity | 6322cdd | 2011-05-13 11:17:15 +0530 | [diff] [blame] | 1784 | if (host->ops->set_uhs_signaling) |
| 1785 | host->ops->set_uhs_signaling(host, ios->timing); |
| 1786 | else { |
| 1787 | ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 1788 | /* Select Bus Speed Mode for host */ |
| 1789 | ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 1790 | if (ios->timing == MMC_TIMING_MMC_HS400) |
| 1791 | ctrl_2 |= SDHCI_CTRL_HS_SDR200; |
| 1792 | else if (ios->timing == MMC_TIMING_MMC_HS200) |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 1793 | ctrl_2 |= SDHCI_CTRL_HS_SDR200; |
| 1794 | else if (ios->timing == MMC_TIMING_UHS_SDR12) |
Philip Rakity | 6322cdd | 2011-05-13 11:17:15 +0530 | [diff] [blame] | 1795 | ctrl_2 |= SDHCI_CTRL_UHS_SDR12; |
| 1796 | else if (ios->timing == MMC_TIMING_UHS_SDR25) |
| 1797 | ctrl_2 |= SDHCI_CTRL_UHS_SDR25; |
| 1798 | else if (ios->timing == MMC_TIMING_UHS_SDR50) |
| 1799 | ctrl_2 |= SDHCI_CTRL_UHS_SDR50; |
| 1800 | else if (ios->timing == MMC_TIMING_UHS_SDR104) |
| 1801 | ctrl_2 |= SDHCI_CTRL_UHS_SDR104; |
| 1802 | else if (ios->timing == MMC_TIMING_UHS_DDR50) |
| 1803 | ctrl_2 |= SDHCI_CTRL_UHS_DDR50; |
| 1804 | sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); |
| 1805 | } |
Arindam Nath | 49c468f | 2011-05-05 12:19:01 +0530 | [diff] [blame] | 1806 | |
| 1807 | /* Re-enable SD Clock */ |
| 1808 | clock = host->clock; |
| 1809 | host->clock = 0; |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1810 | spin_unlock_irqrestore(&host->lock, flags); |
Arindam Nath | 49c468f | 2011-05-05 12:19:01 +0530 | [diff] [blame] | 1811 | sdhci_set_clock(host, clock); |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1812 | spin_lock_irqsave(&host->lock, flags); |
Arindam Nath | 758535c | 2011-05-05 12:19:00 +0530 | [diff] [blame] | 1813 | } else |
| 1814 | sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); |
Arindam Nath | d6d50a1 | 2011-05-05 12:18:59 +0530 | [diff] [blame] | 1815 | |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1816 | spin_unlock_irqrestore(&host->lock, flags); |
Leandro Dorileo | b835226 | 2007-07-25 23:47:04 +0200 | [diff] [blame] | 1817 | /* |
| 1818 | * Some (ENE) controllers go apeshit on some ios operation, |
| 1819 | * signalling timeout and CRC errors even on CMD0. Resetting |
| 1820 | * it on each ios seems to solve the problem. |
| 1821 | */ |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 1822 | if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) |
Leandro Dorileo | b835226 | 2007-07-25 23:47:04 +0200 | [diff] [blame] | 1823 | sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); |
| 1824 | |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1825 | /* |
| 1826 | * Reset the chip on each power off. |
| 1827 | * Should clear out any weird states. |
| 1828 | */ |
| 1829 | if (ios->power_mode == MMC_POWER_OFF) { |
| 1830 | sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE); |
| 1831 | sdhci_reinit(host); |
| 1832 | vdd_bit = sdhci_set_power(host, -1); |
| 1833 | if (host->vmmc && vdd_bit != -1) |
| 1834 | mmc_regulator_set_ocr(host->mmc, host->vmmc, vdd_bit); |
| 1835 | } |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 1836 | if (!ios->clock) { |
| 1837 | if (host->async_int_supp && host->mmc->card && |
| 1838 | mmc_card_sdio(host->mmc->card)) { |
| 1839 | sdhci_cfg_async_intr(host, true); |
| 1840 | pr_debug("%s: %s: config async intr\n", |
| 1841 | mmc_hostname(host->mmc), __func__); |
| 1842 | } |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 1843 | sdhci_set_clock(host, ios->clock); |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 1844 | } |
| 1845 | spin_lock_irqsave(&host->lock, flags); |
| 1846 | sdhci_cfg_irq(host, true); |
| 1847 | spin_unlock_irqrestore(&host->lock, flags); |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 1848 | mmiowb(); |
Sahitya Tummala | 40474e4 | 2013-07-10 14:40:37 +0530 | [diff] [blame] | 1849 | mutex_unlock(&host->ios_mutex); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1850 | } |
| 1851 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1852 | static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 1853 | { |
| 1854 | struct sdhci_host *host = mmc_priv(mmc); |
| 1855 | |
| 1856 | sdhci_runtime_pm_get(host); |
| 1857 | sdhci_do_set_ios(host, ios); |
| 1858 | sdhci_runtime_pm_put(host); |
| 1859 | } |
| 1860 | |
| 1861 | static int sdhci_check_ro(struct sdhci_host *host) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1862 | { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1863 | unsigned long flags; |
Wolfram Sang | 2dfb579 | 2010-10-15 12:21:01 +0200 | [diff] [blame] | 1864 | int is_readonly; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1865 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1866 | spin_lock_irqsave(&host->lock, flags); |
| 1867 | |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 1868 | if (host->flags & SDHCI_DEVICE_DEAD) |
Wolfram Sang | 2dfb579 | 2010-10-15 12:21:01 +0200 | [diff] [blame] | 1869 | is_readonly = 0; |
| 1870 | else if (host->ops->get_ro) |
| 1871 | is_readonly = host->ops->get_ro(host); |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 1872 | else |
Wolfram Sang | 2dfb579 | 2010-10-15 12:21:01 +0200 | [diff] [blame] | 1873 | is_readonly = !(sdhci_readl(host, SDHCI_PRESENT_STATE) |
| 1874 | & SDHCI_WRITE_PROTECT); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1875 | |
| 1876 | spin_unlock_irqrestore(&host->lock, flags); |
| 1877 | |
Wolfram Sang | 2dfb579 | 2010-10-15 12:21:01 +0200 | [diff] [blame] | 1878 | /* This quirk needs to be replaced by a callback-function later */ |
| 1879 | return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ? |
| 1880 | !is_readonly : is_readonly; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1881 | } |
| 1882 | |
Takashi Iwai | 82b0e23 | 2011-04-21 20:26:38 +0200 | [diff] [blame] | 1883 | #define SAMPLE_COUNT 5 |
| 1884 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1885 | static int sdhci_do_get_ro(struct sdhci_host *host) |
Takashi Iwai | 82b0e23 | 2011-04-21 20:26:38 +0200 | [diff] [blame] | 1886 | { |
Takashi Iwai | 82b0e23 | 2011-04-21 20:26:38 +0200 | [diff] [blame] | 1887 | int i, ro_count; |
| 1888 | |
Takashi Iwai | 82b0e23 | 2011-04-21 20:26:38 +0200 | [diff] [blame] | 1889 | if (!(host->quirks & SDHCI_QUIRK_UNSTABLE_RO_DETECT)) |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1890 | return sdhci_check_ro(host); |
Takashi Iwai | 82b0e23 | 2011-04-21 20:26:38 +0200 | [diff] [blame] | 1891 | |
| 1892 | ro_count = 0; |
| 1893 | for (i = 0; i < SAMPLE_COUNT; i++) { |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1894 | if (sdhci_check_ro(host)) { |
Takashi Iwai | 82b0e23 | 2011-04-21 20:26:38 +0200 | [diff] [blame] | 1895 | if (++ro_count > SAMPLE_COUNT / 2) |
| 1896 | return 1; |
| 1897 | } |
| 1898 | msleep(30); |
| 1899 | } |
| 1900 | return 0; |
| 1901 | } |
| 1902 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1903 | static void sdhci_hw_reset(struct mmc_host *mmc) |
Adrian Hunter | 20758b6 | 2011-08-29 16:42:12 +0300 | [diff] [blame] | 1904 | { |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1905 | struct sdhci_host *host = mmc_priv(mmc); |
Adrian Hunter | 20758b6 | 2011-08-29 16:42:12 +0300 | [diff] [blame] | 1906 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1907 | if (host->ops && host->ops->hw_reset) |
| 1908 | host->ops->hw_reset(host); |
| 1909 | } |
Adrian Hunter | 20758b6 | 2011-08-29 16:42:12 +0300 | [diff] [blame] | 1910 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1911 | static int sdhci_get_ro(struct mmc_host *mmc) |
| 1912 | { |
| 1913 | struct sdhci_host *host = mmc_priv(mmc); |
| 1914 | int ret; |
Pierre Ossman | f75979b | 2007-09-04 07:59:18 +0200 | [diff] [blame] | 1915 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1916 | sdhci_runtime_pm_get(host); |
| 1917 | ret = sdhci_do_get_ro(host); |
| 1918 | sdhci_runtime_pm_put(host); |
| 1919 | return ret; |
| 1920 | } |
| 1921 | |
| 1922 | static void sdhci_enable_sdio_irq_nolock(struct sdhci_host *host, int enable) |
| 1923 | { |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 1924 | if (host->flags & SDHCI_DEVICE_DEAD) |
| 1925 | goto out; |
| 1926 | |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 1927 | if (!enable && !host->clock) { |
| 1928 | pr_debug("%s: %s: defered disabling card intr\n", |
| 1929 | host->mmc ? mmc_hostname(host->mmc) : "null", |
| 1930 | __func__); |
| 1931 | host->disable_sdio_irq_deferred = true; |
| 1932 | return; |
| 1933 | } |
| 1934 | |
Pierre Ossman | f75979b | 2007-09-04 07:59:18 +0200 | [diff] [blame] | 1935 | if (enable) |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1936 | host->flags |= SDHCI_SDIO_IRQ_ENABLED; |
| 1937 | else |
| 1938 | host->flags &= ~SDHCI_SDIO_IRQ_ENABLED; |
| 1939 | |
| 1940 | /* SDIO IRQ will be enabled as appropriate in runtime resume */ |
| 1941 | if (host->runtime_suspended) |
| 1942 | goto out; |
| 1943 | |
| 1944 | if (enable) |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 1945 | sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT); |
| 1946 | else |
| 1947 | sdhci_mask_irqs(host, SDHCI_INT_CARD_INT); |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 1948 | out: |
Pierre Ossman | f75979b | 2007-09-04 07:59:18 +0200 | [diff] [blame] | 1949 | mmiowb(); |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1950 | } |
Pierre Ossman | f75979b | 2007-09-04 07:59:18 +0200 | [diff] [blame] | 1951 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1952 | static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) |
| 1953 | { |
| 1954 | struct sdhci_host *host = mmc_priv(mmc); |
| 1955 | unsigned long flags; |
| 1956 | |
| 1957 | spin_lock_irqsave(&host->lock, flags); |
| 1958 | sdhci_enable_sdio_irq_nolock(host, enable); |
Pierre Ossman | f75979b | 2007-09-04 07:59:18 +0200 | [diff] [blame] | 1959 | spin_unlock_irqrestore(&host->lock, flags); |
| 1960 | } |
| 1961 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 1962 | static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, |
| 1963 | struct mmc_ios *ios) |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 1964 | { |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 1965 | u8 pwr; |
| 1966 | u16 clk, ctrl; |
| 1967 | u32 present_state; |
| 1968 | |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 1969 | /* |
| 1970 | * Signal Voltage Switching is only applicable for Host Controllers |
| 1971 | * v3.00 and above. |
| 1972 | */ |
| 1973 | if (host->version < SDHCI_SPEC_300) |
| 1974 | return 0; |
| 1975 | |
| 1976 | /* |
| 1977 | * We first check whether the request is to set signalling voltage |
| 1978 | * to 3.3V. If so, we change the voltage to 3.3V and return quickly. |
| 1979 | */ |
| 1980 | ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 1981 | if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { |
| 1982 | /* Set 1.8V Signal Enable in the Host Control2 register to 0 */ |
| 1983 | ctrl &= ~SDHCI_CTRL_VDD_180; |
| 1984 | sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 1985 | if (host->ops->check_power_status) |
Sahitya Tummala | 179e738 | 2013-03-20 19:24:01 +0530 | [diff] [blame] | 1986 | host->ops->check_power_status(host, REQ_IO_HIGH); |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 1987 | |
| 1988 | /* Wait for 5ms */ |
| 1989 | usleep_range(5000, 5500); |
| 1990 | |
| 1991 | /* 3.3V regulator output should be stable within 5 ms */ |
| 1992 | ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 1993 | if (!(ctrl & SDHCI_CTRL_VDD_180)) |
| 1994 | return 0; |
| 1995 | else { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 1996 | pr_info(DRIVER_NAME ": Switching to 3.3V " |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 1997 | "signalling voltage failed\n"); |
| 1998 | return -EIO; |
| 1999 | } |
| 2000 | } else if (!(ctrl & SDHCI_CTRL_VDD_180) && |
| 2001 | (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180)) { |
| 2002 | /* Stop SDCLK */ |
| 2003 | clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); |
| 2004 | clk &= ~SDHCI_CLOCK_CARD_EN; |
| 2005 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
| 2006 | |
| 2007 | /* Check whether DAT[3:0] is 0000 */ |
| 2008 | present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); |
| 2009 | if (!((present_state & SDHCI_DATA_LVL_MASK) >> |
| 2010 | SDHCI_DATA_LVL_SHIFT)) { |
| 2011 | /* |
| 2012 | * Enable 1.8V Signal Enable in the Host Control2 |
| 2013 | * register |
| 2014 | */ |
| 2015 | ctrl |= SDHCI_CTRL_VDD_180; |
| 2016 | sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 2017 | if (host->ops->check_power_status) |
Sahitya Tummala | 179e738 | 2013-03-20 19:24:01 +0530 | [diff] [blame] | 2018 | host->ops->check_power_status(host, REQ_IO_LOW); |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 2019 | |
| 2020 | /* Wait for 5ms */ |
| 2021 | usleep_range(5000, 5500); |
| 2022 | |
| 2023 | ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 2024 | if (ctrl & SDHCI_CTRL_VDD_180) { |
| 2025 | /* Provide SDCLK again and wait for 1ms*/ |
| 2026 | clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); |
| 2027 | clk |= SDHCI_CLOCK_CARD_EN; |
| 2028 | sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); |
| 2029 | usleep_range(1000, 1500); |
| 2030 | |
| 2031 | /* |
| 2032 | * If DAT[3:0] level is 1111b, then the card |
| 2033 | * was successfully switched to 1.8V signaling. |
| 2034 | */ |
| 2035 | present_state = sdhci_readl(host, |
| 2036 | SDHCI_PRESENT_STATE); |
| 2037 | if ((present_state & SDHCI_DATA_LVL_MASK) == |
| 2038 | SDHCI_DATA_LVL_MASK) |
| 2039 | return 0; |
| 2040 | } |
| 2041 | } |
| 2042 | |
| 2043 | /* |
| 2044 | * If we are here, that means the switch to 1.8V signaling |
| 2045 | * failed. We power cycle the card, and retry initialization |
| 2046 | * sequence by setting S18R to 0. |
| 2047 | */ |
| 2048 | pwr = sdhci_readb(host, SDHCI_POWER_CONTROL); |
| 2049 | pwr &= ~SDHCI_POWER_ON; |
| 2050 | sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 2051 | if (host->ops->check_power_status) |
Sahitya Tummala | 179e738 | 2013-03-20 19:24:01 +0530 | [diff] [blame] | 2052 | host->ops->check_power_status(host, REQ_BUS_OFF); |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 2053 | |
| 2054 | /* Wait for 1ms as per the spec */ |
| 2055 | usleep_range(1000, 1500); |
| 2056 | pwr |= SDHCI_POWER_ON; |
| 2057 | sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); |
Sahitya Tummala | 66a6aa6 | 2013-02-21 10:09:49 +0530 | [diff] [blame] | 2058 | if (host->ops->check_power_status) |
Sahitya Tummala | 179e738 | 2013-03-20 19:24:01 +0530 | [diff] [blame] | 2059 | host->ops->check_power_status(host, REQ_BUS_ON); |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 2060 | |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2061 | pr_info(DRIVER_NAME ": Switching to 1.8V signalling " |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 2062 | "voltage failed, retrying with S18R set to 0\n"); |
| 2063 | return -EAGAIN; |
| 2064 | } else |
| 2065 | /* No signal voltage switch required */ |
| 2066 | return 0; |
| 2067 | } |
| 2068 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2069 | static int sdhci_start_signal_voltage_switch(struct mmc_host *mmc, |
| 2070 | struct mmc_ios *ios) |
| 2071 | { |
| 2072 | struct sdhci_host *host = mmc_priv(mmc); |
| 2073 | int err; |
| 2074 | |
| 2075 | if (host->version < SDHCI_SPEC_300) |
| 2076 | return 0; |
| 2077 | sdhci_runtime_pm_get(host); |
| 2078 | err = sdhci_do_start_signal_voltage_switch(host, ios); |
| 2079 | sdhci_runtime_pm_put(host); |
| 2080 | return err; |
| 2081 | } |
| 2082 | |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2083 | static int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2084 | { |
| 2085 | struct sdhci_host *host; |
| 2086 | u16 ctrl; |
Asutosh Das | 8ddd348 | 2013-01-04 11:45:46 +0530 | [diff] [blame] | 2087 | u32 ier = 0; |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2088 | int tuning_loop_counter = MAX_TUNING_LOOP; |
| 2089 | unsigned long timeout; |
| 2090 | int err = 0; |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2091 | bool requires_tuning_nonuhs = false; |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2092 | |
| 2093 | host = mmc_priv(mmc); |
| 2094 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2095 | sdhci_runtime_pm_get(host); |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2096 | disable_irq(host->irq); |
| 2097 | spin_lock(&host->lock); |
| 2098 | |
| 2099 | ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 2100 | |
| 2101 | /* |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2102 | * The Host Controller needs tuning only in case of SDR104 mode |
| 2103 | * and for SDR50 mode when Use Tuning for SDR50 is set in the |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2104 | * Capabilities register. |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 2105 | * If the Host Controller supports the HS400/HS200 mode then the |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2106 | * tuning function has to be executed. |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2107 | */ |
Venkat Gopalakrishnan | a2a8df9 | 2012-11-18 20:59:33 -0800 | [diff] [blame] | 2108 | if ((((ctrl & SDHCI_CTRL_UHS_MASK) == SDHCI_CTRL_UHS_SDR50) && |
| 2109 | (host->flags & SDHCI_SDR50_NEEDS_TUNING)) || |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 2110 | (host->flags & SDHCI_HS200_NEEDS_TUNING) || |
| 2111 | (host->flags & SDHCI_HS400_NEEDS_TUNING)) |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2112 | requires_tuning_nonuhs = true; |
| 2113 | |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2114 | if (((ctrl & SDHCI_CTRL_UHS_MASK) == SDHCI_CTRL_UHS_SDR104) || |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2115 | requires_tuning_nonuhs) |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2116 | ctrl |= SDHCI_CTRL_EXEC_TUNING; |
| 2117 | else { |
| 2118 | spin_unlock(&host->lock); |
| 2119 | enable_irq(host->irq); |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2120 | sdhci_runtime_pm_put(host); |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2121 | return 0; |
| 2122 | } |
| 2123 | |
Asutosh Das | 8ddd348 | 2013-01-04 11:45:46 +0530 | [diff] [blame] | 2124 | if (host->ops->execute_tuning) { |
| 2125 | spin_unlock(&host->lock); |
| 2126 | enable_irq(host->irq); |
Sahitya Tummala | dda88d6 | 2013-06-13 10:36:11 +0530 | [diff] [blame] | 2127 | err = host->ops->execute_tuning(host, opcode); |
Asutosh Das | 8ddd348 | 2013-01-04 11:45:46 +0530 | [diff] [blame] | 2128 | disable_irq(host->irq); |
| 2129 | spin_lock(&host->lock); |
| 2130 | goto out; |
| 2131 | } |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2132 | sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); |
| 2133 | |
| 2134 | /* |
| 2135 | * As per the Host Controller spec v3.00, tuning command |
| 2136 | * generates Buffer Read Ready interrupt, so enable that. |
| 2137 | * |
| 2138 | * Note: The spec clearly says that when tuning sequence |
| 2139 | * is being performed, the controller does not generate |
| 2140 | * interrupts other than Buffer Read Ready interrupt. But |
| 2141 | * to make sure we don't hit a controller bug, we _only_ |
| 2142 | * enable Buffer Read Ready interrupt here. |
| 2143 | */ |
| 2144 | ier = sdhci_readl(host, SDHCI_INT_ENABLE); |
| 2145 | sdhci_clear_set_irqs(host, ier, SDHCI_INT_DATA_AVAIL); |
| 2146 | |
| 2147 | /* |
| 2148 | * Issue CMD19 repeatedly till Execute Tuning is set to 0 or the number |
| 2149 | * of loops reaches 40 times or a timeout of 150ms occurs. |
| 2150 | */ |
| 2151 | timeout = 150; |
| 2152 | do { |
| 2153 | struct mmc_command cmd = {0}; |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2154 | struct mmc_request mrq = {NULL}; |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2155 | |
| 2156 | if (!tuning_loop_counter && !timeout) |
| 2157 | break; |
| 2158 | |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2159 | cmd.opcode = opcode; |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2160 | cmd.arg = 0; |
| 2161 | cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; |
| 2162 | cmd.retries = 0; |
| 2163 | cmd.data = NULL; |
| 2164 | cmd.error = 0; |
| 2165 | |
| 2166 | mrq.cmd = &cmd; |
| 2167 | host->mrq = &mrq; |
| 2168 | |
| 2169 | /* |
| 2170 | * In response to CMD19, the card sends 64 bytes of tuning |
| 2171 | * block to the Host Controller. So we set the block size |
| 2172 | * to 64 here. |
| 2173 | */ |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 2174 | if ((cmd.opcode == MMC_SEND_TUNING_BLOCK_HS400) || |
| 2175 | (cmd.opcode == MMC_SEND_TUNING_BLOCK_HS200)) { |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2176 | if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) |
| 2177 | sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 128), |
| 2178 | SDHCI_BLOCK_SIZE); |
| 2179 | else if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) |
| 2180 | sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), |
| 2181 | SDHCI_BLOCK_SIZE); |
| 2182 | } else { |
| 2183 | sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, 64), |
| 2184 | SDHCI_BLOCK_SIZE); |
| 2185 | } |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2186 | |
| 2187 | /* |
| 2188 | * The tuning block is sent by the card to the host controller. |
| 2189 | * So we set the TRNS_READ bit in the Transfer Mode register. |
| 2190 | * This also takes care of setting DMA Enable and Multi Block |
| 2191 | * Select in the same register to 0. |
| 2192 | */ |
| 2193 | sdhci_writew(host, SDHCI_TRNS_READ, SDHCI_TRANSFER_MODE); |
| 2194 | |
| 2195 | sdhci_send_command(host, &cmd); |
| 2196 | |
| 2197 | host->cmd = NULL; |
| 2198 | host->mrq = NULL; |
| 2199 | |
| 2200 | spin_unlock(&host->lock); |
| 2201 | enable_irq(host->irq); |
| 2202 | |
| 2203 | /* Wait for Buffer Read Ready interrupt */ |
| 2204 | wait_event_interruptible_timeout(host->buf_ready_int, |
| 2205 | (host->tuning_done == 1), |
| 2206 | msecs_to_jiffies(50)); |
| 2207 | disable_irq(host->irq); |
| 2208 | spin_lock(&host->lock); |
| 2209 | |
| 2210 | if (!host->tuning_done) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2211 | pr_info(DRIVER_NAME ": Timeout waiting for " |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2212 | "Buffer Read Ready interrupt during tuning " |
| 2213 | "procedure, falling back to fixed sampling " |
| 2214 | "clock\n"); |
| 2215 | ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 2216 | ctrl &= ~SDHCI_CTRL_TUNED_CLK; |
| 2217 | ctrl &= ~SDHCI_CTRL_EXEC_TUNING; |
| 2218 | sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); |
| 2219 | |
| 2220 | err = -EIO; |
| 2221 | goto out; |
| 2222 | } |
| 2223 | |
| 2224 | host->tuning_done = 0; |
| 2225 | |
| 2226 | ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 2227 | tuning_loop_counter--; |
| 2228 | timeout--; |
| 2229 | mdelay(1); |
| 2230 | } while (ctrl & SDHCI_CTRL_EXEC_TUNING); |
| 2231 | |
| 2232 | /* |
| 2233 | * The Host Driver has exhausted the maximum number of loops allowed, |
| 2234 | * so use fixed sampling frequency. |
| 2235 | */ |
| 2236 | if (!tuning_loop_counter || !timeout) { |
| 2237 | ctrl &= ~SDHCI_CTRL_TUNED_CLK; |
| 2238 | sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); |
| 2239 | } else { |
| 2240 | if (!(ctrl & SDHCI_CTRL_TUNED_CLK)) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2241 | pr_info(DRIVER_NAME ": Tuning procedure" |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2242 | " failed, falling back to fixed sampling" |
| 2243 | " clock\n"); |
| 2244 | err = -EIO; |
| 2245 | } |
| 2246 | } |
| 2247 | |
| 2248 | out: |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 2249 | /* |
| 2250 | * If this is the very first time we are here, we start the retuning |
| 2251 | * timer. Since only during the first time, SDHCI_NEEDS_RETUNING |
| 2252 | * flag won't be set, we check this condition before actually starting |
| 2253 | * the timer. |
| 2254 | */ |
| 2255 | if (!(host->flags & SDHCI_NEEDS_RETUNING) && host->tuning_count && |
| 2256 | (host->tuning_mode == SDHCI_TUNING_MODE_1)) { |
| 2257 | mod_timer(&host->tuning_timer, jiffies + |
| 2258 | host->tuning_count * HZ); |
| 2259 | /* Tuning mode 1 limits the maximum data length to 4MB */ |
| 2260 | mmc->max_blk_count = (4 * 1024 * 1024) / mmc->max_blk_size; |
| 2261 | } else { |
| 2262 | host->flags &= ~SDHCI_NEEDS_RETUNING; |
| 2263 | /* Reload the new initial value for timer */ |
| 2264 | if (host->tuning_mode == SDHCI_TUNING_MODE_1) |
| 2265 | mod_timer(&host->tuning_timer, jiffies + |
| 2266 | host->tuning_count * HZ); |
| 2267 | } |
| 2268 | |
| 2269 | /* |
| 2270 | * In case tuning fails, host controllers which support re-tuning can |
| 2271 | * try tuning again at a later time, when the re-tuning timer expires. |
| 2272 | * So for these controllers, we return 0. Since there might be other |
| 2273 | * controllers who do not have this capability, we return error for |
| 2274 | * them. |
| 2275 | */ |
| 2276 | if (err && host->tuning_count && |
| 2277 | host->tuning_mode == SDHCI_TUNING_MODE_1) |
| 2278 | err = 0; |
| 2279 | |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2280 | sdhci_clear_set_irqs(host, SDHCI_INT_DATA_AVAIL, ier); |
| 2281 | spin_unlock(&host->lock); |
| 2282 | enable_irq(host->irq); |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2283 | sdhci_runtime_pm_put(host); |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2284 | |
| 2285 | return err; |
| 2286 | } |
| 2287 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2288 | static void sdhci_do_enable_preset_value(struct sdhci_host *host, bool enable) |
Arindam Nath | 4d55c5a | 2011-05-05 12:19:05 +0530 | [diff] [blame] | 2289 | { |
Arindam Nath | 4d55c5a | 2011-05-05 12:19:05 +0530 | [diff] [blame] | 2290 | u16 ctrl; |
| 2291 | unsigned long flags; |
| 2292 | |
Arindam Nath | 4d55c5a | 2011-05-05 12:19:05 +0530 | [diff] [blame] | 2293 | /* Host Controller v3.00 defines preset value registers */ |
| 2294 | if (host->version < SDHCI_SPEC_300) |
| 2295 | return; |
| 2296 | |
Sahitya Tummala | e6886bd | 2013-04-12 12:11:20 +0530 | [diff] [blame] | 2297 | if (host->quirks2 & SDHCI_QUIRK2_BROKEN_PRESET_VALUE) |
| 2298 | return; |
| 2299 | |
Arindam Nath | 4d55c5a | 2011-05-05 12:19:05 +0530 | [diff] [blame] | 2300 | spin_lock_irqsave(&host->lock, flags); |
| 2301 | |
| 2302 | ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); |
| 2303 | |
| 2304 | /* |
| 2305 | * We only enable or disable Preset Value if they are not already |
| 2306 | * enabled or disabled respectively. Otherwise, we bail out. |
| 2307 | */ |
| 2308 | if (enable && !(ctrl & SDHCI_CTRL_PRESET_VAL_ENABLE)) { |
| 2309 | ctrl |= SDHCI_CTRL_PRESET_VAL_ENABLE; |
| 2310 | sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2311 | host->flags |= SDHCI_PV_ENABLED; |
Arindam Nath | 4d55c5a | 2011-05-05 12:19:05 +0530 | [diff] [blame] | 2312 | } else if (!enable && (ctrl & SDHCI_CTRL_PRESET_VAL_ENABLE)) { |
| 2313 | ctrl &= ~SDHCI_CTRL_PRESET_VAL_ENABLE; |
| 2314 | sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2315 | host->flags &= ~SDHCI_PV_ENABLED; |
Arindam Nath | 4d55c5a | 2011-05-05 12:19:05 +0530 | [diff] [blame] | 2316 | } |
| 2317 | |
| 2318 | spin_unlock_irqrestore(&host->lock, flags); |
| 2319 | } |
| 2320 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2321 | static void sdhci_enable_preset_value(struct mmc_host *mmc, bool enable) |
| 2322 | { |
| 2323 | struct sdhci_host *host = mmc_priv(mmc); |
| 2324 | |
| 2325 | sdhci_runtime_pm_get(host); |
| 2326 | sdhci_do_enable_preset_value(host, enable); |
| 2327 | sdhci_runtime_pm_put(host); |
| 2328 | } |
| 2329 | |
Konstantin Dorfman | 29b89ca | 2013-04-15 12:15:26 +0300 | [diff] [blame] | 2330 | static int sdhci_stop_request(struct mmc_host *mmc) |
| 2331 | { |
Konstantin Dorfman | cceca8d | 2013-04-24 15:51:31 +0300 | [diff] [blame] | 2332 | struct sdhci_host *host = mmc_priv(mmc); |
| 2333 | unsigned long flags; |
| 2334 | struct mmc_data *data; |
Konstantin Dorfman | 66e7ce7 | 2013-09-22 15:43:24 +0300 | [diff] [blame] | 2335 | int ret = 0; |
Konstantin Dorfman | cceca8d | 2013-04-24 15:51:31 +0300 | [diff] [blame] | 2336 | |
| 2337 | spin_lock_irqsave(&host->lock, flags); |
Konstantin Dorfman | 66e7ce7 | 2013-09-22 15:43:24 +0300 | [diff] [blame] | 2338 | if (!host->mrq || !host->data) { |
| 2339 | ret = MMC_BLK_NO_REQ_TO_STOP; |
Konstantin Dorfman | cceca8d | 2013-04-24 15:51:31 +0300 | [diff] [blame] | 2340 | goto out; |
Konstantin Dorfman | 66e7ce7 | 2013-09-22 15:43:24 +0300 | [diff] [blame] | 2341 | } |
Konstantin Dorfman | cceca8d | 2013-04-24 15:51:31 +0300 | [diff] [blame] | 2342 | |
| 2343 | data = host->data; |
| 2344 | |
| 2345 | if (host->ops->disable_data_xfer) |
| 2346 | host->ops->disable_data_xfer(host); |
| 2347 | |
| 2348 | sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); |
| 2349 | |
| 2350 | if (host->flags & SDHCI_REQ_USE_DMA) { |
| 2351 | if (host->flags & SDHCI_USE_ADMA) { |
| 2352 | sdhci_adma_table_post(host, data); |
| 2353 | } else { |
| 2354 | if (!data->host_cookie) |
| 2355 | dma_unmap_sg(mmc_dev(host->mmc), data->sg, |
| 2356 | data->sg_len, |
| 2357 | (data->flags & MMC_DATA_READ) ? |
| 2358 | DMA_FROM_DEVICE : DMA_TO_DEVICE); |
| 2359 | } |
| 2360 | } |
| 2361 | del_timer(&host->timer); |
| 2362 | host->mrq = NULL; |
| 2363 | host->cmd = NULL; |
| 2364 | host->data = NULL; |
| 2365 | out: |
| 2366 | spin_unlock_irqrestore(&host->lock, flags); |
Konstantin Dorfman | 66e7ce7 | 2013-09-22 15:43:24 +0300 | [diff] [blame] | 2367 | return ret; |
Konstantin Dorfman | cceca8d | 2013-04-24 15:51:31 +0300 | [diff] [blame] | 2368 | } |
| 2369 | |
| 2370 | static unsigned int sdhci_get_xfer_remain(struct mmc_host *mmc) |
| 2371 | { |
| 2372 | struct sdhci_host *host = mmc_priv(mmc); |
| 2373 | u32 present_state = 0; |
| 2374 | |
| 2375 | present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); |
| 2376 | |
| 2377 | return present_state & SDHCI_DOING_WRITE; |
Konstantin Dorfman | 29b89ca | 2013-04-15 12:15:26 +0300 | [diff] [blame] | 2378 | } |
| 2379 | |
David Brownell | ab7aefd | 2006-11-12 17:55:30 -0800 | [diff] [blame] | 2380 | static const struct mmc_host_ops sdhci_ops = { |
Shawn Guo | 6f9ad6f | 2011-04-17 00:48:36 +0800 | [diff] [blame] | 2381 | .pre_req = sdhci_pre_req, |
| 2382 | .post_req = sdhci_post_req, |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2383 | .request = sdhci_request, |
| 2384 | .set_ios = sdhci_set_ios, |
| 2385 | .get_ro = sdhci_get_ro, |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2386 | .hw_reset = sdhci_hw_reset, |
Pierre Ossman | f75979b | 2007-09-04 07:59:18 +0200 | [diff] [blame] | 2387 | .enable_sdio_irq = sdhci_enable_sdio_irq, |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 2388 | .start_signal_voltage_switch = sdhci_start_signal_voltage_switch, |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2389 | .execute_tuning = sdhci_execute_tuning, |
Arindam Nath | 4d55c5a | 2011-05-05 12:19:05 +0530 | [diff] [blame] | 2390 | .enable_preset_value = sdhci_enable_preset_value, |
Sahitya Tummala | b4e8404 | 2013-03-10 07:03:17 +0530 | [diff] [blame] | 2391 | .enable = sdhci_enable, |
| 2392 | .disable = sdhci_disable, |
Konstantin Dorfman | 29b89ca | 2013-04-15 12:15:26 +0300 | [diff] [blame] | 2393 | .stop_request = sdhci_stop_request, |
Konstantin Dorfman | cceca8d | 2013-04-24 15:51:31 +0300 | [diff] [blame] | 2394 | .get_xfer_remain = sdhci_get_xfer_remain, |
Sujit Reddy Thumma | deb1ada | 2013-06-19 20:15:37 +0530 | [diff] [blame] | 2395 | .notify_load = sdhci_notify_load, |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2396 | }; |
| 2397 | |
| 2398 | /*****************************************************************************\ |
| 2399 | * * |
| 2400 | * Tasklets * |
| 2401 | * * |
| 2402 | \*****************************************************************************/ |
| 2403 | |
| 2404 | static void sdhci_tasklet_card(unsigned long param) |
| 2405 | { |
| 2406 | struct sdhci_host *host; |
| 2407 | unsigned long flags; |
| 2408 | |
| 2409 | host = (struct sdhci_host*)param; |
| 2410 | |
| 2411 | spin_lock_irqsave(&host->lock, flags); |
| 2412 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2413 | /* Check host->mrq first in case we are runtime suspended */ |
| 2414 | if (host->mrq && |
| 2415 | !(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2416 | pr_err("%s: Card removed during transfer!\n", |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2417 | mmc_hostname(host->mmc)); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2418 | pr_err("%s: Resetting controller.\n", |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2419 | mmc_hostname(host->mmc)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2420 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2421 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 2422 | sdhci_reset(host, SDHCI_RESET_DATA); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2423 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2424 | host->mrq->cmd->error = -ENOMEDIUM; |
| 2425 | tasklet_schedule(&host->finish_tasklet); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2426 | } |
| 2427 | |
| 2428 | spin_unlock_irqrestore(&host->lock, flags); |
| 2429 | |
Pierre Ossman | 04cf585 | 2008-08-18 22:18:14 +0200 | [diff] [blame] | 2430 | mmc_detect_change(host->mmc, msecs_to_jiffies(200)); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2431 | } |
| 2432 | |
| 2433 | static void sdhci_tasklet_finish(unsigned long param) |
| 2434 | { |
| 2435 | struct sdhci_host *host; |
| 2436 | unsigned long flags; |
| 2437 | struct mmc_request *mrq; |
| 2438 | |
| 2439 | host = (struct sdhci_host*)param; |
| 2440 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2441 | spin_lock_irqsave(&host->lock, flags); |
| 2442 | |
Chris Ball | 0c9c99a | 2011-04-27 17:35:31 -0400 | [diff] [blame] | 2443 | /* |
| 2444 | * If this tasklet gets rescheduled while running, it will |
| 2445 | * be run again afterwards but without any active request. |
| 2446 | */ |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2447 | if (!host->mrq) { |
| 2448 | spin_unlock_irqrestore(&host->lock, flags); |
Chris Ball | 0c9c99a | 2011-04-27 17:35:31 -0400 | [diff] [blame] | 2449 | return; |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2450 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2451 | |
| 2452 | del_timer(&host->timer); |
| 2453 | |
| 2454 | mrq = host->mrq; |
| 2455 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2456 | /* |
| 2457 | * The controller needs a reset of internal state machines |
| 2458 | * upon error conditions. |
| 2459 | */ |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 2460 | if (!(host->flags & SDHCI_DEVICE_DEAD) && |
Ben Dooks | b7b4d34 | 2011-04-27 14:24:19 +0100 | [diff] [blame] | 2461 | ((mrq->cmd && mrq->cmd->error) || |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 2462 | (mrq->data && (mrq->data->error || |
| 2463 | (mrq->data->stop && mrq->data->stop->error))) || |
| 2464 | (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) { |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 2465 | |
| 2466 | /* Some controllers need this kick or reset won't work here */ |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 2467 | if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) { |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 2468 | unsigned int clock; |
| 2469 | |
| 2470 | /* This is to force an update */ |
| 2471 | clock = host->clock; |
| 2472 | host->clock = 0; |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 2473 | spin_unlock_irqrestore(&host->lock, flags); |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 2474 | sdhci_set_clock(host, clock); |
Sahitya Tummala | 04c3a46 | 2013-01-11 11:30:45 +0530 | [diff] [blame] | 2475 | spin_lock_irqsave(&host->lock, flags); |
Pierre Ossman | 645289d | 2006-06-30 02:22:33 -0700 | [diff] [blame] | 2476 | } |
| 2477 | |
| 2478 | /* Spec says we should do both at the same time, but Ricoh |
| 2479 | controllers do not like that. */ |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2480 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 2481 | sdhci_reset(host, SDHCI_RESET_DATA); |
Venkat Gopalakrishnan | e9beaa2 | 2012-09-17 16:00:15 -0700 | [diff] [blame] | 2482 | } else { |
| 2483 | if (host->quirks2 & SDHCI_QUIRK2_RDWR_TX_ACTIVE_EOT) |
| 2484 | sdhci_reset(host, SDHCI_RESET_DATA); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2485 | } |
| 2486 | |
| 2487 | host->mrq = NULL; |
| 2488 | host->cmd = NULL; |
| 2489 | host->data = NULL; |
Sahitya Tummala | 8f6c000 | 2013-08-07 18:40:29 +0530 | [diff] [blame] | 2490 | host->auto_cmd_err_sts = 0; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2491 | |
Pierre Ossman | f913431 | 2008-12-21 17:01:48 +0100 | [diff] [blame] | 2492 | #ifndef SDHCI_USE_LEDS_CLASS |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2493 | sdhci_deactivate_led(host); |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 2494 | #endif |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2495 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 2496 | mmiowb(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2497 | spin_unlock_irqrestore(&host->lock, flags); |
| 2498 | |
| 2499 | mmc_request_done(host->mmc, mrq); |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2500 | sdhci_runtime_pm_put(host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2501 | } |
| 2502 | |
| 2503 | static void sdhci_timeout_timer(unsigned long data) |
| 2504 | { |
| 2505 | struct sdhci_host *host; |
| 2506 | unsigned long flags; |
| 2507 | |
| 2508 | host = (struct sdhci_host*)data; |
| 2509 | |
| 2510 | spin_lock_irqsave(&host->lock, flags); |
| 2511 | |
| 2512 | if (host->mrq) { |
Subhash Jadavani | 5b254e4 | 2013-06-27 18:16:02 +0530 | [diff] [blame] | 2513 | if (!host->mrq->cmd->ignore_timeout) { |
| 2514 | pr_err("%s: Timeout waiting for hardware interrupt.\n", |
| 2515 | mmc_hostname(host->mmc)); |
| 2516 | sdhci_dumpregs(host); |
| 2517 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2518 | |
| 2519 | if (host->data) { |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 2520 | pr_info("%s: bytes to transfer: %d transferred: %d\n", |
| 2521 | mmc_hostname(host->mmc), |
| 2522 | (host->data->blksz * host->data->blocks), |
| 2523 | (sdhci_readw(host, SDHCI_BLOCK_SIZE) & 0xFFF) * |
| 2524 | sdhci_readw(host, SDHCI_BLOCK_COUNT)); |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 2525 | host->data->error = -ETIMEDOUT; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2526 | sdhci_finish_data(host); |
| 2527 | } else { |
| 2528 | if (host->cmd) |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 2529 | host->cmd->error = -ETIMEDOUT; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2530 | else |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 2531 | host->mrq->cmd->error = -ETIMEDOUT; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2532 | |
| 2533 | tasklet_schedule(&host->finish_tasklet); |
| 2534 | } |
| 2535 | } |
| 2536 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 2537 | mmiowb(); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2538 | spin_unlock_irqrestore(&host->lock, flags); |
| 2539 | } |
| 2540 | |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 2541 | static void sdhci_tuning_timer(unsigned long data) |
| 2542 | { |
| 2543 | struct sdhci_host *host; |
| 2544 | unsigned long flags; |
| 2545 | |
| 2546 | host = (struct sdhci_host *)data; |
| 2547 | |
| 2548 | spin_lock_irqsave(&host->lock, flags); |
| 2549 | |
| 2550 | host->flags |= SDHCI_NEEDS_RETUNING; |
| 2551 | |
| 2552 | spin_unlock_irqrestore(&host->lock, flags); |
| 2553 | } |
| 2554 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2555 | /*****************************************************************************\ |
| 2556 | * * |
| 2557 | * Interrupt handling * |
| 2558 | * * |
| 2559 | \*****************************************************************************/ |
| 2560 | |
| 2561 | static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) |
| 2562 | { |
Asutosh Das | 80c0255 | 2013-07-23 16:20:34 +0530 | [diff] [blame] | 2563 | u16 auto_cmd_status; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2564 | BUG_ON(intmask == 0); |
| 2565 | |
| 2566 | if (!host->cmd) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2567 | pr_err("%s: Got command interrupt 0x%08x even " |
Pierre Ossman | b67ac3f | 2007-08-12 17:29:47 +0200 | [diff] [blame] | 2568 | "though no command operation was in progress.\n", |
| 2569 | mmc_hostname(host->mmc), (unsigned)intmask); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2570 | sdhci_dumpregs(host); |
| 2571 | return; |
| 2572 | } |
| 2573 | |
Pierre Ossman | 43b58b3 | 2007-07-25 23:15:27 +0200 | [diff] [blame] | 2574 | if (intmask & SDHCI_INT_TIMEOUT) |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 2575 | host->cmd->error = -ETIMEDOUT; |
| 2576 | else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT | |
| 2577 | SDHCI_INT_INDEX)) |
| 2578 | host->cmd->error = -EILSEQ; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2579 | |
Asutosh Das | 80c0255 | 2013-07-23 16:20:34 +0530 | [diff] [blame] | 2580 | if (intmask & SDHCI_INT_AUTO_CMD_ERR) { |
Sahitya Tummala | 8f6c000 | 2013-08-07 18:40:29 +0530 | [diff] [blame] | 2581 | auto_cmd_status = host->auto_cmd_err_sts; |
| 2582 | pr_err("%s: %s: AUTO CMD err sts 0x%08x\n", |
| 2583 | mmc_hostname(host->mmc), __func__, auto_cmd_status); |
Asutosh Das | 80c0255 | 2013-07-23 16:20:34 +0530 | [diff] [blame] | 2584 | if (auto_cmd_status & (SDHCI_AUTO_CMD12_NOT_EXEC | |
| 2585 | SDHCI_AUTO_CMD_INDEX_ERR | |
| 2586 | SDHCI_AUTO_CMD_ENDBIT_ERR)) |
| 2587 | host->cmd->error = -EIO; |
| 2588 | else if (auto_cmd_status & SDHCI_AUTO_CMD_TIMEOUT_ERR) |
| 2589 | host->cmd->error = -ETIMEDOUT; |
| 2590 | else if (auto_cmd_status & SDHCI_AUTO_CMD_CRC_ERR) |
| 2591 | host->cmd->error = -EILSEQ; |
| 2592 | } |
| 2593 | |
Sahitya Tummala | d6a74b0 | 2013-02-25 15:50:08 +0530 | [diff] [blame] | 2594 | if (host->quirks2 & SDHCI_QUIRK2_IGNORE_CMDCRC_FOR_TUNING) { |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 2595 | if ((host->cmd->opcode == MMC_SEND_TUNING_BLOCK_HS400) || |
| 2596 | (host->cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) || |
Sahitya Tummala | d6a74b0 | 2013-02-25 15:50:08 +0530 | [diff] [blame] | 2597 | (host->cmd->opcode == MMC_SEND_TUNING_BLOCK)) { |
| 2598 | if (intmask & SDHCI_INT_CRC) { |
| 2599 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 2600 | host->cmd->error = 0; |
| 2601 | } |
| 2602 | } |
| 2603 | } |
| 2604 | |
Pierre Ossman | e809517 | 2008-07-25 01:09:08 +0200 | [diff] [blame] | 2605 | if (host->cmd->error) { |
Asutosh Das | 6ec99eb | 2013-12-12 16:12:43 +0530 | [diff] [blame] | 2606 | if (host->cmd->error == -EILSEQ) |
| 2607 | host->flags |= SDHCI_NEEDS_RETUNING; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2608 | tasklet_schedule(&host->finish_tasklet); |
Pierre Ossman | e809517 | 2008-07-25 01:09:08 +0200 | [diff] [blame] | 2609 | return; |
| 2610 | } |
| 2611 | |
| 2612 | /* |
| 2613 | * The host can send and interrupt when the busy state has |
| 2614 | * ended, allowing us to wait without wasting CPU cycles. |
| 2615 | * Unfortunately this is overloaded on the "data complete" |
| 2616 | * interrupt, so we need to take some care when handling |
| 2617 | * it. |
| 2618 | * |
| 2619 | * Note: The 1.0 specification is a bit ambiguous about this |
| 2620 | * feature so there might be some problems with older |
| 2621 | * controllers. |
| 2622 | */ |
| 2623 | if (host->cmd->flags & MMC_RSP_BUSY) { |
| 2624 | if (host->cmd->data) |
| 2625 | DBG("Cannot wait for busy signal when also " |
| 2626 | "doing a data transfer"); |
Ben Dooks | f945405 | 2009-02-20 20:33:08 +0300 | [diff] [blame] | 2627 | else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ)) |
Pierre Ossman | e809517 | 2008-07-25 01:09:08 +0200 | [diff] [blame] | 2628 | return; |
Ben Dooks | f945405 | 2009-02-20 20:33:08 +0300 | [diff] [blame] | 2629 | |
| 2630 | /* The controller does not support the end-of-busy IRQ, |
| 2631 | * fall through and take the SDHCI_INT_RESPONSE */ |
Pierre Ossman | e809517 | 2008-07-25 01:09:08 +0200 | [diff] [blame] | 2632 | } |
| 2633 | |
Sahitya Tummala | d6a74b0 | 2013-02-25 15:50:08 +0530 | [diff] [blame] | 2634 | if (host->quirks2 & SDHCI_QUIRK2_IGNORE_CMDCRC_FOR_TUNING) { |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 2635 | if ((host->cmd->opcode == MMC_SEND_TUNING_BLOCK_HS400) || |
| 2636 | (host->cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) || |
Sahitya Tummala | d6a74b0 | 2013-02-25 15:50:08 +0530 | [diff] [blame] | 2637 | (host->cmd->opcode == MMC_SEND_TUNING_BLOCK)) { |
| 2638 | if (intmask & SDHCI_INT_CRC) { |
| 2639 | sdhci_finish_command(host); |
| 2640 | return; |
| 2641 | } |
| 2642 | } |
| 2643 | } |
| 2644 | |
Pierre Ossman | e809517 | 2008-07-25 01:09:08 +0200 | [diff] [blame] | 2645 | if (intmask & SDHCI_INT_RESPONSE) |
Pierre Ossman | 43b58b3 | 2007-07-25 23:15:27 +0200 | [diff] [blame] | 2646 | sdhci_finish_command(host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2647 | } |
| 2648 | |
Ben Dooks | 6882a8c | 2009-06-14 13:52:38 +0100 | [diff] [blame] | 2649 | static void sdhci_show_adma_error(struct sdhci_host *host) |
| 2650 | { |
| 2651 | const char *name = mmc_hostname(host->mmc); |
| 2652 | u8 *desc = host->adma_desc; |
| 2653 | __le32 *dma; |
| 2654 | __le16 *len; |
| 2655 | u8 attr; |
| 2656 | |
| 2657 | sdhci_dumpregs(host); |
| 2658 | |
| 2659 | while (true) { |
| 2660 | dma = (__le32 *)(desc + 4); |
| 2661 | len = (__le16 *)(desc + 2); |
| 2662 | attr = *desc; |
| 2663 | |
Sahitya Tummala | 419b6c8 | 2013-04-12 12:28:29 +0530 | [diff] [blame] | 2664 | pr_info("%s: %p: DMA 0x%08x, LEN 0x%04x, Attr=0x%02x\n", |
Ben Dooks | 6882a8c | 2009-06-14 13:52:38 +0100 | [diff] [blame] | 2665 | name, desc, le32_to_cpu(*dma), le16_to_cpu(*len), attr); |
| 2666 | |
| 2667 | desc += 8; |
| 2668 | |
| 2669 | if (attr & 2) |
| 2670 | break; |
| 2671 | } |
| 2672 | } |
Ben Dooks | 6882a8c | 2009-06-14 13:52:38 +0100 | [diff] [blame] | 2673 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2674 | static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) |
| 2675 | { |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2676 | u32 command; |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 2677 | bool pr_msg = false; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2678 | BUG_ON(intmask == 0); |
| 2679 | |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2680 | /* CMD19 generates _only_ Buffer Read Ready interrupt */ |
| 2681 | if (intmask & SDHCI_INT_DATA_AVAIL) { |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 2682 | command = SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)); |
| 2683 | if (command == MMC_SEND_TUNING_BLOCK || |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 2684 | command == MMC_SEND_TUNING_BLOCK_HS200 || |
| 2685 | command == MMC_SEND_TUNING_BLOCK_HS400) { |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 2686 | host->tuning_done = 1; |
| 2687 | wake_up(&host->buf_ready_int); |
| 2688 | return; |
| 2689 | } |
| 2690 | } |
| 2691 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2692 | if (!host->data) { |
| 2693 | /* |
Pierre Ossman | e809517 | 2008-07-25 01:09:08 +0200 | [diff] [blame] | 2694 | * The "data complete" interrupt is also used to |
| 2695 | * indicate that a busy state has ended. See comment |
| 2696 | * above in sdhci_cmd_irq(). |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2697 | */ |
Pierre Ossman | e809517 | 2008-07-25 01:09:08 +0200 | [diff] [blame] | 2698 | if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) { |
| 2699 | if (intmask & SDHCI_INT_DATA_END) { |
| 2700 | sdhci_finish_command(host); |
| 2701 | return; |
| 2702 | } |
Sahitya Tummala | d2ae883 | 2013-04-12 11:49:11 +0530 | [diff] [blame] | 2703 | if (host->quirks2 & |
| 2704 | SDHCI_QUIRK2_IGNORE_DATATOUT_FOR_R1BCMD) |
| 2705 | return; |
Pierre Ossman | e809517 | 2008-07-25 01:09:08 +0200 | [diff] [blame] | 2706 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2707 | |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2708 | pr_err("%s: Got data interrupt 0x%08x even " |
Pierre Ossman | b67ac3f | 2007-08-12 17:29:47 +0200 | [diff] [blame] | 2709 | "though no data operation was in progress.\n", |
| 2710 | mmc_hostname(host->mmc), (unsigned)intmask); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2711 | sdhci_dumpregs(host); |
| 2712 | |
| 2713 | return; |
| 2714 | } |
| 2715 | |
| 2716 | if (intmask & SDHCI_INT_DATA_TIMEOUT) |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 2717 | host->data->error = -ETIMEDOUT; |
Aries Lee | 22113ef | 2010-12-15 08:14:24 +0100 | [diff] [blame] | 2718 | else if (intmask & SDHCI_INT_DATA_END_BIT) |
| 2719 | host->data->error = -EILSEQ; |
| 2720 | else if ((intmask & SDHCI_INT_DATA_CRC) && |
| 2721 | SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)) |
| 2722 | != MMC_BUS_TEST_R) |
Pierre Ossman | 17b0429 | 2007-07-22 22:18:46 +0200 | [diff] [blame] | 2723 | host->data->error = -EILSEQ; |
Ben Dooks | 6882a8c | 2009-06-14 13:52:38 +0100 | [diff] [blame] | 2724 | else if (intmask & SDHCI_INT_ADMA_ERROR) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2725 | pr_err("%s: ADMA error\n", mmc_hostname(host->mmc)); |
Ben Dooks | 6882a8c | 2009-06-14 13:52:38 +0100 | [diff] [blame] | 2726 | sdhci_show_adma_error(host); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 2727 | host->data->error = -EIO; |
Ben Dooks | 6882a8c | 2009-06-14 13:52:38 +0100 | [diff] [blame] | 2728 | } |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 2729 | if (host->data->error) { |
| 2730 | if ((intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT)) && |
| 2731 | (host->quirks2 & SDHCI_QUIRK2_IGNORE_CMDCRC_FOR_TUNING)) { |
| 2732 | command = SDHCI_GET_CMD(sdhci_readw(host, |
| 2733 | SDHCI_COMMAND)); |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 2734 | if ((command != MMC_SEND_TUNING_BLOCK_HS400) && |
| 2735 | (command != MMC_SEND_TUNING_BLOCK_HS200) && |
Asutosh Das | 6ec99eb | 2013-12-12 16:12:43 +0530 | [diff] [blame] | 2736 | (command != MMC_SEND_TUNING_BLOCK)) { |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 2737 | pr_msg = true; |
Asutosh Das | 6ec99eb | 2013-12-12 16:12:43 +0530 | [diff] [blame] | 2738 | if (intmask & SDHCI_INT_DATA_CRC) |
| 2739 | host->flags |= SDHCI_NEEDS_RETUNING; |
| 2740 | } |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 2741 | } else { |
| 2742 | pr_msg = true; |
| 2743 | } |
| 2744 | if (pr_msg) { |
Sahitya Tummala | 48b458e | 2013-04-08 12:53:44 +0530 | [diff] [blame] | 2745 | pr_err("%s: data txfr (0x%08x) error: %d after %lld ms\n", |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 2746 | mmc_hostname(host->mmc), intmask, |
Sahitya Tummala | 48b458e | 2013-04-08 12:53:44 +0530 | [diff] [blame] | 2747 | host->data->error, ktime_to_ms(ktime_sub( |
| 2748 | ktime_get(), host->data_start_time))); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 2749 | sdhci_dumpregs(host); |
| 2750 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2751 | sdhci_finish_data(host); |
Asutosh Das | 5fa7d3b | 2013-03-20 22:53:40 +0530 | [diff] [blame] | 2752 | } else { |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 2753 | if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2754 | sdhci_transfer_pio(host); |
| 2755 | |
Pierre Ossman | 6ba736a | 2007-05-13 22:39:23 +0200 | [diff] [blame] | 2756 | /* |
| 2757 | * We currently don't do anything fancy with DMA |
| 2758 | * boundaries, but as we can't disable the feature |
| 2759 | * we need to at least restart the transfer. |
Mikko Vinni | f6a03cb | 2011-04-12 09:36:18 -0400 | [diff] [blame] | 2760 | * |
| 2761 | * According to the spec sdhci_readl(host, SDHCI_DMA_ADDRESS) |
| 2762 | * should return a valid address to continue from, but as |
| 2763 | * some controllers are faulty, don't trust them. |
Pierre Ossman | 6ba736a | 2007-05-13 22:39:23 +0200 | [diff] [blame] | 2764 | */ |
Mikko Vinni | f6a03cb | 2011-04-12 09:36:18 -0400 | [diff] [blame] | 2765 | if (intmask & SDHCI_INT_DMA_END) { |
| 2766 | u32 dmastart, dmanow; |
| 2767 | dmastart = sg_dma_address(host->data->sg); |
| 2768 | dmanow = dmastart + host->data->bytes_xfered; |
| 2769 | /* |
| 2770 | * Force update to the next DMA block boundary. |
| 2771 | */ |
| 2772 | dmanow = (dmanow & |
| 2773 | ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + |
| 2774 | SDHCI_DEFAULT_BOUNDARY_SIZE; |
| 2775 | host->data->bytes_xfered = dmanow - dmastart; |
| 2776 | DBG("%s: DMA base 0x%08x, transferred 0x%06x bytes," |
| 2777 | " next 0x%08x\n", |
| 2778 | mmc_hostname(host->mmc), dmastart, |
| 2779 | host->data->bytes_xfered, dmanow); |
| 2780 | sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); |
| 2781 | } |
Pierre Ossman | 6ba736a | 2007-05-13 22:39:23 +0200 | [diff] [blame] | 2782 | |
Pierre Ossman | e538fbe | 2007-08-12 16:46:32 +0200 | [diff] [blame] | 2783 | if (intmask & SDHCI_INT_DATA_END) { |
| 2784 | if (host->cmd) { |
| 2785 | /* |
| 2786 | * Data managed to finish before the |
| 2787 | * command completed. Make sure we do |
| 2788 | * things in the proper order. |
| 2789 | */ |
| 2790 | host->data_early = 1; |
| 2791 | } else { |
| 2792 | sdhci_finish_data(host); |
| 2793 | } |
| 2794 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2795 | } |
| 2796 | } |
| 2797 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 2798 | static irqreturn_t sdhci_irq(int irq, void *dev_id) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2799 | { |
| 2800 | irqreturn_t result; |
Adrian Hunter | 66fd8ad | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2801 | struct sdhci_host *host = dev_id; |
Alexander Stein | 6379b23 | 2012-03-14 09:52:10 +0100 | [diff] [blame] | 2802 | u32 intmask, unexpected = 0; |
| 2803 | int cardint = 0, max_loops = 16; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2804 | |
| 2805 | spin_lock(&host->lock); |
| 2806 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2807 | if (host->runtime_suspended) { |
| 2808 | spin_unlock(&host->lock); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2809 | pr_warning("%s: got irq while runtime suspended\n", |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 2810 | mmc_hostname(host->mmc)); |
| 2811 | return IRQ_HANDLED; |
| 2812 | } |
| 2813 | |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 2814 | if (!host->clock && host->mmc->card && |
| 2815 | mmc_card_sdio(host->mmc->card)) { |
| 2816 | /* SDIO async. interrupt is level-sensitive */ |
| 2817 | sdhci_cfg_irq(host, false); |
| 2818 | pr_debug("%s: got async-irq: clocks: %d gated: %d host-irq[en:1/dis:0]: %d\n", |
| 2819 | mmc_hostname(host->mmc), host->clock, |
| 2820 | host->mmc->clk_gated, host->irq_enabled); |
| 2821 | spin_unlock(&host->lock); |
Asutosh Das | 5e7101e | 2013-06-13 13:56:02 +0530 | [diff] [blame] | 2822 | /* prevent suspend till the ksdioirqd runs or resume happens */ |
| 2823 | if ((host->mmc->dev_status == DEV_SUSPENDING) || |
| 2824 | (host->mmc->dev_status == DEV_SUSPENDED)) |
| 2825 | pm_wakeup_event(&host->mmc->card->dev, |
| 2826 | SDHCI_SUSPEND_TIMEOUT); |
| 2827 | else |
| 2828 | mmc_signal_sdio_irq(host->mmc); |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 2829 | return IRQ_HANDLED; |
| 2830 | } |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 2831 | intmask = sdhci_readl(host, SDHCI_INT_STATUS); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2832 | |
Mark Lord | 62df67a | 2007-03-06 13:30:13 +0100 | [diff] [blame] | 2833 | if (!intmask || intmask == 0xffffffff) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2834 | result = IRQ_NONE; |
| 2835 | goto out; |
| 2836 | } |
| 2837 | |
Alexander Stein | 6379b23 | 2012-03-14 09:52:10 +0100 | [diff] [blame] | 2838 | again: |
Pierre Ossman | b69c905 | 2008-03-08 23:44:25 +0100 | [diff] [blame] | 2839 | DBG("*** %s got interrupt: 0x%08x\n", |
| 2840 | mmc_hostname(host->mmc), intmask); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2841 | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 2842 | if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2843 | u32 present = sdhci_readl(host, SDHCI_PRESENT_STATE) & |
| 2844 | SDHCI_CARD_PRESENT; |
| 2845 | |
| 2846 | /* |
| 2847 | * There is a observation on i.mx esdhc. INSERT bit will be |
| 2848 | * immediately set again when it gets cleared, if a card is |
| 2849 | * inserted. We have to mask the irq to prevent interrupt |
| 2850 | * storm which will freeze the system. And the REMOVE gets |
| 2851 | * the same situation. |
| 2852 | * |
| 2853 | * More testing are needed here to ensure it works for other |
| 2854 | * platforms though. |
| 2855 | */ |
| 2856 | sdhci_mask_irqs(host, present ? SDHCI_INT_CARD_INSERT : |
| 2857 | SDHCI_INT_CARD_REMOVE); |
| 2858 | sdhci_unmask_irqs(host, present ? SDHCI_INT_CARD_REMOVE : |
| 2859 | SDHCI_INT_CARD_INSERT); |
| 2860 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 2861 | sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT | |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2862 | SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS); |
| 2863 | intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2864 | tasklet_schedule(&host->card_tasklet); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 2865 | } |
| 2866 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2867 | if (intmask & SDHCI_INT_CMD_MASK) { |
Sahitya Tummala | 8f6c000 | 2013-08-07 18:40:29 +0530 | [diff] [blame] | 2868 | if (intmask & SDHCI_INT_AUTO_CMD_ERR) |
| 2869 | host->auto_cmd_err_sts = sdhci_readw(host, |
| 2870 | SDHCI_AUTO_CMD_ERR); |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 2871 | sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, |
| 2872 | SDHCI_INT_STATUS); |
Venkat Gopalakrishnan | e9beaa2 | 2012-09-17 16:00:15 -0700 | [diff] [blame] | 2873 | if ((host->quirks2 & SDHCI_QUIRK2_SLOW_INT_CLR) && |
| 2874 | (host->clock <= 400000)) |
| 2875 | udelay(40); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 2876 | sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2877 | } |
| 2878 | |
| 2879 | if (intmask & SDHCI_INT_DATA_MASK) { |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 2880 | sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK, |
| 2881 | SDHCI_INT_STATUS); |
Venkat Gopalakrishnan | e9beaa2 | 2012-09-17 16:00:15 -0700 | [diff] [blame] | 2882 | if ((host->quirks2 & SDHCI_QUIRK2_SLOW_INT_CLR) && |
| 2883 | (host->clock <= 400000)) |
| 2884 | udelay(40); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 2885 | sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2886 | } |
| 2887 | |
| 2888 | intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); |
| 2889 | |
Pierre Ossman | 964f9ce | 2007-07-20 18:20:36 +0200 | [diff] [blame] | 2890 | intmask &= ~SDHCI_INT_ERROR; |
| 2891 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2892 | if (intmask & SDHCI_INT_BUS_POWER) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2893 | pr_err("%s: Card is consuming too much power!\n", |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2894 | mmc_hostname(host->mmc)); |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 2895 | sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2896 | } |
| 2897 | |
Rolf Eike Beer | 9d26a5d | 2007-06-26 13:31:16 +0200 | [diff] [blame] | 2898 | intmask &= ~SDHCI_INT_BUS_POWER; |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 2899 | |
Pierre Ossman | f75979b | 2007-09-04 07:59:18 +0200 | [diff] [blame] | 2900 | if (intmask & SDHCI_INT_CARD_INT) |
| 2901 | cardint = 1; |
| 2902 | |
| 2903 | intmask &= ~SDHCI_INT_CARD_INT; |
| 2904 | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 2905 | if (intmask) { |
Alexander Stein | 6379b23 | 2012-03-14 09:52:10 +0100 | [diff] [blame] | 2906 | unexpected |= intmask; |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 2907 | sdhci_writel(host, intmask, SDHCI_INT_STATUS); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 2908 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2909 | |
| 2910 | result = IRQ_HANDLED; |
| 2911 | |
Alexander Stein | 6379b23 | 2012-03-14 09:52:10 +0100 | [diff] [blame] | 2912 | intmask = sdhci_readl(host, SDHCI_INT_STATUS); |
| 2913 | if (intmask && --max_loops) |
| 2914 | goto again; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2915 | out: |
| 2916 | spin_unlock(&host->lock); |
| 2917 | |
Alexander Stein | 6379b23 | 2012-03-14 09:52:10 +0100 | [diff] [blame] | 2918 | if (unexpected) { |
| 2919 | pr_err("%s: Unexpected interrupt 0x%08x.\n", |
| 2920 | mmc_hostname(host->mmc), unexpected); |
| 2921 | sdhci_dumpregs(host); |
| 2922 | } |
Pierre Ossman | f75979b | 2007-09-04 07:59:18 +0200 | [diff] [blame] | 2923 | /* |
| 2924 | * We have to delay this as it calls back into the driver. |
| 2925 | */ |
Asutosh Das | 5e7101e | 2013-06-13 13:56:02 +0530 | [diff] [blame] | 2926 | if (cardint) { |
| 2927 | /* clks are on, but suspend may be in progress */ |
| 2928 | if (host->mmc->dev_status == DEV_SUSPENDING) |
| 2929 | pm_wakeup_event(&host->mmc->card->dev, |
| 2930 | SDHCI_SUSPEND_TIMEOUT); |
Pierre Ossman | f75979b | 2007-09-04 07:59:18 +0200 | [diff] [blame] | 2931 | mmc_signal_sdio_irq(host->mmc); |
Asutosh Das | 5e7101e | 2013-06-13 13:56:02 +0530 | [diff] [blame] | 2932 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2933 | return result; |
| 2934 | } |
| 2935 | |
| 2936 | /*****************************************************************************\ |
| 2937 | * * |
| 2938 | * Suspend/resume * |
| 2939 | * * |
| 2940 | \*****************************************************************************/ |
| 2941 | |
| 2942 | #ifdef CONFIG_PM |
| 2943 | |
Manuel Lauss | d72faa6 | 2011-11-03 11:09:45 +0100 | [diff] [blame] | 2944 | int sdhci_suspend_host(struct sdhci_host *host) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2945 | { |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 2946 | int ret; |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2947 | bool has_tuning_timer; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2948 | |
Chris Ball | a1b13b4 | 2012-02-06 00:43:59 -0500 | [diff] [blame] | 2949 | if (host->ops->platform_suspend) |
| 2950 | host->ops->platform_suspend(host); |
| 2951 | |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 2952 | sdhci_disable_card_detection(host); |
| 2953 | |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 2954 | /* Disable tuning since we are suspending */ |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2955 | has_tuning_timer = host->version >= SDHCI_SPEC_300 && |
| 2956 | host->tuning_count && host->tuning_mode == SDHCI_TUNING_MODE_1; |
| 2957 | if (has_tuning_timer) { |
Aaron Lu | c6ced0d | 2011-12-28 11:11:12 +0800 | [diff] [blame] | 2958 | del_timer_sync(&host->tuning_timer); |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 2959 | host->flags &= ~SDHCI_NEEDS_RETUNING; |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 2960 | } |
| 2961 | |
Matt Fleming | 1a13f8f | 2010-05-26 14:42:08 -0700 | [diff] [blame] | 2962 | ret = mmc_suspend_host(host->mmc); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2963 | if (ret) { |
| 2964 | if (has_tuning_timer) { |
| 2965 | host->flags |= SDHCI_NEEDS_RETUNING; |
| 2966 | mod_timer(&host->tuning_timer, jiffies + |
| 2967 | host->tuning_count * HZ); |
| 2968 | } |
| 2969 | |
| 2970 | sdhci_enable_card_detection(host); |
| 2971 | |
Pierre Ossman | df1c4b7 | 2007-01-30 07:55:15 +0100 | [diff] [blame] | 2972 | return ret; |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 2973 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2974 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 2975 | free_irq(host->irq, host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2976 | |
Marek Szyprowski | 9bea3c8 | 2010-08-10 18:01:59 -0700 | [diff] [blame] | 2977 | return ret; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2978 | } |
| 2979 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 2980 | EXPORT_SYMBOL_GPL(sdhci_suspend_host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 2981 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 2982 | int sdhci_resume_host(struct sdhci_host *host) |
| 2983 | { |
| 2984 | int ret; |
| 2985 | |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 2986 | if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 2987 | if (host->ops->enable_dma) |
| 2988 | host->ops->enable_dma(host); |
| 2989 | } |
| 2990 | |
| 2991 | ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, |
| 2992 | mmc_hostname(host->mmc), host); |
| 2993 | if (ret) |
| 2994 | return ret; |
| 2995 | |
Adrian Hunter | 6308d29 | 2012-02-07 14:48:54 +0200 | [diff] [blame] | 2996 | if ((host->mmc->pm_flags & MMC_PM_KEEP_POWER) && |
| 2997 | (host->quirks2 & SDHCI_QUIRK2_HOST_OFF_CARD_ON)) { |
| 2998 | /* Card keeps power but host controller does not */ |
| 2999 | sdhci_init(host, 0); |
| 3000 | host->pwr = 0; |
| 3001 | host->clock = 0; |
| 3002 | sdhci_do_set_ios(host, &host->mmc->ios); |
| 3003 | } else { |
| 3004 | sdhci_init(host, (host->mmc->pm_flags & MMC_PM_KEEP_POWER)); |
| 3005 | mmiowb(); |
| 3006 | } |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3007 | |
| 3008 | ret = mmc_resume_host(host->mmc); |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 3009 | sdhci_enable_card_detection(host); |
| 3010 | |
Chris Ball | a1b13b4 | 2012-02-06 00:43:59 -0500 | [diff] [blame] | 3011 | if (host->ops->platform_resume) |
| 3012 | host->ops->platform_resume(host); |
| 3013 | |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 3014 | /* Set the re-tuning expiration flag */ |
| 3015 | if ((host->version >= SDHCI_SPEC_300) && host->tuning_count && |
| 3016 | (host->tuning_mode == SDHCI_TUNING_MODE_1)) |
| 3017 | host->flags |= SDHCI_NEEDS_RETUNING; |
| 3018 | |
Nicolas Pitre | 2f4cbb3 | 2010-03-05 13:43:32 -0800 | [diff] [blame] | 3019 | return ret; |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3020 | } |
| 3021 | |
| 3022 | EXPORT_SYMBOL_GPL(sdhci_resume_host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3023 | |
Daniel Drake | 5f61970 | 2010-11-04 22:20:39 +0000 | [diff] [blame] | 3024 | void sdhci_enable_irq_wakeups(struct sdhci_host *host) |
| 3025 | { |
| 3026 | u8 val; |
| 3027 | val = sdhci_readb(host, SDHCI_WAKE_UP_CONTROL); |
| 3028 | val |= SDHCI_WAKE_ON_INT; |
| 3029 | sdhci_writeb(host, val, SDHCI_WAKE_UP_CONTROL); |
| 3030 | } |
| 3031 | |
| 3032 | EXPORT_SYMBOL_GPL(sdhci_enable_irq_wakeups); |
| 3033 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3034 | #endif /* CONFIG_PM */ |
| 3035 | |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 3036 | #ifdef CONFIG_PM_RUNTIME |
| 3037 | |
| 3038 | static int sdhci_runtime_pm_get(struct sdhci_host *host) |
| 3039 | { |
Asutosh Das | bbc8478 | 2013-02-11 15:31:35 +0530 | [diff] [blame] | 3040 | if (!mmc_use_core_runtime_pm(host->mmc)) |
| 3041 | return pm_runtime_get_sync(host->mmc->parent); |
| 3042 | else |
| 3043 | return 0; |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 3044 | } |
| 3045 | |
| 3046 | static int sdhci_runtime_pm_put(struct sdhci_host *host) |
| 3047 | { |
Asutosh Das | bbc8478 | 2013-02-11 15:31:35 +0530 | [diff] [blame] | 3048 | if (!mmc_use_core_runtime_pm(host->mmc)) { |
| 3049 | pm_runtime_mark_last_busy(host->mmc->parent); |
| 3050 | return pm_runtime_put_autosuspend(host->mmc->parent); |
| 3051 | } else { |
| 3052 | return 0; |
| 3053 | } |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 3054 | } |
| 3055 | |
| 3056 | int sdhci_runtime_suspend_host(struct sdhci_host *host) |
| 3057 | { |
| 3058 | unsigned long flags; |
| 3059 | int ret = 0; |
| 3060 | |
| 3061 | /* Disable tuning since we are suspending */ |
| 3062 | if (host->version >= SDHCI_SPEC_300 && |
| 3063 | host->tuning_mode == SDHCI_TUNING_MODE_1) { |
| 3064 | del_timer_sync(&host->tuning_timer); |
| 3065 | host->flags &= ~SDHCI_NEEDS_RETUNING; |
| 3066 | } |
| 3067 | |
| 3068 | spin_lock_irqsave(&host->lock, flags); |
| 3069 | sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK); |
| 3070 | spin_unlock_irqrestore(&host->lock, flags); |
| 3071 | |
| 3072 | synchronize_irq(host->irq); |
| 3073 | |
| 3074 | spin_lock_irqsave(&host->lock, flags); |
| 3075 | host->runtime_suspended = true; |
| 3076 | spin_unlock_irqrestore(&host->lock, flags); |
| 3077 | |
| 3078 | return ret; |
| 3079 | } |
| 3080 | EXPORT_SYMBOL_GPL(sdhci_runtime_suspend_host); |
| 3081 | |
| 3082 | int sdhci_runtime_resume_host(struct sdhci_host *host) |
| 3083 | { |
| 3084 | unsigned long flags; |
| 3085 | int ret = 0, host_flags = host->flags; |
| 3086 | |
| 3087 | if (host_flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { |
| 3088 | if (host->ops->enable_dma) |
| 3089 | host->ops->enable_dma(host); |
| 3090 | } |
| 3091 | |
| 3092 | sdhci_init(host, 0); |
| 3093 | |
| 3094 | /* Force clock and power re-program */ |
| 3095 | host->pwr = 0; |
| 3096 | host->clock = 0; |
| 3097 | sdhci_do_set_ios(host, &host->mmc->ios); |
| 3098 | |
| 3099 | sdhci_do_start_signal_voltage_switch(host, &host->mmc->ios); |
| 3100 | if (host_flags & SDHCI_PV_ENABLED) |
| 3101 | sdhci_do_enable_preset_value(host, true); |
| 3102 | |
| 3103 | /* Set the re-tuning expiration flag */ |
| 3104 | if ((host->version >= SDHCI_SPEC_300) && host->tuning_count && |
| 3105 | (host->tuning_mode == SDHCI_TUNING_MODE_1)) |
| 3106 | host->flags |= SDHCI_NEEDS_RETUNING; |
| 3107 | |
| 3108 | spin_lock_irqsave(&host->lock, flags); |
| 3109 | |
| 3110 | host->runtime_suspended = false; |
| 3111 | |
| 3112 | /* Enable SDIO IRQ */ |
| 3113 | if ((host->flags & SDHCI_SDIO_IRQ_ENABLED)) |
| 3114 | sdhci_enable_sdio_irq_nolock(host, true); |
| 3115 | |
| 3116 | /* Enable Card Detection */ |
| 3117 | sdhci_enable_card_detection(host); |
| 3118 | |
| 3119 | spin_unlock_irqrestore(&host->lock, flags); |
| 3120 | |
| 3121 | return ret; |
| 3122 | } |
| 3123 | EXPORT_SYMBOL_GPL(sdhci_runtime_resume_host); |
| 3124 | |
| 3125 | #endif |
| 3126 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3127 | /*****************************************************************************\ |
| 3128 | * * |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3129 | * Device allocation/registration * |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3130 | * * |
| 3131 | \*****************************************************************************/ |
| 3132 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3133 | struct sdhci_host *sdhci_alloc_host(struct device *dev, |
| 3134 | size_t priv_size) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3135 | { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3136 | struct mmc_host *mmc; |
| 3137 | struct sdhci_host *host; |
| 3138 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3139 | WARN_ON(dev == NULL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3140 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3141 | mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3142 | if (!mmc) |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3143 | return ERR_PTR(-ENOMEM); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3144 | |
| 3145 | host = mmc_priv(mmc); |
| 3146 | host->mmc = mmc; |
| 3147 | |
Sahitya Tummala | 951c120 | 2013-05-24 08:47:26 +0530 | [diff] [blame] | 3148 | spin_lock_init(&host->lock); |
Sahitya Tummala | 40474e4 | 2013-07-10 14:40:37 +0530 | [diff] [blame] | 3149 | mutex_init(&host->ios_mutex); |
Sahitya Tummala | 951c120 | 2013-05-24 08:47:26 +0530 | [diff] [blame] | 3150 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3151 | return host; |
| 3152 | } |
Pierre Ossman | 8a4da14 | 2006-10-04 02:15:40 -0700 | [diff] [blame] | 3153 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3154 | EXPORT_SYMBOL_GPL(sdhci_alloc_host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3155 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3156 | int sdhci_add_host(struct sdhci_host *host) |
| 3157 | { |
| 3158 | struct mmc_host *mmc; |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3159 | u32 caps[2]; |
| 3160 | u32 max_current_caps; |
| 3161 | unsigned int ocr_avail; |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3162 | int ret; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3163 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3164 | WARN_ON(host == NULL); |
| 3165 | if (host == NULL) |
| 3166 | return -EINVAL; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3167 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3168 | mmc = host->mmc; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3169 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3170 | if (debug_quirks) |
| 3171 | host->quirks = debug_quirks; |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 3172 | if (debug_quirks2) |
| 3173 | host->quirks2 = debug_quirks2; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3174 | |
Pierre Ossman | d96649e | 2006-06-30 02:22:30 -0700 | [diff] [blame] | 3175 | sdhci_reset(host, SDHCI_RESET_ALL); |
| 3176 | |
Anton Vorontsov | 4e4141a | 2009-03-17 00:13:46 +0300 | [diff] [blame] | 3177 | host->version = sdhci_readw(host, SDHCI_HOST_VERSION); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3178 | host->version = (host->version & SDHCI_SPEC_VER_MASK) |
| 3179 | >> SDHCI_SPEC_VER_SHIFT; |
Zhangfei Gao | 85105c5 | 2010-08-06 07:10:01 +0800 | [diff] [blame] | 3180 | if (host->version > SDHCI_SPEC_300) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3181 | pr_err("%s: Unknown controller version (%d). " |
Pierre Ossman | b69c905 | 2008-03-08 23:44:25 +0100 | [diff] [blame] | 3182 | "You may experience problems.\n", mmc_hostname(mmc), |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3183 | host->version); |
Pierre Ossman | 4a96550 | 2006-06-30 02:22:29 -0700 | [diff] [blame] | 3184 | } |
| 3185 | |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3186 | caps[0] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps : |
Maxim Levitsky | ccc92c2 | 2010-08-10 18:01:42 -0700 | [diff] [blame] | 3187 | sdhci_readl(host, SDHCI_CAPABILITIES); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3188 | |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3189 | caps[1] = (host->version >= SDHCI_SPEC_300) ? |
| 3190 | sdhci_readl(host, SDHCI_CAPABILITIES_1) : 0; |
| 3191 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3192 | if (host->quirks & SDHCI_QUIRK_FORCE_DMA) |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3193 | host->flags |= SDHCI_USE_SDMA; |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3194 | else if (!(caps[0] & SDHCI_CAN_DO_SDMA)) |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3195 | DBG("Controller doesn't have SDMA capability\n"); |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 3196 | else |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3197 | host->flags |= SDHCI_USE_SDMA; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3198 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3199 | if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3200 | (host->flags & SDHCI_USE_SDMA)) { |
Rolf Eike Beer | cee687c | 2007-11-02 15:22:30 +0100 | [diff] [blame] | 3201 | DBG("Disabling DMA as it is marked broken\n"); |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3202 | host->flags &= ~SDHCI_USE_SDMA; |
Feng Tang | 7c168e3 | 2007-09-30 12:44:18 +0200 | [diff] [blame] | 3203 | } |
| 3204 | |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3205 | if ((host->version >= SDHCI_SPEC_200) && |
| 3206 | (caps[0] & SDHCI_CAN_DO_ADMA2)) |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3207 | host->flags |= SDHCI_USE_ADMA; |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3208 | |
| 3209 | if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && |
| 3210 | (host->flags & SDHCI_USE_ADMA)) { |
| 3211 | DBG("Disabling ADMA as it is marked broken\n"); |
| 3212 | host->flags &= ~SDHCI_USE_ADMA; |
| 3213 | } |
| 3214 | |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3215 | if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3216 | if (host->ops->enable_dma) { |
| 3217 | if (host->ops->enable_dma(host)) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3218 | pr_warning("%s: No suitable DMA " |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3219 | "available. Falling back to PIO.\n", |
| 3220 | mmc_hostname(mmc)); |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3221 | host->flags &= |
| 3222 | ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3223 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3224 | } |
| 3225 | } |
| 3226 | |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3227 | if (host->flags & SDHCI_USE_ADMA) { |
| 3228 | /* |
| 3229 | * We need to allocate descriptors for all sg entries |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 3230 | * (128/max_segments) and potentially one alignment transfer for |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3231 | * each of those entries. |
| 3232 | */ |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 3233 | if (host->ops->get_max_segments) |
| 3234 | host->adma_max_desc = host->ops->get_max_segments(); |
| 3235 | else |
| 3236 | host->adma_max_desc = 128; |
| 3237 | |
| 3238 | host->adma_desc_sz = (host->adma_max_desc * 2 + 1) * 4; |
| 3239 | host->align_buf_sz = host->adma_max_desc * 4; |
| 3240 | |
| 3241 | pr_debug("%s: %s: dma_desc_size: %d\n", |
| 3242 | mmc_hostname(host->mmc), __func__, host->adma_desc_sz); |
| 3243 | host->adma_desc = kmalloc(host->adma_desc_sz, |
| 3244 | GFP_KERNEL); |
| 3245 | host->align_buffer = kmalloc(host->align_buf_sz, |
| 3246 | GFP_KERNEL); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3247 | if (!host->adma_desc || !host->align_buffer) { |
| 3248 | kfree(host->adma_desc); |
| 3249 | kfree(host->align_buffer); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3250 | pr_warning("%s: Unable to allocate ADMA " |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3251 | "buffers. Falling back to standard DMA.\n", |
| 3252 | mmc_hostname(mmc)); |
| 3253 | host->flags &= ~SDHCI_USE_ADMA; |
| 3254 | } |
| 3255 | } |
| 3256 | |
Shawn Guo | 6f9ad6f | 2011-04-17 00:48:36 +0800 | [diff] [blame] | 3257 | host->next_data.cookie = 1; |
| 3258 | |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 3259 | /* |
| 3260 | * If we use DMA, then it's up to the caller to set the DMA |
| 3261 | * mask, but PIO does not need the hw shim so we set a new |
| 3262 | * mask here in that case. |
| 3263 | */ |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3264 | if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { |
Pierre Ossman | 7659150 | 2008-07-21 00:32:11 +0200 | [diff] [blame] | 3265 | host->dma_mask = DMA_BIT_MASK(64); |
| 3266 | mmc_dev(host->mmc)->dma_mask = &host->dma_mask; |
| 3267 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3268 | |
Zhangfei Gao | c4687d5 | 2010-08-20 14:02:36 -0400 | [diff] [blame] | 3269 | if (host->version >= SDHCI_SPEC_300) |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3270 | host->max_clk = (caps[0] & SDHCI_CLOCK_V3_BASE_MASK) |
Zhangfei Gao | c4687d5 | 2010-08-20 14:02:36 -0400 | [diff] [blame] | 3271 | >> SDHCI_CLOCK_BASE_SHIFT; |
| 3272 | else |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3273 | host->max_clk = (caps[0] & SDHCI_CLOCK_BASE_MASK) |
Zhangfei Gao | c4687d5 | 2010-08-20 14:02:36 -0400 | [diff] [blame] | 3274 | >> SDHCI_CLOCK_BASE_SHIFT; |
| 3275 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3276 | host->max_clk *= 1000000; |
Anton Vorontsov | f27f47e | 2010-05-26 14:41:53 -0700 | [diff] [blame] | 3277 | if (host->max_clk == 0 || host->quirks & |
| 3278 | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) { |
Ben Dooks | 4240ff0 | 2009-03-17 00:13:57 +0300 | [diff] [blame] | 3279 | if (!host->ops->get_max_clock) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3280 | pr_err("%s: Hardware doesn't specify base clock " |
Ben Dooks | 4240ff0 | 2009-03-17 00:13:57 +0300 | [diff] [blame] | 3281 | "frequency.\n", mmc_hostname(mmc)); |
| 3282 | return -ENODEV; |
| 3283 | } |
| 3284 | host->max_clk = host->ops->get_max_clock(host); |
| 3285 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3286 | |
| 3287 | /* |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 3288 | * In case of Host Controller v3.00, find out whether clock |
| 3289 | * multiplier is supported. |
| 3290 | */ |
| 3291 | host->clk_mul = (caps[1] & SDHCI_CLOCK_MUL_MASK) >> |
| 3292 | SDHCI_CLOCK_MUL_SHIFT; |
| 3293 | |
| 3294 | /* |
| 3295 | * In case the value in Clock Multiplier is 0, then programmable |
| 3296 | * clock mode is not supported, otherwise the actual clock |
| 3297 | * multiplier is one more than the value of Clock Multiplier |
| 3298 | * in the Capabilities Register. |
| 3299 | */ |
| 3300 | if (host->clk_mul) |
| 3301 | host->clk_mul += 1; |
| 3302 | |
| 3303 | /* |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3304 | * Set host parameters. |
| 3305 | */ |
| 3306 | mmc->ops = &sdhci_ops; |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 3307 | mmc->f_max = host->max_clk; |
Marek Szyprowski | ce5f036 | 2010-08-10 18:01:56 -0700 | [diff] [blame] | 3308 | if (host->ops->get_min_clock) |
Anton Vorontsov | a9e58f2 | 2009-07-29 15:04:16 -0700 | [diff] [blame] | 3309 | mmc->f_min = host->ops->get_min_clock(host); |
Arindam Nath | c3ed387 | 2011-05-05 12:19:06 +0530 | [diff] [blame] | 3310 | else if (host->version >= SDHCI_SPEC_300) { |
| 3311 | if (host->clk_mul) { |
| 3312 | mmc->f_min = (host->max_clk * host->clk_mul) / 1024; |
| 3313 | mmc->f_max = host->max_clk * host->clk_mul; |
| 3314 | } else |
| 3315 | mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; |
| 3316 | } else |
Zhangfei Gao | 0397526 | 2010-09-20 15:15:18 -0400 | [diff] [blame] | 3317 | mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; |
Philip Rakity | 15ec446 | 2010-11-19 16:48:39 -0500 | [diff] [blame] | 3318 | |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3319 | host->timeout_clk = |
| 3320 | (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; |
| 3321 | if (host->timeout_clk == 0) { |
| 3322 | if (host->ops->get_timeout_clock) { |
| 3323 | host->timeout_clk = host->ops->get_timeout_clock(host); |
| 3324 | } else if (!(host->quirks & |
| 3325 | SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { |
| 3326 | pr_err("%s: Hardware doesn't specify timeout clock " |
| 3327 | "frequency.\n", mmc_hostname(mmc)); |
| 3328 | return -ENODEV; |
| 3329 | } |
| 3330 | } |
| 3331 | if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT) |
| 3332 | host->timeout_clk *= 1000; |
| 3333 | |
| 3334 | if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) |
| 3335 | host->timeout_clk = mmc->f_max / 1000; |
| 3336 | |
Krishna Konda | a20d336 | 2013-04-01 21:01:59 -0700 | [diff] [blame] | 3337 | if (!(host->quirks2 & SDHCI_QUIRK2_USE_MAX_DISCARD_SIZE)) |
| 3338 | mmc->max_discard_to = (1 << 27) / host->timeout_clk; |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3339 | |
Andrei Warkentin | e89d456 | 2011-05-23 15:06:37 -0500 | [diff] [blame] | 3340 | mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; |
| 3341 | |
| 3342 | if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) |
| 3343 | host->flags |= SDHCI_AUTO_CMD12; |
Anton Vorontsov | 5fe23c7 | 2009-06-18 00:14:08 +0400 | [diff] [blame] | 3344 | |
Andrei Warkentin | 8edf6371 | 2011-05-23 15:06:39 -0500 | [diff] [blame] | 3345 | /* Auto-CMD23 stuff only works in ADMA or PIO. */ |
Andrei Warkentin | 4f3d3e9 | 2011-05-25 10:42:50 -0400 | [diff] [blame] | 3346 | if ((host->version >= SDHCI_SPEC_300) && |
Andrei Warkentin | 8edf6371 | 2011-05-23 15:06:39 -0500 | [diff] [blame] | 3347 | ((host->flags & SDHCI_USE_ADMA) || |
Andrei Warkentin | 4f3d3e9 | 2011-05-25 10:42:50 -0400 | [diff] [blame] | 3348 | !(host->flags & SDHCI_USE_SDMA))) { |
Andrei Warkentin | 8edf6371 | 2011-05-23 15:06:39 -0500 | [diff] [blame] | 3349 | host->flags |= SDHCI_AUTO_CMD23; |
| 3350 | DBG("%s: Auto-CMD23 available\n", mmc_hostname(mmc)); |
| 3351 | } else { |
| 3352 | DBG("%s: Auto-CMD23 unavailable\n", mmc_hostname(mmc)); |
| 3353 | } |
| 3354 | |
Philip Rakity | 15ec446 | 2010-11-19 16:48:39 -0500 | [diff] [blame] | 3355 | /* |
| 3356 | * A controller may support 8-bit width, but the board itself |
| 3357 | * might not have the pins brought out. Boards that support |
| 3358 | * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in |
| 3359 | * their platform code before calling sdhci_add_host(), and we |
| 3360 | * won't assume 8-bit width for hosts without that CAP. |
| 3361 | */ |
Anton Vorontsov | 5fe23c7 | 2009-06-18 00:14:08 +0400 | [diff] [blame] | 3362 | if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) |
Philip Rakity | 15ec446 | 2010-11-19 16:48:39 -0500 | [diff] [blame] | 3363 | mmc->caps |= MMC_CAP_4_BIT_DATA; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3364 | |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3365 | if (caps[0] & SDHCI_CAN_DO_HISPD) |
Zhangfei Gao | a29e7e1 | 2010-08-16 21:15:32 -0400 | [diff] [blame] | 3366 | mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; |
Pierre Ossman | cd9277c | 2007-02-18 12:07:47 +0100 | [diff] [blame] | 3367 | |
Jaehoon Chung | 176d1ed | 2010-09-27 09:42:20 +0100 | [diff] [blame] | 3368 | if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && |
| 3369 | mmc_card_is_removable(mmc)) |
Anton Vorontsov | 68d1fb7 | 2009-03-17 00:13:52 +0300 | [diff] [blame] | 3370 | mmc->caps |= MMC_CAP_NEEDS_POLL; |
| 3371 | |
Al Cooper | 4188bba | 2012-03-16 15:54:17 -0400 | [diff] [blame] | 3372 | /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ |
| 3373 | if (caps[1] & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | |
| 3374 | SDHCI_SUPPORT_DDR50)) |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3375 | mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; |
| 3376 | |
| 3377 | /* SDR104 supports also implies SDR50 support */ |
| 3378 | if (caps[1] & SDHCI_SUPPORT_SDR104) |
| 3379 | mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; |
| 3380 | else if (caps[1] & SDHCI_SUPPORT_SDR50) |
| 3381 | mmc->caps |= MMC_CAP_UHS_SDR50; |
| 3382 | |
| 3383 | if (caps[1] & SDHCI_SUPPORT_DDR50) |
| 3384 | mmc->caps |= MMC_CAP_UHS_DDR50; |
| 3385 | |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 3386 | /* Does the host need tuning for SDR50? */ |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 3387 | if (caps[1] & SDHCI_USE_SDR50_TUNING) |
| 3388 | host->flags |= SDHCI_SDR50_NEEDS_TUNING; |
| 3389 | |
Girish K S | 2cd06dc | 2012-01-06 09:56:39 +0530 | [diff] [blame] | 3390 | /* Does the host need tuning for HS200? */ |
| 3391 | if (mmc->caps2 & MMC_CAP2_HS200) |
| 3392 | host->flags |= SDHCI_HS200_NEEDS_TUNING; |
| 3393 | |
Venkat Gopalakrishnan | ceca475 | 2013-06-11 21:29:40 -0700 | [diff] [blame] | 3394 | /* Does the host need tuning for HS400? */ |
| 3395 | if (mmc->caps2 & MMC_CAP2_HS400) |
| 3396 | host->flags |= SDHCI_HS400_NEEDS_TUNING; |
| 3397 | |
Arindam Nath | d6d50a1 | 2011-05-05 12:18:59 +0530 | [diff] [blame] | 3398 | /* Driver Type(s) (A, C, D) supported by the host */ |
| 3399 | if (caps[1] & SDHCI_DRIVER_TYPE_A) |
| 3400 | mmc->caps |= MMC_CAP_DRIVER_TYPE_A; |
| 3401 | if (caps[1] & SDHCI_DRIVER_TYPE_C) |
| 3402 | mmc->caps |= MMC_CAP_DRIVER_TYPE_C; |
| 3403 | if (caps[1] & SDHCI_DRIVER_TYPE_D) |
| 3404 | mmc->caps |= MMC_CAP_DRIVER_TYPE_D; |
| 3405 | |
Tatyana Brokhman | 8b458cf | 2012-10-16 08:26:18 +0200 | [diff] [blame] | 3406 | /* Initial value for re-tuning timer count */ |
| 3407 | host->tuning_count = (caps[1] & SDHCI_RETUNING_TIMER_COUNT_MASK) >> |
| 3408 | SDHCI_RETUNING_TIMER_COUNT_SHIFT; |
| 3409 | |
| 3410 | /* |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 3411 | * In case Re-tuning Timer is not disabled, the actual value of |
| 3412 | * re-tuning timer will be 2 ^ (n - 1). |
| 3413 | */ |
| 3414 | if (host->tuning_count) |
| 3415 | host->tuning_count = 1 << (host->tuning_count - 1); |
| 3416 | |
| 3417 | /* Re-tuning mode supported by the Host Controller */ |
| 3418 | host->tuning_mode = (caps[1] & SDHCI_RETUNING_MODE_MASK) >> |
| 3419 | SDHCI_RETUNING_MODE_SHIFT; |
| 3420 | |
Takashi Iwai | 8f230f4 | 2010-12-08 10:04:30 +0100 | [diff] [blame] | 3421 | ocr_avail = 0; |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3422 | /* |
| 3423 | * According to SD Host Controller spec v3.00, if the Host System |
| 3424 | * can afford more than 150mA, Host Driver should set XPC to 1. Also |
| 3425 | * the value is meaningful only if Voltage Support in the Capabilities |
| 3426 | * register is set. The actual current value is 4 times the register |
| 3427 | * value. |
| 3428 | */ |
| 3429 | max_current_caps = sdhci_readl(host, SDHCI_MAX_CURRENT); |
| 3430 | |
| 3431 | if (caps[0] & SDHCI_CAN_VDD_330) { |
| 3432 | int max_current_330; |
| 3433 | |
Takashi Iwai | 8f230f4 | 2010-12-08 10:04:30 +0100 | [diff] [blame] | 3434 | ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34; |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3435 | |
| 3436 | max_current_330 = ((max_current_caps & |
| 3437 | SDHCI_MAX_CURRENT_330_MASK) >> |
| 3438 | SDHCI_MAX_CURRENT_330_SHIFT) * |
| 3439 | SDHCI_MAX_CURRENT_MULTIPLIER; |
| 3440 | |
| 3441 | if (max_current_330 > 150) |
| 3442 | mmc->caps |= MMC_CAP_SET_XPC_330; |
| 3443 | } |
| 3444 | if (caps[0] & SDHCI_CAN_VDD_300) { |
| 3445 | int max_current_300; |
| 3446 | |
Takashi Iwai | 8f230f4 | 2010-12-08 10:04:30 +0100 | [diff] [blame] | 3447 | ocr_avail |= MMC_VDD_29_30 | MMC_VDD_30_31; |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3448 | |
| 3449 | max_current_300 = ((max_current_caps & |
| 3450 | SDHCI_MAX_CURRENT_300_MASK) >> |
| 3451 | SDHCI_MAX_CURRENT_300_SHIFT) * |
| 3452 | SDHCI_MAX_CURRENT_MULTIPLIER; |
| 3453 | |
| 3454 | if (max_current_300 > 150) |
| 3455 | mmc->caps |= MMC_CAP_SET_XPC_300; |
| 3456 | } |
| 3457 | if (caps[0] & SDHCI_CAN_VDD_180) { |
| 3458 | int max_current_180; |
| 3459 | |
Takashi Iwai | 8f230f4 | 2010-12-08 10:04:30 +0100 | [diff] [blame] | 3460 | ocr_avail |= MMC_VDD_165_195; |
| 3461 | |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3462 | max_current_180 = ((max_current_caps & |
| 3463 | SDHCI_MAX_CURRENT_180_MASK) >> |
| 3464 | SDHCI_MAX_CURRENT_180_SHIFT) * |
| 3465 | SDHCI_MAX_CURRENT_MULTIPLIER; |
| 3466 | |
| 3467 | if (max_current_180 > 150) |
| 3468 | mmc->caps |= MMC_CAP_SET_XPC_180; |
Arindam Nath | 5371c92 | 2011-05-05 12:19:02 +0530 | [diff] [blame] | 3469 | |
| 3470 | /* Maximum current capabilities of the host at 1.8V */ |
| 3471 | if (max_current_180 >= 800) |
| 3472 | mmc->caps |= MMC_CAP_MAX_CURRENT_800; |
| 3473 | else if (max_current_180 >= 600) |
| 3474 | mmc->caps |= MMC_CAP_MAX_CURRENT_600; |
| 3475 | else if (max_current_180 >= 400) |
| 3476 | mmc->caps |= MMC_CAP_MAX_CURRENT_400; |
| 3477 | else |
| 3478 | mmc->caps |= MMC_CAP_MAX_CURRENT_200; |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3479 | } |
| 3480 | |
Takashi Iwai | 8f230f4 | 2010-12-08 10:04:30 +0100 | [diff] [blame] | 3481 | mmc->ocr_avail = ocr_avail; |
| 3482 | mmc->ocr_avail_sdio = ocr_avail; |
| 3483 | if (host->ocr_avail_sdio) |
| 3484 | mmc->ocr_avail_sdio &= host->ocr_avail_sdio; |
| 3485 | mmc->ocr_avail_sd = ocr_avail; |
| 3486 | if (host->ocr_avail_sd) |
| 3487 | mmc->ocr_avail_sd &= host->ocr_avail_sd; |
| 3488 | else /* normal SD controllers don't support 1.8V */ |
| 3489 | mmc->ocr_avail_sd &= ~MMC_VDD_165_195; |
| 3490 | mmc->ocr_avail_mmc = ocr_avail; |
| 3491 | if (host->ocr_avail_mmc) |
| 3492 | mmc->ocr_avail_mmc &= host->ocr_avail_mmc; |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 3493 | |
| 3494 | if (mmc->ocr_avail == 0) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3495 | pr_err("%s: Hardware doesn't report any " |
Pierre Ossman | b69c905 | 2008-03-08 23:44:25 +0100 | [diff] [blame] | 3496 | "support voltages.\n", mmc_hostname(mmc)); |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3497 | return -ENODEV; |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 3498 | } |
| 3499 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3500 | /* |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3501 | * Maximum number of segments. Depends on if the hardware |
| 3502 | * can do scatter/gather or not. |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3503 | */ |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3504 | if (host->flags & SDHCI_USE_ADMA) |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 3505 | mmc->max_segs = host->adma_max_desc; |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3506 | else if (host->flags & SDHCI_USE_SDMA) |
Martin K. Petersen | a36274e | 2010-09-10 01:33:59 -0400 | [diff] [blame] | 3507 | mmc->max_segs = 1; |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 3508 | else/* PIO */ |
| 3509 | mmc->max_segs = host->adma_max_desc; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3510 | |
| 3511 | /* |
Pierre Ossman | bab7696 | 2006-07-02 16:51:35 +0100 | [diff] [blame] | 3512 | * Maximum number of sectors in one transfer. Limited by DMA boundary |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 3513 | * size (512KiB), unless specified by platform specific driver. Each |
| 3514 | * descriptor can transfer a maximum of 64KB. |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3515 | */ |
Asutosh Das | c8e8e56 | 2013-01-10 21:05:49 +0530 | [diff] [blame] | 3516 | if (host->ops->get_max_segments) |
| 3517 | mmc->max_req_size = (host->adma_max_desc * 65536); |
| 3518 | else |
| 3519 | mmc->max_req_size = 524288; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3520 | |
| 3521 | /* |
| 3522 | * Maximum segment size. Could be one segment with the maximum number |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3523 | * of bytes. When doing hardware scatter/gather, each entry cannot |
| 3524 | * be larger than 64 KiB though. |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3525 | */ |
Olof Johansson | 30652aa | 2011-01-01 18:37:32 -0600 | [diff] [blame] | 3526 | if (host->flags & SDHCI_USE_ADMA) { |
| 3527 | if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC) |
| 3528 | mmc->max_seg_size = 65535; |
| 3529 | else |
| 3530 | mmc->max_seg_size = 65536; |
| 3531 | } else { |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3532 | mmc->max_seg_size = mmc->max_req_size; |
Olof Johansson | 30652aa | 2011-01-01 18:37:32 -0600 | [diff] [blame] | 3533 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3534 | |
| 3535 | /* |
Pierre Ossman | fe4a3c7 | 2006-11-21 17:54:23 +0100 | [diff] [blame] | 3536 | * Maximum block size. This varies from controller to controller and |
| 3537 | * is specified in the capabilities register. |
| 3538 | */ |
Anton Vorontsov | 0633f65 | 2009-03-17 00:14:03 +0300 | [diff] [blame] | 3539 | if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { |
| 3540 | mmc->max_blk_size = 2; |
| 3541 | } else { |
Arindam Nath | f2119df | 2011-05-05 12:18:57 +0530 | [diff] [blame] | 3542 | mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >> |
Anton Vorontsov | 0633f65 | 2009-03-17 00:14:03 +0300 | [diff] [blame] | 3543 | SDHCI_MAX_BLOCK_SHIFT; |
| 3544 | if (mmc->max_blk_size >= 3) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3545 | pr_warning("%s: Invalid maximum block size, " |
Anton Vorontsov | 0633f65 | 2009-03-17 00:14:03 +0300 | [diff] [blame] | 3546 | "assuming 512 bytes\n", mmc_hostname(mmc)); |
| 3547 | mmc->max_blk_size = 0; |
| 3548 | } |
| 3549 | } |
| 3550 | |
| 3551 | mmc->max_blk_size = 512 << mmc->max_blk_size; |
Pierre Ossman | fe4a3c7 | 2006-11-21 17:54:23 +0100 | [diff] [blame] | 3552 | |
| 3553 | /* |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 3554 | * Maximum block count. |
| 3555 | */ |
Ben Dooks | 1388eef | 2009-06-14 12:40:53 +0100 | [diff] [blame] | 3556 | mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; |
Pierre Ossman | 55db890 | 2006-11-21 17:55:45 +0100 | [diff] [blame] | 3557 | |
| 3558 | /* |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3559 | * Init tasklets. |
| 3560 | */ |
| 3561 | tasklet_init(&host->card_tasklet, |
| 3562 | sdhci_tasklet_card, (unsigned long)host); |
| 3563 | tasklet_init(&host->finish_tasklet, |
| 3564 | sdhci_tasklet_finish, (unsigned long)host); |
| 3565 | |
Al Viro | e4cad1b | 2006-10-10 22:47:07 +0100 | [diff] [blame] | 3566 | setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3567 | |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 3568 | if (host->version >= SDHCI_SPEC_300) { |
Arindam Nath | b513ea2 | 2011-05-05 12:19:04 +0530 | [diff] [blame] | 3569 | init_waitqueue_head(&host->buf_ready_int); |
| 3570 | |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 3571 | /* Initialize re-tuning timer */ |
| 3572 | init_timer(&host->tuning_timer); |
| 3573 | host->tuning_timer.data = (unsigned long)host; |
| 3574 | host->tuning_timer.function = sdhci_tuning_timer; |
| 3575 | } |
| 3576 | |
Thomas Gleixner | dace145 | 2006-07-01 19:29:38 -0700 | [diff] [blame] | 3577 | ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, |
Pierre Ossman | b69c905 | 2008-03-08 23:44:25 +0100 | [diff] [blame] | 3578 | mmc_hostname(mmc), host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3579 | if (ret) |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 3580 | goto untasklet; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3581 | |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 3582 | host->irq_enabled = true; |
Marek Szyprowski | 9bea3c8 | 2010-08-10 18:01:59 -0700 | [diff] [blame] | 3583 | host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); |
| 3584 | if (IS_ERR(host->vmmc)) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3585 | pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); |
Marek Szyprowski | 9bea3c8 | 2010-08-10 18:01:59 -0700 | [diff] [blame] | 3586 | host->vmmc = NULL; |
Marek Szyprowski | 9bea3c8 | 2010-08-10 18:01:59 -0700 | [diff] [blame] | 3587 | } |
| 3588 | |
Nicolas Pitre | 2f4cbb3 | 2010-03-05 13:43:32 -0800 | [diff] [blame] | 3589 | sdhci_init(host, 0); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3590 | |
| 3591 | #ifdef CONFIG_MMC_DEBUG |
| 3592 | sdhci_dumpregs(host); |
| 3593 | #endif |
| 3594 | |
Pierre Ossman | f913431 | 2008-12-21 17:01:48 +0100 | [diff] [blame] | 3595 | #ifdef SDHCI_USE_LEDS_CLASS |
Helmut Schaa | 5dbace0 | 2009-02-14 16:22:39 +0100 | [diff] [blame] | 3596 | snprintf(host->led_name, sizeof(host->led_name), |
| 3597 | "%s::", mmc_hostname(mmc)); |
| 3598 | host->led.name = host->led_name; |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 3599 | host->led.brightness = LED_OFF; |
| 3600 | host->led.default_trigger = mmc_hostname(mmc); |
| 3601 | host->led.brightness_set = sdhci_led_control; |
| 3602 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3603 | ret = led_classdev_register(mmc_dev(mmc), &host->led); |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 3604 | if (ret) |
| 3605 | goto reset; |
| 3606 | #endif |
| 3607 | |
Pierre Ossman | 5f25a66 | 2006-10-04 02:15:39 -0700 | [diff] [blame] | 3608 | mmiowb(); |
| 3609 | |
Sujit Reddy Thumma | deb1ada | 2013-06-19 20:15:37 +0530 | [diff] [blame] | 3610 | if (host->cpu_dma_latency_us) { |
| 3611 | host->pm_qos_timeout_us = 10000; /* default value */ |
Sahitya Tummala | b4e8404 | 2013-03-10 07:03:17 +0530 | [diff] [blame] | 3612 | pm_qos_add_request(&host->pm_qos_req_dma, |
| 3613 | PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE); |
Sujit Reddy Thumma | 693af8d | 2013-06-19 20:25:38 +0530 | [diff] [blame] | 3614 | |
| 3615 | host->pm_qos_tout.show = show_sdhci_pm_qos_tout; |
| 3616 | host->pm_qos_tout.store = store_sdhci_pm_qos_tout; |
| 3617 | sysfs_attr_init(&host->pm_qos_tout.attr); |
| 3618 | host->pm_qos_tout.attr.name = "pm_qos_unvote_delay"; |
| 3619 | host->pm_qos_tout.attr.mode = S_IRUGO | S_IWUSR; |
| 3620 | ret = device_create_file(mmc_dev(mmc), &host->pm_qos_tout); |
| 3621 | if (ret) |
| 3622 | pr_err("%s: cannot create pm_qos_unvote_delay %d\n", |
| 3623 | mmc_hostname(mmc), ret); |
Sujit Reddy Thumma | deb1ada | 2013-06-19 20:15:37 +0530 | [diff] [blame] | 3624 | } |
Sujit Reddy Thumma | 693af8d | 2013-06-19 20:25:38 +0530 | [diff] [blame] | 3625 | |
Asutosh Das | 08a00a3 | 2013-04-24 14:48:48 +0530 | [diff] [blame] | 3626 | if (caps[0] & SDHCI_ASYNC_INTR) |
| 3627 | host->async_int_supp = true; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3628 | mmc_add_host(mmc); |
| 3629 | |
Asutosh Das | befeb73 | 2013-06-13 14:27:42 +0530 | [diff] [blame] | 3630 | if (host->quirks2 & SDHCI_QUIRK2_IGN_DATA_END_BIT_ERROR) |
| 3631 | sdhci_clear_set_irqs(host, SDHCI_INT_DATA_END_BIT, 0); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3632 | pr_info("%s: SDHCI controller on %s [%s] using %s\n", |
Kay Sievers | d1b2686 | 2008-11-08 21:37:46 +0100 | [diff] [blame] | 3633 | mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), |
Richard Röjfors | a13abc7 | 2009-09-22 16:45:30 -0700 | [diff] [blame] | 3634 | (host->flags & SDHCI_USE_ADMA) ? "ADMA" : |
| 3635 | (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3636 | |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 3637 | sdhci_enable_card_detection(host); |
| 3638 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3639 | return 0; |
| 3640 | |
Pierre Ossman | f913431 | 2008-12-21 17:01:48 +0100 | [diff] [blame] | 3641 | #ifdef SDHCI_USE_LEDS_CLASS |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 3642 | reset: |
| 3643 | sdhci_reset(host, SDHCI_RESET_ALL); |
| 3644 | free_irq(host->irq, host); |
| 3645 | #endif |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 3646 | untasklet: |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3647 | tasklet_kill(&host->card_tasklet); |
| 3648 | tasklet_kill(&host->finish_tasklet); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3649 | |
| 3650 | return ret; |
| 3651 | } |
| 3652 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3653 | EXPORT_SYMBOL_GPL(sdhci_add_host); |
| 3654 | |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 3655 | void sdhci_remove_host(struct sdhci_host *host, int dead) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3656 | { |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 3657 | unsigned long flags; |
| 3658 | |
| 3659 | if (dead) { |
| 3660 | spin_lock_irqsave(&host->lock, flags); |
| 3661 | |
| 3662 | host->flags |= SDHCI_DEVICE_DEAD; |
| 3663 | |
| 3664 | if (host->mrq) { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3665 | pr_err("%s: Controller removed during " |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 3666 | " transfer!\n", mmc_hostname(host->mmc)); |
| 3667 | |
| 3668 | host->mrq->cmd->error = -ENOMEDIUM; |
| 3669 | tasklet_schedule(&host->finish_tasklet); |
| 3670 | } |
| 3671 | |
| 3672 | spin_unlock_irqrestore(&host->lock, flags); |
| 3673 | } |
| 3674 | |
Anton Vorontsov | 7260cf5 | 2009-03-17 00:13:48 +0300 | [diff] [blame] | 3675 | sdhci_disable_card_detection(host); |
| 3676 | |
Sahitya Tummala | b4e8404 | 2013-03-10 07:03:17 +0530 | [diff] [blame] | 3677 | if (host->cpu_dma_latency_us) |
| 3678 | pm_qos_remove_request(&host->pm_qos_req_dma); |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3679 | mmc_remove_host(host->mmc); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3680 | |
Pierre Ossman | f913431 | 2008-12-21 17:01:48 +0100 | [diff] [blame] | 3681 | #ifdef SDHCI_USE_LEDS_CLASS |
Pierre Ossman | 2f730fe | 2008-03-17 10:29:38 +0100 | [diff] [blame] | 3682 | led_classdev_unregister(&host->led); |
| 3683 | #endif |
| 3684 | |
Pierre Ossman | 1e72859 | 2008-04-16 19:13:13 +0200 | [diff] [blame] | 3685 | if (!dead) |
| 3686 | sdhci_reset(host, SDHCI_RESET_ALL); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3687 | |
| 3688 | free_irq(host->irq, host); |
| 3689 | |
| 3690 | del_timer_sync(&host->timer); |
Arindam Nath | cf2b5ee | 2011-05-05 12:19:07 +0530 | [diff] [blame] | 3691 | if (host->version >= SDHCI_SPEC_300) |
| 3692 | del_timer_sync(&host->tuning_timer); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3693 | |
| 3694 | tasklet_kill(&host->card_tasklet); |
| 3695 | tasklet_kill(&host->finish_tasklet); |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3696 | |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3697 | if (host->vmmc) |
Marek Szyprowski | 9bea3c8 | 2010-08-10 18:01:59 -0700 | [diff] [blame] | 3698 | regulator_put(host->vmmc); |
Marek Szyprowski | 9bea3c8 | 2010-08-10 18:01:59 -0700 | [diff] [blame] | 3699 | |
Pierre Ossman | 2134a92 | 2008-06-28 18:28:51 +0200 | [diff] [blame] | 3700 | kfree(host->adma_desc); |
| 3701 | kfree(host->align_buffer); |
| 3702 | |
| 3703 | host->adma_desc = NULL; |
| 3704 | host->align_buffer = NULL; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3705 | } |
| 3706 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3707 | EXPORT_SYMBOL_GPL(sdhci_remove_host); |
| 3708 | |
| 3709 | void sdhci_free_host(struct sdhci_host *host) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3710 | { |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3711 | mmc_free_host(host->mmc); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3712 | } |
| 3713 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3714 | EXPORT_SYMBOL_GPL(sdhci_free_host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3715 | |
| 3716 | /*****************************************************************************\ |
| 3717 | * * |
| 3718 | * Driver init/exit * |
| 3719 | * * |
| 3720 | \*****************************************************************************/ |
| 3721 | |
| 3722 | static int __init sdhci_drv_init(void) |
| 3723 | { |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3724 | pr_info(DRIVER_NAME |
Pierre Ossman | 52fbf9c | 2007-02-09 08:23:41 +0100 | [diff] [blame] | 3725 | ": Secure Digital Host Controller Interface driver\n"); |
Sahitya Tummala | ca42211 | 2013-02-22 12:15:54 +0530 | [diff] [blame] | 3726 | pr_info(DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3727 | |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3728 | return 0; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3729 | } |
| 3730 | |
| 3731 | static void __exit sdhci_drv_exit(void) |
| 3732 | { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3733 | } |
| 3734 | |
| 3735 | module_init(sdhci_drv_init); |
| 3736 | module_exit(sdhci_drv_exit); |
| 3737 | |
Pierre Ossman | df673b2 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 3738 | module_param(debug_quirks, uint, 0444); |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 3739 | module_param(debug_quirks2, uint, 0444); |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 3740 | |
Pierre Ossman | 32710e8 | 2009-04-08 20:14:54 +0200 | [diff] [blame] | 3741 | MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>"); |
Pierre Ossman | b8c86fc | 2008-03-18 17:35:49 +0100 | [diff] [blame] | 3742 | MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 3743 | MODULE_LICENSE("GPL"); |
Pierre Ossman | 6743527 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 3744 | |
Pierre Ossman | df673b2 | 2006-06-30 02:22:31 -0700 | [diff] [blame] | 3745 | MODULE_PARM_DESC(debug_quirks, "Force certain quirks."); |
Adrian Hunter | 50accb9 | 2011-10-03 15:33:34 +0300 | [diff] [blame] | 3746 | MODULE_PARM_DESC(debug_quirks2, "Force certain other quirks."); |