blob: 06eb6cc09fef97714d12ebf8859e5e712d798df5 [file] [log] [blame]
Dan Williams9bc89cd2007-01-02 11:10:44 -07001/*
2 * core routines for the asynchronous memory transfer/transform api
3 *
4 * Copyright © 2006, Intel Corporation.
5 *
6 * Dan Williams <dan.j.williams@intel.com>
7 *
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * more details.
20 *
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 *
25 */
Franck Bui-Huu82524742008-05-12 21:21:05 +020026#include <linux/rculist.h>
Dan Williams9bc89cd2007-01-02 11:10:44 -070027#include <linux/kernel.h>
28#include <linux/async_tx.h>
29
30#ifdef CONFIG_DMA_ENGINE
Dan Williamsbec08512009-01-06 11:38:14 -070031static int __init async_tx_init(void)
Dan Williams9bc89cd2007-01-02 11:10:44 -070032{
Dan Williams729b5d12009-03-25 09:13:25 -070033 async_dmaengine_get();
Dan Williams9bc89cd2007-01-02 11:10:44 -070034
35 printk(KERN_INFO "async_tx: api initialized (async)\n");
36
37 return 0;
Dan Williams9bc89cd2007-01-02 11:10:44 -070038}
39
40static void __exit async_tx_exit(void)
41{
Dan Williams729b5d12009-03-25 09:13:25 -070042 async_dmaengine_put();
Dan Williams9bc89cd2007-01-02 11:10:44 -070043}
44
45/**
Dan Williams47437b22008-02-02 19:49:59 -070046 * __async_tx_find_channel - find a channel to carry out the operation or let
Dan Williams9bc89cd2007-01-02 11:10:44 -070047 * the transaction execute synchronously
48 * @depend_tx: transaction dependency
49 * @tx_type: transaction type
50 */
51struct dma_chan *
Dan Williams47437b22008-02-02 19:49:59 -070052__async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx,
Dan Williams9bc89cd2007-01-02 11:10:44 -070053 enum dma_transaction_type tx_type)
54{
55 /* see if we can keep the chain on one channel */
56 if (depend_tx &&
Dan Williamsbec08512009-01-06 11:38:14 -070057 dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
Dan Williams9bc89cd2007-01-02 11:10:44 -070058 return depend_tx->chan;
Dan Williams729b5d12009-03-25 09:13:25 -070059 return async_dma_find_channel(tx_type);
Dan Williams9bc89cd2007-01-02 11:10:44 -070060}
Dan Williams47437b22008-02-02 19:49:59 -070061EXPORT_SYMBOL_GPL(__async_tx_find_channel);
Dan Williams9bc89cd2007-01-02 11:10:44 -070062#else
63static int __init async_tx_init(void)
64{
65 printk(KERN_INFO "async_tx: api initialized (sync-only)\n");
66 return 0;
67}
68
69static void __exit async_tx_exit(void)
70{
71 do { } while (0);
72}
73#endif
74
Dan Williams19242d72008-04-17 20:17:25 -070075
76/**
77 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
78 * pre-attached.
79 * @depend_tx: the operation that must finish before the new operation runs
80 * @tx: the new operation
81 */
82static void
83async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
84 struct dma_async_tx_descriptor *tx)
85{
86 struct dma_chan *chan;
87 struct dma_device *device;
88 struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
89
90 /* first check to see if we can still append to depend_tx */
91 spin_lock_bh(&depend_tx->lock);
92 if (depend_tx->parent && depend_tx->chan == tx->chan) {
93 tx->parent = depend_tx;
94 depend_tx->next = tx;
95 intr_tx = NULL;
96 }
97 spin_unlock_bh(&depend_tx->lock);
98
99 if (!intr_tx)
100 return;
101
102 chan = depend_tx->chan;
103 device = chan->device;
104
105 /* see if we can schedule an interrupt
106 * otherwise poll for completion
107 */
108 if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
Dan Williams636bdea2008-04-17 20:17:26 -0700109 intr_tx = device->device_prep_dma_interrupt(chan, 0);
Dan Williams19242d72008-04-17 20:17:25 -0700110 else
111 intr_tx = NULL;
112
113 if (intr_tx) {
114 intr_tx->callback = NULL;
115 intr_tx->callback_param = NULL;
116 tx->parent = intr_tx;
117 /* safe to set ->next outside the lock since we know we are
118 * not submitted yet
119 */
120 intr_tx->next = tx;
121
122 /* check if we need to append */
123 spin_lock_bh(&depend_tx->lock);
124 if (depend_tx->parent) {
125 intr_tx->parent = depend_tx;
126 depend_tx->next = intr_tx;
127 async_tx_ack(intr_tx);
128 intr_tx = NULL;
129 }
130 spin_unlock_bh(&depend_tx->lock);
131
132 if (intr_tx) {
133 intr_tx->parent = NULL;
134 intr_tx->tx_submit(intr_tx);
135 async_tx_ack(intr_tx);
136 }
137 } else {
138 if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
139 panic("%s: DMA_ERROR waiting for depend_tx\n",
140 __func__);
141 tx->tx_submit(tx);
142 }
143}
144
145
146/**
147 * submit_disposition - while holding depend_tx->lock we must avoid submitting
148 * new operations to prevent a circular locking dependency with
149 * drivers that already hold a channel lock when calling
150 * async_tx_run_dependencies.
151 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
152 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
153 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
154 */
155enum submit_disposition {
156 ASYNC_TX_SUBMITTED,
157 ASYNC_TX_CHANNEL_SWITCH,
158 ASYNC_TX_DIRECT_SUBMIT,
159};
160
Dan Williams9bc89cd2007-01-02 11:10:44 -0700161void
162async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
163 enum async_tx_flags flags, struct dma_async_tx_descriptor *depend_tx,
164 dma_async_tx_callback cb_fn, void *cb_param)
165{
166 tx->callback = cb_fn;
167 tx->callback_param = cb_param;
168
Dan Williams19242d72008-04-17 20:17:25 -0700169 if (depend_tx) {
170 enum submit_disposition s;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700171
Dan Williams19242d72008-04-17 20:17:25 -0700172 /* sanity check the dependency chain:
173 * 1/ if ack is already set then we cannot be sure
174 * we are referring to the correct operation
175 * 2/ dependencies are 1:1 i.e. two transactions can
176 * not depend on the same parent
177 */
Dan Williams636bdea2008-04-17 20:17:26 -0700178 BUG_ON(async_tx_test_ack(depend_tx) || depend_tx->next ||
179 tx->parent);
Dan Williams19242d72008-04-17 20:17:25 -0700180
181 /* the lock prevents async_tx_run_dependencies from missing
182 * the setting of ->next when ->parent != NULL
183 */
Dan Williams9bc89cd2007-01-02 11:10:44 -0700184 spin_lock_bh(&depend_tx->lock);
Dan Williams19242d72008-04-17 20:17:25 -0700185 if (depend_tx->parent) {
186 /* we have a parent so we can not submit directly
187 * if we are staying on the same channel: append
188 * else: channel switch
189 */
190 if (depend_tx->chan == chan) {
191 tx->parent = depend_tx;
192 depend_tx->next = tx;
193 s = ASYNC_TX_SUBMITTED;
194 } else
195 s = ASYNC_TX_CHANNEL_SWITCH;
196 } else {
197 /* we do not have a parent so we may be able to submit
198 * directly if we are staying on the same channel
199 */
200 if (depend_tx->chan == chan)
201 s = ASYNC_TX_DIRECT_SUBMIT;
202 else
203 s = ASYNC_TX_CHANNEL_SWITCH;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700204 }
205 spin_unlock_bh(&depend_tx->lock);
206
Dan Williams19242d72008-04-17 20:17:25 -0700207 switch (s) {
208 case ASYNC_TX_SUBMITTED:
209 break;
210 case ASYNC_TX_CHANNEL_SWITCH:
211 async_tx_channel_switch(depend_tx, tx);
212 break;
213 case ASYNC_TX_DIRECT_SUBMIT:
214 tx->parent = NULL;
215 tx->tx_submit(tx);
216 break;
217 }
Dan Williams9bc89cd2007-01-02 11:10:44 -0700218 } else {
219 tx->parent = NULL;
220 tx->tx_submit(tx);
221 }
222
223 if (flags & ASYNC_TX_ACK)
224 async_tx_ack(tx);
225
226 if (depend_tx && (flags & ASYNC_TX_DEP_ACK))
227 async_tx_ack(depend_tx);
228}
229EXPORT_SYMBOL_GPL(async_tx_submit);
230
231/**
232 * async_trigger_callback - schedules the callback function to be run after
233 * any dependent operations have been completed.
234 * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK
235 * @depend_tx: 'callback' requires the completion of this transaction
236 * @cb_fn: function to call after depend_tx completes
237 * @cb_param: parameter to pass to the callback routine
238 */
239struct dma_async_tx_descriptor *
240async_trigger_callback(enum async_tx_flags flags,
241 struct dma_async_tx_descriptor *depend_tx,
242 dma_async_tx_callback cb_fn, void *cb_param)
243{
244 struct dma_chan *chan;
245 struct dma_device *device;
246 struct dma_async_tx_descriptor *tx;
247
248 if (depend_tx) {
249 chan = depend_tx->chan;
250 device = chan->device;
251
252 /* see if we can schedule an interrupt
253 * otherwise poll for completion
254 */
255 if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
256 device = NULL;
257
Dan Williams636bdea2008-04-17 20:17:26 -0700258 tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
Dan Williams9bc89cd2007-01-02 11:10:44 -0700259 } else
260 tx = NULL;
261
262 if (tx) {
Dan Williams3280ab3e2008-03-13 17:45:28 -0700263 pr_debug("%s: (async)\n", __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700264
265 async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
266 } else {
Dan Williams3280ab3e2008-03-13 17:45:28 -0700267 pr_debug("%s: (sync)\n", __func__);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700268
269 /* wait for any prerequisite operations */
Dan Williamsd2c52b72008-07-17 17:59:55 -0700270 async_tx_quiesce(&depend_tx);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700271
Dan Williams3dce0172008-07-17 17:59:55 -0700272 async_tx_sync_epilog(cb_fn, cb_param);
Dan Williams9bc89cd2007-01-02 11:10:44 -0700273 }
274
275 return tx;
276}
277EXPORT_SYMBOL_GPL(async_trigger_callback);
278
Dan Williamsd2c52b72008-07-17 17:59:55 -0700279/**
280 * async_tx_quiesce - ensure tx is complete and freeable upon return
281 * @tx - transaction to quiesce
282 */
283void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
284{
285 if (*tx) {
286 /* if ack is already set then we cannot be sure
287 * we are referring to the correct operation
288 */
289 BUG_ON(async_tx_test_ack(*tx));
290 if (dma_wait_for_async_tx(*tx) == DMA_ERROR)
291 panic("DMA_ERROR waiting for transaction\n");
292 async_tx_ack(*tx);
293 *tx = NULL;
294 }
295}
296EXPORT_SYMBOL_GPL(async_tx_quiesce);
297
Dan Williams9bc89cd2007-01-02 11:10:44 -0700298module_init(async_tx_init);
299module_exit(async_tx_exit);
300
301MODULE_AUTHOR("Intel Corporation");
302MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
303MODULE_LICENSE("GPL");