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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* $Id: lmc_media.c,v 1.13 2000/04/11 05:25:26 asj Exp $ */
2
Linus Torvalds1da177e2005-04-16 15:20:36 -07003#include <linux/kernel.h>
4#include <linux/string.h>
5#include <linux/timer.h>
6#include <linux/ptrace.h>
7#include <linux/errno.h>
8#include <linux/ioport.h>
9#include <linux/slab.h>
10#include <linux/interrupt.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/in.h>
12#include <linux/if_arp.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/inet.h>
17#include <linux/bitops.h>
18
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <asm/processor.h> /* Processor type for cache alignment. */
20#include <asm/io.h>
21#include <asm/dma.h>
22
23#include <asm/uaccess.h>
24
25#include "lmc.h"
26#include "lmc_var.h"
27#include "lmc_ioctl.h"
28#include "lmc_debug.h"
29
30#define CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 1
31
32 /*
33 * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
34 * All rights reserved. www.lanmedia.com
35 *
36 * This code is written by:
37 * Andrew Stanley-Jones (asj@cban.com)
38 * Rob Braun (bbraun@vix.com),
39 * Michael Graff (explorer@vix.com) and
40 * Matt Thomas (matt@3am-software.com).
41 *
42 * This software may be used and distributed according to the terms
43 * of the GNU General Public License version 2, incorporated herein by reference.
44 */
45
46/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070047 * protocol independent method.
48 */
49static void lmc_set_protocol (lmc_softc_t * const, lmc_ctl_t *);
50
51/*
52 * media independent methods to check on media status, link, light LEDs,
53 * etc.
54 */
55static void lmc_ds3_init (lmc_softc_t * const);
56static void lmc_ds3_default (lmc_softc_t * const);
57static void lmc_ds3_set_status (lmc_softc_t * const, lmc_ctl_t *);
58static void lmc_ds3_set_100ft (lmc_softc_t * const, int);
59static int lmc_ds3_get_link_status (lmc_softc_t * const);
60static void lmc_ds3_set_crc_length (lmc_softc_t * const, int);
61static void lmc_ds3_set_scram (lmc_softc_t * const, int);
62static void lmc_ds3_watchdog (lmc_softc_t * const);
63
64static void lmc_hssi_init (lmc_softc_t * const);
65static void lmc_hssi_default (lmc_softc_t * const);
66static void lmc_hssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
67static void lmc_hssi_set_clock (lmc_softc_t * const, int);
68static int lmc_hssi_get_link_status (lmc_softc_t * const);
69static void lmc_hssi_set_link_status (lmc_softc_t * const, int);
70static void lmc_hssi_set_crc_length (lmc_softc_t * const, int);
71static void lmc_hssi_watchdog (lmc_softc_t * const);
72
73static void lmc_ssi_init (lmc_softc_t * const);
74static void lmc_ssi_default (lmc_softc_t * const);
75static void lmc_ssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
76static void lmc_ssi_set_clock (lmc_softc_t * const, int);
77static void lmc_ssi_set_speed (lmc_softc_t * const, lmc_ctl_t *);
78static int lmc_ssi_get_link_status (lmc_softc_t * const);
79static void lmc_ssi_set_link_status (lmc_softc_t * const, int);
80static void lmc_ssi_set_crc_length (lmc_softc_t * const, int);
81static void lmc_ssi_watchdog (lmc_softc_t * const);
82
83static void lmc_t1_init (lmc_softc_t * const);
84static void lmc_t1_default (lmc_softc_t * const);
85static void lmc_t1_set_status (lmc_softc_t * const, lmc_ctl_t *);
86static int lmc_t1_get_link_status (lmc_softc_t * const);
87static void lmc_t1_set_circuit_type (lmc_softc_t * const, int);
88static void lmc_t1_set_crc_length (lmc_softc_t * const, int);
89static void lmc_t1_set_clock (lmc_softc_t * const, int);
90static void lmc_t1_watchdog (lmc_softc_t * const);
91
92static void lmc_dummy_set_1 (lmc_softc_t * const, int);
93static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *);
94
95static inline void write_av9110_bit (lmc_softc_t *, int);
96static void write_av9110 (lmc_softc_t *, u_int32_t, u_int32_t, u_int32_t,
97 u_int32_t, u_int32_t);
98
99lmc_media_t lmc_ds3_media = {
100 lmc_ds3_init, /* special media init stuff */
101 lmc_ds3_default, /* reset to default state */
102 lmc_ds3_set_status, /* reset status to state provided */
103 lmc_dummy_set_1, /* set clock source */
104 lmc_dummy_set2_1, /* set line speed */
105 lmc_ds3_set_100ft, /* set cable length */
106 lmc_ds3_set_scram, /* set scrambler */
107 lmc_ds3_get_link_status, /* get link status */
108 lmc_dummy_set_1, /* set link status */
109 lmc_ds3_set_crc_length, /* set CRC length */
110 lmc_dummy_set_1, /* set T1 or E1 circuit type */
111 lmc_ds3_watchdog
112};
113
114lmc_media_t lmc_hssi_media = {
115 lmc_hssi_init, /* special media init stuff */
116 lmc_hssi_default, /* reset to default state */
117 lmc_hssi_set_status, /* reset status to state provided */
118 lmc_hssi_set_clock, /* set clock source */
119 lmc_dummy_set2_1, /* set line speed */
120 lmc_dummy_set_1, /* set cable length */
121 lmc_dummy_set_1, /* set scrambler */
122 lmc_hssi_get_link_status, /* get link status */
123 lmc_hssi_set_link_status, /* set link status */
124 lmc_hssi_set_crc_length, /* set CRC length */
125 lmc_dummy_set_1, /* set T1 or E1 circuit type */
126 lmc_hssi_watchdog
127};
128
129lmc_media_t lmc_ssi_media = { lmc_ssi_init, /* special media init stuff */
130 lmc_ssi_default, /* reset to default state */
131 lmc_ssi_set_status, /* reset status to state provided */
132 lmc_ssi_set_clock, /* set clock source */
133 lmc_ssi_set_speed, /* set line speed */
134 lmc_dummy_set_1, /* set cable length */
135 lmc_dummy_set_1, /* set scrambler */
136 lmc_ssi_get_link_status, /* get link status */
137 lmc_ssi_set_link_status, /* set link status */
138 lmc_ssi_set_crc_length, /* set CRC length */
139 lmc_dummy_set_1, /* set T1 or E1 circuit type */
140 lmc_ssi_watchdog
141};
142
143lmc_media_t lmc_t1_media = {
144 lmc_t1_init, /* special media init stuff */
145 lmc_t1_default, /* reset to default state */
146 lmc_t1_set_status, /* reset status to state provided */
147 lmc_t1_set_clock, /* set clock source */
148 lmc_dummy_set2_1, /* set line speed */
149 lmc_dummy_set_1, /* set cable length */
150 lmc_dummy_set_1, /* set scrambler */
151 lmc_t1_get_link_status, /* get link status */
152 lmc_dummy_set_1, /* set link status */
153 lmc_t1_set_crc_length, /* set CRC length */
154 lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */
155 lmc_t1_watchdog
156};
157
158static void
159lmc_dummy_set_1 (lmc_softc_t * const sc, int a)
160{
161}
162
163static void
164lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a)
165{
166}
167
168/*
169 * HSSI methods
170 */
171
172static void
173lmc_hssi_init (lmc_softc_t * const sc)
174{
175 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200;
176
177 lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK);
178}
179
180static void
181lmc_hssi_default (lmc_softc_t * const sc)
182{
183 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
184
185 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
186 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
187 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
188}
189
190/*
191 * Given a user provided state, set ourselves up to match it. This will
192 * always reset the card if needed.
193 */
194static void
195lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
196{
197 if (ctl == NULL)
198 {
199 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
200 lmc_set_protocol (sc, NULL);
201
202 return;
203 }
204
205 /*
206 * check for change in clock source
207 */
208 if (ctl->clock_source && !sc->ictl.clock_source)
209 {
210 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
211 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
212 }
213 else if (!ctl->clock_source && sc->ictl.clock_source)
214 {
215 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
216 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
217 }
218
219 lmc_set_protocol (sc, ctl);
220}
221
222/*
223 * 1 == internal, 0 == external
224 */
225static void
226lmc_hssi_set_clock (lmc_softc_t * const sc, int ie)
227{
228 int old;
229 old = sc->ictl.clock_source;
230 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
231 {
232 sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK;
233 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
234 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
235 if(old != ie)
236 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
237 }
238 else
239 {
240 sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK);
241 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
242 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
243 if(old != ie)
244 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
245 }
246}
247
248/*
249 * return hardware link status.
250 * 0 == link is down, 1 == link is up.
251 */
252static int
253lmc_hssi_get_link_status (lmc_softc_t * const sc)
254{
255 /*
256 * We're using the same code as SSI since
257 * they're practically the same
258 */
259 return lmc_ssi_get_link_status(sc);
260}
261
262static void
263lmc_hssi_set_link_status (lmc_softc_t * const sc, int state)
264{
265 if (state == LMC_LINK_UP)
266 sc->lmc_miireg16 |= LMC_MII16_HSSI_TA;
267 else
268 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA;
269
270 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
271}
272
273/*
274 * 0 == 16bit, 1 == 32bit
275 */
276static void
277lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state)
278{
279 if (state == LMC_CTL_CRC_LENGTH_32)
280 {
281 /* 32 bit */
282 sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC;
283 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
284 }
285 else
286 {
287 /* 16 bit */
288 sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC;
289 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
290 }
291
292 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
293}
294
295static void
296lmc_hssi_watchdog (lmc_softc_t * const sc)
297{
298 /* HSSI is blank */
299}
300
301/*
302 * DS3 methods
303 */
304
305/*
306 * Set cable length
307 */
308static void
309lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie)
310{
311 if (ie == LMC_CTL_CABLE_LENGTH_GT_100FT)
312 {
313 sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO;
314 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT;
315 }
316 else if (ie == LMC_CTL_CABLE_LENGTH_LT_100FT)
317 {
318 sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO;
319 sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT;
320 }
321 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
322}
323
324static void
325lmc_ds3_default (lmc_softc_t * const sc)
326{
327 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
328
329 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
330 sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
331 sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF);
332 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
333}
334
335/*
336 * Given a user provided state, set ourselves up to match it. This will
337 * always reset the card if needed.
338 */
339static void
340lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
341{
342 if (ctl == NULL)
343 {
344 sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length);
345 sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff);
346 lmc_set_protocol (sc, NULL);
347
348 return;
349 }
350
351 /*
352 * check for change in cable length setting
353 */
354 if (ctl->cable_length && !sc->ictl.cable_length)
355 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT);
356 else if (!ctl->cable_length && sc->ictl.cable_length)
357 lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
358
359 /*
360 * Check for change in scrambler setting (requires reset)
361 */
362 if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff)
363 lmc_ds3_set_scram (sc, LMC_CTL_ON);
364 else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff)
365 lmc_ds3_set_scram (sc, LMC_CTL_OFF);
366
367 lmc_set_protocol (sc, ctl);
368}
369
370static void
371lmc_ds3_init (lmc_softc_t * const sc)
372{
373 int i;
374
375 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245;
376
377 /* writes zeros everywhere */
378 for (i = 0; i < 21; i++)
379 {
380 lmc_mii_writereg (sc, 0, 17, i);
381 lmc_mii_writereg (sc, 0, 18, 0);
382 }
383
384 /* set some essential bits */
385 lmc_mii_writereg (sc, 0, 17, 1);
386 lmc_mii_writereg (sc, 0, 18, 0x25); /* ser, xtx */
387
388 lmc_mii_writereg (sc, 0, 17, 5);
389 lmc_mii_writereg (sc, 0, 18, 0x80); /* emode */
390
391 lmc_mii_writereg (sc, 0, 17, 14);
392 lmc_mii_writereg (sc, 0, 18, 0x30); /* rcgen, tcgen */
393
394 /* clear counters and latched bits */
395 for (i = 0; i < 21; i++)
396 {
397 lmc_mii_writereg (sc, 0, 17, i);
398 lmc_mii_readreg (sc, 0, 18);
399 }
400}
401
402/*
403 * 1 == DS3 payload scrambled, 0 == not scrambled
404 */
405static void
406lmc_ds3_set_scram (lmc_softc_t * const sc, int ie)
407{
408 if (ie == LMC_CTL_ON)
409 {
410 sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM;
411 sc->ictl.scrambler_onoff = LMC_CTL_ON;
412 }
413 else
414 {
415 sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM;
416 sc->ictl.scrambler_onoff = LMC_CTL_OFF;
417 }
418 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
419}
420
421/*
422 * return hardware link status.
423 * 0 == link is down, 1 == link is up.
424 */
425static int
426lmc_ds3_get_link_status (lmc_softc_t * const sc)
427{
428 u_int16_t link_status, link_status_11;
429 int ret = 1;
430
431 lmc_mii_writereg (sc, 0, 17, 7);
432 link_status = lmc_mii_readreg (sc, 0, 18);
433
434 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
435 * led0 yellow = far-end adapter is in Red alarm condition
436 * led1 blue = received an Alarm Indication signal
437 * (upstream failure)
438 * led2 Green = power to adapter, Gate Array loaded & driver
439 * attached
440 * led3 red = Loss of Signal (LOS) or out of frame (OOF)
441 * conditions detected on T3 receive signal
442 */
443
444 lmc_led_on(sc, LMC_DS3_LED2);
445
446 if ((link_status & LMC_FRAMER_REG0_DLOS) ||
447 (link_status & LMC_FRAMER_REG0_OOFS)){
448 ret = 0;
449 if(sc->last_led_err[3] != 1){
450 u16 r1;
451 lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */
452 r1 = lmc_mii_readreg (sc, 0, 18);
453 r1 &= 0xfe;
454 lmc_mii_writereg(sc, 0, 18, r1);
455 printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name);
456 }
457 lmc_led_on(sc, LMC_DS3_LED3); /* turn on red LED */
458 sc->last_led_err[3] = 1;
459 }
460 else {
461 lmc_led_off(sc, LMC_DS3_LED3); /* turn on red LED */
462 if(sc->last_led_err[3] == 1){
463 u16 r1;
464 lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */
465 r1 = lmc_mii_readreg (sc, 0, 18);
466 r1 |= 0x01;
467 lmc_mii_writereg(sc, 0, 18, r1);
468 }
469 sc->last_led_err[3] = 0;
470 }
471
472 lmc_mii_writereg(sc, 0, 17, 0x10);
473 link_status_11 = lmc_mii_readreg(sc, 0, 18);
474 if((link_status & LMC_FRAMER_REG0_AIS) ||
475 (link_status_11 & LMC_FRAMER_REG10_XBIT)) {
476 ret = 0;
477 if(sc->last_led_err[0] != 1){
478 printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name);
479 printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name);
480 }
481 lmc_led_on(sc, LMC_DS3_LED0);
482 sc->last_led_err[0] = 1;
483 }
484 else {
485 lmc_led_off(sc, LMC_DS3_LED0);
486 sc->last_led_err[0] = 0;
487 }
488
489 lmc_mii_writereg (sc, 0, 17, 9);
490 link_status = lmc_mii_readreg (sc, 0, 18);
491
492 if(link_status & LMC_FRAMER_REG9_RBLUE){
493 ret = 0;
494 if(sc->last_led_err[1] != 1){
495 printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name);
496 }
497 lmc_led_on(sc, LMC_DS3_LED1);
498 sc->last_led_err[1] = 1;
499 }
500 else {
501 lmc_led_off(sc, LMC_DS3_LED1);
502 sc->last_led_err[1] = 0;
503 }
504
505 return ret;
506}
507
508/*
509 * 0 == 16bit, 1 == 32bit
510 */
511static void
512lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state)
513{
514 if (state == LMC_CTL_CRC_LENGTH_32)
515 {
516 /* 32 bit */
517 sc->lmc_miireg16 |= LMC_MII16_DS3_CRC;
518 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
519 }
520 else
521 {
522 /* 16 bit */
523 sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC;
524 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
525 }
526
527 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
528}
529
530static void
531lmc_ds3_watchdog (lmc_softc_t * const sc)
532{
533
534}
535
536
537/*
538 * SSI methods
539 */
540
541static void
542lmc_ssi_init (lmc_softc_t * const sc)
543{
544 u_int16_t mii17;
545 int cable;
546
547 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
548
549 mii17 = lmc_mii_readreg (sc, 0, 17);
550
551 cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT;
552 sc->ictl.cable_type = cable;
553
554 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
555}
556
557static void
558lmc_ssi_default (lmc_softc_t * const sc)
559{
560 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
561
562 /*
563 * make TXCLOCK always be an output
564 */
565 lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
566
567 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
568 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
569 sc->lmc_media->set_speed (sc, NULL);
570 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
571}
572
573/*
574 * Given a user provided state, set ourselves up to match it. This will
575 * always reset the card if needed.
576 */
577static void
578lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
579{
580 if (ctl == NULL)
581 {
582 sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
583 sc->lmc_media->set_speed (sc, &sc->ictl);
584 lmc_set_protocol (sc, NULL);
585
586 return;
587 }
588
589 /*
590 * check for change in clock source
591 */
592 if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT
593 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT)
594 {
595 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
596 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
597 }
598 else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT
599 && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT)
600 {
601 sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
602 sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
603 }
604
605 if (ctl->clock_rate != sc->ictl.clock_rate)
606 sc->lmc_media->set_speed (sc, ctl);
607
608 lmc_set_protocol (sc, ctl);
609}
610
611/*
612 * 1 == internal, 0 == external
613 */
614static void
615lmc_ssi_set_clock (lmc_softc_t * const sc, int ie)
616{
617 int old;
618 old = ie;
619 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
620 {
621 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
622 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
623 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
624 if(ie != old)
625 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
626 }
627 else
628 {
629 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
630 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
631 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
632 if(ie != old)
633 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
634 }
635}
636
637static void
638lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl)
639{
640 lmc_ctl_t *ictl = &sc->ictl;
641 lmc_av9110_t *av;
642
643 /* original settings for clock rate of:
644 * 100 Khz (8,25,0,0,2) were incorrect
645 * they should have been 80,125,1,3,3
646 * There are 17 param combinations to produce this freq.
647 * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations)
648 */
649 if (ctl == NULL)
650 {
651 av = &ictl->cardspec.ssi;
652 ictl->clock_rate = 1500000;
653 av->f = ictl->clock_rate;
654 av->n = 120;
655 av->m = 100;
656 av->v = 1;
657 av->x = 1;
658 av->r = 2;
659
660 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
661 return;
662 }
663
664 av = &ctl->cardspec.ssi;
665
666 if (av->f == 0)
667 return;
668
669 ictl->clock_rate = av->f; /* really, this is the rate we are */
670 ictl->cardspec.ssi = *av;
671
672 write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
673}
674
675/*
676 * return hardware link status.
677 * 0 == link is down, 1 == link is up.
678 */
679static int
680lmc_ssi_get_link_status (lmc_softc_t * const sc)
681{
682 u_int16_t link_status;
683 u_int32_t ticks;
684 int ret = 1;
685 int hw_hdsk = 1;
686
687 /*
688 * missing CTS? Hmm. If we require CTS on, we may never get the
689 * link to come up, so omit it in this test.
690 *
691 * Also, it seems that with a loopback cable, DCD isn't asserted,
692 * so just check for things like this:
693 * DSR _must_ be asserted.
694 * One of DCD or CTS must be asserted.
695 */
696
697 /* LMC 1000 (SSI) LED definitions
698 * led0 Green = power to adapter, Gate Array loaded &
699 * driver attached
700 * led1 Green = DSR and DTR and RTS and CTS are set
701 * led2 Green = Cable detected
702 * led3 red = No timing is available from the
703 * cable or the on-board frequency
704 * generator.
705 */
706
707 link_status = lmc_mii_readreg (sc, 0, 16);
708
709 /* Is the transmit clock still available */
710 ticks = LMC_CSR_READ (sc, csr_gp_timer);
711 ticks = 0x0000ffff - (ticks & 0x0000ffff);
712
713 lmc_led_on (sc, LMC_MII16_LED0);
714
715 /* ====== transmit clock determination ===== */
716 if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) {
717 lmc_led_off(sc, LMC_MII16_LED3);
718 }
719 else if (ticks == 0 ) { /* no clock found ? */
720 ret = 0;
721 if(sc->last_led_err[3] != 1){
722 sc->stats.tx_lossOfClockCnt++;
723 printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name);
724 }
725 sc->last_led_err[3] = 1;
726 lmc_led_on (sc, LMC_MII16_LED3); /* turn ON red LED */
727 }
728 else {
729 if(sc->last_led_err[3] == 1)
730 printk(KERN_WARNING "%s: Clock Returned\n", sc->name);
731 sc->last_led_err[3] = 0;
732 lmc_led_off (sc, LMC_MII16_LED3); /* turn OFF red LED */
733 }
734
735 if ((link_status & LMC_MII16_SSI_DSR) == 0) { /* Also HSSI CA */
736 ret = 0;
737 hw_hdsk = 0;
738 }
739
740#ifdef CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE
741 if ((link_status & (LMC_MII16_SSI_CTS | LMC_MII16_SSI_DCD)) == 0){
742 ret = 0;
743 hw_hdsk = 0;
744 }
745#endif
746
747 if(hw_hdsk == 0){
748 if(sc->last_led_err[1] != 1)
749 printk(KERN_WARNING "%s: DSR not asserted\n", sc->name);
750 sc->last_led_err[1] = 1;
751 lmc_led_off(sc, LMC_MII16_LED1);
752 }
753 else {
754 if(sc->last_led_err[1] != 0)
755 printk(KERN_WARNING "%s: DSR now asserted\n", sc->name);
756 sc->last_led_err[1] = 0;
757 lmc_led_on(sc, LMC_MII16_LED1);
758 }
759
760 if(ret == 1) {
761 lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */
762 }
763
764 return ret;
765}
766
767static void
768lmc_ssi_set_link_status (lmc_softc_t * const sc, int state)
769{
770 if (state == LMC_LINK_UP)
771 {
772 sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
773 printk (LMC_PRINTF_FMT ": asserting DTR and RTS\n", LMC_PRINTF_ARGS);
774 }
775 else
776 {
777 sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
778 printk (LMC_PRINTF_FMT ": deasserting DTR and RTS\n", LMC_PRINTF_ARGS);
779 }
780
781 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
782
783}
784
785/*
786 * 0 == 16bit, 1 == 32bit
787 */
788static void
789lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state)
790{
791 if (state == LMC_CTL_CRC_LENGTH_32)
792 {
793 /* 32 bit */
794 sc->lmc_miireg16 |= LMC_MII16_SSI_CRC;
795 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
796 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
797
798 }
799 else
800 {
801 /* 16 bit */
802 sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC;
803 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
804 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
805 }
806
807 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
808}
809
810/*
811 * These are bits to program the ssi frequency generator
812 */
813static inline void
814write_av9110_bit (lmc_softc_t * sc, int c)
815{
816 /*
817 * set the data bit as we need it.
818 */
819 sc->lmc_gpio &= ~(LMC_GEP_CLK);
820 if (c & 0x01)
821 sc->lmc_gpio |= LMC_GEP_DATA;
822 else
823 sc->lmc_gpio &= ~(LMC_GEP_DATA);
824 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
825
826 /*
827 * set the clock to high
828 */
829 sc->lmc_gpio |= LMC_GEP_CLK;
830 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
831
832 /*
833 * set the clock to low again.
834 */
835 sc->lmc_gpio &= ~(LMC_GEP_CLK);
836 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
837}
838
839static void
840write_av9110 (lmc_softc_t * sc, u_int32_t n, u_int32_t m, u_int32_t v,
841 u_int32_t x, u_int32_t r)
842{
843 int i;
844
845#if 0
846 printk (LMC_PRINTF_FMT ": speed %u, %d %d %d %d %d\n",
847 LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r);
848#endif
849
850 sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR;
851 sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK);
852 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
853
854 /*
855 * Set the TXCLOCK, GENERATOR, SERIAL, and SERIALCLK
856 * as outputs.
857 */
858 lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK
859 | LMC_GEP_SSI_GENERATOR));
860
861 sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR);
862 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
863
864 /*
865 * a shifting we will go...
866 */
867 for (i = 0; i < 7; i++)
868 write_av9110_bit (sc, n >> i);
869 for (i = 0; i < 7; i++)
870 write_av9110_bit (sc, m >> i);
871 for (i = 0; i < 1; i++)
872 write_av9110_bit (sc, v >> i);
873 for (i = 0; i < 2; i++)
874 write_av9110_bit (sc, x >> i);
875 for (i = 0; i < 2; i++)
876 write_av9110_bit (sc, r >> i);
877 for (i = 0; i < 5; i++)
878 write_av9110_bit (sc, 0x17 >> i);
879
880 /*
881 * stop driving serial-related signals
882 */
883 lmc_gpio_mkinput (sc,
884 (LMC_GEP_DATA | LMC_GEP_CLK
885 | LMC_GEP_SSI_GENERATOR));
886}
887
888static void
889lmc_ssi_watchdog (lmc_softc_t * const sc)
890{
Al Viro44b1e772008-01-13 14:17:15 +0000891 u_int16_t mii17 = lmc_mii_readreg (sc, 0, 17);
892 if (((mii17 >> 3) & 7) == 7)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893 {
894 lmc_led_off (sc, LMC_MII16_LED2);
895 }
896 else
897 {
898 lmc_led_on (sc, LMC_MII16_LED2);
899 }
900
901}
902
903/*
904 * T1 methods
905 */
906
907/*
908 * The framer regs are multiplexed through MII regs 17 & 18
909 * write the register address to MII reg 17 and the * data to MII reg 18. */
910static void
911lmc_t1_write (lmc_softc_t * const sc, int a, int d)
912{
913 lmc_mii_writereg (sc, 0, 17, a);
914 lmc_mii_writereg (sc, 0, 18, d);
915}
916
917/* Save a warning
918static int
919lmc_t1_read (lmc_softc_t * const sc, int a)
920{
921 lmc_mii_writereg (sc, 0, 17, a);
922 return lmc_mii_readreg (sc, 0, 18);
923}
924*/
925
926
927static void
928lmc_t1_init (lmc_softc_t * const sc)
929{
930 u_int16_t mii16;
931 int i;
932
933 sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200;
934 mii16 = lmc_mii_readreg (sc, 0, 16);
935
936 /* reset 8370 */
937 mii16 &= ~LMC_MII16_T1_RST;
938 lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST);
939 lmc_mii_writereg (sc, 0, 16, mii16);
940
941 /* set T1 or E1 line. Uses sc->lmcmii16 reg in function so update it */
942 sc->lmc_miireg16 = mii16;
943 lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1);
944 mii16 = sc->lmc_miireg16;
945
946 lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */
947 lmc_t1_write (sc, 0x02, 0x42); /* JAT_CR - jitter atten config */
948 lmc_t1_write (sc, 0x14, 0x00); /* LOOP - loopback config */
949 lmc_t1_write (sc, 0x15, 0x00); /* DL3_TS - external data link timeslot */
950 lmc_t1_write (sc, 0x18, 0xFF); /* PIO - programmable I/O */
951 lmc_t1_write (sc, 0x19, 0x30); /* POE - programmable OE */
952 lmc_t1_write (sc, 0x1A, 0x0F); /* CMUX - clock input mux */
953 lmc_t1_write (sc, 0x20, 0x41); /* LIU_CR - RX LIU config */
954 lmc_t1_write (sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */
955 lmc_t1_write (sc, 0x40, 0x03); /* RCR0 - RX config */
956 lmc_t1_write (sc, 0x45, 0x00); /* RALM - RX alarm config */
957 lmc_t1_write (sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */
958 lmc_t1_write (sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */
959 lmc_t1_write (sc, 0x70, 0x0D); /* TCR0 - TX framer config */
960 lmc_t1_write (sc, 0x71, 0x05); /* TCR1 - TX config */
961 lmc_t1_write (sc, 0x72, 0x0B); /* TFRM - TX frame format */
962 lmc_t1_write (sc, 0x73, 0x00); /* TERROR - TX error insert */
963 lmc_t1_write (sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */
964 lmc_t1_write (sc, 0x75, 0x00); /* TALM - TX alarm signal config */
965 lmc_t1_write (sc, 0x76, 0x00); /* TPATT - TX test pattern config */
966 lmc_t1_write (sc, 0x77, 0x00); /* TLB - TX inband loopback config */
967 lmc_t1_write (sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter config */
968 lmc_t1_write (sc, 0x91, 0x05); /* CSEL - clad freq sel */
969 lmc_t1_write (sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */
970 lmc_t1_write (sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */
971 lmc_t1_write (sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */
972 lmc_t1_write (sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */
973 lmc_t1_write (sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */
974 for (i = 0; i < 32; i++)
975 {
976 lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */
977 lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */
978 lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */
979 }
980 for (i = 1; i < 25; i++)
981 {
982 lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */
983 }
984
985 mii16 |= LMC_MII16_T1_XOE;
986 lmc_mii_writereg (sc, 0, 16, mii16);
987 sc->lmc_miireg16 = mii16;
988}
989
990static void
991lmc_t1_default (lmc_softc_t * const sc)
992{
993 sc->lmc_miireg16 = LMC_MII16_LED_ALL;
994 sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
995 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
996 sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
997 /* Right now we can only clock from out internal source */
998 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
999}
1000/* * Given a user provided state, set ourselves up to match it. This will * always reset the card if needed.
1001 */
1002static void
1003lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1004{
1005 if (ctl == NULL)
1006 {
1007 sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type);
1008 lmc_set_protocol (sc, NULL);
1009
1010 return;
1011 }
1012 /*
1013 * check for change in circuit type */
1014 if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1
1015 && sc->ictl.circuit_type ==
1016 LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc,
1017 LMC_CTL_CIRCUIT_TYPE_E1);
1018 else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1
1019 && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1)
1020 sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
1021 lmc_set_protocol (sc, ctl);
1022}
1023/*
1024 * return hardware link status.
1025 * 0 == link is down, 1 == link is up.
1026 */ static int
1027lmc_t1_get_link_status (lmc_softc_t * const sc)
1028{
1029 u_int16_t link_status;
1030 int ret = 1;
1031
1032 /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
1033 * led0 yellow = far-end adapter is in Red alarm condition
1034 * led1 blue = received an Alarm Indication signal
1035 * (upstream failure)
1036 * led2 Green = power to adapter, Gate Array loaded & driver
1037 * attached
1038 * led3 red = Loss of Signal (LOS) or out of frame (OOF)
1039 * conditions detected on T3 receive signal
1040 */
1041 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status in");
1042 lmc_led_on(sc, LMC_DS3_LED2);
1043
1044 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS);
1045 link_status = lmc_mii_readreg (sc, 0, 18);
1046
1047
1048 if (link_status & T1F_RAIS) { /* turn on blue LED */
1049 ret = 0;
1050 if(sc->last_led_err[1] != 1){
1051 printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name);
1052 }
1053 lmc_led_on(sc, LMC_DS3_LED1);
1054 sc->last_led_err[1] = 1;
1055 }
1056 else {
1057 if(sc->last_led_err[1] != 0){
1058 printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name);
1059 }
1060 lmc_led_off (sc, LMC_DS3_LED1);
1061 sc->last_led_err[1] = 0;
1062 }
1063
1064 /*
1065 * Yellow Alarm is nasty evil stuff, looks at data patterns
1066 * inside the channel and confuses it with HDLC framing
1067 * ignore all yellow alarms.
1068 *
1069 * Do listen to MultiFrame Yellow alarm which while implemented
1070 * different ways isn't in the channel and hence somewhat
1071 * more reliable
1072 */
1073
1074 if (link_status & T1F_RMYEL) {
1075 ret = 0;
1076 if(sc->last_led_err[0] != 1){
1077 printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name);
1078 }
1079 lmc_led_on(sc, LMC_DS3_LED0);
1080 sc->last_led_err[0] = 1;
1081 }
1082 else {
1083 if(sc->last_led_err[0] != 0){
1084 printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name);
1085 }
1086 lmc_led_off(sc, LMC_DS3_LED0);
1087 sc->last_led_err[0] = 0;
1088 }
1089
1090 /*
1091 * Loss of signal and los of frame
1092 * Use the green bit to identify which one lit the led
1093 */
1094 if(link_status & T1F_RLOF){
1095 ret = 0;
1096 if(sc->last_led_err[3] != 1){
1097 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name);
1098 }
1099 lmc_led_on(sc, LMC_DS3_LED3);
1100 sc->last_led_err[3] = 1;
1101
1102 }
1103 else {
1104 if(sc->last_led_err[3] != 0){
1105 printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name);
1106 }
1107 if( ! (link_status & T1F_RLOS))
1108 lmc_led_off(sc, LMC_DS3_LED3);
1109 sc->last_led_err[3] = 0;
1110 }
1111
1112 if(link_status & T1F_RLOS){
1113 ret = 0;
1114 if(sc->last_led_err[2] != 1){
1115 printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name);
1116 }
1117 lmc_led_on(sc, LMC_DS3_LED3);
1118 sc->last_led_err[2] = 1;
1119
1120 }
1121 else {
1122 if(sc->last_led_err[2] != 0){
1123 printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name);
1124 }
1125 if( ! (link_status & T1F_RLOF))
1126 lmc_led_off(sc, LMC_DS3_LED3);
1127 sc->last_led_err[2] = 0;
1128 }
1129
1130 sc->lmc_xinfo.t1_alarm1_status = link_status;
1131
1132 lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS);
1133 sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18);
1134
1135
1136 lmc_trace(sc->lmc_device, "lmc_t1_get_link_status out");
1137
1138 return ret;
1139}
1140
1141/*
1142 * 1 == T1 Circuit Type , 0 == E1 Circuit Type
1143 */
1144static void
1145lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie)
1146{
1147 if (ie == LMC_CTL_CIRCUIT_TYPE_T1) {
1148 sc->lmc_miireg16 |= LMC_MII16_T1_Z;
1149 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1;
1150 printk(KERN_INFO "%s: In T1 Mode\n", sc->name);
1151 }
1152 else {
1153 sc->lmc_miireg16 &= ~LMC_MII16_T1_Z;
1154 sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1;
1155 printk(KERN_INFO "%s: In E1 Mode\n", sc->name);
1156 }
1157
1158 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1159
1160}
1161
1162/*
1163 * 0 == 16bit, 1 == 32bit */
1164static void
1165lmc_t1_set_crc_length (lmc_softc_t * const sc, int state)
1166{
1167 if (state == LMC_CTL_CRC_LENGTH_32)
1168 {
1169 /* 32 bit */
1170 sc->lmc_miireg16 |= LMC_MII16_T1_CRC;
1171 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
1172 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
1173
1174 }
1175 else
1176 {
1177 /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC;
1178 sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
1179 sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
1180
1181 }
1182
1183 lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
1184}
1185
1186/*
1187 * 1 == internal, 0 == external
1188 */
1189static void
1190lmc_t1_set_clock (lmc_softc_t * const sc, int ie)
1191{
1192 int old;
1193 old = ie;
1194 if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
1195 {
1196 sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
1197 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1198 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
1199 if(old != ie)
1200 printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
1201 }
1202 else
1203 {
1204 sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
1205 LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
1206 sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
1207 if(old != ie)
1208 printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
1209 }
1210}
1211
1212static void
1213lmc_t1_watchdog (lmc_softc_t * const sc)
1214{
1215}
1216
1217static void
1218lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl)
1219{
Al Viro79ea13c2008-01-24 02:06:46 -08001220 if (!ctl)
1221 sc->ictl.keepalive_onoff = LMC_CTL_ON;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001222}