blob: 7967240534d5b647d97313920c9d5ff7b2455bc0 [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Stephen Hemminger793b8832005-09-14 16:06:14 -070025#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070026#include <linux/kernel.h>
27#include <linux/version.h>
28#include <linux/module.h>
29#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080030#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070031#include <linux/etherdevice.h>
32#include <linux/ethtool.h>
33#include <linux/pci.h>
Stephen Hemminger555382c2007-08-29 12:58:14 -070034#include <linux/aer.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070035#include <linux/ip.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030036#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070037#include <linux/tcp.h>
38#include <linux/in.h>
39#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080040#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070041#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080042#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070043#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080044#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070045
46#include <asm/irq.h>
47
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070048#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
49#define SKY2_VLAN_TAG_USED 1
50#endif
51
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070052#include "sky2.h"
53
54#define DRV_NAME "sky2"
Stephen Hemmingera7b850e2007-10-11 19:48:40 -070055#define DRV_VERSION "1.19"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070056#define PFX DRV_NAME " "
57
58/*
59 * The Yukon II chipset takes 64 bit command blocks (called list elements)
60 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070061 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070062 */
63
Stephen Hemminger14d02632006-09-26 11:57:43 -070064#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070065#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070066#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080067#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemminger82788c72006-01-17 13:43:10 -080068#define RX_SKB_ALIGN 8
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070069
Stephen Hemminger793b8832005-09-14 16:06:14 -070070#define TX_RING_SIZE 512
71#define TX_DEF_PENDING (TX_RING_SIZE - 1)
72#define TX_MIN_PENDING 64
Stephen Hemmingerb19666d2006-03-07 11:06:36 -080073#define MAX_SKB_TX_LE (4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS)
Stephen Hemminger793b8832005-09-14 16:06:14 -070074
75#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070076#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070077#define TX_WATCHDOG (5 * HZ)
78#define NAPI_WEIGHT 64
79#define PHY_RETRIES 1000
80
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070081#define SKY2_EEPROM_MAGIC 0x9955aabb
82
83
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070084#define RING_NEXT(x,s) (((x)+1) & ((s)-1))
85
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070086static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070087 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
88 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080089 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070090
Stephen Hemminger793b8832005-09-14 16:06:14 -070091static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070092module_param(debug, int, 0);
93MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
94
Stephen Hemminger14d02632006-09-26 11:57:43 -070095static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080096module_param(copybreak, int, 0);
97MODULE_PARM_DESC(copybreak, "Receive copy threshold");
98
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080099static int disable_msi = 0;
100module_param(disable_msi, int, 0);
101MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
102
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700103static const struct pci_device_id sky2_id_table[] = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
105 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700107 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800108 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800109 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700137 { 0 }
138};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700139
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700140MODULE_DEVICE_TABLE(pci, sky2_id_table);
141
142/* Avoid conditionals by using array */
143static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
144static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700145static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700146
Stephen Hemminger92f965e2005-12-09 11:34:53 -0800147/* This driver supports yukon2 chipset only */
148static const char *yukon2_name[] = {
149 "XL", /* 0xb3 */
150 "EC Ultra", /* 0xb4 */
Stephen Hemminger93745492007-02-06 10:45:43 -0800151 "Extreme", /* 0xb5 */
Stephen Hemminger92f965e2005-12-09 11:34:53 -0800152 "EC", /* 0xb6 */
153 "FE", /* 0xb7 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700154 "FE+", /* 0xb8 */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700155};
156
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100157static void sky2_set_multicast(struct net_device *dev);
158
Stephen Hemminger793b8832005-09-14 16:06:14 -0700159/* Access to external PHY */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800160static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700161{
162 int i;
163
164 gma_write16(hw, port, GM_SMI_DATA, val);
165 gma_write16(hw, port, GM_SMI_CTRL,
166 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
167
168 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700169 if (!(gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800170 return 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700171 udelay(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700172 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800173
Stephen Hemminger793b8832005-09-14 16:06:14 -0700174 printk(KERN_WARNING PFX "%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800175 return -ETIMEDOUT;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700176}
177
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800178static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700179{
180 int i;
181
Stephen Hemminger793b8832005-09-14 16:06:14 -0700182 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700183 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
184
185 for (i = 0; i < PHY_RETRIES; i++) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800186 if (gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_RD_VAL) {
187 *val = gma_read16(hw, port, GM_SMI_DATA);
188 return 0;
189 }
190
Stephen Hemminger793b8832005-09-14 16:06:14 -0700191 udelay(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700192 }
193
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800194 return -ETIMEDOUT;
195}
196
197static u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
198{
199 u16 v;
200
201 if (__gm_phy_read(hw, port, reg, &v) != 0)
202 printk(KERN_WARNING PFX "%s: phy read timeout\n", hw->dev[port]->name);
203 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700204}
205
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800206
207static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700208{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800209 /* switch power to VCC (WA for VAUX problem) */
210 sky2_write8(hw, B0_POWER_CTRL,
211 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700212
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800213 /* disable Core Clock Division, */
214 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700215
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800216 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
217 /* enable bits are inverted */
218 sky2_write8(hw, B2_Y2_CLK_GATE,
219 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
220 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
221 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
222 else
223 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700224
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700225 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700226 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700227 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700228
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700229 pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700230
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700231 pci_read_config_dword(pdev, PCI_DEV_REG4, &reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700232 /* set all bits to 0 except bits 15..12 and 8 */
233 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700234 pci_write_config_dword(pdev, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700235
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700236 pci_read_config_dword(pdev, PCI_DEV_REG5, &reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700237 /* set all bits to 0 except bits 28 & 27 */
238 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700239 pci_write_config_dword(pdev, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700240
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700241 pci_write_config_dword(pdev, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700242
243 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
244 reg = sky2_read32(hw, B2_GP_IO);
245 reg |= GLB_GPIO_STAT_RACE_DIS;
246 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700247
248 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700249 }
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800250}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700251
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800252static void sky2_power_aux(struct sky2_hw *hw)
253{
254 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
255 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
256 else
257 /* enable bits are inverted */
258 sky2_write8(hw, B2_Y2_CLK_GATE,
259 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
260 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
261 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
262
263 /* switch power to VAUX */
264 if (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL)
265 sky2_write8(hw, B0_POWER_CTRL,
266 (PC_VAUX_ENA | PC_VCC_ENA |
267 PC_VAUX_ON | PC_VCC_OFF));
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700268}
269
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700270static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700271{
272 u16 reg;
273
274 /* disable all GMAC IRQ's */
275 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
276 /* disable PHY IRQs */
277 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700278
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700279 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
280 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
281 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
282 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
283
284 reg = gma_read16(hw, port, GM_RX_CTRL);
285 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
286 gma_write16(hw, port, GM_RX_CTRL, reg);
287}
288
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700289/* flow control to advertise bits */
290static const u16 copper_fc_adv[] = {
291 [FC_NONE] = 0,
292 [FC_TX] = PHY_M_AN_ASP,
293 [FC_RX] = PHY_M_AN_PC,
294 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
295};
296
297/* flow control to advertise bits when using 1000BaseX */
298static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700299 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700300 [FC_TX] = PHY_M_P_ASYM_MD_X,
301 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700302 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700303};
304
305/* flow control to GMA disable bits */
306static const u16 gm_fc_disable[] = {
307 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
308 [FC_TX] = GM_GPCR_FC_RX_DIS,
309 [FC_RX] = GM_GPCR_FC_TX_DIS,
310 [FC_BOTH] = 0,
311};
312
313
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700314static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
315{
316 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700317 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700318
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700319 if (sky2->autoneg == AUTONEG_ENABLE &&
320 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700321 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
322
323 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700324 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700325 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
326
Stephen Hemminger53419c62007-05-14 12:38:11 -0700327 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700328 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700329 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700330 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
331 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700332 /* set master & slave downshift counter to 1x */
333 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700334
335 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
336 }
337
338 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700339 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700340 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700341 /* enable automatic crossover */
342 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700343
344 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
345 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
346 u16 spec;
347
348 /* Enable Class A driver for FE+ A0 */
349 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
350 spec |= PHY_M_FESC_SEL_CL_A;
351 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
352 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700353 } else {
354 /* disable energy detect */
355 ctrl &= ~PHY_M_PC_EN_DET_MSK;
356
357 /* enable automatic crossover */
358 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
359
Stephen Hemminger53419c62007-05-14 12:38:11 -0700360 /* downshift on PHY 88E1112 and 88E1149 is changed */
Stephen Hemminger93745492007-02-06 10:45:43 -0800361 if (sky2->autoneg == AUTONEG_ENABLE
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700362 && (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700363 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700364 ctrl &= ~PHY_M_PC_DSC_MSK;
365 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
366 }
367 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700368 } else {
369 /* workaround for deviation #4.88 (CRC errors) */
370 /* disable Automatic Crossover */
371
372 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700373 }
374
375 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
376
377 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700378 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700379 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
380
381 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
382 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
383 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
384 ctrl &= ~PHY_M_MAC_MD_MSK;
385 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700386 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
387
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700388 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700389 /* select page 1 to access Fiber registers */
390 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700391
392 /* for SFP-module set SIGDET polarity to low */
393 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
394 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700395 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700396 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700397
398 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700399 }
400
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700401 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700402 ct1000 = 0;
403 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700404 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700405
406 if (sky2->autoneg == AUTONEG_ENABLE) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700407 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700408 if (sky2->advertising & ADVERTISED_1000baseT_Full)
409 ct1000 |= PHY_M_1000C_AFD;
410 if (sky2->advertising & ADVERTISED_1000baseT_Half)
411 ct1000 |= PHY_M_1000C_AHD;
412 if (sky2->advertising & ADVERTISED_100baseT_Full)
413 adv |= PHY_M_AN_100_FD;
414 if (sky2->advertising & ADVERTISED_100baseT_Half)
415 adv |= PHY_M_AN_100_HD;
416 if (sky2->advertising & ADVERTISED_10baseT_Full)
417 adv |= PHY_M_AN_10_FD;
418 if (sky2->advertising & ADVERTISED_10baseT_Half)
419 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700420
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700421 adv |= copper_fc_adv[sky2->flow_mode];
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700422 } else { /* special defines for FIBER (88E1040S only) */
423 if (sky2->advertising & ADVERTISED_1000baseT_Full)
424 adv |= PHY_M_AN_1000X_AFD;
425 if (sky2->advertising & ADVERTISED_1000baseT_Half)
426 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700427
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700428 adv |= fiber_fc_adv[sky2->flow_mode];
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700429 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700430
431 /* Restart Auto-negotiation */
432 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
433 } else {
434 /* forced speed/duplex settings */
435 ct1000 = PHY_M_1000C_MSE;
436
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700437 /* Disable auto update for duplex flow control and speed */
438 reg |= GM_GPCR_AU_ALL_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700439
440 switch (sky2->speed) {
441 case SPEED_1000:
442 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700443 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700444 break;
445 case SPEED_100:
446 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700447 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700448 break;
449 }
450
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700451 if (sky2->duplex == DUPLEX_FULL) {
452 reg |= GM_GPCR_DUP_FULL;
453 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700454 } else if (sky2->speed < SPEED_1000)
455 sky2->flow_mode = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700456
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700457
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700458 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700459
460 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700461 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700462 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
463 else
464 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700465 }
466
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700467 gma_write16(hw, port, GM_GP_CTRL, reg);
468
Stephen Hemminger05745c42007-09-19 15:36:45 -0700469 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700470 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
471
472 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
473 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
474
475 /* Setup Phy LED's */
476 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
477 ledover = 0;
478
479 switch (hw->chip_id) {
480 case CHIP_ID_YUKON_FE:
481 /* on 88E3082 these bits are at 11..9 (shifted left) */
482 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
483
484 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
485
486 /* delete ACT LED control bits */
487 ctrl &= ~PHY_M_FELP_LED1_MSK;
488 /* change ACT LED control to blink mode */
489 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
490 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
491 break;
492
Stephen Hemminger05745c42007-09-19 15:36:45 -0700493 case CHIP_ID_YUKON_FE_P:
494 /* Enable Link Partner Next Page */
495 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
496 ctrl |= PHY_M_PC_ENA_LIP_NP;
497
498 /* disable Energy Detect and enable scrambler */
499 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
500 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
501
502 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
503 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
504 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
505 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
506
507 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
508 break;
509
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700510 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700511 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700512
513 /* select page 3 to access LED control register */
514 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
515
516 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700517 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
518 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
519 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
520 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
521 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700522
523 /* set Polarity Control register */
524 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700525 (PHY_M_POLC_LS1_P_MIX(4) |
526 PHY_M_POLC_IS0_P_MIX(4) |
527 PHY_M_POLC_LOS_CTRL(2) |
528 PHY_M_POLC_INIT_CTRL(2) |
529 PHY_M_POLC_STA1_CTRL(2) |
530 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700531
532 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700533 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700534 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800535
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700536 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800537 case CHIP_ID_YUKON_EX:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700538 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
539
540 /* select page 3 to access LED control register */
541 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
542
543 /* set LED Function Control register */
544 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
545 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
546 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
547 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
548 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
549
550 /* set Blink Rate in LED Timer Control Register */
551 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
552 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
553 /* restore page register */
554 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
555 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700556
557 default:
558 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
559 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
560 /* turn off the Rx LED (LED_RX) */
Stephen Hemminger0efdf262006-12-05 12:03:41 -0800561 ledover &= ~PHY_M_LED_MO_RX;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700562 }
563
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700564 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
565 hw->chip_rev == CHIP_REV_YU_EC_U_A1) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800566 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700567 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
568
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800569 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700570 gm_phy_write(hw, port, 0x18, 0xaa99);
571 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700572
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800573 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700574 gm_phy_write(hw, port, 0x18, 0xa204);
575 gm_phy_write(hw, port, 0x17, 0x2002);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800576
577 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700578 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700579 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
580 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
581 /* apply workaround for integrated resistors calibration */
582 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
583 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemminger93745492007-02-06 10:45:43 -0800584 } else if (hw->chip_id != CHIP_ID_YUKON_EX) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700585 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800586 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
587
588 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
589 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemminger0efdf262006-12-05 12:03:41 -0800590 ledover |= PHY_M_LED_MO_100;
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800591 }
592
593 if (ledover)
594 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
595
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700596 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700597
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700598 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700599 if (sky2->autoneg == AUTONEG_ENABLE)
600 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
601 else
602 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
603}
604
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700605static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
606{
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700607 struct pci_dev *pdev = hw->pdev;
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700608 u32 reg1;
Stephen Hemmingerff351642007-10-11 19:47:44 -0700609 static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
610 static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700611
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700612 pci_read_config_dword(pdev, PCI_DEV_REG1, &reg1);
Stephen Hemmingerff351642007-10-11 19:47:44 -0700613 /* Turn on/off phy power saving */
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700614 if (onoff)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700615 reg1 &= ~phy_power[port];
616 else
617 reg1 |= phy_power[port];
618
Stephen Hemmingerff351642007-10-11 19:47:44 -0700619 if (onoff && hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
620 reg1 |= coma_mode[port];
621
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700622 pci_write_config_dword(pdev, PCI_DEV_REG1, reg1);
623 pci_read_config_dword(pdev, PCI_DEV_REG1, &reg1);
624
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700625 udelay(100);
626}
627
Stephen Hemminger1b537562005-12-20 15:08:07 -0800628/* Force a renegotiation */
629static void sky2_phy_reinit(struct sky2_port *sky2)
630{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800631 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800632 sky2_phy_init(sky2->hw, sky2->port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800633 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800634}
635
Stephen Hemmingere3173832007-02-06 10:45:39 -0800636/* Put device in state to listen for Wake On Lan */
637static void sky2_wol_init(struct sky2_port *sky2)
638{
639 struct sky2_hw *hw = sky2->hw;
640 unsigned port = sky2->port;
641 enum flow_control save_mode;
642 u16 ctrl;
643 u32 reg1;
644
645 /* Bring hardware out of reset */
646 sky2_write16(hw, B0_CTST, CS_RST_CLR);
647 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
648
649 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
650 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
651
652 /* Force to 10/100
653 * sky2_reset will re-enable on resume
654 */
655 save_mode = sky2->flow_mode;
656 ctrl = sky2->advertising;
657
658 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
659 sky2->flow_mode = FC_NONE;
660 sky2_phy_power(hw, port, 1);
661 sky2_phy_reinit(sky2);
662
663 sky2->flow_mode = save_mode;
664 sky2->advertising = ctrl;
665
666 /* Set GMAC to no flow control and auto update for speed/duplex */
667 gma_write16(hw, port, GM_GP_CTRL,
668 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
669 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
670
671 /* Set WOL address */
672 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
673 sky2->netdev->dev_addr, ETH_ALEN);
674
675 /* Turn on appropriate WOL control bits */
676 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
677 ctrl = 0;
678 if (sky2->wol & WAKE_PHY)
679 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
680 else
681 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
682
683 if (sky2->wol & WAKE_MAGIC)
684 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
685 else
686 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;;
687
688 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
689 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
690
691 /* Turn on legacy PCI-Express PME mode */
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700692 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800693 reg1 |= PCI_Y2_PME_LEGACY;
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700694 pci_write_config_dword(hw->pdev, PCI_DEV_REG1, reg1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800695
696 /* block receiver */
697 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
698
699}
700
Stephen Hemminger69161612007-06-04 17:23:26 -0700701static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
702{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700703 struct net_device *dev = hw->dev[port];
704
705 if (dev->mtu <= ETH_DATA_LEN)
Stephen Hemminger69161612007-06-04 17:23:26 -0700706 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
Stephen Hemminger05745c42007-09-19 15:36:45 -0700707 TX_JUMBO_DIS | TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700708
Stephen Hemminger05745c42007-09-19 15:36:45 -0700709 else if (hw->chip_id != CHIP_ID_YUKON_EC_U)
710 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
711 TX_STFW_ENA | TX_JUMBO_ENA);
712 else {
713 /* set Tx GMAC FIFO Almost Empty Threshold */
714 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
715 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger69161612007-06-04 17:23:26 -0700716
Stephen Hemminger05745c42007-09-19 15:36:45 -0700717 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
718 TX_JUMBO_ENA | TX_STFW_DIS);
719
720 /* Can't do offload because of lack of store/forward */
721 dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | NETIF_F_ALL_CSUM);
Stephen Hemminger69161612007-06-04 17:23:26 -0700722 }
723}
724
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700725static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
726{
727 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
728 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100729 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700730 int i;
731 const u8 *addr = hw->dev[port]->dev_addr;
732
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700733 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
734 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700735
736 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
737
Stephen Hemminger793b8832005-09-14 16:06:14 -0700738 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700739 /* WA DEV_472 -- looks like crossed wires on port 2 */
740 /* clear GMAC 1 Control reset */
741 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
742 do {
743 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
744 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
745 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
746 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
747 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
748 }
749
Stephen Hemminger793b8832005-09-14 16:06:14 -0700750 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700751
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700752 /* Enable Transmit FIFO Underrun */
753 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
754
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800755 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700756 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800757 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700758
759 /* MIB clear */
760 reg = gma_read16(hw, port, GM_PHY_ADDR);
761 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
762
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700763 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
764 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700765 gma_write16(hw, port, GM_PHY_ADDR, reg);
766
767 /* transmit control */
768 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
769
770 /* receive control reg: unicast + multicast + no FCS */
771 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700772 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700773
774 /* transmit flow control */
775 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
776
777 /* transmit parameter */
778 gma_write16(hw, port, GM_TX_PARAM,
779 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
780 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
781 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
782 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
783
784 /* serial mode register */
785 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700786 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700787
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700788 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700789 reg |= GM_SMOD_JUMBO_ENA;
790
791 gma_write16(hw, port, GM_SERIAL_MODE, reg);
792
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700793 /* virtual address for data */
794 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
795
Stephen Hemminger793b8832005-09-14 16:06:14 -0700796 /* physical address: used for pause frames */
797 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
798
799 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700800 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
801 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
802 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
803
804 /* Configure Rx MAC FIFO */
805 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100806 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700807 if (hw->chip_id == CHIP_ID_YUKON_EX ||
808 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100809 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700810
Al Viro25cccec2007-07-20 16:07:33 +0100811 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700812
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700813 /* Flush Rx MAC FIFO on any flow control or error */
shemminger@osdl.org42eeea02005-11-30 11:45:13 -0800814 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700815
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800816 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700817 reg = RX_GMF_FL_THR_DEF + 1;
818 /* Another magic mystery workaround from sk98lin */
819 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
820 hw->chip_rev == CHIP_REV_YU_FE2_A0)
821 reg = 0x178;
822 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700823
824 /* Configure Tx MAC FIFO */
825 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
826 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800827
Stephen Hemmingere0c28112007-09-20 13:03:49 -0700828 /* On chips without ram buffer, pause is controled by MAC level */
829 if (sky2_read8(hw, B2_E_0) == 0) {
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800830 sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800831 sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -0700832
Stephen Hemminger69161612007-06-04 17:23:26 -0700833 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800834 }
835
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700836}
837
Stephen Hemminger67712902006-12-04 15:53:45 -0800838/* Assign Ram Buffer allocation to queue */
839static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700840{
Stephen Hemminger67712902006-12-04 15:53:45 -0800841 u32 end;
842
843 /* convert from K bytes to qwords used for hw register */
844 start *= 1024/8;
845 space *= 1024/8;
846 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700847
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700848 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
849 sky2_write32(hw, RB_ADDR(q, RB_START), start);
850 sky2_write32(hw, RB_ADDR(q, RB_END), end);
851 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
852 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
853
854 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800855 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700856
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800857 /* On receive queue's set the thresholds
858 * give receiver priority when > 3/4 full
859 * send pause when down to 2K
860 */
861 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
862 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700863
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800864 tp = space - 2048/8;
865 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
866 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700867 } else {
868 /* Enable store & forward on Tx queue's because
869 * Tx FIFO is only 1K on Yukon
870 */
871 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
872 }
873
874 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700875 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700876}
877
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700878/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800879static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700880{
881 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
882 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
883 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800884 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700885}
886
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700887/* Setup prefetch unit registers. This is the interface between
888 * hardware and driver list elements
889 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -0800890static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700891 u64 addr, u32 last)
892{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700893 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
894 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
895 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), addr >> 32);
896 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), (u32) addr);
897 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
898 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700899
900 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700901}
902
Stephen Hemminger793b8832005-09-14 16:06:14 -0700903static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
904{
905 struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod;
906
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700907 sky2->tx_prod = RING_NEXT(sky2->tx_prod, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700908 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700909 return le;
910}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700911
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -0700912static void tx_init(struct sky2_port *sky2)
913{
914 struct sky2_tx_le *le;
915
916 sky2->tx_prod = sky2->tx_cons = 0;
917 sky2->tx_tcpsum = 0;
918 sky2->tx_last_mss = 0;
919
920 le = get_tx_le(sky2);
921 le->addr = 0;
922 le->opcode = OP_ADDR64 | HW_OWNER;
923 sky2->tx_addr64 = 0;
924}
925
Stephen Hemminger291ea612006-09-26 11:57:41 -0700926static inline struct tx_ring_info *tx_le_re(struct sky2_port *sky2,
927 struct sky2_tx_le *le)
928{
929 return sky2->tx_ring + (le - sky2->tx_le);
930}
931
Stephen Hemminger290d4de2006-03-20 15:48:15 -0800932/* Update chip's next pointer */
933static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700934{
Stephen Hemminger50432cb2007-05-14 12:38:15 -0700935 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -0800936 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -0700937 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
938
939 /* Synchronize I/O on since next processor may write to tail */
940 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700941}
942
Stephen Hemminger793b8832005-09-14 16:06:14 -0700943
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700944static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
945{
946 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700947 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700948 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700949 return le;
950}
951
Stephen Hemminger14d02632006-09-26 11:57:43 -0700952/* Build description to hardware for one receive segment */
953static void sky2_rx_add(struct sky2_port *sky2, u8 op,
954 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700955{
956 struct sky2_rx_le *le;
Stephen Hemminger36eb0c72007-07-09 15:33:42 -0700957 u32 hi = upper_32_bits(map);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700958
Stephen Hemminger793b8832005-09-14 16:06:14 -0700959 if (sky2->rx_addr64 != hi) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700960 le = sky2_next_rx(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700961 le->addr = cpu_to_le32(hi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700962 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger36eb0c72007-07-09 15:33:42 -0700963 sky2->rx_addr64 = upper_32_bits(map + len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700964 }
Stephen Hemminger793b8832005-09-14 16:06:14 -0700965
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700966 le = sky2_next_rx(sky2);
Stephen Hemminger734d1862005-12-09 11:35:00 -0800967 le->addr = cpu_to_le32((u32) map);
968 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -0700969 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700970}
971
Stephen Hemminger14d02632006-09-26 11:57:43 -0700972/* Build description to hardware for one possibly fragmented skb */
973static void sky2_rx_submit(struct sky2_port *sky2,
974 const struct rx_ring_info *re)
975{
976 int i;
977
978 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
979
980 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
981 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
982}
983
984
985static void sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
986 unsigned size)
987{
988 struct sk_buff *skb = re->skb;
989 int i;
990
991 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
992 pci_unmap_len_set(re, data_size, size);
993
994 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
995 re->frag_addr[i] = pci_map_page(pdev,
996 skb_shinfo(skb)->frags[i].page,
997 skb_shinfo(skb)->frags[i].page_offset,
998 skb_shinfo(skb)->frags[i].size,
999 PCI_DMA_FROMDEVICE);
1000}
1001
1002static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1003{
1004 struct sk_buff *skb = re->skb;
1005 int i;
1006
1007 pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size),
1008 PCI_DMA_FROMDEVICE);
1009
1010 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1011 pci_unmap_page(pdev, re->frag_addr[i],
1012 skb_shinfo(skb)->frags[i].size,
1013 PCI_DMA_FROMDEVICE);
1014}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001015
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001016/* Tell chip where to start receive checksum.
1017 * Actually has two checksums, but set both same to avoid possible byte
1018 * order problems.
1019 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001020static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001021{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001022 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001023
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001024 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1025 le->ctrl = 0;
1026 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001027
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001028 sky2_write32(sky2->hw,
1029 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1030 sky2->rx_csum ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001031}
1032
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001033/*
1034 * The RX Stop command will not work for Yukon-2 if the BMU does not
1035 * reach the end of packet and since we can't make sure that we have
1036 * incoming data, we must reset the BMU while it is not doing a DMA
1037 * transfer. Since it is possible that the RX path is still active,
1038 * the RX RAM buffer will be stopped first, so any possible incoming
1039 * data will not trigger a DMA. After the RAM buffer is stopped, the
1040 * BMU is polled until any DMA in progress is ended and only then it
1041 * will be reset.
1042 */
1043static void sky2_rx_stop(struct sky2_port *sky2)
1044{
1045 struct sky2_hw *hw = sky2->hw;
1046 unsigned rxq = rxqaddr[sky2->port];
1047 int i;
1048
1049 /* disable the RAM Buffer receive queue */
1050 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1051
1052 for (i = 0; i < 0xffff; i++)
1053 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1054 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1055 goto stopped;
1056
1057 printk(KERN_WARNING PFX "%s: receiver stop failed\n",
1058 sky2->netdev->name);
1059stopped:
1060 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1061
1062 /* reset the Rx prefetch unit */
1063 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001064 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001065}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001066
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001067/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001068static void sky2_rx_clean(struct sky2_port *sky2)
1069{
1070 unsigned i;
1071
1072 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001073 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001074 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001075
1076 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001077 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001078 kfree_skb(re->skb);
1079 re->skb = NULL;
1080 }
1081 }
1082}
1083
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001084/* Basic MII support */
1085static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1086{
1087 struct mii_ioctl_data *data = if_mii(ifr);
1088 struct sky2_port *sky2 = netdev_priv(dev);
1089 struct sky2_hw *hw = sky2->hw;
1090 int err = -EOPNOTSUPP;
1091
1092 if (!netif_running(dev))
1093 return -ENODEV; /* Phy still in reset */
1094
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001095 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001096 case SIOCGMIIPHY:
1097 data->phy_id = PHY_ADDR_MARV;
1098
1099 /* fallthru */
1100 case SIOCGMIIREG: {
1101 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001102
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001103 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001104 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001105 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001106
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001107 data->val_out = val;
1108 break;
1109 }
1110
1111 case SIOCSMIIREG:
1112 if (!capable(CAP_NET_ADMIN))
1113 return -EPERM;
1114
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001115 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001116 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1117 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001118 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001119 break;
1120 }
1121 return err;
1122}
1123
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001124#ifdef SKY2_VLAN_TAG_USED
1125static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
1126{
1127 struct sky2_port *sky2 = netdev_priv(dev);
1128 struct sky2_hw *hw = sky2->hw;
1129 u16 port = sky2->port;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001130
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001131 netif_tx_lock_bh(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001132 napi_disable(&hw->napi);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001133
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001134 sky2->vlgrp = grp;
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001135 if (grp) {
1136 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1137 RX_VLAN_STRIP_ON);
1138 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1139 TX_VLAN_TAG_ON);
1140 } else {
1141 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1142 RX_VLAN_STRIP_OFF);
1143 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1144 TX_VLAN_TAG_OFF);
1145 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001146
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001147 napi_enable(&hw->napi);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001148 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001149}
1150#endif
1151
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001152/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001153 * Allocate an skb for receiving. If the MTU is large enough
1154 * make the skb non-linear with a fragment list of pages.
1155 *
Stephen Hemminger82788c72006-01-17 13:43:10 -08001156 * It appears the hardware has a bug in the FIFO logic that
1157 * cause it to hang if the FIFO gets overrun and the receive buffer
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07001158 * is not 64 byte aligned. The buffer returned from netdev_alloc_skb is
1159 * aligned except if slab debugging is enabled.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001160 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001161static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001162{
1163 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001164 unsigned long p;
1165 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001166
Stephen Hemminger14d02632006-09-26 11:57:43 -07001167 skb = netdev_alloc_skb(sky2->netdev, sky2->rx_data_size + RX_SKB_ALIGN);
1168 if (!skb)
1169 goto nomem;
1170
1171 p = (unsigned long) skb->data;
1172 skb_reserve(skb, ALIGN(p, RX_SKB_ALIGN) - p);
1173
1174 for (i = 0; i < sky2->rx_nfrags; i++) {
1175 struct page *page = alloc_page(GFP_ATOMIC);
1176
1177 if (!page)
1178 goto free_partial;
1179 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001180 }
1181
1182 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001183free_partial:
1184 kfree_skb(skb);
1185nomem:
1186 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001187}
1188
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001189static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1190{
1191 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1192}
1193
Stephen Hemminger82788c72006-01-17 13:43:10 -08001194/*
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001195 * Allocate and setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001196 * Normal case this ends up creating one list element for skb
1197 * in the receive ring. Worst case if using large MTU and each
1198 * allocation falls on a different 64 bit region, that results
1199 * in 6 list elements per ring entry.
1200 * One element is used for checksum enable/disable, and one
1201 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001202 */
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001203static int sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001204{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001205 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001206 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001207 unsigned rxq = rxqaddr[sky2->port];
Stephen Hemminger14d02632006-09-26 11:57:43 -07001208 unsigned i, size, space, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001209
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001210 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001211 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001212
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001213 /* On PCI express lowering the watermark gives better performance */
1214 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1215 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1216
1217 /* These chips have no ram buffer?
1218 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001219 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001220 (hw->chip_rev == CHIP_REV_YU_EC_U_A1
1221 || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001222 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001223
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001224 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1225
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001226 if (!(hw->flags & SKY2_HW_NEW_LE))
1227 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001228
Stephen Hemminger14d02632006-09-26 11:57:43 -07001229 /* Space needed for frame data + headers rounded up */
Stephen Hemmingerf957da22007-07-09 15:33:41 -07001230 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001231
1232 /* Stopping point for hardware truncation */
1233 thresh = (size - 8) / sizeof(u32);
1234
1235 /* Account for overhead of skb - to avoid order > 0 allocation */
1236 space = SKB_DATA_ALIGN(size) + NET_SKB_PAD
1237 + sizeof(struct skb_shared_info);
1238
1239 sky2->rx_nfrags = space >> PAGE_SHIFT;
1240 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1241
1242 if (sky2->rx_nfrags != 0) {
1243 /* Compute residue after pages */
1244 space = sky2->rx_nfrags << PAGE_SHIFT;
1245
1246 if (space < size)
1247 size -= space;
1248 else
1249 size = 0;
1250
1251 /* Optimize to handle small packets and headers */
1252 if (size < copybreak)
1253 size = copybreak;
1254 if (size < ETH_HLEN)
1255 size = ETH_HLEN;
1256 }
1257 sky2->rx_data_size = size;
1258
1259 /* Fill Rx ring */
1260 for (i = 0; i < sky2->rx_pending; i++) {
1261 re = sky2->rx_ring + i;
1262
1263 re->skb = sky2_rx_alloc(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001264 if (!re->skb)
1265 goto nomem;
1266
Stephen Hemminger14d02632006-09-26 11:57:43 -07001267 sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size);
1268 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001269 }
1270
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001271 /*
1272 * The receiver hangs if it receives frames larger than the
1273 * packet buffer. As a workaround, truncate oversize frames, but
1274 * the register is limited to 9 bits, so if you do frames > 2052
1275 * you better get the MTU right!
1276 */
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001277 if (thresh > 0x1ff)
1278 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1279 else {
1280 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1281 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1282 }
1283
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001284 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001285 sky2_rx_update(sky2, rxq);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001286 return 0;
1287nomem:
1288 sky2_rx_clean(sky2);
1289 return -ENOMEM;
1290}
1291
1292/* Bring up network interface. */
1293static int sky2_up(struct net_device *dev)
1294{
1295 struct sky2_port *sky2 = netdev_priv(dev);
1296 struct sky2_hw *hw = sky2->hw;
1297 unsigned port = sky2->port;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001298 u32 imask, ramsize;
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001299 int cap, err = -ENOMEM;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001300 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001301
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001302 /*
1303 * On dual port PCI-X card, there is an problem where status
1304 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001305 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001306 if (otherdev && netif_running(otherdev) &&
1307 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
1308 struct sky2_port *osky2 = netdev_priv(otherdev);
1309 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001310
Stephen Hemminger167f53d2007-09-25 19:01:02 -07001311 pci_read_config_word(hw->pdev, cap + PCI_X_CMD, &cmd);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001312 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemminger167f53d2007-09-25 19:01:02 -07001313 pci_write_config_word(hw->pdev, cap + PCI_X_CMD, cmd);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001314
1315 sky2->rx_csum = 0;
1316 osky2->rx_csum = 0;
1317 }
1318
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001319 if (netif_msg_ifup(sky2))
1320 printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
1321
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001322 netif_carrier_off(dev);
1323
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001324 /* must be power of 2 */
1325 sky2->tx_le = pci_alloc_consistent(hw->pdev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07001326 TX_RING_SIZE *
1327 sizeof(struct sky2_tx_le),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001328 &sky2->tx_le_map);
1329 if (!sky2->tx_le)
1330 goto err_out;
1331
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001332 sky2->tx_ring = kcalloc(TX_RING_SIZE, sizeof(struct tx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001333 GFP_KERNEL);
1334 if (!sky2->tx_ring)
1335 goto err_out;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001336
1337 tx_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001338
1339 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1340 &sky2->rx_le_map);
1341 if (!sky2->rx_le)
1342 goto err_out;
1343 memset(sky2->rx_le, 0, RX_LE_BYTES);
1344
Stephen Hemminger291ea612006-09-26 11:57:41 -07001345 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001346 GFP_KERNEL);
1347 if (!sky2->rx_ring)
1348 goto err_out;
1349
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001350 sky2_phy_power(hw, port, 1);
1351
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001352 sky2_mac_init(hw, port);
1353
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001354 /* Register is number of 4K blocks on internal RAM buffer. */
1355 ramsize = sky2_read8(hw, B2_E_0) * 4;
1356 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001357 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001358
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001359 pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001360 if (ramsize < 16)
1361 rxspace = ramsize / 2;
1362 else
1363 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001364
Stephen Hemminger67712902006-12-04 15:53:45 -08001365 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1366 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1367
1368 /* Make sure SyncQ is disabled */
1369 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1370 RB_RST_SET);
1371 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001372
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001373 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001374
Stephen Hemminger69161612007-06-04 17:23:26 -07001375 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1376 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1377 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1378
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001379 /* Set almost empty threshold */
Stephen Hemmingerc2716fb2006-09-26 11:57:39 -07001380 if (hw->chip_id == CHIP_ID_YUKON_EC_U
1381 && hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001382 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001383
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001384 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1385 TX_RING_SIZE - 1);
1386
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001387 napi_enable(&hw->napi);
1388
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001389 err = sky2_rx_start(sky2);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001390 if (err) {
1391 napi_disable(&hw->napi);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001392 goto err_out;
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001393 }
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001394
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001395 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001396 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001397 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001398 sky2_write32(hw, B0_IMSK, imask);
1399
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001400 return 0;
1401
1402err_out:
Stephen Hemminger1b537562005-12-20 15:08:07 -08001403 if (sky2->rx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001404 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1405 sky2->rx_le, sky2->rx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001406 sky2->rx_le = NULL;
1407 }
1408 if (sky2->tx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001409 pci_free_consistent(hw->pdev,
1410 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1411 sky2->tx_le, sky2->tx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001412 sky2->tx_le = NULL;
1413 }
1414 kfree(sky2->tx_ring);
1415 kfree(sky2->rx_ring);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001416
Stephen Hemminger1b537562005-12-20 15:08:07 -08001417 sky2->tx_ring = NULL;
1418 sky2->rx_ring = NULL;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001419 return err;
1420}
1421
Stephen Hemminger793b8832005-09-14 16:06:14 -07001422/* Modular subtraction in ring */
1423static inline int tx_dist(unsigned tail, unsigned head)
1424{
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001425 return (head - tail) & (TX_RING_SIZE - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001426}
1427
1428/* Number of list elements available for next tx */
1429static inline int tx_avail(const struct sky2_port *sky2)
1430{
1431 return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod);
1432}
1433
1434/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001435static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001436{
1437 unsigned count;
1438
1439 count = sizeof(dma_addr_t) / sizeof(u32);
1440 count += skb_shinfo(skb)->nr_frags * count;
1441
Herbert Xu89114af2006-07-08 13:34:32 -07001442 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001443 ++count;
1444
Patrick McHardy84fa7932006-08-29 16:44:56 -07001445 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001446 ++count;
1447
1448 return count;
1449}
1450
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001451/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001452 * Put one packet in ring for transmit.
1453 * A single packet can generate multiple list elements, and
1454 * the number of ring elements will probably be less than the number
1455 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001456 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001457static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1458{
1459 struct sky2_port *sky2 = netdev_priv(dev);
1460 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001461 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001462 struct tx_ring_info *re;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001463 unsigned i, len;
1464 dma_addr_t mapping;
1465 u32 addr64;
1466 u16 mss;
1467 u8 ctrl;
1468
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001469 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1470 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001471
Stephen Hemminger793b8832005-09-14 16:06:14 -07001472 if (unlikely(netif_msg_tx_queued(sky2)))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001473 printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n",
1474 dev->name, sky2->tx_prod, skb->len);
1475
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001476 len = skb_headlen(skb);
1477 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger36eb0c72007-07-09 15:33:42 -07001478 addr64 = upper_32_bits(mapping);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001479
shemminger@osdl.orga018e332005-11-30 11:45:16 -08001480 /* Send high bits if changed or crosses boundary */
Stephen Hemminger36eb0c72007-07-09 15:33:42 -07001481 if (addr64 != sky2->tx_addr64 ||
1482 upper_32_bits(mapping + len) != sky2->tx_addr64) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001483 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001484 le->addr = cpu_to_le32(addr64);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001485 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger36eb0c72007-07-09 15:33:42 -07001486 sky2->tx_addr64 = upper_32_bits(mapping + len);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001487 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001488
1489 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001490 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001491 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001492
1493 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001494 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001495
Stephen Hemminger69161612007-06-04 17:23:26 -07001496 if (mss != sky2->tx_last_mss) {
1497 le = get_tx_le(sky2);
1498 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001499
1500 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001501 le->opcode = OP_MSS | HW_OWNER;
1502 else
1503 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001504 sky2->tx_last_mss = mss;
1505 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001506 }
1507
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001508 ctrl = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001509#ifdef SKY2_VLAN_TAG_USED
1510 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
1511 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
1512 if (!le) {
1513 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001514 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001515 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001516 } else
1517 le->opcode |= OP_VLAN;
1518 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1519 ctrl |= INS_VLAN;
1520 }
1521#endif
1522
1523 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001524 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001525 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001526 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001527 ctrl |= CALSUM; /* auto checksum */
1528 else {
1529 const unsigned offset = skb_transport_offset(skb);
1530 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001531
Stephen Hemminger69161612007-06-04 17:23:26 -07001532 tcpsum = offset << 16; /* sum start */
1533 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001534
Stephen Hemminger69161612007-06-04 17:23:26 -07001535 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1536 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1537 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001538
Stephen Hemminger69161612007-06-04 17:23:26 -07001539 if (tcpsum != sky2->tx_tcpsum) {
1540 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001541
Stephen Hemminger69161612007-06-04 17:23:26 -07001542 le = get_tx_le(sky2);
1543 le->addr = cpu_to_le32(tcpsum);
1544 le->length = 0; /* initial checksum value */
1545 le->ctrl = 1; /* one packet */
1546 le->opcode = OP_TCPLISW | HW_OWNER;
1547 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001548 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001549 }
1550
1551 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001552 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001553 le->length = cpu_to_le16(len);
1554 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001555 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001556
Stephen Hemminger291ea612006-09-26 11:57:41 -07001557 re = tx_le_re(sky2, le);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001558 re->skb = skb;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001559 pci_unmap_addr_set(re, mapaddr, mapping);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001560 pci_unmap_len_set(re, maplen, len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001561
1562 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001563 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001564
1565 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1566 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger36eb0c72007-07-09 15:33:42 -07001567 addr64 = upper_32_bits(mapping);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001568 if (addr64 != sky2->tx_addr64) {
1569 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001570 le->addr = cpu_to_le32(addr64);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001571 le->ctrl = 0;
1572 le->opcode = OP_ADDR64 | HW_OWNER;
1573 sky2->tx_addr64 = addr64;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001574 }
1575
1576 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001577 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001578 le->length = cpu_to_le16(frag->size);
1579 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001580 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001581
Stephen Hemminger291ea612006-09-26 11:57:41 -07001582 re = tx_le_re(sky2, le);
1583 re->skb = skb;
1584 pci_unmap_addr_set(re, mapaddr, mapping);
1585 pci_unmap_len_set(re, maplen, frag->size);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001586 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001587
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001588 le->ctrl |= EOP;
1589
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001590 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1591 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001592
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001593 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001594
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001595 dev->trans_start = jiffies;
1596 return NETDEV_TX_OK;
1597}
1598
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001599/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001600 * Free ring elements from starting at tx_cons until "done"
1601 *
1602 * NB: the hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001603 * buffers so make sure not to free skb to early.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001604 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001605static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001606{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001607 struct net_device *dev = sky2->netdev;
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001608 struct pci_dev *pdev = sky2->hw->pdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001609 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001610
Stephen Hemminger0e3ff6a2005-12-09 11:35:02 -08001611 BUG_ON(done >= TX_RING_SIZE);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001612
Stephen Hemminger291ea612006-09-26 11:57:41 -07001613 for (idx = sky2->tx_cons; idx != done;
1614 idx = RING_NEXT(idx, TX_RING_SIZE)) {
1615 struct sky2_tx_le *le = sky2->tx_le + idx;
1616 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001617
Stephen Hemminger291ea612006-09-26 11:57:41 -07001618 switch(le->opcode & ~HW_OWNER) {
1619 case OP_LARGESEND:
1620 case OP_PACKET:
1621 pci_unmap_single(pdev,
1622 pci_unmap_addr(re, mapaddr),
1623 pci_unmap_len(re, maplen),
1624 PCI_DMA_TODEVICE);
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001625 break;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001626 case OP_BUFFER:
1627 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
1628 pci_unmap_len(re, maplen),
Stephen Hemminger734d1862005-12-09 11:35:00 -08001629 PCI_DMA_TODEVICE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001630 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001631 }
1632
Stephen Hemminger291ea612006-09-26 11:57:41 -07001633 if (le->ctrl & EOP) {
1634 if (unlikely(netif_msg_tx_done(sky2)))
1635 printk(KERN_DEBUG "%s: tx done %u\n",
1636 dev->name, idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001637
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07001638 dev->stats.tx_packets++;
1639 dev->stats.tx_bytes += re->skb->len;
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001640
Stephen Hemminger794b2bd2006-12-01 14:29:36 -08001641 dev_kfree_skb_any(re->skb);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001642 sky2->tx_next = RING_NEXT(idx, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001643 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001644 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001645
Stephen Hemminger291ea612006-09-26 11:57:41 -07001646 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001647 smp_mb();
1648
Stephen Hemminger22e11702006-07-12 15:23:48 -07001649 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001650 netif_wake_queue(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001651}
1652
1653/* Cleanup all untransmitted buffers, assume transmitter not running */
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001654static void sky2_tx_clean(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001655{
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001656 struct sky2_port *sky2 = netdev_priv(dev);
1657
1658 netif_tx_lock_bh(dev);
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001659 sky2_tx_complete(sky2, sky2->tx_prod);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001660 netif_tx_unlock_bh(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001661}
1662
1663/* Network shutdown */
1664static int sky2_down(struct net_device *dev)
1665{
1666 struct sky2_port *sky2 = netdev_priv(dev);
1667 struct sky2_hw *hw = sky2->hw;
1668 unsigned port = sky2->port;
1669 u16 ctrl;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001670 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001671
Stephen Hemminger1b537562005-12-20 15:08:07 -08001672 /* Never really got started! */
1673 if (!sky2->tx_le)
1674 return 0;
1675
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001676 if (netif_msg_ifdown(sky2))
1677 printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
1678
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001679 /* Stop more packets from being queued */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001680 netif_stop_queue(dev);
1681
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001682 napi_disable(&hw->napi);
1683
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001684 /* Disable port IRQ */
1685 imask = sky2_read32(hw, B0_IMSK);
1686 imask &= ~portirq_msk[port];
1687 sky2_write32(hw, B0_IMSK, imask);
1688
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001689 sky2_gmac_reset(hw, port);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001690
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001691 /* Stop transmitter */
1692 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1693 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1694
1695 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001696 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001697
1698 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001699 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001700 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1701
1702 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1703
1704 /* Workaround shared GMAC reset */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001705 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0
1706 && port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001707 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1708
1709 /* Disable Force Sync bit and Enable Alloc bit */
1710 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1711 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1712
1713 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1714 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1715 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1716
1717 /* Reset the PCI FIFO of the async Tx queue */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001718 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1719 BMU_RST_SET | BMU_FIFO_RST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001720
1721 /* Reset the Tx prefetch units */
1722 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1723 PREF_UNIT_RST_SET);
1724
1725 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1726
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001727 sky2_rx_stop(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001728
1729 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
1730 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1731
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001732 sky2_phy_power(hw, port, 0);
1733
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001734 netif_carrier_off(dev);
1735
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001736 /* turn off LED's */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001737 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
1738
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001739 synchronize_irq(hw->pdev->irq);
1740
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001741 sky2_tx_clean(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001742 sky2_rx_clean(sky2);
1743
1744 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1745 sky2->rx_le, sky2->rx_le_map);
1746 kfree(sky2->rx_ring);
1747
1748 pci_free_consistent(hw->pdev,
1749 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1750 sky2->tx_le, sky2->tx_le_map);
1751 kfree(sky2->tx_ring);
1752
Stephen Hemminger1b537562005-12-20 15:08:07 -08001753 sky2->tx_le = NULL;
1754 sky2->rx_le = NULL;
1755
1756 sky2->rx_ring = NULL;
1757 sky2->tx_ring = NULL;
1758
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001759 return 0;
1760}
1761
1762static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
1763{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001764 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001765 return SPEED_1000;
1766
Stephen Hemminger05745c42007-09-19 15:36:45 -07001767 if (!(hw->flags & SKY2_HW_GIGABIT)) {
1768 if (aux & PHY_M_PS_SPEED_100)
1769 return SPEED_100;
1770 else
1771 return SPEED_10;
1772 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001773
1774 switch (aux & PHY_M_PS_SPEED_MSK) {
1775 case PHY_M_PS_SPEED_1000:
1776 return SPEED_1000;
1777 case PHY_M_PS_SPEED_100:
1778 return SPEED_100;
1779 default:
1780 return SPEED_10;
1781 }
1782}
1783
1784static void sky2_link_up(struct sky2_port *sky2)
1785{
1786 struct sky2_hw *hw = sky2->hw;
1787 unsigned port = sky2->port;
1788 u16 reg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001789 static const char *fc_name[] = {
1790 [FC_NONE] = "none",
1791 [FC_TX] = "tx",
1792 [FC_RX] = "rx",
1793 [FC_BOTH] = "both",
1794 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001795
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001796 /* enable Rx/Tx */
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001797 reg = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001798 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
1799 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001800
1801 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
1802
1803 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001804
Stephen Hemminger75e80682007-09-19 15:36:46 -07001805 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07001806
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001807 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001808 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001809 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
1810
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001811 if (hw->flags & SKY2_HW_NEWER_PHY) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001812 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingered6d32c2006-05-08 15:11:33 -07001813 u16 led = PHY_M_LEDC_LOS_CTRL(1); /* link active */
1814
1815 switch(sky2->speed) {
1816 case SPEED_10:
1817 led |= PHY_M_LEDC_INIT_CTRL(7);
1818 break;
1819
1820 case SPEED_100:
1821 led |= PHY_M_LEDC_STA1_CTRL(7);
1822 break;
1823
1824 case SPEED_1000:
1825 led |= PHY_M_LEDC_STA0_CTRL(7);
1826 break;
1827 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001828
1829 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingered6d32c2006-05-08 15:11:33 -07001830 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, led);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001831 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
1832 }
1833
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001834 if (netif_msg_link(sky2))
1835 printk(KERN_INFO PFX
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001836 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001837 sky2->netdev->name, sky2->speed,
1838 sky2->duplex == DUPLEX_FULL ? "full" : "half",
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001839 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001840}
1841
1842static void sky2_link_down(struct sky2_port *sky2)
1843{
1844 struct sky2_hw *hw = sky2->hw;
1845 unsigned port = sky2->port;
1846 u16 reg;
1847
1848 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
1849
1850 reg = gma_read16(hw, port, GM_GP_CTRL);
1851 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
1852 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001853
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001854 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001855
1856 /* Turn on link LED */
1857 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
1858
1859 if (netif_msg_link(sky2))
1860 printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001861
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001862 sky2_phy_init(hw, port);
1863}
1864
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001865static enum flow_control sky2_flow(int rx, int tx)
1866{
1867 if (rx)
1868 return tx ? FC_BOTH : FC_RX;
1869 else
1870 return tx ? FC_TX : FC_NONE;
1871}
1872
Stephen Hemminger793b8832005-09-14 16:06:14 -07001873static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1874{
1875 struct sky2_hw *hw = sky2->hw;
1876 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001877 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001878
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001879 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001880 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001881 if (lpa & PHY_M_AN_RF) {
1882 printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name);
1883 return -1;
1884 }
1885
Stephen Hemminger793b8832005-09-14 16:06:14 -07001886 if (!(aux & PHY_M_PS_SPDUP_RES)) {
1887 printk(KERN_ERR PFX "%s: speed/duplex mismatch",
1888 sky2->netdev->name);
1889 return -1;
1890 }
1891
Stephen Hemminger793b8832005-09-14 16:06:14 -07001892 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07001893 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001894
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001895 /* Since the pause result bits seem to in different positions on
1896 * different chips. look at registers.
1897 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001898 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001899 /* Shift for bits in fiber PHY */
1900 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
1901 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001902
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001903 if (advert & ADVERTISE_1000XPAUSE)
1904 advert |= ADVERTISE_PAUSE_CAP;
1905 if (advert & ADVERTISE_1000XPSE_ASYM)
1906 advert |= ADVERTISE_PAUSE_ASYM;
1907 if (lpa & LPA_1000XPAUSE)
1908 lpa |= LPA_PAUSE_CAP;
1909 if (lpa & LPA_1000XPAUSE_ASYM)
1910 lpa |= LPA_PAUSE_ASYM;
1911 }
1912
1913 sky2->flow_status = FC_NONE;
1914 if (advert & ADVERTISE_PAUSE_CAP) {
1915 if (lpa & LPA_PAUSE_CAP)
1916 sky2->flow_status = FC_BOTH;
1917 else if (advert & ADVERTISE_PAUSE_ASYM)
1918 sky2->flow_status = FC_RX;
1919 } else if (advert & ADVERTISE_PAUSE_ASYM) {
1920 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
1921 sky2->flow_status = FC_TX;
1922 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001923
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001924 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000
Stephen Hemminger93745492007-02-06 10:45:43 -08001925 && !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001926 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001927
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001928 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001929 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
1930 else
1931 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
1932
1933 return 0;
1934}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001935
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001936/* Interrupt from PHY */
1937static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001938{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001939 struct net_device *dev = hw->dev[port];
1940 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001941 u16 istatus, phystat;
1942
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001943 if (!netif_running(dev))
1944 return;
1945
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001946 spin_lock(&sky2->phy_lock);
1947 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
1948 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
1949
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001950 if (netif_msg_intr(sky2))
1951 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
1952 sky2->netdev->name, istatus, phystat);
1953
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001954 if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001955 if (sky2_autoneg_done(sky2, phystat) == 0)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001956 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001957 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001958 }
1959
Stephen Hemminger793b8832005-09-14 16:06:14 -07001960 if (istatus & PHY_M_IS_LSP_CHANGE)
1961 sky2->speed = sky2_phy_speed(hw, phystat);
1962
1963 if (istatus & PHY_M_IS_DUP_CHANGE)
1964 sky2->duplex =
1965 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
1966
1967 if (istatus & PHY_M_IS_LST_CHANGE) {
1968 if (phystat & PHY_M_PS_LINK_UP)
1969 sky2_link_up(sky2);
1970 else
1971 sky2_link_down(sky2);
1972 }
1973out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001974 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001975}
1976
Stephen Hemminger62335ab2007-02-06 10:45:42 -08001977/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08001978 * and tx queue is full (stopped).
1979 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001980static void sky2_tx_timeout(struct net_device *dev)
1981{
1982 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001983 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001984
1985 if (netif_msg_timer(sky2))
1986 printk(KERN_ERR PFX "%s: tx timeout\n", dev->name);
1987
Stephen Hemminger8f246642006-03-20 15:48:21 -08001988 printk(KERN_DEBUG PFX "%s: transmit ring %u .. %u report=%u done=%u\n",
Stephen Hemminger62335ab2007-02-06 10:45:42 -08001989 dev->name, sky2->tx_cons, sky2->tx_prod,
1990 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
1991 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001992
Stephen Hemminger81906792007-02-15 16:40:33 -08001993 /* can't restart safely under softirq */
1994 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001995}
1996
1997static int sky2_change_mtu(struct net_device *dev, int new_mtu)
1998{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001999 struct sky2_port *sky2 = netdev_priv(dev);
2000 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002001 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002002 int err;
2003 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002004 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002005
2006 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2007 return -EINVAL;
2008
Stephen Hemminger05745c42007-09-19 15:36:45 -07002009 if (new_mtu > ETH_DATA_LEN &&
2010 (hw->chip_id == CHIP_ID_YUKON_FE ||
2011 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002012 return -EINVAL;
2013
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002014 if (!netif_running(dev)) {
2015 dev->mtu = new_mtu;
2016 return 0;
2017 }
2018
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002019 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002020 sky2_write32(hw, B0_IMSK, 0);
2021
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002022 dev->trans_start = jiffies; /* prevent tx timeout */
2023 netif_stop_queue(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002024 napi_disable(&hw->napi);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002025
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002026 synchronize_irq(hw->pdev->irq);
2027
Stephen Hemmingere0c28112007-09-20 13:03:49 -07002028 if (sky2_read8(hw, B2_E_0) == 0)
Stephen Hemminger69161612007-06-04 17:23:26 -07002029 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002030
2031 ctl = gma_read16(hw, port, GM_GP_CTRL);
2032 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002033 sky2_rx_stop(sky2);
2034 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002035
2036 dev->mtu = new_mtu;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002037
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002038 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2039 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002040
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002041 if (dev->mtu > ETH_DATA_LEN)
2042 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002043
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002044 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002045
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002046 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002047
2048 err = sky2_rx_start(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002049 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002050
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002051 /* Unconditionally re-enable NAPI because even if we
2052 * call dev_close() that will do a napi_disable().
2053 */
2054 napi_enable(&hw->napi);
2055
Stephen Hemminger1b537562005-12-20 15:08:07 -08002056 if (err)
2057 dev_close(dev);
2058 else {
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002059 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002060
Stephen Hemminger1b537562005-12-20 15:08:07 -08002061 netif_wake_queue(dev);
2062 }
2063
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002064 return err;
2065}
2066
Stephen Hemminger14d02632006-09-26 11:57:43 -07002067/* For small just reuse existing skb for next receive */
2068static struct sk_buff *receive_copy(struct sky2_port *sky2,
2069 const struct rx_ring_info *re,
2070 unsigned length)
2071{
2072 struct sk_buff *skb;
2073
2074 skb = netdev_alloc_skb(sky2->netdev, length + 2);
2075 if (likely(skb)) {
2076 skb_reserve(skb, 2);
2077 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2078 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002079 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002080 skb->ip_summed = re->skb->ip_summed;
2081 skb->csum = re->skb->csum;
2082 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2083 length, PCI_DMA_FROMDEVICE);
2084 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002085 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002086 }
2087 return skb;
2088}
2089
2090/* Adjust length of skb with fragments to match received data */
2091static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2092 unsigned int length)
2093{
2094 int i, num_frags;
2095 unsigned int size;
2096
2097 /* put header into skb */
2098 size = min(length, hdr_space);
2099 skb->tail += size;
2100 skb->len += size;
2101 length -= size;
2102
2103 num_frags = skb_shinfo(skb)->nr_frags;
2104 for (i = 0; i < num_frags; i++) {
2105 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2106
2107 if (length == 0) {
2108 /* don't need this page */
2109 __free_page(frag->page);
2110 --skb_shinfo(skb)->nr_frags;
2111 } else {
2112 size = min(length, (unsigned) PAGE_SIZE);
2113
2114 frag->size = size;
2115 skb->data_len += size;
2116 skb->truesize += size;
2117 skb->len += size;
2118 length -= size;
2119 }
2120 }
2121}
2122
2123/* Normal packet - take skb from ring element and put in a new one */
2124static struct sk_buff *receive_new(struct sky2_port *sky2,
2125 struct rx_ring_info *re,
2126 unsigned int length)
2127{
2128 struct sk_buff *skb, *nskb;
2129 unsigned hdr_space = sky2->rx_data_size;
2130
Stephen Hemminger14d02632006-09-26 11:57:43 -07002131 /* Don't be tricky about reusing pages (yet) */
2132 nskb = sky2_rx_alloc(sky2);
2133 if (unlikely(!nskb))
2134 return NULL;
2135
2136 skb = re->skb;
2137 sky2_rx_unmap_skb(sky2->hw->pdev, re);
2138
2139 prefetch(skb->data);
2140 re->skb = nskb;
2141 sky2_rx_map_skb(sky2->hw->pdev, re, hdr_space);
2142
2143 if (skb_shinfo(skb)->nr_frags)
2144 skb_put_frags(skb, hdr_space, length);
2145 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002146 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002147 return skb;
2148}
2149
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002150/*
2151 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002152 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002153 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002154static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002155 u16 length, u32 status)
2156{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002157 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002158 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002159 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002160 u16 count = (status & GMR_FS_LEN) >> 16;
2161
2162#ifdef SKY2_VLAN_TAG_USED
2163 /* Account for vlan tag */
2164 if (sky2->vlgrp && (status & GMR_FS_VLAN))
2165 count -= VLAN_HLEN;
2166#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002167
2168 if (unlikely(netif_msg_rx_status(sky2)))
2169 printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002170 dev->name, sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002171
Stephen Hemminger793b8832005-09-14 16:06:14 -07002172 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002173 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002174
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002175 /* This chip has hardware problems that generates bogus status.
2176 * So do only marginal checking and expect higher level protocols
2177 * to handle crap frames.
2178 */
2179 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2180 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2181 length != count)
2182 goto okay;
2183
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002184 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002185 goto error;
2186
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002187 if (!(status & GMR_FS_RX_OK))
2188 goto resubmit;
2189
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002190 /* if length reported by DMA does not match PHY, packet was truncated */
2191 if (length != count)
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002192 goto len_error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002193
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002194okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002195 if (length < copybreak)
2196 skb = receive_copy(sky2, re, length);
2197 else
2198 skb = receive_new(sky2, re, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002199resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002200 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002201
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002202 return skb;
2203
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002204len_error:
Stephen Hemminger71749532007-07-09 15:33:40 -07002205 /* Truncation of overlength packets
2206 causes PHY length to not match MAC length */
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002207 ++dev->stats.rx_length_errors;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002208 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002209 pr_info(PFX "%s: rx length error: status %#x length %d\n",
2210 dev->name, status, length);
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002211 goto resubmit;
Stephen Hemminger71749532007-07-09 15:33:40 -07002212
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002213error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002214 ++dev->stats.rx_errors;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002215 if (status & GMR_FS_RX_FF_OV) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002216 dev->stats.rx_over_errors++;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002217 goto resubmit;
2218 }
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002219
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002220 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002221 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002222 dev->name, status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002223
2224 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002225 dev->stats.rx_length_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002226 if (status & GMR_FS_FRAGMENT)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002227 dev->stats.rx_frame_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002228 if (status & GMR_FS_CRC_ERR)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002229 dev->stats.rx_crc_errors++;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002230
Stephen Hemminger793b8832005-09-14 16:06:14 -07002231 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002232}
2233
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002234/* Transmit complete */
2235static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002236{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002237 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002238
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002239 if (netif_running(dev)) {
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002240 netif_tx_lock(dev);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002241 sky2_tx_complete(sky2, last);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002242 netif_tx_unlock(dev);
shemminger@osdl.org22247952005-11-30 11:45:19 -08002243 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002244}
2245
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002246/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002247static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002248{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002249 int work_done = 0;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002250 unsigned rx[2] = { 0, 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002251
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002252 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002253 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002254 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002255 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemminger69161612007-06-04 17:23:26 -07002256 unsigned port = le->css & CSS_LINK_BIT;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002257 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002258 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002259 u32 status;
2260 u16 length;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002261
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07002262 hw->st_idx = RING_NEXT(hw->st_idx, STATUS_RING_SIZE);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002263
Stephen Hemminger69161612007-06-04 17:23:26 -07002264 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002265 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002266 length = le16_to_cpu(le->length);
2267 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002268
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002269 switch (le->opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002270 case OP_RXSTAT:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002271 ++rx[port];
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002272 skb = sky2_receive(dev, length, status);
Stephen Hemminger3225b912007-05-14 12:38:12 -07002273 if (unlikely(!skb)) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002274 dev->stats.rx_dropped++;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002275 break;
Stephen Hemminger3225b912007-05-14 12:38:12 -07002276 }
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002277
Stephen Hemminger69161612007-06-04 17:23:26 -07002278 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002279 if (hw->flags & SKY2_HW_NEW_LE) {
Stephen Hemminger69161612007-06-04 17:23:26 -07002280 if (sky2->rx_csum &&
2281 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2282 (le->css & CSS_TCPUDPCSOK))
2283 skb->ip_summed = CHECKSUM_UNNECESSARY;
2284 else
2285 skb->ip_summed = CHECKSUM_NONE;
2286 }
2287
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002288 skb->protocol = eth_type_trans(skb, dev);
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002289 dev->stats.rx_packets++;
2290 dev->stats.rx_bytes += skb->len;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002291 dev->last_rx = jiffies;
2292
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002293#ifdef SKY2_VLAN_TAG_USED
2294 if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
2295 vlan_hwaccel_receive_skb(skb,
2296 sky2->vlgrp,
2297 be16_to_cpu(sky2->rx_tag));
2298 } else
2299#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002300 netif_receive_skb(skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002301
Stephen Hemminger22e11702006-07-12 15:23:48 -07002302 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002303 if (++work_done >= to_do)
2304 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002305 break;
2306
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002307#ifdef SKY2_VLAN_TAG_USED
2308 case OP_RXVLAN:
2309 sky2->rx_tag = length;
2310 break;
2311
2312 case OP_RXCHKSVLAN:
2313 sky2->rx_tag = length;
2314 /* fall through */
2315#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002316 case OP_RXCHKS:
Stephen Hemminger87418302007-03-08 12:42:30 -08002317 if (!sky2->rx_csum)
2318 break;
2319
Stephen Hemminger05745c42007-09-19 15:36:45 -07002320 /* If this happens then driver assuming wrong format */
2321 if (unlikely(hw->flags & SKY2_HW_NEW_LE)) {
2322 if (net_ratelimit())
2323 printk(KERN_NOTICE "%s: unexpected"
2324 " checksum status\n",
2325 dev->name);
Stephen Hemminger69161612007-06-04 17:23:26 -07002326 break;
Stephen Hemminger05745c42007-09-19 15:36:45 -07002327 }
Stephen Hemminger69161612007-06-04 17:23:26 -07002328
Stephen Hemminger87418302007-03-08 12:42:30 -08002329 /* Both checksum counters are programmed to start at
2330 * the same offset, so unless there is a problem they
2331 * should match. This failure is an early indication that
2332 * hardware receive checksumming won't work.
2333 */
2334 if (likely(status >> 16 == (status & 0xffff))) {
2335 skb = sky2->rx_ring[sky2->rx_next].skb;
2336 skb->ip_summed = CHECKSUM_COMPLETE;
2337 skb->csum = status & 0xffff;
2338 } else {
2339 printk(KERN_NOTICE PFX "%s: hardware receive "
2340 "checksum problem (status = %#x)\n",
2341 dev->name, status);
2342 sky2->rx_csum = 0;
2343 sky2_write32(sky2->hw,
Stephen Hemminger69161612007-06-04 17:23:26 -07002344 Q_ADDR(rxqaddr[port], Q_CSR),
Stephen Hemminger87418302007-03-08 12:42:30 -08002345 BMU_DIS_RX_CHKSUM);
2346 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002347 break;
2348
2349 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002350 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002351 BUILD_BUG_ON(TX_RING_SIZE > 0x1000);
2352 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002353 if (hw->dev[1])
2354 sky2_tx_done(hw->dev[1],
2355 ((status >> 24) & 0xff)
2356 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002357 break;
2358
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002359 default:
2360 if (net_ratelimit())
Stephen Hemminger793b8832005-09-14 16:06:14 -07002361 printk(KERN_WARNING PFX
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002362 "unknown status opcode 0x%x\n", le->opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002363 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002364 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002365
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002366 /* Fully processed status ring so clear irq */
2367 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2368
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002369exit_loop:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002370 if (rx[0])
2371 sky2_rx_update(netdev_priv(hw->dev[0]), Q_R1);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002372
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002373 if (rx[1])
2374 sky2_rx_update(netdev_priv(hw->dev[1]), Q_R2);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002375
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002376 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002377}
2378
2379static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2380{
2381 struct net_device *dev = hw->dev[port];
2382
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002383 if (net_ratelimit())
2384 printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
2385 dev->name, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002386
2387 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002388 if (net_ratelimit())
2389 printk(KERN_ERR PFX "%s: ram data read parity error\n",
2390 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002391 /* Clear IRQ */
2392 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2393 }
2394
2395 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002396 if (net_ratelimit())
2397 printk(KERN_ERR PFX "%s: ram data write parity error\n",
2398 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002399
2400 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2401 }
2402
2403 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002404 if (net_ratelimit())
2405 printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002406 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2407 }
2408
2409 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002410 if (net_ratelimit())
2411 printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002412 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2413 }
2414
2415 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002416 if (net_ratelimit())
2417 printk(KERN_ERR PFX "%s: TCP segmentation error\n",
2418 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002419 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2420 }
2421}
2422
2423static void sky2_hw_intr(struct sky2_hw *hw)
2424{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002425 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002426 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002427 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2428
2429 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002430
Stephen Hemminger793b8832005-09-14 16:06:14 -07002431 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002432 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002433
2434 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002435 u16 pci_err;
2436
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002437 pci_read_config_word(pdev, PCI_STATUS, &pci_err);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002438 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002439 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002440 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002441
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002442 pci_write_config_word(pdev, PCI_STATUS,
2443 pci_err | PCI_STATUS_ERROR_BITS);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002444 }
2445
2446 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002447 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002448 int pos = pci_find_aer_capability(hw->pdev);
2449 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002450
Stephen Hemminger555382c2007-08-29 12:58:14 -07002451 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_STATUS, &err);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002452 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002453 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
2454 pci_cleanup_aer_uncorrect_error_status(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002455 }
2456
2457 if (status & Y2_HWE_L1_MASK)
2458 sky2_hw_error(hw, 0, status);
2459 status >>= 8;
2460 if (status & Y2_HWE_L1_MASK)
2461 sky2_hw_error(hw, 1, status);
2462}
2463
2464static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2465{
2466 struct net_device *dev = hw->dev[port];
2467 struct sky2_port *sky2 = netdev_priv(dev);
2468 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2469
2470 if (netif_msg_intr(sky2))
2471 printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n",
2472 dev->name, status);
2473
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002474 if (status & GM_IS_RX_CO_OV)
2475 gma_read16(hw, port, GM_RX_IRQ_SRC);
2476
2477 if (status & GM_IS_TX_CO_OV)
2478 gma_read16(hw, port, GM_TX_IRQ_SRC);
2479
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002480 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002481 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002482 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2483 }
2484
2485 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002486 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002487 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2488 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002489}
2490
Stephen Hemminger40b01722007-04-11 14:47:59 -07002491/* This should never happen it is a bug. */
2492static void sky2_le_error(struct sky2_hw *hw, unsigned port,
2493 u16 q, unsigned ring_size)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002494{
2495 struct net_device *dev = hw->dev[port];
2496 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002497 unsigned idx;
2498 const u64 *le = (q == Q_R1 || q == Q_R2)
2499 ? (u64 *) sky2->rx_le : (u64 *) sky2->tx_le;
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002500
Stephen Hemminger40b01722007-04-11 14:47:59 -07002501 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
2502 printk(KERN_ERR PFX "%s: descriptor error q=%#x get=%u [%llx] put=%u\n",
2503 dev->name, (unsigned) q, idx, (unsigned long long) le[idx],
2504 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002505
Stephen Hemminger40b01722007-04-11 14:47:59 -07002506 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002507}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002508
Stephen Hemminger75e80682007-09-19 15:36:46 -07002509static int sky2_rx_hung(struct net_device *dev)
2510{
2511 struct sky2_port *sky2 = netdev_priv(dev);
2512 struct sky2_hw *hw = sky2->hw;
2513 unsigned port = sky2->port;
2514 unsigned rxq = rxqaddr[port];
2515 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2516 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2517 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2518 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2519
2520 /* If idle and MAC or PCI is stuck */
2521 if (sky2->check.last == dev->last_rx &&
2522 ((mac_rp == sky2->check.mac_rp &&
2523 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2524 /* Check if the PCI RX hang */
2525 (fifo_rp == sky2->check.fifo_rp &&
2526 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
2527 printk(KERN_DEBUG PFX "%s: hung mac %d:%d fifo %d (%d:%d)\n",
2528 dev->name, mac_lev, mac_rp, fifo_lev, fifo_rp,
2529 sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
2530 return 1;
2531 } else {
2532 sky2->check.last = dev->last_rx;
2533 sky2->check.mac_rp = mac_rp;
2534 sky2->check.mac_lev = mac_lev;
2535 sky2->check.fifo_rp = fifo_rp;
2536 sky2->check.fifo_lev = fifo_lev;
2537 return 0;
2538 }
2539}
2540
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002541static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002542{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002543 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002544
Stephen Hemminger75e80682007-09-19 15:36:46 -07002545 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002546 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002547 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002548 } else {
2549 int i, active = 0;
2550
2551 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002552 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002553 if (!netif_running(dev))
2554 continue;
2555 ++active;
2556
2557 /* For chips with Rx FIFO, check if stuck */
Stephen Hemmingere0c28112007-09-20 13:03:49 -07002558 if ((hw->flags & SKY2_HW_FIFO_HANG_CHECK) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002559 sky2_rx_hung(dev)) {
2560 pr_info(PFX "%s: receiver hang detected\n",
2561 dev->name);
2562 schedule_work(&hw->restart_work);
2563 return;
2564 }
2565 }
2566
2567 if (active == 0)
2568 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002569 }
2570
Stephen Hemminger75e80682007-09-19 15:36:46 -07002571 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002572}
2573
Stephen Hemminger40b01722007-04-11 14:47:59 -07002574/* Hardware/software error handling */
2575static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002576{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002577 if (net_ratelimit())
2578 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002579
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002580 if (status & Y2_IS_HW_ERR)
2581 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002582
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002583 if (status & Y2_IS_IRQ_MAC1)
2584 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002585
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002586 if (status & Y2_IS_IRQ_MAC2)
2587 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002588
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002589 if (status & Y2_IS_CHK_RX1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002590 sky2_le_error(hw, 0, Q_R1, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002591
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002592 if (status & Y2_IS_CHK_RX2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002593 sky2_le_error(hw, 1, Q_R2, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002594
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002595 if (status & Y2_IS_CHK_TXA1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002596 sky2_le_error(hw, 0, Q_XA1, TX_RING_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002597
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002598 if (status & Y2_IS_CHK_TXA2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002599 sky2_le_error(hw, 1, Q_XA2, TX_RING_SIZE);
2600}
2601
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002602static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002603{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002604 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002605 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07002606 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07002607 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002608
2609 if (unlikely(status & Y2_IS_ERROR))
2610 sky2_err_intr(hw, status);
2611
2612 if (status & Y2_IS_IRQ_PHY1)
2613 sky2_phy_intr(hw, 0);
2614
2615 if (status & Y2_IS_IRQ_PHY2)
2616 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002617
Stephen Hemminger26691832007-10-11 18:31:13 -07002618 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
2619 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002620
David S. Miller6f535762007-10-11 18:08:29 -07002621 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07002622 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002623 }
David S. Miller6f535762007-10-11 18:08:29 -07002624
Stephen Hemminger26691832007-10-11 18:31:13 -07002625 /* Bug/Errata workaround?
2626 * Need to kick the TX irq moderation timer.
2627 */
2628 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_START) {
2629 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
2630 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2631 }
2632 napi_complete(napi);
2633 sky2_read32(hw, B0_Y2_SP_LISR);
2634done:
2635
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002636 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002637}
2638
David Howells7d12e782006-10-05 14:55:46 +01002639static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002640{
2641 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002642 u32 status;
2643
2644 /* Reading this mask interrupts as side effect */
2645 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2646 if (status == 0 || status == ~0)
2647 return IRQ_NONE;
2648
2649 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002650
2651 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002652
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002653 return IRQ_HANDLED;
2654}
2655
2656#ifdef CONFIG_NET_POLL_CONTROLLER
2657static void sky2_netpoll(struct net_device *dev)
2658{
2659 struct sky2_port *sky2 = netdev_priv(dev);
2660
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002661 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002662}
2663#endif
2664
2665/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002666static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002667{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002668 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002669 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002670 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08002671 case CHIP_ID_YUKON_EX:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002672 return 125;
2673
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002674 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002675 return 100;
2676
2677 case CHIP_ID_YUKON_FE_P:
2678 return 50;
2679
2680 case CHIP_ID_YUKON_XL:
2681 return 156;
2682
2683 default:
2684 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002685 }
2686}
2687
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002688static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2689{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002690 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002691}
2692
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002693static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2694{
2695 return clk / sky2_mhz(hw);
2696}
2697
2698
Stephen Hemmingere3173832007-02-06 10:45:39 -08002699static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002700{
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002701 int rc;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002702 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002703
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002704 /* Enable all clocks and check for bad PCI access */
2705 rc = pci_write_config_dword(hw->pdev, PCI_DEV_REG3, 0);
2706 if (rc)
2707 return rc;
Stephen Hemminger451af332007-06-04 17:23:24 -07002708
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002709 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08002710
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002711 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002712 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
2713
2714 switch(hw->chip_id) {
2715 case CHIP_ID_YUKON_XL:
2716 hw->flags = SKY2_HW_GIGABIT
Stephen Hemmingere0c28112007-09-20 13:03:49 -07002717 | SKY2_HW_NEWER_PHY;
2718 if (hw->chip_rev < 3)
2719 hw->flags |= SKY2_HW_FIFO_HANG_CHECK;
2720
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002721 break;
2722
2723 case CHIP_ID_YUKON_EC_U:
2724 hw->flags = SKY2_HW_GIGABIT
2725 | SKY2_HW_NEWER_PHY
2726 | SKY2_HW_ADV_POWER_CTL;
2727 break;
2728
2729 case CHIP_ID_YUKON_EX:
2730 hw->flags = SKY2_HW_GIGABIT
2731 | SKY2_HW_NEWER_PHY
2732 | SKY2_HW_NEW_LE
2733 | SKY2_HW_ADV_POWER_CTL;
2734
2735 /* New transmit checksum */
2736 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
2737 hw->flags |= SKY2_HW_AUTO_TX_SUM;
2738 break;
2739
2740 case CHIP_ID_YUKON_EC:
2741 /* This rev is really old, and requires untested workarounds */
2742 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
2743 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
2744 return -EOPNOTSUPP;
2745 }
Stephen Hemmingere0c28112007-09-20 13:03:49 -07002746 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_FIFO_HANG_CHECK;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002747 break;
2748
2749 case CHIP_ID_YUKON_FE:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002750 break;
2751
Stephen Hemminger05745c42007-09-19 15:36:45 -07002752 case CHIP_ID_YUKON_FE_P:
2753 hw->flags = SKY2_HW_NEWER_PHY
2754 | SKY2_HW_NEW_LE
2755 | SKY2_HW_AUTO_TX_SUM
2756 | SKY2_HW_ADV_POWER_CTL;
2757 break;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002758 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002759 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
2760 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002761 return -EOPNOTSUPP;
2762 }
2763
Stephen Hemmingere3173832007-02-06 10:45:39 -08002764 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002765 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
2766 hw->flags |= SKY2_HW_FIBRE_PHY;
2767
2768
Stephen Hemmingere3173832007-02-06 10:45:39 -08002769 hw->ports = 1;
2770 t8 = sky2_read8(hw, B2_Y2_HW_RES);
2771 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
2772 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
2773 ++hw->ports;
2774 }
2775
2776 return 0;
2777}
2778
2779static void sky2_reset(struct sky2_hw *hw)
2780{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002781 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002782 u16 status;
Stephen Hemminger555382c2007-08-29 12:58:14 -07002783 int i, cap;
2784 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002785
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002786 /* disable ASF */
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07002787 if (hw->chip_id == CHIP_ID_YUKON_EX) {
2788 status = sky2_read16(hw, HCU_CCSR);
2789 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
2790 HCU_CCSR_UC_STATE_MSK);
2791 sky2_write16(hw, HCU_CCSR, status);
2792 } else
2793 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
2794 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002795
2796 /* do a SW reset */
2797 sky2_write8(hw, B0_CTST, CS_RST_SET);
2798 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2799
2800 /* clear PCI errors, if any */
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002801 pci_read_config_word(pdev, PCI_STATUS, &status);
2802 status |= PCI_STATUS_ERROR_BITS;
2803 pci_write_config_word(pdev, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002804
2805 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2806
Stephen Hemminger555382c2007-08-29 12:58:14 -07002807 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2808 if (cap) {
2809 /* Check for advanced error reporting */
2810 pci_cleanup_aer_uncorrect_error_status(pdev);
2811 pci_cleanup_aer_correct_error_status(pdev);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002812
Stephen Hemminger555382c2007-08-29 12:58:14 -07002813 /* If error bit is stuck on ignore it */
2814 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
2815 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
2816
2817 else if (pci_enable_pcie_error_reporting(pdev))
2818 hwe_mask |= Y2_IS_PCI_EXP;
2819 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002820
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08002821 sky2_power_on(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002822
2823 for (i = 0; i < hw->ports; i++) {
2824 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
2825 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07002826
2827 if (hw->chip_id == CHIP_ID_YUKON_EX)
2828 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
2829 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
2830 | GMC_BYP_RETR_ON);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002831 }
2832
Stephen Hemminger793b8832005-09-14 16:06:14 -07002833 /* Clear I2C IRQ noise */
2834 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002835
2836 /* turn off hardware timer (unused) */
2837 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
2838 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002839
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002840 sky2_write8(hw, B0_Y2LED, LED_STAT_ON);
2841
Stephen Hemminger69634ee2005-12-09 11:35:06 -08002842 /* Turn off descriptor polling */
2843 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002844
2845 /* Turn off receive timestamp */
2846 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002847 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002848
2849 /* enable the Tx Arbiters */
2850 for (i = 0; i < hw->ports; i++)
2851 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
2852
2853 /* Initialize ram interface */
2854 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002855 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002856
2857 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
2858 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
2859 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
2860 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
2861 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
2862 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
2863 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
2864 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
2865 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
2866 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
2867 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
2868 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
2869 }
2870
Stephen Hemminger555382c2007-08-29 12:58:14 -07002871 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002872
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002873 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07002874 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002875
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002876 memset(hw->st_le, 0, STATUS_LE_BYTES);
2877 hw->st_idx = 0;
2878
2879 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
2880 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
2881
2882 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002883 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002884
2885 /* Set the list last index */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002886 sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002887
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002888 sky2_write16(hw, STAT_TX_IDX_TH, 10);
2889 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002890
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002891 /* set Status-FIFO ISR watermark */
2892 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
2893 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
2894 else
2895 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002896
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002897 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08002898 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
2899 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002900
Stephen Hemminger793b8832005-09-14 16:06:14 -07002901 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002902 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
2903
2904 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2905 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
2906 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08002907}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002908
Stephen Hemminger81906792007-02-15 16:40:33 -08002909static void sky2_restart(struct work_struct *work)
2910{
2911 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
2912 struct net_device *dev;
2913 int i, err;
2914
Stephen Hemminger81906792007-02-15 16:40:33 -08002915 rtnl_lock();
2916 sky2_write32(hw, B0_IMSK, 0);
2917 sky2_read32(hw, B0_IMSK);
2918
Stephen Hemminger81906792007-02-15 16:40:33 -08002919 for (i = 0; i < hw->ports; i++) {
2920 dev = hw->dev[i];
2921 if (netif_running(dev))
2922 sky2_down(dev);
2923 }
2924
2925 sky2_reset(hw);
2926 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger81906792007-02-15 16:40:33 -08002927
2928 for (i = 0; i < hw->ports; i++) {
2929 dev = hw->dev[i];
2930 if (netif_running(dev)) {
2931 err = sky2_up(dev);
2932 if (err) {
2933 printk(KERN_INFO PFX "%s: could not restart %d\n",
2934 dev->name, err);
2935 dev_close(dev);
2936 }
2937 }
2938 }
2939
Stephen Hemminger81906792007-02-15 16:40:33 -08002940 rtnl_unlock();
2941}
2942
Stephen Hemmingere3173832007-02-06 10:45:39 -08002943static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
2944{
2945 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
2946}
2947
2948static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2949{
2950 const struct sky2_port *sky2 = netdev_priv(dev);
2951
2952 wol->supported = sky2_wol_supported(sky2->hw);
2953 wol->wolopts = sky2->wol;
2954}
2955
2956static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2957{
2958 struct sky2_port *sky2 = netdev_priv(dev);
2959 struct sky2_hw *hw = sky2->hw;
2960
2961 if (wol->wolopts & ~sky2_wol_supported(sky2->hw))
2962 return -EOPNOTSUPP;
2963
2964 sky2->wol = wol->wolopts;
2965
Stephen Hemminger05745c42007-09-19 15:36:45 -07002966 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
2967 hw->chip_id == CHIP_ID_YUKON_EX ||
2968 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingere3173832007-02-06 10:45:39 -08002969 sky2_write32(hw, B0_CTST, sky2->wol
2970 ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
2971
2972 if (!netif_running(dev))
2973 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002974 return 0;
2975}
2976
Stephen Hemminger28bd1812006-01-17 13:43:19 -08002977static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002978{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002979 if (sky2_is_copper(hw)) {
2980 u32 modes = SUPPORTED_10baseT_Half
2981 | SUPPORTED_10baseT_Full
2982 | SUPPORTED_100baseT_Half
2983 | SUPPORTED_100baseT_Full
2984 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002985
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002986 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002987 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002988 | SUPPORTED_1000baseT_Full;
2989 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002990 } else
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002991 return SUPPORTED_1000baseT_Half
2992 | SUPPORTED_1000baseT_Full
2993 | SUPPORTED_Autoneg
2994 | SUPPORTED_FIBRE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002995}
2996
Stephen Hemminger793b8832005-09-14 16:06:14 -07002997static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002998{
2999 struct sky2_port *sky2 = netdev_priv(dev);
3000 struct sky2_hw *hw = sky2->hw;
3001
3002 ecmd->transceiver = XCVR_INTERNAL;
3003 ecmd->supported = sky2_supported_modes(hw);
3004 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003005 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003006 ecmd->port = PORT_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003007 ecmd->speed = sky2->speed;
3008 } else {
3009 ecmd->speed = SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003010 ecmd->port = PORT_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003011 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003012
3013 ecmd->advertising = sky2->advertising;
3014 ecmd->autoneg = sky2->autoneg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003015 ecmd->duplex = sky2->duplex;
3016 return 0;
3017}
3018
3019static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3020{
3021 struct sky2_port *sky2 = netdev_priv(dev);
3022 const struct sky2_hw *hw = sky2->hw;
3023 u32 supported = sky2_supported_modes(hw);
3024
3025 if (ecmd->autoneg == AUTONEG_ENABLE) {
3026 ecmd->advertising = supported;
3027 sky2->duplex = -1;
3028 sky2->speed = -1;
3029 } else {
3030 u32 setting;
3031
Stephen Hemminger793b8832005-09-14 16:06:14 -07003032 switch (ecmd->speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003033 case SPEED_1000:
3034 if (ecmd->duplex == DUPLEX_FULL)
3035 setting = SUPPORTED_1000baseT_Full;
3036 else if (ecmd->duplex == DUPLEX_HALF)
3037 setting = SUPPORTED_1000baseT_Half;
3038 else
3039 return -EINVAL;
3040 break;
3041 case SPEED_100:
3042 if (ecmd->duplex == DUPLEX_FULL)
3043 setting = SUPPORTED_100baseT_Full;
3044 else if (ecmd->duplex == DUPLEX_HALF)
3045 setting = SUPPORTED_100baseT_Half;
3046 else
3047 return -EINVAL;
3048 break;
3049
3050 case SPEED_10:
3051 if (ecmd->duplex == DUPLEX_FULL)
3052 setting = SUPPORTED_10baseT_Full;
3053 else if (ecmd->duplex == DUPLEX_HALF)
3054 setting = SUPPORTED_10baseT_Half;
3055 else
3056 return -EINVAL;
3057 break;
3058 default:
3059 return -EINVAL;
3060 }
3061
3062 if ((setting & supported) == 0)
3063 return -EINVAL;
3064
3065 sky2->speed = ecmd->speed;
3066 sky2->duplex = ecmd->duplex;
3067 }
3068
3069 sky2->autoneg = ecmd->autoneg;
3070 sky2->advertising = ecmd->advertising;
3071
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003072 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003073 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003074 sky2_set_multicast(dev);
3075 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003076
3077 return 0;
3078}
3079
3080static void sky2_get_drvinfo(struct net_device *dev,
3081 struct ethtool_drvinfo *info)
3082{
3083 struct sky2_port *sky2 = netdev_priv(dev);
3084
3085 strcpy(info->driver, DRV_NAME);
3086 strcpy(info->version, DRV_VERSION);
3087 strcpy(info->fw_version, "N/A");
3088 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3089}
3090
3091static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003092 char name[ETH_GSTRING_LEN];
3093 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003094} sky2_stats[] = {
3095 { "tx_bytes", GM_TXO_OK_HI },
3096 { "rx_bytes", GM_RXO_OK_HI },
3097 { "tx_broadcast", GM_TXF_BC_OK },
3098 { "rx_broadcast", GM_RXF_BC_OK },
3099 { "tx_multicast", GM_TXF_MC_OK },
3100 { "rx_multicast", GM_RXF_MC_OK },
3101 { "tx_unicast", GM_TXF_UC_OK },
3102 { "rx_unicast", GM_RXF_UC_OK },
3103 { "tx_mac_pause", GM_TXF_MPAUSE },
3104 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003105 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003106 { "late_collision",GM_TXF_LAT_COL },
3107 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003108 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003109 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003110
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003111 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003112 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003113 { "rx_64_byte_packets", GM_RXF_64B },
3114 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3115 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3116 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3117 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3118 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3119 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003120 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003121 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3122 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003123 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003124
3125 { "tx_64_byte_packets", GM_TXF_64B },
3126 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3127 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3128 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3129 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3130 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3131 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3132 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003133};
3134
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003135static u32 sky2_get_rx_csum(struct net_device *dev)
3136{
3137 struct sky2_port *sky2 = netdev_priv(dev);
3138
3139 return sky2->rx_csum;
3140}
3141
3142static int sky2_set_rx_csum(struct net_device *dev, u32 data)
3143{
3144 struct sky2_port *sky2 = netdev_priv(dev);
3145
3146 sky2->rx_csum = data;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003147
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003148 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
3149 data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
3150
3151 return 0;
3152}
3153
3154static u32 sky2_get_msglevel(struct net_device *netdev)
3155{
3156 struct sky2_port *sky2 = netdev_priv(netdev);
3157 return sky2->msg_enable;
3158}
3159
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003160static int sky2_nway_reset(struct net_device *dev)
3161{
3162 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003163
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003164 if (!netif_running(dev) || sky2->autoneg != AUTONEG_ENABLE)
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003165 return -EINVAL;
3166
Stephen Hemminger1b537562005-12-20 15:08:07 -08003167 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003168 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003169
3170 return 0;
3171}
3172
Stephen Hemminger793b8832005-09-14 16:06:14 -07003173static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003174{
3175 struct sky2_hw *hw = sky2->hw;
3176 unsigned port = sky2->port;
3177 int i;
3178
3179 data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003180 | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003181 data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003182 | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003183
Stephen Hemminger793b8832005-09-14 16:06:14 -07003184 for (i = 2; i < count; i++)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003185 data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
3186}
3187
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003188static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3189{
3190 struct sky2_port *sky2 = netdev_priv(netdev);
3191 sky2->msg_enable = value;
3192}
3193
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003194static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003195{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003196 switch (sset) {
3197 case ETH_SS_STATS:
3198 return ARRAY_SIZE(sky2_stats);
3199 default:
3200 return -EOPNOTSUPP;
3201 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003202}
3203
3204static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003205 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003206{
3207 struct sky2_port *sky2 = netdev_priv(dev);
3208
Stephen Hemminger793b8832005-09-14 16:06:14 -07003209 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003210}
3211
Stephen Hemminger793b8832005-09-14 16:06:14 -07003212static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003213{
3214 int i;
3215
3216 switch (stringset) {
3217 case ETH_SS_STATS:
3218 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3219 memcpy(data + i * ETH_GSTRING_LEN,
3220 sky2_stats[i].name, ETH_GSTRING_LEN);
3221 break;
3222 }
3223}
3224
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003225static int sky2_set_mac_address(struct net_device *dev, void *p)
3226{
3227 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003228 struct sky2_hw *hw = sky2->hw;
3229 unsigned port = sky2->port;
3230 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003231
3232 if (!is_valid_ether_addr(addr->sa_data))
3233 return -EADDRNOTAVAIL;
3234
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003235 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003236 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003237 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003238 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003239 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003240
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003241 /* virtual address for data */
3242 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3243
3244 /* physical address: used for pause frames */
3245 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003246
3247 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003248}
3249
Stephen Hemmingera052b522006-10-17 10:24:23 -07003250static void inline sky2_add_filter(u8 filter[8], const u8 *addr)
3251{
3252 u32 bit;
3253
3254 bit = ether_crc(ETH_ALEN, addr) & 63;
3255 filter[bit >> 3] |= 1 << (bit & 7);
3256}
3257
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003258static void sky2_set_multicast(struct net_device *dev)
3259{
3260 struct sky2_port *sky2 = netdev_priv(dev);
3261 struct sky2_hw *hw = sky2->hw;
3262 unsigned port = sky2->port;
3263 struct dev_mc_list *list = dev->mc_list;
3264 u16 reg;
3265 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003266 int rx_pause;
3267 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003268
Stephen Hemmingera052b522006-10-17 10:24:23 -07003269 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003270 memset(filter, 0, sizeof(filter));
3271
3272 reg = gma_read16(hw, port, GM_RX_CTRL);
3273 reg |= GM_RXCR_UCF_ENA;
3274
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003275 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003276 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003277 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003278 memset(filter, 0xff, sizeof(filter));
Stephen Hemmingera052b522006-10-17 10:24:23 -07003279 else if (dev->mc_count == 0 && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003280 reg &= ~GM_RXCR_MCF_ENA;
3281 else {
3282 int i;
3283 reg |= GM_RXCR_MCF_ENA;
3284
Stephen Hemmingera052b522006-10-17 10:24:23 -07003285 if (rx_pause)
3286 sky2_add_filter(filter, pause_mc_addr);
3287
3288 for (i = 0; list && i < dev->mc_count; i++, list = list->next)
3289 sky2_add_filter(filter, list->dmi_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003290 }
3291
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003292 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003293 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003294 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003295 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003296 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003297 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003298 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003299 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003300
3301 gma_write16(hw, port, GM_RX_CTRL, reg);
3302}
3303
3304/* Can have one global because blinking is controlled by
3305 * ethtool and that is always under RTNL mutex
3306 */
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003307static void sky2_led(struct sky2_hw *hw, unsigned port, int on)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003308{
Stephen Hemminger793b8832005-09-14 16:06:14 -07003309 u16 pg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003310
Stephen Hemminger793b8832005-09-14 16:06:14 -07003311 switch (hw->chip_id) {
3312 case CHIP_ID_YUKON_XL:
3313 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3314 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
3315 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3316 on ? (PHY_M_LEDC_LOS_CTRL(1) |
3317 PHY_M_LEDC_INIT_CTRL(7) |
3318 PHY_M_LEDC_STA1_CTRL(7) |
3319 PHY_M_LEDC_STA0_CTRL(7))
3320 : 0);
3321
3322 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
3323 break;
3324
3325 default:
3326 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0);
Stephen Hemminger0efdf262006-12-05 12:03:41 -08003327 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
3328 on ? PHY_M_LED_ALL : 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003329 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003330}
3331
3332/* blink LED's for finding board */
3333static int sky2_phys_id(struct net_device *dev, u32 data)
3334{
3335 struct sky2_port *sky2 = netdev_priv(dev);
3336 struct sky2_hw *hw = sky2->hw;
3337 unsigned port = sky2->port;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003338 u16 ledctrl, ledover = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003339 long ms;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003340 int interrupted;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003341 int onoff = 1;
3342
Stephen Hemminger793b8832005-09-14 16:06:14 -07003343 if (!data || data > (u32) (MAX_SCHEDULE_TIMEOUT / HZ))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003344 ms = jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT);
3345 else
3346 ms = data * 1000;
3347
3348 /* save initial values */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003349 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003350 if (hw->chip_id == CHIP_ID_YUKON_XL) {
3351 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3352 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
3353 ledctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
3354 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
3355 } else {
3356 ledctrl = gm_phy_read(hw, port, PHY_MARV_LED_CTRL);
3357 ledover = gm_phy_read(hw, port, PHY_MARV_LED_OVER);
3358 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003359
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003360 interrupted = 0;
3361 while (!interrupted && ms > 0) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003362 sky2_led(hw, port, onoff);
3363 onoff = !onoff;
3364
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003365 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003366 interrupted = msleep_interruptible(250);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003367 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003368
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003369 ms -= 250;
3370 }
3371
3372 /* resume regularly scheduled programming */
Stephen Hemminger793b8832005-09-14 16:06:14 -07003373 if (hw->chip_id == CHIP_ID_YUKON_XL) {
3374 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3375 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
3376 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ledctrl);
3377 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
3378 } else {
3379 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
3380 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
3381 }
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003382 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003383
3384 return 0;
3385}
3386
3387static void sky2_get_pauseparam(struct net_device *dev,
3388 struct ethtool_pauseparam *ecmd)
3389{
3390 struct sky2_port *sky2 = netdev_priv(dev);
3391
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003392 switch (sky2->flow_mode) {
3393 case FC_NONE:
3394 ecmd->tx_pause = ecmd->rx_pause = 0;
3395 break;
3396 case FC_TX:
3397 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3398 break;
3399 case FC_RX:
3400 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3401 break;
3402 case FC_BOTH:
3403 ecmd->tx_pause = ecmd->rx_pause = 1;
3404 }
3405
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003406 ecmd->autoneg = sky2->autoneg;
3407}
3408
3409static int sky2_set_pauseparam(struct net_device *dev,
3410 struct ethtool_pauseparam *ecmd)
3411{
3412 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003413
3414 sky2->autoneg = ecmd->autoneg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003415 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003416
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003417 if (netif_running(dev))
3418 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003419
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003420 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003421}
3422
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003423static int sky2_get_coalesce(struct net_device *dev,
3424 struct ethtool_coalesce *ecmd)
3425{
3426 struct sky2_port *sky2 = netdev_priv(dev);
3427 struct sky2_hw *hw = sky2->hw;
3428
3429 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3430 ecmd->tx_coalesce_usecs = 0;
3431 else {
3432 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3433 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3434 }
3435 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3436
3437 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3438 ecmd->rx_coalesce_usecs = 0;
3439 else {
3440 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3441 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3442 }
3443 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3444
3445 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3446 ecmd->rx_coalesce_usecs_irq = 0;
3447 else {
3448 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3449 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3450 }
3451
3452 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3453
3454 return 0;
3455}
3456
3457/* Note: this affect both ports */
3458static int sky2_set_coalesce(struct net_device *dev,
3459 struct ethtool_coalesce *ecmd)
3460{
3461 struct sky2_port *sky2 = netdev_priv(dev);
3462 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003463 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003464
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003465 if (ecmd->tx_coalesce_usecs > tmax ||
3466 ecmd->rx_coalesce_usecs > tmax ||
3467 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003468 return -EINVAL;
3469
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003470 if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003471 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003472 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003473 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003474 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003475 return -EINVAL;
3476
3477 if (ecmd->tx_coalesce_usecs == 0)
3478 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3479 else {
3480 sky2_write32(hw, STAT_TX_TIMER_INI,
3481 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3482 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3483 }
3484 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3485
3486 if (ecmd->rx_coalesce_usecs == 0)
3487 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3488 else {
3489 sky2_write32(hw, STAT_LEV_TIMER_INI,
3490 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3491 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3492 }
3493 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3494
3495 if (ecmd->rx_coalesce_usecs_irq == 0)
3496 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3497 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003498 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003499 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3500 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3501 }
3502 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3503 return 0;
3504}
3505
Stephen Hemminger793b8832005-09-14 16:06:14 -07003506static void sky2_get_ringparam(struct net_device *dev,
3507 struct ethtool_ringparam *ering)
3508{
3509 struct sky2_port *sky2 = netdev_priv(dev);
3510
3511 ering->rx_max_pending = RX_MAX_PENDING;
3512 ering->rx_mini_max_pending = 0;
3513 ering->rx_jumbo_max_pending = 0;
3514 ering->tx_max_pending = TX_RING_SIZE - 1;
3515
3516 ering->rx_pending = sky2->rx_pending;
3517 ering->rx_mini_pending = 0;
3518 ering->rx_jumbo_pending = 0;
3519 ering->tx_pending = sky2->tx_pending;
3520}
3521
3522static int sky2_set_ringparam(struct net_device *dev,
3523 struct ethtool_ringparam *ering)
3524{
3525 struct sky2_port *sky2 = netdev_priv(dev);
3526 int err = 0;
3527
3528 if (ering->rx_pending > RX_MAX_PENDING ||
3529 ering->rx_pending < 8 ||
3530 ering->tx_pending < MAX_SKB_TX_LE ||
3531 ering->tx_pending > TX_RING_SIZE - 1)
3532 return -EINVAL;
3533
3534 if (netif_running(dev))
3535 sky2_down(dev);
3536
3537 sky2->rx_pending = ering->rx_pending;
3538 sky2->tx_pending = ering->tx_pending;
3539
Stephen Hemminger1b537562005-12-20 15:08:07 -08003540 if (netif_running(dev)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003541 err = sky2_up(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003542 if (err)
3543 dev_close(dev);
Stephen Hemminger6ed995b2005-12-20 15:08:08 -08003544 else
3545 sky2_set_multicast(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003546 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003547
3548 return err;
3549}
3550
Stephen Hemminger793b8832005-09-14 16:06:14 -07003551static int sky2_get_regs_len(struct net_device *dev)
3552{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003553 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003554}
3555
3556/*
3557 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003558 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07003559 */
3560static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
3561 void *p)
3562{
3563 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003564 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003565 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003566
3567 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003568
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003569 for (b = 0; b < 128; b++) {
3570 /* This complicated switch statement is to make sure and
3571 * only access regions that are unreserved.
3572 * Some blocks are only valid on dual port cards.
3573 * and block 3 has some special diagnostic registers that
3574 * are poison.
3575 */
3576 switch (b) {
3577 case 3:
3578 /* skip diagnostic ram region */
3579 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
3580 break;
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003581
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003582 /* dual port cards only */
3583 case 5: /* Tx Arbiter 2 */
3584 case 9: /* RX2 */
3585 case 14 ... 15: /* TX2 */
3586 case 17: case 19: /* Ram Buffer 2 */
3587 case 22 ... 23: /* Tx Ram Buffer 2 */
3588 case 25: /* Rx MAC Fifo 1 */
3589 case 27: /* Tx MAC Fifo 2 */
3590 case 31: /* GPHY 2 */
3591 case 40 ... 47: /* Pattern Ram 2 */
3592 case 52: case 54: /* TCP Segmentation 2 */
3593 case 112 ... 116: /* GMAC 2 */
3594 if (sky2->hw->ports == 1)
3595 goto reserved;
3596 /* fall through */
3597 case 0: /* Control */
3598 case 2: /* Mac address */
3599 case 4: /* Tx Arbiter 1 */
3600 case 7: /* PCI express reg */
3601 case 8: /* RX1 */
3602 case 12 ... 13: /* TX1 */
3603 case 16: case 18:/* Rx Ram Buffer 1 */
3604 case 20 ... 21: /* Tx Ram Buffer 1 */
3605 case 24: /* Rx MAC Fifo 1 */
3606 case 26: /* Tx MAC Fifo 1 */
3607 case 28 ... 29: /* Descriptor and status unit */
3608 case 30: /* GPHY 1*/
3609 case 32 ... 39: /* Pattern Ram 1 */
3610 case 48: case 50: /* TCP Segmentation 1 */
3611 case 56 ... 60: /* PCI space */
3612 case 80 ... 84: /* GMAC 1 */
3613 memcpy_fromio(p, io, 128);
3614 break;
3615 default:
3616reserved:
3617 memset(p, 0, 128);
3618 }
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003619
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003620 p += 128;
3621 io += 128;
3622 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003623}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003624
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003625/* In order to do Jumbo packets on these chips, need to turn off the
3626 * transmit store/forward. Therefore checksum offload won't work.
3627 */
3628static int no_tx_offload(struct net_device *dev)
3629{
3630 const struct sky2_port *sky2 = netdev_priv(dev);
3631 const struct sky2_hw *hw = sky2->hw;
3632
Stephen Hemminger69161612007-06-04 17:23:26 -07003633 return dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003634}
3635
3636static int sky2_set_tx_csum(struct net_device *dev, u32 data)
3637{
3638 if (data && no_tx_offload(dev))
3639 return -EINVAL;
3640
3641 return ethtool_op_set_tx_csum(dev, data);
3642}
3643
3644
3645static int sky2_set_tso(struct net_device *dev, u32 data)
3646{
3647 if (data && no_tx_offload(dev))
3648 return -EINVAL;
3649
3650 return ethtool_op_set_tso(dev, data);
3651}
3652
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003653static int sky2_get_eeprom_len(struct net_device *dev)
3654{
3655 struct sky2_port *sky2 = netdev_priv(dev);
3656 u16 reg2;
3657
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003658 pci_read_config_word(sky2->hw->pdev, PCI_DEV_REG2, &reg2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003659 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
3660}
3661
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003662static u32 sky2_vpd_read(struct pci_dev *pdev, int cap, u16 offset)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003663{
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003664 u32 val;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003665
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003666 pci_write_config_word(pdev, cap + PCI_VPD_ADDR, offset);
3667
3668 do {
3669 pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
3670 } while (!(offset & PCI_VPD_ADDR_F));
3671
3672 pci_read_config_dword(pdev, cap + PCI_VPD_DATA, &val);
3673 return val;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003674}
3675
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003676static void sky2_vpd_write(struct pci_dev *pdev, int cap, u16 offset, u32 val)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003677{
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003678 pci_write_config_word(pdev, cap + PCI_VPD_DATA, val);
3679 pci_write_config_dword(pdev, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003680 do {
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003681 pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
3682 } while (offset & PCI_VPD_ADDR_F);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003683}
3684
3685static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3686 u8 *data)
3687{
3688 struct sky2_port *sky2 = netdev_priv(dev);
3689 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
3690 int length = eeprom->len;
3691 u16 offset = eeprom->offset;
3692
3693 if (!cap)
3694 return -EINVAL;
3695
3696 eeprom->magic = SKY2_EEPROM_MAGIC;
3697
3698 while (length > 0) {
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003699 u32 val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003700 int n = min_t(int, length, sizeof(val));
3701
3702 memcpy(data, &val, n);
3703 length -= n;
3704 data += n;
3705 offset += n;
3706 }
3707 return 0;
3708}
3709
3710static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3711 u8 *data)
3712{
3713 struct sky2_port *sky2 = netdev_priv(dev);
3714 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
3715 int length = eeprom->len;
3716 u16 offset = eeprom->offset;
3717
3718 if (!cap)
3719 return -EINVAL;
3720
3721 if (eeprom->magic != SKY2_EEPROM_MAGIC)
3722 return -EINVAL;
3723
3724 while (length > 0) {
3725 u32 val;
3726 int n = min_t(int, length, sizeof(val));
3727
3728 if (n < sizeof(val))
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003729 val = sky2_vpd_read(sky2->hw->pdev, cap, offset);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003730 memcpy(&val, data, n);
3731
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003732 sky2_vpd_write(sky2->hw->pdev, cap, offset, val);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003733
3734 length -= n;
3735 data += n;
3736 offset += n;
3737 }
3738 return 0;
3739}
3740
3741
Jeff Garzik7282d492006-09-13 14:30:00 -04003742static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003743 .get_settings = sky2_get_settings,
3744 .set_settings = sky2_set_settings,
3745 .get_drvinfo = sky2_get_drvinfo,
3746 .get_wol = sky2_get_wol,
3747 .set_wol = sky2_set_wol,
3748 .get_msglevel = sky2_get_msglevel,
3749 .set_msglevel = sky2_set_msglevel,
3750 .nway_reset = sky2_nway_reset,
3751 .get_regs_len = sky2_get_regs_len,
3752 .get_regs = sky2_get_regs,
3753 .get_link = ethtool_op_get_link,
3754 .get_eeprom_len = sky2_get_eeprom_len,
3755 .get_eeprom = sky2_get_eeprom,
3756 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003757 .set_sg = ethtool_op_set_sg,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003758 .set_tx_csum = sky2_set_tx_csum,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003759 .set_tso = sky2_set_tso,
3760 .get_rx_csum = sky2_get_rx_csum,
3761 .set_rx_csum = sky2_set_rx_csum,
3762 .get_strings = sky2_get_strings,
3763 .get_coalesce = sky2_get_coalesce,
3764 .set_coalesce = sky2_set_coalesce,
3765 .get_ringparam = sky2_get_ringparam,
3766 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003767 .get_pauseparam = sky2_get_pauseparam,
3768 .set_pauseparam = sky2_set_pauseparam,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003769 .phys_id = sky2_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003770 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003771 .get_ethtool_stats = sky2_get_ethtool_stats,
3772};
3773
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003774#ifdef CONFIG_SKY2_DEBUG
3775
3776static struct dentry *sky2_debug;
3777
3778static int sky2_debug_show(struct seq_file *seq, void *v)
3779{
3780 struct net_device *dev = seq->private;
3781 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003782 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003783 unsigned port = sky2->port;
3784 unsigned idx, last;
3785 int sop;
3786
3787 if (!netif_running(dev))
3788 return -ENETDOWN;
3789
3790 seq_printf(seq, "IRQ src=%x mask=%x control=%x\n",
3791 sky2_read32(hw, B0_ISRC),
3792 sky2_read32(hw, B0_IMSK),
3793 sky2_read32(hw, B0_Y2_SP_ICR));
3794
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003795 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003796 last = sky2_read16(hw, STAT_PUT_IDX);
3797
3798 if (hw->st_idx == last)
3799 seq_puts(seq, "Status ring (empty)\n");
3800 else {
3801 seq_puts(seq, "Status ring\n");
3802 for (idx = hw->st_idx; idx != last && idx < STATUS_RING_SIZE;
3803 idx = RING_NEXT(idx, STATUS_RING_SIZE)) {
3804 const struct sky2_status_le *le = hw->st_le + idx;
3805 seq_printf(seq, "[%d] %#x %d %#x\n",
3806 idx, le->opcode, le->length, le->status);
3807 }
3808 seq_puts(seq, "\n");
3809 }
3810
3811 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
3812 sky2->tx_cons, sky2->tx_prod,
3813 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
3814 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
3815
3816 /* Dump contents of tx ring */
3817 sop = 1;
3818 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < TX_RING_SIZE;
3819 idx = RING_NEXT(idx, TX_RING_SIZE)) {
3820 const struct sky2_tx_le *le = sky2->tx_le + idx;
3821 u32 a = le32_to_cpu(le->addr);
3822
3823 if (sop)
3824 seq_printf(seq, "%u:", idx);
3825 sop = 0;
3826
3827 switch(le->opcode & ~HW_OWNER) {
3828 case OP_ADDR64:
3829 seq_printf(seq, " %#x:", a);
3830 break;
3831 case OP_LRGLEN:
3832 seq_printf(seq, " mtu=%d", a);
3833 break;
3834 case OP_VLAN:
3835 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
3836 break;
3837 case OP_TCPLISW:
3838 seq_printf(seq, " csum=%#x", a);
3839 break;
3840 case OP_LARGESEND:
3841 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
3842 break;
3843 case OP_PACKET:
3844 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
3845 break;
3846 case OP_BUFFER:
3847 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
3848 break;
3849 default:
3850 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
3851 a, le16_to_cpu(le->length));
3852 }
3853
3854 if (le->ctrl & EOP) {
3855 seq_putc(seq, '\n');
3856 sop = 1;
3857 }
3858 }
3859
3860 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
3861 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
3862 last = sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
3863 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
3864
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003865 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003866 return 0;
3867}
3868
3869static int sky2_debug_open(struct inode *inode, struct file *file)
3870{
3871 return single_open(file, sky2_debug_show, inode->i_private);
3872}
3873
3874static const struct file_operations sky2_debug_fops = {
3875 .owner = THIS_MODULE,
3876 .open = sky2_debug_open,
3877 .read = seq_read,
3878 .llseek = seq_lseek,
3879 .release = single_release,
3880};
3881
3882/*
3883 * Use network device events to create/remove/rename
3884 * debugfs file entries
3885 */
3886static int sky2_device_event(struct notifier_block *unused,
3887 unsigned long event, void *ptr)
3888{
3889 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003890 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003891
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003892 if (dev->open != sky2_up || !sky2_debug)
3893 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003894
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003895 switch(event) {
3896 case NETDEV_CHANGENAME:
3897 if (sky2->debugfs) {
3898 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
3899 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003900 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003901 break;
3902
3903 case NETDEV_GOING_DOWN:
3904 if (sky2->debugfs) {
3905 printk(KERN_DEBUG PFX "%s: remove debugfs\n",
3906 dev->name);
3907 debugfs_remove(sky2->debugfs);
3908 sky2->debugfs = NULL;
3909 }
3910 break;
3911
3912 case NETDEV_UP:
3913 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
3914 sky2_debug, dev,
3915 &sky2_debug_fops);
3916 if (IS_ERR(sky2->debugfs))
3917 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003918 }
3919
3920 return NOTIFY_DONE;
3921}
3922
3923static struct notifier_block sky2_notifier = {
3924 .notifier_call = sky2_device_event,
3925};
3926
3927
3928static __init void sky2_debug_init(void)
3929{
3930 struct dentry *ent;
3931
3932 ent = debugfs_create_dir("sky2", NULL);
3933 if (!ent || IS_ERR(ent))
3934 return;
3935
3936 sky2_debug = ent;
3937 register_netdevice_notifier(&sky2_notifier);
3938}
3939
3940static __exit void sky2_debug_cleanup(void)
3941{
3942 if (sky2_debug) {
3943 unregister_netdevice_notifier(&sky2_notifier);
3944 debugfs_remove(sky2_debug);
3945 sky2_debug = NULL;
3946 }
3947}
3948
3949#else
3950#define sky2_debug_init()
3951#define sky2_debug_cleanup()
3952#endif
3953
3954
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003955/* Initialize network device */
3956static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08003957 unsigned port,
3958 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003959{
3960 struct sky2_port *sky2;
3961 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
3962
3963 if (!dev) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003964 dev_err(&hw->pdev->dev, "etherdev alloc failed");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003965 return NULL;
3966 }
3967
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003968 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08003969 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003970 dev->open = sky2_up;
3971 dev->stop = sky2_down;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08003972 dev->do_ioctl = sky2_ioctl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003973 dev->hard_start_xmit = sky2_xmit_frame;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003974 dev->set_multicast_list = sky2_set_multicast;
3975 dev->set_mac_address = sky2_set_mac_address;
3976 dev->change_mtu = sky2_change_mtu;
3977 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
3978 dev->tx_timeout = sky2_tx_timeout;
3979 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003980#ifdef CONFIG_NET_POLL_CONTROLLER
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003981 dev->poll_controller = sky2_netpoll;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003982#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003983
3984 sky2 = netdev_priv(dev);
3985 sky2->netdev = dev;
3986 sky2->hw = hw;
3987 sky2->msg_enable = netif_msg_init(debug, default_msg);
3988
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003989 /* Auto speed and flow control */
3990 sky2->autoneg = AUTONEG_ENABLE;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003991 sky2->flow_mode = FC_BOTH;
3992
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003993 sky2->duplex = -1;
3994 sky2->speed = -1;
3995 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07003996 sky2->rx_csum = 1;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003997 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08003998
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003999 spin_lock_init(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004000 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004001 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004002
4003 hw->dev[port] = dev;
4004
4005 sky2->port = port;
4006
Stephen Hemminger4a50a872007-02-06 10:45:41 -08004007 dev->features |= NETIF_F_TSO | NETIF_F_IP_CSUM | NETIF_F_SG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004008 if (highmem)
4009 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004010
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004011#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004012 /* The workaround for FE+ status conflicts with VLAN tag detection. */
4013 if (!(sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
4014 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0)) {
4015 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
4016 dev->vlan_rx_register = sky2_vlan_rx_register;
4017 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004018#endif
4019
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004020 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004021 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07004022 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004023
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004024 return dev;
4025}
4026
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004027static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004028{
4029 const struct sky2_port *sky2 = netdev_priv(dev);
Joe Perches0795af52007-10-03 17:59:30 -07004030 DECLARE_MAC_BUF(mac);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004031
4032 if (netif_msg_probe(sky2))
Joe Perches0795af52007-10-03 17:59:30 -07004033 printk(KERN_INFO PFX "%s: addr %s\n",
4034 dev->name, print_mac(mac, dev->dev_addr));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004035}
4036
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004037/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004038static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004039{
4040 struct sky2_hw *hw = dev_id;
4041 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4042
4043 if (status == 0)
4044 return IRQ_NONE;
4045
4046 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004047 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004048 wake_up(&hw->msi_wait);
4049 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4050 }
4051 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4052
4053 return IRQ_HANDLED;
4054}
4055
4056/* Test interrupt path by forcing a a software IRQ */
4057static int __devinit sky2_test_msi(struct sky2_hw *hw)
4058{
4059 struct pci_dev *pdev = hw->pdev;
4060 int err;
4061
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004062 init_waitqueue_head (&hw->msi_wait);
4063
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004064 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4065
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004066 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004067 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004068 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004069 return err;
4070 }
4071
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004072 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004073 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004074
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004075 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004076
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004077 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004078 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004079 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4080 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004081
4082 err = -EOPNOTSUPP;
4083 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4084 }
4085
4086 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004087 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004088
4089 free_irq(pdev->irq, hw);
4090
4091 return err;
4092}
4093
Stephen Hemmingere3173832007-02-06 10:45:39 -08004094static int __devinit pci_wake_enabled(struct pci_dev *dev)
4095{
4096 int pm = pci_find_capability(dev, PCI_CAP_ID_PM);
4097 u16 value;
4098
4099 if (!pm)
4100 return 0;
4101 if (pci_read_config_word(dev, pm + PCI_PM_CTRL, &value))
4102 return 0;
4103 return value & PCI_PM_CTRL_PME_ENABLE;
4104}
4105
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004106static int __devinit sky2_probe(struct pci_dev *pdev,
4107 const struct pci_device_id *ent)
4108{
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004109 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004110 struct sky2_hw *hw;
Stephen Hemmingere3173832007-02-06 10:45:39 -08004111 int err, using_dac = 0, wol_default;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004112
Stephen Hemminger793b8832005-09-14 16:06:14 -07004113 err = pci_enable_device(pdev);
4114 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004115 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004116 goto err_out;
4117 }
4118
Stephen Hemminger793b8832005-09-14 16:06:14 -07004119 err = pci_request_regions(pdev, DRV_NAME);
4120 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004121 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004122 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004123 }
4124
4125 pci_set_master(pdev);
4126
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004127 if (sizeof(dma_addr_t) > sizeof(u32) &&
4128 !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
4129 using_dac = 1;
4130 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4131 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004132 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4133 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004134 goto err_out_free_regions;
4135 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004136 } else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004137 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4138 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004139 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004140 goto err_out_free_regions;
4141 }
4142 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004143
Stephen Hemmingere3173832007-02-06 10:45:39 -08004144 wol_default = pci_wake_enabled(pdev) ? WAKE_MAGIC : 0;
4145
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004146 err = -ENOMEM;
Stephen Hemminger6aad85d2006-01-17 13:43:18 -08004147 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004148 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004149 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004150 goto err_out_free_regions;
4151 }
4152
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004153 hw->pdev = pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004154
4155 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4156 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004157 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004158 goto err_out_free_hw;
4159 }
4160
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004161#ifdef __BIG_ENDIAN
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004162 /* The sk98lin vendor driver uses hardware byte swapping but
4163 * this driver uses software swapping.
4164 */
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004165 {
4166 u32 reg;
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004167 pci_read_config_dword(pdev,PCI_DEV_REG2, &reg);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004168 reg &= ~PCI_REV_DESC;
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004169 pci_write_config_dword(pdev, PCI_DEV_REG2, reg);
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004170 }
4171#endif
4172
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004173 /* ring for status responses */
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004174 hw->st_le = pci_alloc_consistent(pdev, STATUS_LE_BYTES, &hw->st_dma);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004175 if (!hw->st_le)
4176 goto err_out_iounmap;
4177
Stephen Hemmingere3173832007-02-06 10:45:39 -08004178 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004179 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004180 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004181
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004182 dev_info(&pdev->dev, "v%s addr 0x%llx irq %d Yukon-%s (0x%x) rev %d\n",
Greg Kroah-Hartman7c7459d2006-06-12 15:13:08 -07004183 DRV_VERSION, (unsigned long long)pci_resource_start(pdev, 0),
4184 pdev->irq, yukon2_name[hw->chip_id - CHIP_ID_YUKON_XL],
Stephen Hemminger793b8832005-09-14 16:06:14 -07004185 hw->chip_id, hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004186
Stephen Hemmingere3173832007-02-06 10:45:39 -08004187 sky2_reset(hw);
4188
4189 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004190 if (!dev) {
4191 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004192 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004193 }
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004194 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004195
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004196 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4197 err = sky2_test_msi(hw);
4198 if (err == -EOPNOTSUPP)
4199 pci_disable_msi(pdev);
4200 else if (err)
4201 goto err_out_free_netdev;
4202 }
4203
Stephen Hemminger793b8832005-09-14 16:06:14 -07004204 err = register_netdev(dev);
4205 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004206 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004207 goto err_out_free_netdev;
4208 }
4209
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004210 err = request_irq(pdev->irq, sky2_intr,
4211 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004212 dev->name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004213 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004214 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004215 goto err_out_unregister;
4216 }
4217 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
4218
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004219 sky2_show_addr(dev);
4220
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004221 if (hw->ports > 1) {
4222 struct net_device *dev1;
4223
Stephen Hemmingere3173832007-02-06 10:45:39 -08004224 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004225 if (!dev1)
4226 dev_warn(&pdev->dev, "allocation for second device failed\n");
4227 else if ((err = register_netdev(dev1))) {
4228 dev_warn(&pdev->dev,
4229 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004230 hw->dev[1] = NULL;
4231 free_netdev(dev1);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004232 } else
4233 sky2_show_addr(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004234 }
4235
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004236 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004237 INIT_WORK(&hw->restart_work, sky2_restart);
4238
Stephen Hemminger793b8832005-09-14 16:06:14 -07004239 pci_set_drvdata(pdev, hw);
4240
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004241 return 0;
4242
Stephen Hemminger793b8832005-09-14 16:06:14 -07004243err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004244 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004245 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004246 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004247err_out_free_netdev:
4248 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004249err_out_free_pci:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004250 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004251 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004252err_out_iounmap:
4253 iounmap(hw->regs);
4254err_out_free_hw:
4255 kfree(hw);
4256err_out_free_regions:
4257 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004258err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004259 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004260err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004261 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004262 return err;
4263}
4264
4265static void __devexit sky2_remove(struct pci_dev *pdev)
4266{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004267 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004268 struct net_device *dev0, *dev1;
4269
Stephen Hemminger793b8832005-09-14 16:06:14 -07004270 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004271 return;
4272
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004273 del_timer_sync(&hw->watchdog_timer);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004274
Stephen Hemminger81906792007-02-15 16:40:33 -08004275 flush_scheduled_work();
4276
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004277 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger72cb8522006-05-08 15:11:32 -07004278 synchronize_irq(hw->pdev->irq);
4279
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004280 dev0 = hw->dev[0];
Stephen Hemminger793b8832005-09-14 16:06:14 -07004281 dev1 = hw->dev[1];
4282 if (dev1)
4283 unregister_netdev(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004284 unregister_netdev(dev0);
4285
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004286 sky2_power_aux(hw);
4287
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004288 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004289 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004290 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004291
4292 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004293 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004294 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004295 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004296 pci_release_regions(pdev);
4297 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004298
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004299 if (dev1)
4300 free_netdev(dev1);
4301 free_netdev(dev0);
4302 iounmap(hw->regs);
4303 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004304
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004305 pci_set_drvdata(pdev, NULL);
4306}
4307
4308#ifdef CONFIG_PM
4309static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
4310{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004311 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004312 int i, wol = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004313
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004314 if (!hw)
4315 return 0;
4316
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004317 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004318 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08004319 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004320
Stephen Hemmingere3173832007-02-06 10:45:39 -08004321 if (netif_running(dev))
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004322 sky2_down(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004323
4324 if (sky2->wol)
4325 sky2_wol_init(sky2);
4326
4327 wol |= sky2->wol;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004328 }
4329
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004330 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004331 sky2_power_aux(hw);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004332
Linus Torvaldsd374c1c2006-06-12 12:53:27 -07004333 pci_save_state(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004334 pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004335 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4336
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09004337 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004338}
4339
4340static int sky2_resume(struct pci_dev *pdev)
4341{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004342 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004343 int i, err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004344
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004345 if (!hw)
4346 return 0;
4347
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004348 err = pci_set_power_state(pdev, PCI_D0);
4349 if (err)
4350 goto out;
4351
4352 err = pci_restore_state(pdev);
4353 if (err)
4354 goto out;
4355
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004356 pci_enable_wake(pdev, PCI_D0, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004357
4358 /* Re-enable all clocks */
Stephen Hemminger05745c42007-09-19 15:36:45 -07004359 if (hw->chip_id == CHIP_ID_YUKON_EX ||
4360 hw->chip_id == CHIP_ID_YUKON_EC_U ||
4361 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004362 pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004363
Stephen Hemmingere3173832007-02-06 10:45:39 -08004364 sky2_reset(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004365
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004366 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
4367
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004368 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004369 struct net_device *dev = hw->dev[i];
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07004370 if (netif_running(dev)) {
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004371 err = sky2_up(dev);
4372 if (err) {
4373 printk(KERN_ERR PFX "%s: could not up: %d\n",
4374 dev->name, err);
4375 dev_close(dev);
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004376 goto out;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004377 }
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01004378
4379 sky2_set_multicast(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004380 }
4381 }
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004382
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004383 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004384out:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004385 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004386 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004387 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004388}
4389#endif
4390
Stephen Hemmingere3173832007-02-06 10:45:39 -08004391static void sky2_shutdown(struct pci_dev *pdev)
4392{
4393 struct sky2_hw *hw = pci_get_drvdata(pdev);
4394 int i, wol = 0;
4395
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004396 if (!hw)
4397 return;
4398
Stephen Hemminger5c0d6b32007-10-14 13:25:22 -07004399 del_timer_sync(&hw->watchdog_timer);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004400
4401 for (i = 0; i < hw->ports; i++) {
4402 struct net_device *dev = hw->dev[i];
4403 struct sky2_port *sky2 = netdev_priv(dev);
4404
4405 if (sky2->wol) {
4406 wol = 1;
4407 sky2_wol_init(sky2);
4408 }
4409 }
4410
4411 if (wol)
4412 sky2_power_aux(hw);
4413
4414 pci_enable_wake(pdev, PCI_D3hot, wol);
4415 pci_enable_wake(pdev, PCI_D3cold, wol);
4416
4417 pci_disable_device(pdev);
4418 pci_set_power_state(pdev, PCI_D3hot);
4419
4420}
4421
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004422static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07004423 .name = DRV_NAME,
4424 .id_table = sky2_id_table,
4425 .probe = sky2_probe,
4426 .remove = __devexit_p(sky2_remove),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004427#ifdef CONFIG_PM
Stephen Hemminger793b8832005-09-14 16:06:14 -07004428 .suspend = sky2_suspend,
4429 .resume = sky2_resume,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004430#endif
Stephen Hemmingere3173832007-02-06 10:45:39 -08004431 .shutdown = sky2_shutdown,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004432};
4433
4434static int __init sky2_init_module(void)
4435{
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004436 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08004437 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004438}
4439
4440static void __exit sky2_cleanup_module(void)
4441{
4442 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004443 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004444}
4445
4446module_init(sky2_init_module);
4447module_exit(sky2_cleanup_module);
4448
4449MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe632007-01-23 11:38:57 -08004450MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004451MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08004452MODULE_VERSION(DRV_VERSION);