Gitiles
Code Review Sign In
gerrit-public.fairphone.software / fp2-dev / kernel / msm / 724b2bbe59b9ed526c4dad607e51032774fe1b62 / . / arch / arm / boot / dts / msm8226.dtsi
blob: a6f3aa2f5124f7d3a0fb646cce5caf62df3795d4 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]1/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -0700[diff] [blame]14/include/ "msm8226-ion.dtsi"
Su Liue5bdf002013-03-22 15:33:41 -0700[diff] [blame]15/include/ "msm8226-camera.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]16/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -0700[diff] [blame]17/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]18/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -0700[diff] [blame]19/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -0700[diff] [blame]20/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -0700[diff] [blame]21/include/ "msm8226-bus.dtsi"
Sree Sesha Aravind Vadrevu82a171d2013-02-26 20:17:01 -0800[diff] [blame]22/include/ "msm8226-mdss.dtsi"
Aparna Dasbbee0842013-02-28 21:35:15 -0800[diff] [blame]23/include/ "msm8226-coresight.dtsi"
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]24/include/ "msm8226-iommu-domains.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]25/ {
26 model = "Qualcomm MSM 8226";
27 compatible = "qcom,msm8226";
28 interrupt-parent = <&intc>;
29
30 intc: interrupt-controller@f9000000 {
31 compatible = "qcom,msm-qgic2";
32 interrupt-controller;
33 #interrupt-cells = <3>;
34 reg = <0xF9000000 0x1000>,
35 <0xF9002000 0x1000>;
36 };
37
38 msmgpio: gpio@fd510000 {
39 compatible = "qcom,msm-gpio";
40 interrupt-controller;
41 #interrupt-cells = <2>;
42 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -0800[diff] [blame]43 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]44 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -0800[diff] [blame]45 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -0800[diff] [blame]46 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -0800[diff] [blame]47 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]48 };
49
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]50 aliases {
51 spi0 = &spi_0;
52 };
53
Laura Abbottf3196b22013-03-11 16:22:34 -0700[diff] [blame]54 memory {
55 secure_mem: secure_region {
56 linux,contiguous-region;
57 reg = <0 0x3800000>;
58 label = "secure_mem";
59 };
60 };
61
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]62 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -0800[diff] [blame]63 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]64 interrupts = <1 2 0 1 3 0>;
65 clock-frequency = <19200000>;
66 };
67
Ashray Kulkarnifbf88dbd2013-02-22 18:02:26 -0800[diff] [blame]68 qcom,vidc@fdc00000 {
69 compatible = "qcom,msm-vidc";
70 reg = <0xfdc00000 0xff000>;
71 interrupts = <0 44 0>;
72 qcom,load-freq-tbl = <352800 160000000>,
73 <244800 133330000>,
74 <108000 66700000>;
75 qcom,hfi = "venus";
76 qcom,bus-ports = <1>;
77 qcom,reg-presets = <0xE0024 0x0>,
78 <0x80124 0x3>,
79 <0xE0020 0x5555556>,
80 <0x800B0 0x10101001>,
81 <0x800B4 0x00101010>,
82 <0x800C0 0x1010100f>,
83 <0x800C4 0x00101010>,
84 <0x800D0 0x00000010>,
85 <0x800D4 0x00000010>,
86 <0x800D8 0x00000707>;
87 qcom,enc-ddr-ab-ib = <0 0>,
88 <129000 142000>,
89 <384000 422000>,
90 <866000 953000>;
91 qcom,dec-ddr-ab-ib = <0 0>,
92 <103000 134000>,
93 <268000 348000>,
94 <505000 657000>;
95 qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
96 qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
97 qcom,buffer-type-tz-usage-table = <0x1 0x1>,
98 <0x1fe 0x2>;
99 };
100
101 qcom,wfd {
102 compatible = "qcom,msm-wfd";
103 };
104
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]105 serial@f991f000 {
106 compatible = "qcom,msm-lsuart-v14";
107 reg = <0xf991f000 0x1000>;
108 interrupts = <0 109 0>;
109 status = "disabled";
110 };
111
112 serial@f995e000 {
113 compatible = "qcom,msm-lsuart-v14";
114 reg = <0xf995e000 0x1000>;
115 interrupts = <0 114 0>;
116 status = "disabled";
117 };
118
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -0800[diff] [blame]119 qcom,msm-imem@fe805000 {
120 compatible = "qcom,msm-imem";
121 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
122 };
123
Yan He7c06ce32012-12-03 17:12:31 -0800[diff] [blame]124 qcom,sps@f9984000 {
125 compatible = "qcom,msm_sps";
126 reg = <0xf9984000 0x15000>,
127 <0xf9999000 0xb000>;
128 interrupts = <0 94 0>;
129 };
130
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]131 usb@f9a55000 {
132 compatible = "qcom,hsusb-otg";
133 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +0530[diff] [blame]134 interrupts = <0 134 0>, <0 140 0>;
135 interrupt-names = "core_irq", "async_irq";
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]136 hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]137 HSUSB_1p8-supply = <&pm8226_l10>;
138 HSUSB_3p3-supply = <&pm8226_l20>;
Mayank Rana8335a772013-03-06 10:12:27 +0530[diff] [blame]139 qcom,vdd-voltage-level = <1 5 7>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]140
141 qcom,hsusb-otg-phy-type = <2>;
142 qcom,hsusb-otg-mode = <1>;
Vamsi Krishna0d564102013-03-02 15:26:55 -0800[diff] [blame]143 qcom,hsusb-otg-otg-control = <2>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]144 qcom,hsusb-otg-disable-reset;
Mayank Rana15f01b52013-03-08 18:28:56 +0530[diff] [blame]145 qcom,dp-manual-pullup;
Mayank Rana5403e2a2013-02-26 11:18:39 +0530[diff] [blame]146
147 qcom,msm-bus,name = "usb2";
148 qcom,msm-bus,num-cases = <2>;
149 qcom,msm-bus,active-only = <0>;
150 qcom,msm-bus,num-paths = <1>;
151 qcom,msm-bus,vectors-KBps =
152 <87 512 0 0>,
153 <87 512 60000 960000>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]154 };
155
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]156 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]157 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530[diff] [blame]158 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]159 };
160
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]161 wcd9xxx_intc: wcd9xxx-irq {
162 compatible = "qcom,wcd9xxx-irq";
163 interrupt-controller;
164 #interrupt-cells = <1>;
165 interrupt-parent = <&msmgpio>;
166 interrupts = <68 0>;
167 interrupt-names = "cdc-int";
168 };
169
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]170 slim@fe12f000 {
171 cell-index = <1>;
172 compatible = "qcom,slim-ngd";
173 reg = <0xfe12f000 0x35000>,
174 <0xfe104000 0x20000>;
175 reg-names = "slimbus_physical", "slimbus_bam_physical";
176 interrupts = <0 163 0>, <0 164 0>;
177 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]178
179 tapan_codec {
180 compatible = "qcom,tapan-slim-pgd";
181 elemental-addr = [00 01 E0 00 17 02];
182
183 interrupt-parent = <&wcd9xxx_intc>;
184 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
185 17 18 19 20 21 22 23 24 25 26 27 28>;
186 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
187
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]188 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]189 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
190 qcom,cdc-vdd-buck-current = <650000>;
191
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]192 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]193 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
194 qcom,cdc-vdd-h-current = <25000>;
195
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]196 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]197 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
198 qcom,cdc-vdd-px-current = <25000>;
199
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]200 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]201 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
202 qcom,cdc-vdd-a-1p2v-current = <10000>;
203
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]204 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800[diff] [blame]205 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
206 qcom,cdc-vdd-cx-current = <10000>;
207
208 qcom,cdc-micbias-ldoh-v = <0x3>;
209 qcom,cdc-micbias-cfilt1-mv = <1800>;
210 qcom,cdc-micbias-cfilt2-mv = <1800>;
211 qcom,cdc-micbias-cfilt3-mv = <1800>;
212
213 qcom,cdc-micbias1-cfilt-sel = <0x0>;
214 qcom,cdc-micbias2-cfilt-sel = <0x1>;
215 qcom,cdc-micbias3-cfilt-sel = <0x2>;
216
217 qcom,cdc-mclk-clk-rate = <9600000>;
218 qcom,cdc-slim-ifd = "tapan-slim-ifd";
219 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
220 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800[diff] [blame]221 };
222
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800[diff] [blame]223 qcom,msm-adsp-loader {
224 compatible = "qcom,adsp-loader";
225 qcom,adsp-state = <0>;
226 };
227
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]228 sound {
229 compatible = "qcom,msm8226-audio-tapan";
230 qcom,model = "msm8226-tapan-snd-card";
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]231 qcom,tapan-mclk-clk-freq = <9600000>;
232 };
233
234 qcom,msm-pcm {
235 compatible = "qcom,msm-pcm-dsp";
Bhalchandra Gajare510d4422013-03-01 21:07:12 -0800[diff] [blame]236 qcom,msm-pcm-dsp-id = <0>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]237 };
238
239 qcom,msm-pcm-routing {
240 compatible = "qcom,msm-pcm-routing";
241 };
242
Bhalchandra Gajare18468a62013-03-11 18:32:49 -0700[diff] [blame]243 qcom,msm-pcm-low-latency {
244 compatible = "qcom,msm-pcm-dsp";
245 qcom,msm-pcm-dsp-id = <1>;
246 qcom,msm-pcm-low-latency;
247 };
248
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]249 qcom,msm-pcm-lpa {
250 compatible = "qcom,msm-pcm-lpa";
251 };
252
253 qcom,msm-compr-dsp {
254 compatible = "qcom,msm-compr-dsp";
255 };
256
257 qcom,msm-voip-dsp {
258 compatible = "qcom,msm-voip-dsp";
259 };
260
261 qcom,msm-pcm-voice {
262 compatible = "qcom,msm-pcm-voice";
263 };
264
265 qcom,msm-stub-codec {
266 compatible = "qcom,msm-stub-codec";
267 };
268
269 qcom,msm-dai-fe {
270 compatible = "qcom,msm-dai-fe";
271 };
272
273 qcom,msm-pcm-afe {
274 compatible = "qcom,msm-pcm-afe";
275 };
276
277 qcom,msm-dai-q6-hdmi {
278 compatible = "qcom,msm-dai-q6-hdmi";
279 qcom,msm-dai-q6-dev-id = <8>;
280 };
281
282 qcom,msm-dai-q6 {
283 compatible = "qcom,msm-dai-q6";
284 qcom,msm-dai-q6-sb-0-rx {
285 compatible = "qcom,msm-dai-q6-dev";
286 qcom,msm-dai-q6-dev-id = <16384>;
287 };
288
289 qcom,msm-dai-q6-sb-0-tx {
290 compatible = "qcom,msm-dai-q6-dev";
291 qcom,msm-dai-q6-dev-id = <16385>;
292 };
293
294 qcom,msm-dai-q6-sb-1-rx {
295 compatible = "qcom,msm-dai-q6-dev";
296 qcom,msm-dai-q6-dev-id = <16386>;
297 };
298
299 qcom,msm-dai-q6-sb-1-tx {
300 compatible = "qcom,msm-dai-q6-dev";
301 qcom,msm-dai-q6-dev-id = <16387>;
302 };
303
304 qcom,msm-dai-q6-sb-3-rx {
305 compatible = "qcom,msm-dai-q6-dev";
306 qcom,msm-dai-q6-dev-id = <16390>;
307 };
308
309 qcom,msm-dai-q6-sb-3-tx {
310 compatible = "qcom,msm-dai-q6-dev";
311 qcom,msm-dai-q6-dev-id = <16391>;
312 };
313
314 qcom,msm-dai-q6-sb-4-rx {
315 compatible = "qcom,msm-dai-q6-dev";
316 qcom,msm-dai-q6-dev-id = <16392>;
317 };
318
319 qcom,msm-dai-q6-sb-4-tx {
320 compatible = "qcom,msm-dai-q6-dev";
321 qcom,msm-dai-q6-dev-id = <16393>;
322 };
323
324 qcom,msm-dai-q6-bt-sco-rx {
325 compatible = "qcom,msm-dai-q6-dev";
326 qcom,msm-dai-q6-dev-id = <12288>;
327 };
328
329 qcom,msm-dai-q6-bt-sco-tx {
330 compatible = "qcom,msm-dai-q6-dev";
331 qcom,msm-dai-q6-dev-id = <12289>;
332 };
333
334 qcom,msm-dai-q6-int-fm-rx {
335 compatible = "qcom,msm-dai-q6-dev";
336 qcom,msm-dai-q6-dev-id = <12292>;
337 };
338
339 qcom,msm-dai-q6-int-fm-tx {
340 compatible = "qcom,msm-dai-q6-dev";
341 qcom,msm-dai-q6-dev-id = <12293>;
342 };
343
344 qcom,msm-dai-q6-be-afe-pcm-rx {
345 compatible = "qcom,msm-dai-q6-dev";
346 qcom,msm-dai-q6-dev-id = <224>;
347 };
348
349 qcom,msm-dai-q6-be-afe-pcm-tx {
350 compatible = "qcom,msm-dai-q6-dev";
351 qcom,msm-dai-q6-dev-id = <225>;
352 };
353
354 qcom,msm-dai-q6-afe-proxy-rx {
355 compatible = "qcom,msm-dai-q6-dev";
356 qcom,msm-dai-q6-dev-id = <241>;
357 };
358
359 qcom,msm-dai-q6-afe-proxy-tx {
360 compatible = "qcom,msm-dai-q6-dev";
361 qcom,msm-dai-q6-dev-id = <240>;
362 };
Vicky Sehrawat2ef554c2013-03-12 17:24:20 -0700[diff] [blame]363
364 qcom,msm-dai-q6-incall-record-rx {
365 compatible = "qcom,msm-dai-q6-dev";
366 qcom,msm-dai-q6-dev-id = <32771>;
367 };
368
369 qcom,msm-dai-q6-incall-record-tx {
370 compatible = "qcom,msm-dai-q6-dev";
371 qcom,msm-dai-q6-dev-id = <32772>;
372 };
373
374 qcom,msm-dai-q6-incall-music-rx {
375 compatible = "qcom,msm-dai-q6-dev";
376 qcom,msm-dai-q6-dev-id = <32773>;
377 };
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]378 };
379
380 qcom,msm-pcm-hostless {
381 compatible = "qcom,msm-pcm-hostless";
382 };
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]383 qcom,pronto@fb21b000 {
384 compatible = "qcom,pil-pronto";
385 reg = <0xfb21b000 0x3000>,
386 <0xfc401700 0x4>,
387 <0xfd485300 0xc>;
388 reg-names = "pmu_base", "clk_base", "halt_base";
389 interrupts = <0 149 1>;
390 vdd_pronto_pll-supply = <&pm8226_l12>;
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800[diff] [blame]391
Sheng Fangb6a06482013-03-20 13:21:36 +0800[diff] [blame]392 qcom,firmware-name = "wcnss";
393 };
394 qcom,wcnss-wlan@fb000000 {
395 compatible = "qcom,wcnss_wlan";
396 reg = <0xfb000000 0x280000>;
397 reg-names = "wcnss_mmio";
398 interrupts = <0 145 0 0 146 0>;
399 interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq";
400
401 qcom,pronto-vddmx-supply = <&pm8226_l3>;
402 qcom,pronto-vddcx-supply = <&pm8226_s1>;
403 qcom,pronto-vddpx-supply = <&pm8226_l6>;
404 qcom,iris-vddxo-supply = <&pm8226_l10>;
405 qcom,iris-vddrfa-supply = <&pm8226_l24>;
406 qcom,iris-vddpa-supply = <&pm8226_l16>;
407 qcom,iris-vdddig-supply = <&pm8226_l24>;
408
409 gpios = <&msmgpio 40 0>, <&msmgpio 41 0>, <&msmgpio 42 0>, <&msmgpio 43 0>, <&msmgpio 44 0>;
410 qcom,has_pronto_hw;
411 };
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]412 qcom,wdt@f9017000 {
413 compatible = "qcom,msm-watchdog";
414 reg = <0xf9017000 0x1000>;
415 interrupts = <0 3 0>, <0 4 0>;
416 qcom,bark-time = <11000>;
417 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800[diff] [blame]418 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700[diff] [blame]419 };
420
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]421 qcom,smem@fa00000 {
422 compatible = "qcom,smem";
423 reg = <0xfa00000 0x200000>,
Stepan Moskovchenkod6ee8262013-02-06 11:26:05 -0800[diff] [blame]424 <0xf9011000 0x1000>,
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]425 <0xfc428000 0x4000>;
426 reg-names = "smem", "irq-reg-base", "aux-mem1";
427
428 qcom,smd-modem {
429 compatible = "qcom,smd";
430 qcom,smd-edge = <0>;
431 qcom,smd-irq-offset = <0x8>;
432 qcom,smd-irq-bitmask = <0x1000>;
433 qcom,pil-string = "modem";
434 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]435 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]436
437 qcom,smsm-modem {
438 compatible = "qcom,smsm";
439 qcom,smsm-edge = <0>;
440 qcom,smsm-irq-offset = <0x8>;
441 qcom,smsm-irq-bitmask = <0x2000>;
442 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]443 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]444
445 qcom,smd-adsp {
446 compatible = "qcom,smd";
447 qcom,smd-edge = <1>;
448 qcom,smd-irq-offset = <0x8>;
449 qcom,smd-irq-bitmask = <0x100>;
450 qcom,pil-string = "adsp";
451 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]452 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]453
454 qcom,smsm-adsp {
455 compatible = "qcom,smsm";
456 qcom,smsm-edge = <1>;
457 qcom,smsm-irq-offset = <0x8>;
458 qcom,smsm-irq-bitmask = <0x200>;
459 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]460 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]461
462 qcom,smd-wcnss {
463 compatible = "qcom,smd";
464 qcom,smd-edge = <6>;
465 qcom,smd-irq-offset = <0x8>;
466 qcom,smd-irq-bitmask = <0x20000>;
467 qcom,pil-string = "wcnss";
468 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]469 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]470
471 qcom,smsm-wcnss {
472 compatible = "qcom,smsm";
473 qcom,smsm-edge = <6>;
474 qcom,smsm-irq-offset = <0x8>;
475 qcom,smsm-irq-bitmask = <0x80000>;
476 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]477 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]478
479 qcom,smd-rpm {
480 compatible = "qcom,smd";
481 qcom,smd-edge = <15>;
482 qcom,smd-irq-offset = <0x8>;
483 qcom,smd-irq-bitmask = <0x1>;
484 interrupts = <0 168 1>;
485 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800[diff] [blame]486 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600[diff] [blame]487 };
488
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]489 rpm_bus: qcom,rpm-smd {
490 compatible = "qcom,rpm-smd";
491 rpm-channel-name = "rpm_requests";
492 rpm-channel-type = <15>; /* SMD_APPS_RPM */
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700[diff] [blame]493 };
494
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]495 sdcc1: qcom,sdcc@f9824000 {
496 cell-index = <1>; /* SDC1 eMMC slot */
497 compatible = "qcom,msm-sdcc";
498
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]499 reg = <0xf9824000 0x800>,
500 <0xf9824800 0x100>,
501 <0xf9804000 0x7000>;
502 reg-names = "core_mem", "dml_mem", "bam_mem";
503 interrupts = <0 123 0>, <0 137 0>;
504 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]505
506 qcom,bus-width = <8>;
507 status = "disabled";
508 };
509
510 sdcc2: qcom,sdcc@f98a4000 {
511 cell-index = <2>; /* SDC2 SD card slot */
512 compatible = "qcom,msm-sdcc";
513
Asutosh Das6b82fc52012-11-23 12:00:26 +0530[diff] [blame]514 reg = <0xf98a4000 0x800>,
515 <0xf98a4800 0x100>,
516 <0xf9884000 0x7000>;
517 reg-names = "core_mem", "dml_mem", "bam_mem";
518 interrupts = <0 125 0>, <0 220 0>;
519 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530[diff] [blame]520
521 qcom,bus-width = <4>;
522 status = "disabled";
523 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]524
525 spmi_bus: qcom,spmi@fc4c0000 {
526 cell-index = <0>;
527 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]528 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]529 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700[diff] [blame]530 <0Xfc4cb000 0x1000>,
531 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]532 /* 190,ee0_krait_hlos_spmi_periph_irq */
533 /* 187,channel_0_krait_hlos_trans_done_irq */
534 interrupts = <0 190 0>, <0 187 0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]535 qcom,pmic-arb-ee = <0>;
536 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700[diff] [blame]537 };
538
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700[diff] [blame]539 i2c@f9926000 { /* BLSP-1 QUP-4 */
540 cell-index = <0>;
541 compatible = "qcom,i2c-qup";
542 reg = <0xf9926000 0x1000>;
543 #address-cells = <1>;
544 #size-cells = <0>;
545 reg-names = "qup_phys_addr";
546 interrupts = <0 98 0>;
547 interrupt-names = "qup_err_intr";
548 qcom,i2c-bus-freq = <100000>;
549 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]550
Amy Maloche41708ba2013-03-03 15:19:27 -0800[diff] [blame]551 i2c@f9927000 { /* BLSP1 QUP5 */
552 cell-index = <5>;
553 compatible = "qcom,i2c-qup";
554 #address-cells = <1>;
555 #size-cells = <0>;
556 reg-names = "qup_phys_addr";
557 reg = <0xf9927000 0x1000>;
558 interrupt-names = "qup_err_intr";
559 interrupts = <0 99 0>;
560 qcom,i2c-bus-freq = <100000>;
561 qcom,i2c-src-freq = <19200000>;
562 };
563
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]564 qcom,acpuclk@f9011050 {
565 compatible = "qcom,acpuclk-a7";
566 reg = <0xf9011050 0x8>;
567 reg-names = "rcg_base";
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]568 a7_cpu-supply = <&pm8226_s2>;
569 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700[diff] [blame]570 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]571
572 qcom,ocmem@fdd00000 {
573 compatible = "qcom,msm-ocmem";
574 reg = <0xfdd00000 0x2000>,
575 <0xfdd02000 0x2000>,
576 <0xfe039000 0x400>,
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]577 <0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]578 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
579 interrupts = <0 76 0 0 77 0>;
580 interrupt-names = "ocmem_irq", "dm_irq";
581 qcom,ocmem-num-regions = <0x1>;
582 qcom,ocmem-num-macros = <0x2>;
583 qcom,resource-type = <0x706d636f>;
584 #address-cells = <1>;
585 #size-cells = <1>;
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]586 ranges = <0x0 0xfec00000 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]587
588 partition@0 {
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]589 reg = <0x0 0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]590 qcom,ocmem-part-name = "graphics";
Mitchel Humpherys1da744d2013-03-08 17:20:41 -0800[diff] [blame]591 qcom,ocmem-part-min = <0x20000>;
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700[diff] [blame]592 };
593 };
594
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800[diff] [blame]595 qcom,venus@fdce0000 {
596 compatible = "qcom,pil-venus";
597 reg = <0xfdce0000 0x4000>,
598 <0xfdc80000 0x400>;
599 reg-names = "wrapper_base", "vbif_base";
600 vdd-supply = <&gdsc_venus>;
601
602 qcom,firmware-name = "venus";
603 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]604
605 qcom,pronto@fb21b000 {
606 compatible = "qcom,pil-pronto";
607 reg = <0xfb21b000 0x3000>,
608 <0xfc401700 0x4>,
609 <0xfd485300 0xc>;
610 reg-names = "pmu_base", "clk_base", "halt_base";
611 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]612 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800[diff] [blame]613
614 qcom,firmware-name = "wcnss";
615 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]616
Sheng Fang0a85b0d2013-03-19 08:16:51 +0800[diff] [blame]617 qcom,iris-fm {
618 compatible = "qcom,iris_fm";
619 };
620
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]621 qcom,lpass@fe200000 {
622 compatible = "qcom,pil-q6v5-lpass";
623 reg = <0xfe200000 0x00100>,
Matt Wagantall015b50af2013-03-05 18:51:16 -0800[diff] [blame]624 <0xfd485100 0x00010>,
625 <0xfc4016c0 0x00004>;
626 reg-names = "qdsp6_base", "halt_base", "restart_reg";
David Keitelf4c8b8b2013-02-25 15:25:27 -0800[diff] [blame]627 vdd_cx-supply = <&pm8226_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800[diff] [blame]628 interrupts = <0 162 1>;
629
630 qcom,firmware-name = "adsp";
631 };
632
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]633 qcom,mss@fc880000 {
634 compatible = "qcom,pil-q6v5-mss";
635 reg = <0xfc880000 0x100>,
636 <0xfd485000 0x400>,
637 <0xfc820000 0x020>,
638 <0xfc401680 0x004>,
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]639 <0xfd485194 0x4>;
640 reg-names = "qdsp6_base", "halt_base", "rmb_base",
Matt Wagantall724b2bb2013-03-18 14:54:06 -0700[diff] [blame^]641 "restart_reg", "cxrail_bhs_reg";
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]642
643 interrupts = <0 24 1>;
644 vdd_mss-supply = <&pm8226_s1>;
645 vdd_cx-supply = <&pm8226_s1_corner>;
646 vdd_mx-supply = <&pm8226_l3>;
647 vdd_pll-supply = <&pm8226_l8>;
648 qcom,vdd_pll = <1800000>;
649
650 qcom,is-loadable;
651 qcom,firmware-name = "mba";
652 qcom,pil-self-auth;
Patrick Dalyfe258e22013-03-22 21:02:14 -0700[diff] [blame]653
654 /* GPIO input from mss */
655 qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>;
656
657 /* GPIO output to mss */
658 qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>;
Patrick Daly742337f2013-01-29 12:06:06 -0800[diff] [blame]659 };
660
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]661 qcom,msm-mem-hole {
662 compatible = "qcom,msm-mem-hole";
Neeti Desaif5756012013-02-25 17:56:35 -0800[diff] [blame]663 qcom,memblock-remove = <0x8400000 0x7b00000>; /* Address and Size of Hole */
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800[diff] [blame]664 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]665
666 tsens: tsens@fc4a8000 {
667 compatible = "qcom,msm-tsens";
668 reg = <0xfc4a8000 0x2000>,
669 <0xfc4b8000 0x1000>;
670 reg-names = "tsens_physical", "tsens_eeprom_physical";
671 interrupts = <0 184 0>;
Siddartha Mohanadoss9a4e94a2013-03-06 19:15:59 -0800[diff] [blame]672 qcom,sensors = <4>;
673 qcom,slope = <2901 2846 3038 2955>;
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800[diff] [blame]674 qcom,calib-mode = "fuse_map2";
675 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700[diff] [blame]676
677 qcom,msm-thermal {
678 compatible = "qcom,msm-thermal";
679 qcom,sensor-id = <0>;
680 qcom,poll-ms = <250>;
681 qcom,limit-temp = <60>;
682 qcom,temp-hysteresis = <10>;
683 qcom,freq-step = <2>;
684 };
685
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]686 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
687 compatible = "qcom,spi-qup-v2";
688 #address-cells = <1>;
689 #size-cells = <0>;
690 reg-names = "spi_physical", "spi_bam_physical";
691 reg = <0xf9923000 0x1000>,
692 <0xf9904000 0xF000>;
693 interrupt-names = "spi_irq", "spi_bam_irq";
694 interrupts = <0 95 0>, <0 238 0>;
695 spi-max-frequency = <19200000>;
696
697 gpios = <&msmgpio 3 0>, /* CLK */
698 <&msmgpio 1 0>, /* MISO */
699 <&msmgpio 0 0>; /* MOSI */
aiqunyb1e82f32013-03-13 15:35:53 -0700[diff] [blame]700 cs-gpios = <&msmgpio 22 0>;
Gilad Avidovd59217c2013-02-01 13:45:59 -0700[diff] [blame]701
702 qcom,infinite-mode = <0>;
703 qcom,use-bam;
704 qcom,ver-reg-exists;
705 qcom,bam-consumer-pipe-index = <12>;
706 qcom,bam-producer-pipe-index = <13>;
707 };
708
Jeff Hugo72e10912013-03-05 11:17:38 -0700[diff] [blame]709 qcom,bam_dmux@fc834000 {
710 compatible = "qcom,bam_dmux";
711 reg = <0xfc834000 0x7000>;
712 interrupts = <0 29 1>;
713 };
Pushkar Joshi4f3aa0b2013-03-07 22:44:04 -0800[diff] [blame]714
715 qcom,msm-rtb {
716 compatible = "qcom,msm-rtb";
717 qcom,memory-reservation-type = "EBI1";
718 qcom,memory-reservation-size = <0x100000>; /* 1M EBI1 buffer */
719 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]720
Hariprasad Dhalinarasimhab548ee52013-03-11 19:06:30 -0700[diff] [blame]721 qcom,msm-rng@f9bff000 {
722 compatible = "qcom,msm-rng";
723 reg = <0xf9bff000 0x200>;
724 qcom,msm-rng-iface-clk;
725 };
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]726
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]727 qcom,tz-log@fe805720 {
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]728 compatible = "qcom,tz-log";
Hariprasad Dhalinarasimha4ba4d802013-03-21 13:03:09 -0700[diff] [blame]729 reg = <0x0fe805720 0x1000>;
Hariprasad Dhalinarasimhaadf89cc2013-03-13 13:41:05 -0700[diff] [blame]730 };
Pushkar Joshi85a53192013-03-11 11:15:15 -0700[diff] [blame]731
732 jtag_mm0: jtagmm@fc33c000 {
733 compatible = "qcom,jtag-mm";
734 reg = <0xfc33c000 0x1000>,
735 <0xfc330000 0x1000>;
736 reg-names = "etm-base","debug-base";
737 };
738
739 jtag_mm1: jtagmm@fc33d000 {
740 compatible = "qcom,jtag-mm";
741 reg = <0xfc33d000 0x1000>,
742 <0xfc332000 0x1000>;
743 reg-names = "etm-base","debug-base";
744 };
745
746 jtag_mm2: jtagmm@fc33e000 {
747 compatible = "qcom,jtag-mm";
748 reg = <0xfc33e000 0x1000>,
749 <0xfc334000 0x1000>;
750 reg-names = "etm-base","debug-base";
751 };
752
753 jtag_mm3: jtagmm@fc33f000 {
754 compatible = "qcom,jtag-mm";
755 reg = <0xfc33f000 0x1000>,
756 <0xfc336000 0x1000>;
757 reg-names = "etm-base","debug-base";
758 };
Jeff Hugo2be6bb022013-03-11 10:17:34 -0600[diff] [blame]759
760 qcom,ipc-spinlock@fd484000 {
761 compatible = "qcom,ipc-spinlock-sfpb";
762 reg = <0xfd484000 0x400>;
763 qcom,num-locks = <8>;
764 };
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700[diff] [blame]765};
David Collins37ddb972012-10-17 15:00:26 -0700[diff] [blame]766
Patrick Dalye8977aa2012-11-06 15:25:58 -0800[diff] [blame]767&gdsc_venus {
768 status = "ok";
769};
770
771&gdsc_mdss {
772 status = "ok";
773};
774
775&gdsc_jpeg {
776 status = "ok";
777};
778
779&gdsc_vfe {
780 status = "ok";
781};
782
783&gdsc_oxili_cx {
784 status = "ok";
785};
786
787&gdsc_usb_hsic {
788 status = "ok";
789};
790
David Keitel376b2682013-03-05 18:40:01 -0800[diff] [blame]791/include/ "msm-pm8226-rpm-regulator.dtsi"
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700[diff] [blame]792/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800[diff] [blame]793/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]794
795&pm8226_vadc {
796 chan@0 {
797 label = "usb_in";
798 reg = <0>;
799 qcom,decimation = <0>;
800 qcom,pre-div-channel-scaling = <4>;
801 qcom,calibration-type = "absolute";
802 qcom,scale-function = <0>;
803 qcom,hw-settle-time = <0>;
804 qcom,fast-avg-setup = <0>;
805 };
806
807 chan@2 {
808 label = "vchg_sns";
809 reg = <2>;
810 qcom,decimation = <0>;
811 qcom,pre-div-channel-scaling = <3>;
812 qcom,calibration-type = "absolute";
813 qcom,scale-function = <0>;
814 qcom,hw-settle-time = <0>;
815 qcom,fast-avg-setup = <0>;
816 };
817
818 chan@5 {
819 label = "vcoin";
820 reg = <5>;
821 qcom,decimation = <0>;
822 qcom,pre-div-channel-scaling = <1>;
823 qcom,calibration-type = "absolute";
824 qcom,scale-function = <0>;
825 qcom,hw-settle-time = <0>;
826 qcom,fast-avg-setup = <0>;
827 };
828
829 chan@6 {
830 label = "vbat_sns";
831 reg = <6>;
832 qcom,decimation = <0>;
833 qcom,pre-div-channel-scaling = <1>;
834 qcom,calibration-type = "absolute";
835 qcom,scale-function = <0>;
836 qcom,hw-settle-time = <0>;
837 qcom,fast-avg-setup = <0>;
838 };
839
840 chan@7 {
841 label = "vph_pwr";
842 reg = <7>;
843 qcom,decimation = <0>;
844 qcom,pre-div-channel-scaling = <1>;
845 qcom,calibration-type = "absolute";
846 qcom,scale-function = <0>;
847 qcom,hw-settle-time = <0>;
848 qcom,fast-avg-setup = <0>;
849 };
850
851 chan@30 {
852 label = "batt_therm";
853 reg = <0x30>;
854 qcom,decimation = <0>;
855 qcom,pre-div-channel-scaling = <0>;
856 qcom,calibration-type = "ratiometric";
857 qcom,scale-function = <1>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]858 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]859 qcom,fast-avg-setup = <0>;
860 };
861
862 chan@31 {
863 label = "batt_id";
864 reg = <0x31>;
865 qcom,decimation = <0>;
866 qcom,pre-div-channel-scaling = <0>;
867 qcom,calibration-type = "ratiometric";
868 qcom,scale-function = <0>;
869 qcom,hw-settle-time = <2>;
870 qcom,fast-avg-setup = <0>;
871 };
872
873 chan@b2 {
874 label = "xo_therm_pu2";
875 reg = <0xb2>;
876 qcom,decimation = <0>;
877 qcom,pre-div-channel-scaling = <0>;
878 qcom,calibration-type = "ratiometric";
879 qcom,scale-function = <4>;
Siddartha Mohanadoss74cece62013-02-22 10:07:30 -0800[diff] [blame]880 qcom,hw-settle-time = <2>;
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]881 qcom,fast-avg-setup = <0>;
882 };
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]883
884};
885
886&pm8226_chg {
887 status = "ok";
888
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]889 qcom,chg-chgr@1000 {
890 status = "ok";
891 };
892
893 qcom,chg-buck@1100 {
894 status = "ok";
895 };
896
Fenglin Wu009098a2013-03-08 15:50:51 -0800[diff] [blame]897 qcom,chg-bat-if@1200 {
898 status = "ok";
899 };
900
David Keitelc51a7e52013-03-02 00:14:48 -0800[diff] [blame]901 qcom,chg-usb-chgpth@1300 {
902 status = "ok";
903 };
904
905 qcom,chg-boost@1500 {
906 status = "ok";
907 };
908
909 qcom,chg-misc@1600 {
910 status = "ok";
911 };
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800[diff] [blame]912};