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gerrit-public.fairphone.software / fp2-dev / kernel / msm / 810f613c03a1614c71a2b27859e91ae155bd659f / . / arch / arm / mach-s3c6400 / include / mach / map.h
blob: 3e17adf3a89baf92d50630f4482a5ff3d3b5f302 [file] [log] [blame]
Ben Dooksdcb09022008-10-21 14:06:42 +0100[diff] [blame]1/* linux/arch/arm/mach-s3c6400/include/mach/map.h
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * http://armlinux.simtec.co.uk/
6 * Ben Dooks <ben@simtec.co.uk>
7 *
8 * S3C64XX - Memory map definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#ifndef __ASM_ARCH_MAP_H
16#define __ASM_ARCH_MAP_H __FILE__
17
18#include <plat/map-base.h>
19
Andy Greena7c91942009-12-29 14:40:23 +0000[diff] [blame]20/*
21 * Post-mux Chip Select Regions Xm0CSn_
22 * These may be used by SROM, NAND or CF depending on settings
23 */
24
25#define S3C64XX_PA_XM0CSN0 (0x10000000)
26#define S3C64XX_PA_XM0CSN1 (0x18000000)
27#define S3C64XX_PA_XM0CSN2 (0x20000000)
28#define S3C64XX_PA_XM0CSN3 (0x28000000)
29#define S3C64XX_PA_XM0CSN4 (0x30000000)
30#define S3C64XX_PA_XM0CSN5 (0x38000000)
31
Ben Dooks5b323c72008-10-31 16:14:28 +0000[diff] [blame]32/* HSMMC units */
33#define S3C64XX_PA_HSMMC(x) (0x7C200000 + ((x) * 0x100000))
34#define S3C64XX_PA_HSMMC0 S3C64XX_PA_HSMMC(0)
35#define S3C64XX_PA_HSMMC1 S3C64XX_PA_HSMMC(1)
36#define S3C64XX_PA_HSMMC2 S3C64XX_PA_HSMMC(2)
37
Ben Dooksdcb09022008-10-21 14:06:42 +0100[diff] [blame]38#define S3C_PA_UART (0x7F005000)
39#define S3C_PA_UART0 (S3C_PA_UART + 0x00)
40#define S3C_PA_UART1 (S3C_PA_UART + 0x400)
41#define S3C_PA_UART2 (S3C_PA_UART + 0x800)
42#define S3C_PA_UART3 (S3C_PA_UART + 0xC00)
43#define S3C_UART_OFFSET (0x400)
44
Ben Dooks3e694d42008-10-21 14:07:05 +0100[diff] [blame]45/* See notes on UART VA mapping in debug-macro.S */
46#define S3C_VA_UARTx(x) (S3C_VA_UART + (S3C_PA_UART & 0xfffff) + ((x) * S3C_UART_OFFSET))
47
48#define S3C_VA_UART0 S3C_VA_UARTx(0)
49#define S3C_VA_UART1 S3C_VA_UARTx(1)
50#define S3C_VA_UART2 S3C_VA_UARTx(2)
51#define S3C_VA_UART3 S3C_VA_UARTx(3)
52
Andy Green810f6132009-12-29 14:40:30 +0000[diff] [blame^]53#define S3C64XX_PA_SROM (0x70000000)
54
Peter Korsgaard14077ea2009-07-01 17:47:06 +0200[diff] [blame]55#define S3C64XX_PA_NAND (0x70200000)
Ben Dooks58435f72008-11-19 15:41:31 +0000[diff] [blame]56#define S3C64XX_PA_FB (0x77100000)
Ben Dooksf0e1fa72009-05-16 22:05:27 +0100[diff] [blame]57#define S3C64XX_PA_USB_HSOTG (0x7C000000)
Ben Dooks543899f2009-05-17 23:40:30 +0100[diff] [blame]58#define S3C64XX_PA_WATCHDOG (0x7E004000)
Maurus Cuelenaere20609092010-01-12 01:40:14 +0100[diff] [blame]59#define S3C64XX_PA_RTC (0x7E005000)
Maurus Cuelenaerebcedfa92010-01-14 00:30:34 +0100[diff] [blame]60#define S3C64XX_PA_ADC (0x7E00B000)
Ben Dooksbeda30f2008-10-21 14:06:49 +0100[diff] [blame]61#define S3C64XX_PA_SYSCON (0x7E00F000)
Mark Brownc7c8f612009-08-05 18:21:59 +0100[diff] [blame]62#define S3C64XX_PA_AC97 (0x7F001000)
Ben Dooks5ef316f2009-02-03 23:48:54 +0000[diff] [blame]63#define S3C64XX_PA_IIS0 (0x7F002000)
64#define S3C64XX_PA_IIS1 (0x7F003000)
Ben Dooksdcb09022008-10-21 14:06:42 +0100[diff] [blame]65#define S3C64XX_PA_TIMER (0x7F006000)
Ben Dooks3e1b7762008-10-31 16:14:40 +0000[diff] [blame]66#define S3C64XX_PA_IIC0 (0x7F004000)
Jassi Brar93f85132009-11-17 16:53:38 +0900[diff] [blame]67#define S3C64XX_PA_PCM0 (0x7F009000)
68#define S3C64XX_PA_PCM1 (0x7F00A000)
Mark Brown25b15da2009-08-04 16:25:12 +0100[diff] [blame]69#define S3C64XX_PA_IISV4 (0x7F00D000)
Ben Dooks1aba8342008-10-31 16:14:55 +0000[diff] [blame]70#define S3C64XX_PA_IIC1 (0x7F00F000)
Ben Dooksdcb09022008-10-21 14:06:42 +0100[diff] [blame]71
Ben Dooks94df8682008-10-21 14:07:07 +0100[diff] [blame]72#define S3C64XX_PA_GPIO (0x7F008000)
Ben Dookse13cf032009-07-30 23:23:35 +0100[diff] [blame]73#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
Ben Dooks94df8682008-10-21 14:07:07 +0100[diff] [blame]74#define S3C64XX_SZ_GPIO SZ_4K
75
Ben Dooksdcb09022008-10-21 14:06:42 +0100[diff] [blame]76#define S3C64XX_PA_SDRAM (0x50000000)
77#define S3C64XX_PA_VIC0 (0x71200000)
78#define S3C64XX_PA_VIC1 (0x71300000)
79
Ben Dooks5b3d5152008-12-12 00:24:38 +0000[diff] [blame]80#define S3C64XX_PA_MODEM (0x74108000)
Ben Dookse13cf032009-07-30 23:23:35 +0100[diff] [blame]81#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
Ben Dooks5b3d5152008-12-12 00:24:38 +0000[diff] [blame]82
Ben Dooks67b3e542009-03-06 19:51:51 +0000[diff] [blame]83#define S3C64XX_PA_USBHOST (0x74300000)
84
Maurus Cuelenaere23196a42009-11-20 13:04:08 +0100[diff] [blame]85#define S3C64XX_PA_USB_HSPHY (0x7C100000)
86#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
87
Ben Dooksdcb09022008-10-21 14:06:42 +0100[diff] [blame]88/* place VICs close together */
Ben Dooks5b39be42010-01-07 08:59:26 +0900[diff] [blame]89#define VA_VIC0 (S3C_VA_IRQ + 0x00)
90#define VA_VIC1 (S3C_VA_IRQ + 0x10000)
Ben Dooksdcb09022008-10-21 14:06:42 +0100[diff] [blame]91
92/* compatibiltiy defines. */
93#define S3C_PA_TIMER S3C64XX_PA_TIMER
Ben Dooks5b323c72008-10-31 16:14:28 +0000[diff] [blame]94#define S3C_PA_HSMMC0 S3C64XX_PA_HSMMC0
95#define S3C_PA_HSMMC1 S3C64XX_PA_HSMMC1
96#define S3C_PA_HSMMC2 S3C64XX_PA_HSMMC2
Ben Dooks3e1b7762008-10-31 16:14:40 +0000[diff] [blame]97#define S3C_PA_IIC S3C64XX_PA_IIC0
Ben Dooks1aba8342008-10-31 16:14:55 +0000[diff] [blame]98#define S3C_PA_IIC1 S3C64XX_PA_IIC1
Peter Korsgaard14077ea2009-07-01 17:47:06 +0200[diff] [blame]99#define S3C_PA_NAND S3C64XX_PA_NAND
Ben Dooks58435f72008-11-19 15:41:31 +0000[diff] [blame]100#define S3C_PA_FB S3C64XX_PA_FB
Ben Dooks67b3e542009-03-06 19:51:51 +0000[diff] [blame]101#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
Ben Dooksf0e1fa72009-05-16 22:05:27 +0100[diff] [blame]102#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
Maurus Cuelenaere23196a42009-11-20 13:04:08 +0100[diff] [blame]103#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
Ben Dooksdcb09022008-10-21 14:06:42 +0100[diff] [blame]104
105#endif /* __ASM_ARCH_6400_MAP_H */