blob: 07e5b5d877b6c755f87dde31181e45d4cda8ca4a [file] [log] [blame]
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001/*
2 * Copyright (c) 2008 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/* mac80211 and PCI callbacks */
18
19#include <linux/nl80211.h>
20#include "core.h"
21
22#define ATH_PCI_VERSION "0.1"
23
24#define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13
Luis R. Rodriguezf078f202008-08-04 00:16:41 -070025
26static char *dev_info = "ath9k";
27
28MODULE_AUTHOR("Atheros Communications");
29MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
30MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
31MODULE_LICENSE("Dual BSD/GPL");
32
33static struct pci_device_id ath_pci_id_table[] __devinitdata = {
34 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
35 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
36 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
37 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
38 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
39 { 0 }
40};
41
42static int ath_get_channel(struct ath_softc *sc,
43 struct ieee80211_channel *chan)
44{
45 int i;
46
47 for (i = 0; i < sc->sc_ah->ah_nchan; i++) {
48 if (sc->sc_ah->ah_channels[i].channel == chan->center_freq)
49 return i;
50 }
51
52 return -1;
53}
54
55static u32 ath_get_extchanmode(struct ath_softc *sc,
56 struct ieee80211_channel *chan)
57{
58 u32 chanmode = 0;
59 u8 ext_chan_offset = sc->sc_ht_info.ext_chan_offset;
60 enum ath9k_ht_macmode tx_chan_width = sc->sc_ht_info.tx_chan_width;
61
62 switch (chan->band) {
63 case IEEE80211_BAND_2GHZ:
64 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
65 (tx_chan_width == ATH9K_HT_MACMODE_20))
66 chanmode = CHANNEL_G_HT20;
67 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
68 (tx_chan_width == ATH9K_HT_MACMODE_2040))
69 chanmode = CHANNEL_G_HT40PLUS;
70 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
71 (tx_chan_width == ATH9K_HT_MACMODE_2040))
72 chanmode = CHANNEL_G_HT40MINUS;
73 break;
74 case IEEE80211_BAND_5GHZ:
75 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_NONE) &&
76 (tx_chan_width == ATH9K_HT_MACMODE_20))
77 chanmode = CHANNEL_A_HT20;
78 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_ABOVE) &&
79 (tx_chan_width == ATH9K_HT_MACMODE_2040))
80 chanmode = CHANNEL_A_HT40PLUS;
81 if ((ext_chan_offset == IEEE80211_HT_IE_CHA_SEC_BELOW) &&
82 (tx_chan_width == ATH9K_HT_MACMODE_2040))
83 chanmode = CHANNEL_A_HT40MINUS;
84 break;
85 default:
86 break;
87 }
88
89 return chanmode;
90}
91
92
93static int ath_setkey_tkip(struct ath_softc *sc,
94 struct ieee80211_key_conf *key,
95 struct ath9k_keyval *hk,
96 const u8 *addr)
97{
98 u8 *key_rxmic = NULL;
99 u8 *key_txmic = NULL;
100
101 key_txmic = key->key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
102 key_rxmic = key->key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
103
104 if (addr == NULL) {
105 /* Group key installation */
106 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
107 return ath_keyset(sc, key->keyidx, hk, addr);
108 }
109 if (!sc->sc_splitmic) {
110 /*
111 * data key goes at first index,
112 * the hal handles the MIC keys at index+64.
113 */
114 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
115 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
116 return ath_keyset(sc, key->keyidx, hk, addr);
117 }
118 /*
119 * TX key goes at first index, RX key at +32.
120 * The hal handles the MIC keys at index+64.
121 */
122 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
123 if (!ath_keyset(sc, key->keyidx, hk, NULL)) {
124 /* Txmic entry failed. No need to proceed further */
125 DPRINTF(sc, ATH_DBG_KEYCACHE,
126 "%s Setting TX MIC Key Failed\n", __func__);
127 return 0;
128 }
129
130 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
131 /* XXX delete tx key on failure? */
132 return ath_keyset(sc, key->keyidx+32, hk, addr);
133}
134
135static int ath_key_config(struct ath_softc *sc,
136 const u8 *addr,
137 struct ieee80211_key_conf *key)
138{
139 struct ieee80211_vif *vif;
140 struct ath9k_keyval hk;
141 const u8 *mac = NULL;
142 int ret = 0;
143 enum ieee80211_if_types opmode;
144
145 memset(&hk, 0, sizeof(hk));
146
147 switch (key->alg) {
148 case ALG_WEP:
149 hk.kv_type = ATH9K_CIPHER_WEP;
150 break;
151 case ALG_TKIP:
152 hk.kv_type = ATH9K_CIPHER_TKIP;
153 break;
154 case ALG_CCMP:
155 hk.kv_type = ATH9K_CIPHER_AES_CCM;
156 break;
157 default:
158 return -EINVAL;
159 }
160
161 hk.kv_len = key->keylen;
162 memcpy(hk.kv_val, key->key, key->keylen);
163
164 if (!sc->sc_vaps[0])
165 return -EIO;
166
167 vif = sc->sc_vaps[0]->av_if_data;
168 opmode = vif->type;
169
170 /*
171 * Strategy:
172 * For _M_STA mc tx, we will not setup a key at all since we never
173 * tx mc.
174 * _M_STA mc rx, we will use the keyID.
175 * for _M_IBSS mc tx, we will use the keyID, and no macaddr.
176 * for _M_IBSS mc rx, we will alloc a slot and plumb the mac of the
177 * peer node. BUT we will plumb a cleartext key so that we can do
178 * perSta default key table lookup in software.
179 */
180 if (is_broadcast_ether_addr(addr)) {
181 switch (opmode) {
182 case IEEE80211_IF_TYPE_STA:
183 /* default key: could be group WPA key
184 * or could be static WEP key */
185 mac = NULL;
186 break;
187 case IEEE80211_IF_TYPE_IBSS:
188 break;
189 case IEEE80211_IF_TYPE_AP:
190 break;
191 default:
192 ASSERT(0);
193 break;
194 }
195 } else {
196 mac = addr;
197 }
198
199 if (key->alg == ALG_TKIP)
200 ret = ath_setkey_tkip(sc, key, &hk, mac);
201 else
202 ret = ath_keyset(sc, key->keyidx, &hk, mac);
203
204 if (!ret)
205 return -EIO;
206
Senthil Balasubramanian1b961752008-09-01 19:45:21 +0530207 if (mac)
208 sc->sc_keytype = hk.kv_type;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700209 return 0;
210}
211
212static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key)
213{
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700214 int freeslot;
215
Sujithff9b6622008-08-14 13:27:16 +0530216 freeslot = (key->keyidx >= 4) ? 1 : 0;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700217 ath_key_reset(sc, key->keyidx, freeslot);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700218}
219
220static void setup_ht_cap(struct ieee80211_ht_info *ht_info)
221{
Sujith60653672008-08-14 13:28:02 +0530222#define ATH9K_HT_CAP_MAXRXAMPDU_65536 0x3 /* 2 ^ 16 */
223#define ATH9K_HT_CAP_MPDUDENSITY_8 0x6 /* 8 usec */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700224
225 ht_info->ht_supported = 1;
226 ht_info->cap = (u16)IEEE80211_HT_CAP_SUP_WIDTH
Tomas Winkler00c5ae22008-09-03 11:26:42 +0800227 |(u16)IEEE80211_HT_CAP_SM_PS
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700228 |(u16)IEEE80211_HT_CAP_SGI_40
229 |(u16)IEEE80211_HT_CAP_DSSSCCK40;
230
Sujith60653672008-08-14 13:28:02 +0530231 ht_info->ampdu_factor = ATH9K_HT_CAP_MAXRXAMPDU_65536;
232 ht_info->ampdu_density = ATH9K_HT_CAP_MPDUDENSITY_8;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700233 /* setup supported mcs set */
234 memset(ht_info->supp_mcs_set, 0, 16);
235 ht_info->supp_mcs_set[0] = 0xff;
236 ht_info->supp_mcs_set[1] = 0xff;
237 ht_info->supp_mcs_set[12] = IEEE80211_HT_CAP_MCS_TX_DEFINED;
238}
239
240static int ath_rate2idx(struct ath_softc *sc, int rate)
241{
242 int i = 0, cur_band, n_rates;
243 struct ieee80211_hw *hw = sc->hw;
244
245 cur_band = hw->conf.channel->band;
246 n_rates = sc->sbands[cur_band].n_bitrates;
247
248 for (i = 0; i < n_rates; i++) {
249 if (sc->sbands[cur_band].bitrates[i].bitrate == rate)
250 break;
251 }
252
253 /*
254 * NB:mac80211 validates rx rate index against the supported legacy rate
255 * index only (should be done against ht rates also), return the highest
256 * legacy rate index for rx rate which does not match any one of the
257 * supported basic and extended rates to make mac80211 happy.
258 * The following hack will be cleaned up once the issue with
259 * the rx rate index validation in mac80211 is fixed.
260 */
261 if (i == n_rates)
262 return n_rates - 1;
263 return i;
264}
265
266static void ath9k_rx_prepare(struct ath_softc *sc,
267 struct sk_buff *skb,
268 struct ath_recv_status *status,
269 struct ieee80211_rx_status *rx_status)
270{
271 struct ieee80211_hw *hw = sc->hw;
272 struct ieee80211_channel *curchan = hw->conf.channel;
273
274 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
275
276 rx_status->mactime = status->tsf;
277 rx_status->band = curchan->band;
278 rx_status->freq = curchan->center_freq;
279 rx_status->noise = ATH_DEFAULT_NOISE_FLOOR;
280 rx_status->signal = rx_status->noise + status->rssi;
281 rx_status->rate_idx = ath_rate2idx(sc, (status->rateKbps / 100));
282 rx_status->antenna = status->antenna;
283 rx_status->qual = status->rssi * 100 / 64;
284
285 if (status->flags & ATH_RX_MIC_ERROR)
286 rx_status->flag |= RX_FLAG_MMIC_ERROR;
287 if (status->flags & ATH_RX_FCS_ERROR)
288 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
289
290 rx_status->flag |= RX_FLAG_TSFT;
291}
292
293static u8 parse_mpdudensity(u8 mpdudensity)
294{
295 /*
296 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
297 * 0 for no restriction
298 * 1 for 1/4 us
299 * 2 for 1/2 us
300 * 3 for 1 us
301 * 4 for 2 us
302 * 5 for 4 us
303 * 6 for 8 us
304 * 7 for 16 us
305 */
306 switch (mpdudensity) {
307 case 0:
308 return 0;
309 case 1:
310 case 2:
311 case 3:
312 /* Our lower layer calculations limit our precision to
313 1 microsecond */
314 return 1;
315 case 4:
316 return 2;
317 case 5:
318 return 4;
319 case 6:
320 return 8;
321 case 7:
322 return 16;
323 default:
324 return 0;
325 }
326}
327
Vasanthakumar Thiagarajan8feceb62008-09-10 18:49:27 +0530328static void ath9k_ht_conf(struct ath_softc *sc,
329 struct ieee80211_bss_conf *bss_conf)
330{
331#define IEEE80211_HT_CAP_40MHZ_INTOLERANT BIT(14)
332 struct ath_ht_info *ht_info = &sc->sc_ht_info;
333
334 if (bss_conf->assoc_ht) {
335 ht_info->ext_chan_offset =
336 bss_conf->ht_bss_conf->bss_cap &
337 IEEE80211_HT_IE_CHA_SEC_OFFSET;
338
339 if (!(bss_conf->ht_conf->cap &
340 IEEE80211_HT_CAP_40MHZ_INTOLERANT) &&
341 (bss_conf->ht_bss_conf->bss_cap &
342 IEEE80211_HT_IE_CHA_WIDTH))
343 ht_info->tx_chan_width = ATH9K_HT_MACMODE_2040;
344 else
345 ht_info->tx_chan_width = ATH9K_HT_MACMODE_20;
346
347 ath9k_hw_set11nmac2040(sc->sc_ah, ht_info->tx_chan_width);
348 ht_info->maxampdu = 1 << (IEEE80211_HTCAP_MAXRXAMPDU_FACTOR +
349 bss_conf->ht_conf->ampdu_factor);
350 ht_info->mpdudensity =
351 parse_mpdudensity(bss_conf->ht_conf->ampdu_density);
352
353 }
354
355#undef IEEE80211_HT_CAP_40MHZ_INTOLERANT
356}
357
358static void ath9k_bss_assoc_info(struct ath_softc *sc,
359 struct ieee80211_bss_conf *bss_conf)
360{
361 struct ieee80211_hw *hw = sc->hw;
362 struct ieee80211_channel *curchan = hw->conf.channel;
363 struct ath_vap *avp;
364 int pos;
365 DECLARE_MAC_BUF(mac);
366
367 if (bss_conf->assoc) {
368 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Bss Info ASSOC %d\n",
369 __func__,
370 bss_conf->aid);
371
372 avp = sc->sc_vaps[0];
373 if (avp == NULL) {
374 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
375 __func__);
376 return;
377 }
378
379 /* New association, store aid */
380 if (avp->av_opmode == ATH9K_M_STA) {
381 sc->sc_curaid = bss_conf->aid;
382 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
383 sc->sc_curaid);
384 }
385
386 /* Configure the beacon */
387 ath_beacon_config(sc, 0);
388 sc->sc_flags |= SC_OP_BEACONS;
389
390 /* Reset rssi stats */
391 sc->sc_halstats.ns_avgbrssi = ATH_RSSI_DUMMY_MARKER;
392 sc->sc_halstats.ns_avgrssi = ATH_RSSI_DUMMY_MARKER;
393 sc->sc_halstats.ns_avgtxrssi = ATH_RSSI_DUMMY_MARKER;
394 sc->sc_halstats.ns_avgtxrate = ATH_RATE_DUMMY_MARKER;
395
396 /* Update chainmask */
397 ath_update_chainmask(sc, bss_conf->assoc_ht);
398
399 DPRINTF(sc, ATH_DBG_CONFIG,
400 "%s: bssid %s aid 0x%x\n",
401 __func__,
402 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
403
404 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
405 __func__,
406 curchan->center_freq);
407
408 pos = ath_get_channel(sc, curchan);
409 if (pos == -1) {
410 DPRINTF(sc, ATH_DBG_FATAL,
411 "%s: Invalid channel\n", __func__);
412 return;
413 }
414
415 if (hw->conf.ht_conf.ht_supported)
416 sc->sc_ah->ah_channels[pos].chanmode =
417 ath_get_extchanmode(sc, curchan);
418 else
419 sc->sc_ah->ah_channels[pos].chanmode =
420 (curchan->band == IEEE80211_BAND_2GHZ) ?
421 CHANNEL_G : CHANNEL_A;
422
423 /* set h/w channel */
424 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
425 DPRINTF(sc, ATH_DBG_FATAL,
426 "%s: Unable to set channel\n",
427 __func__);
428
429 ath_rate_newstate(sc, avp);
430 /* Update ratectrl about the new state */
431 ath_rc_node_update(hw, avp->rc_node);
432 } else {
433 DPRINTF(sc, ATH_DBG_CONFIG,
434 "%s: Bss Info DISSOC\n", __func__);
435 sc->sc_curaid = 0;
436 }
437}
438
439void ath_get_beaconconfig(struct ath_softc *sc,
440 int if_id,
441 struct ath_beacon_config *conf)
442{
443 struct ieee80211_hw *hw = sc->hw;
444
445 /* fill in beacon config data */
446
447 conf->beacon_interval = hw->conf.beacon_int;
448 conf->listen_interval = 100;
449 conf->dtim_count = 1;
450 conf->bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf->listen_interval;
451}
452
453void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
454 struct ath_xmit_status *tx_status, struct ath_node *an)
455{
456 struct ieee80211_hw *hw = sc->hw;
457 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
458
459 DPRINTF(sc, ATH_DBG_XMIT,
460 "%s: TX complete: skb: %p\n", __func__, skb);
461
462 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK ||
463 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) {
464 /* free driver's private data area of tx_info */
465 if (tx_info->driver_data[0] != NULL)
466 kfree(tx_info->driver_data[0]);
467 tx_info->driver_data[0] = NULL;
468 }
469
470 if (tx_status->flags & ATH_TX_BAR) {
471 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
472 tx_status->flags &= ~ATH_TX_BAR;
473 }
474
475 if (tx_status->flags & (ATH_TX_ERROR | ATH_TX_XRETRY)) {
476 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
477 /* Frame was not ACKed, but an ACK was expected */
478 tx_info->status.excessive_retries = 1;
479 }
480 } else {
481 /* Frame was ACKed */
482 tx_info->flags |= IEEE80211_TX_STAT_ACK;
483 }
484
485 tx_info->status.retry_count = tx_status->retries;
486
487 ieee80211_tx_status(hw, skb);
488 if (an)
489 ath_node_put(sc, an, ATH9K_BH_STATUS_CHANGE);
490}
491
492int _ath_rx_indicate(struct ath_softc *sc,
493 struct sk_buff *skb,
494 struct ath_recv_status *status,
495 u16 keyix)
496{
497 struct ieee80211_hw *hw = sc->hw;
498 struct ath_node *an = NULL;
499 struct ieee80211_rx_status rx_status;
500 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
501 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
502 int padsize;
503 enum ATH_RX_TYPE st;
504
505 /* see if any padding is done by the hw and remove it */
506 if (hdrlen & 3) {
507 padsize = hdrlen % 4;
508 memmove(skb->data + padsize, skb->data, hdrlen);
509 skb_pull(skb, padsize);
510 }
511
512 /* Prepare rx status */
513 ath9k_rx_prepare(sc, skb, status, &rx_status);
514
515 if (!(keyix == ATH9K_RXKEYIX_INVALID) &&
516 !(status->flags & ATH_RX_DECRYPT_ERROR)) {
517 rx_status.flag |= RX_FLAG_DECRYPTED;
518 } else if ((le16_to_cpu(hdr->frame_control) & IEEE80211_FCTL_PROTECTED)
519 && !(status->flags & ATH_RX_DECRYPT_ERROR)
520 && skb->len >= hdrlen + 4) {
521 keyix = skb->data[hdrlen + 3] >> 6;
522
523 if (test_bit(keyix, sc->sc_keymap))
524 rx_status.flag |= RX_FLAG_DECRYPTED;
525 }
526
527 spin_lock_bh(&sc->node_lock);
528 an = ath_node_find(sc, hdr->addr2);
529 spin_unlock_bh(&sc->node_lock);
530
531 if (an) {
532 ath_rx_input(sc, an,
533 hw->conf.ht_conf.ht_supported,
534 skb, status, &st);
535 }
536 if (!an || (st != ATH_RX_CONSUMED))
537 __ieee80211_rx(hw, skb, &rx_status);
538
539 return 0;
540}
541
542int ath_rx_subframe(struct ath_node *an,
543 struct sk_buff *skb,
544 struct ath_recv_status *status)
545{
546 struct ath_softc *sc = an->an_sc;
547 struct ieee80211_hw *hw = sc->hw;
548 struct ieee80211_rx_status rx_status;
549
550 /* Prepare rx status */
551 ath9k_rx_prepare(sc, skb, status, &rx_status);
552 if (!(status->flags & ATH_RX_DECRYPT_ERROR))
553 rx_status.flag |= RX_FLAG_DECRYPTED;
554
555 __ieee80211_rx(hw, skb, &rx_status);
556
557 return 0;
558}
559
560/********************************/
561/* LED functions */
562/********************************/
563
564static void ath_led_brightness(struct led_classdev *led_cdev,
565 enum led_brightness brightness)
566{
567 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
568 struct ath_softc *sc = led->sc;
569
570 switch (brightness) {
571 case LED_OFF:
572 if (led->led_type == ATH_LED_ASSOC ||
573 led->led_type == ATH_LED_RADIO)
574 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
575 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN,
576 (led->led_type == ATH_LED_RADIO) ? 1 :
577 !!(sc->sc_flags & SC_OP_LED_ASSOCIATED));
578 break;
579 case LED_FULL:
580 if (led->led_type == ATH_LED_ASSOC)
581 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
582 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 0);
583 break;
584 default:
585 break;
586 }
587}
588
589static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
590 char *trigger)
591{
592 int ret;
593
594 led->sc = sc;
595 led->led_cdev.name = led->name;
596 led->led_cdev.default_trigger = trigger;
597 led->led_cdev.brightness_set = ath_led_brightness;
598
599 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
600 if (ret)
601 DPRINTF(sc, ATH_DBG_FATAL,
602 "Failed to register led:%s", led->name);
603 else
604 led->registered = 1;
605 return ret;
606}
607
608static void ath_unregister_led(struct ath_led *led)
609{
610 if (led->registered) {
611 led_classdev_unregister(&led->led_cdev);
612 led->registered = 0;
613 }
614}
615
616static void ath_deinit_leds(struct ath_softc *sc)
617{
618 ath_unregister_led(&sc->assoc_led);
619 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
620 ath_unregister_led(&sc->tx_led);
621 ath_unregister_led(&sc->rx_led);
622 ath_unregister_led(&sc->radio_led);
623 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
624}
625
626static void ath_init_leds(struct ath_softc *sc)
627{
628 char *trigger;
629 int ret;
630
631 /* Configure gpio 1 for output */
632 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
633 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
634 /* LED off, active low */
635 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
636
637 trigger = ieee80211_get_radio_led_name(sc->hw);
638 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
639 "ath9k-%s:radio", wiphy_name(sc->hw->wiphy));
640 ret = ath_register_led(sc, &sc->radio_led, trigger);
641 sc->radio_led.led_type = ATH_LED_RADIO;
642 if (ret)
643 goto fail;
644
645 trigger = ieee80211_get_assoc_led_name(sc->hw);
646 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
647 "ath9k-%s:assoc", wiphy_name(sc->hw->wiphy));
648 ret = ath_register_led(sc, &sc->assoc_led, trigger);
649 sc->assoc_led.led_type = ATH_LED_ASSOC;
650 if (ret)
651 goto fail;
652
653 trigger = ieee80211_get_tx_led_name(sc->hw);
654 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
655 "ath9k-%s:tx", wiphy_name(sc->hw->wiphy));
656 ret = ath_register_led(sc, &sc->tx_led, trigger);
657 sc->tx_led.led_type = ATH_LED_TX;
658 if (ret)
659 goto fail;
660
661 trigger = ieee80211_get_rx_led_name(sc->hw);
662 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
663 "ath9k-%s:rx", wiphy_name(sc->hw->wiphy));
664 ret = ath_register_led(sc, &sc->rx_led, trigger);
665 sc->rx_led.led_type = ATH_LED_RX;
666 if (ret)
667 goto fail;
668
669 return;
670
671fail:
672 ath_deinit_leds(sc);
673}
674
675static int ath_detach(struct ath_softc *sc)
676{
677 struct ieee80211_hw *hw = sc->hw;
678
679 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach ATH hw\n", __func__);
680
681 /* Deinit LED control */
682 ath_deinit_leds(sc);
683
684 /* Unregister hw */
685
686 ieee80211_unregister_hw(hw);
687
688 /* unregister Rate control */
689 ath_rate_control_unregister();
690
691 /* tx/rx cleanup */
692
693 ath_rx_cleanup(sc);
694 ath_tx_cleanup(sc);
695
696 /* Deinit */
697
698 ath_deinit(sc);
699
700 return 0;
701}
702
703static int ath_attach(u16 devid,
704 struct ath_softc *sc)
705{
706 struct ieee80211_hw *hw = sc->hw;
707 int error = 0;
708
709 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach ATH hw\n", __func__);
710
711 error = ath_init(devid, sc);
712 if (error != 0)
713 return error;
714
715 /* Init nodes */
716
717 INIT_LIST_HEAD(&sc->node_list);
718 spin_lock_init(&sc->node_lock);
719
720 /* get mac address from hardware and set in mac80211 */
721
722 SET_IEEE80211_PERM_ADDR(hw, sc->sc_myaddr);
723
724 /* setup channels and rates */
725
726 sc->sbands[IEEE80211_BAND_2GHZ].channels =
727 sc->channels[IEEE80211_BAND_2GHZ];
728 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
729 sc->rates[IEEE80211_BAND_2GHZ];
730 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
731
732 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
733 /* Setup HT capabilities for 2.4Ghz*/
734 setup_ht_cap(&sc->sbands[IEEE80211_BAND_2GHZ].ht_info);
735
736 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
737 &sc->sbands[IEEE80211_BAND_2GHZ];
738
739 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->ah_caps.wireless_modes)) {
740 sc->sbands[IEEE80211_BAND_5GHZ].channels =
741 sc->channels[IEEE80211_BAND_5GHZ];
742 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
743 sc->rates[IEEE80211_BAND_5GHZ];
744 sc->sbands[IEEE80211_BAND_5GHZ].band =
745 IEEE80211_BAND_5GHZ;
746
747 if (sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_HT)
748 /* Setup HT capabilities for 5Ghz*/
749 setup_ht_cap(&sc->sbands[IEEE80211_BAND_5GHZ].ht_info);
750
751 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
752 &sc->sbands[IEEE80211_BAND_5GHZ];
753 }
754
755 /* FIXME: Have to figure out proper hw init values later */
756
757 hw->queues = 4;
758 hw->ampdu_queues = 1;
759
760 /* Register rate control */
761 hw->rate_control_algorithm = "ath9k_rate_control";
762 error = ath_rate_control_register();
763 if (error != 0) {
764 DPRINTF(sc, ATH_DBG_FATAL,
765 "%s: Unable to register rate control "
766 "algorithm:%d\n", __func__, error);
767 ath_rate_control_unregister();
768 goto bad;
769 }
770
771 error = ieee80211_register_hw(hw);
772 if (error != 0) {
773 ath_rate_control_unregister();
774 goto bad;
775 }
776
777 /* Initialize LED control */
778 ath_init_leds(sc);
779
780 /* initialize tx/rx engine */
781
782 error = ath_tx_init(sc, ATH_TXBUF);
783 if (error != 0)
784 goto detach;
785
786 error = ath_rx_init(sc, ATH_RXBUF);
787 if (error != 0)
788 goto detach;
789
790 return 0;
791detach:
792 ath_detach(sc);
793bad:
794 return error;
795}
796
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700797static int ath9k_start(struct ieee80211_hw *hw)
798{
799 struct ath_softc *sc = hw->priv;
800 struct ieee80211_channel *curchan = hw->conf.channel;
801 int error = 0, pos;
802
803 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Starting driver with "
804 "initial channel: %d MHz\n", __func__, curchan->center_freq);
805
806 /* setup initial channel */
807
808 pos = ath_get_channel(sc, curchan);
809 if (pos == -1) {
810 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
811 return -EINVAL;
812 }
813
814 sc->sc_ah->ah_channels[pos].chanmode =
815 (curchan->band == IEEE80211_BAND_2GHZ) ? CHANNEL_G : CHANNEL_A;
816
817 /* open ath_dev */
818 error = ath_open(sc, &sc->sc_ah->ah_channels[pos]);
819 if (error) {
820 DPRINTF(sc, ATH_DBG_FATAL,
821 "%s: Unable to complete ath_open\n", __func__);
822 return error;
823 }
824
825 ieee80211_wake_queues(hw);
826 return 0;
827}
828
829static int ath9k_tx(struct ieee80211_hw *hw,
830 struct sk_buff *skb)
831{
832 struct ath_softc *sc = hw->priv;
833 int hdrlen, padsize;
Jouni Malinen147583c2008-08-11 14:01:50 +0300834 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
835
836 /*
837 * As a temporary workaround, assign seq# here; this will likely need
838 * to be cleaned up to work better with Beacon transmission and virtual
839 * BSSes.
840 */
841 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
842 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
843 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
844 sc->seq_no += 0x10;
845 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
846 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no);
847 }
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700848
849 /* Add the padding after the header if this is not already done */
850 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
851 if (hdrlen & 3) {
852 padsize = hdrlen % 4;
853 if (skb_headroom(skb) < padsize)
854 return -1;
855 skb_push(skb, padsize);
856 memmove(skb->data, skb->data + padsize, hdrlen);
857 }
858
859 DPRINTF(sc, ATH_DBG_XMIT, "%s: transmitting packet, skb: %p\n",
860 __func__,
861 skb);
862
863 if (ath_tx_start(sc, skb) != 0) {
864 DPRINTF(sc, ATH_DBG_XMIT, "%s: TX failed\n", __func__);
865 dev_kfree_skb_any(skb);
866 /* FIXME: Check for proper return value from ATH_DEV */
867 return 0;
868 }
869
870 return 0;
871}
872
873static void ath9k_stop(struct ieee80211_hw *hw)
874{
875 struct ath_softc *sc = hw->priv;
876 int error;
877
878 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Driver halt\n", __func__);
879
880 error = ath_suspend(sc);
881 if (error)
882 DPRINTF(sc, ATH_DBG_CONFIG,
883 "%s: Device is no longer present\n", __func__);
884
885 ieee80211_stop_queues(hw);
886}
887
888static int ath9k_add_interface(struct ieee80211_hw *hw,
889 struct ieee80211_if_init_conf *conf)
890{
891 struct ath_softc *sc = hw->priv;
892 int error, ic_opmode = 0;
893
894 /* Support only vap for now */
895
896 if (sc->sc_nvaps)
897 return -ENOBUFS;
898
899 switch (conf->type) {
900 case IEEE80211_IF_TYPE_STA:
901 ic_opmode = ATH9K_M_STA;
902 break;
903 case IEEE80211_IF_TYPE_IBSS:
904 ic_opmode = ATH9K_M_IBSS;
905 break;
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300906 case IEEE80211_IF_TYPE_AP:
907 ic_opmode = ATH9K_M_HOSTAP;
908 break;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700909 default:
910 DPRINTF(sc, ATH_DBG_FATAL,
Jouni Malinen2ad67de2008-08-11 14:01:47 +0300911 "%s: Interface type %d not yet supported\n",
912 __func__, conf->type);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700913 return -EOPNOTSUPP;
914 }
915
916 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a VAP of type: %d\n",
917 __func__,
918 ic_opmode);
919
920 error = ath_vap_attach(sc, 0, conf->vif, ic_opmode);
921 if (error) {
922 DPRINTF(sc, ATH_DBG_FATAL,
923 "%s: Unable to attach vap, error: %d\n",
924 __func__, error);
925 return error;
926 }
927
928 return 0;
929}
930
931static void ath9k_remove_interface(struct ieee80211_hw *hw,
932 struct ieee80211_if_init_conf *conf)
933{
934 struct ath_softc *sc = hw->priv;
935 struct ath_vap *avp;
936 int error;
937
938 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Detach VAP\n", __func__);
939
940 avp = sc->sc_vaps[0];
941 if (avp == NULL) {
942 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
943 __func__);
944 return;
945 }
946
947#ifdef CONFIG_SLOW_ANT_DIV
948 ath_slow_ant_div_stop(&sc->sc_antdiv);
949#endif
950
951 /* Update ratectrl */
952 ath_rate_newstate(sc, avp);
953
954 /* Reclaim beacon resources */
Sujithb4696c8b2008-08-11 14:04:52 +0530955 if (sc->sc_ah->ah_opmode == ATH9K_M_HOSTAP ||
956 sc->sc_ah->ah_opmode == ATH9K_M_IBSS) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700957 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
958 ath_beacon_return(sc, avp);
959 }
960
961 /* Set interrupt mask */
962 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
963 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_imask & ~ATH9K_INT_GLOBAL);
Sujith672840a2008-08-11 14:05:08 +0530964 sc->sc_flags &= ~SC_OP_BEACONS;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700965
966 error = ath_vap_detach(sc, 0);
967 if (error)
968 DPRINTF(sc, ATH_DBG_FATAL,
969 "%s: Unable to detach vap, error: %d\n",
970 __func__, error);
971}
972
973static int ath9k_config(struct ieee80211_hw *hw,
974 struct ieee80211_conf *conf)
975{
976 struct ath_softc *sc = hw->priv;
977 struct ieee80211_channel *curchan = hw->conf.channel;
978 int pos;
979
980 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set channel: %d MHz\n",
981 __func__,
982 curchan->center_freq);
983
984 pos = ath_get_channel(sc, curchan);
985 if (pos == -1) {
986 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid channel\n", __func__);
987 return -EINVAL;
988 }
989
990 sc->sc_ah->ah_channels[pos].chanmode =
Sujith86b89ee2008-08-07 10:54:57 +0530991 (curchan->band == IEEE80211_BAND_2GHZ) ?
992 CHANNEL_G : CHANNEL_A;
993
994 if (sc->sc_curaid && hw->conf.ht_conf.ht_supported)
995 sc->sc_ah->ah_channels[pos].chanmode =
996 ath_get_extchanmode(sc, curchan);
997
Luis R. Rodriguezf078f202008-08-04 00:16:41 -0700998 sc->sc_config.txpowlimit = 2 * conf->power_level;
999
1000 /* set h/w channel */
1001 if (ath_set_channel(sc, &sc->sc_ah->ah_channels[pos]) < 0)
1002 DPRINTF(sc, ATH_DBG_FATAL, "%s: Unable to set channel\n",
1003 __func__);
1004
1005 return 0;
1006}
1007
1008static int ath9k_config_interface(struct ieee80211_hw *hw,
1009 struct ieee80211_vif *vif,
1010 struct ieee80211_if_conf *conf)
1011{
1012 struct ath_softc *sc = hw->priv;
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001013 struct ath_hal *ah = sc->sc_ah;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001014 struct ath_vap *avp;
1015 u32 rfilt = 0;
1016 int error, i;
1017 DECLARE_MAC_BUF(mac);
1018
1019 avp = sc->sc_vaps[0];
1020 if (avp == NULL) {
1021 DPRINTF(sc, ATH_DBG_FATAL, "%s: Invalid interface\n",
1022 __func__);
1023 return -EINVAL;
1024 }
1025
Jouni Malinen2ad67de2008-08-11 14:01:47 +03001026 /* TODO: Need to decide which hw opmode to use for multi-interface
1027 * cases */
1028 if (vif->type == IEEE80211_IF_TYPE_AP &&
1029 ah->ah_opmode != ATH9K_M_HOSTAP) {
1030 ah->ah_opmode = ATH9K_M_HOSTAP;
1031 ath9k_hw_setopmode(ah);
1032 ath9k_hw_write_associd(ah, sc->sc_myaddr, 0);
1033 /* Request full reset to get hw opmode changed properly */
1034 sc->sc_flags |= SC_OP_FULL_RESET;
1035 }
1036
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001037 if ((conf->changed & IEEE80211_IFCC_BSSID) &&
1038 !is_zero_ether_addr(conf->bssid)) {
1039 switch (vif->type) {
1040 case IEEE80211_IF_TYPE_STA:
1041 case IEEE80211_IF_TYPE_IBSS:
1042 /* Update ratectrl about the new state */
1043 ath_rate_newstate(sc, avp);
1044
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001045 /* Set BSSID */
1046 memcpy(sc->sc_curbssid, conf->bssid, ETH_ALEN);
1047 sc->sc_curaid = 0;
1048 ath9k_hw_write_associd(sc->sc_ah, sc->sc_curbssid,
1049 sc->sc_curaid);
1050
1051 /* Set aggregation protection mode parameters */
1052 sc->sc_config.ath_aggr_prot = 0;
1053
1054 /*
1055 * Reset our TSF so that its value is lower than the
1056 * beacon that we are trying to catch.
1057 * Only then hw will update its TSF register with the
1058 * new beacon. Reset the TSF before setting the BSSID
1059 * to avoid allowing in any frames that would update
1060 * our TSF only to have us clear it
1061 * immediately thereafter.
1062 */
1063 ath9k_hw_reset_tsf(sc->sc_ah);
1064
1065 /* Disable BMISS interrupt when we're not associated */
1066 ath9k_hw_set_interrupts(sc->sc_ah,
1067 sc->sc_imask &
1068 ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS));
1069 sc->sc_imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1070
1071 DPRINTF(sc, ATH_DBG_CONFIG,
1072 "%s: RX filter 0x%x bssid %s aid 0x%x\n",
1073 __func__, rfilt,
1074 print_mac(mac, sc->sc_curbssid), sc->sc_curaid);
1075
1076 /* need to reconfigure the beacon */
Sujith672840a2008-08-11 14:05:08 +05301077 sc->sc_flags &= ~SC_OP_BEACONS ;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001078
1079 break;
1080 default:
1081 break;
1082 }
1083 }
1084
1085 if ((conf->changed & IEEE80211_IFCC_BEACON) &&
Sujithff9b6622008-08-14 13:27:16 +05301086 ((vif->type == IEEE80211_IF_TYPE_IBSS) ||
1087 (vif->type == IEEE80211_IF_TYPE_AP))) {
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001088 /*
1089 * Allocate and setup the beacon frame.
1090 *
1091 * Stop any previous beacon DMA. This may be
1092 * necessary, for example, when an ibss merge
1093 * causes reconfiguration; we may be called
1094 * with beacon transmission active.
1095 */
1096 ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq);
1097
1098 error = ath_beacon_alloc(sc, 0);
1099 if (error != 0)
1100 return error;
1101
1102 ath_beacon_sync(sc, 0);
1103 }
1104
1105 /* Check for WLAN_CAPABILITY_PRIVACY ? */
1106 if ((avp->av_opmode != IEEE80211_IF_TYPE_STA)) {
1107 for (i = 0; i < IEEE80211_WEP_NKID; i++)
1108 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
1109 ath9k_hw_keysetmac(sc->sc_ah,
1110 (u16)i,
1111 sc->sc_curbssid);
1112 }
1113
1114 /* Only legacy IBSS for now */
1115 if (vif->type == IEEE80211_IF_TYPE_IBSS)
1116 ath_update_chainmask(sc, 0);
1117
1118 return 0;
1119}
1120
1121#define SUPPORTED_FILTERS \
1122 (FIF_PROMISC_IN_BSS | \
1123 FIF_ALLMULTI | \
1124 FIF_CONTROL | \
1125 FIF_OTHER_BSS | \
1126 FIF_BCN_PRBRESP_PROMISC | \
1127 FIF_FCSFAIL)
1128
Sujith7dcfdcd2008-08-11 14:03:13 +05301129/* FIXME: sc->sc_full_reset ? */
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001130static void ath9k_configure_filter(struct ieee80211_hw *hw,
1131 unsigned int changed_flags,
1132 unsigned int *total_flags,
1133 int mc_count,
1134 struct dev_mc_list *mclist)
1135{
1136 struct ath_softc *sc = hw->priv;
Sujith7dcfdcd2008-08-11 14:03:13 +05301137 u32 rfilt;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001138
1139 changed_flags &= SUPPORTED_FILTERS;
1140 *total_flags &= SUPPORTED_FILTERS;
1141
Sujith7dcfdcd2008-08-11 14:03:13 +05301142 sc->rx_filter = *total_flags;
1143 rfilt = ath_calcrxfilter(sc);
1144 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1145
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001146 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1147 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
Sujith7dcfdcd2008-08-11 14:03:13 +05301148 ath9k_hw_write_associd(sc->sc_ah, ath_bcast_mac, 0);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001149 }
Sujith7dcfdcd2008-08-11 14:03:13 +05301150
1151 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Set HW RX filter: 0x%x\n",
1152 __func__, sc->rx_filter);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001153}
1154
1155static void ath9k_sta_notify(struct ieee80211_hw *hw,
1156 struct ieee80211_vif *vif,
1157 enum sta_notify_cmd cmd,
1158 const u8 *addr)
1159{
1160 struct ath_softc *sc = hw->priv;
1161 struct ath_node *an;
1162 unsigned long flags;
1163 DECLARE_MAC_BUF(mac);
1164
1165 spin_lock_irqsave(&sc->node_lock, flags);
1166 an = ath_node_find(sc, (u8 *) addr);
1167 spin_unlock_irqrestore(&sc->node_lock, flags);
1168
1169 switch (cmd) {
1170 case STA_NOTIFY_ADD:
1171 spin_lock_irqsave(&sc->node_lock, flags);
1172 if (!an) {
1173 ath_node_attach(sc, (u8 *)addr, 0);
1174 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Attach a node: %s\n",
1175 __func__,
1176 print_mac(mac, addr));
1177 } else {
1178 ath_node_get(sc, (u8 *)addr);
1179 }
1180 spin_unlock_irqrestore(&sc->node_lock, flags);
1181 break;
1182 case STA_NOTIFY_REMOVE:
1183 if (!an)
1184 DPRINTF(sc, ATH_DBG_FATAL,
1185 "%s: Removal of a non-existent node\n",
1186 __func__);
1187 else {
1188 ath_node_put(sc, an, ATH9K_BH_STATUS_INTACT);
1189 DPRINTF(sc, ATH_DBG_CONFIG, "%s: Put a node: %s\n",
1190 __func__,
1191 print_mac(mac, addr));
1192 }
1193 break;
1194 default:
1195 break;
1196 }
1197}
1198
1199static int ath9k_conf_tx(struct ieee80211_hw *hw,
1200 u16 queue,
1201 const struct ieee80211_tx_queue_params *params)
1202{
1203 struct ath_softc *sc = hw->priv;
Sujithea9880f2008-08-07 10:53:10 +05301204 struct ath9k_tx_queue_info qi;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001205 int ret = 0, qnum;
1206
1207 if (queue >= WME_NUM_AC)
1208 return 0;
1209
1210 qi.tqi_aifs = params->aifs;
1211 qi.tqi_cwmin = params->cw_min;
1212 qi.tqi_cwmax = params->cw_max;
1213 qi.tqi_burstTime = params->txop;
1214 qnum = ath_get_hal_qnum(queue, sc);
1215
1216 DPRINTF(sc, ATH_DBG_CONFIG,
1217 "%s: Configure tx [queue/halq] [%d/%d], "
1218 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1219 __func__,
1220 queue,
1221 qnum,
1222 params->aifs,
1223 params->cw_min,
1224 params->cw_max,
1225 params->txop);
1226
1227 ret = ath_txq_update(sc, qnum, &qi);
1228 if (ret)
1229 DPRINTF(sc, ATH_DBG_FATAL,
1230 "%s: TXQ Update failed\n", __func__);
1231
1232 return ret;
1233}
1234
1235static int ath9k_set_key(struct ieee80211_hw *hw,
1236 enum set_key_cmd cmd,
1237 const u8 *local_addr,
1238 const u8 *addr,
1239 struct ieee80211_key_conf *key)
1240{
1241 struct ath_softc *sc = hw->priv;
1242 int ret = 0;
1243
1244 DPRINTF(sc, ATH_DBG_KEYCACHE, " %s: Set HW Key\n", __func__);
1245
1246 switch (cmd) {
1247 case SET_KEY:
1248 ret = ath_key_config(sc, addr, key);
1249 if (!ret) {
1250 set_bit(key->keyidx, sc->sc_keymap);
1251 key->hw_key_idx = key->keyidx;
1252 /* push IV and Michael MIC generation to stack */
1253 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
Senthil Balasubramanian1b961752008-09-01 19:45:21 +05301254 if (key->alg == ALG_TKIP)
1255 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001256 }
1257 break;
1258 case DISABLE_KEY:
1259 ath_key_delete(sc, key);
1260 clear_bit(key->keyidx, sc->sc_keymap);
1261 sc->sc_keytype = ATH9K_CIPHER_CLR;
1262 break;
1263 default:
1264 ret = -EINVAL;
1265 }
1266
1267 return ret;
1268}
1269
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001270static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1271 struct ieee80211_vif *vif,
1272 struct ieee80211_bss_conf *bss_conf,
1273 u32 changed)
1274{
1275 struct ath_softc *sc = hw->priv;
1276
1277 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1278 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed PREAMBLE %d\n",
1279 __func__,
1280 bss_conf->use_short_preamble);
1281 if (bss_conf->use_short_preamble)
Sujith672840a2008-08-11 14:05:08 +05301282 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001283 else
Sujith672840a2008-08-11 14:05:08 +05301284 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001285 }
1286
1287 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1288 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed CTS PROT %d\n",
1289 __func__,
1290 bss_conf->use_cts_prot);
1291 if (bss_conf->use_cts_prot &&
1292 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
Sujith672840a2008-08-11 14:05:08 +05301293 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001294 else
Sujith672840a2008-08-11 14:05:08 +05301295 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001296 }
1297
1298 if (changed & BSS_CHANGED_HT) {
1299 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed HT %d\n",
1300 __func__,
1301 bss_conf->assoc_ht);
1302 ath9k_ht_conf(sc, bss_conf);
1303 }
1304
1305 if (changed & BSS_CHANGED_ASSOC) {
1306 DPRINTF(sc, ATH_DBG_CONFIG, "%s: BSS Changed ASSOC %d\n",
1307 __func__,
1308 bss_conf->assoc);
1309 ath9k_bss_assoc_info(sc, bss_conf);
1310 }
1311}
1312
1313static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1314{
1315 u64 tsf;
1316 struct ath_softc *sc = hw->priv;
1317 struct ath_hal *ah = sc->sc_ah;
1318
1319 tsf = ath9k_hw_gettsf64(ah);
1320
1321 return tsf;
1322}
1323
1324static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1325{
1326 struct ath_softc *sc = hw->priv;
1327 struct ath_hal *ah = sc->sc_ah;
1328
1329 ath9k_hw_reset_tsf(ah);
1330}
1331
1332static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1333 enum ieee80211_ampdu_mlme_action action,
1334 const u8 *addr,
1335 u16 tid,
1336 u16 *ssn)
1337{
1338 struct ath_softc *sc = hw->priv;
1339 int ret = 0;
1340
1341 switch (action) {
1342 case IEEE80211_AMPDU_RX_START:
1343 ret = ath_rx_aggr_start(sc, addr, tid, ssn);
1344 if (ret < 0)
1345 DPRINTF(sc, ATH_DBG_FATAL,
1346 "%s: Unable to start RX aggregation\n",
1347 __func__);
1348 break;
1349 case IEEE80211_AMPDU_RX_STOP:
1350 ret = ath_rx_aggr_stop(sc, addr, tid);
1351 if (ret < 0)
1352 DPRINTF(sc, ATH_DBG_FATAL,
1353 "%s: Unable to stop RX aggregation\n",
1354 __func__);
1355 break;
1356 case IEEE80211_AMPDU_TX_START:
1357 ret = ath_tx_aggr_start(sc, addr, tid, ssn);
1358 if (ret < 0)
1359 DPRINTF(sc, ATH_DBG_FATAL,
1360 "%s: Unable to start TX aggregation\n",
1361 __func__);
1362 else
1363 ieee80211_start_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1364 break;
1365 case IEEE80211_AMPDU_TX_STOP:
1366 ret = ath_tx_aggr_stop(sc, addr, tid);
1367 if (ret < 0)
1368 DPRINTF(sc, ATH_DBG_FATAL,
1369 "%s: Unable to stop TX aggregation\n",
1370 __func__);
1371
1372 ieee80211_stop_tx_ba_cb_irqsafe(hw, (u8 *)addr, tid);
1373 break;
1374 default:
1375 DPRINTF(sc, ATH_DBG_FATAL,
1376 "%s: Unknown AMPDU action\n", __func__);
1377 }
1378
1379 return ret;
1380}
1381
1382static struct ieee80211_ops ath9k_ops = {
1383 .tx = ath9k_tx,
1384 .start = ath9k_start,
1385 .stop = ath9k_stop,
1386 .add_interface = ath9k_add_interface,
1387 .remove_interface = ath9k_remove_interface,
1388 .config = ath9k_config,
1389 .config_interface = ath9k_config_interface,
1390 .configure_filter = ath9k_configure_filter,
1391 .get_stats = NULL,
1392 .sta_notify = ath9k_sta_notify,
1393 .conf_tx = ath9k_conf_tx,
1394 .get_tx_stats = NULL,
1395 .bss_info_changed = ath9k_bss_info_changed,
1396 .set_tim = NULL,
1397 .set_key = ath9k_set_key,
1398 .hw_scan = NULL,
1399 .get_tkip_seq = NULL,
1400 .set_rts_threshold = NULL,
1401 .set_frag_threshold = NULL,
1402 .set_retry_limit = NULL,
1403 .get_tsf = ath9k_get_tsf,
1404 .reset_tsf = ath9k_reset_tsf,
1405 .tx_last_beacon = NULL,
1406 .ampdu_action = ath9k_ampdu_action
1407};
1408
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001409static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1410{
1411 void __iomem *mem;
1412 struct ath_softc *sc;
1413 struct ieee80211_hw *hw;
1414 const char *athname;
1415 u8 csz;
1416 u32 val;
1417 int ret = 0;
1418
1419 if (pci_enable_device(pdev))
1420 return -EIO;
1421
1422 /* XXX 32-bit addressing only */
1423 if (pci_set_dma_mask(pdev, 0xffffffff)) {
1424 printk(KERN_ERR "ath_pci: 32-bit DMA not available\n");
1425 ret = -ENODEV;
1426 goto bad;
1427 }
1428
1429 /*
1430 * Cache line size is used to size and align various
1431 * structures used to communicate with the hardware.
1432 */
1433 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &csz);
1434 if (csz == 0) {
1435 /*
1436 * Linux 2.4.18 (at least) writes the cache line size
1437 * register as a 16-bit wide register which is wrong.
1438 * We must have this setup properly for rx buffer
1439 * DMA to work so force a reasonable value here if it
1440 * comes up zero.
1441 */
1442 csz = L1_CACHE_BYTES / sizeof(u32);
1443 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE, csz);
1444 }
1445 /*
1446 * The default setting of latency timer yields poor results,
1447 * set it to the value used by other systems. It may be worth
1448 * tweaking this setting more.
1449 */
1450 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xa8);
1451
1452 pci_set_master(pdev);
1453
1454 /*
1455 * Disable the RETRY_TIMEOUT register (0x41) to keep
1456 * PCI Tx retries from interfering with C3 CPU state.
1457 */
1458 pci_read_config_dword(pdev, 0x40, &val);
1459 if ((val & 0x0000ff00) != 0)
1460 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1461
1462 ret = pci_request_region(pdev, 0, "ath9k");
1463 if (ret) {
1464 dev_err(&pdev->dev, "PCI memory region reserve error\n");
1465 ret = -ENODEV;
1466 goto bad;
1467 }
1468
1469 mem = pci_iomap(pdev, 0, 0);
1470 if (!mem) {
1471 printk(KERN_ERR "PCI memory map error\n") ;
1472 ret = -EIO;
1473 goto bad1;
1474 }
1475
1476 hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
1477 if (hw == NULL) {
1478 printk(KERN_ERR "ath_pci: no memory for ieee80211_hw\n");
1479 goto bad2;
1480 }
1481
Sujith19b73c72008-08-14 13:28:20 +05301482 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
Jouni Malinene022edb2008-08-22 17:31:33 +03001483 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
Sujith19b73c72008-08-14 13:28:20 +05301484 IEEE80211_HW_SIGNAL_DBM |
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001485 IEEE80211_HW_NOISE_DBM;
1486
Luis R. Rodriguezf59ac042008-08-29 16:26:43 -07001487 hw->wiphy->interface_modes =
1488 BIT(NL80211_IFTYPE_AP) |
1489 BIT(NL80211_IFTYPE_STATION) |
1490 BIT(NL80211_IFTYPE_ADHOC);
1491
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001492 SET_IEEE80211_DEV(hw, &pdev->dev);
1493 pci_set_drvdata(pdev, hw);
1494
1495 sc = hw->priv;
1496 sc->hw = hw;
1497 sc->pdev = pdev;
1498 sc->mem = mem;
1499
1500 if (ath_attach(id->device, sc) != 0) {
1501 ret = -ENODEV;
1502 goto bad3;
1503 }
1504
1505 /* setup interrupt service routine */
1506
1507 if (request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath", sc)) {
1508 printk(KERN_ERR "%s: request_irq failed\n",
1509 wiphy_name(hw->wiphy));
1510 ret = -EIO;
1511 goto bad4;
1512 }
1513
1514 athname = ath9k_hw_probe(id->vendor, id->device);
1515
1516 printk(KERN_INFO "%s: %s: mem=0x%lx, irq=%d\n",
1517 wiphy_name(hw->wiphy),
1518 athname ? athname : "Atheros ???",
1519 (unsigned long)mem, pdev->irq);
1520
1521 return 0;
1522bad4:
1523 ath_detach(sc);
1524bad3:
1525 ieee80211_free_hw(hw);
1526bad2:
1527 pci_iounmap(pdev, mem);
1528bad1:
1529 pci_release_region(pdev, 0);
1530bad:
1531 pci_disable_device(pdev);
1532 return ret;
1533}
1534
1535static void ath_pci_remove(struct pci_dev *pdev)
1536{
1537 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1538 struct ath_softc *sc = hw->priv;
1539
1540 if (pdev->irq)
1541 free_irq(pdev->irq, sc);
1542 ath_detach(sc);
1543 pci_iounmap(pdev, sc->mem);
1544 pci_release_region(pdev, 0);
1545 pci_disable_device(pdev);
1546 ieee80211_free_hw(hw);
1547}
1548
1549#ifdef CONFIG_PM
1550
1551static int ath_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1552{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301553 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1554 struct ath_softc *sc = hw->priv;
1555
1556 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001557 pci_save_state(pdev);
1558 pci_disable_device(pdev);
1559 pci_set_power_state(pdev, 3);
1560
1561 return 0;
1562}
1563
1564static int ath_pci_resume(struct pci_dev *pdev)
1565{
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301566 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1567 struct ath_softc *sc = hw->priv;
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001568 u32 val;
1569 int err;
1570
1571 err = pci_enable_device(pdev);
1572 if (err)
1573 return err;
1574 pci_restore_state(pdev);
1575 /*
1576 * Suspend/Resume resets the PCI configuration space, so we have to
1577 * re-disable the RETRY_TIMEOUT register (0x41) to keep
1578 * PCI Tx retries from interfering with C3 CPU state
1579 */
1580 pci_read_config_dword(pdev, 0x40, &val);
1581 if ((val & 0x0000ff00) != 0)
1582 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
1583
Vasanthakumar Thiagarajanc83be682008-08-25 20:47:29 +05301584 /* Enable LED */
1585 ath9k_hw_cfg_output(sc->sc_ah, ATH_LED_PIN,
1586 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1587 ath9k_hw_set_gpio(sc->sc_ah, ATH_LED_PIN, 1);
1588
Luis R. Rodriguezf078f202008-08-04 00:16:41 -07001589 return 0;
1590}
1591
1592#endif /* CONFIG_PM */
1593
1594MODULE_DEVICE_TABLE(pci, ath_pci_id_table);
1595
1596static struct pci_driver ath_pci_driver = {
1597 .name = "ath9k",
1598 .id_table = ath_pci_id_table,
1599 .probe = ath_pci_probe,
1600 .remove = ath_pci_remove,
1601#ifdef CONFIG_PM
1602 .suspend = ath_pci_suspend,
1603 .resume = ath_pci_resume,
1604#endif /* CONFIG_PM */
1605};
1606
1607static int __init init_ath_pci(void)
1608{
1609 printk(KERN_INFO "%s: %s\n", dev_info, ATH_PCI_VERSION);
1610
1611 if (pci_register_driver(&ath_pci_driver) < 0) {
1612 printk(KERN_ERR
1613 "ath_pci: No devices found, driver not installed.\n");
1614 pci_unregister_driver(&ath_pci_driver);
1615 return -ENODEV;
1616 }
1617
1618 return 0;
1619}
1620module_init(init_ath_pci);
1621
1622static void __exit exit_ath_pci(void)
1623{
1624 pci_unregister_driver(&ath_pci_driver);
1625 printk(KERN_INFO "%s: driver unloaded\n", dev_info);
1626}
1627module_exit(exit_ath_pci);