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MyungJoo Hama3c98b82011-10-02 00:19:15 +02001menuconfig PM_DEVFREQ
2 bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
MyungJoo Hama3c98b82011-10-02 00:19:15 +02003 help
MyungJoo Ham6c81f902011-11-14 23:31:35 +01004 A device may have a list of frequencies and voltages available.
5 devfreq, a generic DVFS framework can be registered for a device
6 in order to let the governor provided to devfreq choose an
7 operating frequency based on the device driver's policy.
MyungJoo Hama3c98b82011-10-02 00:19:15 +02008
MyungJoo Ham6c81f902011-11-14 23:31:35 +01009 Each device may have its own governor and policy. Devfreq can
MyungJoo Hama3c98b82011-10-02 00:19:15 +020010 reevaluate the device state periodically and/or based on the
MyungJoo Ham6c81f902011-11-14 23:31:35 +010011 notification to "nb", a notifier block, of devfreq.
MyungJoo Hama3c98b82011-10-02 00:19:15 +020012
MyungJoo Ham6c81f902011-11-14 23:31:35 +010013 Like some CPUs with CPUfreq, a device may have multiple clocks.
MyungJoo Hama3c98b82011-10-02 00:19:15 +020014 However, because the clock frequencies of a single device are
MyungJoo Ham6c81f902011-11-14 23:31:35 +010015 determined by the single device's state, an instance of devfreq
MyungJoo Hama3c98b82011-10-02 00:19:15 +020016 is attached to a single device and returns a "representative"
MyungJoo Ham6c81f902011-11-14 23:31:35 +010017 clock frequency of the device, which is also attached
18 to a device by 1-to-1. The device registering devfreq takes the
19 responsiblity to "interpret" the representative frequency and
MyungJoo Hama3c98b82011-10-02 00:19:15 +020020 to set its every clock accordingly with the "target" callback
MyungJoo Ham6c81f902011-11-14 23:31:35 +010021 given to devfreq.
22
23 When OPP is used with the devfreq device, it is recommended to
24 register devfreq's nb to the OPP's notifier head. If OPP is
25 used with the devfreq device, you may use OPP helper
26 functions defined in devfreq.h.
MyungJoo Hama3c98b82011-10-02 00:19:15 +020027
28if PM_DEVFREQ
29
MyungJoo Hamce26c5b2011-10-02 00:19:34 +020030comment "DEVFREQ Governors"
31
32config DEVFREQ_GOV_SIMPLE_ONDEMAND
Nishanth Menondd556fa2012-10-29 15:01:46 -050033 tristate "Simple Ondemand"
MyungJoo Hamce26c5b2011-10-02 00:19:34 +020034 help
35 Chooses frequency based on the recent load on the device. Works
36 similar as ONDEMAND governor of CPUFREQ does. A device with
37 Simple-Ondemand should be able to provide busy/total counter
38 values that imply the usage rate. A device may provide tuned
39 values to the governor with data field at devfreq_add_device().
40
41config DEVFREQ_GOV_PERFORMANCE
Nishanth Menondd556fa2012-10-29 15:01:46 -050042 tristate "Performance"
MyungJoo Hamce26c5b2011-10-02 00:19:34 +020043 help
44 Sets the frequency at the maximum available frequency.
45 This governor always returns UINT_MAX as frequency so that
46 the DEVFREQ framework returns the highest frequency available
47 at any time.
48
49config DEVFREQ_GOV_POWERSAVE
Nishanth Menondd556fa2012-10-29 15:01:46 -050050 tristate "Powersave"
MyungJoo Hamce26c5b2011-10-02 00:19:34 +020051 help
52 Sets the frequency at the minimum available frequency.
53 This governor always returns 0 as frequency so that
54 the DEVFREQ framework returns the lowest frequency available
55 at any time.
56
57config DEVFREQ_GOV_USERSPACE
Nishanth Menondd556fa2012-10-29 15:01:46 -050058 tristate "Userspace"
MyungJoo Hamce26c5b2011-10-02 00:19:34 +020059 help
60 Sets the frequency at the user specified one.
61 This governor returns the user configured frequency if there
62 has been an input to /sys/devices/.../power/devfreq_set_freq.
63 Otherwise, the governor does not change the frequnecy
64 given at the initialization.
65
MyungJoo Hama3c98b82011-10-02 00:19:15 +020066comment "DEVFREQ Drivers"
67
MyungJoo Ham7b405032011-07-14 10:33:55 +090068config ARM_EXYNOS4_BUS_DEVFREQ
69 bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
70 depends on CPU_EXYNOS4210 || CPU_EXYNOS4212 || CPU_EXYNOS4412
71 select ARCH_HAS_OPP
72 select DEVFREQ_GOV_SIMPLE_ONDEMAND
73 help
74 This adds the DEVFREQ driver for Exynos4210 memory bus (vdd_int)
75 and Exynos4212/4412 memory interface and bus (vdd_mif + vdd_int).
76 It reads PPMU counters of memory controllers and adjusts
77 the operating frequencies and voltages with OPP support.
78 To operate with optimal voltages, ASV support is required
79 (CONFIG_EXYNOS_ASV).
80
MyungJoo Hama3c98b82011-10-02 00:19:15 +020081endif # PM_DEVFREQ