blob: a83a40b3ebaaf9ad67b08c97a52a481645a0f4fa [file] [log] [blame]
Andrew Sharp8f267952008-02-06 01:38:46 -08001/*
2 * An rtc driver for the Dallas DS1511
3 *
4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp>
5 * Copyright (C) 2007 Andrew Sharp <andy.sharp@onstor.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Real time clock driver for the Dallas 1511 chip, which also
12 * contains a watchdog timer. There is a tiny amount of code that
13 * platform code could use to mess with the watchdog device a little
14 * bit, but not a full watchdog driver.
15 */
16
17#include <linux/bcd.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
21#include <linux/interrupt.h>
22#include <linux/rtc.h>
23#include <linux/platform_device.h>
24#include <linux/io.h>
25
26#define DRV_VERSION "0.6"
27
28enum ds1511reg {
29 DS1511_SEC = 0x0,
30 DS1511_MIN = 0x1,
31 DS1511_HOUR = 0x2,
32 DS1511_DOW = 0x3,
33 DS1511_DOM = 0x4,
34 DS1511_MONTH = 0x5,
35 DS1511_YEAR = 0x6,
36 DS1511_CENTURY = 0x7,
37 DS1511_AM1_SEC = 0x8,
38 DS1511_AM2_MIN = 0x9,
39 DS1511_AM3_HOUR = 0xa,
40 DS1511_AM4_DATE = 0xb,
41 DS1511_WD_MSEC = 0xc,
42 DS1511_WD_SEC = 0xd,
43 DS1511_CONTROL_A = 0xe,
44 DS1511_CONTROL_B = 0xf,
45 DS1511_RAMADDR_LSB = 0x10,
46 DS1511_RAMDATA = 0x13
47};
48
49#define DS1511_BLF1 0x80
50#define DS1511_BLF2 0x40
51#define DS1511_PRS 0x20
52#define DS1511_PAB 0x10
53#define DS1511_TDF 0x08
54#define DS1511_KSF 0x04
55#define DS1511_WDF 0x02
56#define DS1511_IRQF 0x01
57#define DS1511_TE 0x80
58#define DS1511_CS 0x40
59#define DS1511_BME 0x20
60#define DS1511_TPE 0x10
61#define DS1511_TIE 0x08
62#define DS1511_KIE 0x04
63#define DS1511_WDE 0x02
64#define DS1511_WDS 0x01
65#define DS1511_RAM_MAX 0xff
66
67#define RTC_CMD DS1511_CONTROL_B
68#define RTC_CMD1 DS1511_CONTROL_A
69
70#define RTC_ALARM_SEC DS1511_AM1_SEC
71#define RTC_ALARM_MIN DS1511_AM2_MIN
72#define RTC_ALARM_HOUR DS1511_AM3_HOUR
73#define RTC_ALARM_DATE DS1511_AM4_DATE
74
75#define RTC_SEC DS1511_SEC
76#define RTC_MIN DS1511_MIN
77#define RTC_HOUR DS1511_HOUR
78#define RTC_DOW DS1511_DOW
79#define RTC_DOM DS1511_DOM
80#define RTC_MON DS1511_MONTH
81#define RTC_YEAR DS1511_YEAR
82#define RTC_CENTURY DS1511_CENTURY
83
84#define RTC_TIE DS1511_TIE
85#define RTC_TE DS1511_TE
86
87struct rtc_plat_data {
88 struct rtc_device *rtc;
89 void __iomem *ioaddr; /* virtual base address */
90 unsigned long baseaddr; /* physical base address */
91 int size; /* amount of memory mapped */
92 int irq;
93 unsigned int irqen;
94 int alrm_sec;
95 int alrm_min;
96 int alrm_hour;
97 int alrm_mday;
98};
99
100static DEFINE_SPINLOCK(ds1511_lock);
101
102static __iomem char *ds1511_base;
103static u32 reg_spacing = 1;
104
105 static noinline void
106rtc_write(uint8_t val, uint32_t reg)
107{
108 writeb(val, ds1511_base + (reg * reg_spacing));
109}
110
111 static inline void
112rtc_write_alarm(uint8_t val, enum ds1511reg reg)
113{
114 rtc_write((val | 0x80), reg);
115}
116
117 static noinline uint8_t
118rtc_read(enum ds1511reg reg)
119{
120 return readb(ds1511_base + (reg * reg_spacing));
121}
122
123 static inline void
124rtc_disable_update(void)
125{
126 rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD);
127}
128
129 static void
130rtc_enable_update(void)
131{
132 rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD);
133}
134
135/*
136 * #define DS1511_WDOG_RESET_SUPPORT
137 *
138 * Uncomment this if you want to use these routines in
139 * some platform code.
140 */
141#ifdef DS1511_WDOG_RESET_SUPPORT
142/*
143 * just enough code to set the watchdog timer so that it
144 * will reboot the system
145 */
146 void
147ds1511_wdog_set(unsigned long deciseconds)
148{
149 /*
150 * the wdog timer can take 99.99 seconds
151 */
152 deciseconds %= 10000;
153 /*
154 * set the wdog values in the wdog registers
155 */
156 rtc_write(BIN2BCD(deciseconds % 100), DS1511_WD_MSEC);
157 rtc_write(BIN2BCD(deciseconds / 100), DS1511_WD_SEC);
158 /*
159 * set wdog enable and wdog 'steering' bit to issue a reset
160 */
161 rtc_write(DS1511_WDE | DS1511_WDS, RTC_CMD);
162}
163
164 void
165ds1511_wdog_disable(void)
166{
167 /*
168 * clear wdog enable and wdog 'steering' bits
169 */
170 rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD);
171 /*
172 * clear the wdog counter
173 */
174 rtc_write(0, DS1511_WD_MSEC);
175 rtc_write(0, DS1511_WD_SEC);
176}
177#endif
178
179/*
180 * set the rtc chip's idea of the time.
181 * stupidly, some callers call with year unmolested;
182 * and some call with year = year - 1900. thanks.
183 */
Adrian Bunka3ed1072008-04-28 02:11:55 -0700184static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm)
Andrew Sharp8f267952008-02-06 01:38:46 -0800185{
186 u8 mon, day, dow, hrs, min, sec, yrs, cen;
187 unsigned int flags;
188
189 /*
190 * won't have to change this for a while
191 */
192 if (rtc_tm->tm_year < 1900) {
193 rtc_tm->tm_year += 1900;
194 }
195
196 if (rtc_tm->tm_year < 1970) {
197 return -EINVAL;
198 }
199 yrs = rtc_tm->tm_year % 100;
200 cen = rtc_tm->tm_year / 100;
201 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */
202 day = rtc_tm->tm_mday;
203 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */
204 hrs = rtc_tm->tm_hour;
205 min = rtc_tm->tm_min;
206 sec = rtc_tm->tm_sec;
207
208 if ((mon > 12) || (day == 0)) {
209 return -EINVAL;
210 }
211
212 if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year)) {
213 return -EINVAL;
214 }
215
216 if ((hrs >= 24) || (min >= 60) || (sec >= 60)) {
217 return -EINVAL;
218 }
219
220 /*
221 * each register is a different number of valid bits
222 */
223 sec = BIN2BCD(sec) & 0x7f;
224 min = BIN2BCD(min) & 0x7f;
225 hrs = BIN2BCD(hrs) & 0x3f;
226 day = BIN2BCD(day) & 0x3f;
227 mon = BIN2BCD(mon) & 0x1f;
228 yrs = BIN2BCD(yrs) & 0xff;
229 cen = BIN2BCD(cen) & 0xff;
230
231 spin_lock_irqsave(&ds1511_lock, flags);
232 rtc_disable_update();
233 rtc_write(cen, RTC_CENTURY);
234 rtc_write(yrs, RTC_YEAR);
235 rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON);
236 rtc_write(day, RTC_DOM);
237 rtc_write(hrs, RTC_HOUR);
238 rtc_write(min, RTC_MIN);
239 rtc_write(sec, RTC_SEC);
240 rtc_write(dow, RTC_DOW);
241 rtc_enable_update();
242 spin_unlock_irqrestore(&ds1511_lock, flags);
243
244 return 0;
245}
246
Adrian Bunka3ed1072008-04-28 02:11:55 -0700247static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm)
Andrew Sharp8f267952008-02-06 01:38:46 -0800248{
249 unsigned int century;
250 unsigned int flags;
251
252 spin_lock_irqsave(&ds1511_lock, flags);
253 rtc_disable_update();
254
255 rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f;
256 rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f;
257 rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f;
258 rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f;
259 rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7;
260 rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f;
261 rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f;
262 century = rtc_read(RTC_CENTURY);
263
264 rtc_enable_update();
265 spin_unlock_irqrestore(&ds1511_lock, flags);
266
267 rtc_tm->tm_sec = BCD2BIN(rtc_tm->tm_sec);
268 rtc_tm->tm_min = BCD2BIN(rtc_tm->tm_min);
269 rtc_tm->tm_hour = BCD2BIN(rtc_tm->tm_hour);
270 rtc_tm->tm_mday = BCD2BIN(rtc_tm->tm_mday);
271 rtc_tm->tm_wday = BCD2BIN(rtc_tm->tm_wday);
272 rtc_tm->tm_mon = BCD2BIN(rtc_tm->tm_mon);
273 rtc_tm->tm_year = BCD2BIN(rtc_tm->tm_year);
274 century = BCD2BIN(century) * 100;
275
276 /*
277 * Account for differences between how the RTC uses the values
278 * and how they are defined in a struct rtc_time;
279 */
280 century += rtc_tm->tm_year;
281 rtc_tm->tm_year = century - 1900;
282
283 rtc_tm->tm_mon--;
284
285 if (rtc_valid_tm(rtc_tm) < 0) {
286 dev_err(dev, "retrieved date/time is not valid.\n");
287 rtc_time_to_tm(0, rtc_tm);
288 }
289 return 0;
290}
291
292/*
293 * write the alarm register settings
294 *
295 * we only have the use to interrupt every second, otherwise
296 * known as the update interrupt, or the interrupt if the whole
297 * date/hours/mins/secs matches. the ds1511 has many more
298 * permutations, but the kernel doesn't.
299 */
300 static void
301ds1511_rtc_update_alarm(struct rtc_plat_data *pdata)
302{
303 unsigned long flags;
304
305 spin_lock_irqsave(&pdata->rtc->irq_lock, flags);
306 rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ?
307 0x80 : BIN2BCD(pdata->alrm_mday) & 0x3f,
308 RTC_ALARM_DATE);
309 rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ?
310 0x80 : BIN2BCD(pdata->alrm_hour) & 0x3f,
311 RTC_ALARM_HOUR);
312 rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ?
313 0x80 : BIN2BCD(pdata->alrm_min) & 0x7f,
314 RTC_ALARM_MIN);
315 rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ?
316 0x80 : BIN2BCD(pdata->alrm_sec) & 0x7f,
317 RTC_ALARM_SEC);
318 rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD);
319 rtc_read(RTC_CMD1); /* clear interrupts */
320 spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags);
321}
322
323 static int
324ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
325{
326 struct platform_device *pdev = to_platform_device(dev);
327 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
328
329 if (pdata->irq < 0) {
330 return -EINVAL;
331 }
332 pdata->alrm_mday = alrm->time.tm_mday;
333 pdata->alrm_hour = alrm->time.tm_hour;
334 pdata->alrm_min = alrm->time.tm_min;
335 pdata->alrm_sec = alrm->time.tm_sec;
336 if (alrm->enabled) {
337 pdata->irqen |= RTC_AF;
338 }
339 ds1511_rtc_update_alarm(pdata);
340 return 0;
341}
342
343 static int
344ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
345{
346 struct platform_device *pdev = to_platform_device(dev);
347 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
348
349 if (pdata->irq < 0) {
350 return -EINVAL;
351 }
352 alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday;
353 alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour;
354 alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min;
355 alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec;
356 alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0;
357 return 0;
358}
359
360 static irqreturn_t
361ds1511_interrupt(int irq, void *dev_id)
362{
363 struct platform_device *pdev = dev_id;
364 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
365 unsigned long events = RTC_IRQF;
366
367 /*
368 * read and clear interrupt
369 */
370 if (!(rtc_read(RTC_CMD1) & DS1511_IRQF)) {
371 return IRQ_NONE;
372 }
373 if (rtc_read(RTC_ALARM_SEC) & 0x80) {
374 events |= RTC_UF;
375 } else {
376 events |= RTC_AF;
377 }
378 rtc_update_irq(pdata->rtc, 1, events);
379 return IRQ_HANDLED;
380}
381
382 static void
383ds1511_rtc_release(struct device *dev)
384{
385 struct platform_device *pdev = to_platform_device(dev);
386 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
387
388 if (pdata->irq >= 0) {
389 pdata->irqen = 0;
390 ds1511_rtc_update_alarm(pdata);
391 }
392}
393
394 static int
395ds1511_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
396{
397 struct platform_device *pdev = to_platform_device(dev);
398 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
399
400 if (pdata->irq < 0) {
401 return -ENOIOCTLCMD; /* fall back into rtc-dev's emulation */
402 }
403 switch (cmd) {
404 case RTC_AIE_OFF:
405 pdata->irqen &= ~RTC_AF;
406 ds1511_rtc_update_alarm(pdata);
407 break;
408 case RTC_AIE_ON:
409 pdata->irqen |= RTC_AF;
410 ds1511_rtc_update_alarm(pdata);
411 break;
412 case RTC_UIE_OFF:
413 pdata->irqen &= ~RTC_UF;
414 ds1511_rtc_update_alarm(pdata);
415 break;
416 case RTC_UIE_ON:
417 pdata->irqen |= RTC_UF;
418 ds1511_rtc_update_alarm(pdata);
419 break;
420 default:
421 return -ENOIOCTLCMD;
422 }
423 return 0;
424}
425
426static const struct rtc_class_ops ds1511_rtc_ops = {
427 .read_time = ds1511_rtc_read_time,
428 .set_time = ds1511_rtc_set_time,
429 .read_alarm = ds1511_rtc_read_alarm,
430 .set_alarm = ds1511_rtc_set_alarm,
431 .release = ds1511_rtc_release,
432 .ioctl = ds1511_rtc_ioctl,
433};
434
435 static ssize_t
436ds1511_nvram_read(struct kobject *kobj, struct bin_attribute *ba,
437 char *buf, loff_t pos, size_t size)
438{
439 ssize_t count;
440
441 /*
442 * if count is more than one, turn on "burst" mode
443 * turn it off when you're done
444 */
445 if (size > 1) {
446 rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
447 }
448 if (pos > DS1511_RAM_MAX) {
449 pos = DS1511_RAM_MAX;
450 }
451 if (size + pos > DS1511_RAM_MAX + 1) {
452 size = DS1511_RAM_MAX - pos + 1;
453 }
454 rtc_write(pos, DS1511_RAMADDR_LSB);
455 for (count = 0; size > 0; count++, size--) {
456 *buf++ = rtc_read(DS1511_RAMDATA);
457 }
458 if (count > 1) {
459 rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
460 }
461 return count;
462}
463
464 static ssize_t
465ds1511_nvram_write(struct kobject *kobj, struct bin_attribute *bin_attr,
466 char *buf, loff_t pos, size_t size)
467{
468 ssize_t count;
469
470 /*
471 * if count is more than one, turn on "burst" mode
472 * turn it off when you're done
473 */
474 if (size > 1) {
475 rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
476 }
477 if (pos > DS1511_RAM_MAX) {
478 pos = DS1511_RAM_MAX;
479 }
480 if (size + pos > DS1511_RAM_MAX + 1) {
481 size = DS1511_RAM_MAX - pos + 1;
482 }
483 rtc_write(pos, DS1511_RAMADDR_LSB);
484 for (count = 0; size > 0; count++, size--) {
485 rtc_write(*buf++, DS1511_RAMDATA);
486 }
487 if (count > 1) {
488 rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
489 }
490 return count;
491}
492
493static struct bin_attribute ds1511_nvram_attr = {
494 .attr = {
495 .name = "nvram",
496 .mode = S_IRUGO | S_IWUGO,
497 .owner = THIS_MODULE,
498 },
499 .size = DS1511_RAM_MAX,
500 .read = ds1511_nvram_read,
501 .write = ds1511_nvram_write,
502};
503
504 static int __devinit
505ds1511_rtc_probe(struct platform_device *pdev)
506{
507 struct rtc_device *rtc;
508 struct resource *res;
509 struct rtc_plat_data *pdata = NULL;
510 int ret = 0;
511
512 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
513 if (!res) {
514 return -ENODEV;
515 }
516 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
517 if (!pdata) {
518 return -ENOMEM;
519 }
520 pdata->irq = -1;
521 pdata->size = res->end - res->start + 1;
522 if (!request_mem_region(res->start, pdata->size, pdev->name)) {
523 ret = -EBUSY;
524 goto out;
525 }
526 pdata->baseaddr = res->start;
527 pdata->size = pdata->size;
528 ds1511_base = ioremap(pdata->baseaddr, pdata->size);
529 if (!ds1511_base) {
530 ret = -ENOMEM;
531 goto out;
532 }
533 pdata->ioaddr = ds1511_base;
534 pdata->irq = platform_get_irq(pdev, 0);
535
536 /*
537 * turn on the clock and the crystal, etc.
538 */
539 rtc_write(0, RTC_CMD);
540 rtc_write(0, RTC_CMD1);
541 /*
542 * clear the wdog counter
543 */
544 rtc_write(0, DS1511_WD_MSEC);
545 rtc_write(0, DS1511_WD_SEC);
546 /*
547 * start the clock
548 */
549 rtc_enable_update();
550
551 /*
552 * check for a dying bat-tree
553 */
554 if (rtc_read(RTC_CMD1) & DS1511_BLF1) {
555 dev_warn(&pdev->dev, "voltage-low detected.\n");
556 }
557
558 /*
559 * if the platform has an interrupt in mind for this device,
560 * then by all means, set it
561 */
562 if (pdata->irq >= 0) {
563 rtc_read(RTC_CMD1);
564 if (request_irq(pdata->irq, ds1511_interrupt,
565 IRQF_DISABLED | IRQF_SHARED, pdev->name, pdev) < 0) {
566
567 dev_warn(&pdev->dev, "interrupt not available.\n");
568 pdata->irq = -1;
569 }
570 }
571
572 rtc = rtc_device_register(pdev->name, &pdev->dev, &ds1511_rtc_ops,
573 THIS_MODULE);
574 if (IS_ERR(rtc)) {
575 ret = PTR_ERR(rtc);
576 goto out;
577 }
578 pdata->rtc = rtc;
579 platform_set_drvdata(pdev, pdata);
580 ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
581 if (ret) {
582 goto out;
583 }
584 return 0;
585 out:
586 if (pdata->rtc) {
587 rtc_device_unregister(pdata->rtc);
588 }
589 if (pdata->irq >= 0) {
590 free_irq(pdata->irq, pdev);
591 }
592 if (ds1511_base) {
593 iounmap(ds1511_base);
594 ds1511_base = NULL;
595 }
596 if (pdata->baseaddr) {
597 release_mem_region(pdata->baseaddr, pdata->size);
598 }
599
600 kfree(pdata);
601 return ret;
602}
603
604 static int __devexit
605ds1511_rtc_remove(struct platform_device *pdev)
606{
607 struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
608
609 sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr);
610 rtc_device_unregister(pdata->rtc);
611 pdata->rtc = NULL;
612 if (pdata->irq >= 0) {
613 /*
614 * disable the alarm interrupt
615 */
616 rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD);
617 rtc_read(RTC_CMD1);
618 free_irq(pdata->irq, pdev);
619 }
620 iounmap(pdata->ioaddr);
621 ds1511_base = NULL;
622 release_mem_region(pdata->baseaddr, pdata->size);
623 kfree(pdata);
624 return 0;
625}
626
Kay Sieversad28a072008-04-10 21:29:25 -0700627/* work with hotplug and coldplug */
628MODULE_ALIAS("platform:ds1511");
629
Andrew Sharp8f267952008-02-06 01:38:46 -0800630static struct platform_driver ds1511_rtc_driver = {
631 .probe = ds1511_rtc_probe,
632 .remove = __devexit_p(ds1511_rtc_remove),
633 .driver = {
634 .name = "ds1511",
635 .owner = THIS_MODULE,
636 },
637};
638
639 static int __init
640ds1511_rtc_init(void)
641{
642 return platform_driver_register(&ds1511_rtc_driver);
643}
644
645 static void __exit
646ds1511_rtc_exit(void)
647{
648 return platform_driver_unregister(&ds1511_rtc_driver);
649}
650
651module_init(ds1511_rtc_init);
652module_exit(ds1511_rtc_exit);
653
654MODULE_AUTHOR("Andrew Sharp <andy.sharp@onstor.com>");
655MODULE_DESCRIPTION("Dallas DS1511 RTC driver");
656MODULE_LICENSE("GPL");
657MODULE_VERSION(DRV_VERSION);