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gerrit-public.fairphone.software / fp2-dev / kernel / msm / c4d7e58fb52c632d8e33cd23a4917d7a7f8302ac / . / arch / arm / mach-omap2 / powerdomain44xx.c
blob: 4c5ab1a2d44b7bd6dabdc9b5904d3c4c33c1787e [file] [log] [blame]
Rajendra Nayakf327e072010-12-21 20:01:18 -0700[diff] [blame]1/*
2 * OMAP4 powerdomain control
3 *
4 * Copyright (C) 2009-2010 Texas Instruments, Inc.
5 * Copyright (C) 2007-2009 Nokia Corporation
6 *
7 * Derived from mach-omap2/powerdomain.c written by Paul Walmsley
8 * Rajendra Nayak <rnayak@ti.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/io.h>
16#include <linux/errno.h>
17#include <linux/delay.h>
Paul Walmsley6e014782010-12-21 20:01:20 -0700[diff] [blame]18
Rajendra Nayakf327e072010-12-21 20:01:18 -0700[diff] [blame]19#include <plat/powerdomain.h>
20#include <plat/prcm.h>
Paul Walmsley59fb6592010-12-21 15:30:55 -0700[diff] [blame]21#include "prm2xxx_3xxx.h"
Paul Walmsleyd198b512010-12-21 15:30:54 -0700[diff] [blame]22#include "prm44xx.h"
Rajendra Nayakf327e072010-12-21 20:01:18 -0700[diff] [blame]23#include "prm-regbits-44xx.h"
24#include "powerdomains.h"
25
26static int omap4_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
27{
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]28 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
Rajendra Nayakf327e072010-12-21 20:01:18 -0700[diff] [blame]29 (pwrst << OMAP_POWERSTATE_SHIFT),
30 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
31 return 0;
32}
33
34static int omap4_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
35{
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]36 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
Rajendra Nayakf327e072010-12-21 20:01:18 -0700[diff] [blame]37 OMAP4_PM_PWSTCTRL, OMAP_POWERSTATE_MASK);
38}
39
40static int omap4_pwrdm_read_pwrst(struct powerdomain *pwrdm)
41{
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]42 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
Rajendra Nayakf327e072010-12-21 20:01:18 -0700[diff] [blame]43 OMAP4_PM_PWSTST, OMAP_POWERSTATEST_MASK);
44}
45
46static int omap4_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
47{
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]48 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
Rajendra Nayakf327e072010-12-21 20:01:18 -0700[diff] [blame]49 OMAP4430_LASTPOWERSTATEENTERED_MASK);
50}
51
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]52static int omap4_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
53{
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]54 omap2_prm_rmw_mod_reg_bits(OMAP4430_LOWPOWERSTATECHANGE_MASK,
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]55 (1 << OMAP4430_LOWPOWERSTATECHANGE_SHIFT),
56 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
57 return 0;
58}
59
Santosh Shilimkar4b4f62c2010-12-21 20:01:19 -0700[diff] [blame]60static int omap4_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
61{
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]62 omap2_prm_rmw_mod_reg_bits(OMAP4430_LASTPOWERSTATEENTERED_MASK,
Santosh Shilimkar4b4f62c2010-12-21 20:01:19 -0700[diff] [blame]63 OMAP4430_LASTPOWERSTATEENTERED_MASK,
64 pwrdm->prcm_offs, OMAP4_PM_PWSTST);
65 return 0;
66}
67
Rajendra Nayak12627572010-12-21 20:01:18 -0700[diff] [blame]68static int omap4_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
69{
70 u32 v;
71
72 v = pwrst << __ffs(OMAP4430_LOGICRETSTATE_MASK);
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]73 omap2_prm_rmw_mod_reg_bits(OMAP4430_LOGICRETSTATE_MASK, v,
Rajendra Nayak12627572010-12-21 20:01:18 -0700[diff] [blame]74 pwrdm->prcm_offs, OMAP4_PM_PWSTCTRL);
75
76 return 0;
77}
78
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]79static int omap4_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
80 u8 pwrst)
81{
82 u32 m;
83
84 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank);
85
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]86 omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]87 OMAP4_PM_PWSTCTRL);
88
89 return 0;
90}
91
92static int omap4_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
93 u8 pwrst)
94{
95 u32 m;
96
97 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
98
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]99 omap2_prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]100 OMAP4_PM_PWSTCTRL);
101
102 return 0;
103}
104
Rajendra Nayak12627572010-12-21 20:01:18 -0700[diff] [blame]105static int omap4_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
106{
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]107 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
Rajendra Nayak12627572010-12-21 20:01:18 -0700[diff] [blame]108 OMAP4430_LOGICSTATEST_MASK);
109}
110
111static int omap4_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
112{
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]113 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
114 OMAP4_PM_PWSTCTRL,
115 OMAP4430_LOGICRETSTATE_MASK);
Rajendra Nayak12627572010-12-21 20:01:18 -0700[diff] [blame]116}
117
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]118static int omap4_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
119{
120 u32 m;
121
122 m = omap2_pwrdm_get_mem_bank_stst_mask(bank);
123
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]124 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP4_PM_PWSTST,
125 m);
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]126}
127
128static int omap4_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
129{
130 u32 m;
131
132 m = omap2_pwrdm_get_mem_bank_retst_mask(bank);
133
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]134 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
135 OMAP4_PM_PWSTCTRL, m);
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]136}
137
138static int omap4_pwrdm_wait_transition(struct powerdomain *pwrdm)
139{
140 u32 c = 0;
141
142 /*
143 * REVISIT: pwrdm_wait_transition() may be better implemented
144 * via a callback and a periodic timer check -- how long do we expect
145 * powerdomain transitions to take?
146 */
147
148 /* XXX Is this udelay() value meaningful? */
Paul Walmsleyc4d7e582010-12-21 21:05:14 -0700[diff] [blame^]149 while ((omap2_prm_read_mod_reg(pwrdm->prcm_offs, OMAP4_PM_PWSTST) &
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]150 OMAP_INTRANSITION_MASK) &&
151 (c++ < PWRDM_TRANSITION_BAILOUT))
152 udelay(1);
153
154 if (c > PWRDM_TRANSITION_BAILOUT) {
155 printk(KERN_ERR "powerdomain: waited too long for "
156 "powerdomain %s to complete transition\n", pwrdm->name);
157 return -EAGAIN;
158 }
159
160 pr_debug("powerdomain: completed transition in %d loops\n", c);
161
162 return 0;
163}
164
Rajendra Nayakf327e072010-12-21 20:01:18 -0700[diff] [blame]165struct pwrdm_ops omap4_pwrdm_operations = {
166 .pwrdm_set_next_pwrst = omap4_pwrdm_set_next_pwrst,
167 .pwrdm_read_next_pwrst = omap4_pwrdm_read_next_pwrst,
168 .pwrdm_read_pwrst = omap4_pwrdm_read_pwrst,
169 .pwrdm_read_prev_pwrst = omap4_pwrdm_read_prev_pwrst,
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]170 .pwrdm_set_lowpwrstchange = omap4_pwrdm_set_lowpwrstchange,
Santosh Shilimkar4b4f62c2010-12-21 20:01:19 -0700[diff] [blame]171 .pwrdm_clear_all_prev_pwrst = omap4_pwrdm_clear_all_prev_pwrst,
Rajendra Nayak12627572010-12-21 20:01:18 -0700[diff] [blame]172 .pwrdm_set_logic_retst = omap4_pwrdm_set_logic_retst,
173 .pwrdm_read_logic_pwrst = omap4_pwrdm_read_logic_pwrst,
174 .pwrdm_read_logic_retst = omap4_pwrdm_read_logic_retst,
Rajendra Nayak9b7fc902010-12-21 20:01:19 -0700[diff] [blame]175 .pwrdm_read_mem_pwrst = omap4_pwrdm_read_mem_pwrst,
176 .pwrdm_read_mem_retst = omap4_pwrdm_read_mem_retst,
177 .pwrdm_set_mem_onst = omap4_pwrdm_set_mem_onst,
178 .pwrdm_set_mem_retst = omap4_pwrdm_set_mem_retst,
179 .pwrdm_wait_transition = omap4_pwrdm_wait_transition,
Rajendra Nayakf327e072010-12-21 20:01:18 -0700[diff] [blame]180};