blob: 433644edf791cce05f3e3625d71bf7d5e52d1995 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mach-pxa/pxa27x.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Nov 05, 2002
6 * Copyright: MontaVista Software Inc.
7 *
8 * Code specific to PXA27x aka Bulverde.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/pm.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010018#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
20#include <asm/hardware.h>
21#include <asm/irq.h>
Eric Miaocd491042007-06-22 04:14:09 +010022#include <asm/arch/irqs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <asm/arch/pxa-regs.h>
Richard Purdie81f280e2005-11-12 14:22:11 +000024#include <asm/arch/ohci.h>
Russell Kinge176bb02007-05-15 11:16:10 +010025#include <asm/arch/pm.h>
Eric Miaof53f0662007-06-22 05:40:17 +010026#include <asm/arch/dma.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
28#include "generic.h"
Russell King46c41e62007-05-15 15:39:36 +010029#include "devices.h"
Russell Kinga6dba202007-08-20 10:18:02 +010030#include "clock.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
32/* Crystal clock: 13MHz */
33#define BASE_CLK 13000000
34
35/*
36 * Get the clock frequency as reflected by CCSR and the turbo flag.
37 * We assume these values have been applied via a fcs.
38 * If info is not 0 we also display the current settings.
39 */
Russell King15a40332007-08-20 10:07:44 +010040unsigned int pxa27x_get_clk_frequency_khz(int info)
Linus Torvalds1da177e2005-04-16 15:20:36 -070041{
42 unsigned long ccsr, clkcfg;
43 unsigned int l, L, m, M, n2, N, S;
44 int cccr_a, t, ht, b;
45
46 ccsr = CCSR;
47 cccr_a = CCCR & (1 << 25);
48
49 /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
50 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
Richard Purdieafe5df22006-02-01 19:25:59 +000051 t = clkcfg & (1 << 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -070052 ht = clkcfg & (1 << 2);
53 b = clkcfg & (1 << 3);
54
55 l = ccsr & 0x1f;
56 n2 = (ccsr>>7) & 0xf;
57 m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
58
59 L = l * BASE_CLK;
60 N = (L * n2) / 2;
61 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
62 S = (b) ? L : (L/2);
63
64 if (info) {
65 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
66 L / 1000000, (L % 1000000) / 10000, l );
67 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
68 N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,
69 (t) ? "" : "in" );
70 printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",
71 M / 1000000, (M % 1000000) / 10000, m );
72 printk( KERN_INFO "System bus clock: %d.%02dMHz \n",
73 S / 1000000, (S % 1000000) / 10000 );
74 }
75
76 return (t) ? (N/1000) : (L/1000);
77}
78
79/*
80 * Return the current mem clock frequency in units of 10kHz as
81 * reflected by CCCR[A], B, and L
82 */
Russell King15a40332007-08-20 10:07:44 +010083unsigned int pxa27x_get_memclk_frequency_10khz(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070084{
85 unsigned long ccsr, clkcfg;
86 unsigned int l, L, m, M;
87 int cccr_a, b;
88
89 ccsr = CCSR;
90 cccr_a = CCCR & (1 << 25);
91
92 /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
93 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
94 b = clkcfg & (1 << 3);
95
96 l = ccsr & 0x1f;
97 m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
98
99 L = l * BASE_CLK;
100 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
101
102 return (M / 10000);
103}
104
105/*
106 * Return the current LCD clock frequency in units of 10kHz as
107 */
Russell King15a40332007-08-20 10:07:44 +0100108unsigned int pxa27x_get_lcdclk_frequency_10khz(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109{
110 unsigned long ccsr;
111 unsigned int l, L, k, K;
112
113 ccsr = CCSR;
114
115 l = ccsr & 0x1f;
116 k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4;
117
118 L = l * BASE_CLK;
119 K = L / k;
120
121 return (K / 10000);
122}
123
Russell Kinga6dba202007-08-20 10:18:02 +0100124static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk)
125{
126 return pxa27x_get_lcdclk_frequency_10khz() * 10000;
127}
128
129static const struct clkops clk_pxa27x_lcd_ops = {
130 .enable = clk_cken_enable,
131 .disable = clk_cken_disable,
132 .getrate = clk_pxa27x_lcd_getrate,
133};
134
135static struct clk pxa27x_clks[] = {
136 INIT_CK("LCDCLK", LCD, &clk_pxa27x_lcd_ops, &pxa_device_fb.dev),
137 INIT_CK("CAMCLK", CAMERA, &clk_pxa27x_lcd_ops, NULL),
138
139 INIT_CKEN("UARTCLK", STUART, 14857000, 1, &pxa_device_stuart.dev),
140 INIT_CKEN("UARTCLK", FFUART, 14857000, 1, &pxa_device_ffuart.dev),
141 INIT_CKEN("UARTCLK", BTUART, 14857000, 1, &pxa_device_btuart.dev),
142
143 INIT_CKEN("I2SCLK", I2S, 14682000, 0, &pxa_device_i2s.dev),
144 INIT_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev),
145 INIT_CKEN("UDCCLK", USB, 48000000, 5, &pxa_device_udc.dev),
146 INIT_CKEN("MMCCLK", MMC, 19500000, 0, &pxa_device_mci.dev),
147 INIT_CKEN("FICPCLK", FICP, 48000000, 0, &pxa_device_ficp.dev),
148
149 INIT_CKEN("USBCLK", USB, 48000000, 0, &pxa27x_device_ohci.dev),
150 INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev),
151 INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, NULL),
152
153 /*
154 INIT_CKEN("PWMCLK", PWM0, 13000000, 0, NULL),
155 INIT_CKEN("SSPCLK", SSP1, 13000000, 0, NULL),
156 INIT_CKEN("SSPCLK", SSP2, 13000000, 0, NULL),
157 INIT_CKEN("SSPCLK", SSP3, 13000000, 0, NULL),
158 INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL),
159 INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL),
160 INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL),
161 INIT_CKEN("IMCLK", IM, 0, 0, NULL),
162 INIT_CKEN("MEMCLK", MEMC, 0, 0, NULL),
163 */
164};
165
Nicolas Pitrea8fa3f02005-06-13 22:35:41 +0100166#ifdef CONFIG_PM
167
Eric Miao711be5c2007-07-18 11:38:45 +0100168#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
169#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
170
171#define RESTORE_GPLEVEL(n) do { \
172 GPSR##n = sleep_save[SLEEP_SAVE_GPLR##n]; \
173 GPCR##n = ~sleep_save[SLEEP_SAVE_GPLR##n]; \
174} while (0)
175
176/*
177 * List of global PXA peripheral registers to preserve.
178 * More ones like CP and general purpose register values are preserved
179 * with the stack pointer in sleep.S.
180 */
181enum { SLEEP_SAVE_START = 0,
182
183 SLEEP_SAVE_GPLR0, SLEEP_SAVE_GPLR1, SLEEP_SAVE_GPLR2, SLEEP_SAVE_GPLR3,
184 SLEEP_SAVE_GPDR0, SLEEP_SAVE_GPDR1, SLEEP_SAVE_GPDR2, SLEEP_SAVE_GPDR3,
185 SLEEP_SAVE_GRER0, SLEEP_SAVE_GRER1, SLEEP_SAVE_GRER2, SLEEP_SAVE_GRER3,
186 SLEEP_SAVE_GFER0, SLEEP_SAVE_GFER1, SLEEP_SAVE_GFER2, SLEEP_SAVE_GFER3,
187 SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3,
188
189 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
190 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
191 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
192 SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U,
193
194 SLEEP_SAVE_PSTR,
195
196 SLEEP_SAVE_ICMR,
197 SLEEP_SAVE_CKEN,
198
199 SLEEP_SAVE_MDREFR,
200 SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER,
201 SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR,
202
203 SLEEP_SAVE_SIZE
204};
205
206void pxa27x_cpu_pm_save(unsigned long *sleep_save)
207{
208 SAVE(GPLR0); SAVE(GPLR1); SAVE(GPLR2); SAVE(GPLR3);
209 SAVE(GPDR0); SAVE(GPDR1); SAVE(GPDR2); SAVE(GPDR3);
210 SAVE(GRER0); SAVE(GRER1); SAVE(GRER2); SAVE(GRER3);
211 SAVE(GFER0); SAVE(GFER1); SAVE(GFER2); SAVE(GFER3);
212 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3);
213
214 SAVE(GAFR0_L); SAVE(GAFR0_U);
215 SAVE(GAFR1_L); SAVE(GAFR1_U);
216 SAVE(GAFR2_L); SAVE(GAFR2_U);
217 SAVE(GAFR3_L); SAVE(GAFR3_U);
218
219 SAVE(MDREFR);
220 SAVE(PWER); SAVE(PCFR); SAVE(PRER);
221 SAVE(PFER); SAVE(PKWR);
222
223 SAVE(ICMR); ICMR = 0;
224 SAVE(CKEN);
225 SAVE(PSTR);
226
227 /* Clear GPIO transition detect bits */
228 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2; GEDR3 = GEDR3;
229}
230
231void pxa27x_cpu_pm_restore(unsigned long *sleep_save)
232{
233 /* ensure not to come back here if it wasn't intended */
234 PSPR = 0;
235
236 /* restore registers */
237 RESTORE_GPLEVEL(0); RESTORE_GPLEVEL(1);
238 RESTORE_GPLEVEL(2); RESTORE_GPLEVEL(3);
239 RESTORE(GPDR0); RESTORE(GPDR1); RESTORE(GPDR2); RESTORE(GPDR3);
240 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
241 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
242 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
243 RESTORE(GAFR3_L); RESTORE(GAFR3_U);
244 RESTORE(GRER0); RESTORE(GRER1); RESTORE(GRER2); RESTORE(GRER3);
245 RESTORE(GFER0); RESTORE(GFER1); RESTORE(GFER2); RESTORE(GFER3);
246 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3);
247
248 RESTORE(MDREFR);
249 RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER);
250 RESTORE(PFER); RESTORE(PKWR);
251
252 PSSR = PSSR_RDH | PSSR_PH;
253
254 RESTORE(CKEN);
255
256 ICLR = 0;
257 ICCR = 1;
258 RESTORE(ICMR);
259 RESTORE(PSTR);
260}
261
262void pxa27x_cpu_pm_enter(suspend_state_t state)
Todd Poynor87754202005-06-03 20:52:27 +0100263{
264 extern void pxa_cpu_standby(void);
Todd Poynor87754202005-06-03 20:52:27 +0100265
Todd Poynor26705ca2005-07-01 11:27:05 +0100266 if (state == PM_SUSPEND_STANDBY)
Eric Miao711be5c2007-07-18 11:38:45 +0100267 CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER) |
268 (1 << CKEN_LCD) | (1 << CKEN_PWM0);
Todd Poynor26705ca2005-07-01 11:27:05 +0100269 else
Richard Purdie1f750a72007-07-02 10:19:07 +0100270 CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER);
Todd Poynor87754202005-06-03 20:52:27 +0100271
272 /* ensure voltage-change sequencer not initiated, which hangs */
273 PCFR &= ~PCFR_FVC;
274
275 /* Clear edge-detect status register. */
276 PEDR = 0xDF12FE1B;
277
278 switch (state) {
Todd Poynor26705ca2005-07-01 11:27:05 +0100279 case PM_SUSPEND_STANDBY:
280 pxa_cpu_standby();
281 break;
Todd Poynor87754202005-06-03 20:52:27 +0100282 case PM_SUSPEND_MEM:
283 /* set resume return address */
284 PSPR = virt_to_phys(pxa_cpu_resume);
Eric Miaob750a092007-07-18 11:40:13 +0100285 pxa27x_cpu_suspend(PWRMODE_SLEEP);
Todd Poynor87754202005-06-03 20:52:27 +0100286 break;
287 }
288}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289
Eric Miao711be5c2007-07-18 11:38:45 +0100290static int pxa27x_cpu_pm_valid(suspend_state_t state)
Russell King88dfe982007-05-15 11:22:48 +0100291{
292 return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
293}
294
Eric Miao711be5c2007-07-18 11:38:45 +0100295static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = {
296 .save_size = SLEEP_SAVE_SIZE,
297 .save = pxa27x_cpu_pm_save,
298 .restore = pxa27x_cpu_pm_restore,
299 .valid = pxa27x_cpu_pm_valid,
300 .enter = pxa27x_cpu_pm_enter,
Russell Kinge176bb02007-05-15 11:16:10 +0100301};
Eric Miao711be5c2007-07-18 11:38:45 +0100302
303static void __init pxa27x_init_pm(void)
304{
305 pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns;
306}
Nicolas Pitrea8fa3f02005-06-13 22:35:41 +0100307#endif
308
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309/*
310 * device registration specific to PXA27x.
311 */
312
313static u64 pxa27x_dmamask = 0xffffffffUL;
314
315static struct resource pxa27x_ohci_resources[] = {
316 [0] = {
317 .start = 0x4C000000,
318 .end = 0x4C00ff6f,
319 .flags = IORESOURCE_MEM,
320 },
321 [1] = {
322 .start = IRQ_USBH1,
323 .end = IRQ_USBH1,
324 .flags = IORESOURCE_IRQ,
325 },
326};
327
Russell King00dc4f92007-08-20 10:09:18 +0100328struct platform_device pxa27x_device_ohci = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329 .name = "pxa27x-ohci",
330 .id = -1,
331 .dev = {
332 .dma_mask = &pxa27x_dmamask,
333 .coherent_dma_mask = 0xffffffff,
334 },
335 .num_resources = ARRAY_SIZE(pxa27x_ohci_resources),
336 .resource = pxa27x_ohci_resources,
337};
338
Richard Purdie81f280e2005-11-12 14:22:11 +0000339void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
340{
Eric Miaoe09d02e2007-07-17 10:45:58 +0100341 pxa27x_device_ohci.dev.platform_data = info;
Richard Purdie81f280e2005-11-12 14:22:11 +0000342}
343
Russell King34f32312007-05-15 10:39:49 +0100344static struct resource i2c_power_resources[] = {
345 {
346 .start = 0x40f00180,
347 .end = 0x40f001a3,
348 .flags = IORESOURCE_MEM,
349 }, {
350 .start = IRQ_PWRI2C,
351 .end = IRQ_PWRI2C,
352 .flags = IORESOURCE_IRQ,
353 },
354};
355
Russell King00dc4f92007-08-20 10:09:18 +0100356struct platform_device pxa27x_device_i2c_power = {
Russell King34f32312007-05-15 10:39:49 +0100357 .name = "pxa2xx-i2c",
358 .id = 1,
359 .resource = i2c_power_resources,
360 .num_resources = ARRAY_SIZE(i2c_power_resources),
361};
362
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363static struct platform_device *devices[] __initdata = {
Eric Miaoe09d02e2007-07-17 10:45:58 +0100364 &pxa_device_mci,
365 &pxa_device_udc,
366 &pxa_device_fb,
367 &pxa_device_ffuart,
368 &pxa_device_btuart,
369 &pxa_device_stuart,
370 &pxa_device_i2c,
371 &pxa_device_i2s,
372 &pxa_device_ficp,
373 &pxa_device_rtc,
374 &pxa27x_device_i2c_power,
375 &pxa27x_device_ohci,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376};
377
Eric Miaocd491042007-06-22 04:14:09 +0100378void __init pxa27x_init_irq(void)
379{
380 pxa_init_irq_low();
381 pxa_init_irq_high();
382 pxa_init_irq_gpio(128);
383}
384
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385static int __init pxa27x_init(void)
386{
Russell Kinge176bb02007-05-15 11:16:10 +0100387 int ret = 0;
388 if (cpu_is_pxa27x()) {
Russell Kinga6dba202007-08-20 10:18:02 +0100389 clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks));
390
Eric Miaof53f0662007-06-22 05:40:17 +0100391 if ((ret = pxa_init_dma(32)))
392 return ret;
Russell Kinge176bb02007-05-15 11:16:10 +0100393#ifdef CONFIG_PM
Eric Miao711be5c2007-07-18 11:38:45 +0100394 pxa27x_init_pm();
Russell Kinge176bb02007-05-15 11:16:10 +0100395#endif
396 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
397 }
398 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399}
400
401subsys_initcall(pxa27x_init);