blob: f1c0ec308bfe6e35efe0ad121d6169b0938d4d91 [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Joe Perchesada1db52010-02-17 15:01:59 +000025#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
Stephen Hemminger793b8832005-09-14 16:06:14 -070027#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070028#include <linux/kernel.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070029#include <linux/module.h>
30#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080031#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070032#include <linux/etherdevice.h>
33#include <linux/ethtool.h>
34#include <linux/pci.h>
35#include <linux/ip.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030036#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070037#include <linux/tcp.h>
38#include <linux/in.h>
39#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080040#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070041#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080042#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070043#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080044#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070045
46#include <asm/irq.h>
47
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070048#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
49#define SKY2_VLAN_TAG_USED 1
50#endif
51
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070052#include "sky2.h"
53
54#define DRV_NAME "sky2"
stephen hemmingercfc08612010-02-12 06:58:07 +000055#define DRV_VERSION "1.27"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070056
57/*
58 * The Yukon II chipset takes 64 bit command blocks (called list elements)
59 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070060 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070061 */
62
Stephen Hemminger14d02632006-09-26 11:57:43 -070063#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070064#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070065#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080066#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070067
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +000068/* This is the worst case number of transmit list elements for a single skb:
Stephen Hemminger07e31632009-09-14 06:12:55 +000069 VLAN:GSO + CKSUM + Data + skb_frags * DMA */
70#define MAX_SKB_TX_LE (2 + (sizeof(dma_addr_t)/sizeof(u32))*(MAX_SKB_FRAGS+1))
Stephen Hemmingere9c1be82009-06-17 07:30:37 +000071#define TX_MIN_PENDING (MAX_SKB_TX_LE+1)
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +000072#define TX_MAX_PENDING 4096
73#define TX_DEF_PENDING 127
Stephen Hemminger793b8832005-09-14 16:06:14 -070074
75#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070076#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070077#define TX_WATCHDOG (5 * HZ)
78#define NAPI_WEIGHT 64
79#define PHY_RETRIES 1000
80
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070081#define SKY2_EEPROM_MAGIC 0x9955aabb
82
83
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070084#define RING_NEXT(x,s) (((x)+1) & ((s)-1))
85
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070086static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070087 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
88 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080089 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070090
Stephen Hemminger793b8832005-09-14 16:06:14 -070091static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070092module_param(debug, int, 0);
93MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
94
Stephen Hemminger14d02632006-09-26 11:57:43 -070095static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080096module_param(copybreak, int, 0);
97MODULE_PARM_DESC(copybreak, "Receive copy threshold");
98
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080099static int disable_msi = 0;
100module_param(disable_msi, int, 0);
101MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
102
Stephen Hemmingere6cac9b2008-06-17 09:04:26 -0700103static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
105 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemmingere30a4ac2009-10-29 06:37:05 +0000106 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700107 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700108 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800109 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800110 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingera3b4fce2008-06-14 10:32:15 -0700124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4355) }, /* 88E8040T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4357) }, /* 88E8042 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800137 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
138 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700139 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800140 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800141 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
142 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700143 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000144 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700145 { 0 }
146};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700147
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700148MODULE_DEVICE_TABLE(pci, sky2_id_table);
149
150/* Avoid conditionals by using array */
151static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
152static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700153static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700154
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100155static void sky2_set_multicast(struct net_device *dev);
156
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800157/* Access to PHY via serial interconnect */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800158static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700159{
160 int i;
161
162 gma_write16(hw, port, GM_SMI_DATA, val);
163 gma_write16(hw, port, GM_SMI_CTRL,
164 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
165
166 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800167 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
168 if (ctrl == 0xffff)
169 goto io_error;
170
171 if (!(ctrl & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800172 return 0;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800173
174 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700175 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800176
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800177 dev_warn(&hw->pdev->dev,"%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800178 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800179
180io_error:
181 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
182 return -EIO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700183}
184
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800185static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700186{
187 int i;
188
Stephen Hemminger793b8832005-09-14 16:06:14 -0700189 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700190 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
191
192 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800193 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
194 if (ctrl == 0xffff)
195 goto io_error;
196
197 if (ctrl & GM_SMI_CT_RD_VAL) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800198 *val = gma_read16(hw, port, GM_SMI_DATA);
199 return 0;
200 }
201
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800202 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700203 }
204
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800205 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800206 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800207io_error:
208 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
209 return -EIO;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800210}
211
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800212static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800213{
214 u16 v;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800215 __gm_phy_read(hw, port, reg, &v);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800216 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700217}
218
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800219
220static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700221{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800222 /* switch power to VCC (WA for VAUX problem) */
223 sky2_write8(hw, B0_POWER_CTRL,
224 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700225
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800226 /* disable Core Clock Division, */
227 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700228
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000229 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800230 /* enable bits are inverted */
231 sky2_write8(hw, B2_Y2_CLK_GATE,
232 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
233 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
234 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
235 else
236 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700237
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700238 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700239 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700240
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800241 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700242
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800243 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700244 /* set all bits to 0 except bits 15..12 and 8 */
245 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800246 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700247
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800248 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700249 /* set all bits to 0 except bits 28 & 27 */
250 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800251 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700252
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800253 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700254
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000255 sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON);
256
Stephen Hemminger8f709202007-06-04 17:23:25 -0700257 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
258 reg = sky2_read32(hw, B2_GP_IO);
259 reg |= GLB_GPIO_STAT_RACE_DIS;
260 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700261
262 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700263 }
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000264
265 /* Turn on "driver loaded" LED */
266 sky2_write16(hw, B0_CTST, Y2_LED_STAT_ON);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800267}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700268
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800269static void sky2_power_aux(struct sky2_hw *hw)
270{
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000271 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800272 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
273 else
274 /* enable bits are inverted */
275 sky2_write8(hw, B2_Y2_CLK_GATE,
276 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
277 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
278 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
279
Stephen Hemmingerc23ddf82009-09-03 06:16:25 +0000280 /* switch power to VAUX if supported and PME from D3cold */
281 if ( (sky2_read32(hw, B0_CTST) & Y2_VAUX_AVAIL) &&
282 pci_pme_capable(hw->pdev, PCI_D3cold))
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800283 sky2_write8(hw, B0_POWER_CTRL,
284 (PC_VAUX_ENA | PC_VCC_ENA |
285 PC_VAUX_ON | PC_VCC_OFF));
Stephen Hemminger10547ae2009-08-31 07:31:41 +0000286
287 /* turn off "driver loaded LED" */
288 sky2_write16(hw, B0_CTST, Y2_LED_STAT_OFF);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700289}
290
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700291static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700292{
293 u16 reg;
294
295 /* disable all GMAC IRQ's */
296 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700297
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700298 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
299 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
300 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
301 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
302
303 reg = gma_read16(hw, port, GM_RX_CTRL);
304 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
305 gma_write16(hw, port, GM_RX_CTRL, reg);
306}
307
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700308/* flow control to advertise bits */
309static const u16 copper_fc_adv[] = {
310 [FC_NONE] = 0,
311 [FC_TX] = PHY_M_AN_ASP,
312 [FC_RX] = PHY_M_AN_PC,
313 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
314};
315
316/* flow control to advertise bits when using 1000BaseX */
317static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700318 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700319 [FC_TX] = PHY_M_P_ASYM_MD_X,
320 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700321 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700322};
323
324/* flow control to GMA disable bits */
325static const u16 gm_fc_disable[] = {
326 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
327 [FC_TX] = GM_GPCR_FC_RX_DIS,
328 [FC_RX] = GM_GPCR_FC_TX_DIS,
329 [FC_BOTH] = 0,
330};
331
332
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700333static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
334{
335 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700336 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700337
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700338 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700339 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700340 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
341
342 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700343 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700344 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
345
Stephen Hemminger53419c62007-05-14 12:38:11 -0700346 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700347 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700348 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700349 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
350 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700351 /* set master & slave downshift counter to 1x */
352 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700353
354 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
355 }
356
357 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700358 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700359 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700360 /* enable automatic crossover */
361 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700362
363 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
364 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
365 u16 spec;
366
367 /* Enable Class A driver for FE+ A0 */
368 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
369 spec |= PHY_M_FESC_SEL_CL_A;
370 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
371 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700372 } else {
373 /* disable energy detect */
374 ctrl &= ~PHY_M_PC_EN_DET_MSK;
375
376 /* enable automatic crossover */
377 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
378
Stephen Hemminger53419c62007-05-14 12:38:11 -0700379 /* downshift on PHY 88E1112 and 88E1149 is changed */
Joe Perches8e95a202009-12-03 07:58:21 +0000380 if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) &&
381 (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700382 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700383 ctrl &= ~PHY_M_PC_DSC_MSK;
384 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
385 }
386 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700387 } else {
388 /* workaround for deviation #4.88 (CRC errors) */
389 /* disable Automatic Crossover */
390
391 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700392 }
393
394 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
395
396 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700397 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700398 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
399
400 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
401 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
402 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
403 ctrl &= ~PHY_M_MAC_MD_MSK;
404 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700405 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
406
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700407 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700408 /* select page 1 to access Fiber registers */
409 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700410
411 /* for SFP-module set SIGDET polarity to low */
412 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
413 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700414 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700415 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700416
417 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700418 }
419
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700420 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700421 ct1000 = 0;
422 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700423 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700424
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700425 if (sky2->flags & SKY2_FLAG_AUTO_SPEED) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700426 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700427 if (sky2->advertising & ADVERTISED_1000baseT_Full)
428 ct1000 |= PHY_M_1000C_AFD;
429 if (sky2->advertising & ADVERTISED_1000baseT_Half)
430 ct1000 |= PHY_M_1000C_AHD;
431 if (sky2->advertising & ADVERTISED_100baseT_Full)
432 adv |= PHY_M_AN_100_FD;
433 if (sky2->advertising & ADVERTISED_100baseT_Half)
434 adv |= PHY_M_AN_100_HD;
435 if (sky2->advertising & ADVERTISED_10baseT_Full)
436 adv |= PHY_M_AN_10_FD;
437 if (sky2->advertising & ADVERTISED_10baseT_Half)
438 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700439
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700440 } else { /* special defines for FIBER (88E1040S only) */
441 if (sky2->advertising & ADVERTISED_1000baseT_Full)
442 adv |= PHY_M_AN_1000X_AFD;
443 if (sky2->advertising & ADVERTISED_1000baseT_Half)
444 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700445 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700446
447 /* Restart Auto-negotiation */
448 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
449 } else {
450 /* forced speed/duplex settings */
451 ct1000 = PHY_M_1000C_MSE;
452
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700453 /* Disable auto update for duplex flow control and duplex */
454 reg |= GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_SPD_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700455
456 switch (sky2->speed) {
457 case SPEED_1000:
458 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700459 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700460 break;
461 case SPEED_100:
462 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700463 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700464 break;
465 }
466
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700467 if (sky2->duplex == DUPLEX_FULL) {
468 reg |= GM_GPCR_DUP_FULL;
469 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700470 } else if (sky2->speed < SPEED_1000)
471 sky2->flow_mode = FC_NONE;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700472 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700473
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700474 if (sky2->flags & SKY2_FLAG_AUTO_PAUSE) {
475 if (sky2_is_copper(hw))
476 adv |= copper_fc_adv[sky2->flow_mode];
477 else
478 adv |= fiber_fc_adv[sky2->flow_mode];
479 } else {
480 reg |= GM_GPCR_AU_FCT_DIS;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700481 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700482
483 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700484 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700485 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
486 else
487 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700488 }
489
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700490 gma_write16(hw, port, GM_GP_CTRL, reg);
491
Stephen Hemminger05745c42007-09-19 15:36:45 -0700492 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700493 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
494
495 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
496 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
497
498 /* Setup Phy LED's */
499 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
500 ledover = 0;
501
502 switch (hw->chip_id) {
503 case CHIP_ID_YUKON_FE:
504 /* on 88E3082 these bits are at 11..9 (shifted left) */
505 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
506
507 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
508
509 /* delete ACT LED control bits */
510 ctrl &= ~PHY_M_FELP_LED1_MSK;
511 /* change ACT LED control to blink mode */
512 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
513 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
514 break;
515
Stephen Hemminger05745c42007-09-19 15:36:45 -0700516 case CHIP_ID_YUKON_FE_P:
517 /* Enable Link Partner Next Page */
518 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
519 ctrl |= PHY_M_PC_ENA_LIP_NP;
520
521 /* disable Energy Detect and enable scrambler */
522 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
523 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
524
525 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
526 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
527 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
528 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
529
530 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
531 break;
532
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700533 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700534 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700535
536 /* select page 3 to access LED control register */
537 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
538
539 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700540 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
541 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
542 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
543 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
544 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700545
546 /* set Polarity Control register */
547 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700548 (PHY_M_POLC_LS1_P_MIX(4) |
549 PHY_M_POLC_IS0_P_MIX(4) |
550 PHY_M_POLC_LOS_CTRL(2) |
551 PHY_M_POLC_INIT_CTRL(2) |
552 PHY_M_POLC_STA1_CTRL(2) |
553 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700554
555 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700556 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700557 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800558
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700559 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800560 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800561 case CHIP_ID_YUKON_SUPR:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700562 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
563
564 /* select page 3 to access LED control register */
565 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
566
567 /* set LED Function Control register */
568 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
569 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
570 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
571 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
572 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
573
574 /* set Blink Rate in LED Timer Control Register */
575 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
576 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
577 /* restore page register */
578 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
579 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700580
581 default:
582 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
583 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800584
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700585 /* turn off the Rx LED (LED_RX) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800586 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700587 }
588
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700589 if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_UL_2) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800590 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700591 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
592
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800593 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700594 gm_phy_write(hw, port, 0x18, 0xaa99);
595 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700596
Stephen Hemminger0ce8b982008-06-17 09:04:27 -0700597 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
598 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
599 gm_phy_write(hw, port, 0x18, 0xa204);
600 gm_phy_write(hw, port, 0x17, 0x2002);
601 }
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800602
603 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700604 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700605 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
606 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
607 /* apply workaround for integrated resistors calibration */
608 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
609 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +0000610 } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) {
611 /* apply fixes in PHY AFE */
612 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff);
613
614 /* apply RDAC termination workaround */
615 gm_phy_write(hw, port, 24, 0x2800);
616 gm_phy_write(hw, port, 23, 0x2001);
617
618 /* set page register back to 0 */
619 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingere1a74b32008-06-17 09:04:24 -0700620 } else if (hw->chip_id != CHIP_ID_YUKON_EX &&
621 hw->chip_id < CHIP_ID_YUKON_SUPR) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700622 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800623 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
624
Joe Perches8e95a202009-12-03 07:58:21 +0000625 if (!(sky2->flags & SKY2_FLAG_AUTO_SPEED) ||
626 sky2->speed == SPEED_100) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800627 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800628 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800629 }
630
631 if (ledover)
632 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
633
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700634 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700635
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700636 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700637 if (sky2->flags & SKY2_FLAG_AUTO_SPEED)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700638 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
639 else
640 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
641}
642
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700643static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
644static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
645
646static void sky2_phy_power_up(struct sky2_hw *hw, unsigned port)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700647{
648 u32 reg1;
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700649
stephen hemmingera40ccc62010-01-24 18:46:06 +0000650 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800651 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700652 reg1 &= ~phy_power[port];
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700653
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000654 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > CHIP_REV_YU_XL_A1)
Stephen Hemmingerff351642007-10-11 19:47:44 -0700655 reg1 |= coma_mode[port];
656
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800657 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000658 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger82637e82008-01-23 19:16:04 -0800659 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -0700660
661 if (hw->chip_id == CHIP_ID_YUKON_FE)
662 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_ANE);
663 else if (hw->flags & SKY2_HW_ADV_POWER_CTL)
664 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700665}
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700666
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700667static void sky2_phy_power_down(struct sky2_hw *hw, unsigned port)
668{
669 u32 reg1;
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700670 u16 ctrl;
671
672 /* release GPHY Control reset */
673 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
674
675 /* release GMAC reset */
676 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
677
678 if (hw->flags & SKY2_HW_NEWER_PHY) {
679 /* select page 2 to access MAC control register */
680 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
681
682 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
683 /* allow GMII Power Down */
684 ctrl &= ~PHY_M_MAC_GMIF_PUP;
685 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
686
687 /* set page register back to 0 */
688 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
689 }
690
691 /* setup General Purpose Control Register */
692 gma_write16(hw, port, GM_GP_CTRL,
Stephen Hemminger0ea065e2009-08-14 15:36:41 -0700693 GM_GPCR_FL_PASS | GM_GPCR_SPEED_100 |
694 GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS |
695 GM_GPCR_AU_SPD_DIS);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700696
697 if (hw->chip_id != CHIP_ID_YUKON_EC) {
698 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200699 /* select page 2 to access MAC control register */
700 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700701
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200702 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700703 /* enable Power Down */
704 ctrl |= PHY_M_PC_POW_D_ENA;
705 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Rafael J. Wysockie484d5f2008-08-10 19:30:28 +0200706
707 /* set page register back to 0 */
708 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700709 }
710
711 /* set IEEE compatible Power Down Mode (dev. #4.99) */
712 gm_phy_write(hw, port, PHY_MARV_CTRL, PHY_CT_PDOWN);
713 }
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700714
stephen hemmingera40ccc62010-01-24 18:46:06 +0000715 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700716 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerdb99b982008-05-14 17:04:16 -0700717 reg1 |= phy_power[port]; /* set PHY to PowerDown/COMA Mode */
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700718 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
stephen hemmingera40ccc62010-01-24 18:46:06 +0000719 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700720}
721
Stephen Hemminger1b537562005-12-20 15:08:07 -0800722/* Force a renegotiation */
723static void sky2_phy_reinit(struct sky2_port *sky2)
724{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800725 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800726 sky2_phy_init(sky2->hw, sky2->port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800727 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800728}
729
Stephen Hemmingere3173832007-02-06 10:45:39 -0800730/* Put device in state to listen for Wake On Lan */
731static void sky2_wol_init(struct sky2_port *sky2)
732{
733 struct sky2_hw *hw = sky2->hw;
734 unsigned port = sky2->port;
735 enum flow_control save_mode;
736 u16 ctrl;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800737
738 /* Bring hardware out of reset */
739 sky2_write16(hw, B0_CTST, CS_RST_CLR);
740 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
741
742 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
743 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
744
745 /* Force to 10/100
746 * sky2_reset will re-enable on resume
747 */
748 save_mode = sky2->flow_mode;
749 ctrl = sky2->advertising;
750
751 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
752 sky2->flow_mode = FC_NONE;
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700753
754 spin_lock_bh(&sky2->phy_lock);
755 sky2_phy_power_up(hw, port);
756 sky2_phy_init(hw, port);
757 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800758
759 sky2->flow_mode = save_mode;
760 sky2->advertising = ctrl;
761
762 /* Set GMAC to no flow control and auto update for speed/duplex */
763 gma_write16(hw, port, GM_GP_CTRL,
764 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
765 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
766
767 /* Set WOL address */
768 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
769 sky2->netdev->dev_addr, ETH_ALEN);
770
771 /* Turn on appropriate WOL control bits */
772 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
773 ctrl = 0;
774 if (sky2->wol & WAKE_PHY)
775 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
776 else
777 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
778
779 if (sky2->wol & WAKE_MAGIC)
780 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
781 else
Joe Perchesa419aef2009-08-18 11:18:35 -0700782 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;
Stephen Hemmingere3173832007-02-06 10:45:39 -0800783
784 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
785 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
786
stephen hemminger5f8ae5c2010-02-12 06:57:59 +0000787 /* Disable PiG firmware */
788 sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF);
789
Stephen Hemmingere3173832007-02-06 10:45:39 -0800790 /* block receiver */
791 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800792}
793
Stephen Hemminger69161612007-06-04 17:23:26 -0700794static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
795{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700796 struct net_device *dev = hw->dev[port];
797
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800798 if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
799 hw->chip_rev != CHIP_REV_YU_EX_A0) ||
Stephen Hemminger877c8572009-10-29 06:37:08 +0000800 hw->chip_id >= CHIP_ID_YUKON_FE_P) {
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800801 /* Yukon-Extreme B0 and further Extreme devices */
stephen hemminger44dde562010-02-12 06:58:01 +0000802 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
803 } else if (dev->mtu > ETH_DATA_LEN) {
804 /* set Tx GMAC FIFO Almost Empty Threshold */
805 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
806 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger69161612007-06-04 17:23:26 -0700807
stephen hemminger44dde562010-02-12 06:58:01 +0000808 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
809 } else
810 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700811}
812
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700813static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
814{
815 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
816 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100817 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700818 int i;
819 const u8 *addr = hw->dev[port]->dev_addr;
820
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700821 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
822 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700823
824 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
825
stephen hemminger4b7c47a2010-03-29 07:36:19 +0000826 if (hw->chip_id == CHIP_ID_YUKON_XL &&
827 hw->chip_rev == CHIP_REV_YU_XL_A0 &&
828 port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700829 /* WA DEV_472 -- looks like crossed wires on port 2 */
830 /* clear GMAC 1 Control reset */
831 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
832 do {
833 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
834 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
835 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
836 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
837 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
838 }
839
Stephen Hemminger793b8832005-09-14 16:06:14 -0700840 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700841
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700842 /* Enable Transmit FIFO Underrun */
843 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
844
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800845 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -0700846 sky2_phy_power_up(hw, port);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700847 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800848 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700849
850 /* MIB clear */
851 reg = gma_read16(hw, port, GM_PHY_ADDR);
852 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
853
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700854 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
855 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700856 gma_write16(hw, port, GM_PHY_ADDR, reg);
857
858 /* transmit control */
859 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
860
861 /* receive control reg: unicast + multicast + no FCS */
862 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700863 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700864
865 /* transmit flow control */
866 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
867
868 /* transmit parameter */
869 gma_write16(hw, port, GM_TX_PARAM,
870 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
871 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
872 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
873 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
874
875 /* serial mode register */
876 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700877 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700878
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700879 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700880 reg |= GM_SMOD_JUMBO_ENA;
881
stephen hemmingerc1cd0a82010-03-29 07:36:18 +0000882 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
883 hw->chip_rev == CHIP_REV_YU_EC_U_B1)
884 reg |= GM_NEW_FLOW_CTRL;
885
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700886 gma_write16(hw, port, GM_SERIAL_MODE, reg);
887
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700888 /* virtual address for data */
889 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
890
Stephen Hemminger793b8832005-09-14 16:06:14 -0700891 /* physical address: used for pause frames */
892 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
893
894 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700895 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
896 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
897 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
898
899 /* Configure Rx MAC FIFO */
900 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100901 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700902 if (hw->chip_id == CHIP_ID_YUKON_EX ||
903 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100904 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700905
Al Viro25cccec2007-07-20 16:07:33 +0100906 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700907
Stephen Hemminger798fdd02007-12-07 15:22:15 -0800908 if (hw->chip_id == CHIP_ID_YUKON_XL) {
909 /* Hardware errata - clear flush mask */
910 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
911 } else {
912 /* Flush Rx MAC FIFO on any flow control or error */
913 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
914 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700915
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800916 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700917 reg = RX_GMF_FL_THR_DEF + 1;
918 /* Another magic mystery workaround from sk98lin */
919 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
920 hw->chip_rev == CHIP_REV_YU_FE2_A0)
921 reg = 0x178;
922 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700923
924 /* Configure Tx MAC FIFO */
925 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
926 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800927
Stephen Hemmingere0c28112007-09-20 13:03:49 -0700928 /* On chips without ram buffer, pause is controled by MAC level */
Stephen Hemminger39dbd952008-02-04 19:45:13 -0800929 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +0000930 /* Pause threshold is scaled by 8 in bytes */
Joe Perches8e95a202009-12-03 07:58:21 +0000931 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
932 hw->chip_rev == CHIP_REV_YU_FE2_A0)
Stephen Hemmingerd6b54d22009-10-29 06:37:07 +0000933 reg = 1568 / 8;
934 else
935 reg = 1024 / 8;
936 sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg);
937 sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -0700938
Stephen Hemminger69161612007-06-04 17:23:26 -0700939 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800940 }
941
Stephen Hemmingere970d1f2007-11-27 11:02:07 -0800942 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
943 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
944 /* disable dynamic watermark */
945 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
946 reg &= ~TX_DYN_WM_ENA;
947 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
948 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700949}
950
Stephen Hemminger67712902006-12-04 15:53:45 -0800951/* Assign Ram Buffer allocation to queue */
952static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700953{
Stephen Hemminger67712902006-12-04 15:53:45 -0800954 u32 end;
955
956 /* convert from K bytes to qwords used for hw register */
957 start *= 1024/8;
958 space *= 1024/8;
959 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700960
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700961 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
962 sky2_write32(hw, RB_ADDR(q, RB_START), start);
963 sky2_write32(hw, RB_ADDR(q, RB_END), end);
964 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
965 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
966
967 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800968 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700969
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800970 /* On receive queue's set the thresholds
971 * give receiver priority when > 3/4 full
972 * send pause when down to 2K
973 */
974 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
975 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700976
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800977 tp = space - 2048/8;
978 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
979 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700980 } else {
981 /* Enable store & forward on Tx queue's because
982 * Tx FIFO is only 1K on Yukon
983 */
984 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
985 }
986
987 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700988 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700989}
990
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700991/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800992static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700993{
994 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
995 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
996 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800997 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700998}
999
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001000/* Setup prefetch unit registers. This is the interface between
1001 * hardware and driver list elements
1002 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001003static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001004 dma_addr_t addr, u32 last)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001005{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001006 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
1007 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001008 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), upper_32_bits(addr));
1009 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), lower_32_bits(addr));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001010 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
1011 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001012
1013 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001014}
1015
Mike McCormack9b289c32009-08-14 05:15:12 +00001016static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001017{
Mike McCormack9b289c32009-08-14 05:15:12 +00001018 struct sky2_tx_le *le = sky2->tx_le + *slot;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001019
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001020 *slot = RING_NEXT(*slot, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001021 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001022 return le;
1023}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001024
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001025static void tx_init(struct sky2_port *sky2)
1026{
1027 struct sky2_tx_le *le;
1028
1029 sky2->tx_prod = sky2->tx_cons = 0;
1030 sky2->tx_tcpsum = 0;
1031 sky2->tx_last_mss = 0;
1032
Mike McCormack9b289c32009-08-14 05:15:12 +00001033 le = get_tx_le(sky2, &sky2->tx_prod);
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001034 le->addr = 0;
1035 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001036 sky2->tx_last_upper = 0;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001037}
1038
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001039/* Update chip's next pointer */
1040static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001041{
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001042 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -08001043 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001044 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
1045
1046 /* Synchronize I/O on since next processor may write to tail */
1047 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001048}
1049
Stephen Hemminger793b8832005-09-14 16:06:14 -07001050
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001051static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
1052{
1053 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001054 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001055 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001056 return le;
1057}
1058
Mike McCormack39ef1102010-02-12 06:58:02 +00001059static unsigned sky2_get_rx_threshold(struct sky2_port* sky2)
1060{
1061 unsigned size;
1062
1063 /* Space needed for frame data + headers rounded up */
1064 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1065
1066 /* Stopping point for hardware truncation */
1067 return (size - 8) / sizeof(u32);
1068}
1069
1070static unsigned sky2_get_rx_data_size(struct sky2_port* sky2)
1071{
1072 struct rx_ring_info *re;
1073 unsigned size;
1074
1075 /* Space needed for frame data + headers rounded up */
1076 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
1077
1078 sky2->rx_nfrags = size >> PAGE_SHIFT;
1079 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1080
1081 /* Compute residue after pages */
1082 size -= sky2->rx_nfrags << PAGE_SHIFT;
1083
1084 /* Optimize to handle small packets and headers */
1085 if (size < copybreak)
1086 size = copybreak;
1087 if (size < ETH_HLEN)
1088 size = ETH_HLEN;
1089
1090 return size;
1091}
1092
Stephen Hemminger14d02632006-09-26 11:57:43 -07001093/* Build description to hardware for one receive segment */
1094static void sky2_rx_add(struct sky2_port *sky2, u8 op,
1095 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001096{
1097 struct sky2_rx_le *le;
1098
Stephen Hemminger86c68872008-01-10 16:14:12 -08001099 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001100 le = sky2_next_rx(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001101 le->addr = cpu_to_le32(upper_32_bits(map));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001102 le->opcode = OP_ADDR64 | HW_OWNER;
1103 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001104
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001105 le = sky2_next_rx(sky2);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001106 le->addr = cpu_to_le32(lower_32_bits(map));
Stephen Hemminger734d1862005-12-09 11:35:00 -08001107 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001108 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001109}
1110
Stephen Hemminger14d02632006-09-26 11:57:43 -07001111/* Build description to hardware for one possibly fragmented skb */
1112static void sky2_rx_submit(struct sky2_port *sky2,
1113 const struct rx_ring_info *re)
1114{
1115 int i;
1116
1117 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
1118
1119 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
1120 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
1121}
1122
1123
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001124static int sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001125 unsigned size)
1126{
1127 struct sk_buff *skb = re->skb;
1128 int i;
1129
1130 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001131 if (pci_dma_mapping_error(pdev, re->data_addr))
1132 goto mapping_error;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001133
Stephen Hemminger14d02632006-09-26 11:57:43 -07001134 pci_unmap_len_set(re, data_size, size);
1135
stephen hemminger3fbd9182010-02-01 13:45:41 +00001136 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1137 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1138
1139 re->frag_addr[i] = pci_map_page(pdev, frag->page,
1140 frag->page_offset,
1141 frag->size,
Stephen Hemminger14d02632006-09-26 11:57:43 -07001142 PCI_DMA_FROMDEVICE);
stephen hemminger3fbd9182010-02-01 13:45:41 +00001143
1144 if (pci_dma_mapping_error(pdev, re->frag_addr[i]))
1145 goto map_page_error;
1146 }
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001147 return 0;
stephen hemminger3fbd9182010-02-01 13:45:41 +00001148
1149map_page_error:
1150 while (--i >= 0) {
1151 pci_unmap_page(pdev, re->frag_addr[i],
1152 skb_shinfo(skb)->frags[i].size,
1153 PCI_DMA_FROMDEVICE);
1154 }
1155
1156 pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size),
1157 PCI_DMA_FROMDEVICE);
1158
1159mapping_error:
1160 if (net_ratelimit())
1161 dev_warn(&pdev->dev, "%s: rx mapping error\n",
1162 skb->dev->name);
1163 return -EIO;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001164}
1165
1166static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1167{
1168 struct sk_buff *skb = re->skb;
1169 int i;
1170
1171 pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size),
1172 PCI_DMA_FROMDEVICE);
1173
1174 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1175 pci_unmap_page(pdev, re->frag_addr[i],
1176 skb_shinfo(skb)->frags[i].size,
1177 PCI_DMA_FROMDEVICE);
1178}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001179
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001180/* Tell chip where to start receive checksum.
1181 * Actually has two checksums, but set both same to avoid possible byte
1182 * order problems.
1183 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001184static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001185{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001186 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001187
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001188 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1189 le->ctrl = 0;
1190 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001191
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001192 sky2_write32(sky2->hw,
1193 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07001194 (sky2->flags & SKY2_FLAG_RX_CHECKSUM)
1195 ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001196}
1197
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001198/*
1199 * The RX Stop command will not work for Yukon-2 if the BMU does not
1200 * reach the end of packet and since we can't make sure that we have
1201 * incoming data, we must reset the BMU while it is not doing a DMA
1202 * transfer. Since it is possible that the RX path is still active,
1203 * the RX RAM buffer will be stopped first, so any possible incoming
1204 * data will not trigger a DMA. After the RAM buffer is stopped, the
1205 * BMU is polled until any DMA in progress is ended and only then it
1206 * will be reset.
1207 */
1208static void sky2_rx_stop(struct sky2_port *sky2)
1209{
1210 struct sky2_hw *hw = sky2->hw;
1211 unsigned rxq = rxqaddr[sky2->port];
1212 int i;
1213
1214 /* disable the RAM Buffer receive queue */
1215 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1216
1217 for (i = 0; i < 0xffff; i++)
1218 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1219 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1220 goto stopped;
1221
Joe Perchesada1db52010-02-17 15:01:59 +00001222 netdev_warn(sky2->netdev, "receiver stop failed\n");
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001223stopped:
1224 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1225
1226 /* reset the Rx prefetch unit */
1227 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger3d1454dd2009-07-16 13:20:57 +00001228 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001229}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001230
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001231/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001232static void sky2_rx_clean(struct sky2_port *sky2)
1233{
1234 unsigned i;
1235
1236 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001237 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001238 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001239
1240 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001241 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001242 kfree_skb(re->skb);
1243 re->skb = NULL;
1244 }
1245 }
1246}
1247
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001248/* Basic MII support */
1249static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1250{
1251 struct mii_ioctl_data *data = if_mii(ifr);
1252 struct sky2_port *sky2 = netdev_priv(dev);
1253 struct sky2_hw *hw = sky2->hw;
1254 int err = -EOPNOTSUPP;
1255
1256 if (!netif_running(dev))
1257 return -ENODEV; /* Phy still in reset */
1258
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001259 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001260 case SIOCGMIIPHY:
1261 data->phy_id = PHY_ADDR_MARV;
1262
1263 /* fallthru */
1264 case SIOCGMIIREG: {
1265 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001266
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001267 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001268 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001269 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001270
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001271 data->val_out = val;
1272 break;
1273 }
1274
1275 case SIOCSMIIREG:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001276 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001277 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1278 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001279 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001280 break;
1281 }
1282 return err;
1283}
1284
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001285#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001286static void sky2_set_vlan_mode(struct sky2_hw *hw, u16 port, bool onoff)
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001287{
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001288 if (onoff) {
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001289 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1290 RX_VLAN_STRIP_ON);
1291 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1292 TX_VLAN_TAG_ON);
1293 } else {
1294 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1295 RX_VLAN_STRIP_OFF);
1296 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1297 TX_VLAN_TAG_OFF);
1298 }
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001299}
1300
1301static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
1302{
1303 struct sky2_port *sky2 = netdev_priv(dev);
1304 struct sky2_hw *hw = sky2->hw;
1305 u16 port = sky2->port;
1306
1307 netif_tx_lock_bh(dev);
1308 napi_disable(&hw->napi);
1309
1310 sky2->vlgrp = grp;
1311 sky2_set_vlan_mode(hw, port, grp != NULL);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001312
David S. Millerd1d08d12008-01-07 20:53:33 -08001313 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001314 napi_enable(&hw->napi);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001315 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001316}
1317#endif
1318
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001319/* Amount of required worst case padding in rx buffer */
1320static inline unsigned sky2_rx_pad(const struct sky2_hw *hw)
1321{
1322 return (hw->flags & SKY2_HW_RAM_BUFFER) ? 8 : 2;
1323}
1324
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001325/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001326 * Allocate an skb for receiving. If the MTU is large enough
1327 * make the skb non-linear with a fragment list of pages.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001328 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001329static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001330{
1331 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001332 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001333
Stephen Hemminger724b6942009-08-18 15:17:10 +00001334 skb = netdev_alloc_skb(sky2->netdev,
1335 sky2->rx_data_size + sky2_rx_pad(sky2->hw));
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001336 if (!skb)
1337 goto nomem;
1338
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001339 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001340 unsigned char *start;
1341 /*
1342 * Workaround for a bug in FIFO that cause hang
1343 * if the FIFO if the receive buffer is not 64 byte aligned.
1344 * The buffer returned from netdev_alloc_skb is
1345 * aligned except if slab debugging is enabled.
1346 */
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001347 start = PTR_ALIGN(skb->data, 8);
1348 skb_reserve(skb, start - skb->data);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001349 } else
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001350 skb_reserve(skb, NET_IP_ALIGN);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001351
1352 for (i = 0; i < sky2->rx_nfrags; i++) {
1353 struct page *page = alloc_page(GFP_ATOMIC);
1354
1355 if (!page)
1356 goto free_partial;
1357 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001358 }
1359
1360 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001361free_partial:
1362 kfree_skb(skb);
1363nomem:
1364 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001365}
1366
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001367static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1368{
1369 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1370}
1371
Mike McCormack200ac492010-02-12 06:58:03 +00001372static int sky2_alloc_rx_skbs(struct sky2_port *sky2)
1373{
1374 struct sky2_hw *hw = sky2->hw;
1375 unsigned i;
1376
1377 sky2->rx_data_size = sky2_get_rx_data_size(sky2);
1378
1379 /* Fill Rx ring */
1380 for (i = 0; i < sky2->rx_pending; i++) {
1381 struct rx_ring_info *re = sky2->rx_ring + i;
1382
1383 re->skb = sky2_rx_alloc(sky2);
1384 if (!re->skb)
1385 return -ENOMEM;
1386
1387 if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) {
1388 dev_kfree_skb(re->skb);
1389 re->skb = NULL;
1390 return -ENOMEM;
1391 }
1392 }
1393 return 0;
1394}
1395
Stephen Hemminger82788c72006-01-17 13:43:10 -08001396/*
Mike McCormack200ac492010-02-12 06:58:03 +00001397 * Setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001398 * Normal case this ends up creating one list element for skb
1399 * in the receive ring. Worst case if using large MTU and each
1400 * allocation falls on a different 64 bit region, that results
1401 * in 6 list elements per ring entry.
1402 * One element is used for checksum enable/disable, and one
1403 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001404 */
Mike McCormack200ac492010-02-12 06:58:03 +00001405static void sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001406{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001407 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001408 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001409 unsigned rxq = rxqaddr[sky2->port];
Mike McCormack39ef1102010-02-12 06:58:02 +00001410 unsigned i, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001411
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001412 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001413 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001414
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001415 /* On PCI express lowering the watermark gives better performance */
1416 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1417 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1418
1419 /* These chips have no ram buffer?
1420 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001421 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
stephen hemmingerc1cd0a82010-03-29 07:36:18 +00001422 hw->chip_rev > CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001423 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001424
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001425 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1426
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001427 if (!(hw->flags & SKY2_HW_NEW_LE))
1428 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001429
Mike McCormack200ac492010-02-12 06:58:03 +00001430 /* submit Rx ring */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001431 for (i = 0; i < sky2->rx_pending; i++) {
1432 re = sky2->rx_ring + i;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001433 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001434 }
1435
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001436 /*
1437 * The receiver hangs if it receives frames larger than the
1438 * packet buffer. As a workaround, truncate oversize frames, but
1439 * the register is limited to 9 bits, so if you do frames > 2052
1440 * you better get the MTU right!
1441 */
Mike McCormack39ef1102010-02-12 06:58:02 +00001442 thresh = sky2_get_rx_threshold(sky2);
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001443 if (thresh > 0x1ff)
1444 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1445 else {
1446 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1447 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1448 }
1449
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001450 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001451 sky2_rx_update(sky2, rxq);
Stephen Hemminger877c8572009-10-29 06:37:08 +00001452
1453 if (hw->chip_id == CHIP_ID_YUKON_EX ||
1454 hw->chip_id == CHIP_ID_YUKON_SUPR) {
1455 /*
1456 * Disable flushing of non ASF packets;
1457 * must be done after initializing the BMUs;
1458 * drivers without ASF support should do this too, otherwise
1459 * it may happen that they cannot run on ASF devices;
1460 * remember that the MAC FIFO isn't reset during initialization.
1461 */
1462 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF);
1463 }
1464
1465 if (hw->chip_id >= CHIP_ID_YUKON_SUPR) {
1466 /* Enable RX Home Address & Routing Header checksum fix */
1467 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL),
1468 RX_IPV6_SA_MOB_ENA | RX_IPV6_DA_MOB_ENA);
1469
1470 /* Enable TX Home Address & Routing Header checksum fix */
1471 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST),
1472 TBMU_TEST_HOME_ADD_FIX_EN | TBMU_TEST_ROUTING_ADD_FIX_EN);
1473 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001474}
1475
Mike McCormack90bbebb2009-09-01 03:21:35 +00001476static int sky2_alloc_buffers(struct sky2_port *sky2)
1477{
1478 struct sky2_hw *hw = sky2->hw;
1479
1480 /* must be power of 2 */
1481 sky2->tx_le = pci_alloc_consistent(hw->pdev,
1482 sky2->tx_ring_size *
1483 sizeof(struct sky2_tx_le),
1484 &sky2->tx_le_map);
1485 if (!sky2->tx_le)
1486 goto nomem;
1487
1488 sky2->tx_ring = kcalloc(sky2->tx_ring_size, sizeof(struct tx_ring_info),
1489 GFP_KERNEL);
1490 if (!sky2->tx_ring)
1491 goto nomem;
1492
1493 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1494 &sky2->rx_le_map);
1495 if (!sky2->rx_le)
1496 goto nomem;
1497 memset(sky2->rx_le, 0, RX_LE_BYTES);
1498
1499 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
1500 GFP_KERNEL);
1501 if (!sky2->rx_ring)
1502 goto nomem;
1503
Mike McCormack200ac492010-02-12 06:58:03 +00001504 return sky2_alloc_rx_skbs(sky2);
Mike McCormack90bbebb2009-09-01 03:21:35 +00001505nomem:
1506 return -ENOMEM;
1507}
1508
1509static void sky2_free_buffers(struct sky2_port *sky2)
1510{
1511 struct sky2_hw *hw = sky2->hw;
1512
Mike McCormack200ac492010-02-12 06:58:03 +00001513 sky2_rx_clean(sky2);
1514
Mike McCormack90bbebb2009-09-01 03:21:35 +00001515 if (sky2->rx_le) {
1516 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1517 sky2->rx_le, sky2->rx_le_map);
1518 sky2->rx_le = NULL;
1519 }
1520 if (sky2->tx_le) {
1521 pci_free_consistent(hw->pdev,
1522 sky2->tx_ring_size * sizeof(struct sky2_tx_le),
1523 sky2->tx_le, sky2->tx_le_map);
1524 sky2->tx_le = NULL;
1525 }
1526 kfree(sky2->tx_ring);
1527 kfree(sky2->rx_ring);
1528
1529 sky2->tx_ring = NULL;
1530 sky2->rx_ring = NULL;
1531}
1532
Mike McCormackea0f71e2010-02-12 06:58:04 +00001533static void sky2_hw_up(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001534{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001535 struct sky2_hw *hw = sky2->hw;
1536 unsigned port = sky2->port;
Mike McCormackea0f71e2010-02-12 06:58:04 +00001537 u32 ramsize;
1538 int cap;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001539 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001540
Mike McCormackea0f71e2010-02-12 06:58:04 +00001541 tx_init(sky2);
1542
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001543 /*
1544 * On dual port PCI-X card, there is an problem where status
1545 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001546 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001547 if (otherdev && netif_running(otherdev) &&
1548 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001549 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001550
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001551 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001552 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001553 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001554 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001555
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001556 sky2_mac_init(hw, port);
1557
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001558 /* Register is number of 4K blocks on internal RAM buffer. */
1559 ramsize = sky2_read8(hw, B2_E_0) * 4;
1560 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001561 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001562
Joe Perchesada1db52010-02-17 15:01:59 +00001563 netdev_dbg(sky2->netdev, "ram buffer %dK\n", ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001564 if (ramsize < 16)
1565 rxspace = ramsize / 2;
1566 else
1567 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001568
Stephen Hemminger67712902006-12-04 15:53:45 -08001569 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1570 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1571
1572 /* Make sure SyncQ is disabled */
1573 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1574 RB_RST_SET);
1575 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001576
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001577 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001578
Stephen Hemminger69161612007-06-04 17:23:26 -07001579 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1580 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1581 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1582
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001583 /* Set almost empty threshold */
Joe Perches8e95a202009-12-03 07:58:21 +00001584 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
1585 hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001586 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001587
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001588 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001589 sky2->tx_ring_size - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001590
Stephen Hemmingerd494eac2008-05-14 17:04:13 -07001591#ifdef SKY2_VLAN_TAG_USED
1592 sky2_set_vlan_mode(hw, port, sky2->vlgrp != NULL);
1593#endif
1594
Mike McCormack200ac492010-02-12 06:58:03 +00001595 sky2_rx_start(sky2);
Mike McCormackea0f71e2010-02-12 06:58:04 +00001596}
1597
1598/* Bring up network interface. */
1599static int sky2_up(struct net_device *dev)
1600{
1601 struct sky2_port *sky2 = netdev_priv(dev);
1602 struct sky2_hw *hw = sky2->hw;
1603 unsigned port = sky2->port;
1604 u32 imask;
1605 int err;
1606
1607 netif_carrier_off(dev);
1608
1609 err = sky2_alloc_buffers(sky2);
1610 if (err)
1611 goto err_out;
1612
1613 sky2_hw_up(sky2);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001614
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001615 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001616 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001617 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001618 sky2_write32(hw, B0_IMSK, imask);
Stephen Hemminger1fd82f32009-06-17 07:30:34 +00001619 sky2_read32(hw, B0_IMSK);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001620
Joe Perches6c35aba2010-02-15 08:34:21 +00001621 netif_info(sky2, ifup, dev, "enabling interface\n");
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07001622
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001623 return 0;
1624
1625err_out:
Mike McCormack90bbebb2009-09-01 03:21:35 +00001626 sky2_free_buffers(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001627 return err;
1628}
1629
Stephen Hemminger793b8832005-09-14 16:06:14 -07001630/* Modular subtraction in ring */
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001631static inline int tx_inuse(const struct sky2_port *sky2)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001632{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001633 return (sky2->tx_prod - sky2->tx_cons) & (sky2->tx_ring_size - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001634}
1635
1636/* Number of list elements available for next tx */
1637static inline int tx_avail(const struct sky2_port *sky2)
1638{
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001639 return sky2->tx_pending - tx_inuse(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001640}
1641
1642/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001643static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001644{
1645 unsigned count;
1646
Stephen Hemminger07e31632009-09-14 06:12:55 +00001647 count = (skb_shinfo(skb)->nr_frags + 1)
1648 * (sizeof(dma_addr_t) / sizeof(u32));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001649
Herbert Xu89114af2006-07-08 13:34:32 -07001650 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001651 ++count;
Stephen Hemminger07e31632009-09-14 06:12:55 +00001652 else if (sizeof(dma_addr_t) == sizeof(u32))
1653 ++count; /* possible vlan */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001654
Patrick McHardy84fa7932006-08-29 16:44:56 -07001655 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001656 ++count;
1657
1658 return count;
1659}
1660
stephen hemmingerf6815072010-02-01 13:41:47 +00001661static void sky2_tx_unmap(struct pci_dev *pdev, struct tx_ring_info *re)
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001662{
1663 if (re->flags & TX_MAP_SINGLE)
1664 pci_unmap_single(pdev, pci_unmap_addr(re, mapaddr),
1665 pci_unmap_len(re, maplen),
1666 PCI_DMA_TODEVICE);
1667 else if (re->flags & TX_MAP_PAGE)
1668 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
1669 pci_unmap_len(re, maplen),
1670 PCI_DMA_TODEVICE);
stephen hemmingerf6815072010-02-01 13:41:47 +00001671 re->flags = 0;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001672}
1673
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001674/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001675 * Put one packet in ring for transmit.
1676 * A single packet can generate multiple list elements, and
1677 * the number of ring elements will probably be less than the number
1678 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001679 */
Stephen Hemminger613573252009-08-31 19:50:58 +00001680static netdev_tx_t sky2_xmit_frame(struct sk_buff *skb,
1681 struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001682{
1683 struct sky2_port *sky2 = netdev_priv(dev);
1684 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001685 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001686 struct tx_ring_info *re;
Mike McCormack9b289c32009-08-14 05:15:12 +00001687 unsigned i, len;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001688 dma_addr_t mapping;
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001689 u32 upper;
1690 u16 slot;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001691 u16 mss;
1692 u8 ctrl;
1693
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001694 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1695 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001696
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001697 len = skb_headlen(skb);
1698 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001699
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001700 if (pci_dma_mapping_error(hw->pdev, mapping))
1701 goto mapping_error;
1702
Mike McCormack9b289c32009-08-14 05:15:12 +00001703 slot = sky2->tx_prod;
Joe Perches6c35aba2010-02-15 08:34:21 +00001704 netif_printk(sky2, tx_queued, KERN_DEBUG, dev,
1705 "tx queued, slot %u, len %d\n", slot, skb->len);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001706
Stephen Hemminger86c68872008-01-10 16:14:12 -08001707 /* Send high bits if needed */
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001708 upper = upper_32_bits(mapping);
1709 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001710 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001711 le->addr = cpu_to_le32(upper);
1712 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001713 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001714 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001715
1716 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001717 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001718 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001719
1720 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001721 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001722
Stephen Hemminger69161612007-06-04 17:23:26 -07001723 if (mss != sky2->tx_last_mss) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001724 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001725 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001726
1727 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001728 le->opcode = OP_MSS | HW_OWNER;
1729 else
1730 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001731 sky2->tx_last_mss = mss;
1732 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001733 }
1734
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001735 ctrl = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001736#ifdef SKY2_VLAN_TAG_USED
1737 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
1738 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
1739 if (!le) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001740 le = get_tx_le(sky2, &slot);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001741 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001742 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001743 } else
1744 le->opcode |= OP_VLAN;
1745 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1746 ctrl |= INS_VLAN;
1747 }
1748#endif
1749
1750 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001751 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001752 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001753 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001754 ctrl |= CALSUM; /* auto checksum */
1755 else {
1756 const unsigned offset = skb_transport_offset(skb);
1757 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001758
Stephen Hemminger69161612007-06-04 17:23:26 -07001759 tcpsum = offset << 16; /* sum start */
1760 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001761
Stephen Hemminger69161612007-06-04 17:23:26 -07001762 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1763 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1764 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001765
Stephen Hemminger69161612007-06-04 17:23:26 -07001766 if (tcpsum != sky2->tx_tcpsum) {
1767 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001768
Mike McCormack9b289c32009-08-14 05:15:12 +00001769 le = get_tx_le(sky2, &slot);
Stephen Hemminger69161612007-06-04 17:23:26 -07001770 le->addr = cpu_to_le32(tcpsum);
1771 le->length = 0; /* initial checksum value */
1772 le->ctrl = 1; /* one packet */
1773 le->opcode = OP_TCPLISW | HW_OWNER;
1774 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001775 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001776 }
1777
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001778 re = sky2->tx_ring + slot;
1779 re->flags = TX_MAP_SINGLE;
1780 pci_unmap_addr_set(re, mapaddr, mapping);
1781 pci_unmap_len_set(re, maplen, len);
1782
Mike McCormack9b289c32009-08-14 05:15:12 +00001783 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001784 le->addr = cpu_to_le32(lower_32_bits(mapping));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001785 le->length = cpu_to_le16(len);
1786 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001787 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001788
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001789
1790 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001791 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001792
1793 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1794 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001795
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001796 if (pci_dma_mapping_error(hw->pdev, mapping))
1797 goto mapping_unwind;
1798
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001799 upper = upper_32_bits(mapping);
1800 if (upper != sky2->tx_last_upper) {
Mike McCormack9b289c32009-08-14 05:15:12 +00001801 le = get_tx_le(sky2, &slot);
Stephen Hemminger5dce95e2009-08-18 15:17:06 +00001802 le->addr = cpu_to_le32(upper);
1803 sky2->tx_last_upper = upper;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001804 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001805 }
1806
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001807 re = sky2->tx_ring + slot;
1808 re->flags = TX_MAP_PAGE;
1809 pci_unmap_addr_set(re, mapaddr, mapping);
1810 pci_unmap_len_set(re, maplen, frag->size);
1811
Mike McCormack9b289c32009-08-14 05:15:12 +00001812 le = get_tx_le(sky2, &slot);
Stephen Hemmingerd6e74b62009-08-18 15:17:05 +00001813 le->addr = cpu_to_le32(lower_32_bits(mapping));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001814 le->length = cpu_to_le16(frag->size);
1815 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001816 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001817 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001818
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001819 re->skb = skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001820 le->ctrl |= EOP;
1821
Mike McCormack9b289c32009-08-14 05:15:12 +00001822 sky2->tx_prod = slot;
1823
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001824 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1825 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001826
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001827 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001828
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001829 return NETDEV_TX_OK;
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001830
1831mapping_unwind:
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001832 for (i = sky2->tx_prod; i != slot; i = RING_NEXT(i, sky2->tx_ring_size)) {
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001833 re = sky2->tx_ring + i;
1834
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001835 sky2_tx_unmap(hw->pdev, re);
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001836 }
1837
Stephen Hemminger454e6cb62009-02-03 11:27:28 +00001838mapping_error:
1839 if (net_ratelimit())
1840 dev_warn(&hw->pdev->dev, "%s: tx mapping error\n", dev->name);
1841 dev_kfree_skb(skb);
1842 return NETDEV_TX_OK;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001843}
1844
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001845/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001846 * Free ring elements from starting at tx_cons until "done"
1847 *
Stephen Hemminger481cea42009-08-14 15:33:19 -07001848 * NB:
1849 * 1. The hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001850 * buffers so make sure not to free skb to early.
Stephen Hemminger481cea42009-08-14 15:33:19 -07001851 * 2. This may run in parallel start_xmit because the it only
1852 * looks at the tail of the queue of FIFO (tx_cons), not
1853 * the head (tx_prod)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001854 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001855static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001856{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001857 struct net_device *dev = sky2->netdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001858 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001859
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001860 BUG_ON(done >= sky2->tx_ring_size);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001861
Stephen Hemminger291ea612006-09-26 11:57:41 -07001862 for (idx = sky2->tx_cons; idx != done;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001863 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001864 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001865 struct sk_buff *skb = re->skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001866
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001867 sky2_tx_unmap(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001868
Stephen Hemminger6b84dac2009-08-18 15:17:09 +00001869 if (skb) {
Joe Perches6c35aba2010-02-15 08:34:21 +00001870 netif_printk(sky2, tx_done, KERN_DEBUG, dev,
1871 "tx done %u\n", idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001872
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07001873 dev->stats.tx_packets++;
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001874 dev->stats.tx_bytes += skb->len;
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001875
stephen hemmingerf6815072010-02-01 13:41:47 +00001876 re->skb = NULL;
Stephen Hemminger724b6942009-08-18 15:17:10 +00001877 dev_kfree_skb_any(skb);
Stephen Hemmingerbd1c6862009-06-17 07:30:38 +00001878
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00001879 sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001880 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001881 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001882
Stephen Hemminger291ea612006-09-26 11:57:41 -07001883 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001884 smp_mb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001885}
1886
Mike McCormack264bb4f2009-08-14 05:15:14 +00001887static void sky2_tx_reset(struct sky2_hw *hw, unsigned port)
Mike McCormacka5109962009-08-14 05:15:13 +00001888{
Mike McCormacka5109962009-08-14 05:15:13 +00001889 /* Disable Force Sync bit and Enable Alloc bit */
1890 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1891 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1892
1893 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1894 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1895 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1896
1897 /* Reset the PCI FIFO of the async Tx queue */
1898 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1899 BMU_RST_SET | BMU_FIFO_RST);
1900
1901 /* Reset the Tx prefetch units */
1902 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1903 PREF_UNIT_RST_SET);
1904
1905 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1906 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1907}
1908
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001909static void sky2_hw_down(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001910{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001911 struct sky2_hw *hw = sky2->hw;
1912 unsigned port = sky2->port;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001913 u16 ctrl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001914
Stephen Hemmingerd104aca2009-06-17 07:30:32 +00001915 /* Force flow control off */
1916 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001917
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001918 /* Stop transmitter */
1919 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1920 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1921
1922 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001923 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001924
1925 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001926 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001927 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1928
1929 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1930
1931 /* Workaround shared GMAC reset */
Joe Perches8e95a202009-12-03 07:58:21 +00001932 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 &&
1933 port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001934 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1935
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001936 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001937
Stephen Hemminger6c835042009-06-17 07:30:35 +00001938 /* Force any delayed status interrrupt and NAPI */
1939 sky2_write32(hw, STAT_LEV_TIMER_CNT, 0);
1940 sky2_write32(hw, STAT_TX_TIMER_CNT, 0);
1941 sky2_write32(hw, STAT_ISR_TIMER_CNT, 0);
1942 sky2_read8(hw, STAT_ISR_TIMER_CTRL);
1943
Mike McCormacka947a392009-07-21 20:57:56 -07001944 sky2_rx_stop(sky2);
1945
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00001946 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingerb96936d2008-05-14 17:04:15 -07001947 sky2_phy_power_down(hw, port);
Stephen Hemminger0da6d7b2009-08-14 05:15:15 +00001948 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001949
Mike McCormack264bb4f2009-08-14 05:15:14 +00001950 sky2_tx_reset(hw, port);
1951
Stephen Hemminger481cea42009-08-14 15:33:19 -07001952 /* Free any pending frames stuck in HW queue */
1953 sky2_tx_complete(sky2, sky2->tx_prod);
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001954}
1955
1956/* Network shutdown */
1957static int sky2_down(struct net_device *dev)
1958{
1959 struct sky2_port *sky2 = netdev_priv(dev);
Mike McCormack8a0c9222010-02-12 06:58:06 +00001960 struct sky2_hw *hw = sky2->hw;
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001961
1962 /* Never really got started! */
1963 if (!sky2->tx_le)
1964 return 0;
1965
Joe Perches6c35aba2010-02-15 08:34:21 +00001966 netif_info(sky2, ifdown, dev, "disabling interface\n");
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001967
Mike McCormack8a0c9222010-02-12 06:58:06 +00001968 /* Disable port IRQ */
1969 sky2_write32(hw, B0_IMSK,
1970 sky2_read32(hw, B0_IMSK) & ~portirq_msk[sky2->port]);
1971 sky2_read32(hw, B0_IMSK);
1972
1973 synchronize_irq(hw->pdev->irq);
1974 napi_synchronize(&hw->napi);
1975
Mike McCormackf2b31cb2010-02-12 06:58:05 +00001976 sky2_hw_down(sky2);
Stephen Hemminger481cea42009-08-14 15:33:19 -07001977
Mike McCormack90bbebb2009-09-01 03:21:35 +00001978 sky2_free_buffers(sky2);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001979
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001980 return 0;
1981}
1982
1983static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
1984{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001985 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001986 return SPEED_1000;
1987
Stephen Hemminger05745c42007-09-19 15:36:45 -07001988 if (!(hw->flags & SKY2_HW_GIGABIT)) {
1989 if (aux & PHY_M_PS_SPEED_100)
1990 return SPEED_100;
1991 else
1992 return SPEED_10;
1993 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001994
1995 switch (aux & PHY_M_PS_SPEED_MSK) {
1996 case PHY_M_PS_SPEED_1000:
1997 return SPEED_1000;
1998 case PHY_M_PS_SPEED_100:
1999 return SPEED_100;
2000 default:
2001 return SPEED_10;
2002 }
2003}
2004
2005static void sky2_link_up(struct sky2_port *sky2)
2006{
2007 struct sky2_hw *hw = sky2->hw;
2008 unsigned port = sky2->port;
2009 u16 reg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002010 static const char *fc_name[] = {
2011 [FC_NONE] = "none",
2012 [FC_TX] = "tx",
2013 [FC_RX] = "rx",
2014 [FC_BOTH] = "both",
2015 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002016
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002017 /* enable Rx/Tx */
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002018 reg = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002019 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
2020 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002021
2022 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
2023
2024 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002025
Stephen Hemminger75e80682007-09-19 15:36:46 -07002026 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002027
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002028 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002029 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002030 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
2031
Joe Perches6c35aba2010-02-15 08:34:21 +00002032 netif_info(sky2, link, sky2->netdev,
2033 "Link is up at %d Mbps, %s duplex, flow control %s\n",
2034 sky2->speed,
2035 sky2->duplex == DUPLEX_FULL ? "full" : "half",
2036 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002037}
2038
2039static void sky2_link_down(struct sky2_port *sky2)
2040{
2041 struct sky2_hw *hw = sky2->hw;
2042 unsigned port = sky2->port;
2043 u16 reg;
2044
2045 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
2046
2047 reg = gma_read16(hw, port, GM_GP_CTRL);
2048 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
2049 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002050
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002051 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002052
Brandon Philips809aaaa2009-10-29 17:01:49 -07002053 /* Turn off link LED */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002054 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
2055
Joe Perches6c35aba2010-02-15 08:34:21 +00002056 netif_info(sky2, link, sky2->netdev, "Link is down\n");
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002057
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002058 sky2_phy_init(hw, port);
2059}
2060
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002061static enum flow_control sky2_flow(int rx, int tx)
2062{
2063 if (rx)
2064 return tx ? FC_BOTH : FC_RX;
2065 else
2066 return tx ? FC_TX : FC_NONE;
2067}
2068
Stephen Hemminger793b8832005-09-14 16:06:14 -07002069static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
2070{
2071 struct sky2_hw *hw = sky2->hw;
2072 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002073 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002074
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002075 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002076 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002077 if (lpa & PHY_M_AN_RF) {
Joe Perchesada1db52010-02-17 15:01:59 +00002078 netdev_err(sky2->netdev, "remote fault\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002079 return -1;
2080 }
2081
Stephen Hemminger793b8832005-09-14 16:06:14 -07002082 if (!(aux & PHY_M_PS_SPDUP_RES)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002083 netdev_err(sky2->netdev, "speed/duplex mismatch\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07002084 return -1;
2085 }
2086
Stephen Hemminger793b8832005-09-14 16:06:14 -07002087 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07002088 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002089
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002090 /* Since the pause result bits seem to in different positions on
2091 * different chips. look at registers.
2092 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002093 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002094 /* Shift for bits in fiber PHY */
2095 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
2096 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002097
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002098 if (advert & ADVERTISE_1000XPAUSE)
2099 advert |= ADVERTISE_PAUSE_CAP;
2100 if (advert & ADVERTISE_1000XPSE_ASYM)
2101 advert |= ADVERTISE_PAUSE_ASYM;
2102 if (lpa & LPA_1000XPAUSE)
2103 lpa |= LPA_PAUSE_CAP;
2104 if (lpa & LPA_1000XPAUSE_ASYM)
2105 lpa |= LPA_PAUSE_ASYM;
2106 }
2107
2108 sky2->flow_status = FC_NONE;
2109 if (advert & ADVERTISE_PAUSE_CAP) {
2110 if (lpa & LPA_PAUSE_CAP)
2111 sky2->flow_status = FC_BOTH;
2112 else if (advert & ADVERTISE_PAUSE_ASYM)
2113 sky2->flow_status = FC_RX;
2114 } else if (advert & ADVERTISE_PAUSE_ASYM) {
2115 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
2116 sky2->flow_status = FC_TX;
2117 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07002118
Joe Perches8e95a202009-12-03 07:58:21 +00002119 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 &&
2120 !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002121 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07002122
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08002123 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07002124 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
2125 else
2126 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
2127
2128 return 0;
2129}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002130
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002131/* Interrupt from PHY */
2132static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002133{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002134 struct net_device *dev = hw->dev[port];
2135 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002136 u16 istatus, phystat;
2137
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07002138 if (!netif_running(dev))
2139 return;
2140
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002141 spin_lock(&sky2->phy_lock);
2142 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
2143 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
2144
Joe Perches6c35aba2010-02-15 08:34:21 +00002145 netif_info(sky2, intr, sky2->netdev, "phy interrupt status 0x%x 0x%x\n",
2146 istatus, phystat);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002147
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07002148 if (istatus & PHY_M_IS_AN_COMPL) {
stephen hemminger9badba22010-03-29 07:36:20 +00002149 if (sky2_autoneg_done(sky2, phystat) == 0 &&
2150 !netif_carrier_ok(dev))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002151 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002152 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002153 }
2154
Stephen Hemminger793b8832005-09-14 16:06:14 -07002155 if (istatus & PHY_M_IS_LSP_CHANGE)
2156 sky2->speed = sky2_phy_speed(hw, phystat);
2157
2158 if (istatus & PHY_M_IS_DUP_CHANGE)
2159 sky2->duplex =
2160 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
2161
2162 if (istatus & PHY_M_IS_LST_CHANGE) {
2163 if (phystat & PHY_M_PS_LINK_UP)
2164 sky2_link_up(sky2);
2165 else
2166 sky2_link_down(sky2);
2167 }
2168out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002169 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002170}
2171
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002172/* Special quick link interrupt (Yukon-2 Optima only) */
2173static void sky2_qlink_intr(struct sky2_hw *hw)
2174{
2175 struct sky2_port *sky2 = netdev_priv(hw->dev[0]);
2176 u32 imask;
2177 u16 phy;
2178
2179 /* disable irq */
2180 imask = sky2_read32(hw, B0_IMSK);
2181 imask &= ~Y2_IS_PHY_QLNK;
2182 sky2_write32(hw, B0_IMSK, imask);
2183
2184 /* reset PHY Link Detect */
2185 phy = sky2_pci_read16(hw, PSM_CONFIG_REG4);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002186 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002187 sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002188 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002189
2190 sky2_link_up(sky2);
2191}
2192
Stephen Hemminger62335ab2007-02-06 10:45:42 -08002193/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08002194 * and tx queue is full (stopped).
2195 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002196static void sky2_tx_timeout(struct net_device *dev)
2197{
2198 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002199 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002200
Joe Perches6c35aba2010-02-15 08:34:21 +00002201 netif_err(sky2, timer, dev, "tx timeout\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002202
Joe Perchesada1db52010-02-17 15:01:59 +00002203 netdev_printk(KERN_DEBUG, dev, "transmit ring %u .. %u report=%u done=%u\n",
2204 sky2->tx_cons, sky2->tx_prod,
2205 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
2206 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08002207
Stephen Hemminger81906792007-02-15 16:40:33 -08002208 /* can't restart safely under softirq */
2209 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002210}
2211
2212static int sky2_change_mtu(struct net_device *dev, int new_mtu)
2213{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002214 struct sky2_port *sky2 = netdev_priv(dev);
2215 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002216 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002217 int err;
2218 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002219 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002220
stephen hemminger44dde562010-02-12 06:58:01 +00002221 /* MTU size outside the spec */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002222 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2223 return -EINVAL;
2224
stephen hemminger44dde562010-02-12 06:58:01 +00002225 /* MTU > 1500 on yukon FE and FE+ not allowed */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002226 if (new_mtu > ETH_DATA_LEN &&
2227 (hw->chip_id == CHIP_ID_YUKON_FE ||
2228 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002229 return -EINVAL;
2230
stephen hemminger44dde562010-02-12 06:58:01 +00002231 /* TSO, etc on Yukon Ultra and MTU > 1500 not supported */
2232 if (new_mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U)
2233 dev->features &= ~(NETIF_F_TSO|NETIF_F_SG|NETIF_F_ALL_CSUM);
2234
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002235 if (!netif_running(dev)) {
2236 dev->mtu = new_mtu;
2237 return 0;
2238 }
2239
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002240 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002241 sky2_write32(hw, B0_IMSK, 0);
2242
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002243 dev->trans_start = jiffies; /* prevent tx timeout */
2244 netif_stop_queue(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002245 napi_disable(&hw->napi);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002246
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002247 synchronize_irq(hw->pdev->irq);
2248
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002249 if (!(hw->flags & SKY2_HW_RAM_BUFFER))
Stephen Hemminger69161612007-06-04 17:23:26 -07002250 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002251
2252 ctl = gma_read16(hw, port, GM_GP_CTRL);
2253 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002254 sky2_rx_stop(sky2);
2255 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002256
2257 dev->mtu = new_mtu;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002258
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002259 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2260 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002261
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002262 if (dev->mtu > ETH_DATA_LEN)
2263 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002264
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002265 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002266
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002267 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002268
Mike McCormack200ac492010-02-12 06:58:03 +00002269 err = sky2_alloc_rx_skbs(sky2);
2270 if (!err)
2271 sky2_rx_start(sky2);
2272 else
2273 sky2_rx_clean(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002274 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002275
David S. Millerd1d08d12008-01-07 20:53:33 -08002276 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002277 napi_enable(&hw->napi);
2278
Stephen Hemminger1b537562005-12-20 15:08:07 -08002279 if (err)
2280 dev_close(dev);
2281 else {
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002282 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002283
Stephen Hemminger1b537562005-12-20 15:08:07 -08002284 netif_wake_queue(dev);
2285 }
2286
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002287 return err;
2288}
2289
Stephen Hemminger14d02632006-09-26 11:57:43 -07002290/* For small just reuse existing skb for next receive */
2291static struct sk_buff *receive_copy(struct sky2_port *sky2,
2292 const struct rx_ring_info *re,
2293 unsigned length)
2294{
2295 struct sk_buff *skb;
2296
Eric Dumazet89d71a62009-10-13 05:34:20 +00002297 skb = netdev_alloc_skb_ip_align(sky2->netdev, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002298 if (likely(skb)) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07002299 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2300 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002301 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002302 skb->ip_summed = re->skb->ip_summed;
2303 skb->csum = re->skb->csum;
2304 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2305 length, PCI_DMA_FROMDEVICE);
2306 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002307 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002308 }
2309 return skb;
2310}
2311
2312/* Adjust length of skb with fragments to match received data */
2313static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2314 unsigned int length)
2315{
2316 int i, num_frags;
2317 unsigned int size;
2318
2319 /* put header into skb */
2320 size = min(length, hdr_space);
2321 skb->tail += size;
2322 skb->len += size;
2323 length -= size;
2324
2325 num_frags = skb_shinfo(skb)->nr_frags;
2326 for (i = 0; i < num_frags; i++) {
2327 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2328
2329 if (length == 0) {
2330 /* don't need this page */
2331 __free_page(frag->page);
2332 --skb_shinfo(skb)->nr_frags;
2333 } else {
2334 size = min(length, (unsigned) PAGE_SIZE);
2335
2336 frag->size = size;
2337 skb->data_len += size;
2338 skb->truesize += size;
2339 skb->len += size;
2340 length -= size;
2341 }
2342 }
2343}
2344
2345/* Normal packet - take skb from ring element and put in a new one */
2346static struct sk_buff *receive_new(struct sky2_port *sky2,
2347 struct rx_ring_info *re,
2348 unsigned int length)
2349{
stephen hemminger3fbd9182010-02-01 13:45:41 +00002350 struct sk_buff *skb;
2351 struct rx_ring_info nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002352 unsigned hdr_space = sky2->rx_data_size;
2353
stephen hemminger3fbd9182010-02-01 13:45:41 +00002354 nre.skb = sky2_rx_alloc(sky2);
2355 if (unlikely(!nre.skb))
2356 goto nobuf;
2357
2358 if (sky2_rx_map_skb(sky2->hw->pdev, &nre, hdr_space))
2359 goto nomap;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002360
2361 skb = re->skb;
2362 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002363 prefetch(skb->data);
stephen hemminger3fbd9182010-02-01 13:45:41 +00002364 *re = nre;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002365
2366 if (skb_shinfo(skb)->nr_frags)
2367 skb_put_frags(skb, hdr_space, length);
2368 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002369 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002370 return skb;
stephen hemminger3fbd9182010-02-01 13:45:41 +00002371
2372nomap:
2373 dev_kfree_skb(nre.skb);
2374nobuf:
2375 return NULL;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002376}
2377
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002378/*
2379 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002380 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002381 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002382static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002383 u16 length, u32 status)
2384{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002385 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002386 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002387 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002388 u16 count = (status & GMR_FS_LEN) >> 16;
2389
2390#ifdef SKY2_VLAN_TAG_USED
2391 /* Account for vlan tag */
2392 if (sky2->vlgrp && (status & GMR_FS_VLAN))
2393 count -= VLAN_HLEN;
2394#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002395
Joe Perches6c35aba2010-02-15 08:34:21 +00002396 netif_printk(sky2, rx_status, KERN_DEBUG, dev,
2397 "rx slot %u status 0x%x len %d\n",
2398 sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002399
Stephen Hemminger793b8832005-09-14 16:06:14 -07002400 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002401 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002402
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002403 /* This chip has hardware problems that generates bogus status.
2404 * So do only marginal checking and expect higher level protocols
2405 * to handle crap frames.
2406 */
2407 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2408 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2409 length != count)
2410 goto okay;
2411
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002412 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002413 goto error;
2414
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002415 if (!(status & GMR_FS_RX_OK))
2416 goto resubmit;
2417
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002418 /* if length reported by DMA does not match PHY, packet was truncated */
2419 if (length != count)
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002420 goto len_error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002421
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002422okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002423 if (length < copybreak)
2424 skb = receive_copy(sky2, re, length);
2425 else
2426 skb = receive_new(sky2, re, length);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002427
2428 dev->stats.rx_dropped += (skb == NULL);
2429
Stephen Hemminger793b8832005-09-14 16:06:14 -07002430resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002431 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002432
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002433 return skb;
2434
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002435len_error:
Stephen Hemminger71749532007-07-09 15:33:40 -07002436 /* Truncation of overlength packets
2437 causes PHY length to not match MAC length */
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002438 ++dev->stats.rx_length_errors;
Joe Perches6c35aba2010-02-15 08:34:21 +00002439 if (net_ratelimit())
2440 netif_info(sky2, rx_err, dev,
2441 "rx length error: status %#x length %d\n",
2442 status, length);
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002443 goto resubmit;
Stephen Hemminger71749532007-07-09 15:33:40 -07002444
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002445error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002446 ++dev->stats.rx_errors;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002447 if (status & GMR_FS_RX_FF_OV) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002448 dev->stats.rx_over_errors++;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002449 goto resubmit;
2450 }
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002451
Joe Perches6c35aba2010-02-15 08:34:21 +00002452 if (net_ratelimit())
2453 netif_info(sky2, rx_err, dev,
2454 "rx error, status 0x%x length %d\n", status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002455
2456 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002457 dev->stats.rx_length_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002458 if (status & GMR_FS_FRAGMENT)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002459 dev->stats.rx_frame_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002460 if (status & GMR_FS_CRC_ERR)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002461 dev->stats.rx_crc_errors++;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002462
Stephen Hemminger793b8832005-09-14 16:06:14 -07002463 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002464}
2465
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002466/* Transmit complete */
2467static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002468{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002469 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002470
Mike McCormack8a0c9222010-02-12 06:58:06 +00002471 if (netif_running(dev)) {
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002472 sky2_tx_complete(sky2, last);
Mike McCormack8a0c9222010-02-12 06:58:06 +00002473
2474 /* Wake unless it's detached, and called e.g. from sky2_down() */
2475 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
2476 netif_wake_queue(dev);
2477 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002478}
2479
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002480static inline void sky2_skb_rx(const struct sky2_port *sky2,
2481 u32 status, struct sk_buff *skb)
2482{
2483#ifdef SKY2_VLAN_TAG_USED
2484 u16 vlan_tag = be16_to_cpu(sky2->rx_tag);
2485 if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
2486 if (skb->ip_summed == CHECKSUM_NONE)
2487 vlan_hwaccel_receive_skb(skb, sky2->vlgrp, vlan_tag);
2488 else
2489 vlan_gro_receive(&sky2->hw->napi, sky2->vlgrp,
2490 vlan_tag, skb);
2491 return;
2492 }
2493#endif
2494 if (skb->ip_summed == CHECKSUM_NONE)
2495 netif_receive_skb(skb);
2496 else
2497 napi_gro_receive(&sky2->hw->napi, skb);
2498}
2499
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002500static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port,
2501 unsigned packets, unsigned bytes)
2502{
2503 if (packets) {
2504 struct net_device *dev = hw->dev[port];
2505
2506 dev->stats.rx_packets += packets;
2507 dev->stats.rx_bytes += bytes;
2508 dev->last_rx = jiffies;
2509 sky2_rx_update(netdev_priv(dev), rxqaddr[port]);
2510 }
2511}
2512
stephen hemminger375c5682010-02-07 06:28:36 +00002513static void sky2_rx_checksum(struct sky2_port *sky2, u32 status)
2514{
2515 /* If this happens then driver assuming wrong format for chip type */
2516 BUG_ON(sky2->hw->flags & SKY2_HW_NEW_LE);
2517
2518 /* Both checksum counters are programmed to start at
2519 * the same offset, so unless there is a problem they
2520 * should match. This failure is an early indication that
2521 * hardware receive checksumming won't work.
2522 */
2523 if (likely((u16)(status >> 16) == (u16)status)) {
2524 struct sk_buff *skb = sky2->rx_ring[sky2->rx_next].skb;
2525 skb->ip_summed = CHECKSUM_COMPLETE;
2526 skb->csum = le16_to_cpu(status);
2527 } else {
2528 dev_notice(&sky2->hw->pdev->dev,
2529 "%s: receive checksum problem (status = %#x)\n",
2530 sky2->netdev->name, status);
2531
2532 /* Disable checksum offload */
2533 sky2->flags &= ~SKY2_FLAG_RX_CHECKSUM;
2534 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
2535 BMU_DIS_RX_CHKSUM);
2536 }
2537}
2538
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002539/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002540static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002541{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002542 int work_done = 0;
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002543 unsigned int total_bytes[2] = { 0 };
2544 unsigned int total_packets[2] = { 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002545
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002546 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002547 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002548 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002549 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002550 unsigned port;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002551 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002552 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002553 u32 status;
2554 u16 length;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002555 u8 opcode = le->opcode;
2556
2557 if (!(opcode & HW_OWNER))
2558 break;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002559
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07002560 hw->st_idx = RING_NEXT(hw->st_idx, STATUS_RING_SIZE);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002561
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002562 port = le->css & CSS_LINK_BIT;
Stephen Hemminger69161612007-06-04 17:23:26 -07002563 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002564 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002565 length = le16_to_cpu(le->length);
2566 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002567
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002568 le->opcode = 0;
2569 switch (opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002570 case OP_RXSTAT:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002571 total_packets[port]++;
2572 total_bytes[port] += length;
Stephen Hemminger90c30332010-02-03 08:31:12 +00002573
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002574 skb = sky2_receive(dev, length, status);
Stephen Hemminger90c30332010-02-03 08:31:12 +00002575 if (!skb)
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002576 break;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002577
Stephen Hemminger69161612007-06-04 17:23:26 -07002578 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002579 if (hw->flags & SKY2_HW_NEW_LE) {
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07002580 if ((sky2->flags & SKY2_FLAG_RX_CHECKSUM) &&
Stephen Hemminger69161612007-06-04 17:23:26 -07002581 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2582 (le->css & CSS_TCPUDPCSOK))
2583 skb->ip_summed = CHECKSUM_UNNECESSARY;
2584 else
2585 skb->ip_summed = CHECKSUM_NONE;
2586 }
2587
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002588 skb->protocol = eth_type_trans(skb, dev);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002589
Stephen Hemminger37e5a242009-06-17 07:30:39 +00002590 sky2_skb_rx(sky2, status, skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002591
Stephen Hemminger22e11702006-07-12 15:23:48 -07002592 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002593 if (++work_done >= to_do)
2594 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002595 break;
2596
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002597#ifdef SKY2_VLAN_TAG_USED
2598 case OP_RXVLAN:
2599 sky2->rx_tag = length;
2600 break;
2601
2602 case OP_RXCHKSVLAN:
2603 sky2->rx_tag = length;
2604 /* fall through */
2605#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002606 case OP_RXCHKS:
stephen hemminger375c5682010-02-07 06:28:36 +00002607 if (likely(sky2->flags & SKY2_FLAG_RX_CHECKSUM))
2608 sky2_rx_checksum(sky2, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002609 break;
2610
2611 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002612 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002613 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002614 if (hw->dev[1])
2615 sky2_tx_done(hw->dev[1],
2616 ((status >> 24) & 0xff)
2617 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002618 break;
2619
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002620 default:
2621 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002622 pr_warning("unknown status opcode 0x%x\n", opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002623 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002624 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002625
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002626 /* Fully processed status ring so clear irq */
2627 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2628
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002629exit_loop:
Stephen Hemmingerbf15fe92009-06-17 07:30:36 +00002630 sky2_rx_done(hw, 0, total_packets[0], total_bytes[0]);
2631 sky2_rx_done(hw, 1, total_packets[1], total_bytes[1]);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002632
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002633 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002634}
2635
2636static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2637{
2638 struct net_device *dev = hw->dev[port];
2639
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002640 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002641 netdev_info(dev, "hw error interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002642
2643 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002644 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002645 netdev_err(dev, "ram data read parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002646 /* Clear IRQ */
2647 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2648 }
2649
2650 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002651 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002652 netdev_err(dev, "ram data write parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002653
2654 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2655 }
2656
2657 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002658 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002659 netdev_err(dev, "MAC parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002660 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2661 }
2662
2663 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002664 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002665 netdev_err(dev, "RX parity error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002666 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2667 }
2668
2669 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002670 if (net_ratelimit())
Joe Perchesada1db52010-02-17 15:01:59 +00002671 netdev_err(dev, "TCP segmentation error\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002672 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2673 }
2674}
2675
2676static void sky2_hw_intr(struct sky2_hw *hw)
2677{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002678 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002679 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002680 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2681
2682 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002683
Stephen Hemminger793b8832005-09-14 16:06:14 -07002684 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002685 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002686
2687 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002688 u16 pci_err;
2689
stephen hemmingera40ccc62010-01-24 18:46:06 +00002690 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002691 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002692 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002693 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002694 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002695
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002696 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002697 pci_err | PCI_STATUS_ERROR_BITS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002698 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002699 }
2700
2701 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002702 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002703 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002704
stephen hemmingera40ccc62010-01-24 18:46:06 +00002705 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002706 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
2707 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2708 0xfffffffful);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002709 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002710 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
Stephen Hemmingercf06ffb2007-11-05 15:52:13 -08002711
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002712 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
stephen hemmingera40ccc62010-01-24 18:46:06 +00002713 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002714 }
2715
2716 if (status & Y2_HWE_L1_MASK)
2717 sky2_hw_error(hw, 0, status);
2718 status >>= 8;
2719 if (status & Y2_HWE_L1_MASK)
2720 sky2_hw_error(hw, 1, status);
2721}
2722
2723static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2724{
2725 struct net_device *dev = hw->dev[port];
2726 struct sky2_port *sky2 = netdev_priv(dev);
2727 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2728
Joe Perches6c35aba2010-02-15 08:34:21 +00002729 netif_info(sky2, intr, dev, "mac interrupt status 0x%x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002730
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002731 if (status & GM_IS_RX_CO_OV)
2732 gma_read16(hw, port, GM_RX_IRQ_SRC);
2733
2734 if (status & GM_IS_TX_CO_OV)
2735 gma_read16(hw, port, GM_TX_IRQ_SRC);
2736
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002737 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002738 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002739 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2740 }
2741
2742 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002743 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002744 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2745 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002746}
2747
Stephen Hemminger40b01722007-04-11 14:47:59 -07002748/* This should never happen it is a bug. */
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002749static void sky2_le_error(struct sky2_hw *hw, unsigned port, u16 q)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002750{
2751 struct net_device *dev = hw->dev[port];
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002752 u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002753
Joe Perchesada1db52010-02-17 15:01:59 +00002754 dev_err(&hw->pdev->dev, "%s: descriptor error q=%#x get=%u put=%u\n",
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002755 dev->name, (unsigned) q, (unsigned) idx,
2756 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002757
Stephen Hemminger40b01722007-04-11 14:47:59 -07002758 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002759}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002760
Stephen Hemminger75e80682007-09-19 15:36:46 -07002761static int sky2_rx_hung(struct net_device *dev)
2762{
2763 struct sky2_port *sky2 = netdev_priv(dev);
2764 struct sky2_hw *hw = sky2->hw;
2765 unsigned port = sky2->port;
2766 unsigned rxq = rxqaddr[port];
2767 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2768 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2769 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2770 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2771
2772 /* If idle and MAC or PCI is stuck */
2773 if (sky2->check.last == dev->last_rx &&
2774 ((mac_rp == sky2->check.mac_rp &&
2775 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2776 /* Check if the PCI RX hang */
2777 (fifo_rp == sky2->check.fifo_rp &&
2778 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
Joe Perchesada1db52010-02-17 15:01:59 +00002779 netdev_printk(KERN_DEBUG, dev,
2780 "hung mac %d:%d fifo %d (%d:%d)\n",
2781 mac_lev, mac_rp, fifo_lev,
2782 fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
Stephen Hemminger75e80682007-09-19 15:36:46 -07002783 return 1;
2784 } else {
2785 sky2->check.last = dev->last_rx;
2786 sky2->check.mac_rp = mac_rp;
2787 sky2->check.mac_lev = mac_lev;
2788 sky2->check.fifo_rp = fifo_rp;
2789 sky2->check.fifo_lev = fifo_lev;
2790 return 0;
2791 }
2792}
2793
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002794static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002795{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002796 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002797
Stephen Hemminger75e80682007-09-19 15:36:46 -07002798 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002799 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002800 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002801 } else {
2802 int i, active = 0;
2803
2804 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002805 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002806 if (!netif_running(dev))
2807 continue;
2808 ++active;
2809
2810 /* For chips with Rx FIFO, check if stuck */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002811 if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002812 sky2_rx_hung(dev)) {
Joe Perchesada1db52010-02-17 15:01:59 +00002813 netdev_info(dev, "receiver hang detected\n");
Stephen Hemminger75e80682007-09-19 15:36:46 -07002814 schedule_work(&hw->restart_work);
2815 return;
2816 }
2817 }
2818
2819 if (active == 0)
2820 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002821 }
2822
Stephen Hemminger75e80682007-09-19 15:36:46 -07002823 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002824}
2825
Stephen Hemminger40b01722007-04-11 14:47:59 -07002826/* Hardware/software error handling */
2827static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002828{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002829 if (net_ratelimit())
2830 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002831
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002832 if (status & Y2_IS_HW_ERR)
2833 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002834
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002835 if (status & Y2_IS_IRQ_MAC1)
2836 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002837
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002838 if (status & Y2_IS_IRQ_MAC2)
2839 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002840
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002841 if (status & Y2_IS_CHK_RX1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002842 sky2_le_error(hw, 0, Q_R1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002843
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002844 if (status & Y2_IS_CHK_RX2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002845 sky2_le_error(hw, 1, Q_R2);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002846
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002847 if (status & Y2_IS_CHK_TXA1)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002848 sky2_le_error(hw, 0, Q_XA1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002849
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002850 if (status & Y2_IS_CHK_TXA2)
Stephen Hemmingerc1197312009-08-18 15:17:07 +00002851 sky2_le_error(hw, 1, Q_XA2);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002852}
2853
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002854static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002855{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002856 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002857 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07002858 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07002859 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002860
2861 if (unlikely(status & Y2_IS_ERROR))
2862 sky2_err_intr(hw, status);
2863
2864 if (status & Y2_IS_IRQ_PHY1)
2865 sky2_phy_intr(hw, 0);
2866
2867 if (status & Y2_IS_IRQ_PHY2)
2868 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002869
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002870 if (status & Y2_IS_PHY_QLNK)
2871 sky2_qlink_intr(hw);
2872
Stephen Hemminger26691832007-10-11 18:31:13 -07002873 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
2874 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002875
David S. Miller6f535762007-10-11 18:08:29 -07002876 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07002877 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002878 }
David S. Miller6f535762007-10-11 18:08:29 -07002879
Stephen Hemminger26691832007-10-11 18:31:13 -07002880 napi_complete(napi);
2881 sky2_read32(hw, B0_Y2_SP_LISR);
2882done:
2883
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002884 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002885}
2886
David Howells7d12e782006-10-05 14:55:46 +01002887static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002888{
2889 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002890 u32 status;
2891
2892 /* Reading this mask interrupts as side effect */
2893 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2894 if (status == 0 || status == ~0)
2895 return IRQ_NONE;
2896
2897 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002898
2899 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002900
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002901 return IRQ_HANDLED;
2902}
2903
2904#ifdef CONFIG_NET_POLL_CONTROLLER
2905static void sky2_netpoll(struct net_device *dev)
2906{
2907 struct sky2_port *sky2 = netdev_priv(dev);
2908
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002909 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002910}
2911#endif
2912
2913/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002914static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002915{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002916 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002917 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002918 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08002919 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002920 case CHIP_ID_YUKON_SUPR:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07002921 case CHIP_ID_YUKON_UL_2:
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00002922 case CHIP_ID_YUKON_OPT:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002923 return 125;
2924
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002925 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002926 return 100;
2927
2928 case CHIP_ID_YUKON_FE_P:
2929 return 50;
2930
2931 case CHIP_ID_YUKON_XL:
2932 return 156;
2933
2934 default:
2935 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002936 }
2937}
2938
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002939static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2940{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002941 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002942}
2943
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002944static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2945{
2946 return clk / sky2_mhz(hw);
2947}
2948
2949
Stephen Hemmingere3173832007-02-06 10:45:39 -08002950static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002951{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002952 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002953
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002954 /* Enable all clocks and check for bad PCI access */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002955 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger451af332007-06-04 17:23:24 -07002956
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002957 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08002958
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002959 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002960 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
2961
2962 switch(hw->chip_id) {
2963 case CHIP_ID_YUKON_XL:
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002964 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002965 break;
2966
2967 case CHIP_ID_YUKON_EC_U:
2968 hw->flags = SKY2_HW_GIGABIT
2969 | SKY2_HW_NEWER_PHY
2970 | SKY2_HW_ADV_POWER_CTL;
2971 break;
2972
2973 case CHIP_ID_YUKON_EX:
2974 hw->flags = SKY2_HW_GIGABIT
2975 | SKY2_HW_NEWER_PHY
2976 | SKY2_HW_NEW_LE
2977 | SKY2_HW_ADV_POWER_CTL;
2978
2979 /* New transmit checksum */
2980 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
2981 hw->flags |= SKY2_HW_AUTO_TX_SUM;
2982 break;
2983
2984 case CHIP_ID_YUKON_EC:
2985 /* This rev is really old, and requires untested workarounds */
2986 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
2987 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
2988 return -EOPNOTSUPP;
2989 }
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002990 hw->flags = SKY2_HW_GIGABIT;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002991 break;
2992
2993 case CHIP_ID_YUKON_FE:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002994 break;
2995
Stephen Hemminger05745c42007-09-19 15:36:45 -07002996 case CHIP_ID_YUKON_FE_P:
2997 hw->flags = SKY2_HW_NEWER_PHY
2998 | SKY2_HW_NEW_LE
2999 | SKY2_HW_AUTO_TX_SUM
3000 | SKY2_HW_ADV_POWER_CTL;
3001 break;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003002
3003 case CHIP_ID_YUKON_SUPR:
3004 hw->flags = SKY2_HW_GIGABIT
3005 | SKY2_HW_NEWER_PHY
3006 | SKY2_HW_NEW_LE
3007 | SKY2_HW_AUTO_TX_SUM
3008 | SKY2_HW_ADV_POWER_CTL;
3009 break;
3010
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003011 case CHIP_ID_YUKON_UL_2:
Takashi Iwaib3386822009-12-03 05:12:01 +00003012 hw->flags = SKY2_HW_GIGABIT
3013 | SKY2_HW_ADV_POWER_CTL;
3014 break;
3015
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003016 case CHIP_ID_YUKON_OPT:
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003017 hw->flags = SKY2_HW_GIGABIT
Takashi Iwaib3386822009-12-03 05:12:01 +00003018 | SKY2_HW_NEW_LE
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07003019 | SKY2_HW_ADV_POWER_CTL;
3020 break;
3021
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003022 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003023 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
3024 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003025 return -EOPNOTSUPP;
3026 }
3027
Stephen Hemmingere3173832007-02-06 10:45:39 -08003028 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003029 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
3030 hw->flags |= SKY2_HW_FIBRE_PHY;
3031
Stephen Hemmingere3173832007-02-06 10:45:39 -08003032 hw->ports = 1;
3033 t8 = sky2_read8(hw, B2_Y2_HW_RES);
3034 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
3035 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
3036 ++hw->ports;
3037 }
3038
Mike McCormack74a61eb2009-09-21 04:08:52 +00003039 if (sky2_read8(hw, B2_E_0))
3040 hw->flags |= SKY2_HW_RAM_BUFFER;
3041
Stephen Hemmingere3173832007-02-06 10:45:39 -08003042 return 0;
3043}
3044
3045static void sky2_reset(struct sky2_hw *hw)
3046{
Stephen Hemminger555382c2007-08-29 12:58:14 -07003047 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003048 u16 status;
Stephen Hemminger555382c2007-08-29 12:58:14 -07003049 int i, cap;
3050 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003051
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003052 /* disable ASF */
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003053 if (hw->chip_id == CHIP_ID_YUKON_EX
3054 || hw->chip_id == CHIP_ID_YUKON_SUPR) {
3055 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003056 status = sky2_read16(hw, HCU_CCSR);
3057 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
3058 HCU_CCSR_UC_STATE_MSK);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003059 /*
3060 * CPU clock divider shouldn't be used because
3061 * - ASF firmware may malfunction
3062 * - Yukon-Supreme: Parallel FLASH doesn't support divided clocks
3063 */
3064 status &= ~HCU_CCSR_CPU_CLK_DIVIDE_MSK;
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003065 sky2_write16(hw, HCU_CCSR, status);
stephen hemmingeracd12dd2010-02-07 06:24:50 +00003066 sky2_write32(hw, CPU_WDOG, 0);
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07003067 } else
3068 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
3069 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003070
3071 /* do a SW reset */
3072 sky2_write8(hw, B0_CTST, CS_RST_SET);
3073 sky2_write8(hw, B0_CTST, CS_RST_CLR);
3074
Stephen Hemmingerac93a392007-11-05 15:52:08 -08003075 /* allow writes to PCI config */
3076 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
3077
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003078 /* clear PCI errors, if any */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003079 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003080 status |= PCI_STATUS_ERROR_BITS;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003081 sky2_pci_write16(hw, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003082
3083 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
3084
Stephen Hemminger555382c2007-08-29 12:58:14 -07003085 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
3086 if (cap) {
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003087 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
3088 0xfffffffful);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07003089
Stephen Hemminger555382c2007-08-29 12:58:14 -07003090 /* If error bit is stuck on ignore it */
3091 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
3092 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08003093 else
Stephen Hemminger555382c2007-08-29 12:58:14 -07003094 hwe_mask |= Y2_IS_PCI_EXP;
3095 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003096
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003097 sky2_power_on(hw);
stephen hemmingera40ccc62010-01-24 18:46:06 +00003098 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003099
3100 for (i = 0; i < hw->ports; i++) {
3101 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
3102 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07003103
Stephen Hemmingered4d4162008-01-10 16:14:14 -08003104 if (hw->chip_id == CHIP_ID_YUKON_EX ||
3105 hw->chip_id == CHIP_ID_YUKON_SUPR)
Stephen Hemminger69161612007-06-04 17:23:26 -07003106 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
3107 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
3108 | GMC_BYP_RETR_ON);
Stephen Hemminger877c8572009-10-29 06:37:08 +00003109
3110 }
3111
3112 if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) {
3113 /* enable MACSec clock gating */
3114 sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003115 }
3116
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003117 if (hw->chip_id == CHIP_ID_YUKON_OPT) {
3118 u16 reg;
3119 u32 msk;
3120
3121 if (hw->chip_rev == 0) {
3122 /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */
3123 sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7));
3124
3125 /* set PHY Link Detect Timer to 1.1 second (11x 100ms) */
3126 reg = 10;
3127 } else {
3128 /* set PHY Link Detect Timer to 0.4 second (4x 100ms) */
3129 reg = 3;
3130 }
3131
3132 reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE;
3133
3134 /* reset PHY Link Detect */
stephen hemmingera40ccc62010-01-24 18:46:06 +00003135 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003136 sky2_pci_write16(hw, PSM_CONFIG_REG4,
3137 reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT);
3138 sky2_pci_write16(hw, PSM_CONFIG_REG4, reg);
3139
3140
3141 /* enable PHY Quick Link */
3142 msk = sky2_read32(hw, B0_IMSK);
3143 msk |= Y2_IS_PHY_QLNK;
3144 sky2_write32(hw, B0_IMSK, msk);
3145
3146 /* check if PSMv2 was running before */
3147 reg = sky2_pci_read16(hw, PSM_CONFIG_REG3);
3148 if (reg & PCI_EXP_LNKCTL_ASPMC) {
stephen hemminger8b055432010-02-12 06:57:58 +00003149 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003150 /* restore the PCIe Link Control register */
3151 sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg);
3152 }
stephen hemmingera40ccc62010-01-24 18:46:06 +00003153 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00003154
3155 /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */
3156 sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16));
3157 }
3158
Stephen Hemminger793b8832005-09-14 16:06:14 -07003159 /* Clear I2C IRQ noise */
3160 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003161
3162 /* turn off hardware timer (unused) */
3163 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
3164 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003165
Stephen Hemminger69634ee2005-12-09 11:35:06 -08003166 /* Turn off descriptor polling */
3167 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003168
3169 /* Turn off receive timestamp */
3170 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003171 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003172
3173 /* enable the Tx Arbiters */
3174 for (i = 0; i < hw->ports; i++)
3175 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
3176
3177 /* Initialize ram interface */
3178 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003179 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003180
3181 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
3182 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
3183 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
3184 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
3185 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
3186 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
3187 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
3188 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
3189 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
3190 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
3191 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
3192 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
3193 }
3194
Stephen Hemminger555382c2007-08-29 12:58:14 -07003195 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003196
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003197 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07003198 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003199
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003200 memset(hw->st_le, 0, STATUS_LE_BYTES);
3201 hw->st_idx = 0;
3202
3203 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
3204 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
3205
3206 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003207 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003208
3209 /* Set the list last index */
Stephen Hemminger793b8832005-09-14 16:06:14 -07003210 sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003211
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003212 sky2_write16(hw, STAT_TX_IDX_TH, 10);
3213 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003214
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003215 /* set Status-FIFO ISR watermark */
3216 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
3217 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
3218 else
3219 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003220
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003221 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003222 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
3223 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003224
Stephen Hemminger793b8832005-09-14 16:06:14 -07003225 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003226 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
3227
3228 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3229 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3230 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003231}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003232
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003233/* Take device down (offline).
3234 * Equivalent to doing dev_stop() but this does not
3235 * inform upper layers of the transistion.
3236 */
3237static void sky2_detach(struct net_device *dev)
3238{
3239 if (netif_running(dev)) {
Mike McCormackc36531b2009-12-31 00:55:31 +00003240 netif_tx_lock(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003241 netif_device_detach(dev); /* stop txq */
Mike McCormackc36531b2009-12-31 00:55:31 +00003242 netif_tx_unlock(dev);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003243 sky2_down(dev);
3244 }
3245}
3246
3247/* Bring device back after doing sky2_detach */
3248static int sky2_reattach(struct net_device *dev)
3249{
3250 int err = 0;
3251
3252 if (netif_running(dev)) {
3253 err = sky2_up(dev);
3254 if (err) {
Joe Perchesada1db52010-02-17 15:01:59 +00003255 netdev_info(dev, "could not restart %d\n", err);
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003256 dev_close(dev);
3257 } else {
3258 netif_device_attach(dev);
3259 sky2_set_multicast(dev);
3260 }
3261 }
3262
3263 return err;
3264}
3265
Stephen Hemminger81906792007-02-15 16:40:33 -08003266static void sky2_restart(struct work_struct *work)
3267{
3268 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
Mike McCormack8a0c9222010-02-12 06:58:06 +00003269 u32 imask;
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003270 int i;
Stephen Hemminger81906792007-02-15 16:40:33 -08003271
Stephen Hemminger81906792007-02-15 16:40:33 -08003272 rtnl_lock();
Stephen Hemminger81906792007-02-15 16:40:33 -08003273
Stephen Hemminger8cfcbe92007-12-03 17:02:17 -08003274 napi_disable(&hw->napi);
Mike McCormack8a0c9222010-02-12 06:58:06 +00003275 synchronize_irq(hw->pdev->irq);
3276 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemminger8cfcbe92007-12-03 17:02:17 -08003277 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger81906792007-02-15 16:40:33 -08003278
Mike McCormack8a0c9222010-02-12 06:58:06 +00003279 for (i = 0; i < hw->ports; i++) {
3280 struct net_device *dev = hw->dev[i];
3281 struct sky2_port *sky2 = netdev_priv(dev);
3282
3283 if (!netif_running(dev))
3284 continue;
3285
3286 netif_carrier_off(dev);
3287 netif_tx_disable(dev);
3288 sky2_hw_down(sky2);
3289 }
3290
3291 sky2_reset(hw);
3292
3293 for (i = 0; i < hw->ports; i++) {
3294 struct net_device *dev = hw->dev[i];
3295 struct sky2_port *sky2 = netdev_priv(dev);
3296
3297 if (!netif_running(dev))
3298 continue;
3299
3300 sky2_hw_up(sky2);
3301 netif_wake_queue(dev);
3302 }
3303
3304 sky2_write32(hw, B0_IMSK, imask);
3305 sky2_read32(hw, B0_IMSK);
3306
3307 sky2_read32(hw, B0_Y2_SP_LISR);
3308 napi_enable(&hw->napi);
Stephen Hemminger81906792007-02-15 16:40:33 -08003309
Stephen Hemminger81906792007-02-15 16:40:33 -08003310 rtnl_unlock();
3311}
3312
Stephen Hemmingere3173832007-02-06 10:45:39 -08003313static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
3314{
3315 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
3316}
3317
3318static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3319{
3320 const struct sky2_port *sky2 = netdev_priv(dev);
3321
3322 wol->supported = sky2_wol_supported(sky2->hw);
3323 wol->wolopts = sky2->wol;
3324}
3325
3326static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3327{
3328 struct sky2_port *sky2 = netdev_priv(dev);
3329 struct sky2_hw *hw = sky2->hw;
3330
Joe Perches8e95a202009-12-03 07:58:21 +00003331 if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) ||
3332 !device_can_wakeup(&hw->pdev->dev))
Stephen Hemmingere3173832007-02-06 10:45:39 -08003333 return -EOPNOTSUPP;
3334
3335 sky2->wol = wol->wolopts;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003336 return 0;
3337}
3338
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003339static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003340{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003341 if (sky2_is_copper(hw)) {
3342 u32 modes = SUPPORTED_10baseT_Half
3343 | SUPPORTED_10baseT_Full
3344 | SUPPORTED_100baseT_Half
3345 | SUPPORTED_100baseT_Full
3346 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003347
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003348 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003349 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003350 | SUPPORTED_1000baseT_Full;
3351 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003352 } else
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003353 return SUPPORTED_1000baseT_Half
3354 | SUPPORTED_1000baseT_Full
3355 | SUPPORTED_Autoneg
3356 | SUPPORTED_FIBRE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003357}
3358
Stephen Hemminger793b8832005-09-14 16:06:14 -07003359static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003360{
3361 struct sky2_port *sky2 = netdev_priv(dev);
3362 struct sky2_hw *hw = sky2->hw;
3363
3364 ecmd->transceiver = XCVR_INTERNAL;
3365 ecmd->supported = sky2_supported_modes(hw);
3366 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003367 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003368 ecmd->port = PORT_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003369 ecmd->speed = sky2->speed;
3370 } else {
3371 ecmd->speed = SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003372 ecmd->port = PORT_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003373 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003374
3375 ecmd->advertising = sky2->advertising;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003376 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_SPEED)
3377 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003378 ecmd->duplex = sky2->duplex;
3379 return 0;
3380}
3381
3382static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3383{
3384 struct sky2_port *sky2 = netdev_priv(dev);
3385 const struct sky2_hw *hw = sky2->hw;
3386 u32 supported = sky2_supported_modes(hw);
3387
3388 if (ecmd->autoneg == AUTONEG_ENABLE) {
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003389 sky2->flags |= SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003390 ecmd->advertising = supported;
3391 sky2->duplex = -1;
3392 sky2->speed = -1;
3393 } else {
3394 u32 setting;
3395
Stephen Hemminger793b8832005-09-14 16:06:14 -07003396 switch (ecmd->speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003397 case SPEED_1000:
3398 if (ecmd->duplex == DUPLEX_FULL)
3399 setting = SUPPORTED_1000baseT_Full;
3400 else if (ecmd->duplex == DUPLEX_HALF)
3401 setting = SUPPORTED_1000baseT_Half;
3402 else
3403 return -EINVAL;
3404 break;
3405 case SPEED_100:
3406 if (ecmd->duplex == DUPLEX_FULL)
3407 setting = SUPPORTED_100baseT_Full;
3408 else if (ecmd->duplex == DUPLEX_HALF)
3409 setting = SUPPORTED_100baseT_Half;
3410 else
3411 return -EINVAL;
3412 break;
3413
3414 case SPEED_10:
3415 if (ecmd->duplex == DUPLEX_FULL)
3416 setting = SUPPORTED_10baseT_Full;
3417 else if (ecmd->duplex == DUPLEX_HALF)
3418 setting = SUPPORTED_10baseT_Half;
3419 else
3420 return -EINVAL;
3421 break;
3422 default:
3423 return -EINVAL;
3424 }
3425
3426 if ((setting & supported) == 0)
3427 return -EINVAL;
3428
3429 sky2->speed = ecmd->speed;
3430 sky2->duplex = ecmd->duplex;
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003431 sky2->flags &= ~SKY2_FLAG_AUTO_SPEED;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003432 }
3433
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003434 sky2->advertising = ecmd->advertising;
3435
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003436 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003437 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003438 sky2_set_multicast(dev);
3439 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003440
3441 return 0;
3442}
3443
3444static void sky2_get_drvinfo(struct net_device *dev,
3445 struct ethtool_drvinfo *info)
3446{
3447 struct sky2_port *sky2 = netdev_priv(dev);
3448
3449 strcpy(info->driver, DRV_NAME);
3450 strcpy(info->version, DRV_VERSION);
3451 strcpy(info->fw_version, "N/A");
3452 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3453}
3454
3455static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003456 char name[ETH_GSTRING_LEN];
3457 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003458} sky2_stats[] = {
3459 { "tx_bytes", GM_TXO_OK_HI },
3460 { "rx_bytes", GM_RXO_OK_HI },
3461 { "tx_broadcast", GM_TXF_BC_OK },
3462 { "rx_broadcast", GM_RXF_BC_OK },
3463 { "tx_multicast", GM_TXF_MC_OK },
3464 { "rx_multicast", GM_RXF_MC_OK },
3465 { "tx_unicast", GM_TXF_UC_OK },
3466 { "rx_unicast", GM_RXF_UC_OK },
3467 { "tx_mac_pause", GM_TXF_MPAUSE },
3468 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003469 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003470 { "late_collision",GM_TXF_LAT_COL },
3471 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003472 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003473 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003474
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003475 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003476 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003477 { "rx_64_byte_packets", GM_RXF_64B },
3478 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3479 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3480 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3481 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3482 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3483 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003484 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003485 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3486 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003487 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003488
3489 { "tx_64_byte_packets", GM_TXF_64B },
3490 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3491 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3492 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3493 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3494 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3495 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3496 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003497};
3498
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003499static u32 sky2_get_rx_csum(struct net_device *dev)
3500{
3501 struct sky2_port *sky2 = netdev_priv(dev);
3502
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003503 return !!(sky2->flags & SKY2_FLAG_RX_CHECKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003504}
3505
3506static int sky2_set_rx_csum(struct net_device *dev, u32 data)
3507{
3508 struct sky2_port *sky2 = netdev_priv(dev);
3509
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003510 if (data)
3511 sky2->flags |= SKY2_FLAG_RX_CHECKSUM;
3512 else
3513 sky2->flags &= ~SKY2_FLAG_RX_CHECKSUM;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003514
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003515 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
3516 data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
3517
3518 return 0;
3519}
3520
3521static u32 sky2_get_msglevel(struct net_device *netdev)
3522{
3523 struct sky2_port *sky2 = netdev_priv(netdev);
3524 return sky2->msg_enable;
3525}
3526
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003527static int sky2_nway_reset(struct net_device *dev)
3528{
3529 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003530
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003531 if (!netif_running(dev) || !(sky2->flags & SKY2_FLAG_AUTO_SPEED))
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003532 return -EINVAL;
3533
Stephen Hemminger1b537562005-12-20 15:08:07 -08003534 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003535 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003536
3537 return 0;
3538}
3539
Stephen Hemminger793b8832005-09-14 16:06:14 -07003540static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003541{
3542 struct sky2_hw *hw = sky2->hw;
3543 unsigned port = sky2->port;
3544 int i;
3545
3546 data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003547 | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003548 data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003549 | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003550
Stephen Hemminger793b8832005-09-14 16:06:14 -07003551 for (i = 2; i < count; i++)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003552 data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
3553}
3554
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003555static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3556{
3557 struct sky2_port *sky2 = netdev_priv(netdev);
3558 sky2->msg_enable = value;
3559}
3560
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003561static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003562{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003563 switch (sset) {
3564 case ETH_SS_STATS:
3565 return ARRAY_SIZE(sky2_stats);
3566 default:
3567 return -EOPNOTSUPP;
3568 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003569}
3570
3571static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003572 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003573{
3574 struct sky2_port *sky2 = netdev_priv(dev);
3575
Stephen Hemminger793b8832005-09-14 16:06:14 -07003576 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003577}
3578
Stephen Hemminger793b8832005-09-14 16:06:14 -07003579static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003580{
3581 int i;
3582
3583 switch (stringset) {
3584 case ETH_SS_STATS:
3585 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3586 memcpy(data + i * ETH_GSTRING_LEN,
3587 sky2_stats[i].name, ETH_GSTRING_LEN);
3588 break;
3589 }
3590}
3591
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003592static int sky2_set_mac_address(struct net_device *dev, void *p)
3593{
3594 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003595 struct sky2_hw *hw = sky2->hw;
3596 unsigned port = sky2->port;
3597 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003598
3599 if (!is_valid_ether_addr(addr->sa_data))
3600 return -EADDRNOTAVAIL;
3601
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003602 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003603 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003604 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003605 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003606 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003607
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003608 /* virtual address for data */
3609 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3610
3611 /* physical address: used for pause frames */
3612 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003613
3614 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003615}
3616
Stephen Hemmingera052b522006-10-17 10:24:23 -07003617static void inline sky2_add_filter(u8 filter[8], const u8 *addr)
3618{
3619 u32 bit;
3620
3621 bit = ether_crc(ETH_ALEN, addr) & 63;
3622 filter[bit >> 3] |= 1 << (bit & 7);
3623}
3624
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003625static void sky2_set_multicast(struct net_device *dev)
3626{
3627 struct sky2_port *sky2 = netdev_priv(dev);
3628 struct sky2_hw *hw = sky2->hw;
3629 unsigned port = sky2->port;
Jiri Pirko55085902010-02-18 00:42:54 +00003630 struct dev_mc_list *list;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003631 u16 reg;
3632 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003633 int rx_pause;
3634 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003635
Stephen Hemmingera052b522006-10-17 10:24:23 -07003636 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003637 memset(filter, 0, sizeof(filter));
3638
3639 reg = gma_read16(hw, port, GM_RX_CTRL);
3640 reg |= GM_RXCR_UCF_ENA;
3641
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003642 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003643 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003644 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003645 memset(filter, 0xff, sizeof(filter));
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00003646 else if (netdev_mc_empty(dev) && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003647 reg &= ~GM_RXCR_MCF_ENA;
3648 else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003649 reg |= GM_RXCR_MCF_ENA;
3650
Stephen Hemmingera052b522006-10-17 10:24:23 -07003651 if (rx_pause)
3652 sky2_add_filter(filter, pause_mc_addr);
3653
Jiri Pirko55085902010-02-18 00:42:54 +00003654 netdev_for_each_mc_addr(list, dev)
Stephen Hemmingera052b522006-10-17 10:24:23 -07003655 sky2_add_filter(filter, list->dmi_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003656 }
3657
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003658 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003659 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003660 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003661 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003662 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003663 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003664 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003665 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003666
3667 gma_write16(hw, port, GM_RX_CTRL, reg);
3668}
3669
3670/* Can have one global because blinking is controlled by
3671 * ethtool and that is always under RTNL mutex
3672 */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003673static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003674{
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003675 struct sky2_hw *hw = sky2->hw;
3676 unsigned port = sky2->port;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003677
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003678 spin_lock_bh(&sky2->phy_lock);
3679 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3680 hw->chip_id == CHIP_ID_YUKON_EX ||
3681 hw->chip_id == CHIP_ID_YUKON_SUPR) {
3682 u16 pg;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003683 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3684 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003685
3686 switch (mode) {
3687 case MO_LED_OFF:
3688 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3689 PHY_M_LEDC_LOS_CTRL(8) |
3690 PHY_M_LEDC_INIT_CTRL(8) |
3691 PHY_M_LEDC_STA1_CTRL(8) |
3692 PHY_M_LEDC_STA0_CTRL(8));
3693 break;
3694 case MO_LED_ON:
3695 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3696 PHY_M_LEDC_LOS_CTRL(9) |
3697 PHY_M_LEDC_INIT_CTRL(9) |
3698 PHY_M_LEDC_STA1_CTRL(9) |
3699 PHY_M_LEDC_STA0_CTRL(9));
3700 break;
3701 case MO_LED_BLINK:
3702 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3703 PHY_M_LEDC_LOS_CTRL(0xa) |
3704 PHY_M_LEDC_INIT_CTRL(0xa) |
3705 PHY_M_LEDC_STA1_CTRL(0xa) |
3706 PHY_M_LEDC_STA0_CTRL(0xa));
3707 break;
3708 case MO_LED_NORM:
3709 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3710 PHY_M_LEDC_LOS_CTRL(1) |
3711 PHY_M_LEDC_INIT_CTRL(8) |
3712 PHY_M_LEDC_STA1_CTRL(7) |
3713 PHY_M_LEDC_STA0_CTRL(7));
3714 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003715
3716 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003717 } else
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04003718 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003719 PHY_M_LED_MO_DUP(mode) |
3720 PHY_M_LED_MO_10(mode) |
3721 PHY_M_LED_MO_100(mode) |
3722 PHY_M_LED_MO_1000(mode) |
3723 PHY_M_LED_MO_RX(mode) |
3724 PHY_M_LED_MO_TX(mode));
3725
3726 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003727}
3728
3729/* blink LED's for finding board */
3730static int sky2_phys_id(struct net_device *dev, u32 data)
3731{
3732 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003733 unsigned int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003734
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003735 if (data == 0)
3736 data = UINT_MAX;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003737
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003738 for (i = 0; i < data; i++) {
3739 sky2_led(sky2, MO_LED_ON);
3740 if (msleep_interruptible(500))
3741 break;
3742 sky2_led(sky2, MO_LED_OFF);
3743 if (msleep_interruptible(500))
3744 break;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003745 }
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003746 sky2_led(sky2, MO_LED_NORM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003747
3748 return 0;
3749}
3750
3751static void sky2_get_pauseparam(struct net_device *dev,
3752 struct ethtool_pauseparam *ecmd)
3753{
3754 struct sky2_port *sky2 = netdev_priv(dev);
3755
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003756 switch (sky2->flow_mode) {
3757 case FC_NONE:
3758 ecmd->tx_pause = ecmd->rx_pause = 0;
3759 break;
3760 case FC_TX:
3761 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3762 break;
3763 case FC_RX:
3764 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3765 break;
3766 case FC_BOTH:
3767 ecmd->tx_pause = ecmd->rx_pause = 1;
3768 }
3769
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003770 ecmd->autoneg = (sky2->flags & SKY2_FLAG_AUTO_PAUSE)
3771 ? AUTONEG_ENABLE : AUTONEG_DISABLE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003772}
3773
3774static int sky2_set_pauseparam(struct net_device *dev,
3775 struct ethtool_pauseparam *ecmd)
3776{
3777 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003778
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07003779 if (ecmd->autoneg == AUTONEG_ENABLE)
3780 sky2->flags |= SKY2_FLAG_AUTO_PAUSE;
3781 else
3782 sky2->flags &= ~SKY2_FLAG_AUTO_PAUSE;
3783
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003784 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003785
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003786 if (netif_running(dev))
3787 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003788
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003789 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003790}
3791
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003792static int sky2_get_coalesce(struct net_device *dev,
3793 struct ethtool_coalesce *ecmd)
3794{
3795 struct sky2_port *sky2 = netdev_priv(dev);
3796 struct sky2_hw *hw = sky2->hw;
3797
3798 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3799 ecmd->tx_coalesce_usecs = 0;
3800 else {
3801 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3802 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3803 }
3804 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3805
3806 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3807 ecmd->rx_coalesce_usecs = 0;
3808 else {
3809 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3810 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3811 }
3812 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3813
3814 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3815 ecmd->rx_coalesce_usecs_irq = 0;
3816 else {
3817 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3818 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3819 }
3820
3821 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3822
3823 return 0;
3824}
3825
3826/* Note: this affect both ports */
3827static int sky2_set_coalesce(struct net_device *dev,
3828 struct ethtool_coalesce *ecmd)
3829{
3830 struct sky2_port *sky2 = netdev_priv(dev);
3831 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003832 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003833
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003834 if (ecmd->tx_coalesce_usecs > tmax ||
3835 ecmd->rx_coalesce_usecs > tmax ||
3836 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003837 return -EINVAL;
3838
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003839 if (ecmd->tx_max_coalesced_frames >= sky2->tx_ring_size-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003840 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003841 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003842 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003843 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003844 return -EINVAL;
3845
3846 if (ecmd->tx_coalesce_usecs == 0)
3847 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3848 else {
3849 sky2_write32(hw, STAT_TX_TIMER_INI,
3850 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3851 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3852 }
3853 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3854
3855 if (ecmd->rx_coalesce_usecs == 0)
3856 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3857 else {
3858 sky2_write32(hw, STAT_LEV_TIMER_INI,
3859 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3860 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3861 }
3862 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3863
3864 if (ecmd->rx_coalesce_usecs_irq == 0)
3865 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3866 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003867 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003868 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3869 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3870 }
3871 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3872 return 0;
3873}
3874
Stephen Hemminger793b8832005-09-14 16:06:14 -07003875static void sky2_get_ringparam(struct net_device *dev,
3876 struct ethtool_ringparam *ering)
3877{
3878 struct sky2_port *sky2 = netdev_priv(dev);
3879
3880 ering->rx_max_pending = RX_MAX_PENDING;
3881 ering->rx_mini_max_pending = 0;
3882 ering->rx_jumbo_max_pending = 0;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003883 ering->tx_max_pending = TX_MAX_PENDING;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003884
3885 ering->rx_pending = sky2->rx_pending;
3886 ering->rx_mini_pending = 0;
3887 ering->rx_jumbo_pending = 0;
3888 ering->tx_pending = sky2->tx_pending;
3889}
3890
3891static int sky2_set_ringparam(struct net_device *dev,
3892 struct ethtool_ringparam *ering)
3893{
3894 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003895
3896 if (ering->rx_pending > RX_MAX_PENDING ||
3897 ering->rx_pending < 8 ||
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003898 ering->tx_pending < TX_MIN_PENDING ||
3899 ering->tx_pending > TX_MAX_PENDING)
Stephen Hemminger793b8832005-09-14 16:06:14 -07003900 return -EINVAL;
3901
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003902 sky2_detach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003903
3904 sky2->rx_pending = ering->rx_pending;
3905 sky2->tx_pending = ering->tx_pending;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00003906 sky2->tx_ring_size = roundup_pow_of_two(sky2->tx_pending+1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003907
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07003908 return sky2_reattach(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003909}
3910
Stephen Hemminger793b8832005-09-14 16:06:14 -07003911static int sky2_get_regs_len(struct net_device *dev)
3912{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003913 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003914}
3915
Mike McCormackc32bbff2009-12-31 00:49:43 +00003916static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b)
3917{
3918 /* This complicated switch statement is to make sure and
3919 * only access regions that are unreserved.
3920 * Some blocks are only valid on dual port cards.
3921 */
3922 switch (b) {
3923 /* second port */
3924 case 5: /* Tx Arbiter 2 */
3925 case 9: /* RX2 */
3926 case 14 ... 15: /* TX2 */
3927 case 17: case 19: /* Ram Buffer 2 */
3928 case 22 ... 23: /* Tx Ram Buffer 2 */
3929 case 25: /* Rx MAC Fifo 1 */
3930 case 27: /* Tx MAC Fifo 2 */
3931 case 31: /* GPHY 2 */
3932 case 40 ... 47: /* Pattern Ram 2 */
3933 case 52: case 54: /* TCP Segmentation 2 */
3934 case 112 ... 116: /* GMAC 2 */
3935 return hw->ports > 1;
3936
3937 case 0: /* Control */
3938 case 2: /* Mac address */
3939 case 4: /* Tx Arbiter 1 */
3940 case 7: /* PCI express reg */
3941 case 8: /* RX1 */
3942 case 12 ... 13: /* TX1 */
3943 case 16: case 18:/* Rx Ram Buffer 1 */
3944 case 20 ... 21: /* Tx Ram Buffer 1 */
3945 case 24: /* Rx MAC Fifo 1 */
3946 case 26: /* Tx MAC Fifo 1 */
3947 case 28 ... 29: /* Descriptor and status unit */
3948 case 30: /* GPHY 1*/
3949 case 32 ... 39: /* Pattern Ram 1 */
3950 case 48: case 50: /* TCP Segmentation 1 */
3951 case 56 ... 60: /* PCI space */
3952 case 80 ... 84: /* GMAC 1 */
3953 return 1;
3954
3955 default:
3956 return 0;
3957 }
3958}
3959
Stephen Hemminger793b8832005-09-14 16:06:14 -07003960/*
3961 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003962 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07003963 */
3964static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
3965 void *p)
3966{
3967 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003968 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003969 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003970
3971 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003972
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003973 for (b = 0; b < 128; b++) {
Mike McCormackc32bbff2009-12-31 00:49:43 +00003974 /* skip poisonous diagnostic ram region in block 3 */
3975 if (b == 3)
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003976 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
Mike McCormackc32bbff2009-12-31 00:49:43 +00003977 else if (sky2_reg_access_ok(sky2->hw, b))
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003978 memcpy_fromio(p, io, 128);
Mike McCormackc32bbff2009-12-31 00:49:43 +00003979 else
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003980 memset(p, 0, 128);
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003981
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003982 p += 128;
3983 io += 128;
3984 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003985}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003986
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003987/* In order to do Jumbo packets on these chips, need to turn off the
3988 * transmit store/forward. Therefore checksum offload won't work.
3989 */
3990static int no_tx_offload(struct net_device *dev)
3991{
3992 const struct sky2_port *sky2 = netdev_priv(dev);
3993 const struct sky2_hw *hw = sky2->hw;
3994
Stephen Hemminger69161612007-06-04 17:23:26 -07003995 return dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003996}
3997
3998static int sky2_set_tx_csum(struct net_device *dev, u32 data)
3999{
4000 if (data && no_tx_offload(dev))
4001 return -EINVAL;
4002
4003 return ethtool_op_set_tx_csum(dev, data);
4004}
4005
4006
4007static int sky2_set_tso(struct net_device *dev, u32 data)
4008{
4009 if (data && no_tx_offload(dev))
4010 return -EINVAL;
4011
4012 return ethtool_op_set_tso(dev, data);
4013}
4014
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004015static int sky2_get_eeprom_len(struct net_device *dev)
4016{
4017 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004018 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004019 u16 reg2;
4020
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004021 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004022 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4023}
4024
Stephen Hemminger14132352008-08-27 20:46:26 -07004025static int sky2_vpd_wait(const struct sky2_hw *hw, int cap, u16 busy)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004026{
Stephen Hemminger14132352008-08-27 20:46:26 -07004027 unsigned long start = jiffies;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004028
Stephen Hemminger14132352008-08-27 20:46:26 -07004029 while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) {
4030 /* Can take up to 10.6 ms for write */
4031 if (time_after(jiffies, start + HZ/4)) {
Joe Perchesada1db52010-02-17 15:01:59 +00004032 dev_err(&hw->pdev->dev, "VPD cycle timed out\n");
Stephen Hemminger14132352008-08-27 20:46:26 -07004033 return -ETIMEDOUT;
4034 }
4035 mdelay(1);
4036 }
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004037
Stephen Hemminger14132352008-08-27 20:46:26 -07004038 return 0;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004039}
4040
Stephen Hemminger14132352008-08-27 20:46:26 -07004041static int sky2_vpd_read(struct sky2_hw *hw, int cap, void *data,
4042 u16 offset, size_t length)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004043{
Stephen Hemminger14132352008-08-27 20:46:26 -07004044 int rc = 0;
4045
4046 while (length > 0) {
4047 u32 val;
4048
4049 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
4050 rc = sky2_vpd_wait(hw, cap, 0);
4051 if (rc)
4052 break;
4053
4054 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
4055
4056 memcpy(data, &val, min(sizeof(val), length));
4057 offset += sizeof(u32);
4058 data += sizeof(u32);
4059 length -= sizeof(u32);
4060 }
4061
4062 return rc;
4063}
4064
4065static int sky2_vpd_write(struct sky2_hw *hw, int cap, const void *data,
4066 u16 offset, unsigned int length)
4067{
4068 unsigned int i;
4069 int rc = 0;
4070
4071 for (i = 0; i < length; i += sizeof(u32)) {
4072 u32 val = *(u32 *)(data + i);
4073
4074 sky2_pci_write32(hw, cap + PCI_VPD_DATA, val);
4075 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
4076
4077 rc = sky2_vpd_wait(hw, cap, PCI_VPD_ADDR_F);
4078 if (rc)
4079 break;
4080 }
4081 return rc;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004082}
4083
4084static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4085 u8 *data)
4086{
4087 struct sky2_port *sky2 = netdev_priv(dev);
4088 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004089
4090 if (!cap)
4091 return -EINVAL;
4092
4093 eeprom->magic = SKY2_EEPROM_MAGIC;
4094
Stephen Hemminger14132352008-08-27 20:46:26 -07004095 return sky2_vpd_read(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004096}
4097
4098static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
4099 u8 *data)
4100{
4101 struct sky2_port *sky2 = netdev_priv(dev);
4102 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004103
4104 if (!cap)
4105 return -EINVAL;
4106
4107 if (eeprom->magic != SKY2_EEPROM_MAGIC)
4108 return -EINVAL;
4109
Stephen Hemminger14132352008-08-27 20:46:26 -07004110 /* Partial writes not supported */
4111 if ((eeprom->offset & 3) || (eeprom->len & 3))
4112 return -EINVAL;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004113
Stephen Hemminger14132352008-08-27 20:46:26 -07004114 return sky2_vpd_write(sky2->hw, cap, data, eeprom->offset, eeprom->len);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004115}
4116
4117
Jeff Garzik7282d492006-09-13 14:30:00 -04004118static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004119 .get_settings = sky2_get_settings,
4120 .set_settings = sky2_set_settings,
4121 .get_drvinfo = sky2_get_drvinfo,
4122 .get_wol = sky2_get_wol,
4123 .set_wol = sky2_set_wol,
4124 .get_msglevel = sky2_get_msglevel,
4125 .set_msglevel = sky2_set_msglevel,
4126 .nway_reset = sky2_nway_reset,
4127 .get_regs_len = sky2_get_regs_len,
4128 .get_regs = sky2_get_regs,
4129 .get_link = ethtool_op_get_link,
4130 .get_eeprom_len = sky2_get_eeprom_len,
4131 .get_eeprom = sky2_get_eeprom,
4132 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004133 .set_sg = ethtool_op_set_sg,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004134 .set_tx_csum = sky2_set_tx_csum,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004135 .set_tso = sky2_set_tso,
4136 .get_rx_csum = sky2_get_rx_csum,
4137 .set_rx_csum = sky2_set_rx_csum,
4138 .get_strings = sky2_get_strings,
4139 .get_coalesce = sky2_get_coalesce,
4140 .set_coalesce = sky2_set_coalesce,
4141 .get_ringparam = sky2_get_ringparam,
4142 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004143 .get_pauseparam = sky2_get_pauseparam,
4144 .set_pauseparam = sky2_set_pauseparam,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07004145 .phys_id = sky2_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004146 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004147 .get_ethtool_stats = sky2_get_ethtool_stats,
4148};
4149
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004150#ifdef CONFIG_SKY2_DEBUG
4151
4152static struct dentry *sky2_debug;
4153
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004154
4155/*
4156 * Read and parse the first part of Vital Product Data
4157 */
4158#define VPD_SIZE 128
4159#define VPD_MAGIC 0x82
4160
4161static const struct vpd_tag {
4162 char tag[2];
4163 char *label;
4164} vpd_tags[] = {
4165 { "PN", "Part Number" },
4166 { "EC", "Engineering Level" },
4167 { "MN", "Manufacturer" },
4168 { "SN", "Serial Number" },
4169 { "YA", "Asset Tag" },
4170 { "VL", "First Error Log Message" },
4171 { "VF", "Second Error Log Message" },
4172 { "VB", "Boot Agent ROM Configuration" },
4173 { "VE", "EFI UNDI Configuration" },
4174};
4175
4176static void sky2_show_vpd(struct seq_file *seq, struct sky2_hw *hw)
4177{
4178 size_t vpd_size;
4179 loff_t offs;
4180 u8 len;
4181 unsigned char *buf;
4182 u16 reg2;
4183
4184 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
4185 vpd_size = 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
4186
4187 seq_printf(seq, "%s Product Data\n", pci_name(hw->pdev));
4188 buf = kmalloc(vpd_size, GFP_KERNEL);
4189 if (!buf) {
4190 seq_puts(seq, "no memory!\n");
4191 return;
4192 }
4193
4194 if (pci_read_vpd(hw->pdev, 0, vpd_size, buf) < 0) {
4195 seq_puts(seq, "VPD read failed\n");
4196 goto out;
4197 }
4198
4199 if (buf[0] != VPD_MAGIC) {
4200 seq_printf(seq, "VPD tag mismatch: %#x\n", buf[0]);
4201 goto out;
4202 }
4203 len = buf[1];
4204 if (len == 0 || len > vpd_size - 4) {
4205 seq_printf(seq, "Invalid id length: %d\n", len);
4206 goto out;
4207 }
4208
4209 seq_printf(seq, "%.*s\n", len, buf + 3);
4210 offs = len + 3;
4211
4212 while (offs < vpd_size - 4) {
4213 int i;
4214
4215 if (!memcmp("RW", buf + offs, 2)) /* end marker */
4216 break;
4217 len = buf[offs + 2];
4218 if (offs + len + 3 >= vpd_size)
4219 break;
4220
4221 for (i = 0; i < ARRAY_SIZE(vpd_tags); i++) {
4222 if (!memcmp(vpd_tags[i].tag, buf + offs, 2)) {
4223 seq_printf(seq, " %s: %.*s\n",
4224 vpd_tags[i].label, len, buf + offs + 3);
4225 break;
4226 }
4227 }
4228 offs += len + 3;
4229 }
4230out:
4231 kfree(buf);
4232}
4233
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004234static int sky2_debug_show(struct seq_file *seq, void *v)
4235{
4236 struct net_device *dev = seq->private;
4237 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004238 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004239 unsigned port = sky2->port;
4240 unsigned idx, last;
4241 int sop;
4242
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004243 sky2_show_vpd(seq, hw);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004244
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004245 seq_printf(seq, "\nIRQ src=%x mask=%x control=%x\n",
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004246 sky2_read32(hw, B0_ISRC),
4247 sky2_read32(hw, B0_IMSK),
4248 sky2_read32(hw, B0_Y2_SP_ICR));
4249
Stephen Hemmingere4c2abe2009-02-03 11:27:29 +00004250 if (!netif_running(dev)) {
4251 seq_printf(seq, "network not running\n");
4252 return 0;
4253 }
4254
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004255 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004256 last = sky2_read16(hw, STAT_PUT_IDX);
4257
4258 if (hw->st_idx == last)
4259 seq_puts(seq, "Status ring (empty)\n");
4260 else {
4261 seq_puts(seq, "Status ring\n");
4262 for (idx = hw->st_idx; idx != last && idx < STATUS_RING_SIZE;
4263 idx = RING_NEXT(idx, STATUS_RING_SIZE)) {
4264 const struct sky2_status_le *le = hw->st_le + idx;
4265 seq_printf(seq, "[%d] %#x %d %#x\n",
4266 idx, le->opcode, le->length, le->status);
4267 }
4268 seq_puts(seq, "\n");
4269 }
4270
4271 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
4272 sky2->tx_cons, sky2->tx_prod,
4273 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
4274 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
4275
4276 /* Dump contents of tx ring */
4277 sop = 1;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004278 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < sky2->tx_ring_size;
4279 idx = RING_NEXT(idx, sky2->tx_ring_size)) {
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004280 const struct sky2_tx_le *le = sky2->tx_le + idx;
4281 u32 a = le32_to_cpu(le->addr);
4282
4283 if (sop)
4284 seq_printf(seq, "%u:", idx);
4285 sop = 0;
4286
4287 switch(le->opcode & ~HW_OWNER) {
4288 case OP_ADDR64:
4289 seq_printf(seq, " %#x:", a);
4290 break;
4291 case OP_LRGLEN:
4292 seq_printf(seq, " mtu=%d", a);
4293 break;
4294 case OP_VLAN:
4295 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
4296 break;
4297 case OP_TCPLISW:
4298 seq_printf(seq, " csum=%#x", a);
4299 break;
4300 case OP_LARGESEND:
4301 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
4302 break;
4303 case OP_PACKET:
4304 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
4305 break;
4306 case OP_BUFFER:
4307 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
4308 break;
4309 default:
4310 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
4311 a, le16_to_cpu(le->length));
4312 }
4313
4314 if (le->ctrl & EOP) {
4315 seq_putc(seq, '\n');
4316 sop = 1;
4317 }
4318 }
4319
4320 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
4321 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
Mike McCormackc409c342009-07-21 14:51:20 +00004322 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004323 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
4324
David S. Millerd1d08d12008-01-07 20:53:33 -08004325 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07004326 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004327 return 0;
4328}
4329
4330static int sky2_debug_open(struct inode *inode, struct file *file)
4331{
4332 return single_open(file, sky2_debug_show, inode->i_private);
4333}
4334
4335static const struct file_operations sky2_debug_fops = {
4336 .owner = THIS_MODULE,
4337 .open = sky2_debug_open,
4338 .read = seq_read,
4339 .llseek = seq_lseek,
4340 .release = single_release,
4341};
4342
4343/*
4344 * Use network device events to create/remove/rename
4345 * debugfs file entries
4346 */
4347static int sky2_device_event(struct notifier_block *unused,
4348 unsigned long event, void *ptr)
4349{
4350 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004351 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004352
Stephen Hemminger1436b302008-11-19 21:59:54 -08004353 if (dev->netdev_ops->ndo_open != sky2_up || !sky2_debug)
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004354 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004355
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004356 switch(event) {
4357 case NETDEV_CHANGENAME:
4358 if (sky2->debugfs) {
4359 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
4360 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004361 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004362 break;
4363
4364 case NETDEV_GOING_DOWN:
4365 if (sky2->debugfs) {
Joe Perchesada1db52010-02-17 15:01:59 +00004366 netdev_printk(KERN_DEBUG, dev, "remove debugfs\n");
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07004367 debugfs_remove(sky2->debugfs);
4368 sky2->debugfs = NULL;
4369 }
4370 break;
4371
4372 case NETDEV_UP:
4373 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
4374 sky2_debug, dev,
4375 &sky2_debug_fops);
4376 if (IS_ERR(sky2->debugfs))
4377 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004378 }
4379
4380 return NOTIFY_DONE;
4381}
4382
4383static struct notifier_block sky2_notifier = {
4384 .notifier_call = sky2_device_event,
4385};
4386
4387
4388static __init void sky2_debug_init(void)
4389{
4390 struct dentry *ent;
4391
4392 ent = debugfs_create_dir("sky2", NULL);
4393 if (!ent || IS_ERR(ent))
4394 return;
4395
4396 sky2_debug = ent;
4397 register_netdevice_notifier(&sky2_notifier);
4398}
4399
4400static __exit void sky2_debug_cleanup(void)
4401{
4402 if (sky2_debug) {
4403 unregister_netdevice_notifier(&sky2_notifier);
4404 debugfs_remove(sky2_debug);
4405 sky2_debug = NULL;
4406 }
4407}
4408
4409#else
4410#define sky2_debug_init()
4411#define sky2_debug_cleanup()
4412#endif
4413
Stephen Hemminger1436b302008-11-19 21:59:54 -08004414/* Two copies of network device operations to handle special case of
4415 not allowing netpoll on second port */
4416static const struct net_device_ops sky2_netdev_ops[2] = {
4417 {
4418 .ndo_open = sky2_up,
4419 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004420 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004421 .ndo_do_ioctl = sky2_ioctl,
4422 .ndo_validate_addr = eth_validate_addr,
4423 .ndo_set_mac_address = sky2_set_mac_address,
4424 .ndo_set_multicast_list = sky2_set_multicast,
4425 .ndo_change_mtu = sky2_change_mtu,
4426 .ndo_tx_timeout = sky2_tx_timeout,
4427#ifdef SKY2_VLAN_TAG_USED
4428 .ndo_vlan_rx_register = sky2_vlan_rx_register,
4429#endif
4430#ifdef CONFIG_NET_POLL_CONTROLLER
4431 .ndo_poll_controller = sky2_netpoll,
4432#endif
4433 },
4434 {
4435 .ndo_open = sky2_up,
4436 .ndo_stop = sky2_down,
Stephen Hemminger00829822008-11-20 20:14:53 -08004437 .ndo_start_xmit = sky2_xmit_frame,
Stephen Hemminger1436b302008-11-19 21:59:54 -08004438 .ndo_do_ioctl = sky2_ioctl,
4439 .ndo_validate_addr = eth_validate_addr,
4440 .ndo_set_mac_address = sky2_set_mac_address,
4441 .ndo_set_multicast_list = sky2_set_multicast,
4442 .ndo_change_mtu = sky2_change_mtu,
4443 .ndo_tx_timeout = sky2_tx_timeout,
4444#ifdef SKY2_VLAN_TAG_USED
4445 .ndo_vlan_rx_register = sky2_vlan_rx_register,
4446#endif
4447 },
4448};
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004449
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004450/* Initialize network device */
4451static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08004452 unsigned port,
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004453 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004454{
4455 struct sky2_port *sky2;
4456 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
4457
4458 if (!dev) {
Joe Perches898eb712007-10-18 03:06:30 -07004459 dev_err(&hw->pdev->dev, "etherdev alloc failed\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004460 return NULL;
4461 }
4462
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004463 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08004464 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004465 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004466 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemminger1436b302008-11-19 21:59:54 -08004467 dev->netdev_ops = &sky2_netdev_ops[port];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004468
4469 sky2 = netdev_priv(dev);
4470 sky2->netdev = dev;
4471 sky2->hw = hw;
4472 sky2->msg_enable = netif_msg_init(debug, default_msg);
4473
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004474 /* Auto speed and flow control */
Stephen Hemminger0ea065e2009-08-14 15:36:41 -07004475 sky2->flags = SKY2_FLAG_AUTO_SPEED | SKY2_FLAG_AUTO_PAUSE;
4476 if (hw->chip_id != CHIP_ID_YUKON_XL)
4477 sky2->flags |= SKY2_FLAG_RX_CHECKSUM;
4478
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004479 sky2->flow_mode = FC_BOTH;
4480
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004481 sky2->duplex = -1;
4482 sky2->speed = -1;
4483 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004484 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08004485
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08004486 spin_lock_init(&sky2->phy_lock);
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004487
Stephen Hemminger793b8832005-09-14 16:06:14 -07004488 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemmingeree5f68f2009-08-18 15:17:08 +00004489 sky2->tx_ring_size = roundup_pow_of_two(TX_DEF_PENDING+1);
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004490 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004491
4492 hw->dev[port] = dev;
4493
4494 sky2->port = port;
4495
Stephen Hemminger4a50a872007-02-06 10:45:41 -08004496 dev->features |= NETIF_F_TSO | NETIF_F_IP_CSUM | NETIF_F_SG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004497 if (highmem)
4498 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004499
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004500#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004501 /* The workaround for FE+ status conflicts with VLAN tag detection. */
4502 if (!(sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
4503 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0)) {
4504 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004505 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004506#endif
4507
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004508 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004509 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07004510 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004511
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004512 return dev;
4513}
4514
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004515static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004516{
4517 const struct sky2_port *sky2 = netdev_priv(dev);
4518
Joe Perches6c35aba2010-02-15 08:34:21 +00004519 netif_info(sky2, probe, dev, "addr %pM\n", dev->dev_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004520}
4521
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004522/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004523static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004524{
4525 struct sky2_hw *hw = dev_id;
4526 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4527
4528 if (status == 0)
4529 return IRQ_NONE;
4530
4531 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004532 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004533 wake_up(&hw->msi_wait);
4534 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4535 }
4536 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4537
4538 return IRQ_HANDLED;
4539}
4540
4541/* Test interrupt path by forcing a a software IRQ */
4542static int __devinit sky2_test_msi(struct sky2_hw *hw)
4543{
4544 struct pci_dev *pdev = hw->pdev;
4545 int err;
4546
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004547 init_waitqueue_head (&hw->msi_wait);
4548
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004549 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4550
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004551 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004552 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004553 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004554 return err;
4555 }
4556
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004557 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004558 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004559
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004560 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004561
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004562 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004563 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004564 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4565 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004566
4567 err = -EOPNOTSUPP;
4568 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4569 }
4570
4571 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004572 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004573
4574 free_irq(pdev->irq, hw);
4575
4576 return err;
4577}
4578
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004579/* This driver supports yukon2 chipset only */
4580static const char *sky2_name(u8 chipid, char *buf, int sz)
4581{
4582 const char *name[] = {
4583 "XL", /* 0xb3 */
4584 "EC Ultra", /* 0xb4 */
4585 "Extreme", /* 0xb5 */
4586 "EC", /* 0xb6 */
4587 "FE", /* 0xb7 */
4588 "FE+", /* 0xb8 */
4589 "Supreme", /* 0xb9 */
Stephen Hemminger0ce8b982008-06-17 09:04:27 -07004590 "UL 2", /* 0xba */
Stephen Hemminger0f5aac72009-10-29 06:37:09 +00004591 "Unknown", /* 0xbb */
4592 "Optima", /* 0xbc */
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004593 };
4594
stephen hemmingerdae3a512009-12-14 08:33:47 +00004595 if (chipid >= CHIP_ID_YUKON_XL && chipid <= CHIP_ID_YUKON_OPT)
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004596 strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz);
4597 else
4598 snprintf(buf, sz, "(chip %#x)", chipid);
4599 return buf;
4600}
4601
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004602static int __devinit sky2_probe(struct pci_dev *pdev,
4603 const struct pci_device_id *ent)
4604{
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004605 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004606 struct sky2_hw *hw;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004607 int err, using_dac = 0, wol_default;
Stephen Hemminger38345072009-02-03 11:27:30 +00004608 u32 reg;
Stephen Hemmingerc7127a32008-06-17 09:04:25 -07004609 char buf1[16];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004610
Stephen Hemminger793b8832005-09-14 16:06:14 -07004611 err = pci_enable_device(pdev);
4612 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004613 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004614 goto err_out;
4615 }
4616
Stephen Hemminger6cc90a52009-06-11 07:03:47 +00004617 /* Get configuration information
4618 * Note: only regular PCI config access once to test for HW issues
4619 * other PCI access through shared memory for speed and to
4620 * avoid MMCONFIG problems.
4621 */
4622 err = pci_read_config_dword(pdev, PCI_DEV_REG2, &reg);
4623 if (err) {
4624 dev_err(&pdev->dev, "PCI read config failed\n");
4625 goto err_out;
4626 }
4627
4628 if (~reg == 0) {
4629 dev_err(&pdev->dev, "PCI configuration read error\n");
4630 goto err_out;
4631 }
4632
Stephen Hemminger793b8832005-09-14 16:06:14 -07004633 err = pci_request_regions(pdev, DRV_NAME);
4634 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004635 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004636 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004637 }
4638
4639 pci_set_master(pdev);
4640
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004641 if (sizeof(dma_addr_t) > sizeof(u32) &&
Yang Hongyang6a355282009-04-06 19:01:13 -07004642 !(err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))) {
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004643 using_dac = 1;
Yang Hongyang6a355282009-04-06 19:01:13 -07004644 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004645 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004646 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4647 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004648 goto err_out_free_regions;
4649 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004650 } else {
Yang Hongyang284901a2009-04-06 19:01:15 -07004651 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004652 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004653 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004654 goto err_out_free_regions;
4655 }
4656 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004657
Stephen Hemminger38345072009-02-03 11:27:30 +00004658
4659#ifdef __BIG_ENDIAN
4660 /* The sk98lin vendor driver uses hardware byte swapping but
4661 * this driver uses software swapping.
4662 */
4663 reg &= ~PCI_REV_DESC;
4664 err = pci_write_config_dword(pdev,PCI_DEV_REG2, reg);
4665 if (err) {
4666 dev_err(&pdev->dev, "PCI write config failed\n");
4667 goto err_out_free_regions;
4668 }
4669#endif
4670
Rafael J. Wysocki9d731d72008-10-12 20:59:48 -07004671 wol_default = device_may_wakeup(&pdev->dev) ? WAKE_MAGIC : 0;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004672
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004673 err = -ENOMEM;
Stephen Hemminger66466792009-10-01 07:11:46 +00004674
4675 hw = kzalloc(sizeof(*hw) + strlen(DRV_NAME "@pci:")
4676 + strlen(pci_name(pdev)) + 1, GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004677 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004678 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004679 goto err_out_free_regions;
4680 }
4681
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004682 hw->pdev = pdev;
Stephen Hemminger66466792009-10-01 07:11:46 +00004683 sprintf(hw->irq_name, DRV_NAME "@pci:%s", pci_name(pdev));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004684
4685 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4686 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004687 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004688 goto err_out_free_hw;
4689 }
4690
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004691 /* ring for status responses */
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004692 hw->st_le = pci_alloc_consistent(pdev, STATUS_LE_BYTES, &hw->st_dma);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004693 if (!hw->st_le)
4694 goto err_out_iounmap;
4695
Stephen Hemmingere3173832007-02-06 10:45:39 -08004696 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004697 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004698 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004699
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004700 dev_info(&pdev->dev, "Yukon-2 %s chip revision %d\n",
4701 sky2_name(hw->chip_id, buf1, sizeof(buf1)), hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004702
Stephen Hemmingere3173832007-02-06 10:45:39 -08004703 sky2_reset(hw);
4704
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004705 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004706 if (!dev) {
4707 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004708 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004709 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004710
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004711 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4712 err = sky2_test_msi(hw);
4713 if (err == -EOPNOTSUPP)
4714 pci_disable_msi(pdev);
4715 else if (err)
4716 goto err_out_free_netdev;
4717 }
4718
Stephen Hemminger793b8832005-09-14 16:06:14 -07004719 err = register_netdev(dev);
4720 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004721 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004722 goto err_out_free_netdev;
4723 }
4724
Brandon Philips33cb7d32009-10-29 13:58:07 +00004725 netif_carrier_off(dev);
4726
Stephen Hemminger6de16232007-10-17 13:26:42 -07004727 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4728
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004729 err = request_irq(pdev->irq, sky2_intr,
4730 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemminger66466792009-10-01 07:11:46 +00004731 hw->irq_name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004732 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004733 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004734 goto err_out_unregister;
4735 }
4736 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004737 napi_enable(&hw->napi);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004738
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004739 sky2_show_addr(dev);
4740
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004741 if (hw->ports > 1) {
4742 struct net_device *dev1;
4743
Stephen Hemmingerca519272009-09-14 06:22:29 +00004744 err = -ENOMEM;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004745 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerca519272009-09-14 06:22:29 +00004746 if (dev1 && (err = register_netdev(dev1)) == 0)
4747 sky2_show_addr(dev1);
4748 else {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004749 dev_warn(&pdev->dev,
4750 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004751 hw->dev[1] = NULL;
Stephen Hemmingerca519272009-09-14 06:22:29 +00004752 hw->ports = 1;
4753 if (dev1)
4754 free_netdev(dev1);
4755 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004756 }
4757
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004758 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004759 INIT_WORK(&hw->restart_work, sky2_restart);
4760
Stephen Hemminger793b8832005-09-14 16:06:14 -07004761 pci_set_drvdata(pdev, hw);
Rafael J. Wysocki1ae861e2009-12-31 12:15:54 +01004762 pdev->d3_delay = 150;
Stephen Hemminger793b8832005-09-14 16:06:14 -07004763
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004764 return 0;
4765
Stephen Hemminger793b8832005-09-14 16:06:14 -07004766err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004767 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004768 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004769 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004770err_out_free_netdev:
4771 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004772err_out_free_pci:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004773 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004774 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004775err_out_iounmap:
4776 iounmap(hw->regs);
4777err_out_free_hw:
4778 kfree(hw);
4779err_out_free_regions:
4780 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004781err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004782 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004783err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004784 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004785 return err;
4786}
4787
4788static void __devexit sky2_remove(struct pci_dev *pdev)
4789{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004790 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004791 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004792
Stephen Hemminger793b8832005-09-14 16:06:14 -07004793 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004794 return;
4795
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004796 del_timer_sync(&hw->watchdog_timer);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004797 cancel_work_sync(&hw->restart_work);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004798
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004799 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004800 unregister_netdev(hw->dev[i]);
Stephen Hemminger81906792007-02-15 16:40:33 -08004801
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004802 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004803
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004804 sky2_power_aux(hw);
4805
Stephen Hemminger793b8832005-09-14 16:06:14 -07004806 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004807 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004808
4809 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004810 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004811 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004812 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004813 pci_release_regions(pdev);
4814 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004815
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004816 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004817 free_netdev(hw->dev[i]);
4818
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004819 iounmap(hw->regs);
4820 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004821
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004822 pci_set_drvdata(pdev, NULL);
4823}
4824
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004825static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
4826{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004827 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004828 int i, wol = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004829
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004830 if (!hw)
4831 return 0;
4832
Stephen Hemminger063a0b32008-04-02 09:03:23 -07004833 del_timer_sync(&hw->watchdog_timer);
4834 cancel_work_sync(&hw->restart_work);
4835
Stephen Hemminger19720732009-08-14 05:15:16 +00004836 rtnl_lock();
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004837 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004838 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08004839 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004840
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004841 sky2_detach(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004842
4843 if (sky2->wol)
4844 sky2_wol_init(sky2);
4845
4846 wol |= sky2->wol;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004847 }
4848
stephen hemminger5f8ae5c2010-02-12 06:57:59 +00004849 device_set_wakeup_enable(&pdev->dev, wol != 0);
4850
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004851 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004852 napi_disable(&hw->napi);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004853 sky2_power_aux(hw);
Stephen Hemminger19720732009-08-14 05:15:16 +00004854 rtnl_unlock();
Stephen Hemmingere3173832007-02-06 10:45:39 -08004855
Linus Torvaldsd374c1c2006-06-12 12:53:27 -07004856 pci_save_state(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004857 pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004858 pci_set_power_state(pdev, pci_choose_state(pdev, state));
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004859
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09004860 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004861}
4862
stephen hemminger5f8ae5c2010-02-12 06:57:59 +00004863#ifdef CONFIG_PM
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004864static int sky2_resume(struct pci_dev *pdev)
4865{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004866 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004867 int i, err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004868
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004869 if (!hw)
4870 return 0;
4871
Mike McCormack2a400182010-03-13 12:24:18 -08004872 rtnl_lock();
Stephen Hemmingerf71eb1a2008-08-04 13:33:37 -07004873 err = pci_set_power_state(pdev, PCI_D0);
4874 if (err)
4875 goto out;
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004876
4877 err = pci_restore_state(pdev);
4878 if (err)
4879 goto out;
4880
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004881 pci_enable_wake(pdev, PCI_D0, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004882
4883 /* Re-enable all clocks */
stephen hemmingera0db28b2010-02-07 06:23:53 +00004884 err = pci_write_config_dword(pdev, PCI_DEV_REG3, 0);
4885 if (err) {
4886 dev_err(&pdev->dev, "PCI write config failed\n");
4887 goto out;
4888 }
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004889
Stephen Hemmingere3173832007-02-06 10:45:39 -08004890 sky2_reset(hw);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004891 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004892 napi_enable(&hw->napi);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004893
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004894 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004895 err = sky2_reattach(hw->dev[i]);
4896 if (err)
4897 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004898 }
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004899 rtnl_unlock();
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004900
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004901 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004902out:
Stephen Hemmingeraf18d8b2009-08-14 15:31:25 -07004903 rtnl_unlock();
4904
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004905 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004906 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004907 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004908}
4909#endif
4910
Stephen Hemmingere3173832007-02-06 10:45:39 -08004911static void sky2_shutdown(struct pci_dev *pdev)
4912{
stephen hemminger5f8ae5c2010-02-12 06:57:59 +00004913 sky2_suspend(pdev, PMSG_SUSPEND);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004914}
4915
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004916static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07004917 .name = DRV_NAME,
4918 .id_table = sky2_id_table,
4919 .probe = sky2_probe,
4920 .remove = __devexit_p(sky2_remove),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004921#ifdef CONFIG_PM
Stephen Hemminger793b8832005-09-14 16:06:14 -07004922 .suspend = sky2_suspend,
4923 .resume = sky2_resume,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004924#endif
Stephen Hemmingere3173832007-02-06 10:45:39 -08004925 .shutdown = sky2_shutdown,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004926};
4927
4928static int __init sky2_init_module(void)
4929{
Joe Perchesada1db52010-02-17 15:01:59 +00004930 pr_info("driver version " DRV_VERSION "\n");
Stephen Hemmingerc844d482008-08-27 20:48:23 -07004931
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004932 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08004933 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004934}
4935
4936static void __exit sky2_cleanup_module(void)
4937{
4938 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004939 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004940}
4941
4942module_init(sky2_init_module);
4943module_exit(sky2_cleanup_module);
4944
4945MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe632007-01-23 11:38:57 -08004946MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004947MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08004948MODULE_VERSION(DRV_VERSION);