blob: 54c662690f65482b613954918ce499121a84ea61 [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Stephen Hemminger793b8832005-09-14 16:06:14 -070025#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070026#include <linux/kernel.h>
27#include <linux/version.h>
28#include <linux/module.h>
29#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080030#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070031#include <linux/etherdevice.h>
32#include <linux/ethtool.h>
33#include <linux/pci.h>
34#include <linux/ip.h>
Arnaldo Carvalho de Meloc9bdd4b2007-03-12 20:09:15 -030035#include <net/ip.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070036#include <linux/tcp.h>
37#include <linux/in.h>
38#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080039#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070040#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080041#include <linux/prefetch.h>
Stephen Hemminger3cf26752007-07-09 15:33:35 -070042#include <linux/debugfs.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080043#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070044
45#include <asm/irq.h>
46
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070047#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
48#define SKY2_VLAN_TAG_USED 1
49#endif
50
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070051#include "sky2.h"
52
53#define DRV_NAME "sky2"
Stephen Hemmingerbcc52892008-01-10 16:14:15 -080054#define DRV_VERSION "1.21"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070055#define PFX DRV_NAME " "
56
57/*
58 * The Yukon II chipset takes 64 bit command blocks (called list elements)
59 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070060 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070061 */
62
Stephen Hemminger14d02632006-09-26 11:57:43 -070063#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070064#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070065#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080066#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070067
Stephen Hemminger793b8832005-09-14 16:06:14 -070068#define TX_RING_SIZE 512
69#define TX_DEF_PENDING (TX_RING_SIZE - 1)
70#define TX_MIN_PENDING 64
Stephen Hemmingerb19666d2006-03-07 11:06:36 -080071#define MAX_SKB_TX_LE (4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS)
Stephen Hemminger793b8832005-09-14 16:06:14 -070072
73#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070074#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070075#define TX_WATCHDOG (5 * HZ)
76#define NAPI_WEIGHT 64
77#define PHY_RETRIES 1000
78
Stephen Hemmingerf4331a62007-07-09 15:33:39 -070079#define SKY2_EEPROM_MAGIC 0x9955aabb
80
81
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070082#define RING_NEXT(x,s) (((x)+1) & ((s)-1))
83
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070084static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070085 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
86 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080087 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070088
Stephen Hemminger793b8832005-09-14 16:06:14 -070089static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070090module_param(debug, int, 0);
91MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92
Stephen Hemminger14d02632006-09-26 11:57:43 -070093static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080094module_param(copybreak, int, 0);
95MODULE_PARM_DESC(copybreak, "Receive copy threshold");
96
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080097static int disable_msi = 0;
98module_param(disable_msi, int, 0);
99MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
100
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700101static const struct pci_device_id sky2_id_table[] = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800102 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
103 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700104 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800107 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B03) }, /* DGE-550T */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4354) }, /* 88E8040 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4357) }, /* 88E8042 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x435A) }, /* 88E8048 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700129 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4365) }, /* 88E8070 */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800130 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
131 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
132 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingerf1a0b6f2007-02-06 10:45:44 -0800133 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4369) }, /* 88EC042 */
134 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436A) }, /* 88E8058 */
Stephen Hemminger69161612007-06-04 17:23:26 -0700135 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436B) }, /* 88E8071 */
Stephen Hemminger5a37a682007-11-08 08:20:17 -0800136 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436C) }, /* 88E8072 */
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800137 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */
138 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700139 { 0 }
140};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700141
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700142MODULE_DEVICE_TABLE(pci, sky2_id_table);
143
144/* Avoid conditionals by using array */
145static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
146static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700147static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700148
Stephen Hemminger92f965e2005-12-09 11:34:53 -0800149/* This driver supports yukon2 chipset only */
150static const char *yukon2_name[] = {
151 "XL", /* 0xb3 */
152 "EC Ultra", /* 0xb4 */
Stephen Hemminger93745492007-02-06 10:45:43 -0800153 "Extreme", /* 0xb5 */
Stephen Hemminger92f965e2005-12-09 11:34:53 -0800154 "EC", /* 0xb6 */
155 "FE", /* 0xb7 */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700156 "FE+", /* 0xb8 */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700157};
158
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +0100159static void sky2_set_multicast(struct net_device *dev);
160
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800161/* Access to PHY via serial interconnect */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800162static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700163{
164 int i;
165
166 gma_write16(hw, port, GM_SMI_DATA, val);
167 gma_write16(hw, port, GM_SMI_CTRL,
168 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
169
170 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800171 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
172 if (ctrl == 0xffff)
173 goto io_error;
174
175 if (!(ctrl & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800176 return 0;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800177
178 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700179 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800180
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800181 dev_warn(&hw->pdev->dev,"%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800182 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800183
184io_error:
185 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
186 return -EIO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700187}
188
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800189static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700190{
191 int i;
192
Stephen Hemminger793b8832005-09-14 16:06:14 -0700193 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700194 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
195
196 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800197 u16 ctrl = gma_read16(hw, port, GM_SMI_CTRL);
198 if (ctrl == 0xffff)
199 goto io_error;
200
201 if (ctrl & GM_SMI_CT_RD_VAL) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800202 *val = gma_read16(hw, port, GM_SMI_DATA);
203 return 0;
204 }
205
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800206 udelay(10);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700207 }
208
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800209 dev_warn(&hw->pdev->dev, "%s: phy read timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800210 return -ETIMEDOUT;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800211io_error:
212 dev_err(&hw->pdev->dev, "%s: phy I/O error\n", hw->dev[port]->name);
213 return -EIO;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800214}
215
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800216static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800217{
218 u16 v;
Stephen Hemmingeraf043aa2007-11-05 15:52:10 -0800219 __gm_phy_read(hw, port, reg, &v);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800220 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700221}
222
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800223
224static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700225{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800226 /* switch power to VCC (WA for VAUX problem) */
227 sky2_write8(hw, B0_POWER_CTRL,
228 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700229
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800230 /* disable Core Clock Division, */
231 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700232
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800233 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
234 /* enable bits are inverted */
235 sky2_write8(hw, B2_Y2_CLK_GATE,
236 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
237 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
238 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
239 else
240 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700241
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700242 if (hw->flags & SKY2_HW_ADV_POWER_CTL) {
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700243 u32 reg;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700244
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800245 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700246
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800247 reg = sky2_pci_read32(hw, PCI_DEV_REG4);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700248 /* set all bits to 0 except bits 15..12 and 8 */
249 reg &= P_ASPM_CONTROL_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800250 sky2_pci_write32(hw, PCI_DEV_REG4, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700251
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800252 reg = sky2_pci_read32(hw, PCI_DEV_REG5);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700253 /* set all bits to 0 except bits 28 & 27 */
254 reg &= P_CTL_TIM_VMAIN_AV_MSK;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800255 sky2_pci_write32(hw, PCI_DEV_REG5, reg);
Stephen Hemmingerfc99fe02007-06-04 17:23:22 -0700256
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800257 sky2_pci_write32(hw, PCI_CFG_REG_1, 0);
Stephen Hemminger8f709202007-06-04 17:23:25 -0700258
259 /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */
260 reg = sky2_read32(hw, B2_GP_IO);
261 reg |= GLB_GPIO_STAT_RACE_DIS;
262 sky2_write32(hw, B2_GP_IO, reg);
Stephen Hemmingerb2345772007-08-21 14:34:02 -0700263
264 sky2_read32(hw, B2_GP_IO);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700265 }
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800266}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700267
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800268static void sky2_power_aux(struct sky2_hw *hw)
269{
270 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
271 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
272 else
273 /* enable bits are inverted */
274 sky2_write8(hw, B2_Y2_CLK_GATE,
275 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
276 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
277 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
278
279 /* switch power to VAUX */
280 if (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL)
281 sky2_write8(hw, B0_POWER_CTRL,
282 (PC_VAUX_ENA | PC_VCC_ENA |
283 PC_VAUX_ON | PC_VCC_OFF));
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700284}
285
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700286static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700287{
288 u16 reg;
289
290 /* disable all GMAC IRQ's */
291 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700292
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700293 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
294 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
295 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
296 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
297
298 reg = gma_read16(hw, port, GM_RX_CTRL);
299 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
300 gma_write16(hw, port, GM_RX_CTRL, reg);
301}
302
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700303/* flow control to advertise bits */
304static const u16 copper_fc_adv[] = {
305 [FC_NONE] = 0,
306 [FC_TX] = PHY_M_AN_ASP,
307 [FC_RX] = PHY_M_AN_PC,
308 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
309};
310
311/* flow control to advertise bits when using 1000BaseX */
312static const u16 fiber_fc_adv[] = {
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700313 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700314 [FC_TX] = PHY_M_P_ASYM_MD_X,
315 [FC_RX] = PHY_M_P_SYM_MD_X,
Stephen Hemmingerdf3fe1f2007-10-11 19:48:04 -0700316 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700317};
318
319/* flow control to GMA disable bits */
320static const u16 gm_fc_disable[] = {
321 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
322 [FC_TX] = GM_GPCR_FC_RX_DIS,
323 [FC_RX] = GM_GPCR_FC_TX_DIS,
324 [FC_BOTH] = 0,
325};
326
327
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700328static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
329{
330 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700331 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700332
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700333 if (sky2->autoneg == AUTONEG_ENABLE &&
334 !(hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700335 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
336
337 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700338 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700339 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
340
Stephen Hemminger53419c62007-05-14 12:38:11 -0700341 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700342 if (hw->chip_id == CHIP_ID_YUKON_EC)
Stephen Hemminger53419c62007-05-14 12:38:11 -0700343 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700344 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
345 else
Stephen Hemminger53419c62007-05-14 12:38:11 -0700346 /* set master & slave downshift counter to 1x */
347 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700348
349 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
350 }
351
352 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700353 if (sky2_is_copper(hw)) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700354 if (!(hw->flags & SKY2_HW_GIGABIT)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700355 /* enable automatic crossover */
356 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
Stephen Hemminger6d3105d2007-09-24 19:34:51 -0700357
358 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
359 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
360 u16 spec;
361
362 /* Enable Class A driver for FE+ A0 */
363 spec = gm_phy_read(hw, port, PHY_MARV_FE_SPEC_2);
364 spec |= PHY_M_FESC_SEL_CL_A;
365 gm_phy_write(hw, port, PHY_MARV_FE_SPEC_2, spec);
366 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700367 } else {
368 /* disable energy detect */
369 ctrl &= ~PHY_M_PC_EN_DET_MSK;
370
371 /* enable automatic crossover */
372 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
373
Stephen Hemminger53419c62007-05-14 12:38:11 -0700374 /* downshift on PHY 88E1112 and 88E1149 is changed */
Stephen Hemminger93745492007-02-06 10:45:43 -0800375 if (sky2->autoneg == AUTONEG_ENABLE
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700376 && (hw->flags & SKY2_HW_NEWER_PHY)) {
Stephen Hemminger53419c62007-05-14 12:38:11 -0700377 /* set downshift counter to 3x and enable downshift */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700378 ctrl &= ~PHY_M_PC_DSC_MSK;
379 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
380 }
381 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700382 } else {
383 /* workaround for deviation #4.88 (CRC errors) */
384 /* disable Automatic Crossover */
385
386 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700387 }
388
389 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
390
391 /* special setup for PHY 88E1112 Fiber */
Stephen Hemmingerea76e632007-09-19 15:36:44 -0700392 if (hw->chip_id == CHIP_ID_YUKON_XL && (hw->flags & SKY2_HW_FIBRE_PHY)) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700393 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
394
395 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
396 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
397 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
398 ctrl &= ~PHY_M_MAC_MD_MSK;
399 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700400 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
401
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700402 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700403 /* select page 1 to access Fiber registers */
404 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700405
406 /* for SFP-module set SIGDET polarity to low */
407 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
408 ctrl |= PHY_M_FIB_SIGD_POL;
Stephen Hemminger34dd9622007-05-24 15:22:45 -0700409 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700410 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700411
412 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700413 }
414
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700415 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700416 ct1000 = 0;
417 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700418 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700419
420 if (sky2->autoneg == AUTONEG_ENABLE) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700421 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700422 if (sky2->advertising & ADVERTISED_1000baseT_Full)
423 ct1000 |= PHY_M_1000C_AFD;
424 if (sky2->advertising & ADVERTISED_1000baseT_Half)
425 ct1000 |= PHY_M_1000C_AHD;
426 if (sky2->advertising & ADVERTISED_100baseT_Full)
427 adv |= PHY_M_AN_100_FD;
428 if (sky2->advertising & ADVERTISED_100baseT_Half)
429 adv |= PHY_M_AN_100_HD;
430 if (sky2->advertising & ADVERTISED_10baseT_Full)
431 adv |= PHY_M_AN_10_FD;
432 if (sky2->advertising & ADVERTISED_10baseT_Half)
433 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700434
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700435 adv |= copper_fc_adv[sky2->flow_mode];
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700436 } else { /* special defines for FIBER (88E1040S only) */
437 if (sky2->advertising & ADVERTISED_1000baseT_Full)
438 adv |= PHY_M_AN_1000X_AFD;
439 if (sky2->advertising & ADVERTISED_1000baseT_Half)
440 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700441
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700442 adv |= fiber_fc_adv[sky2->flow_mode];
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700443 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700444
445 /* Restart Auto-negotiation */
446 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
447 } else {
448 /* forced speed/duplex settings */
449 ct1000 = PHY_M_1000C_MSE;
450
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700451 /* Disable auto update for duplex flow control and speed */
452 reg |= GM_GPCR_AU_ALL_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700453
454 switch (sky2->speed) {
455 case SPEED_1000:
456 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700457 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700458 break;
459 case SPEED_100:
460 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700461 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700462 break;
463 }
464
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700465 if (sky2->duplex == DUPLEX_FULL) {
466 reg |= GM_GPCR_DUP_FULL;
467 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700468 } else if (sky2->speed < SPEED_1000)
469 sky2->flow_mode = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700470
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700471
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700472 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700473
474 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700475 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700476 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
477 else
478 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700479 }
480
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700481 gma_write16(hw, port, GM_GP_CTRL, reg);
482
Stephen Hemminger05745c42007-09-19 15:36:45 -0700483 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700484 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
485
486 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
487 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
488
489 /* Setup Phy LED's */
490 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
491 ledover = 0;
492
493 switch (hw->chip_id) {
494 case CHIP_ID_YUKON_FE:
495 /* on 88E3082 these bits are at 11..9 (shifted left) */
496 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
497
498 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
499
500 /* delete ACT LED control bits */
501 ctrl &= ~PHY_M_FELP_LED1_MSK;
502 /* change ACT LED control to blink mode */
503 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
504 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
505 break;
506
Stephen Hemminger05745c42007-09-19 15:36:45 -0700507 case CHIP_ID_YUKON_FE_P:
508 /* Enable Link Partner Next Page */
509 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
510 ctrl |= PHY_M_PC_ENA_LIP_NP;
511
512 /* disable Energy Detect and enable scrambler */
513 ctrl &= ~(PHY_M_PC_ENA_ENE_DT | PHY_M_PC_DIS_SCRAMB);
514 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
515
516 /* set LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED */
517 ctrl = PHY_M_FELP_LED2_CTRL(LED_PAR_CTRL_ACT_BL) |
518 PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_LINK) |
519 PHY_M_FELP_LED0_CTRL(LED_PAR_CTRL_SPEED);
520
521 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
522 break;
523
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700524 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700525 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700526
527 /* select page 3 to access LED control register */
528 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
529
530 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700531 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
532 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
533 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
534 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
535 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700536
537 /* set Polarity Control register */
538 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700539 (PHY_M_POLC_LS1_P_MIX(4) |
540 PHY_M_POLC_IS0_P_MIX(4) |
541 PHY_M_POLC_LOS_CTRL(2) |
542 PHY_M_POLC_INIT_CTRL(2) |
543 PHY_M_POLC_STA1_CTRL(2) |
544 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700545
546 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700547 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700548 break;
Stephen Hemminger93745492007-02-06 10:45:43 -0800549
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700550 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -0800551 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800552 case CHIP_ID_YUKON_SUPR:
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700553 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
554
555 /* select page 3 to access LED control register */
556 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
557
558 /* set LED Function Control register */
559 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
560 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
561 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
562 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
563 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
564
565 /* set Blink Rate in LED Timer Control Register */
566 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
567 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
568 /* restore page register */
569 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
570 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700571
572 default:
573 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
574 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800575
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700576 /* turn off the Rx LED (LED_RX) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800577 ledover |= PHY_M_LED_MO_RX(MO_LED_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700578 }
579
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700580 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
581 hw->chip_rev == CHIP_REV_YU_EC_U_A1) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800582 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700583 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
584
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800585 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700586 gm_phy_write(hw, port, 0x18, 0xaa99);
587 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700588
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800589 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700590 gm_phy_write(hw, port, 0x18, 0xa204);
591 gm_phy_write(hw, port, 0x17, 0x2002);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800592
593 /* set page register to 0 */
Stephen Hemminger9467a8f2007-04-07 16:02:28 -0700594 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700595 } else if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
596 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
597 /* apply workaround for integrated resistors calibration */
598 gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17);
599 gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60);
Stephen Hemminger93745492007-02-06 10:45:43 -0800600 } else if (hw->chip_id != CHIP_ID_YUKON_EX) {
Stephen Hemminger05745c42007-09-19 15:36:45 -0700601 /* no effect on Yukon-XL */
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800602 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
603
604 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
605 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -0800606 ledover |= PHY_M_LED_MO_100(MO_LED_ON);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800607 }
608
609 if (ledover)
610 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
611
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700612 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700613
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700614 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700615 if (sky2->autoneg == AUTONEG_ENABLE)
616 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
617 else
618 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
619}
620
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700621static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
622{
623 u32 reg1;
Stephen Hemmingerff351642007-10-11 19:47:44 -0700624 static const u32 phy_power[] = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
625 static const u32 coma_mode[] = { PCI_Y2_PHY1_COMA, PCI_Y2_PHY2_COMA };
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700626
Stephen Hemminger82637e82008-01-23 19:16:04 -0800627 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800628 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingerff351642007-10-11 19:47:44 -0700629 /* Turn on/off phy power saving */
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700630 if (onoff)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700631 reg1 &= ~phy_power[port];
632 else
633 reg1 |= phy_power[port];
634
Stephen Hemmingerff351642007-10-11 19:47:44 -0700635 if (onoff && hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
636 reg1 |= coma_mode[port];
637
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800638 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
Stephen Hemminger82637e82008-01-23 19:16:04 -0800639 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
640 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemminger167f53d2007-09-25 19:01:02 -0700641
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700642 udelay(100);
643}
644
Stephen Hemminger1b537562005-12-20 15:08:07 -0800645/* Force a renegotiation */
646static void sky2_phy_reinit(struct sky2_port *sky2)
647{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800648 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800649 sky2_phy_init(sky2->hw, sky2->port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800650 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800651}
652
Stephen Hemmingere3173832007-02-06 10:45:39 -0800653/* Put device in state to listen for Wake On Lan */
654static void sky2_wol_init(struct sky2_port *sky2)
655{
656 struct sky2_hw *hw = sky2->hw;
657 unsigned port = sky2->port;
658 enum flow_control save_mode;
659 u16 ctrl;
660 u32 reg1;
661
662 /* Bring hardware out of reset */
663 sky2_write16(hw, B0_CTST, CS_RST_CLR);
664 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
665
666 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
667 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
668
669 /* Force to 10/100
670 * sky2_reset will re-enable on resume
671 */
672 save_mode = sky2->flow_mode;
673 ctrl = sky2->advertising;
674
675 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
676 sky2->flow_mode = FC_NONE;
677 sky2_phy_power(hw, port, 1);
678 sky2_phy_reinit(sky2);
679
680 sky2->flow_mode = save_mode;
681 sky2->advertising = ctrl;
682
683 /* Set GMAC to no flow control and auto update for speed/duplex */
684 gma_write16(hw, port, GM_GP_CTRL,
685 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
686 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
687
688 /* Set WOL address */
689 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
690 sky2->netdev->dev_addr, ETH_ALEN);
691
692 /* Turn on appropriate WOL control bits */
693 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
694 ctrl = 0;
695 if (sky2->wol & WAKE_PHY)
696 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
697 else
698 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
699
700 if (sky2->wol & WAKE_MAGIC)
701 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
702 else
703 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;;
704
705 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
706 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
707
708 /* Turn on legacy PCI-Express PME mode */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800709 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800710 reg1 |= PCI_Y2_PME_LEGACY;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -0800711 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
Stephen Hemmingere3173832007-02-06 10:45:39 -0800712
713 /* block receiver */
714 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
715
716}
717
Stephen Hemminger69161612007-06-04 17:23:26 -0700718static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port)
719{
Stephen Hemminger05745c42007-09-19 15:36:45 -0700720 struct net_device *dev = hw->dev[port];
721
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800722 if ( (hw->chip_id == CHIP_ID_YUKON_EX &&
723 hw->chip_rev != CHIP_REV_YU_EX_A0) ||
724 hw->chip_id == CHIP_ID_YUKON_FE_P ||
725 hw->chip_id == CHIP_ID_YUKON_SUPR) {
726 /* Yukon-Extreme B0 and further Extreme devices */
727 /* enable Store & Forward mode for TX */
Stephen Hemminger69161612007-06-04 17:23:26 -0700728
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800729 if (dev->mtu <= ETH_DATA_LEN)
730 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
731 TX_JUMBO_DIS | TX_STFW_ENA);
Stephen Hemminger69161612007-06-04 17:23:26 -0700732
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800733 else
734 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
735 TX_JUMBO_ENA| TX_STFW_ENA);
736 } else {
737 if (dev->mtu <= ETH_DATA_LEN)
738 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA);
739 else {
740 /* set Tx GMAC FIFO Almost Empty Threshold */
741 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR),
742 (ECU_JUMBO_WM << 16) | ECU_AE_THR);
Stephen Hemminger05745c42007-09-19 15:36:45 -0700743
Stephen Hemmingered4d4162008-01-10 16:14:14 -0800744 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
745
746 /* Can't do offload because of lack of store/forward */
747 dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | NETIF_F_ALL_CSUM);
748 }
Stephen Hemminger69161612007-06-04 17:23:26 -0700749 }
750}
751
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700752static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
753{
754 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
755 u16 reg;
Al Viro25cccec2007-07-20 16:07:33 +0100756 u32 rx_reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700757 int i;
758 const u8 *addr = hw->dev[port]->dev_addr;
759
Stephen Hemmingerf3503392007-08-21 11:10:22 -0700760 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
761 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700762
763 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
764
Stephen Hemminger793b8832005-09-14 16:06:14 -0700765 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700766 /* WA DEV_472 -- looks like crossed wires on port 2 */
767 /* clear GMAC 1 Control reset */
768 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
769 do {
770 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
771 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
772 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
773 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
774 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
775 }
776
Stephen Hemminger793b8832005-09-14 16:06:14 -0700777 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700778
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700779 /* Enable Transmit FIFO Underrun */
780 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
781
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800782 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700783 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800784 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700785
786 /* MIB clear */
787 reg = gma_read16(hw, port, GM_PHY_ADDR);
788 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
789
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700790 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
791 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700792 gma_write16(hw, port, GM_PHY_ADDR, reg);
793
794 /* transmit control */
795 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
796
797 /* receive control reg: unicast + multicast + no FCS */
798 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700799 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700800
801 /* transmit flow control */
802 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
803
804 /* transmit parameter */
805 gma_write16(hw, port, GM_TX_PARAM,
806 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
807 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
808 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
809 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
810
811 /* serial mode register */
812 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700813 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700814
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700815 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700816 reg |= GM_SMOD_JUMBO_ENA;
817
818 gma_write16(hw, port, GM_SERIAL_MODE, reg);
819
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700820 /* virtual address for data */
821 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
822
Stephen Hemminger793b8832005-09-14 16:06:14 -0700823 /* physical address: used for pause frames */
824 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
825
826 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700827 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
828 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
829 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
830
831 /* Configure Rx MAC FIFO */
832 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Al Viro25cccec2007-07-20 16:07:33 +0100833 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON;
Stephen Hemminger05745c42007-09-19 15:36:45 -0700834 if (hw->chip_id == CHIP_ID_YUKON_EX ||
835 hw->chip_id == CHIP_ID_YUKON_FE_P)
Al Viro25cccec2007-07-20 16:07:33 +0100836 rx_reg |= GMF_RX_OVER_ON;
Stephen Hemminger69161612007-06-04 17:23:26 -0700837
Al Viro25cccec2007-07-20 16:07:33 +0100838 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700839
Stephen Hemminger798fdd02007-12-07 15:22:15 -0800840 if (hw->chip_id == CHIP_ID_YUKON_XL) {
841 /* Hardware errata - clear flush mask */
842 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), 0);
843 } else {
844 /* Flush Rx MAC FIFO on any flow control or error */
845 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
846 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700847
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800848 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
Stephen Hemminger05745c42007-09-19 15:36:45 -0700849 reg = RX_GMF_FL_THR_DEF + 1;
850 /* Another magic mystery workaround from sk98lin */
851 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
852 hw->chip_rev == CHIP_REV_YU_FE2_A0)
853 reg = 0x178;
854 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700855
856 /* Configure Tx MAC FIFO */
857 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
858 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800859
Stephen Hemmingere0c28112007-09-20 13:03:49 -0700860 /* On chips without ram buffer, pause is controled by MAC level */
Stephen Hemminger39dbd952008-02-04 19:45:13 -0800861 if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800862 sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800863 sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -0700864
Stephen Hemminger69161612007-06-04 17:23:26 -0700865 sky2_set_tx_stfwd(hw, port);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800866 }
867
Stephen Hemmingere970d1f2007-11-27 11:02:07 -0800868 if (hw->chip_id == CHIP_ID_YUKON_FE_P &&
869 hw->chip_rev == CHIP_REV_YU_FE2_A0) {
870 /* disable dynamic watermark */
871 reg = sky2_read16(hw, SK_REG(port, TX_GMF_EA));
872 reg &= ~TX_DYN_WM_ENA;
873 sky2_write16(hw, SK_REG(port, TX_GMF_EA), reg);
874 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700875}
876
Stephen Hemminger67712902006-12-04 15:53:45 -0800877/* Assign Ram Buffer allocation to queue */
878static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700879{
Stephen Hemminger67712902006-12-04 15:53:45 -0800880 u32 end;
881
882 /* convert from K bytes to qwords used for hw register */
883 start *= 1024/8;
884 space *= 1024/8;
885 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700886
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700887 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
888 sky2_write32(hw, RB_ADDR(q, RB_START), start);
889 sky2_write32(hw, RB_ADDR(q, RB_END), end);
890 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
891 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
892
893 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800894 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700895
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800896 /* On receive queue's set the thresholds
897 * give receiver priority when > 3/4 full
898 * send pause when down to 2K
899 */
900 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
901 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700902
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800903 tp = space - 2048/8;
904 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
905 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700906 } else {
907 /* Enable store & forward on Tx queue's because
908 * Tx FIFO is only 1K on Yukon
909 */
910 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
911 }
912
913 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700914 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700915}
916
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700917/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800918static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700919{
920 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
921 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
922 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800923 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700924}
925
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700926/* Setup prefetch unit registers. This is the interface between
927 * hardware and driver list elements
928 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -0800929static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700930 u64 addr, u32 last)
931{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700932 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
933 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
934 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), addr >> 32);
935 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), (u32) addr);
936 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
937 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700938
939 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700940}
941
Stephen Hemminger793b8832005-09-14 16:06:14 -0700942static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
943{
944 struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod;
945
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700946 sky2->tx_prod = RING_NEXT(sky2->tx_prod, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700947 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700948 return le;
949}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700950
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -0700951static void tx_init(struct sky2_port *sky2)
952{
953 struct sky2_tx_le *le;
954
955 sky2->tx_prod = sky2->tx_cons = 0;
956 sky2->tx_tcpsum = 0;
957 sky2->tx_last_mss = 0;
958
959 le = get_tx_le(sky2);
960 le->addr = 0;
961 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -0700962}
963
Stephen Hemminger291ea612006-09-26 11:57:41 -0700964static inline struct tx_ring_info *tx_le_re(struct sky2_port *sky2,
965 struct sky2_tx_le *le)
966{
967 return sky2->tx_ring + (le - sky2->tx_le);
968}
969
Stephen Hemminger290d4de2006-03-20 15:48:15 -0800970/* Update chip's next pointer */
971static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700972{
Stephen Hemminger50432cb2007-05-14 12:38:15 -0700973 /* Make sure write' to descriptors are complete before we tell hardware */
Stephen Hemminger762c2de2006-01-17 13:43:14 -0800974 wmb();
Stephen Hemminger50432cb2007-05-14 12:38:15 -0700975 sky2_write16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX), idx);
976
977 /* Synchronize I/O on since next processor may write to tail */
978 mmiowb();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700979}
980
Stephen Hemminger793b8832005-09-14 16:06:14 -0700981
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700982static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
983{
984 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700985 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700986 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700987 return le;
988}
989
Stephen Hemminger14d02632006-09-26 11:57:43 -0700990/* Build description to hardware for one receive segment */
991static void sky2_rx_add(struct sky2_port *sky2, u8 op,
992 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700993{
994 struct sky2_rx_le *le;
995
Stephen Hemminger86c68872008-01-10 16:14:12 -0800996 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700997 le = sky2_next_rx(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -0800998 le->addr = cpu_to_le32(upper_32_bits(map));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700999 le->opcode = OP_ADDR64 | HW_OWNER;
1000 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001001
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001002 le = sky2_next_rx(sky2);
Stephen Hemminger734d1862005-12-09 11:35:00 -08001003 le->addr = cpu_to_le32((u32) map);
1004 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001005 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001006}
1007
Stephen Hemminger14d02632006-09-26 11:57:43 -07001008/* Build description to hardware for one possibly fragmented skb */
1009static void sky2_rx_submit(struct sky2_port *sky2,
1010 const struct rx_ring_info *re)
1011{
1012 int i;
1013
1014 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
1015
1016 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
1017 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
1018}
1019
1020
1021static void sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
1022 unsigned size)
1023{
1024 struct sk_buff *skb = re->skb;
1025 int i;
1026
1027 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
1028 pci_unmap_len_set(re, data_size, size);
1029
1030 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1031 re->frag_addr[i] = pci_map_page(pdev,
1032 skb_shinfo(skb)->frags[i].page,
1033 skb_shinfo(skb)->frags[i].page_offset,
1034 skb_shinfo(skb)->frags[i].size,
1035 PCI_DMA_FROMDEVICE);
1036}
1037
1038static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
1039{
1040 struct sk_buff *skb = re->skb;
1041 int i;
1042
1043 pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size),
1044 PCI_DMA_FROMDEVICE);
1045
1046 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
1047 pci_unmap_page(pdev, re->frag_addr[i],
1048 skb_shinfo(skb)->frags[i].size,
1049 PCI_DMA_FROMDEVICE);
1050}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001051
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001052/* Tell chip where to start receive checksum.
1053 * Actually has two checksums, but set both same to avoid possible byte
1054 * order problems.
1055 */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001056static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001057{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001058 struct sky2_rx_le *le = sky2_next_rx(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001059
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001060 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
1061 le->ctrl = 0;
1062 le->opcode = OP_TCPSTART | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001063
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001064 sky2_write32(sky2->hw,
1065 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1066 sky2->rx_csum ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001067}
1068
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001069/*
1070 * The RX Stop command will not work for Yukon-2 if the BMU does not
1071 * reach the end of packet and since we can't make sure that we have
1072 * incoming data, we must reset the BMU while it is not doing a DMA
1073 * transfer. Since it is possible that the RX path is still active,
1074 * the RX RAM buffer will be stopped first, so any possible incoming
1075 * data will not trigger a DMA. After the RAM buffer is stopped, the
1076 * BMU is polled until any DMA in progress is ended and only then it
1077 * will be reset.
1078 */
1079static void sky2_rx_stop(struct sky2_port *sky2)
1080{
1081 struct sky2_hw *hw = sky2->hw;
1082 unsigned rxq = rxqaddr[sky2->port];
1083 int i;
1084
1085 /* disable the RAM Buffer receive queue */
1086 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
1087
1088 for (i = 0; i < 0xffff; i++)
1089 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
1090 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
1091 goto stopped;
1092
1093 printk(KERN_WARNING PFX "%s: receiver stop failed\n",
1094 sky2->netdev->name);
1095stopped:
1096 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1097
1098 /* reset the Rx prefetch unit */
1099 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001100 mmiowb();
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001101}
Stephen Hemminger793b8832005-09-14 16:06:14 -07001102
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001103/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001104static void sky2_rx_clean(struct sky2_port *sky2)
1105{
1106 unsigned i;
1107
1108 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001109 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001110 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001111
1112 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -07001113 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001114 kfree_skb(re->skb);
1115 re->skb = NULL;
1116 }
1117 }
1118}
1119
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001120/* Basic MII support */
1121static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1122{
1123 struct mii_ioctl_data *data = if_mii(ifr);
1124 struct sky2_port *sky2 = netdev_priv(dev);
1125 struct sky2_hw *hw = sky2->hw;
1126 int err = -EOPNOTSUPP;
1127
1128 if (!netif_running(dev))
1129 return -ENODEV; /* Phy still in reset */
1130
Stephen Hemmingerd89e1342006-03-20 15:48:20 -08001131 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001132 case SIOCGMIIPHY:
1133 data->phy_id = PHY_ADDR_MARV;
1134
1135 /* fallthru */
1136 case SIOCGMIIREG: {
1137 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001138
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001139 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001140 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001141 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001142
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001143 data->val_out = val;
1144 break;
1145 }
1146
1147 case SIOCSMIIREG:
1148 if (!capable(CAP_NET_ADMIN))
1149 return -EPERM;
1150
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001151 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001152 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1153 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001154 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001155 break;
1156 }
1157 return err;
1158}
1159
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001160#ifdef SKY2_VLAN_TAG_USED
1161static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
1162{
1163 struct sky2_port *sky2 = netdev_priv(dev);
1164 struct sky2_hw *hw = sky2->hw;
1165 u16 port = sky2->port;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001166
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001167 netif_tx_lock_bh(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001168 napi_disable(&hw->napi);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001169
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001170 sky2->vlgrp = grp;
Stephen Hemminger3d4e66f2007-06-01 09:43:58 -07001171 if (grp) {
1172 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1173 RX_VLAN_STRIP_ON);
1174 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1175 TX_VLAN_TAG_ON);
1176 } else {
1177 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
1178 RX_VLAN_STRIP_OFF);
1179 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1180 TX_VLAN_TAG_OFF);
1181 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001182
David S. Millerd1d08d12008-01-07 20:53:33 -08001183 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001184 napi_enable(&hw->napi);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001185 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001186}
1187#endif
1188
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001189/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001190 * Allocate an skb for receiving. If the MTU is large enough
1191 * make the skb non-linear with a fragment list of pages.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001192 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001193static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001194{
1195 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001196 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001197
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001198 if (sky2->hw->flags & SKY2_HW_RAM_BUFFER) {
Stephen Hemmingerf03b8652007-11-28 14:27:03 -08001199 unsigned char *start;
1200 /*
1201 * Workaround for a bug in FIFO that cause hang
1202 * if the FIFO if the receive buffer is not 64 byte aligned.
1203 * The buffer returned from netdev_alloc_skb is
1204 * aligned except if slab debugging is enabled.
1205 */
1206 skb = netdev_alloc_skb(sky2->netdev, sky2->rx_data_size + 8);
1207 if (!skb)
1208 goto nomem;
1209 start = PTR_ALIGN(skb->data, 8);
1210 skb_reserve(skb, start - skb->data);
1211 } else {
1212 skb = netdev_alloc_skb(sky2->netdev,
1213 sky2->rx_data_size + NET_IP_ALIGN);
1214 if (!skb)
1215 goto nomem;
1216 skb_reserve(skb, NET_IP_ALIGN);
1217 }
Stephen Hemminger14d02632006-09-26 11:57:43 -07001218
1219 for (i = 0; i < sky2->rx_nfrags; i++) {
1220 struct page *page = alloc_page(GFP_ATOMIC);
1221
1222 if (!page)
1223 goto free_partial;
1224 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001225 }
1226
1227 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001228free_partial:
1229 kfree_skb(skb);
1230nomem:
1231 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001232}
1233
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001234static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq)
1235{
1236 sky2_put_idx(sky2->hw, rxq, sky2->rx_put);
1237}
1238
Stephen Hemminger82788c72006-01-17 13:43:10 -08001239/*
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001240 * Allocate and setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001241 * Normal case this ends up creating one list element for skb
1242 * in the receive ring. Worst case if using large MTU and each
1243 * allocation falls on a different 64 bit region, that results
1244 * in 6 list elements per ring entry.
1245 * One element is used for checksum enable/disable, and one
1246 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001247 */
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001248static int sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001249{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001250 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001251 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001252 unsigned rxq = rxqaddr[sky2->port];
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001253 unsigned i, size, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001254
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001255 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001256 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001257
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001258 /* On PCI express lowering the watermark gives better performance */
1259 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1260 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1261
1262 /* These chips have no ram buffer?
1263 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001264 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001265 (hw->chip_rev == CHIP_REV_YU_EC_U_A1
1266 || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
Stephen Hemmingerf449c7c2007-06-04 17:23:23 -07001267 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001268
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001269 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1270
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001271 if (!(hw->flags & SKY2_HW_NEW_LE))
1272 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001273
Stephen Hemminger14d02632006-09-26 11:57:43 -07001274 /* Space needed for frame data + headers rounded up */
Stephen Hemmingerf957da22007-07-09 15:33:41 -07001275 size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001276
1277 /* Stopping point for hardware truncation */
1278 thresh = (size - 8) / sizeof(u32);
1279
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001280 sky2->rx_nfrags = size >> PAGE_SHIFT;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001281 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1282
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001283 /* Compute residue after pages */
1284 size -= sky2->rx_nfrags << PAGE_SHIFT;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001285
Stephen Hemminger5f06eba2007-11-28 14:50:16 -08001286 /* Optimize to handle small packets and headers */
1287 if (size < copybreak)
1288 size = copybreak;
1289 if (size < ETH_HLEN)
1290 size = ETH_HLEN;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001291
Stephen Hemminger14d02632006-09-26 11:57:43 -07001292 sky2->rx_data_size = size;
1293
1294 /* Fill Rx ring */
1295 for (i = 0; i < sky2->rx_pending; i++) {
1296 re = sky2->rx_ring + i;
1297
1298 re->skb = sky2_rx_alloc(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001299 if (!re->skb)
1300 goto nomem;
1301
Stephen Hemminger14d02632006-09-26 11:57:43 -07001302 sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size);
1303 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001304 }
1305
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001306 /*
1307 * The receiver hangs if it receives frames larger than the
1308 * packet buffer. As a workaround, truncate oversize frames, but
1309 * the register is limited to 9 bits, so if you do frames > 2052
1310 * you better get the MTU right!
1311 */
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001312 if (thresh > 0x1ff)
1313 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1314 else {
1315 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1316 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1317 }
1318
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001319 /* Tell chip about available buffers */
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07001320 sky2_rx_update(sky2, rxq);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001321 return 0;
1322nomem:
1323 sky2_rx_clean(sky2);
1324 return -ENOMEM;
1325}
1326
1327/* Bring up network interface. */
1328static int sky2_up(struct net_device *dev)
1329{
1330 struct sky2_port *sky2 = netdev_priv(dev);
1331 struct sky2_hw *hw = sky2->hw;
1332 unsigned port = sky2->port;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001333 u32 imask, ramsize;
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001334 int cap, err = -ENOMEM;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001335 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001336
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001337 /*
1338 * On dual port PCI-X card, there is an problem where status
1339 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001340 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001341 if (otherdev && netif_running(otherdev) &&
1342 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001343 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001344
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001345 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001346 cmd &= ~PCI_X_CMD_MAX_SPLIT;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08001347 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
1348
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001349 }
1350
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001351 if (netif_msg_ifup(sky2))
1352 printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
1353
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001354 netif_carrier_off(dev);
1355
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001356 /* must be power of 2 */
1357 sky2->tx_le = pci_alloc_consistent(hw->pdev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07001358 TX_RING_SIZE *
1359 sizeof(struct sky2_tx_le),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001360 &sky2->tx_le_map);
1361 if (!sky2->tx_le)
1362 goto err_out;
1363
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001364 sky2->tx_ring = kcalloc(TX_RING_SIZE, sizeof(struct tx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001365 GFP_KERNEL);
1366 if (!sky2->tx_ring)
1367 goto err_out;
Stephen Hemminger88f5f0c2007-09-27 12:38:12 -07001368
1369 tx_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001370
1371 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1372 &sky2->rx_le_map);
1373 if (!sky2->rx_le)
1374 goto err_out;
1375 memset(sky2->rx_le, 0, RX_LE_BYTES);
1376
Stephen Hemminger291ea612006-09-26 11:57:41 -07001377 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001378 GFP_KERNEL);
1379 if (!sky2->rx_ring)
1380 goto err_out;
1381
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001382 sky2_phy_power(hw, port, 1);
1383
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001384 sky2_mac_init(hw, port);
1385
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001386 /* Register is number of 4K blocks on internal RAM buffer. */
1387 ramsize = sky2_read8(hw, B2_E_0) * 4;
1388 if (ramsize > 0) {
Stephen Hemminger67712902006-12-04 15:53:45 -08001389 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001390
Stephen Hemminger39dbd952008-02-04 19:45:13 -08001391 hw->flags |= SKY2_HW_RAM_BUFFER;
Stephen Hemmingere0c28112007-09-20 13:03:49 -07001392 pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize);
Stephen Hemminger67712902006-12-04 15:53:45 -08001393 if (ramsize < 16)
1394 rxspace = ramsize / 2;
1395 else
1396 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001397
Stephen Hemminger67712902006-12-04 15:53:45 -08001398 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1399 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1400
1401 /* Make sure SyncQ is disabled */
1402 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1403 RB_RST_SET);
1404 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001405
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001406 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001407
Stephen Hemminger69161612007-06-04 17:23:26 -07001408 /* This is copied from sk98lin 10.0.5.3; no one tells me about erratta's */
1409 if (hw->chip_id == CHIP_ID_YUKON_EX && hw->chip_rev == CHIP_REV_YU_EX_B0)
1410 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1411
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001412 /* Set almost empty threshold */
Stephen Hemmingerc2716fb2006-09-26 11:57:39 -07001413 if (hw->chip_id == CHIP_ID_YUKON_EC_U
1414 && hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07001415 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001416
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001417 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1418 TX_RING_SIZE - 1);
1419
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001420 err = sky2_rx_start(sky2);
Stephen Hemminger6de16232007-10-17 13:26:42 -07001421 if (err)
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001422 goto err_out;
1423
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001424 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001425 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001426 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001427 sky2_write32(hw, B0_IMSK, imask);
1428
Stephen Hemmingera7bffe72008-01-23 19:11:51 -08001429 sky2_set_multicast(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001430 return 0;
1431
1432err_out:
Stephen Hemminger1b537562005-12-20 15:08:07 -08001433 if (sky2->rx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001434 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1435 sky2->rx_le, sky2->rx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001436 sky2->rx_le = NULL;
1437 }
1438 if (sky2->tx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001439 pci_free_consistent(hw->pdev,
1440 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1441 sky2->tx_le, sky2->tx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001442 sky2->tx_le = NULL;
1443 }
1444 kfree(sky2->tx_ring);
1445 kfree(sky2->rx_ring);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001446
Stephen Hemminger1b537562005-12-20 15:08:07 -08001447 sky2->tx_ring = NULL;
1448 sky2->rx_ring = NULL;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001449 return err;
1450}
1451
Stephen Hemminger793b8832005-09-14 16:06:14 -07001452/* Modular subtraction in ring */
1453static inline int tx_dist(unsigned tail, unsigned head)
1454{
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001455 return (head - tail) & (TX_RING_SIZE - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001456}
1457
1458/* Number of list elements available for next tx */
1459static inline int tx_avail(const struct sky2_port *sky2)
1460{
1461 return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod);
1462}
1463
1464/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001465static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001466{
1467 unsigned count;
1468
1469 count = sizeof(dma_addr_t) / sizeof(u32);
1470 count += skb_shinfo(skb)->nr_frags * count;
1471
Herbert Xu89114af2006-07-08 13:34:32 -07001472 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001473 ++count;
1474
Patrick McHardy84fa7932006-08-29 16:44:56 -07001475 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001476 ++count;
1477
1478 return count;
1479}
1480
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001481/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001482 * Put one packet in ring for transmit.
1483 * A single packet can generate multiple list elements, and
1484 * the number of ring elements will probably be less than the number
1485 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001486 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001487static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1488{
1489 struct sky2_port *sky2 = netdev_priv(dev);
1490 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001491 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001492 struct tx_ring_info *re;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001493 unsigned i, len;
1494 dma_addr_t mapping;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001495 u16 mss;
1496 u8 ctrl;
1497
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001498 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1499 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001500
Stephen Hemminger793b8832005-09-14 16:06:14 -07001501 if (unlikely(netif_msg_tx_queued(sky2)))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001502 printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n",
1503 dev->name, sky2->tx_prod, skb->len);
1504
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001505 len = skb_headlen(skb);
1506 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001507
Stephen Hemminger86c68872008-01-10 16:14:12 -08001508 /* Send high bits if needed */
1509 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001510 le = get_tx_le(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001511 le->addr = cpu_to_le32(upper_32_bits(mapping));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001512 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001513 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001514
1515 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001516 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001517 if (mss != 0) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001518
1519 if (!(hw->flags & SKY2_HW_NEW_LE))
Stephen Hemminger69161612007-06-04 17:23:26 -07001520 mss += ETH_HLEN + ip_hdrlen(skb) + tcp_hdrlen(skb);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001521
Stephen Hemminger69161612007-06-04 17:23:26 -07001522 if (mss != sky2->tx_last_mss) {
1523 le = get_tx_le(sky2);
1524 le->addr = cpu_to_le32(mss);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001525
1526 if (hw->flags & SKY2_HW_NEW_LE)
Stephen Hemminger69161612007-06-04 17:23:26 -07001527 le->opcode = OP_MSS | HW_OWNER;
1528 else
1529 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001530 sky2->tx_last_mss = mss;
1531 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001532 }
1533
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001534 ctrl = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001535#ifdef SKY2_VLAN_TAG_USED
1536 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
1537 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
1538 if (!le) {
1539 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001540 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001541 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001542 } else
1543 le->opcode |= OP_VLAN;
1544 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1545 ctrl |= INS_VLAN;
1546 }
1547#endif
1548
1549 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001550 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemminger69161612007-06-04 17:23:26 -07001551 /* On Yukon EX (some versions) encoding change. */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001552 if (hw->flags & SKY2_HW_AUTO_TX_SUM)
Stephen Hemminger69161612007-06-04 17:23:26 -07001553 ctrl |= CALSUM; /* auto checksum */
1554 else {
1555 const unsigned offset = skb_transport_offset(skb);
1556 u32 tcpsum;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001557
Stephen Hemminger69161612007-06-04 17:23:26 -07001558 tcpsum = offset << 16; /* sum start */
1559 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001560
Stephen Hemminger69161612007-06-04 17:23:26 -07001561 ctrl |= CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1562 if (ip_hdr(skb)->protocol == IPPROTO_UDP)
1563 ctrl |= UDPTCP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001564
Stephen Hemminger69161612007-06-04 17:23:26 -07001565 if (tcpsum != sky2->tx_tcpsum) {
1566 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001567
Stephen Hemminger69161612007-06-04 17:23:26 -07001568 le = get_tx_le(sky2);
1569 le->addr = cpu_to_le32(tcpsum);
1570 le->length = 0; /* initial checksum value */
1571 le->ctrl = 1; /* one packet */
1572 le->opcode = OP_TCPLISW | HW_OWNER;
1573 }
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001574 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001575 }
1576
1577 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001578 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001579 le->length = cpu_to_le16(len);
1580 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001581 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001582
Stephen Hemminger291ea612006-09-26 11:57:41 -07001583 re = tx_le_re(sky2, le);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001584 re->skb = skb;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001585 pci_unmap_addr_set(re, mapaddr, mapping);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001586 pci_unmap_len_set(re, maplen, len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001587
1588 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001589 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001590
1591 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1592 frag->size, PCI_DMA_TODEVICE);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001593
1594 if (sizeof(dma_addr_t) > sizeof(u32)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001595 le = get_tx_le(sky2);
Stephen Hemminger86c68872008-01-10 16:14:12 -08001596 le->addr = cpu_to_le32(upper_32_bits(mapping));
Stephen Hemminger793b8832005-09-14 16:06:14 -07001597 le->ctrl = 0;
1598 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001599 }
1600
1601 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001602 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001603 le->length = cpu_to_le16(frag->size);
1604 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001605 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001606
Stephen Hemminger291ea612006-09-26 11:57:41 -07001607 re = tx_le_re(sky2, le);
1608 re->skb = skb;
1609 pci_unmap_addr_set(re, mapaddr, mapping);
1610 pci_unmap_len_set(re, maplen, frag->size);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001611 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001612
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001613 le->ctrl |= EOP;
1614
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001615 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1616 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001617
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001618 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001619
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001620 dev->trans_start = jiffies;
1621 return NETDEV_TX_OK;
1622}
1623
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001624/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001625 * Free ring elements from starting at tx_cons until "done"
1626 *
1627 * NB: the hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001628 * buffers so make sure not to free skb to early.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001629 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001630static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001631{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001632 struct net_device *dev = sky2->netdev;
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001633 struct pci_dev *pdev = sky2->hw->pdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001634 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001635
Stephen Hemminger0e3ff6a2005-12-09 11:35:02 -08001636 BUG_ON(done >= TX_RING_SIZE);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001637
Stephen Hemminger291ea612006-09-26 11:57:41 -07001638 for (idx = sky2->tx_cons; idx != done;
1639 idx = RING_NEXT(idx, TX_RING_SIZE)) {
1640 struct sky2_tx_le *le = sky2->tx_le + idx;
1641 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001642
Stephen Hemminger291ea612006-09-26 11:57:41 -07001643 switch(le->opcode & ~HW_OWNER) {
1644 case OP_LARGESEND:
1645 case OP_PACKET:
1646 pci_unmap_single(pdev,
1647 pci_unmap_addr(re, mapaddr),
1648 pci_unmap_len(re, maplen),
1649 PCI_DMA_TODEVICE);
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001650 break;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001651 case OP_BUFFER:
1652 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
1653 pci_unmap_len(re, maplen),
Stephen Hemminger734d1862005-12-09 11:35:00 -08001654 PCI_DMA_TODEVICE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001655 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001656 }
1657
Stephen Hemminger291ea612006-09-26 11:57:41 -07001658 if (le->ctrl & EOP) {
1659 if (unlikely(netif_msg_tx_done(sky2)))
1660 printk(KERN_DEBUG "%s: tx done %u\n",
1661 dev->name, idx);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001662
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07001663 dev->stats.tx_packets++;
1664 dev->stats.tx_bytes += re->skb->len;
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001665
Stephen Hemminger794b2bd2006-12-01 14:29:36 -08001666 dev_kfree_skb_any(re->skb);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07001667 sky2->tx_next = RING_NEXT(idx, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001668 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001669 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001670
Stephen Hemminger291ea612006-09-26 11:57:41 -07001671 sky2->tx_cons = idx;
Stephen Hemminger50432cb2007-05-14 12:38:15 -07001672 smp_mb();
1673
Stephen Hemminger22e11702006-07-12 15:23:48 -07001674 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001675 netif_wake_queue(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001676}
1677
1678/* Cleanup all untransmitted buffers, assume transmitter not running */
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001679static void sky2_tx_clean(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001680{
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001681 struct sky2_port *sky2 = netdev_priv(dev);
1682
1683 netif_tx_lock_bh(dev);
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001684 sky2_tx_complete(sky2, sky2->tx_prod);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001685 netif_tx_unlock_bh(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001686}
1687
1688/* Network shutdown */
1689static int sky2_down(struct net_device *dev)
1690{
1691 struct sky2_port *sky2 = netdev_priv(dev);
1692 struct sky2_hw *hw = sky2->hw;
1693 unsigned port = sky2->port;
1694 u16 ctrl;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001695 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001696
Stephen Hemminger1b537562005-12-20 15:08:07 -08001697 /* Never really got started! */
1698 if (!sky2->tx_le)
1699 return 0;
1700
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001701 if (netif_msg_ifdown(sky2))
1702 printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
1703
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001704 /* Stop more packets from being queued */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001705 netif_stop_queue(dev);
1706
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001707 /* Disable port IRQ */
1708 imask = sky2_read32(hw, B0_IMSK);
1709 imask &= ~portirq_msk[port];
1710 sky2_write32(hw, B0_IMSK, imask);
1711
Stephen Hemminger6de16232007-10-17 13:26:42 -07001712 synchronize_irq(hw->pdev->irq);
1713
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001714 sky2_gmac_reset(hw, port);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001715
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001716 /* Stop transmitter */
1717 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1718 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1719
1720 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001721 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001722
1723 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001724 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001725 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1726
Stephen Hemminger6de16232007-10-17 13:26:42 -07001727 /* Make sure no packets are pending */
1728 napi_synchronize(&hw->napi);
1729
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001730 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1731
1732 /* Workaround shared GMAC reset */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001733 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0
1734 && port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001735 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1736
1737 /* Disable Force Sync bit and Enable Alloc bit */
1738 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1739 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1740
1741 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1742 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1743 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1744
1745 /* Reset the PCI FIFO of the async Tx queue */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001746 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1747 BMU_RST_SET | BMU_FIFO_RST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001748
1749 /* Reset the Tx prefetch units */
1750 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1751 PREF_UNIT_RST_SET);
1752
1753 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1754
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001755 sky2_rx_stop(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001756
1757 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
1758 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1759
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001760 sky2_phy_power(hw, port, 0);
1761
Stephen Hemminger55d7b4e2007-07-09 15:33:34 -07001762 netif_carrier_off(dev);
1763
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001764 /* turn off LED's */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001765 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
1766
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001767 sky2_tx_clean(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001768 sky2_rx_clean(sky2);
1769
1770 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1771 sky2->rx_le, sky2->rx_le_map);
1772 kfree(sky2->rx_ring);
1773
1774 pci_free_consistent(hw->pdev,
1775 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1776 sky2->tx_le, sky2->tx_le_map);
1777 kfree(sky2->tx_ring);
1778
Stephen Hemminger1b537562005-12-20 15:08:07 -08001779 sky2->tx_le = NULL;
1780 sky2->rx_le = NULL;
1781
1782 sky2->rx_ring = NULL;
1783 sky2->tx_ring = NULL;
1784
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001785 return 0;
1786}
1787
1788static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
1789{
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001790 if (hw->flags & SKY2_HW_FIBRE_PHY)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001791 return SPEED_1000;
1792
Stephen Hemminger05745c42007-09-19 15:36:45 -07001793 if (!(hw->flags & SKY2_HW_GIGABIT)) {
1794 if (aux & PHY_M_PS_SPEED_100)
1795 return SPEED_100;
1796 else
1797 return SPEED_10;
1798 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001799
1800 switch (aux & PHY_M_PS_SPEED_MSK) {
1801 case PHY_M_PS_SPEED_1000:
1802 return SPEED_1000;
1803 case PHY_M_PS_SPEED_100:
1804 return SPEED_100;
1805 default:
1806 return SPEED_10;
1807 }
1808}
1809
1810static void sky2_link_up(struct sky2_port *sky2)
1811{
1812 struct sky2_hw *hw = sky2->hw;
1813 unsigned port = sky2->port;
1814 u16 reg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001815 static const char *fc_name[] = {
1816 [FC_NONE] = "none",
1817 [FC_TX] = "tx",
1818 [FC_RX] = "rx",
1819 [FC_BOTH] = "both",
1820 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001821
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001822 /* enable Rx/Tx */
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001823 reg = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001824 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
1825 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001826
1827 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
1828
1829 netif_carrier_on(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001830
Stephen Hemminger75e80682007-09-19 15:36:46 -07001831 mod_timer(&hw->watchdog_timer, jiffies + 1);
Stephen Hemminger32c2c302007-08-21 14:34:03 -07001832
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001833 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001834 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001835 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
1836
1837 if (netif_msg_link(sky2))
1838 printk(KERN_INFO PFX
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001839 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001840 sky2->netdev->name, sky2->speed,
1841 sky2->duplex == DUPLEX_FULL ? "full" : "half",
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001842 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001843}
1844
1845static void sky2_link_down(struct sky2_port *sky2)
1846{
1847 struct sky2_hw *hw = sky2->hw;
1848 unsigned port = sky2->port;
1849 u16 reg;
1850
1851 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
1852
1853 reg = gma_read16(hw, port, GM_GP_CTRL);
1854 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
1855 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001856
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001857 netif_carrier_off(sky2->netdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001858
1859 /* Turn on link LED */
1860 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
1861
1862 if (netif_msg_link(sky2))
1863 printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001864
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001865 sky2_phy_init(hw, port);
1866}
1867
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001868static enum flow_control sky2_flow(int rx, int tx)
1869{
1870 if (rx)
1871 return tx ? FC_BOTH : FC_RX;
1872 else
1873 return tx ? FC_TX : FC_NONE;
1874}
1875
Stephen Hemminger793b8832005-09-14 16:06:14 -07001876static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1877{
1878 struct sky2_hw *hw = sky2->hw;
1879 unsigned port = sky2->port;
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001880 u16 advert, lpa;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001881
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001882 advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001883 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001884 if (lpa & PHY_M_AN_RF) {
1885 printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name);
1886 return -1;
1887 }
1888
Stephen Hemminger793b8832005-09-14 16:06:14 -07001889 if (!(aux & PHY_M_PS_SPDUP_RES)) {
1890 printk(KERN_ERR PFX "%s: speed/duplex mismatch",
1891 sky2->netdev->name);
1892 return -1;
1893 }
1894
Stephen Hemminger793b8832005-09-14 16:06:14 -07001895 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07001896 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001897
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001898 /* Since the pause result bits seem to in different positions on
1899 * different chips. look at registers.
1900 */
Stephen Hemmingerea76e632007-09-19 15:36:44 -07001901 if (hw->flags & SKY2_HW_FIBRE_PHY) {
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001902 /* Shift for bits in fiber PHY */
1903 advert &= ~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM);
1904 lpa &= ~(LPA_PAUSE_CAP|LPA_PAUSE_ASYM);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001905
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001906 if (advert & ADVERTISE_1000XPAUSE)
1907 advert |= ADVERTISE_PAUSE_CAP;
1908 if (advert & ADVERTISE_1000XPSE_ASYM)
1909 advert |= ADVERTISE_PAUSE_ASYM;
1910 if (lpa & LPA_1000XPAUSE)
1911 lpa |= LPA_PAUSE_CAP;
1912 if (lpa & LPA_1000XPAUSE_ASYM)
1913 lpa |= LPA_PAUSE_ASYM;
1914 }
1915
1916 sky2->flow_status = FC_NONE;
1917 if (advert & ADVERTISE_PAUSE_CAP) {
1918 if (lpa & LPA_PAUSE_CAP)
1919 sky2->flow_status = FC_BOTH;
1920 else if (advert & ADVERTISE_PAUSE_ASYM)
1921 sky2->flow_status = FC_RX;
1922 } else if (advert & ADVERTISE_PAUSE_ASYM) {
1923 if ((lpa & LPA_PAUSE_CAP) && (lpa & LPA_PAUSE_ASYM))
1924 sky2->flow_status = FC_TX;
1925 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001926
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001927 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000
Stephen Hemminger93745492007-02-06 10:45:43 -08001928 && !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX))
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001929 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001930
Stephen Hemmingerda4c1ff2007-02-15 16:40:32 -08001931 if (sky2->flow_status & FC_TX)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001932 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
1933 else
1934 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
1935
1936 return 0;
1937}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001938
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001939/* Interrupt from PHY */
1940static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001941{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001942 struct net_device *dev = hw->dev[port];
1943 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001944 u16 istatus, phystat;
1945
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001946 if (!netif_running(dev))
1947 return;
1948
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001949 spin_lock(&sky2->phy_lock);
1950 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
1951 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
1952
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001953 if (netif_msg_intr(sky2))
1954 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
1955 sky2->netdev->name, istatus, phystat);
1956
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001957 if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001958 if (sky2_autoneg_done(sky2, phystat) == 0)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001959 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001960 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001961 }
1962
Stephen Hemminger793b8832005-09-14 16:06:14 -07001963 if (istatus & PHY_M_IS_LSP_CHANGE)
1964 sky2->speed = sky2_phy_speed(hw, phystat);
1965
1966 if (istatus & PHY_M_IS_DUP_CHANGE)
1967 sky2->duplex =
1968 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
1969
1970 if (istatus & PHY_M_IS_LST_CHANGE) {
1971 if (phystat & PHY_M_PS_LINK_UP)
1972 sky2_link_up(sky2);
1973 else
1974 sky2_link_down(sky2);
1975 }
1976out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001977 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001978}
1979
Stephen Hemminger62335ab2007-02-06 10:45:42 -08001980/* Transmit timeout is only called if we are running, carrier is up
Stephen Hemminger302d1252006-01-17 13:43:20 -08001981 * and tx queue is full (stopped).
1982 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001983static void sky2_tx_timeout(struct net_device *dev)
1984{
1985 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001986 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001987
1988 if (netif_msg_timer(sky2))
1989 printk(KERN_ERR PFX "%s: tx timeout\n", dev->name);
1990
Stephen Hemminger8f246642006-03-20 15:48:21 -08001991 printk(KERN_DEBUG PFX "%s: transmit ring %u .. %u report=%u done=%u\n",
Stephen Hemminger62335ab2007-02-06 10:45:42 -08001992 dev->name, sky2->tx_cons, sky2->tx_prod,
1993 sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
1994 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001995
Stephen Hemminger81906792007-02-15 16:40:33 -08001996 /* can't restart safely under softirq */
1997 schedule_work(&hw->restart_work);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001998}
1999
2000static int sky2_change_mtu(struct net_device *dev, int new_mtu)
2001{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002002 struct sky2_port *sky2 = netdev_priv(dev);
2003 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002004 unsigned port = sky2->port;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002005 int err;
2006 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002007 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002008
2009 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
2010 return -EINVAL;
2011
Stephen Hemminger05745c42007-09-19 15:36:45 -07002012 if (new_mtu > ETH_DATA_LEN &&
2013 (hw->chip_id == CHIP_ID_YUKON_FE ||
2014 hw->chip_id == CHIP_ID_YUKON_FE_P))
Stephen Hemmingerd2adf4f2007-04-11 14:48:02 -07002015 return -EINVAL;
2016
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002017 if (!netif_running(dev)) {
2018 dev->mtu = new_mtu;
2019 return 0;
2020 }
2021
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002022 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002023 sky2_write32(hw, B0_IMSK, 0);
2024
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002025 dev->trans_start = jiffies; /* prevent tx timeout */
2026 netif_stop_queue(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002027 napi_disable(&hw->napi);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002028
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002029 synchronize_irq(hw->pdev->irq);
2030
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002031 if (!(hw->flags & SKY2_HW_RAM_BUFFER))
Stephen Hemminger69161612007-06-04 17:23:26 -07002032 sky2_set_tx_stfwd(hw, port);
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002033
2034 ctl = gma_read16(hw, port, GM_GP_CTRL);
2035 gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002036 sky2_rx_stop(sky2);
2037 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002038
2039 dev->mtu = new_mtu;
Stephen Hemminger14d02632006-09-26 11:57:43 -07002040
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002041 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
2042 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002043
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002044 if (dev->mtu > ETH_DATA_LEN)
2045 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002046
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002047 gma_write16(hw, port, GM_SERIAL_MODE, mode);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002048
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002049 sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07002050
2051 err = sky2_rx_start(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002052 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08002053
David S. Millerd1d08d12008-01-07 20:53:33 -08002054 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002055 napi_enable(&hw->napi);
2056
Stephen Hemminger1b537562005-12-20 15:08:07 -08002057 if (err)
2058 dev_close(dev);
2059 else {
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07002060 gma_write16(hw, port, GM_GP_CTRL, ctl);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002061
Stephen Hemminger1b537562005-12-20 15:08:07 -08002062 netif_wake_queue(dev);
2063 }
2064
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002065 return err;
2066}
2067
Stephen Hemminger14d02632006-09-26 11:57:43 -07002068/* For small just reuse existing skb for next receive */
2069static struct sk_buff *receive_copy(struct sky2_port *sky2,
2070 const struct rx_ring_info *re,
2071 unsigned length)
2072{
2073 struct sk_buff *skb;
2074
2075 skb = netdev_alloc_skb(sky2->netdev, length + 2);
2076 if (likely(skb)) {
2077 skb_reserve(skb, 2);
2078 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
2079 length, PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -03002080 skb_copy_from_linear_data(re->skb, skb->data, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002081 skb->ip_summed = re->skb->ip_summed;
2082 skb->csum = re->skb->csum;
2083 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
2084 length, PCI_DMA_FROMDEVICE);
2085 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002086 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002087 }
2088 return skb;
2089}
2090
2091/* Adjust length of skb with fragments to match received data */
2092static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
2093 unsigned int length)
2094{
2095 int i, num_frags;
2096 unsigned int size;
2097
2098 /* put header into skb */
2099 size = min(length, hdr_space);
2100 skb->tail += size;
2101 skb->len += size;
2102 length -= size;
2103
2104 num_frags = skb_shinfo(skb)->nr_frags;
2105 for (i = 0; i < num_frags; i++) {
2106 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2107
2108 if (length == 0) {
2109 /* don't need this page */
2110 __free_page(frag->page);
2111 --skb_shinfo(skb)->nr_frags;
2112 } else {
2113 size = min(length, (unsigned) PAGE_SIZE);
2114
2115 frag->size = size;
2116 skb->data_len += size;
2117 skb->truesize += size;
2118 skb->len += size;
2119 length -= size;
2120 }
2121 }
2122}
2123
2124/* Normal packet - take skb from ring element and put in a new one */
2125static struct sk_buff *receive_new(struct sky2_port *sky2,
2126 struct rx_ring_info *re,
2127 unsigned int length)
2128{
2129 struct sk_buff *skb, *nskb;
2130 unsigned hdr_space = sky2->rx_data_size;
2131
Stephen Hemminger14d02632006-09-26 11:57:43 -07002132 /* Don't be tricky about reusing pages (yet) */
2133 nskb = sky2_rx_alloc(sky2);
2134 if (unlikely(!nskb))
2135 return NULL;
2136
2137 skb = re->skb;
2138 sky2_rx_unmap_skb(sky2->hw->pdev, re);
2139
2140 prefetch(skb->data);
2141 re->skb = nskb;
2142 sky2_rx_map_skb(sky2->hw->pdev, re, hdr_space);
2143
2144 if (skb_shinfo(skb)->nr_frags)
2145 skb_put_frags(skb, hdr_space, length);
2146 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002147 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002148 return skb;
2149}
2150
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002151/*
2152 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002153 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002154 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002155static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002156 u16 length, u32 status)
2157{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002158 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002159 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002160 struct sk_buff *skb = NULL;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002161 u16 count = (status & GMR_FS_LEN) >> 16;
2162
2163#ifdef SKY2_VLAN_TAG_USED
2164 /* Account for vlan tag */
2165 if (sky2->vlgrp && (status & GMR_FS_VLAN))
2166 count -= VLAN_HLEN;
2167#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002168
2169 if (unlikely(netif_msg_rx_status(sky2)))
2170 printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002171 dev->name, sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002172
Stephen Hemminger793b8832005-09-14 16:06:14 -07002173 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002174 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002175
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002176 /* This chip has hardware problems that generates bogus status.
2177 * So do only marginal checking and expect higher level protocols
2178 * to handle crap frames.
2179 */
2180 if (sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
2181 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0 &&
2182 length != count)
2183 goto okay;
2184
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002185 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002186 goto error;
2187
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002188 if (!(status & GMR_FS_RX_OK))
2189 goto resubmit;
2190
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002191 /* if length reported by DMA does not match PHY, packet was truncated */
2192 if (length != count)
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002193 goto len_error;
Stephen Hemminger71749532007-07-09 15:33:40 -07002194
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002195okay:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002196 if (length < copybreak)
2197 skb = receive_copy(sky2, re, length);
2198 else
2199 skb = receive_new(sky2, re, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002200resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002201 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002202
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002203 return skb;
2204
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002205len_error:
Stephen Hemminger71749532007-07-09 15:33:40 -07002206 /* Truncation of overlength packets
2207 causes PHY length to not match MAC length */
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002208 ++dev->stats.rx_length_errors;
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002209 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemminger3b12e012007-09-26 17:58:47 -07002210 pr_info(PFX "%s: rx length error: status %#x length %d\n",
2211 dev->name, status, length);
Stephen Hemmingerd6532232007-09-19 15:36:42 -07002212 goto resubmit;
Stephen Hemminger71749532007-07-09 15:33:40 -07002213
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002214error:
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002215 ++dev->stats.rx_errors;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002216 if (status & GMR_FS_RX_FF_OV) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002217 dev->stats.rx_over_errors++;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002218 goto resubmit;
2219 }
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002220
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002221 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002222 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002223 dev->name, status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002224
2225 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002226 dev->stats.rx_length_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002227 if (status & GMR_FS_FRAGMENT)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002228 dev->stats.rx_frame_errors++;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002229 if (status & GMR_FS_CRC_ERR)
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002230 dev->stats.rx_crc_errors++;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002231
Stephen Hemminger793b8832005-09-14 16:06:14 -07002232 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002233}
2234
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002235/* Transmit complete */
2236static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002237{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002238 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002239
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002240 if (netif_running(dev)) {
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002241 netif_tx_lock(dev);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002242 sky2_tx_complete(sky2, last);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002243 netif_tx_unlock(dev);
shemminger@osdl.org22247952005-11-30 11:45:19 -08002244 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002245}
2246
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002247/* Process status response ring */
Stephen Hemminger26691832007-10-11 18:31:13 -07002248static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002249{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002250 int work_done = 0;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002251 unsigned rx[2] = { 0, 0 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002252
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002253 rmb();
Stephen Hemminger26691832007-10-11 18:31:13 -07002254 do {
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002255 struct sky2_port *sky2;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002256 struct sky2_status_le *le = hw->st_le + hw->st_idx;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002257 unsigned port;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002258 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002259 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002260 u32 status;
2261 u16 length;
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002262 u8 opcode = le->opcode;
2263
2264 if (!(opcode & HW_OWNER))
2265 break;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002266
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07002267 hw->st_idx = RING_NEXT(hw->st_idx, STATUS_RING_SIZE);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002268
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002269 port = le->css & CSS_LINK_BIT;
Stephen Hemminger69161612007-06-04 17:23:26 -07002270 dev = hw->dev[port];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002271 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002272 length = le16_to_cpu(le->length);
2273 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002274
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002275 le->opcode = 0;
2276 switch (opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002277 case OP_RXSTAT:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002278 ++rx[port];
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002279 skb = sky2_receive(dev, length, status);
Stephen Hemminger3225b912007-05-14 12:38:12 -07002280 if (unlikely(!skb)) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002281 dev->stats.rx_dropped++;
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002282 break;
Stephen Hemminger3225b912007-05-14 12:38:12 -07002283 }
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002284
Stephen Hemminger69161612007-06-04 17:23:26 -07002285 /* This chip reports checksum status differently */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002286 if (hw->flags & SKY2_HW_NEW_LE) {
Stephen Hemminger69161612007-06-04 17:23:26 -07002287 if (sky2->rx_csum &&
2288 (le->css & (CSS_ISIPV4 | CSS_ISIPV6)) &&
2289 (le->css & CSS_TCPUDPCSOK))
2290 skb->ip_summed = CHECKSUM_UNNECESSARY;
2291 else
2292 skb->ip_summed = CHECKSUM_NONE;
2293 }
2294
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002295 skb->protocol = eth_type_trans(skb, dev);
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002296 dev->stats.rx_packets++;
2297 dev->stats.rx_bytes += skb->len;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002298 dev->last_rx = jiffies;
2299
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002300#ifdef SKY2_VLAN_TAG_USED
2301 if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
2302 vlan_hwaccel_receive_skb(skb,
2303 sky2->vlgrp,
2304 be16_to_cpu(sky2->rx_tag));
2305 } else
2306#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002307 netif_receive_skb(skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002308
Stephen Hemminger22e11702006-07-12 15:23:48 -07002309 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002310 if (++work_done >= to_do)
2311 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002312 break;
2313
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002314#ifdef SKY2_VLAN_TAG_USED
2315 case OP_RXVLAN:
2316 sky2->rx_tag = length;
2317 break;
2318
2319 case OP_RXCHKSVLAN:
2320 sky2->rx_tag = length;
2321 /* fall through */
2322#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002323 case OP_RXCHKS:
Stephen Hemminger87418302007-03-08 12:42:30 -08002324 if (!sky2->rx_csum)
2325 break;
2326
Stephen Hemminger05745c42007-09-19 15:36:45 -07002327 /* If this happens then driver assuming wrong format */
2328 if (unlikely(hw->flags & SKY2_HW_NEW_LE)) {
2329 if (net_ratelimit())
2330 printk(KERN_NOTICE "%s: unexpected"
2331 " checksum status\n",
2332 dev->name);
Stephen Hemminger69161612007-06-04 17:23:26 -07002333 break;
Stephen Hemminger05745c42007-09-19 15:36:45 -07002334 }
Stephen Hemminger69161612007-06-04 17:23:26 -07002335
Stephen Hemminger87418302007-03-08 12:42:30 -08002336 /* Both checksum counters are programmed to start at
2337 * the same offset, so unless there is a problem they
2338 * should match. This failure is an early indication that
2339 * hardware receive checksumming won't work.
2340 */
2341 if (likely(status >> 16 == (status & 0xffff))) {
2342 skb = sky2->rx_ring[sky2->rx_next].skb;
2343 skb->ip_summed = CHECKSUM_COMPLETE;
2344 skb->csum = status & 0xffff;
2345 } else {
2346 printk(KERN_NOTICE PFX "%s: hardware receive "
2347 "checksum problem (status = %#x)\n",
2348 dev->name, status);
2349 sky2->rx_csum = 0;
2350 sky2_write32(sky2->hw,
Stephen Hemminger69161612007-06-04 17:23:26 -07002351 Q_ADDR(rxqaddr[port], Q_CSR),
Stephen Hemminger87418302007-03-08 12:42:30 -08002352 BMU_DIS_RX_CHKSUM);
2353 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002354 break;
2355
2356 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002357 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002358 BUILD_BUG_ON(TX_RING_SIZE > 0x1000);
2359 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002360 if (hw->dev[1])
2361 sky2_tx_done(hw->dev[1],
2362 ((status >> 24) & 0xff)
2363 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002364 break;
2365
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002366 default:
2367 if (net_ratelimit())
Stephen Hemminger793b8832005-09-14 16:06:14 -07002368 printk(KERN_WARNING PFX
Stephen Hemmingerab5adec2007-11-05 15:52:09 -08002369 "unknown status opcode 0x%x\n", opcode);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002370 }
Stephen Hemminger26691832007-10-11 18:31:13 -07002371 } while (hw->st_idx != idx);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002372
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002373 /* Fully processed status ring so clear irq */
2374 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2375
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002376exit_loop:
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002377 if (rx[0])
2378 sky2_rx_update(netdev_priv(hw->dev[0]), Q_R1);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002379
Stephen Hemminger55c9dd32007-07-09 15:33:37 -07002380 if (rx[1])
2381 sky2_rx_update(netdev_priv(hw->dev[1]), Q_R2);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002382
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002383 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002384}
2385
2386static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2387{
2388 struct net_device *dev = hw->dev[port];
2389
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002390 if (net_ratelimit())
2391 printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
2392 dev->name, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002393
2394 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002395 if (net_ratelimit())
2396 printk(KERN_ERR PFX "%s: ram data read parity error\n",
2397 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002398 /* Clear IRQ */
2399 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2400 }
2401
2402 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002403 if (net_ratelimit())
2404 printk(KERN_ERR PFX "%s: ram data write parity error\n",
2405 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002406
2407 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2408 }
2409
2410 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002411 if (net_ratelimit())
2412 printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002413 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2414 }
2415
2416 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002417 if (net_ratelimit())
2418 printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002419 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2420 }
2421
2422 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002423 if (net_ratelimit())
2424 printk(KERN_ERR PFX "%s: TCP segmentation error\n",
2425 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002426 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2427 }
2428}
2429
2430static void sky2_hw_intr(struct sky2_hw *hw)
2431{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002432 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002433 u32 status = sky2_read32(hw, B0_HWE_ISRC);
Stephen Hemminger555382c2007-08-29 12:58:14 -07002434 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2435
2436 status &= hwmsk;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002437
Stephen Hemminger793b8832005-09-14 16:06:14 -07002438 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002439 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002440
2441 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002442 u16 pci_err;
2443
Stephen Hemminger82637e82008-01-23 19:16:04 -08002444 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002445 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002446 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002447 dev_err(&pdev->dev, "PCI hardware error (0x%x)\n",
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002448 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002449
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002450 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002451 pci_err | PCI_STATUS_ERROR_BITS);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002452 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002453 }
2454
2455 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002456 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger555382c2007-08-29 12:58:14 -07002457 u32 err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002458
Stephen Hemminger82637e82008-01-23 19:16:04 -08002459 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002460 err = sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
2461 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2462 0xfffffffful);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002463 if (net_ratelimit())
Stephen Hemminger555382c2007-08-29 12:58:14 -07002464 dev_err(&pdev->dev, "PCI Express error (0x%x)\n", err);
Stephen Hemmingercf06ffb2007-11-05 15:52:13 -08002465
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002466 sky2_read32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002467 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002468 }
2469
2470 if (status & Y2_HWE_L1_MASK)
2471 sky2_hw_error(hw, 0, status);
2472 status >>= 8;
2473 if (status & Y2_HWE_L1_MASK)
2474 sky2_hw_error(hw, 1, status);
2475}
2476
2477static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2478{
2479 struct net_device *dev = hw->dev[port];
2480 struct sky2_port *sky2 = netdev_priv(dev);
2481 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2482
2483 if (netif_msg_intr(sky2))
2484 printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n",
2485 dev->name, status);
2486
Stephen Hemmingera3caead2007-05-14 12:38:13 -07002487 if (status & GM_IS_RX_CO_OV)
2488 gma_read16(hw, port, GM_RX_IRQ_SRC);
2489
2490 if (status & GM_IS_TX_CO_OV)
2491 gma_read16(hw, port, GM_TX_IRQ_SRC);
2492
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002493 if (status & GM_IS_RX_FF_OR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002494 ++dev->stats.rx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002495 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2496 }
2497
2498 if (status & GM_IS_TX_FF_UR) {
Stephen Hemminger7138a0f2007-10-11 19:48:22 -07002499 ++dev->stats.tx_fifo_errors;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002500 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2501 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002502}
2503
Stephen Hemminger40b01722007-04-11 14:47:59 -07002504/* This should never happen it is a bug. */
2505static void sky2_le_error(struct sky2_hw *hw, unsigned port,
2506 u16 q, unsigned ring_size)
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002507{
2508 struct net_device *dev = hw->dev[port];
2509 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002510 unsigned idx;
2511 const u64 *le = (q == Q_R1 || q == Q_R2)
2512 ? (u64 *) sky2->rx_le : (u64 *) sky2->tx_le;
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002513
Stephen Hemminger40b01722007-04-11 14:47:59 -07002514 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX));
2515 printk(KERN_ERR PFX "%s: descriptor error q=%#x get=%u [%llx] put=%u\n",
2516 dev->name, (unsigned) q, idx, (unsigned long long) le[idx],
2517 (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX)));
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002518
Stephen Hemminger40b01722007-04-11 14:47:59 -07002519 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002520}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002521
Stephen Hemminger75e80682007-09-19 15:36:46 -07002522static int sky2_rx_hung(struct net_device *dev)
2523{
2524 struct sky2_port *sky2 = netdev_priv(dev);
2525 struct sky2_hw *hw = sky2->hw;
2526 unsigned port = sky2->port;
2527 unsigned rxq = rxqaddr[port];
2528 u32 mac_rp = sky2_read32(hw, SK_REG(port, RX_GMF_RP));
2529 u8 mac_lev = sky2_read8(hw, SK_REG(port, RX_GMF_RLEV));
2530 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2531 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2532
2533 /* If idle and MAC or PCI is stuck */
2534 if (sky2->check.last == dev->last_rx &&
2535 ((mac_rp == sky2->check.mac_rp &&
2536 mac_lev != 0 && mac_lev >= sky2->check.mac_lev) ||
2537 /* Check if the PCI RX hang */
2538 (fifo_rp == sky2->check.fifo_rp &&
2539 fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) {
2540 printk(KERN_DEBUG PFX "%s: hung mac %d:%d fifo %d (%d:%d)\n",
2541 dev->name, mac_lev, mac_rp, fifo_lev, fifo_rp,
2542 sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
2543 return 1;
2544 } else {
2545 sky2->check.last = dev->last_rx;
2546 sky2->check.mac_rp = mac_rp;
2547 sky2->check.mac_lev = mac_lev;
2548 sky2->check.fifo_rp = fifo_rp;
2549 sky2->check.fifo_lev = fifo_lev;
2550 return 0;
2551 }
2552}
2553
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002554static void sky2_watchdog(unsigned long arg)
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002555{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002556 struct sky2_hw *hw = (struct sky2_hw *) arg;
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002557
Stephen Hemminger75e80682007-09-19 15:36:46 -07002558 /* Check for lost IRQ once a second */
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002559 if (sky2_read32(hw, B0_ISRC)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002560 napi_schedule(&hw->napi);
Stephen Hemminger75e80682007-09-19 15:36:46 -07002561 } else {
2562 int i, active = 0;
2563
2564 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002565 struct net_device *dev = hw->dev[i];
Stephen Hemminger75e80682007-09-19 15:36:46 -07002566 if (!netif_running(dev))
2567 continue;
2568 ++active;
2569
2570 /* For chips with Rx FIFO, check if stuck */
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002571 if ((hw->flags & SKY2_HW_RAM_BUFFER) &&
Stephen Hemminger75e80682007-09-19 15:36:46 -07002572 sky2_rx_hung(dev)) {
2573 pr_info(PFX "%s: receiver hang detected\n",
2574 dev->name);
2575 schedule_work(&hw->restart_work);
2576 return;
2577 }
2578 }
2579
2580 if (active == 0)
2581 return;
Stephen Hemminger32c2c302007-08-21 14:34:03 -07002582 }
2583
Stephen Hemminger75e80682007-09-19 15:36:46 -07002584 mod_timer(&hw->watchdog_timer, round_jiffies(jiffies + HZ));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002585}
2586
Stephen Hemminger40b01722007-04-11 14:47:59 -07002587/* Hardware/software error handling */
2588static void sky2_err_intr(struct sky2_hw *hw, u32 status)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002589{
Stephen Hemminger40b01722007-04-11 14:47:59 -07002590 if (net_ratelimit())
2591 dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002592
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002593 if (status & Y2_IS_HW_ERR)
2594 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002595
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002596 if (status & Y2_IS_IRQ_MAC1)
2597 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002598
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002599 if (status & Y2_IS_IRQ_MAC2)
2600 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002601
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002602 if (status & Y2_IS_CHK_RX1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002603 sky2_le_error(hw, 0, Q_R1, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002604
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002605 if (status & Y2_IS_CHK_RX2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002606 sky2_le_error(hw, 1, Q_R2, RX_LE_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002607
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002608 if (status & Y2_IS_CHK_TXA1)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002609 sky2_le_error(hw, 0, Q_XA1, TX_RING_SIZE);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002610
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002611 if (status & Y2_IS_CHK_TXA2)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002612 sky2_le_error(hw, 1, Q_XA2, TX_RING_SIZE);
2613}
2614
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002615static int sky2_poll(struct napi_struct *napi, int work_limit)
Stephen Hemminger40b01722007-04-11 14:47:59 -07002616{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002617 struct sky2_hw *hw = container_of(napi, struct sky2_hw, napi);
Stephen Hemminger40b01722007-04-11 14:47:59 -07002618 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
David S. Miller6f535762007-10-11 18:08:29 -07002619 int work_done = 0;
Stephen Hemminger26691832007-10-11 18:31:13 -07002620 u16 idx;
Stephen Hemminger40b01722007-04-11 14:47:59 -07002621
2622 if (unlikely(status & Y2_IS_ERROR))
2623 sky2_err_intr(hw, status);
2624
2625 if (status & Y2_IS_IRQ_PHY1)
2626 sky2_phy_intr(hw, 0);
2627
2628 if (status & Y2_IS_IRQ_PHY2)
2629 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002630
Stephen Hemminger26691832007-10-11 18:31:13 -07002631 while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) {
2632 work_done += sky2_status_intr(hw, work_limit - work_done, idx);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002633
David S. Miller6f535762007-10-11 18:08:29 -07002634 if (work_done >= work_limit)
Stephen Hemminger26691832007-10-11 18:31:13 -07002635 goto done;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002636 }
David S. Miller6f535762007-10-11 18:08:29 -07002637
Stephen Hemminger26691832007-10-11 18:31:13 -07002638 /* Bug/Errata workaround?
2639 * Need to kick the TX irq moderation timer.
2640 */
2641 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_START) {
2642 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
2643 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2644 }
2645 napi_complete(napi);
2646 sky2_read32(hw, B0_Y2_SP_LISR);
2647done:
2648
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002649 return work_done;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002650}
2651
David Howells7d12e782006-10-05 14:55:46 +01002652static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002653{
2654 struct sky2_hw *hw = dev_id;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002655 u32 status;
2656
2657 /* Reading this mask interrupts as side effect */
2658 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2659 if (status == 0 || status == ~0)
2660 return IRQ_NONE;
2661
2662 prefetch(&hw->st_le[hw->st_idx]);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002663
2664 napi_schedule(&hw->napi);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002665
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002666 return IRQ_HANDLED;
2667}
2668
2669#ifdef CONFIG_NET_POLL_CONTROLLER
2670static void sky2_netpoll(struct net_device *dev)
2671{
2672 struct sky2_port *sky2 = netdev_priv(dev);
2673
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002674 napi_schedule(&sky2->hw->napi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002675}
2676#endif
2677
2678/* Chip internal frequency for clock calculations */
Stephen Hemminger05745c42007-09-19 15:36:45 -07002679static u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002680{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002681 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002682 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002683 case CHIP_ID_YUKON_EC_U:
Stephen Hemminger93745492007-02-06 10:45:43 -08002684 case CHIP_ID_YUKON_EX:
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002685 case CHIP_ID_YUKON_SUPR:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002686 return 125;
2687
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002688 case CHIP_ID_YUKON_FE:
Stephen Hemminger05745c42007-09-19 15:36:45 -07002689 return 100;
2690
2691 case CHIP_ID_YUKON_FE_P:
2692 return 50;
2693
2694 case CHIP_ID_YUKON_XL:
2695 return 156;
2696
2697 default:
2698 BUG();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002699 }
2700}
2701
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002702static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2703{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002704 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002705}
2706
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002707static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2708{
2709 return clk / sky2_mhz(hw);
2710}
2711
2712
Stephen Hemmingere3173832007-02-06 10:45:39 -08002713static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002714{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002715 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002716
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002717 /* Enable all clocks and check for bad PCI access */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002718 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger451af332007-06-04 17:23:24 -07002719
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002720 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08002721
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002722 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002723 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
2724
2725 switch(hw->chip_id) {
2726 case CHIP_ID_YUKON_XL:
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002727 hw->flags = SKY2_HW_GIGABIT | SKY2_HW_NEWER_PHY;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002728 break;
2729
2730 case CHIP_ID_YUKON_EC_U:
2731 hw->flags = SKY2_HW_GIGABIT
2732 | SKY2_HW_NEWER_PHY
2733 | SKY2_HW_ADV_POWER_CTL;
2734 break;
2735
2736 case CHIP_ID_YUKON_EX:
2737 hw->flags = SKY2_HW_GIGABIT
2738 | SKY2_HW_NEWER_PHY
2739 | SKY2_HW_NEW_LE
2740 | SKY2_HW_ADV_POWER_CTL;
2741
2742 /* New transmit checksum */
2743 if (hw->chip_rev != CHIP_REV_YU_EX_B0)
2744 hw->flags |= SKY2_HW_AUTO_TX_SUM;
2745 break;
2746
2747 case CHIP_ID_YUKON_EC:
2748 /* This rev is really old, and requires untested workarounds */
2749 if (hw->chip_rev == CHIP_REV_YU_EC_A1) {
2750 dev_err(&hw->pdev->dev, "unsupported revision Yukon-EC rev A1\n");
2751 return -EOPNOTSUPP;
2752 }
Stephen Hemminger39dbd952008-02-04 19:45:13 -08002753 hw->flags = SKY2_HW_GIGABIT;
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002754 break;
2755
2756 case CHIP_ID_YUKON_FE:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002757 break;
2758
Stephen Hemminger05745c42007-09-19 15:36:45 -07002759 case CHIP_ID_YUKON_FE_P:
2760 hw->flags = SKY2_HW_NEWER_PHY
2761 | SKY2_HW_NEW_LE
2762 | SKY2_HW_AUTO_TX_SUM
2763 | SKY2_HW_ADV_POWER_CTL;
2764 break;
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002765
2766 case CHIP_ID_YUKON_SUPR:
2767 hw->flags = SKY2_HW_GIGABIT
2768 | SKY2_HW_NEWER_PHY
2769 | SKY2_HW_NEW_LE
2770 | SKY2_HW_AUTO_TX_SUM
2771 | SKY2_HW_ADV_POWER_CTL;
2772 break;
2773
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002774 default:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002775 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
2776 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002777 return -EOPNOTSUPP;
2778 }
2779
Stephen Hemmingere3173832007-02-06 10:45:39 -08002780 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07002781 if (hw->pmd_type == 'L' || hw->pmd_type == 'S' || hw->pmd_type == 'P')
2782 hw->flags |= SKY2_HW_FIBRE_PHY;
2783
2784
Stephen Hemmingere3173832007-02-06 10:45:39 -08002785 hw->ports = 1;
2786 t8 = sky2_read8(hw, B2_Y2_HW_RES);
2787 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
2788 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
2789 ++hw->ports;
2790 }
2791
2792 return 0;
2793}
2794
2795static void sky2_reset(struct sky2_hw *hw)
2796{
Stephen Hemminger555382c2007-08-29 12:58:14 -07002797 struct pci_dev *pdev = hw->pdev;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002798 u16 status;
Stephen Hemminger555382c2007-08-29 12:58:14 -07002799 int i, cap;
2800 u32 hwe_mask = Y2_HWE_ALL_MASK;
Stephen Hemmingere3173832007-02-06 10:45:39 -08002801
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002802 /* disable ASF */
Stephen Hemminger4f44d8b2007-04-11 14:48:00 -07002803 if (hw->chip_id == CHIP_ID_YUKON_EX) {
2804 status = sky2_read16(hw, HCU_CCSR);
2805 status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE |
2806 HCU_CCSR_UC_STATE_MSK);
2807 sky2_write16(hw, HCU_CCSR, status);
2808 } else
2809 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
2810 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002811
2812 /* do a SW reset */
2813 sky2_write8(hw, B0_CTST, CS_RST_SET);
2814 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2815
Stephen Hemmingerac93a392007-11-05 15:52:08 -08002816 /* allow writes to PCI config */
2817 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
2818
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002819 /* clear PCI errors, if any */
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002820 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07002821 status |= PCI_STATUS_ERROR_BITS;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08002822 sky2_pci_write16(hw, PCI_STATUS, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002823
2824 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2825
Stephen Hemminger555382c2007-08-29 12:58:14 -07002826 cap = pci_find_capability(pdev, PCI_CAP_ID_EXP);
2827 if (cap) {
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002828 sky2_write32(hw, Y2_CFG_AER + PCI_ERR_UNCOR_STATUS,
2829 0xfffffffful);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002830
Stephen Hemminger555382c2007-08-29 12:58:14 -07002831 /* If error bit is stuck on ignore it */
2832 if (sky2_read32(hw, B0_HWE_ISRC) & Y2_IS_PCI_EXP)
2833 dev_info(&pdev->dev, "ignoring stuck error report bit\n");
Stephen Hemminger7782c8c2007-11-27 11:02:32 -08002834 else
Stephen Hemminger555382c2007-08-29 12:58:14 -07002835 hwe_mask |= Y2_IS_PCI_EXP;
2836 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002837
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08002838 sky2_power_on(hw);
Stephen Hemminger82637e82008-01-23 19:16:04 -08002839 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002840
2841 for (i = 0; i < hw->ports; i++) {
2842 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
2843 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
Stephen Hemminger69161612007-06-04 17:23:26 -07002844
Stephen Hemmingered4d4162008-01-10 16:14:14 -08002845 if (hw->chip_id == CHIP_ID_YUKON_EX ||
2846 hw->chip_id == CHIP_ID_YUKON_SUPR)
Stephen Hemminger69161612007-06-04 17:23:26 -07002847 sky2_write16(hw, SK_REG(i, GMAC_CTRL),
2848 GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON
2849 | GMC_BYP_RETR_ON);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002850 }
2851
Stephen Hemminger793b8832005-09-14 16:06:14 -07002852 /* Clear I2C IRQ noise */
2853 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002854
2855 /* turn off hardware timer (unused) */
2856 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
2857 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002858
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002859 sky2_write8(hw, B0_Y2LED, LED_STAT_ON);
2860
Stephen Hemminger69634ee2005-12-09 11:35:06 -08002861 /* Turn off descriptor polling */
2862 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002863
2864 /* Turn off receive timestamp */
2865 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002866 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002867
2868 /* enable the Tx Arbiters */
2869 for (i = 0; i < hw->ports; i++)
2870 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
2871
2872 /* Initialize ram interface */
2873 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002874 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002875
2876 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
2877 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
2878 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
2879 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
2880 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
2881 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
2882 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
2883 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
2884 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
2885 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
2886 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
2887 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
2888 }
2889
Stephen Hemminger555382c2007-08-29 12:58:14 -07002890 sky2_write32(hw, B0_HWE_IMSK, hwe_mask);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002891
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002892 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07002893 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002894
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002895 memset(hw->st_le, 0, STATUS_LE_BYTES);
2896 hw->st_idx = 0;
2897
2898 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
2899 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
2900
2901 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002902 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002903
2904 /* Set the list last index */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002905 sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002906
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002907 sky2_write16(hw, STAT_TX_IDX_TH, 10);
2908 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002909
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002910 /* set Status-FIFO ISR watermark */
2911 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
2912 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
2913 else
2914 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002915
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002916 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08002917 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
2918 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002919
Stephen Hemminger793b8832005-09-14 16:06:14 -07002920 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002921 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
2922
2923 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2924 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
2925 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08002926}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002927
Stephen Hemminger81906792007-02-15 16:40:33 -08002928static void sky2_restart(struct work_struct *work)
2929{
2930 struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work);
2931 struct net_device *dev;
2932 int i, err;
2933
Stephen Hemminger81906792007-02-15 16:40:33 -08002934 rtnl_lock();
Stephen Hemminger81906792007-02-15 16:40:33 -08002935 for (i = 0; i < hw->ports; i++) {
2936 dev = hw->dev[i];
2937 if (netif_running(dev))
2938 sky2_down(dev);
2939 }
2940
Stephen Hemminger8cfcbe92007-12-03 17:02:17 -08002941 napi_disable(&hw->napi);
2942 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger81906792007-02-15 16:40:33 -08002943 sky2_reset(hw);
2944 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07002945 napi_enable(&hw->napi);
Stephen Hemminger81906792007-02-15 16:40:33 -08002946
2947 for (i = 0; i < hw->ports; i++) {
2948 dev = hw->dev[i];
2949 if (netif_running(dev)) {
2950 err = sky2_up(dev);
2951 if (err) {
2952 printk(KERN_INFO PFX "%s: could not restart %d\n",
2953 dev->name, err);
2954 dev_close(dev);
2955 }
2956 }
2957 }
2958
Stephen Hemminger81906792007-02-15 16:40:33 -08002959 rtnl_unlock();
2960}
2961
Stephen Hemmingere3173832007-02-06 10:45:39 -08002962static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
2963{
2964 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
2965}
2966
2967static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2968{
2969 const struct sky2_port *sky2 = netdev_priv(dev);
2970
2971 wol->supported = sky2_wol_supported(sky2->hw);
2972 wol->wolopts = sky2->wol;
2973}
2974
2975static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2976{
2977 struct sky2_port *sky2 = netdev_priv(dev);
2978 struct sky2_hw *hw = sky2->hw;
2979
2980 if (wol->wolopts & ~sky2_wol_supported(sky2->hw))
2981 return -EOPNOTSUPP;
2982
2983 sky2->wol = wol->wolopts;
2984
Stephen Hemminger05745c42007-09-19 15:36:45 -07002985 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
2986 hw->chip_id == CHIP_ID_YUKON_EX ||
2987 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingere3173832007-02-06 10:45:39 -08002988 sky2_write32(hw, B0_CTST, sky2->wol
2989 ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
2990
2991 if (!netif_running(dev))
2992 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002993 return 0;
2994}
2995
Stephen Hemminger28bd1812006-01-17 13:43:19 -08002996static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002997{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002998 if (sky2_is_copper(hw)) {
2999 u32 modes = SUPPORTED_10baseT_Half
3000 | SUPPORTED_10baseT_Full
3001 | SUPPORTED_100baseT_Half
3002 | SUPPORTED_100baseT_Full
3003 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003004
Stephen Hemmingerea76e632007-09-19 15:36:44 -07003005 if (hw->flags & SKY2_HW_GIGABIT)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003006 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003007 | SUPPORTED_1000baseT_Full;
3008 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003009 } else
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003010 return SUPPORTED_1000baseT_Half
3011 | SUPPORTED_1000baseT_Full
3012 | SUPPORTED_Autoneg
3013 | SUPPORTED_FIBRE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003014}
3015
Stephen Hemminger793b8832005-09-14 16:06:14 -07003016static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003017{
3018 struct sky2_port *sky2 = netdev_priv(dev);
3019 struct sky2_hw *hw = sky2->hw;
3020
3021 ecmd->transceiver = XCVR_INTERNAL;
3022 ecmd->supported = sky2_supported_modes(hw);
3023 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003024 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003025 ecmd->port = PORT_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003026 ecmd->speed = sky2->speed;
3027 } else {
3028 ecmd->speed = SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003029 ecmd->port = PORT_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07003030 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003031
3032 ecmd->advertising = sky2->advertising;
3033 ecmd->autoneg = sky2->autoneg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003034 ecmd->duplex = sky2->duplex;
3035 return 0;
3036}
3037
3038static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
3039{
3040 struct sky2_port *sky2 = netdev_priv(dev);
3041 const struct sky2_hw *hw = sky2->hw;
3042 u32 supported = sky2_supported_modes(hw);
3043
3044 if (ecmd->autoneg == AUTONEG_ENABLE) {
3045 ecmd->advertising = supported;
3046 sky2->duplex = -1;
3047 sky2->speed = -1;
3048 } else {
3049 u32 setting;
3050
Stephen Hemminger793b8832005-09-14 16:06:14 -07003051 switch (ecmd->speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003052 case SPEED_1000:
3053 if (ecmd->duplex == DUPLEX_FULL)
3054 setting = SUPPORTED_1000baseT_Full;
3055 else if (ecmd->duplex == DUPLEX_HALF)
3056 setting = SUPPORTED_1000baseT_Half;
3057 else
3058 return -EINVAL;
3059 break;
3060 case SPEED_100:
3061 if (ecmd->duplex == DUPLEX_FULL)
3062 setting = SUPPORTED_100baseT_Full;
3063 else if (ecmd->duplex == DUPLEX_HALF)
3064 setting = SUPPORTED_100baseT_Half;
3065 else
3066 return -EINVAL;
3067 break;
3068
3069 case SPEED_10:
3070 if (ecmd->duplex == DUPLEX_FULL)
3071 setting = SUPPORTED_10baseT_Full;
3072 else if (ecmd->duplex == DUPLEX_HALF)
3073 setting = SUPPORTED_10baseT_Half;
3074 else
3075 return -EINVAL;
3076 break;
3077 default:
3078 return -EINVAL;
3079 }
3080
3081 if ((setting & supported) == 0)
3082 return -EINVAL;
3083
3084 sky2->speed = ecmd->speed;
3085 sky2->duplex = ecmd->duplex;
3086 }
3087
3088 sky2->autoneg = ecmd->autoneg;
3089 sky2->advertising = ecmd->advertising;
3090
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003091 if (netif_running(dev)) {
Stephen Hemminger1b537562005-12-20 15:08:07 -08003092 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003093 sky2_set_multicast(dev);
3094 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003095
3096 return 0;
3097}
3098
3099static void sky2_get_drvinfo(struct net_device *dev,
3100 struct ethtool_drvinfo *info)
3101{
3102 struct sky2_port *sky2 = netdev_priv(dev);
3103
3104 strcpy(info->driver, DRV_NAME);
3105 strcpy(info->version, DRV_VERSION);
3106 strcpy(info->fw_version, "N/A");
3107 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
3108}
3109
3110static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003111 char name[ETH_GSTRING_LEN];
3112 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003113} sky2_stats[] = {
3114 { "tx_bytes", GM_TXO_OK_HI },
3115 { "rx_bytes", GM_RXO_OK_HI },
3116 { "tx_broadcast", GM_TXF_BC_OK },
3117 { "rx_broadcast", GM_RXF_BC_OK },
3118 { "tx_multicast", GM_TXF_MC_OK },
3119 { "rx_multicast", GM_RXF_MC_OK },
3120 { "tx_unicast", GM_TXF_UC_OK },
3121 { "rx_unicast", GM_RXF_UC_OK },
3122 { "tx_mac_pause", GM_TXF_MPAUSE },
3123 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003124 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003125 { "late_collision",GM_TXF_LAT_COL },
3126 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003127 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003128 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003129
Stephen Hemmingerd2604542006-03-23 08:51:36 -08003130 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003131 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003132 { "rx_64_byte_packets", GM_RXF_64B },
3133 { "rx_65_to_127_byte_packets", GM_RXF_127B },
3134 { "rx_128_to_255_byte_packets", GM_RXF_255B },
3135 { "rx_256_to_511_byte_packets", GM_RXF_511B },
3136 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
3137 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
3138 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003139 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003140 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
3141 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003142 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08003143
3144 { "tx_64_byte_packets", GM_TXF_64B },
3145 { "tx_65_to_127_byte_packets", GM_TXF_127B },
3146 { "tx_128_to_255_byte_packets", GM_TXF_255B },
3147 { "tx_256_to_511_byte_packets", GM_TXF_511B },
3148 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
3149 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
3150 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
3151 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003152};
3153
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003154static u32 sky2_get_rx_csum(struct net_device *dev)
3155{
3156 struct sky2_port *sky2 = netdev_priv(dev);
3157
3158 return sky2->rx_csum;
3159}
3160
3161static int sky2_set_rx_csum(struct net_device *dev, u32 data)
3162{
3163 struct sky2_port *sky2 = netdev_priv(dev);
3164
3165 sky2->rx_csum = data;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003166
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003167 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
3168 data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
3169
3170 return 0;
3171}
3172
3173static u32 sky2_get_msglevel(struct net_device *netdev)
3174{
3175 struct sky2_port *sky2 = netdev_priv(netdev);
3176 return sky2->msg_enable;
3177}
3178
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003179static int sky2_nway_reset(struct net_device *dev)
3180{
3181 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003182
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003183 if (!netif_running(dev) || sky2->autoneg != AUTONEG_ENABLE)
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003184 return -EINVAL;
3185
Stephen Hemminger1b537562005-12-20 15:08:07 -08003186 sky2_phy_reinit(sky2);
Stephen Hemmingerd1b139c2007-09-05 16:56:19 +01003187 sky2_set_multicast(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003188
3189 return 0;
3190}
3191
Stephen Hemminger793b8832005-09-14 16:06:14 -07003192static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003193{
3194 struct sky2_hw *hw = sky2->hw;
3195 unsigned port = sky2->port;
3196 int i;
3197
3198 data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003199 | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003200 data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07003201 | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003202
Stephen Hemminger793b8832005-09-14 16:06:14 -07003203 for (i = 2; i < count; i++)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003204 data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
3205}
3206
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003207static void sky2_set_msglevel(struct net_device *netdev, u32 value)
3208{
3209 struct sky2_port *sky2 = netdev_priv(netdev);
3210 sky2->msg_enable = value;
3211}
3212
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003213static int sky2_get_sset_count(struct net_device *dev, int sset)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003214{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003215 switch (sset) {
3216 case ETH_SS_STATS:
3217 return ARRAY_SIZE(sky2_stats);
3218 default:
3219 return -EOPNOTSUPP;
3220 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003221}
3222
3223static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003224 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003225{
3226 struct sky2_port *sky2 = netdev_priv(dev);
3227
Stephen Hemminger793b8832005-09-14 16:06:14 -07003228 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003229}
3230
Stephen Hemminger793b8832005-09-14 16:06:14 -07003231static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003232{
3233 int i;
3234
3235 switch (stringset) {
3236 case ETH_SS_STATS:
3237 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
3238 memcpy(data + i * ETH_GSTRING_LEN,
3239 sky2_stats[i].name, ETH_GSTRING_LEN);
3240 break;
3241 }
3242}
3243
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003244static int sky2_set_mac_address(struct net_device *dev, void *p)
3245{
3246 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003247 struct sky2_hw *hw = sky2->hw;
3248 unsigned port = sky2->port;
3249 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003250
3251 if (!is_valid_ether_addr(addr->sa_data))
3252 return -EADDRNOTAVAIL;
3253
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003254 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003255 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003256 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003257 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003258 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003259
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08003260 /* virtual address for data */
3261 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
3262
3263 /* physical address: used for pause frames */
3264 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003265
3266 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003267}
3268
Stephen Hemmingera052b522006-10-17 10:24:23 -07003269static void inline sky2_add_filter(u8 filter[8], const u8 *addr)
3270{
3271 u32 bit;
3272
3273 bit = ether_crc(ETH_ALEN, addr) & 63;
3274 filter[bit >> 3] |= 1 << (bit & 7);
3275}
3276
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003277static void sky2_set_multicast(struct net_device *dev)
3278{
3279 struct sky2_port *sky2 = netdev_priv(dev);
3280 struct sky2_hw *hw = sky2->hw;
3281 unsigned port = sky2->port;
3282 struct dev_mc_list *list = dev->mc_list;
3283 u16 reg;
3284 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07003285 int rx_pause;
3286 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003287
Stephen Hemmingera052b522006-10-17 10:24:23 -07003288 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003289 memset(filter, 0, sizeof(filter));
3290
3291 reg = gma_read16(hw, port, GM_RX_CTRL);
3292 reg |= GM_RXCR_UCF_ENA;
3293
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07003294 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003295 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07003296 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003297 memset(filter, 0xff, sizeof(filter));
Stephen Hemmingera052b522006-10-17 10:24:23 -07003298 else if (dev->mc_count == 0 && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003299 reg &= ~GM_RXCR_MCF_ENA;
3300 else {
3301 int i;
3302 reg |= GM_RXCR_MCF_ENA;
3303
Stephen Hemmingera052b522006-10-17 10:24:23 -07003304 if (rx_pause)
3305 sky2_add_filter(filter, pause_mc_addr);
3306
3307 for (i = 0; list && i < dev->mc_count; i++, list = list->next)
3308 sky2_add_filter(filter, list->dmi_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003309 }
3310
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003311 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003312 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003313 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003314 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003315 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003316 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003317 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003318 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003319
3320 gma_write16(hw, port, GM_RX_CTRL, reg);
3321}
3322
3323/* Can have one global because blinking is controlled by
3324 * ethtool and that is always under RTNL mutex
3325 */
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003326static void sky2_led(struct sky2_port *sky2, enum led_mode mode)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003327{
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003328 struct sky2_hw *hw = sky2->hw;
3329 unsigned port = sky2->port;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003330
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003331 spin_lock_bh(&sky2->phy_lock);
3332 if (hw->chip_id == CHIP_ID_YUKON_EC_U ||
3333 hw->chip_id == CHIP_ID_YUKON_EX ||
3334 hw->chip_id == CHIP_ID_YUKON_SUPR) {
3335 u16 pg;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003336 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3337 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003338
3339 switch (mode) {
3340 case MO_LED_OFF:
3341 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3342 PHY_M_LEDC_LOS_CTRL(8) |
3343 PHY_M_LEDC_INIT_CTRL(8) |
3344 PHY_M_LEDC_STA1_CTRL(8) |
3345 PHY_M_LEDC_STA0_CTRL(8));
3346 break;
3347 case MO_LED_ON:
3348 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3349 PHY_M_LEDC_LOS_CTRL(9) |
3350 PHY_M_LEDC_INIT_CTRL(9) |
3351 PHY_M_LEDC_STA1_CTRL(9) |
3352 PHY_M_LEDC_STA0_CTRL(9));
3353 break;
3354 case MO_LED_BLINK:
3355 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3356 PHY_M_LEDC_LOS_CTRL(0xa) |
3357 PHY_M_LEDC_INIT_CTRL(0xa) |
3358 PHY_M_LEDC_STA1_CTRL(0xa) |
3359 PHY_M_LEDC_STA0_CTRL(0xa));
3360 break;
3361 case MO_LED_NORM:
3362 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
3363 PHY_M_LEDC_LOS_CTRL(1) |
3364 PHY_M_LEDC_INIT_CTRL(8) |
3365 PHY_M_LEDC_STA1_CTRL(7) |
3366 PHY_M_LEDC_STA0_CTRL(7));
3367 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003368
3369 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003370 } else
Stephen Hemminger0efdf262006-12-05 12:03:41 -08003371 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003372 PHY_M_LED_MO_DUP(mode) |
3373 PHY_M_LED_MO_10(mode) |
3374 PHY_M_LED_MO_100(mode) |
3375 PHY_M_LED_MO_1000(mode) |
3376 PHY_M_LED_MO_RX(mode) |
3377 PHY_M_LED_MO_TX(mode));
3378
3379 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003380}
3381
3382/* blink LED's for finding board */
3383static int sky2_phys_id(struct net_device *dev, u32 data)
3384{
3385 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003386 unsigned int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003387
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003388 if (data == 0)
3389 data = UINT_MAX;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003390
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003391 for (i = 0; i < data; i++) {
3392 sky2_led(sky2, MO_LED_ON);
3393 if (msleep_interruptible(500))
3394 break;
3395 sky2_led(sky2, MO_LED_OFF);
3396 if (msleep_interruptible(500))
3397 break;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003398 }
Stephen Hemmingera84d0a32008-02-22 16:00:33 -08003399 sky2_led(sky2, MO_LED_NORM);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003400
3401 return 0;
3402}
3403
3404static void sky2_get_pauseparam(struct net_device *dev,
3405 struct ethtool_pauseparam *ecmd)
3406{
3407 struct sky2_port *sky2 = netdev_priv(dev);
3408
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003409 switch (sky2->flow_mode) {
3410 case FC_NONE:
3411 ecmd->tx_pause = ecmd->rx_pause = 0;
3412 break;
3413 case FC_TX:
3414 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3415 break;
3416 case FC_RX:
3417 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3418 break;
3419 case FC_BOTH:
3420 ecmd->tx_pause = ecmd->rx_pause = 1;
3421 }
3422
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003423 ecmd->autoneg = sky2->autoneg;
3424}
3425
3426static int sky2_set_pauseparam(struct net_device *dev,
3427 struct ethtool_pauseparam *ecmd)
3428{
3429 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003430
3431 sky2->autoneg = ecmd->autoneg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003432 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003433
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003434 if (netif_running(dev))
3435 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003436
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003437 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003438}
3439
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003440static int sky2_get_coalesce(struct net_device *dev,
3441 struct ethtool_coalesce *ecmd)
3442{
3443 struct sky2_port *sky2 = netdev_priv(dev);
3444 struct sky2_hw *hw = sky2->hw;
3445
3446 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3447 ecmd->tx_coalesce_usecs = 0;
3448 else {
3449 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3450 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3451 }
3452 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3453
3454 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3455 ecmd->rx_coalesce_usecs = 0;
3456 else {
3457 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3458 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3459 }
3460 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3461
3462 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3463 ecmd->rx_coalesce_usecs_irq = 0;
3464 else {
3465 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3466 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3467 }
3468
3469 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3470
3471 return 0;
3472}
3473
3474/* Note: this affect both ports */
3475static int sky2_set_coalesce(struct net_device *dev,
3476 struct ethtool_coalesce *ecmd)
3477{
3478 struct sky2_port *sky2 = netdev_priv(dev);
3479 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003480 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003481
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003482 if (ecmd->tx_coalesce_usecs > tmax ||
3483 ecmd->rx_coalesce_usecs > tmax ||
3484 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003485 return -EINVAL;
3486
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003487 if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003488 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003489 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003490 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003491 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003492 return -EINVAL;
3493
3494 if (ecmd->tx_coalesce_usecs == 0)
3495 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3496 else {
3497 sky2_write32(hw, STAT_TX_TIMER_INI,
3498 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3499 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3500 }
3501 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3502
3503 if (ecmd->rx_coalesce_usecs == 0)
3504 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3505 else {
3506 sky2_write32(hw, STAT_LEV_TIMER_INI,
3507 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3508 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3509 }
3510 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3511
3512 if (ecmd->rx_coalesce_usecs_irq == 0)
3513 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3514 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003515 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003516 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3517 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3518 }
3519 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3520 return 0;
3521}
3522
Stephen Hemminger793b8832005-09-14 16:06:14 -07003523static void sky2_get_ringparam(struct net_device *dev,
3524 struct ethtool_ringparam *ering)
3525{
3526 struct sky2_port *sky2 = netdev_priv(dev);
3527
3528 ering->rx_max_pending = RX_MAX_PENDING;
3529 ering->rx_mini_max_pending = 0;
3530 ering->rx_jumbo_max_pending = 0;
3531 ering->tx_max_pending = TX_RING_SIZE - 1;
3532
3533 ering->rx_pending = sky2->rx_pending;
3534 ering->rx_mini_pending = 0;
3535 ering->rx_jumbo_pending = 0;
3536 ering->tx_pending = sky2->tx_pending;
3537}
3538
3539static int sky2_set_ringparam(struct net_device *dev,
3540 struct ethtool_ringparam *ering)
3541{
3542 struct sky2_port *sky2 = netdev_priv(dev);
3543 int err = 0;
3544
3545 if (ering->rx_pending > RX_MAX_PENDING ||
3546 ering->rx_pending < 8 ||
3547 ering->tx_pending < MAX_SKB_TX_LE ||
3548 ering->tx_pending > TX_RING_SIZE - 1)
3549 return -EINVAL;
3550
3551 if (netif_running(dev))
3552 sky2_down(dev);
3553
3554 sky2->rx_pending = ering->rx_pending;
3555 sky2->tx_pending = ering->tx_pending;
3556
Stephen Hemminger1b537562005-12-20 15:08:07 -08003557 if (netif_running(dev)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003558 err = sky2_up(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003559 if (err)
3560 dev_close(dev);
3561 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003562
3563 return err;
3564}
3565
Stephen Hemminger793b8832005-09-14 16:06:14 -07003566static int sky2_get_regs_len(struct net_device *dev)
3567{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003568 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003569}
3570
3571/*
3572 * Returns copy of control register region
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003573 * Note: ethtool_get_regs always provides full size (16k) buffer
Stephen Hemminger793b8832005-09-14 16:06:14 -07003574 */
3575static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
3576 void *p)
3577{
3578 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003579 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003580 unsigned int b;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003581
3582 regs->version = 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003583
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003584 for (b = 0; b < 128; b++) {
3585 /* This complicated switch statement is to make sure and
3586 * only access regions that are unreserved.
3587 * Some blocks are only valid on dual port cards.
3588 * and block 3 has some special diagnostic registers that
3589 * are poison.
3590 */
3591 switch (b) {
3592 case 3:
3593 /* skip diagnostic ram region */
3594 memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10);
3595 break;
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003596
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003597 /* dual port cards only */
3598 case 5: /* Tx Arbiter 2 */
3599 case 9: /* RX2 */
3600 case 14 ... 15: /* TX2 */
3601 case 17: case 19: /* Ram Buffer 2 */
3602 case 22 ... 23: /* Tx Ram Buffer 2 */
3603 case 25: /* Rx MAC Fifo 1 */
3604 case 27: /* Tx MAC Fifo 2 */
3605 case 31: /* GPHY 2 */
3606 case 40 ... 47: /* Pattern Ram 2 */
3607 case 52: case 54: /* TCP Segmentation 2 */
3608 case 112 ... 116: /* GMAC 2 */
3609 if (sky2->hw->ports == 1)
3610 goto reserved;
3611 /* fall through */
3612 case 0: /* Control */
3613 case 2: /* Mac address */
3614 case 4: /* Tx Arbiter 1 */
3615 case 7: /* PCI express reg */
3616 case 8: /* RX1 */
3617 case 12 ... 13: /* TX1 */
3618 case 16: case 18:/* Rx Ram Buffer 1 */
3619 case 20 ... 21: /* Tx Ram Buffer 1 */
3620 case 24: /* Rx MAC Fifo 1 */
3621 case 26: /* Tx MAC Fifo 1 */
3622 case 28 ... 29: /* Descriptor and status unit */
3623 case 30: /* GPHY 1*/
3624 case 32 ... 39: /* Pattern Ram 1 */
3625 case 48: case 50: /* TCP Segmentation 1 */
3626 case 56 ... 60: /* PCI space */
3627 case 80 ... 84: /* GMAC 1 */
3628 memcpy_fromio(p, io, 128);
3629 break;
3630 default:
3631reserved:
3632 memset(p, 0, 128);
3633 }
Stephen Hemminger3ead5db2007-06-04 17:23:21 -07003634
Stephen Hemminger295b54c2007-10-11 19:47:22 -07003635 p += 128;
3636 io += 128;
3637 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003638}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003639
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003640/* In order to do Jumbo packets on these chips, need to turn off the
3641 * transmit store/forward. Therefore checksum offload won't work.
3642 */
3643static int no_tx_offload(struct net_device *dev)
3644{
3645 const struct sky2_port *sky2 = netdev_priv(dev);
3646 const struct sky2_hw *hw = sky2->hw;
3647
Stephen Hemminger69161612007-06-04 17:23:26 -07003648 return dev->mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U;
Stephen Hemmingerb628ed92007-04-11 14:48:01 -07003649}
3650
3651static int sky2_set_tx_csum(struct net_device *dev, u32 data)
3652{
3653 if (data && no_tx_offload(dev))
3654 return -EINVAL;
3655
3656 return ethtool_op_set_tx_csum(dev, data);
3657}
3658
3659
3660static int sky2_set_tso(struct net_device *dev, u32 data)
3661{
3662 if (data && no_tx_offload(dev))
3663 return -EINVAL;
3664
3665 return ethtool_op_set_tso(dev, data);
3666}
3667
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003668static int sky2_get_eeprom_len(struct net_device *dev)
3669{
3670 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003671 struct sky2_hw *hw = sky2->hw;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003672 u16 reg2;
3673
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003674 reg2 = sky2_pci_read16(hw, PCI_DEV_REG2);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003675 return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
3676}
3677
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003678static u32 sky2_vpd_read(struct sky2_hw *hw, int cap, u16 offset)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003679{
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003680 u32 val;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003681
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003682 sky2_pci_write16(hw, cap + PCI_VPD_ADDR, offset);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003683
3684 do {
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003685 offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003686 } while (!(offset & PCI_VPD_ADDR_F));
3687
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003688 val = sky2_pci_read32(hw, cap + PCI_VPD_DATA);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003689 return val;
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003690}
3691
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003692static void sky2_vpd_write(struct sky2_hw *hw, int cap, u16 offset, u32 val)
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003693{
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003694 sky2_pci_write16(hw, cap + PCI_VPD_DATA, val);
3695 sky2_pci_write32(hw, cap + PCI_VPD_ADDR, offset | PCI_VPD_ADDR_F);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003696 do {
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003697 offset = sky2_pci_read16(hw, cap + PCI_VPD_ADDR);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07003698 } while (offset & PCI_VPD_ADDR_F);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003699}
3700
3701static int sky2_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3702 u8 *data)
3703{
3704 struct sky2_port *sky2 = netdev_priv(dev);
3705 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
3706 int length = eeprom->len;
3707 u16 offset = eeprom->offset;
3708
3709 if (!cap)
3710 return -EINVAL;
3711
3712 eeprom->magic = SKY2_EEPROM_MAGIC;
3713
3714 while (length > 0) {
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003715 u32 val = sky2_vpd_read(sky2->hw, cap, offset);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003716 int n = min_t(int, length, sizeof(val));
3717
3718 memcpy(data, &val, n);
3719 length -= n;
3720 data += n;
3721 offset += n;
3722 }
3723 return 0;
3724}
3725
3726static int sky2_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
3727 u8 *data)
3728{
3729 struct sky2_port *sky2 = netdev_priv(dev);
3730 int cap = pci_find_capability(sky2->hw->pdev, PCI_CAP_ID_VPD);
3731 int length = eeprom->len;
3732 u16 offset = eeprom->offset;
3733
3734 if (!cap)
3735 return -EINVAL;
3736
3737 if (eeprom->magic != SKY2_EEPROM_MAGIC)
3738 return -EINVAL;
3739
3740 while (length > 0) {
3741 u32 val;
3742 int n = min_t(int, length, sizeof(val));
3743
3744 if (n < sizeof(val))
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003745 val = sky2_vpd_read(sky2->hw, cap, offset);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003746 memcpy(&val, data, n);
3747
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08003748 sky2_vpd_write(sky2->hw, cap, offset, val);
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003749
3750 length -= n;
3751 data += n;
3752 offset += n;
3753 }
3754 return 0;
3755}
3756
3757
Jeff Garzik7282d492006-09-13 14:30:00 -04003758static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003759 .get_settings = sky2_get_settings,
3760 .set_settings = sky2_set_settings,
3761 .get_drvinfo = sky2_get_drvinfo,
3762 .get_wol = sky2_get_wol,
3763 .set_wol = sky2_set_wol,
3764 .get_msglevel = sky2_get_msglevel,
3765 .set_msglevel = sky2_set_msglevel,
3766 .nway_reset = sky2_nway_reset,
3767 .get_regs_len = sky2_get_regs_len,
3768 .get_regs = sky2_get_regs,
3769 .get_link = ethtool_op_get_link,
3770 .get_eeprom_len = sky2_get_eeprom_len,
3771 .get_eeprom = sky2_get_eeprom,
3772 .set_eeprom = sky2_set_eeprom,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003773 .set_sg = ethtool_op_set_sg,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003774 .set_tx_csum = sky2_set_tx_csum,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003775 .set_tso = sky2_set_tso,
3776 .get_rx_csum = sky2_get_rx_csum,
3777 .set_rx_csum = sky2_set_rx_csum,
3778 .get_strings = sky2_get_strings,
3779 .get_coalesce = sky2_get_coalesce,
3780 .set_coalesce = sky2_set_coalesce,
3781 .get_ringparam = sky2_get_ringparam,
3782 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003783 .get_pauseparam = sky2_get_pauseparam,
3784 .set_pauseparam = sky2_set_pauseparam,
Stephen Hemmingerf4331a62007-07-09 15:33:39 -07003785 .phys_id = sky2_phys_id,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07003786 .get_sset_count = sky2_get_sset_count,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003787 .get_ethtool_stats = sky2_get_ethtool_stats,
3788};
3789
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003790#ifdef CONFIG_SKY2_DEBUG
3791
3792static struct dentry *sky2_debug;
3793
3794static int sky2_debug_show(struct seq_file *seq, void *v)
3795{
3796 struct net_device *dev = seq->private;
3797 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003798 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003799 unsigned port = sky2->port;
3800 unsigned idx, last;
3801 int sop;
3802
3803 if (!netif_running(dev))
3804 return -ENETDOWN;
3805
3806 seq_printf(seq, "IRQ src=%x mask=%x control=%x\n",
3807 sky2_read32(hw, B0_ISRC),
3808 sky2_read32(hw, B0_IMSK),
3809 sky2_read32(hw, B0_Y2_SP_ICR));
3810
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003811 napi_disable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003812 last = sky2_read16(hw, STAT_PUT_IDX);
3813
3814 if (hw->st_idx == last)
3815 seq_puts(seq, "Status ring (empty)\n");
3816 else {
3817 seq_puts(seq, "Status ring\n");
3818 for (idx = hw->st_idx; idx != last && idx < STATUS_RING_SIZE;
3819 idx = RING_NEXT(idx, STATUS_RING_SIZE)) {
3820 const struct sky2_status_le *le = hw->st_le + idx;
3821 seq_printf(seq, "[%d] %#x %d %#x\n",
3822 idx, le->opcode, le->length, le->status);
3823 }
3824 seq_puts(seq, "\n");
3825 }
3826
3827 seq_printf(seq, "Tx ring pending=%u...%u report=%d done=%d\n",
3828 sky2->tx_cons, sky2->tx_prod,
3829 sky2_read16(hw, port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX),
3830 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));
3831
3832 /* Dump contents of tx ring */
3833 sop = 1;
3834 for (idx = sky2->tx_next; idx != sky2->tx_prod && idx < TX_RING_SIZE;
3835 idx = RING_NEXT(idx, TX_RING_SIZE)) {
3836 const struct sky2_tx_le *le = sky2->tx_le + idx;
3837 u32 a = le32_to_cpu(le->addr);
3838
3839 if (sop)
3840 seq_printf(seq, "%u:", idx);
3841 sop = 0;
3842
3843 switch(le->opcode & ~HW_OWNER) {
3844 case OP_ADDR64:
3845 seq_printf(seq, " %#x:", a);
3846 break;
3847 case OP_LRGLEN:
3848 seq_printf(seq, " mtu=%d", a);
3849 break;
3850 case OP_VLAN:
3851 seq_printf(seq, " vlan=%d", be16_to_cpu(le->length));
3852 break;
3853 case OP_TCPLISW:
3854 seq_printf(seq, " csum=%#x", a);
3855 break;
3856 case OP_LARGESEND:
3857 seq_printf(seq, " tso=%#x(%d)", a, le16_to_cpu(le->length));
3858 break;
3859 case OP_PACKET:
3860 seq_printf(seq, " %#x(%d)", a, le16_to_cpu(le->length));
3861 break;
3862 case OP_BUFFER:
3863 seq_printf(seq, " frag=%#x(%d)", a, le16_to_cpu(le->length));
3864 break;
3865 default:
3866 seq_printf(seq, " op=%#x,%#x(%d)", le->opcode,
3867 a, le16_to_cpu(le->length));
3868 }
3869
3870 if (le->ctrl & EOP) {
3871 seq_putc(seq, '\n');
3872 sop = 1;
3873 }
3874 }
3875
3876 seq_printf(seq, "\nRx ring hw get=%d put=%d last=%d\n",
3877 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_GET_IDX)),
3878 last = sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_PUT_IDX)),
3879 sky2_read16(hw, Y2_QADDR(rxqaddr[port], PREF_UNIT_LAST_IDX)));
3880
David S. Millerd1d08d12008-01-07 20:53:33 -08003881 sky2_read32(hw, B0_Y2_SP_LISR);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003882 napi_enable(&hw->napi);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003883 return 0;
3884}
3885
3886static int sky2_debug_open(struct inode *inode, struct file *file)
3887{
3888 return single_open(file, sky2_debug_show, inode->i_private);
3889}
3890
3891static const struct file_operations sky2_debug_fops = {
3892 .owner = THIS_MODULE,
3893 .open = sky2_debug_open,
3894 .read = seq_read,
3895 .llseek = seq_lseek,
3896 .release = single_release,
3897};
3898
3899/*
3900 * Use network device events to create/remove/rename
3901 * debugfs file entries
3902 */
3903static int sky2_device_event(struct notifier_block *unused,
3904 unsigned long event, void *ptr)
3905{
3906 struct net_device *dev = ptr;
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003907 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003908
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003909 if (dev->open != sky2_up || !sky2_debug)
3910 return NOTIFY_DONE;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003911
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003912 switch(event) {
3913 case NETDEV_CHANGENAME:
3914 if (sky2->debugfs) {
3915 sky2->debugfs = debugfs_rename(sky2_debug, sky2->debugfs,
3916 sky2_debug, dev->name);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003917 }
Stephen Hemminger5b296bc2007-08-29 12:58:11 -07003918 break;
3919
3920 case NETDEV_GOING_DOWN:
3921 if (sky2->debugfs) {
3922 printk(KERN_DEBUG PFX "%s: remove debugfs\n",
3923 dev->name);
3924 debugfs_remove(sky2->debugfs);
3925 sky2->debugfs = NULL;
3926 }
3927 break;
3928
3929 case NETDEV_UP:
3930 sky2->debugfs = debugfs_create_file(dev->name, S_IRUGO,
3931 sky2_debug, dev,
3932 &sky2_debug_fops);
3933 if (IS_ERR(sky2->debugfs))
3934 sky2->debugfs = NULL;
Stephen Hemminger3cf26752007-07-09 15:33:35 -07003935 }
3936
3937 return NOTIFY_DONE;
3938}
3939
3940static struct notifier_block sky2_notifier = {
3941 .notifier_call = sky2_device_event,
3942};
3943
3944
3945static __init void sky2_debug_init(void)
3946{
3947 struct dentry *ent;
3948
3949 ent = debugfs_create_dir("sky2", NULL);
3950 if (!ent || IS_ERR(ent))
3951 return;
3952
3953 sky2_debug = ent;
3954 register_netdevice_notifier(&sky2_notifier);
3955}
3956
3957static __exit void sky2_debug_cleanup(void)
3958{
3959 if (sky2_debug) {
3960 unregister_netdevice_notifier(&sky2_notifier);
3961 debugfs_remove(sky2_debug);
3962 sky2_debug = NULL;
3963 }
3964}
3965
3966#else
3967#define sky2_debug_init()
3968#define sky2_debug_cleanup()
3969#endif
3970
3971
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003972/* Initialize network device */
3973static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08003974 unsigned port,
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08003975 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003976{
3977 struct sky2_port *sky2;
3978 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
3979
3980 if (!dev) {
Joe Perches898eb712007-10-18 03:06:30 -07003981 dev_err(&hw->pdev->dev, "etherdev alloc failed\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003982 return NULL;
3983 }
3984
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003985 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08003986 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003987 dev->open = sky2_up;
3988 dev->stop = sky2_down;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08003989 dev->do_ioctl = sky2_ioctl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003990 dev->hard_start_xmit = sky2_xmit_frame;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003991 dev->set_multicast_list = sky2_set_multicast;
3992 dev->set_mac_address = sky2_set_mac_address;
3993 dev->change_mtu = sky2_change_mtu;
3994 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
3995 dev->tx_timeout = sky2_tx_timeout;
3996 dev->watchdog_timeo = TX_WATCHDOG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003997#ifdef CONFIG_NET_POLL_CONTROLLER
Stephen Hemmingera5e68c02007-11-06 11:45:40 -08003998 if (port == 0)
3999 dev->poll_controller = sky2_netpoll;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004000#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004001
4002 sky2 = netdev_priv(dev);
4003 sky2->netdev = dev;
4004 sky2->hw = hw;
4005 sky2->msg_enable = netif_msg_init(debug, default_msg);
4006
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004007 /* Auto speed and flow control */
4008 sky2->autoneg = AUTONEG_ENABLE;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07004009 sky2->flow_mode = FC_BOTH;
4010
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004011 sky2->duplex = -1;
4012 sky2->speed = -1;
4013 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemminger8b31cfb2007-11-21 14:55:26 -08004014 sky2->rx_csum = (hw->chip_id != CHIP_ID_YUKON_XL);
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004015 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08004016
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08004017 spin_lock_init(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004018 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemminger290d4de2006-03-20 15:48:15 -08004019 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004020
4021 hw->dev[port] = dev;
4022
4023 sky2->port = port;
4024
Stephen Hemminger4a50a872007-02-06 10:45:41 -08004025 dev->features |= NETIF_F_TSO | NETIF_F_IP_CSUM | NETIF_F_SG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004026 if (highmem)
4027 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004028
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004029#ifdef SKY2_VLAN_TAG_USED
Stephen Hemmingerd6c9bc12007-09-27 12:32:44 -07004030 /* The workaround for FE+ status conflicts with VLAN tag detection. */
4031 if (!(sky2->hw->chip_id == CHIP_ID_YUKON_FE_P &&
4032 sky2->hw->chip_rev == CHIP_REV_YU_FE2_A0)) {
4033 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
4034 dev->vlan_rx_register = sky2_vlan_rx_register;
4035 }
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07004036#endif
4037
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004038 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07004039 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07004040 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004041
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004042 return dev;
4043}
4044
Stephen Hemminger28bd1812006-01-17 13:43:19 -08004045static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004046{
4047 const struct sky2_port *sky2 = netdev_priv(dev);
Joe Perches0795af52007-10-03 17:59:30 -07004048 DECLARE_MAC_BUF(mac);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004049
4050 if (netif_msg_probe(sky2))
Joe Perches0795af52007-10-03 17:59:30 -07004051 printk(KERN_INFO PFX "%s: addr %s\n",
4052 dev->name, print_mac(mac, dev->dev_addr));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004053}
4054
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004055/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01004056static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004057{
4058 struct sky2_hw *hw = dev_id;
4059 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
4060
4061 if (status == 0)
4062 return IRQ_NONE;
4063
4064 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004065 hw->flags |= SKY2_HW_USE_MSI;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004066 wake_up(&hw->msi_wait);
4067 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4068 }
4069 sky2_write32(hw, B0_Y2_SP_ICR, 2);
4070
4071 return IRQ_HANDLED;
4072}
4073
4074/* Test interrupt path by forcing a a software IRQ */
4075static int __devinit sky2_test_msi(struct sky2_hw *hw)
4076{
4077 struct pci_dev *pdev = hw->pdev;
4078 int err;
4079
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004080 init_waitqueue_head (&hw->msi_wait);
4081
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004082 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
4083
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004084 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004085 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004086 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004087 return err;
4088 }
4089
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004090 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07004091 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004092
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004093 wait_event_timeout(hw->msi_wait, (hw->flags & SKY2_HW_USE_MSI), HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004094
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004095 if (!(hw->flags & SKY2_HW_USE_MSI)) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004096 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004097 dev_info(&pdev->dev, "No interrupt generated using MSI, "
4098 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004099
4100 err = -EOPNOTSUPP;
4101 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
4102 }
4103
4104 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07004105 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08004106
4107 free_irq(pdev->irq, hw);
4108
4109 return err;
4110}
4111
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004112static int __devinit pci_wake_enabled(struct pci_dev *dev)
4113{
4114 int pm = pci_find_capability(dev, PCI_CAP_ID_PM);
4115 u16 value;
4116
4117 if (!pm)
4118 return 0;
4119 if (pci_read_config_word(dev, pm + PCI_PM_CTRL, &value))
4120 return 0;
4121 return value & PCI_PM_CTRL_PME_ENABLE;
4122}
4123
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004124static int __devinit sky2_probe(struct pci_dev *pdev,
4125 const struct pci_device_id *ent)
4126{
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004127 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004128 struct sky2_hw *hw;
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004129 int err, using_dac = 0, wol_default;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004130
Stephen Hemminger793b8832005-09-14 16:06:14 -07004131 err = pci_enable_device(pdev);
4132 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004133 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004134 goto err_out;
4135 }
4136
Stephen Hemminger793b8832005-09-14 16:06:14 -07004137 err = pci_request_regions(pdev, DRV_NAME);
4138 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004139 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004140 goto err_out_disable;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004141 }
4142
4143 pci_set_master(pdev);
4144
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004145 if (sizeof(dma_addr_t) > sizeof(u32) &&
4146 !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
4147 using_dac = 1;
4148 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4149 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004150 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
4151 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004152 goto err_out_free_regions;
4153 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004154 } else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004155 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4156 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004157 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004158 goto err_out_free_regions;
4159 }
4160 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08004161
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004162 wol_default = pci_wake_enabled(pdev) ? WAKE_MAGIC : 0;
4163
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004164 err = -ENOMEM;
Stephen Hemminger6aad85d2006-01-17 13:43:18 -08004165 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004166 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004167 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004168 goto err_out_free_regions;
4169 }
4170
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004171 hw->pdev = pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004172
4173 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
4174 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004175 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004176 goto err_out_free_hw;
4177 }
4178
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004179#ifdef __BIG_ENDIAN
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004180 /* The sk98lin vendor driver uses hardware byte swapping but
4181 * this driver uses software swapping.
4182 */
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004183 {
4184 u32 reg;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004185 reg = sky2_pci_read32(hw, PCI_DEV_REG2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07004186 reg &= ~PCI_REV_DESC;
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004187 sky2_pci_write32(hw, PCI_DEV_REG2, reg);
Stephen Hemminger56a645c2006-02-22 11:45:02 -08004188 }
4189#endif
4190
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004191 /* ring for status responses */
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004192 hw->st_le = pci_alloc_consistent(pdev, STATUS_LE_BYTES, &hw->st_dma);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004193 if (!hw->st_le)
4194 goto err_out_iounmap;
4195
Stephen Hemmingere3173832007-02-06 10:45:39 -08004196 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004197 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07004198 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004199
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004200 dev_info(&pdev->dev, "v%s addr 0x%llx irq %d Yukon-%s (0x%x) rev %d\n",
Greg Kroah-Hartman7c7459d2006-06-12 15:13:08 -07004201 DRV_VERSION, (unsigned long long)pci_resource_start(pdev, 0),
4202 pdev->irq, yukon2_name[hw->chip_id - CHIP_ID_YUKON_XL],
Stephen Hemminger793b8832005-09-14 16:06:14 -07004203 hw->chip_id, hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004204
Stephen Hemmingere3173832007-02-06 10:45:39 -08004205 sky2_reset(hw);
4206
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004207 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004208 if (!dev) {
4209 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004210 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004211 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004212
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004213 if (!disable_msi && pci_enable_msi(pdev) == 0) {
4214 err = sky2_test_msi(hw);
4215 if (err == -EOPNOTSUPP)
4216 pci_disable_msi(pdev);
4217 else if (err)
4218 goto err_out_free_netdev;
4219 }
4220
Stephen Hemminger793b8832005-09-14 16:06:14 -07004221 err = register_netdev(dev);
4222 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004223 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004224 goto err_out_free_netdev;
4225 }
4226
Stephen Hemminger6de16232007-10-17 13:26:42 -07004227 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4228
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004229 err = request_irq(pdev->irq, sky2_intr,
4230 (hw->flags & SKY2_HW_USE_MSI) ? 0 : IRQF_SHARED,
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004231 dev->name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004232 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004233 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004234 goto err_out_unregister;
4235 }
4236 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004237 napi_enable(&hw->napi);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07004238
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004239 sky2_show_addr(dev);
4240
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08004241 if (hw->ports > 1) {
4242 struct net_device *dev1;
4243
Stephen Hemmingerbe63a212008-01-15 11:29:29 -08004244 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004245 if (!dev1)
4246 dev_warn(&pdev->dev, "allocation for second device failed\n");
4247 else if ((err = register_netdev(dev1))) {
4248 dev_warn(&pdev->dev,
4249 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004250 hw->dev[1] = NULL;
4251 free_netdev(dev1);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004252 } else
4253 sky2_show_addr(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004254 }
4255
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004256 setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw);
Stephen Hemminger81906792007-02-15 16:40:33 -08004257 INIT_WORK(&hw->restart_work, sky2_restart);
4258
Stephen Hemminger793b8832005-09-14 16:06:14 -07004259 pci_set_drvdata(pdev, hw);
4260
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004261 return 0;
4262
Stephen Hemminger793b8832005-09-14 16:06:14 -07004263err_out_unregister:
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004264 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004265 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004266 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004267err_out_free_netdev:
4268 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004269err_out_free_pci:
Stephen Hemminger793b8832005-09-14 16:06:14 -07004270 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemminger167f53d2007-09-25 19:01:02 -07004271 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004272err_out_iounmap:
4273 iounmap(hw->regs);
4274err_out_free_hw:
4275 kfree(hw);
4276err_out_free_regions:
4277 pci_release_regions(pdev);
Stephen Hemminger44a1d2e2007-04-30 14:23:49 -07004278err_out_disable:
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004279 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004280err_out:
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004281 pci_set_drvdata(pdev, NULL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004282 return err;
4283}
4284
4285static void __devexit sky2_remove(struct pci_dev *pdev)
4286{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004287 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004288 int i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004289
Stephen Hemminger793b8832005-09-14 16:06:14 -07004290 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004291 return;
4292
Stephen Hemminger32c2c302007-08-21 14:34:03 -07004293 del_timer_sync(&hw->watchdog_timer);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004294 cancel_work_sync(&hw->restart_work);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004295
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004296 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004297 unregister_netdev(hw->dev[i]);
Stephen Hemminger81906792007-02-15 16:40:33 -08004298
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07004299 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004300
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004301 sky2_power_aux(hw);
4302
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004303 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004304 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004305 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004306
4307 free_irq(pdev->irq, hw);
Stephen Hemmingerea76e632007-09-19 15:36:44 -07004308 if (hw->flags & SKY2_HW_USE_MSI)
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08004309 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004310 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004311 pci_release_regions(pdev);
4312 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07004313
Stephen Hemmingerb877fe22007-10-22 13:39:09 -07004314 for (i = hw->ports-1; i >= 0; --i)
Stephen Hemminger6de16232007-10-17 13:26:42 -07004315 free_netdev(hw->dev[i]);
4316
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004317 iounmap(hw->regs);
4318 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004319
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004320 pci_set_drvdata(pdev, NULL);
4321}
4322
4323#ifdef CONFIG_PM
4324static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
4325{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004326 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004327 int i, wol = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004328
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004329 if (!hw)
4330 return 0;
4331
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004332 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004333 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08004334 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004335
Stephen Hemmingere3173832007-02-06 10:45:39 -08004336 if (netif_running(dev))
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004337 sky2_down(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004338
4339 if (sky2->wol)
4340 sky2_wol_init(sky2);
4341
4342 wol |= sky2->wol;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004343 }
4344
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004345 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004346 napi_disable(&hw->napi);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004347 sky2_power_aux(hw);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004348
Linus Torvaldsd374c1c2006-06-12 12:53:27 -07004349 pci_save_state(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004350 pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004351 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4352
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09004353 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004354}
4355
4356static int sky2_resume(struct pci_dev *pdev)
4357{
Stephen Hemminger793b8832005-09-14 16:06:14 -07004358 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004359 int i, err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004360
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004361 if (!hw)
4362 return 0;
4363
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004364 err = pci_set_power_state(pdev, PCI_D0);
4365 if (err)
4366 goto out;
4367
4368 err = pci_restore_state(pdev);
4369 if (err)
4370 goto out;
4371
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004372 pci_enable_wake(pdev, PCI_D0, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004373
4374 /* Re-enable all clocks */
Stephen Hemminger05745c42007-09-19 15:36:45 -07004375 if (hw->chip_id == CHIP_ID_YUKON_EX ||
4376 hw->chip_id == CHIP_ID_YUKON_EC_U ||
4377 hw->chip_id == CHIP_ID_YUKON_FE_P)
Stephen Hemmingerb32f40c2007-11-27 10:57:27 -08004378 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
Stephen Hemminger1ad5b4a2007-04-07 16:02:27 -07004379
Stephen Hemmingere3173832007-02-06 10:45:39 -08004380 sky2_reset(hw);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004381 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
Stephen Hemminger6de16232007-10-17 13:26:42 -07004382 napi_enable(&hw->napi);
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09004383
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09004384 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004385 struct net_device *dev = hw->dev[i];
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07004386 if (netif_running(dev)) {
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004387 err = sky2_up(dev);
4388 if (err) {
4389 printk(KERN_ERR PFX "%s: could not up: %d\n",
4390 dev->name, err);
4391 dev_close(dev);
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004392 goto out;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07004393 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004394 }
4395 }
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09004396
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004397 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004398out:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08004399 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08004400 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08004401 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004402}
4403#endif
4404
Stephen Hemmingere3173832007-02-06 10:45:39 -08004405static void sky2_shutdown(struct pci_dev *pdev)
4406{
4407 struct sky2_hw *hw = pci_get_drvdata(pdev);
4408 int i, wol = 0;
4409
Stephen Hemminger549a68c2007-05-11 11:21:44 -07004410 if (!hw)
4411 return;
4412
Stephen Hemminger5c0d6b32007-10-14 13:25:22 -07004413 del_timer_sync(&hw->watchdog_timer);
Stephen Hemmingere3173832007-02-06 10:45:39 -08004414
4415 for (i = 0; i < hw->ports; i++) {
4416 struct net_device *dev = hw->dev[i];
4417 struct sky2_port *sky2 = netdev_priv(dev);
4418
4419 if (sky2->wol) {
4420 wol = 1;
4421 sky2_wol_init(sky2);
4422 }
4423 }
4424
4425 if (wol)
4426 sky2_power_aux(hw);
4427
4428 pci_enable_wake(pdev, PCI_D3hot, wol);
4429 pci_enable_wake(pdev, PCI_D3cold, wol);
4430
4431 pci_disable_device(pdev);
4432 pci_set_power_state(pdev, PCI_D3hot);
4433
4434}
4435
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004436static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07004437 .name = DRV_NAME,
4438 .id_table = sky2_id_table,
4439 .probe = sky2_probe,
4440 .remove = __devexit_p(sky2_remove),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004441#ifdef CONFIG_PM
Stephen Hemminger793b8832005-09-14 16:06:14 -07004442 .suspend = sky2_suspend,
4443 .resume = sky2_resume,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004444#endif
Stephen Hemmingere3173832007-02-06 10:45:39 -08004445 .shutdown = sky2_shutdown,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004446};
4447
4448static int __init sky2_init_module(void)
4449{
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004450 sky2_debug_init();
shemminger@osdl.org50241c42005-11-30 11:45:22 -08004451 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004452}
4453
4454static void __exit sky2_cleanup_module(void)
4455{
4456 pci_unregister_driver(&sky2_driver);
Stephen Hemminger3cf26752007-07-09 15:33:35 -07004457 sky2_debug_cleanup();
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004458}
4459
4460module_init(sky2_init_module);
4461module_exit(sky2_cleanup_module);
4462
4463MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe632007-01-23 11:38:57 -08004464MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07004465MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08004466MODULE_VERSION(DRV_VERSION);