blob: 5abcf853e98b99e1363c961346a3b7be44703f3f [file] [log] [blame]
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001/*
2 * New driver for Marvell Yukon 2 chipset.
3 * Based on earlier sk98lin, and skge driver.
4 *
5 * This driver intentionally does not support all the features
6 * of the original driver such as link fail-over and link management because
7 * those should be done at higher levels.
8 *
9 * Copyright (C) 2005 Stephen Hemminger <shemminger@osdl.org>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
Stephen Hemminger798b6b12006-10-22 20:16:57 -070013 * the Free Software Foundation; either version 2 of the License.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070014 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Stephen Hemminger793b8832005-09-14 16:06:14 -070017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
Stephen Hemminger793b8832005-09-14 16:06:14 -070025#include <linux/crc32.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070026#include <linux/kernel.h>
27#include <linux/version.h>
28#include <linux/module.h>
29#include <linux/netdevice.h>
Andrew Mortond0bbccf2005-11-10 15:29:27 -080030#include <linux/dma-mapping.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070031#include <linux/etherdevice.h>
32#include <linux/ethtool.h>
33#include <linux/pci.h>
34#include <linux/ip.h>
35#include <linux/tcp.h>
36#include <linux/in.h>
37#include <linux/delay.h>
Stephen Hemminger91c86df2005-12-09 11:34:57 -080038#include <linux/workqueue.h>
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070039#include <linux/if_vlan.h>
Stephen Hemmingerd70cd512005-12-09 11:35:09 -080040#include <linux/prefetch.h>
shemminger@osdl.orgef743d32005-11-30 11:45:12 -080041#include <linux/mii.h>
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070042
43#include <asm/irq.h>
44
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -070045#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
46#define SKY2_VLAN_TAG_USED 1
47#endif
48
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070049#include "sky2.h"
50
51#define DRV_NAME "sky2"
shemminger@linux-foundation.org285e6dd2007-01-26 11:38:40 -080052#define DRV_VERSION "1.11.1"
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070053#define PFX DRV_NAME " "
54
55/*
56 * The Yukon II chipset takes 64 bit command blocks (called list elements)
57 * that are organized into three (receive, transmit, status) different rings
Stephen Hemminger14d02632006-09-26 11:57:43 -070058 * similar to Tigon3.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070059 */
60
Stephen Hemminger14d02632006-09-26 11:57:43 -070061#define RX_LE_SIZE 1024
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070062#define RX_LE_BYTES (RX_LE_SIZE*sizeof(struct sky2_rx_le))
Stephen Hemminger14d02632006-09-26 11:57:43 -070063#define RX_MAX_PENDING (RX_LE_SIZE/6 - 2)
shemminger@osdl.org13210ce2005-11-30 11:45:14 -080064#define RX_DEF_PENDING RX_MAX_PENDING
Stephen Hemminger82788c72006-01-17 13:43:10 -080065#define RX_SKB_ALIGN 8
Stephen Hemminger22e11702006-07-12 15:23:48 -070066#define RX_BUF_WRITE 16
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070067
Stephen Hemminger793b8832005-09-14 16:06:14 -070068#define TX_RING_SIZE 512
69#define TX_DEF_PENDING (TX_RING_SIZE - 1)
70#define TX_MIN_PENDING 64
Stephen Hemmingerb19666d2006-03-07 11:06:36 -080071#define MAX_SKB_TX_LE (4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS)
Stephen Hemminger793b8832005-09-14 16:06:14 -070072
73#define STATUS_RING_SIZE 2048 /* 2 ports * (TX + 2*RX) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070074#define STATUS_LE_BYTES (STATUS_RING_SIZE*sizeof(struct sky2_status_le))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070075#define TX_WATCHDOG (5 * HZ)
76#define NAPI_WEIGHT 64
77#define PHY_RETRIES 1000
78
Stephen Hemmingercb5d9542006-05-08 15:11:29 -070079#define RING_NEXT(x,s) (((x)+1) & ((s)-1))
80
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070081static const u32 default_msg =
Stephen Hemminger793b8832005-09-14 16:06:14 -070082 NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
83 | NETIF_MSG_TIMER | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR
Stephen Hemminger3be92a72006-01-17 13:43:17 -080084 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070085
Stephen Hemminger793b8832005-09-14 16:06:14 -070086static int debug = -1; /* defaults above */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -070087module_param(debug, int, 0);
88MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
89
Stephen Hemminger14d02632006-09-26 11:57:43 -070090static int copybreak __read_mostly = 128;
Stephen Hemmingerbdb5c582005-12-09 11:34:55 -080091module_param(copybreak, int, 0);
92MODULE_PARM_DESC(copybreak, "Receive copy threshold");
93
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -080094static int disable_msi = 0;
95module_param(disable_msi, int, 0);
96MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)");
97
Stephen Hemmingere561a832006-10-17 10:20:51 -070098static int idle_timeout = 0;
Stephen Hemminger01bd7562006-05-08 15:11:30 -070099module_param(idle_timeout, int, 0);
Stephen Hemmingere561a832006-10-17 10:20:51 -0700100MODULE_PARM_DESC(idle_timeout, "Watchdog timer for lost interrupts (ms)");
Stephen Hemminger01bd7562006-05-08 15:11:30 -0700101
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700102static const struct pci_device_id sky2_id_table[] = {
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800103 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */
104 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */
Stephen Hemminger2d2a3872006-05-17 14:37:04 -0700105 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */
Stephen Hemminger2f4a66a2006-09-01 14:52:04 -0700106 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */
Stephen Hemminger508f89e2006-12-01 14:29:34 -0800107 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */
Stephen Hemmingere5b74c72006-12-04 15:53:36 -0800108 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4340) }, /* 88E8021 */
109 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4341) }, /* 88E8022 */
110 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4342) }, /* 88E8061 */
111 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4343) }, /* 88E8062 */
112 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4344) }, /* 88E8021 */
113 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4345) }, /* 88E8022 */
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4346) }, /* 88E8061 */
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, /* 88E8062 */
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, /* 88E8035 */
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, /* 88E8036 */
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) }, /* 88E8038 */
119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4353) }, /* 88E8039 */
120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4356) }, /* 88EC033 */
121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, /* 88E8052 */
122 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */
123 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */
124 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */
125 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */
126 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */
127 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */
128 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700129 { 0 }
130};
Stephen Hemminger793b8832005-09-14 16:06:14 -0700131
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700132MODULE_DEVICE_TABLE(pci, sky2_id_table);
133
134/* Avoid conditionals by using array */
135static const unsigned txqaddr[] = { Q_XA1, Q_XA2 };
136static const unsigned rxqaddr[] = { Q_R1, Q_R2 };
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -0700137static const u32 portirq_msk[] = { Y2_IS_PORT_1, Y2_IS_PORT_2 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700138
Stephen Hemminger92f965e2005-12-09 11:34:53 -0800139/* This driver supports yukon2 chipset only */
140static const char *yukon2_name[] = {
141 "XL", /* 0xb3 */
142 "EC Ultra", /* 0xb4 */
143 "UNKNOWN", /* 0xb5 */
144 "EC", /* 0xb6 */
145 "FE", /* 0xb7 */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700146};
147
Stephen Hemminger793b8832005-09-14 16:06:14 -0700148/* Access to external PHY */
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800149static int gm_phy_write(struct sky2_hw *hw, unsigned port, u16 reg, u16 val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700150{
151 int i;
152
153 gma_write16(hw, port, GM_SMI_DATA, val);
154 gma_write16(hw, port, GM_SMI_CTRL,
155 GM_SMI_CT_PHY_AD(PHY_ADDR_MARV) | GM_SMI_CT_REG_AD(reg));
156
157 for (i = 0; i < PHY_RETRIES; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700158 if (!(gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_BUSY))
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800159 return 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700160 udelay(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700161 }
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800162
Stephen Hemminger793b8832005-09-14 16:06:14 -0700163 printk(KERN_WARNING PFX "%s: phy write timeout\n", hw->dev[port]->name);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800164 return -ETIMEDOUT;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700165}
166
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800167static int __gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg, u16 *val)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700168{
169 int i;
170
Stephen Hemminger793b8832005-09-14 16:06:14 -0700171 gma_write16(hw, port, GM_SMI_CTRL, GM_SMI_CT_PHY_AD(PHY_ADDR_MARV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700172 | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD);
173
174 for (i = 0; i < PHY_RETRIES; i++) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800175 if (gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_RD_VAL) {
176 *val = gma_read16(hw, port, GM_SMI_DATA);
177 return 0;
178 }
179
Stephen Hemminger793b8832005-09-14 16:06:14 -0700180 udelay(1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700181 }
182
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800183 return -ETIMEDOUT;
184}
185
186static u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
187{
188 u16 v;
189
190 if (__gm_phy_read(hw, port, reg, &v) != 0)
191 printk(KERN_WARNING PFX "%s: phy read timeout\n", hw->dev[port]->name);
192 return v;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700193}
194
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800195
196static void sky2_power_on(struct sky2_hw *hw)
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700197{
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800198 /* switch power to VCC (WA for VAUX problem) */
199 sky2_write8(hw, B0_POWER_CTRL,
200 PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700201
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800202 /* disable Core Clock Division, */
203 sky2_write32(hw, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700204
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800205 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
206 /* enable bits are inverted */
207 sky2_write8(hw, B2_Y2_CLK_GATE,
208 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
209 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
210 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
211 else
212 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700213
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800214 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
215 u32 reg1;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700216
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800217 sky2_pci_write32(hw, PCI_DEV_REG3, 0);
218 reg1 = sky2_pci_read32(hw, PCI_DEV_REG4);
219 reg1 &= P_ASPM_CONTROL_MSK;
220 sky2_pci_write32(hw, PCI_DEV_REG4, reg1);
221 sky2_pci_write32(hw, PCI_DEV_REG5, 0);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700222 }
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800223}
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700224
Stephen Hemmingerae306cc2006-12-20 13:06:36 -0800225static void sky2_power_aux(struct sky2_hw *hw)
226{
227 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
228 sky2_write8(hw, B2_Y2_CLK_GATE, 0);
229 else
230 /* enable bits are inverted */
231 sky2_write8(hw, B2_Y2_CLK_GATE,
232 Y2_PCI_CLK_LNK1_DIS | Y2_COR_CLK_LNK1_DIS |
233 Y2_CLK_GAT_LNK1_DIS | Y2_PCI_CLK_LNK2_DIS |
234 Y2_COR_CLK_LNK2_DIS | Y2_CLK_GAT_LNK2_DIS);
235
236 /* switch power to VAUX */
237 if (sky2_read16(hw, B0_CTST) & Y2_VAUX_AVAIL)
238 sky2_write8(hw, B0_POWER_CTRL,
239 (PC_VAUX_ENA | PC_VCC_ENA |
240 PC_VAUX_ON | PC_VCC_OFF));
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -0700241}
242
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700243static void sky2_gmac_reset(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700244{
245 u16 reg;
246
247 /* disable all GMAC IRQ's */
248 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), 0);
249 /* disable PHY IRQs */
250 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700251
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700252 gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */
253 gma_write16(hw, port, GM_MC_ADDR_H2, 0);
254 gma_write16(hw, port, GM_MC_ADDR_H3, 0);
255 gma_write16(hw, port, GM_MC_ADDR_H4, 0);
256
257 reg = gma_read16(hw, port, GM_RX_CTRL);
258 reg |= GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA;
259 gma_write16(hw, port, GM_RX_CTRL, reg);
260}
261
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700262/* flow control to advertise bits */
263static const u16 copper_fc_adv[] = {
264 [FC_NONE] = 0,
265 [FC_TX] = PHY_M_AN_ASP,
266 [FC_RX] = PHY_M_AN_PC,
267 [FC_BOTH] = PHY_M_AN_PC | PHY_M_AN_ASP,
268};
269
270/* flow control to advertise bits when using 1000BaseX */
271static const u16 fiber_fc_adv[] = {
272 [FC_BOTH] = PHY_M_P_BOTH_MD_X,
273 [FC_TX] = PHY_M_P_ASYM_MD_X,
274 [FC_RX] = PHY_M_P_SYM_MD_X,
275 [FC_NONE] = PHY_M_P_NO_PAUSE_X,
276};
277
278/* flow control to GMA disable bits */
279static const u16 gm_fc_disable[] = {
280 [FC_NONE] = GM_GPCR_FC_RX_DIS | GM_GPCR_FC_TX_DIS,
281 [FC_TX] = GM_GPCR_FC_RX_DIS,
282 [FC_RX] = GM_GPCR_FC_TX_DIS,
283 [FC_BOTH] = 0,
284};
285
286
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700287static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
288{
289 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700290 u16 ctrl, ct1000, adv, pg, ledctrl, ledover, reg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700291
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700292 if (sky2->autoneg == AUTONEG_ENABLE &&
Stephen Hemminger86a31a72006-05-17 14:37:05 -0700293 !(hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700294 u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL);
295
296 ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK |
Stephen Hemminger793b8832005-09-14 16:06:14 -0700297 PHY_M_EC_MAC_S_MSK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700298 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
299
300 if (hw->chip_id == CHIP_ID_YUKON_EC)
301 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
302 else
303 ectrl |= PHY_M_EC_M_DSC(2) | PHY_M_EC_S_DSC(3);
304
305 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
306 }
307
308 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700309 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700310 if (hw->chip_id == CHIP_ID_YUKON_FE) {
311 /* enable automatic crossover */
312 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO) >> 1;
313 } else {
314 /* disable energy detect */
315 ctrl &= ~PHY_M_PC_EN_DET_MSK;
316
317 /* enable automatic crossover */
318 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
319
320 if (sky2->autoneg == AUTONEG_ENABLE &&
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700321 (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700322 ctrl &= ~PHY_M_PC_DSC_MSK;
323 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
324 }
325 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700326 } else {
327 /* workaround for deviation #4.88 (CRC errors) */
328 /* disable Automatic Crossover */
329
330 ctrl &= ~PHY_M_PC_MDIX_MSK;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700331 }
332
333 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
334
335 /* special setup for PHY 88E1112 Fiber */
336 if (hw->chip_id == CHIP_ID_YUKON_XL && !sky2_is_copper(hw)) {
337 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
338
339 /* Fiber: select 1000BASE-X only mode MAC Specific Ctrl Reg. */
340 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 2);
341 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
342 ctrl &= ~PHY_M_MAC_MD_MSK;
343 ctrl |= PHY_M_MAC_MODE_SEL(PHY_M_MAC_MD_1000BX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700344 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ctrl);
345
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700346 if (hw->pmd_type == 'P') {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700347 /* select page 1 to access Fiber registers */
348 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 1);
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700349
350 /* for SFP-module set SIGDET polarity to low */
351 ctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
352 ctrl |= PHY_M_FIB_SIGD_POL;
353 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700354 }
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700355
356 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700357 }
358
Stephen Hemminger7800fdd2006-10-17 10:24:10 -0700359 ctrl = PHY_CT_RESET;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700360 ct1000 = 0;
361 adv = PHY_AN_CSMA;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700362 reg = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700363
364 if (sky2->autoneg == AUTONEG_ENABLE) {
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700365 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700366 if (sky2->advertising & ADVERTISED_1000baseT_Full)
367 ct1000 |= PHY_M_1000C_AFD;
368 if (sky2->advertising & ADVERTISED_1000baseT_Half)
369 ct1000 |= PHY_M_1000C_AHD;
370 if (sky2->advertising & ADVERTISED_100baseT_Full)
371 adv |= PHY_M_AN_100_FD;
372 if (sky2->advertising & ADVERTISED_100baseT_Half)
373 adv |= PHY_M_AN_100_HD;
374 if (sky2->advertising & ADVERTISED_10baseT_Full)
375 adv |= PHY_M_AN_10_FD;
376 if (sky2->advertising & ADVERTISED_10baseT_Half)
377 adv |= PHY_M_AN_10_HD;
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700378
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700379 adv |= copper_fc_adv[sky2->flow_mode];
Stephen Hemmingerb89165f2006-09-06 12:44:53 -0700380 } else { /* special defines for FIBER (88E1040S only) */
381 if (sky2->advertising & ADVERTISED_1000baseT_Full)
382 adv |= PHY_M_AN_1000X_AFD;
383 if (sky2->advertising & ADVERTISED_1000baseT_Half)
384 adv |= PHY_M_AN_1000X_AHD;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700385
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700386 adv |= fiber_fc_adv[sky2->flow_mode];
Stephen Hemminger709c6e72006-10-17 10:24:04 -0700387 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700388
389 /* Restart Auto-negotiation */
390 ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG;
391 } else {
392 /* forced speed/duplex settings */
393 ct1000 = PHY_M_1000C_MSE;
394
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700395 /* Disable auto update for duplex flow control and speed */
396 reg |= GM_GPCR_AU_ALL_DIS;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700397
398 switch (sky2->speed) {
399 case SPEED_1000:
400 ctrl |= PHY_CT_SP1000;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700401 reg |= GM_GPCR_SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700402 break;
403 case SPEED_100:
404 ctrl |= PHY_CT_SP100;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700405 reg |= GM_GPCR_SPEED_100;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700406 break;
407 }
408
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700409 if (sky2->duplex == DUPLEX_FULL) {
410 reg |= GM_GPCR_DUP_FULL;
411 ctrl |= PHY_CT_DUP_MD;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700412 } else if (sky2->speed < SPEED_1000)
413 sky2->flow_mode = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700414
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700415
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700416 reg |= gm_fc_disable[sky2->flow_mode];
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700417
418 /* Forward pause packets to GMAC? */
Stephen Hemminger16ad91e2006-10-17 10:24:13 -0700419 if (sky2->flow_mode & FC_RX)
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700420 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
421 else
422 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700423 }
424
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700425 gma_write16(hw, port, GM_GP_CTRL, reg);
426
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700427 if (hw->chip_id != CHIP_ID_YUKON_FE)
428 gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000);
429
430 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv);
431 gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl);
432
433 /* Setup Phy LED's */
434 ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS);
435 ledover = 0;
436
437 switch (hw->chip_id) {
438 case CHIP_ID_YUKON_FE:
439 /* on 88E3082 these bits are at 11..9 (shifted left) */
440 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) << 1;
441
442 ctrl = gm_phy_read(hw, port, PHY_MARV_FE_LED_PAR);
443
444 /* delete ACT LED control bits */
445 ctrl &= ~PHY_M_FELP_LED1_MSK;
446 /* change ACT LED control to blink mode */
447 ctrl |= PHY_M_FELP_LED1_CTRL(LED_PAR_CTRL_ACT_BL);
448 gm_phy_write(hw, port, PHY_MARV_FE_LED_PAR, ctrl);
449 break;
450
451 case CHIP_ID_YUKON_XL:
Stephen Hemminger793b8832005-09-14 16:06:14 -0700452 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700453
454 /* select page 3 to access LED control register */
455 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
456
457 /* set LED Function Control register */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700458 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
459 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
460 PHY_M_LEDC_INIT_CTRL(7) | /* 10 Mbps */
461 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
462 PHY_M_LEDC_STA0_CTRL(7))); /* 1000 Mbps */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700463
464 /* set Polarity Control register */
465 gm_phy_write(hw, port, PHY_MARV_PHY_STAT,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700466 (PHY_M_POLC_LS1_P_MIX(4) |
467 PHY_M_POLC_IS0_P_MIX(4) |
468 PHY_M_POLC_LOS_CTRL(2) |
469 PHY_M_POLC_INIT_CTRL(2) |
470 PHY_M_POLC_STA1_CTRL(2) |
471 PHY_M_POLC_STA0_CTRL(2)));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700472
473 /* restore page register */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700474 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700475 break;
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700476 case CHIP_ID_YUKON_EC_U:
477 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
478
479 /* select page 3 to access LED control register */
480 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
481
482 /* set LED Function Control register */
483 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
484 (PHY_M_LEDC_LOS_CTRL(1) | /* LINK/ACT */
485 PHY_M_LEDC_INIT_CTRL(8) | /* 10 Mbps */
486 PHY_M_LEDC_STA1_CTRL(7) | /* 100 Mbps */
487 PHY_M_LEDC_STA0_CTRL(7)));/* 1000 Mbps */
488
489 /* set Blink Rate in LED Timer Control Register */
490 gm_phy_write(hw, port, PHY_MARV_INT_MASK,
491 ledctrl | PHY_M_LED_BLINK_RT(BLINK_84MS));
492 /* restore page register */
493 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
494 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700495
496 default:
497 /* set Tx LED (LED_TX) to blink mode on Rx OR Tx activity */
498 ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL;
499 /* turn off the Rx LED (LED_RX) */
Stephen Hemminger0efdf262006-12-05 12:03:41 -0800500 ledover &= ~PHY_M_LED_MO_RX;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700501 }
502
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700503 if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == CHIP_REV_YU_EC_A1) {
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800504 /* apply fixes in PHY AFE */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700505 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
506 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255);
507
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800508 /* increase differential signal amplitude in 10BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700509 gm_phy_write(hw, port, 0x18, 0xaa99);
510 gm_phy_write(hw, port, 0x17, 0x2011);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700511
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800512 /* fix for IEEE A/B Symmetry failure in 1000BASE-T */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700513 gm_phy_write(hw, port, 0x18, 0xa204);
514 gm_phy_write(hw, port, 0x17, 0x2002);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800515
516 /* set page register to 0 */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -0700517 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800518 } else {
519 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
520
521 if (sky2->autoneg == AUTONEG_DISABLE || sky2->speed == SPEED_100) {
522 /* turn on 100 Mbps LED (LED_LINK100) */
Stephen Hemminger0efdf262006-12-05 12:03:41 -0800523 ledover |= PHY_M_LED_MO_100;
Stephen Hemminger977bdf02006-02-22 11:44:58 -0800524 }
525
526 if (ledover)
527 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
528
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700529 }
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700530
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700531 /* Enable phy interrupt on auto-negotiation complete (or link up) */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700532 if (sky2->autoneg == AUTONEG_ENABLE)
533 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
534 else
535 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
536}
537
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700538static void sky2_phy_power(struct sky2_hw *hw, unsigned port, int onoff)
539{
540 u32 reg1;
541 static const u32 phy_power[]
542 = { PCI_Y2_PHY1_POWD, PCI_Y2_PHY2_POWD };
543
544 /* looks like this XL is back asswards .. */
545 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1)
546 onoff = !onoff;
547
Stephen Hemmingeraed2cec2006-12-20 13:06:35 -0800548 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700549 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700550 if (onoff)
551 /* Turn off phy power saving */
552 reg1 &= ~phy_power[port];
553 else
554 reg1 |= phy_power[port];
555
556 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
shemminger@osdl.org98232f82006-08-28 10:00:52 -0700557 sky2_pci_read32(hw, PCI_DEV_REG1);
Stephen Hemmingeraed2cec2006-12-20 13:06:35 -0800558 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -0700559 udelay(100);
560}
561
Stephen Hemminger1b537562005-12-20 15:08:07 -0800562/* Force a renegotiation */
563static void sky2_phy_reinit(struct sky2_port *sky2)
564{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800565 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800566 sky2_phy_init(sky2->hw, sky2->port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800567 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger1b537562005-12-20 15:08:07 -0800568}
569
Stephen Hemmingere3173832007-02-06 10:45:39 -0800570/* Put device in state to listen for Wake On Lan */
571static void sky2_wol_init(struct sky2_port *sky2)
572{
573 struct sky2_hw *hw = sky2->hw;
574 unsigned port = sky2->port;
575 enum flow_control save_mode;
576 u16 ctrl;
577 u32 reg1;
578
579 /* Bring hardware out of reset */
580 sky2_write16(hw, B0_CTST, CS_RST_CLR);
581 sky2_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR);
582
583 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR);
584 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
585
586 /* Force to 10/100
587 * sky2_reset will re-enable on resume
588 */
589 save_mode = sky2->flow_mode;
590 ctrl = sky2->advertising;
591
592 sky2->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full);
593 sky2->flow_mode = FC_NONE;
594 sky2_phy_power(hw, port, 1);
595 sky2_phy_reinit(sky2);
596
597 sky2->flow_mode = save_mode;
598 sky2->advertising = ctrl;
599
600 /* Set GMAC to no flow control and auto update for speed/duplex */
601 gma_write16(hw, port, GM_GP_CTRL,
602 GM_GPCR_FC_TX_DIS|GM_GPCR_TX_ENA|GM_GPCR_RX_ENA|
603 GM_GPCR_DUP_FULL|GM_GPCR_FC_RX_DIS|GM_GPCR_AU_FCT_DIS);
604
605 /* Set WOL address */
606 memcpy_toio(hw->regs + WOL_REGS(port, WOL_MAC_ADDR),
607 sky2->netdev->dev_addr, ETH_ALEN);
608
609 /* Turn on appropriate WOL control bits */
610 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), WOL_CTL_CLEAR_RESULT);
611 ctrl = 0;
612 if (sky2->wol & WAKE_PHY)
613 ctrl |= WOL_CTL_ENA_PME_ON_LINK_CHG|WOL_CTL_ENA_LINK_CHG_UNIT;
614 else
615 ctrl |= WOL_CTL_DIS_PME_ON_LINK_CHG|WOL_CTL_DIS_LINK_CHG_UNIT;
616
617 if (sky2->wol & WAKE_MAGIC)
618 ctrl |= WOL_CTL_ENA_PME_ON_MAGIC_PKT|WOL_CTL_ENA_MAGIC_PKT_UNIT;
619 else
620 ctrl |= WOL_CTL_DIS_PME_ON_MAGIC_PKT|WOL_CTL_DIS_MAGIC_PKT_UNIT;;
621
622 ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT;
623 sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl);
624
625 /* Turn on legacy PCI-Express PME mode */
626 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
627 reg1 = sky2_pci_read32(hw, PCI_DEV_REG1);
628 reg1 |= PCI_Y2_PME_LEGACY;
629 sky2_pci_write32(hw, PCI_DEV_REG1, reg1);
630 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
631
632 /* block receiver */
633 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
634
635}
636
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700637static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
638{
639 struct sky2_port *sky2 = netdev_priv(hw->dev[port]);
640 u16 reg;
641 int i;
642 const u8 *addr = hw->dev[port]->dev_addr;
643
shemminger@osdl.org42eeea02005-11-30 11:45:13 -0800644 sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
645 sky2_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR|GPC_ENA_PAUSE);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700646
647 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR);
648
Stephen Hemminger793b8832005-09-14 16:06:14 -0700649 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && port == 1) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700650 /* WA DEV_472 -- looks like crossed wires on port 2 */
651 /* clear GMAC 1 Control reset */
652 sky2_write8(hw, SK_REG(0, GMAC_CTRL), GMC_RST_CLR);
653 do {
654 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_SET);
655 sky2_write8(hw, SK_REG(1, GMAC_CTRL), GMC_RST_CLR);
656 } while (gm_phy_read(hw, 1, PHY_MARV_ID0) != PHY_MARV_ID0_VAL ||
657 gm_phy_read(hw, 1, PHY_MARV_ID1) != PHY_MARV_ID1_Y2 ||
658 gm_phy_read(hw, 1, PHY_MARV_INT_MASK) != 0);
659 }
660
Stephen Hemminger793b8832005-09-14 16:06:14 -0700661 sky2_read16(hw, SK_REG(port, GMAC_IRQ_SRC));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700662
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -0700663 /* Enable Transmit FIFO Underrun */
664 sky2_write8(hw, SK_REG(port, GMAC_IRQ_MSK), GMAC_DEF_MSK);
665
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800666 spin_lock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700667 sky2_phy_init(hw, port);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800668 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700669
670 /* MIB clear */
671 reg = gma_read16(hw, port, GM_PHY_ADDR);
672 gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR);
673
Stephen Hemminger43f2f102006-04-05 17:47:15 -0700674 for (i = GM_MIB_CNT_BASE; i <= GM_MIB_CNT_END; i += 4)
675 gma_read16(hw, port, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700676 gma_write16(hw, port, GM_PHY_ADDR, reg);
677
678 /* transmit control */
679 gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF));
680
681 /* receive control reg: unicast + multicast + no FCS */
682 gma_write16(hw, port, GM_RX_CTRL,
Stephen Hemminger793b8832005-09-14 16:06:14 -0700683 GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700684
685 /* transmit flow control */
686 gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff);
687
688 /* transmit parameter */
689 gma_write16(hw, port, GM_TX_PARAM,
690 TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) |
691 TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) |
692 TX_IPG_JAM_DATA(TX_IPG_JAM_DEF) |
693 TX_BACK_OFF_LIM(TX_BOF_LIM_DEF));
694
695 /* serial mode register */
696 reg = DATA_BLIND_VAL(DATA_BLIND_DEF) |
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700697 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700698
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700699 if (hw->dev[port]->mtu > ETH_DATA_LEN)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700700 reg |= GM_SMOD_JUMBO_ENA;
701
702 gma_write16(hw, port, GM_SERIAL_MODE, reg);
703
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700704 /* virtual address for data */
705 gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr);
706
Stephen Hemminger793b8832005-09-14 16:06:14 -0700707 /* physical address: used for pause frames */
708 gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr);
709
710 /* ignore counter overflows */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700711 gma_write16(hw, port, GM_TX_IRQ_MSK, 0);
712 gma_write16(hw, port, GM_RX_IRQ_MSK, 0);
713 gma_write16(hw, port, GM_TR_IRQ_MSK, 0);
714
715 /* Configure Rx MAC FIFO */
716 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR);
Stephen Hemminger70f1be42006-03-07 11:06:37 -0800717 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T),
718 GMF_OPER_ON | GMF_RX_F_FL_ON);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700719
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700720 /* Flush Rx MAC FIFO on any flow control or error */
shemminger@osdl.org42eeea02005-11-30 11:45:13 -0800721 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), GMR_FS_ANY_ERR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700722
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800723 /* Set threshold to 0xa (64 bytes) + 1 to workaround pause bug */
724 sky2_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF+1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700725
726 /* Configure Tx MAC FIFO */
727 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
728 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800729
730 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
Stephen Hemminger8df9a872006-12-01 14:29:35 -0800731 sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -0800732 sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
733 if (hw->dev[port]->mtu > ETH_DATA_LEN) {
734 /* set Tx GMAC FIFO Almost Empty Threshold */
735 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), 0x180);
736 /* Disable Store & Forward mode for TX */
737 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
738 }
739 }
740
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700741}
742
Stephen Hemminger67712902006-12-04 15:53:45 -0800743/* Assign Ram Buffer allocation to queue */
744static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, u32 space)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700745{
Stephen Hemminger67712902006-12-04 15:53:45 -0800746 u32 end;
747
748 /* convert from K bytes to qwords used for hw register */
749 start *= 1024/8;
750 space *= 1024/8;
751 end = start + space - 1;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700752
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700753 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR);
754 sky2_write32(hw, RB_ADDR(q, RB_START), start);
755 sky2_write32(hw, RB_ADDR(q, RB_END), end);
756 sky2_write32(hw, RB_ADDR(q, RB_WP), start);
757 sky2_write32(hw, RB_ADDR(q, RB_RP), start);
758
759 if (q == Q_R1 || q == Q_R2) {
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800760 u32 tp = space - space/4;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700761
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800762 /* On receive queue's set the thresholds
763 * give receiver priority when > 3/4 full
764 * send pause when down to 2K
765 */
766 sky2_write32(hw, RB_ADDR(q, RB_RX_UTHP), tp);
767 sky2_write32(hw, RB_ADDR(q, RB_RX_LTHP), space/2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700768
Stephen Hemminger1c28f6b2006-01-17 13:43:13 -0800769 tp = space - 2048/8;
770 sky2_write32(hw, RB_ADDR(q, RB_RX_UTPP), tp);
771 sky2_write32(hw, RB_ADDR(q, RB_RX_LTPP), space/4);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700772 } else {
773 /* Enable store & forward on Tx queue's because
774 * Tx FIFO is only 1K on Yukon
775 */
776 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD);
777 }
778
779 sky2_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700780 sky2_read8(hw, RB_ADDR(q, RB_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700781}
782
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700783/* Setup Bus Memory Interface */
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800784static void sky2_qset(struct sky2_hw *hw, u16 q)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700785{
786 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
787 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
788 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -0800789 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700790}
791
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700792/* Setup prefetch unit registers. This is the interface between
793 * hardware and driver list elements
794 */
Stephen Hemminger8cc048e2005-12-09 11:35:07 -0800795static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700796 u64 addr, u32 last)
797{
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700798 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
799 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_RST_CLR);
800 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), addr >> 32);
801 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_LO), (u32) addr);
802 sky2_write16(hw, Y2_QADDR(qaddr, PREF_UNIT_LAST_IDX), last);
803 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL), PREF_UNIT_OP_ON);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700804
805 sky2_read32(hw, Y2_QADDR(qaddr, PREF_UNIT_CTRL));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700806}
807
Stephen Hemminger793b8832005-09-14 16:06:14 -0700808static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
809{
810 struct sky2_tx_le *le = sky2->tx_le + sky2->tx_prod;
811
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700812 sky2->tx_prod = RING_NEXT(sky2->tx_prod, TX_RING_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700813 le->ctrl = 0;
Stephen Hemminger793b8832005-09-14 16:06:14 -0700814 return le;
815}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700816
Stephen Hemminger291ea612006-09-26 11:57:41 -0700817static inline struct tx_ring_info *tx_le_re(struct sky2_port *sky2,
818 struct sky2_tx_le *le)
819{
820 return sky2->tx_ring + (le - sky2->tx_le);
821}
822
Stephen Hemminger290d4de2006-03-20 15:48:15 -0800823/* Update chip's next pointer */
824static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, u16 idx)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700825{
shemminger@osdl.org98232f82006-08-28 10:00:52 -0700826 q = Y2_QADDR(q, PREF_UNIT_PUT_IDX);
Stephen Hemminger762c2de2006-01-17 13:43:14 -0800827 wmb();
shemminger@osdl.org98232f82006-08-28 10:00:52 -0700828 sky2_write16(hw, q, idx);
829 sky2_read16(hw, q);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700830}
831
Stephen Hemminger793b8832005-09-14 16:06:14 -0700832
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700833static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2)
834{
835 struct sky2_rx_le *le = sky2->rx_le + sky2->rx_put;
Stephen Hemmingercb5d9542006-05-08 15:11:29 -0700836 sky2->rx_put = RING_NEXT(sky2->rx_put, RX_LE_SIZE);
Stephen Hemminger291ea612006-09-26 11:57:41 -0700837 le->ctrl = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700838 return le;
839}
840
shemminger@osdl.orga018e332005-11-30 11:45:16 -0800841/* Return high part of DMA address (could be 32 or 64 bit) */
842static inline u32 high32(dma_addr_t a)
843{
Stephen Hemmingera0361192006-01-17 13:43:16 -0800844 return sizeof(a) > sizeof(u32) ? (a >> 16) >> 16 : 0;
shemminger@osdl.orga018e332005-11-30 11:45:16 -0800845}
846
Stephen Hemminger14d02632006-09-26 11:57:43 -0700847/* Build description to hardware for one receive segment */
848static void sky2_rx_add(struct sky2_port *sky2, u8 op,
849 dma_addr_t map, unsigned len)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700850{
851 struct sky2_rx_le *le;
Stephen Hemminger734d1862005-12-09 11:35:00 -0800852 u32 hi = high32(map);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700853
Stephen Hemminger793b8832005-09-14 16:06:14 -0700854 if (sky2->rx_addr64 != hi) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700855 le = sky2_next_rx(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700856 le->addr = cpu_to_le32(hi);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700857 le->opcode = OP_ADDR64 | HW_OWNER;
Stephen Hemminger734d1862005-12-09 11:35:00 -0800858 sky2->rx_addr64 = high32(map + len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700859 }
Stephen Hemminger793b8832005-09-14 16:06:14 -0700860
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700861 le = sky2_next_rx(sky2);
Stephen Hemminger734d1862005-12-09 11:35:00 -0800862 le->addr = cpu_to_le32((u32) map);
863 le->length = cpu_to_le16(len);
Stephen Hemminger14d02632006-09-26 11:57:43 -0700864 le->opcode = op | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700865}
866
Stephen Hemminger14d02632006-09-26 11:57:43 -0700867/* Build description to hardware for one possibly fragmented skb */
868static void sky2_rx_submit(struct sky2_port *sky2,
869 const struct rx_ring_info *re)
870{
871 int i;
872
873 sky2_rx_add(sky2, OP_PACKET, re->data_addr, sky2->rx_data_size);
874
875 for (i = 0; i < skb_shinfo(re->skb)->nr_frags; i++)
876 sky2_rx_add(sky2, OP_BUFFER, re->frag_addr[i], PAGE_SIZE);
877}
878
879
880static void sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re,
881 unsigned size)
882{
883 struct sk_buff *skb = re->skb;
884 int i;
885
886 re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE);
887 pci_unmap_len_set(re, data_size, size);
888
889 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
890 re->frag_addr[i] = pci_map_page(pdev,
891 skb_shinfo(skb)->frags[i].page,
892 skb_shinfo(skb)->frags[i].page_offset,
893 skb_shinfo(skb)->frags[i].size,
894 PCI_DMA_FROMDEVICE);
895}
896
897static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re)
898{
899 struct sk_buff *skb = re->skb;
900 int i;
901
902 pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size),
903 PCI_DMA_FROMDEVICE);
904
905 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++)
906 pci_unmap_page(pdev, re->frag_addr[i],
907 skb_shinfo(skb)->frags[i].size,
908 PCI_DMA_FROMDEVICE);
909}
Stephen Hemminger793b8832005-09-14 16:06:14 -0700910
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700911/* Tell chip where to start receive checksum.
912 * Actually has two checksums, but set both same to avoid possible byte
913 * order problems.
914 */
Stephen Hemminger793b8832005-09-14 16:06:14 -0700915static void rx_set_checksum(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700916{
917 struct sky2_rx_le *le;
918
Stephen Hemminger793b8832005-09-14 16:06:14 -0700919 le = sky2_next_rx(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -0700920 le->addr = cpu_to_le32((ETH_HLEN << 16) | ETH_HLEN);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700921 le->ctrl = 0;
922 le->opcode = OP_TCPSTART | HW_OWNER;
923
Stephen Hemminger793b8832005-09-14 16:06:14 -0700924 sky2_write32(sky2->hw,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700925 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
926 sky2->rx_csum ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
927
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700928}
929
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -0700930/*
931 * The RX Stop command will not work for Yukon-2 if the BMU does not
932 * reach the end of packet and since we can't make sure that we have
933 * incoming data, we must reset the BMU while it is not doing a DMA
934 * transfer. Since it is possible that the RX path is still active,
935 * the RX RAM buffer will be stopped first, so any possible incoming
936 * data will not trigger a DMA. After the RAM buffer is stopped, the
937 * BMU is polled until any DMA in progress is ended and only then it
938 * will be reset.
939 */
940static void sky2_rx_stop(struct sky2_port *sky2)
941{
942 struct sky2_hw *hw = sky2->hw;
943 unsigned rxq = rxqaddr[sky2->port];
944 int i;
945
946 /* disable the RAM Buffer receive queue */
947 sky2_write8(hw, RB_ADDR(rxq, RB_CTRL), RB_DIS_OP_MD);
948
949 for (i = 0; i < 0xffff; i++)
950 if (sky2_read8(hw, RB_ADDR(rxq, Q_RSL))
951 == sky2_read8(hw, RB_ADDR(rxq, Q_RL)))
952 goto stopped;
953
954 printk(KERN_WARNING PFX "%s: receiver stop failed\n",
955 sky2->netdev->name);
956stopped:
957 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
958
959 /* reset the Rx prefetch unit */
960 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
961}
Stephen Hemminger793b8832005-09-14 16:06:14 -0700962
shemminger@osdl.orgd571b692005-10-26 12:16:09 -0700963/* Clean out receive buffer area, assumes receiver hardware stopped */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700964static void sky2_rx_clean(struct sky2_port *sky2)
965{
966 unsigned i;
967
968 memset(sky2->rx_le, 0, RX_LE_BYTES);
Stephen Hemminger793b8832005-09-14 16:06:14 -0700969 for (i = 0; i < sky2->rx_pending; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -0700970 struct rx_ring_info *re = sky2->rx_ring + i;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700971
972 if (re->skb) {
Stephen Hemminger14d02632006-09-26 11:57:43 -0700973 sky2_rx_unmap_skb(sky2->hw->pdev, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -0700974 kfree_skb(re->skb);
975 re->skb = NULL;
976 }
977 }
978}
979
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800980/* Basic MII support */
981static int sky2_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
982{
983 struct mii_ioctl_data *data = if_mii(ifr);
984 struct sky2_port *sky2 = netdev_priv(dev);
985 struct sky2_hw *hw = sky2->hw;
986 int err = -EOPNOTSUPP;
987
988 if (!netif_running(dev))
989 return -ENODEV; /* Phy still in reset */
990
Stephen Hemmingerd89e1342006-03-20 15:48:20 -0800991 switch (cmd) {
shemminger@osdl.orgef743d32005-11-30 11:45:12 -0800992 case SIOCGMIIPHY:
993 data->phy_id = PHY_ADDR_MARV;
994
995 /* fallthru */
996 case SIOCGMIIREG: {
997 u16 val = 0;
Stephen Hemminger91c86df2005-12-09 11:34:57 -0800998
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -0800999 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001000 err = __gm_phy_read(hw, sky2->port, data->reg_num & 0x1f, &val);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001001 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08001002
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001003 data->val_out = val;
1004 break;
1005 }
1006
1007 case SIOCSMIIREG:
1008 if (!capable(CAP_NET_ADMIN))
1009 return -EPERM;
1010
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001011 spin_lock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001012 err = gm_phy_write(hw, sky2->port, data->reg_num & 0x1f,
1013 data->val_in);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001014 spin_unlock_bh(&sky2->phy_lock);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08001015 break;
1016 }
1017 return err;
1018}
1019
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001020#ifdef SKY2_VLAN_TAG_USED
1021static void sky2_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
1022{
1023 struct sky2_port *sky2 = netdev_priv(dev);
1024 struct sky2_hw *hw = sky2->hw;
1025 u16 port = sky2->port;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001026
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001027 netif_tx_lock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001028
1029 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), RX_VLAN_STRIP_ON);
1030 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_VLAN_TAG_ON);
1031 sky2->vlgrp = grp;
1032
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001033 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001034}
1035
1036static void sky2_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
1037{
1038 struct sky2_port *sky2 = netdev_priv(dev);
1039 struct sky2_hw *hw = sky2->hw;
1040 u16 port = sky2->port;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001041
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001042 netif_tx_lock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001043
1044 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), RX_VLAN_STRIP_OFF);
1045 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_VLAN_TAG_OFF);
1046 if (sky2->vlgrp)
1047 sky2->vlgrp->vlan_devices[vid] = NULL;
1048
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001049 netif_tx_unlock_bh(dev);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001050}
1051#endif
1052
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001053/*
Stephen Hemminger14d02632006-09-26 11:57:43 -07001054 * Allocate an skb for receiving. If the MTU is large enough
1055 * make the skb non-linear with a fragment list of pages.
1056 *
Stephen Hemminger82788c72006-01-17 13:43:10 -08001057 * It appears the hardware has a bug in the FIFO logic that
1058 * cause it to hang if the FIFO gets overrun and the receive buffer
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07001059 * is not 64 byte aligned. The buffer returned from netdev_alloc_skb is
1060 * aligned except if slab debugging is enabled.
Stephen Hemminger82788c72006-01-17 13:43:10 -08001061 */
Stephen Hemminger14d02632006-09-26 11:57:43 -07001062static struct sk_buff *sky2_rx_alloc(struct sky2_port *sky2)
Stephen Hemminger82788c72006-01-17 13:43:10 -08001063{
1064 struct sk_buff *skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001065 unsigned long p;
1066 int i;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001067
Stephen Hemminger14d02632006-09-26 11:57:43 -07001068 skb = netdev_alloc_skb(sky2->netdev, sky2->rx_data_size + RX_SKB_ALIGN);
1069 if (!skb)
1070 goto nomem;
1071
1072 p = (unsigned long) skb->data;
1073 skb_reserve(skb, ALIGN(p, RX_SKB_ALIGN) - p);
1074
1075 for (i = 0; i < sky2->rx_nfrags; i++) {
1076 struct page *page = alloc_page(GFP_ATOMIC);
1077
1078 if (!page)
1079 goto free_partial;
1080 skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE);
Stephen Hemminger82788c72006-01-17 13:43:10 -08001081 }
1082
1083 return skb;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001084free_partial:
1085 kfree_skb(skb);
1086nomem:
1087 return NULL;
Stephen Hemminger82788c72006-01-17 13:43:10 -08001088}
1089
1090/*
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001091 * Allocate and setup receiver buffer pool.
Stephen Hemminger14d02632006-09-26 11:57:43 -07001092 * Normal case this ends up creating one list element for skb
1093 * in the receive ring. Worst case if using large MTU and each
1094 * allocation falls on a different 64 bit region, that results
1095 * in 6 list elements per ring entry.
1096 * One element is used for checksum enable/disable, and one
1097 * extra to avoid wrap.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001098 */
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001099static int sky2_rx_start(struct sky2_port *sky2)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001100{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001101 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001102 struct rx_ring_info *re;
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001103 unsigned rxq = rxqaddr[sky2->port];
Stephen Hemminger14d02632006-09-26 11:57:43 -07001104 unsigned i, size, space, thresh;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001105
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001106 sky2->rx_put = sky2->rx_next = 0;
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001107 sky2_qset(hw, rxq);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001108
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001109 /* On PCI express lowering the watermark gives better performance */
1110 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
1111 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1112
1113 /* These chips have no ram buffer?
1114 * MAC Rx RAM Read is controlled by hardware */
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001115 if (hw->chip_id == CHIP_ID_YUKON_EC_U &&
Stephen Hemmingerc3905bc2006-12-04 17:08:19 -08001116 (hw->chip_rev == CHIP_REV_YU_EC_U_A1
1117 || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001118 sky2_write32(hw, Q_ADDR(rxq, Q_F), F_M_RX_RAM_DIS);
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001119
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001120 sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1);
1121
1122 rx_set_checksum(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001123
Stephen Hemminger14d02632006-09-26 11:57:43 -07001124 /* Space needed for frame data + headers rounded up */
1125 size = ALIGN(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8)
1126 + 8;
1127
1128 /* Stopping point for hardware truncation */
1129 thresh = (size - 8) / sizeof(u32);
1130
1131 /* Account for overhead of skb - to avoid order > 0 allocation */
1132 space = SKB_DATA_ALIGN(size) + NET_SKB_PAD
1133 + sizeof(struct skb_shared_info);
1134
1135 sky2->rx_nfrags = space >> PAGE_SHIFT;
1136 BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr));
1137
1138 if (sky2->rx_nfrags != 0) {
1139 /* Compute residue after pages */
1140 space = sky2->rx_nfrags << PAGE_SHIFT;
1141
1142 if (space < size)
1143 size -= space;
1144 else
1145 size = 0;
1146
1147 /* Optimize to handle small packets and headers */
1148 if (size < copybreak)
1149 size = copybreak;
1150 if (size < ETH_HLEN)
1151 size = ETH_HLEN;
1152 }
1153 sky2->rx_data_size = size;
1154
1155 /* Fill Rx ring */
1156 for (i = 0; i < sky2->rx_pending; i++) {
1157 re = sky2->rx_ring + i;
1158
1159 re->skb = sky2_rx_alloc(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001160 if (!re->skb)
1161 goto nomem;
1162
Stephen Hemminger14d02632006-09-26 11:57:43 -07001163 sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size);
1164 sky2_rx_submit(sky2, re);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001165 }
1166
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001167 /*
1168 * The receiver hangs if it receives frames larger than the
1169 * packet buffer. As a workaround, truncate oversize frames, but
1170 * the register is limited to 9 bits, so if you do frames > 2052
1171 * you better get the MTU right!
1172 */
Stephen Hemmingera1433ac2006-05-22 12:03:42 -07001173 if (thresh > 0x1ff)
1174 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF);
1175 else {
1176 sky2_write16(hw, SK_REG(sky2->port, RX_GMF_TR_THR), thresh);
1177 sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_ON);
1178 }
1179
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001180 /* Tell chip about available buffers */
1181 sky2_write16(hw, Y2_QADDR(rxq, PREF_UNIT_PUT_IDX), sky2->rx_put);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001182 return 0;
1183nomem:
1184 sky2_rx_clean(sky2);
1185 return -ENOMEM;
1186}
1187
1188/* Bring up network interface. */
1189static int sky2_up(struct net_device *dev)
1190{
1191 struct sky2_port *sky2 = netdev_priv(dev);
1192 struct sky2_hw *hw = sky2->hw;
1193 unsigned port = sky2->port;
Stephen Hemminger67712902006-12-04 15:53:45 -08001194 u32 ramsize, imask;
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001195 int cap, err = -ENOMEM;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001196 struct net_device *otherdev = hw->dev[sky2->port^1];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001197
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001198 /*
1199 * On dual port PCI-X card, there is an problem where status
1200 * can be received out of order due to split transactions
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001201 */
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001202 if (otherdev && netif_running(otherdev) &&
1203 (cap = pci_find_capability(hw->pdev, PCI_CAP_ID_PCIX))) {
1204 struct sky2_port *osky2 = netdev_priv(otherdev);
1205 u16 cmd;
Stephen Hemminger843a46f2006-05-11 15:07:28 -07001206
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07001207 cmd = sky2_pci_read16(hw, cap + PCI_X_CMD);
1208 cmd &= ~PCI_X_CMD_MAX_SPLIT;
1209 sky2_pci_write16(hw, cap + PCI_X_CMD, cmd);
1210
1211 sky2->rx_csum = 0;
1212 osky2->rx_csum = 0;
1213 }
1214
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001215 if (netif_msg_ifup(sky2))
1216 printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
1217
1218 /* must be power of 2 */
1219 sky2->tx_le = pci_alloc_consistent(hw->pdev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07001220 TX_RING_SIZE *
1221 sizeof(struct sky2_tx_le),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001222 &sky2->tx_le_map);
1223 if (!sky2->tx_le)
1224 goto err_out;
1225
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001226 sky2->tx_ring = kcalloc(TX_RING_SIZE, sizeof(struct tx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001227 GFP_KERNEL);
1228 if (!sky2->tx_ring)
1229 goto err_out;
1230 sky2->tx_prod = sky2->tx_cons = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001231
1232 sky2->rx_le = pci_alloc_consistent(hw->pdev, RX_LE_BYTES,
1233 &sky2->rx_le_map);
1234 if (!sky2->rx_le)
1235 goto err_out;
1236 memset(sky2->rx_le, 0, RX_LE_BYTES);
1237
Stephen Hemminger291ea612006-09-26 11:57:41 -07001238 sky2->rx_ring = kcalloc(sky2->rx_pending, sizeof(struct rx_ring_info),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001239 GFP_KERNEL);
1240 if (!sky2->rx_ring)
1241 goto err_out;
1242
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001243 sky2_phy_power(hw, port, 1);
1244
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001245 sky2_mac_init(hw, port);
1246
Stephen Hemminger67712902006-12-04 15:53:45 -08001247 /* Register is number of 4K blocks on internal RAM buffer. */
1248 ramsize = sky2_read8(hw, B2_E_0) * 4;
1249 printk(KERN_INFO PFX "%s: ram buffer %dK\n", dev->name, ramsize);
Stephen Hemminger470ea7e2006-10-20 17:06:11 -07001250
Stephen Hemminger67712902006-12-04 15:53:45 -08001251 if (ramsize > 0) {
1252 u32 rxspace;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001253
Stephen Hemminger67712902006-12-04 15:53:45 -08001254 if (ramsize < 16)
1255 rxspace = ramsize / 2;
1256 else
1257 rxspace = 8 + (2*(ramsize - 16))/3;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001258
Stephen Hemminger67712902006-12-04 15:53:45 -08001259 sky2_ramset(hw, rxqaddr[port], 0, rxspace);
1260 sky2_ramset(hw, txqaddr[port], rxspace, ramsize - rxspace);
1261
1262 /* Make sure SyncQ is disabled */
1263 sky2_write8(hw, RB_ADDR(port == 0 ? Q_XS1 : Q_XS2, RB_CTRL),
1264 RB_RST_SET);
1265 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001266
shemminger@osdl.orgaf4ed7e2005-11-30 11:45:21 -08001267 sky2_qset(hw, txqaddr[port]);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001268
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001269 /* Set almost empty threshold */
Stephen Hemmingerc2716fb2006-09-26 11:57:39 -07001270 if (hw->chip_id == CHIP_ID_YUKON_EC_U
1271 && hw->chip_rev == CHIP_REV_YU_EC_U_A0)
Stephen Hemminger977bdf02006-02-22 11:44:58 -08001272 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), 0x1a0);
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001273
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001274 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
1275 TX_RING_SIZE - 1);
1276
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001277 err = sky2_rx_start(sky2);
1278 if (err)
1279 goto err_out;
1280
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001281 /* Enable interrupts from phy/mac for port */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001282 imask = sky2_read32(hw, B0_IMSK);
Stephen Hemmingerf4ea4312006-05-09 14:46:54 -07001283 imask |= portirq_msk[port];
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001284 sky2_write32(hw, B0_IMSK, imask);
1285
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001286 return 0;
1287
1288err_out:
Stephen Hemminger1b537562005-12-20 15:08:07 -08001289 if (sky2->rx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001290 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1291 sky2->rx_le, sky2->rx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001292 sky2->rx_le = NULL;
1293 }
1294 if (sky2->tx_le) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001295 pci_free_consistent(hw->pdev,
1296 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1297 sky2->tx_le, sky2->tx_le_map);
Stephen Hemminger1b537562005-12-20 15:08:07 -08001298 sky2->tx_le = NULL;
1299 }
1300 kfree(sky2->tx_ring);
1301 kfree(sky2->rx_ring);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001302
Stephen Hemminger1b537562005-12-20 15:08:07 -08001303 sky2->tx_ring = NULL;
1304 sky2->rx_ring = NULL;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001305 return err;
1306}
1307
Stephen Hemminger793b8832005-09-14 16:06:14 -07001308/* Modular subtraction in ring */
1309static inline int tx_dist(unsigned tail, unsigned head)
1310{
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07001311 return (head - tail) & (TX_RING_SIZE - 1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001312}
1313
1314/* Number of list elements available for next tx */
1315static inline int tx_avail(const struct sky2_port *sky2)
1316{
1317 return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod);
1318}
1319
1320/* Estimate of number of transmit list elements required */
Stephen Hemminger28bd1812006-01-17 13:43:19 -08001321static unsigned tx_le_req(const struct sk_buff *skb)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001322{
1323 unsigned count;
1324
1325 count = sizeof(dma_addr_t) / sizeof(u32);
1326 count += skb_shinfo(skb)->nr_frags * count;
1327
Herbert Xu89114af2006-07-08 13:34:32 -07001328 if (skb_is_gso(skb))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001329 ++count;
1330
Patrick McHardy84fa7932006-08-29 16:44:56 -07001331 if (skb->ip_summed == CHECKSUM_PARTIAL)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001332 ++count;
1333
1334 return count;
1335}
1336
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001337/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001338 * Put one packet in ring for transmit.
1339 * A single packet can generate multiple list elements, and
1340 * the number of ring elements will probably be less than the number
1341 * of list elements used.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001342 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001343static int sky2_xmit_frame(struct sk_buff *skb, struct net_device *dev)
1344{
1345 struct sky2_port *sky2 = netdev_priv(dev);
1346 struct sky2_hw *hw = sky2->hw;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001347 struct sky2_tx_le *le = NULL;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001348 struct tx_ring_info *re;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001349 unsigned i, len;
1350 dma_addr_t mapping;
1351 u32 addr64;
1352 u16 mss;
1353 u8 ctrl;
1354
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001355 if (unlikely(tx_avail(sky2) < tx_le_req(skb)))
1356 return NETDEV_TX_BUSY;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001357
Stephen Hemminger793b8832005-09-14 16:06:14 -07001358 if (unlikely(netif_msg_tx_queued(sky2)))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001359 printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n",
1360 dev->name, sky2->tx_prod, skb->len);
1361
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001362 len = skb_headlen(skb);
1363 mapping = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE);
shemminger@osdl.orga018e332005-11-30 11:45:16 -08001364 addr64 = high32(mapping);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001365
shemminger@osdl.orga018e332005-11-30 11:45:16 -08001366 /* Send high bits if changed or crosses boundary */
1367 if (addr64 != sky2->tx_addr64 || high32(mapping + len) != sky2->tx_addr64) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001368 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001369 le->addr = cpu_to_le32(addr64);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001370 le->opcode = OP_ADDR64 | HW_OWNER;
shemminger@osdl.orga018e332005-11-30 11:45:16 -08001371 sky2->tx_addr64 = high32(mapping + len);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001372 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001373
1374 /* Check for TCP Segmentation Offload */
Herbert Xu79671682006-06-22 02:40:14 -07001375 mss = skb_shinfo(skb)->gso_size;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001376 if (mss != 0) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001377 mss += ((skb->h.th->doff - 5) * 4); /* TCP options */
1378 mss += (skb->nh.iph->ihl * 4) + sizeof(struct tcphdr);
1379 mss += ETH_HLEN;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001380
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001381 if (mss != sky2->tx_last_mss) {
1382 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001383 le->addr = cpu_to_le32(mss);
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001384 le->opcode = OP_LRGLEN | HW_OWNER;
shemminger@osdl.orge07560c2006-08-28 10:00:49 -07001385 sky2->tx_last_mss = mss;
1386 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001387 }
1388
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001389 ctrl = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001390#ifdef SKY2_VLAN_TAG_USED
1391 /* Add VLAN tag, can piggyback on LRGLEN or ADDR64 */
1392 if (sky2->vlgrp && vlan_tx_tag_present(skb)) {
1393 if (!le) {
1394 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001395 le->addr = 0;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001396 le->opcode = OP_VLAN|HW_OWNER;
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07001397 } else
1398 le->opcode |= OP_VLAN;
1399 le->length = cpu_to_be16(vlan_tx_tag_get(skb));
1400 ctrl |= INS_VLAN;
1401 }
1402#endif
1403
1404 /* Handle TCP checksum offload */
Patrick McHardy84fa7932006-08-29 16:44:56 -07001405 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001406 unsigned offset = skb->h.raw - skb->data;
1407 u32 tcpsum;
1408
1409 tcpsum = offset << 16; /* sum start */
Al Viroff1dcad2006-11-20 18:07:29 -08001410 tcpsum |= offset + skb->csum_offset; /* sum write */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001411
1412 ctrl = CALSUM | WR_SUM | INIT_SUM | LOCK_SUM;
1413 if (skb->nh.iph->protocol == IPPROTO_UDP)
1414 ctrl |= UDPTCP;
1415
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001416 if (tcpsum != sky2->tx_tcpsum) {
1417 sky2->tx_tcpsum = tcpsum;
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001418
1419 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001420 le->addr = cpu_to_le32(tcpsum);
shemminger@osdl.org1d179332006-08-28 10:00:50 -07001421 le->length = 0; /* initial checksum value */
1422 le->ctrl = 1; /* one packet */
1423 le->opcode = OP_TCPLISW | HW_OWNER;
1424 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001425 }
1426
1427 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001428 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001429 le->length = cpu_to_le16(len);
1430 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001431 le->opcode = mss ? (OP_LARGESEND | HW_OWNER) : (OP_PACKET | HW_OWNER);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001432
Stephen Hemminger291ea612006-09-26 11:57:41 -07001433 re = tx_le_re(sky2, le);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001434 re->skb = skb;
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001435 pci_unmap_addr_set(re, mapaddr, mapping);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001436 pci_unmap_len_set(re, maplen, len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001437
1438 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
Stephen Hemminger291ea612006-09-26 11:57:41 -07001439 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001440
1441 mapping = pci_map_page(hw->pdev, frag->page, frag->page_offset,
1442 frag->size, PCI_DMA_TODEVICE);
Stephen Hemmingera0361192006-01-17 13:43:16 -08001443 addr64 = high32(mapping);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001444 if (addr64 != sky2->tx_addr64) {
1445 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001446 le->addr = cpu_to_le32(addr64);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001447 le->ctrl = 0;
1448 le->opcode = OP_ADDR64 | HW_OWNER;
1449 sky2->tx_addr64 = addr64;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001450 }
1451
1452 le = get_tx_le(sky2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07001453 le->addr = cpu_to_le32((u32) mapping);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001454 le->length = cpu_to_le16(frag->size);
1455 le->ctrl = ctrl;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001456 le->opcode = OP_BUFFER | HW_OWNER;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001457
Stephen Hemminger291ea612006-09-26 11:57:41 -07001458 re = tx_le_re(sky2, le);
1459 re->skb = skb;
1460 pci_unmap_addr_set(re, mapaddr, mapping);
1461 pci_unmap_len_set(re, maplen, frag->size);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001462 }
Stephen Hemminger6cdbbdf2005-12-09 11:35:01 -08001463
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001464 le->ctrl |= EOP;
1465
shemminger@osdl.org97bda702006-08-28 10:00:47 -07001466 if (tx_avail(sky2) <= MAX_SKB_TX_LE)
1467 netif_stop_queue(dev);
Stephen Hemmingerb19666d2006-03-07 11:06:36 -08001468
Stephen Hemminger290d4de2006-03-20 15:48:15 -08001469 sky2_put_idx(hw, txqaddr[sky2->port], sky2->tx_prod);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001470
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001471 dev->trans_start = jiffies;
1472 return NETDEV_TX_OK;
1473}
1474
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001475/*
Stephen Hemminger793b8832005-09-14 16:06:14 -07001476 * Free ring elements from starting at tx_cons until "done"
1477 *
1478 * NB: the hardware will tell us about partial completion of multi-part
Stephen Hemminger291ea612006-09-26 11:57:41 -07001479 * buffers so make sure not to free skb to early.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001480 */
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001481static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001482{
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001483 struct net_device *dev = sky2->netdev;
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001484 struct pci_dev *pdev = sky2->hw->pdev;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001485 unsigned idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001486
Stephen Hemminger0e3ff6a2005-12-09 11:35:02 -08001487 BUG_ON(done >= TX_RING_SIZE);
shemminger@osdl.org22247952005-11-30 11:45:19 -08001488
Stephen Hemminger291ea612006-09-26 11:57:41 -07001489 for (idx = sky2->tx_cons; idx != done;
1490 idx = RING_NEXT(idx, TX_RING_SIZE)) {
1491 struct sky2_tx_le *le = sky2->tx_le + idx;
1492 struct tx_ring_info *re = sky2->tx_ring + idx;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001493
Stephen Hemminger291ea612006-09-26 11:57:41 -07001494 switch(le->opcode & ~HW_OWNER) {
1495 case OP_LARGESEND:
1496 case OP_PACKET:
1497 pci_unmap_single(pdev,
1498 pci_unmap_addr(re, mapaddr),
1499 pci_unmap_len(re, maplen),
1500 PCI_DMA_TODEVICE);
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08001501 break;
Stephen Hemminger291ea612006-09-26 11:57:41 -07001502 case OP_BUFFER:
1503 pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr),
1504 pci_unmap_len(re, maplen),
Stephen Hemminger734d1862005-12-09 11:35:00 -08001505 PCI_DMA_TODEVICE);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001506 break;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001507 }
1508
Stephen Hemminger291ea612006-09-26 11:57:41 -07001509 if (le->ctrl & EOP) {
1510 if (unlikely(netif_msg_tx_done(sky2)))
1511 printk(KERN_DEBUG "%s: tx done %u\n",
1512 dev->name, idx);
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08001513 sky2->net_stats.tx_packets++;
1514 sky2->net_stats.tx_bytes += re->skb->len;
1515
Stephen Hemminger794b2bd2006-12-01 14:29:36 -08001516 dev_kfree_skb_any(re->skb);
Stephen Hemminger291ea612006-09-26 11:57:41 -07001517 }
1518
1519 le->opcode = 0; /* paranoia */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001520 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001521
Stephen Hemminger291ea612006-09-26 11:57:41 -07001522 sky2->tx_cons = idx;
Stephen Hemminger22e11702006-07-12 15:23:48 -07001523 if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001524 netif_wake_queue(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001525}
1526
1527/* Cleanup all untransmitted buffers, assume transmitter not running */
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001528static void sky2_tx_clean(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001529{
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001530 struct sky2_port *sky2 = netdev_priv(dev);
1531
1532 netif_tx_lock_bh(dev);
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07001533 sky2_tx_complete(sky2, sky2->tx_prod);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001534 netif_tx_unlock_bh(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001535}
1536
1537/* Network shutdown */
1538static int sky2_down(struct net_device *dev)
1539{
1540 struct sky2_port *sky2 = netdev_priv(dev);
1541 struct sky2_hw *hw = sky2->hw;
1542 unsigned port = sky2->port;
1543 u16 ctrl;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001544 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001545
Stephen Hemminger1b537562005-12-20 15:08:07 -08001546 /* Never really got started! */
1547 if (!sky2->tx_le)
1548 return 0;
1549
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001550 if (netif_msg_ifdown(sky2))
1551 printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
1552
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001553 /* Stop more packets from being queued */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001554 netif_stop_queue(dev);
1555
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001556 /* Disable port IRQ */
1557 imask = sky2_read32(hw, B0_IMSK);
1558 imask &= ~portirq_msk[port];
1559 sky2_write32(hw, B0_IMSK, imask);
1560
Stephen Hemminger25d82d72006-12-20 13:06:33 -08001561 /*
1562 * Both ports share the NAPI poll on port 0, so if necessary undo the
1563 * the disable that is done in dev_close.
1564 */
1565 if (sky2->port == 0 && hw->ports > 1)
1566 netif_poll_enable(dev);
1567
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001568 sky2_gmac_reset(hw, port);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001569
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001570 /* Stop transmitter */
1571 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
1572 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
1573
1574 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL),
Stephen Hemminger793b8832005-09-14 16:06:14 -07001575 RB_RST_SET | RB_DIS_OP_MD);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001576
Stephen Hemmingerc2716fb2006-09-26 11:57:39 -07001577 /* WA for dev. #4.209 */
1578 if (hw->chip_id == CHIP_ID_YUKON_EC_U
Stephen Hemminger8df9a872006-12-01 14:29:35 -08001579 && (hw->chip_rev == CHIP_REV_YU_EC_U_A1 || hw->chip_rev == CHIP_REV_YU_EC_U_B0))
Stephen Hemmingerc2716fb2006-09-26 11:57:39 -07001580 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T),
1581 sky2->speed != SPEED_1000 ?
1582 TX_STFW_ENA : TX_STFW_DIS);
1583
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001584 ctrl = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001585 ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001586 gma_write16(hw, port, GM_GP_CTRL, ctrl);
1587
1588 sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET);
1589
1590 /* Workaround shared GMAC reset */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001591 if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0
1592 && port == 0 && hw->dev[1] && netif_running(hw->dev[1])))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001593 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET);
1594
1595 /* Disable Force Sync bit and Enable Alloc bit */
1596 sky2_write8(hw, SK_REG(port, TXA_CTRL),
1597 TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC);
1598
1599 /* Stop Interval Timer and Limit Counter of Tx Arbiter */
1600 sky2_write32(hw, SK_REG(port, TXA_ITI_INI), 0L);
1601 sky2_write32(hw, SK_REG(port, TXA_LIM_INI), 0L);
1602
1603 /* Reset the PCI FIFO of the async Tx queue */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001604 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
1605 BMU_RST_SET | BMU_FIFO_RST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001606
1607 /* Reset the Tx prefetch units */
1608 sky2_write32(hw, Y2_QADDR(txqaddr[port], PREF_UNIT_CTRL),
1609 PREF_UNIT_RST_SET);
1610
1611 sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET);
1612
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001613 sky2_rx_stop(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001614
1615 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
1616 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1617
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07001618 sky2_phy_power(hw, port, 0);
1619
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001620 /* turn off LED's */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001621 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
1622
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001623 synchronize_irq(hw->pdev->irq);
1624
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001625 sky2_tx_clean(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001626 sky2_rx_clean(sky2);
1627
1628 pci_free_consistent(hw->pdev, RX_LE_BYTES,
1629 sky2->rx_le, sky2->rx_le_map);
1630 kfree(sky2->rx_ring);
1631
1632 pci_free_consistent(hw->pdev,
1633 TX_RING_SIZE * sizeof(struct sky2_tx_le),
1634 sky2->tx_le, sky2->tx_le_map);
1635 kfree(sky2->tx_ring);
1636
Stephen Hemminger1b537562005-12-20 15:08:07 -08001637 sky2->tx_le = NULL;
1638 sky2->rx_le = NULL;
1639
1640 sky2->rx_ring = NULL;
1641 sky2->tx_ring = NULL;
1642
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001643 return 0;
1644}
1645
1646static u16 sky2_phy_speed(const struct sky2_hw *hw, u16 aux)
1647{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07001648 if (!sky2_is_copper(hw))
Stephen Hemminger793b8832005-09-14 16:06:14 -07001649 return SPEED_1000;
1650
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001651 if (hw->chip_id == CHIP_ID_YUKON_FE)
1652 return (aux & PHY_M_PS_SPEED_100) ? SPEED_100 : SPEED_10;
1653
1654 switch (aux & PHY_M_PS_SPEED_MSK) {
1655 case PHY_M_PS_SPEED_1000:
1656 return SPEED_1000;
1657 case PHY_M_PS_SPEED_100:
1658 return SPEED_100;
1659 default:
1660 return SPEED_10;
1661 }
1662}
1663
1664static void sky2_link_up(struct sky2_port *sky2)
1665{
1666 struct sky2_hw *hw = sky2->hw;
1667 unsigned port = sky2->port;
1668 u16 reg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001669 static const char *fc_name[] = {
1670 [FC_NONE] = "none",
1671 [FC_TX] = "tx",
1672 [FC_RX] = "rx",
1673 [FC_BOTH] = "both",
1674 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001675
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001676 /* enable Rx/Tx */
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001677 reg = gma_read16(hw, port, GM_GP_CTRL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001678 reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA;
1679 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001680
1681 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK);
1682
1683 netif_carrier_on(sky2->netdev);
1684 netif_wake_queue(sky2->netdev);
1685
1686 /* Turn on link LED */
Stephen Hemminger793b8832005-09-14 16:06:14 -07001687 sky2_write8(hw, SK_REG(port, LNK_LED_REG),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001688 LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF);
1689
Stephen Hemmingered6d32c2006-05-08 15:11:33 -07001690 if (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001691 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
Stephen Hemmingered6d32c2006-05-08 15:11:33 -07001692 u16 led = PHY_M_LEDC_LOS_CTRL(1); /* link active */
1693
1694 switch(sky2->speed) {
1695 case SPEED_10:
1696 led |= PHY_M_LEDC_INIT_CTRL(7);
1697 break;
1698
1699 case SPEED_100:
1700 led |= PHY_M_LEDC_STA1_CTRL(7);
1701 break;
1702
1703 case SPEED_1000:
1704 led |= PHY_M_LEDC_STA0_CTRL(7);
1705 break;
1706 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07001707
1708 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
Stephen Hemmingered6d32c2006-05-08 15:11:33 -07001709 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, led);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001710 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
1711 }
1712
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001713 if (netif_msg_link(sky2))
1714 printk(KERN_INFO PFX
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07001715 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001716 sky2->netdev->name, sky2->speed,
1717 sky2->duplex == DUPLEX_FULL ? "full" : "half",
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001718 fc_name[sky2->flow_status]);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001719}
1720
1721static void sky2_link_down(struct sky2_port *sky2)
1722{
1723 struct sky2_hw *hw = sky2->hw;
1724 unsigned port = sky2->port;
1725 u16 reg;
1726
1727 gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);
1728
1729 reg = gma_read16(hw, port, GM_GP_CTRL);
1730 reg &= ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA);
1731 gma_write16(hw, port, GM_GP_CTRL, reg);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001732
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001733 if (sky2->flow_status == FC_RX) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001734 /* restore Asymmetric Pause bit */
1735 gm_phy_write(hw, port, PHY_MARV_AUNE_ADV,
Stephen Hemminger793b8832005-09-14 16:06:14 -07001736 gm_phy_read(hw, port, PHY_MARV_AUNE_ADV)
1737 | PHY_M_AN_ASP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001738 }
1739
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001740 netif_carrier_off(sky2->netdev);
1741 netif_stop_queue(sky2->netdev);
1742
1743 /* Turn on link LED */
1744 sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF);
1745
1746 if (netif_msg_link(sky2))
1747 printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name);
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001748
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001749 sky2_phy_init(hw, port);
1750}
1751
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001752static enum flow_control sky2_flow(int rx, int tx)
1753{
1754 if (rx)
1755 return tx ? FC_BOTH : FC_RX;
1756 else
1757 return tx ? FC_TX : FC_NONE;
1758}
1759
Stephen Hemminger793b8832005-09-14 16:06:14 -07001760static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1761{
1762 struct sky2_hw *hw = sky2->hw;
1763 unsigned port = sky2->port;
1764 u16 lpa;
1765
1766 lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP);
1767
1768 if (lpa & PHY_M_AN_RF) {
1769 printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name);
1770 return -1;
1771 }
1772
Stephen Hemminger793b8832005-09-14 16:06:14 -07001773 if (!(aux & PHY_M_PS_SPDUP_RES)) {
1774 printk(KERN_ERR PFX "%s: speed/duplex mismatch",
1775 sky2->netdev->name);
1776 return -1;
1777 }
1778
Stephen Hemminger793b8832005-09-14 16:06:14 -07001779 sky2->speed = sky2_phy_speed(hw, aux);
Stephen Hemminger7c74ac12006-10-17 10:24:08 -07001780 sky2->duplex = (aux & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
Stephen Hemminger793b8832005-09-14 16:06:14 -07001781
1782 /* Pause bits are offset (9..8) */
Stephen Hemmingered6d32c2006-05-08 15:11:33 -07001783 if (hw->chip_id == CHIP_ID_YUKON_XL || hw->chip_id == CHIP_ID_YUKON_EC_U)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001784 aux >>= 6;
1785
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001786 sky2->flow_status = sky2_flow(aux & PHY_M_PS_RX_P_EN,
1787 aux & PHY_M_PS_TX_P_EN);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001788
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001789 if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001790 && hw->chip_id != CHIP_ID_YUKON_EC_U)
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001791 sky2->flow_status = FC_NONE;
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001792
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07001793 if (aux & PHY_M_PS_RX_P_EN)
Stephen Hemminger793b8832005-09-14 16:06:14 -07001794 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON);
1795 else
1796 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
1797
1798 return 0;
1799}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001800
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001801/* Interrupt from PHY */
1802static void sky2_phy_intr(struct sky2_hw *hw, unsigned port)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001803{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001804 struct net_device *dev = hw->dev[port];
1805 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001806 u16 istatus, phystat;
1807
Stephen Hemmingerebc646f2006-10-17 10:23:56 -07001808 if (!netif_running(dev))
1809 return;
1810
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001811 spin_lock(&sky2->phy_lock);
1812 istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT);
1813 phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT);
1814
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001815 if (netif_msg_intr(sky2))
1816 printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n",
1817 sky2->netdev->name, istatus, phystat);
1818
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07001819 if (sky2->autoneg == AUTONEG_ENABLE && (istatus & PHY_M_IS_AN_COMPL)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07001820 if (sky2_autoneg_done(sky2, phystat) == 0)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001821 sky2_link_up(sky2);
Stephen Hemminger793b8832005-09-14 16:06:14 -07001822 goto out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001823 }
1824
Stephen Hemminger793b8832005-09-14 16:06:14 -07001825 if (istatus & PHY_M_IS_LSP_CHANGE)
1826 sky2->speed = sky2_phy_speed(hw, phystat);
1827
1828 if (istatus & PHY_M_IS_DUP_CHANGE)
1829 sky2->duplex =
1830 (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF;
1831
1832 if (istatus & PHY_M_IS_LST_CHANGE) {
1833 if (phystat & PHY_M_PS_LINK_UP)
1834 sky2_link_up(sky2);
1835 else
1836 sky2_link_down(sky2);
1837 }
1838out:
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001839 spin_unlock(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001840}
1841
Stephen Hemminger302d1252006-01-17 13:43:20 -08001842
1843/* Transmit timeout is only called if we are running, carries is up
1844 * and tx queue is full (stopped).
1845 */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001846static void sky2_tx_timeout(struct net_device *dev)
1847{
1848 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001849 struct sky2_hw *hw = sky2->hw;
1850 unsigned txq = txqaddr[sky2->port];
Stephen Hemminger8f246642006-03-20 15:48:21 -08001851 u16 report, done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001852
1853 if (netif_msg_timer(sky2))
1854 printk(KERN_ERR PFX "%s: tx timeout\n", dev->name);
1855
Stephen Hemminger8f246642006-03-20 15:48:21 -08001856 report = sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX);
1857 done = sky2_read16(hw, Q_ADDR(txq, Q_DONE));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001858
Stephen Hemminger8f246642006-03-20 15:48:21 -08001859 printk(KERN_DEBUG PFX "%s: transmit ring %u .. %u report=%u done=%u\n",
1860 dev->name,
1861 sky2->tx_cons, sky2->tx_prod, report, done);
Stephen Hemminger8cc048e2005-12-09 11:35:07 -08001862
Stephen Hemminger8f246642006-03-20 15:48:21 -08001863 if (report != done) {
1864 printk(KERN_INFO PFX "status burst pending (irq moderation?)\n");
1865
1866 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
1867 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
1868 } else if (report != sky2->tx_cons) {
1869 printk(KERN_INFO PFX "status report lost?\n");
1870
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001871 netif_tx_lock_bh(dev);
Stephen Hemminger8f246642006-03-20 15:48:21 -08001872 sky2_tx_complete(sky2, report);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001873 netif_tx_unlock_bh(dev);
Stephen Hemminger8f246642006-03-20 15:48:21 -08001874 } else {
1875 printk(KERN_INFO PFX "hardware hung? flushing\n");
1876
1877 sky2_write32(hw, Q_ADDR(txq, Q_CSR), BMU_STOP);
1878 sky2_write32(hw, Y2_QADDR(txq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
1879
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07001880 sky2_tx_clean(dev);
Stephen Hemminger8f246642006-03-20 15:48:21 -08001881
1882 sky2_qset(hw, txq);
1883 sky2_prefetch_init(hw, txq, sky2->tx_le_map, TX_RING_SIZE - 1);
1884 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001885}
1886
1887static int sky2_change_mtu(struct net_device *dev, int new_mtu)
1888{
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001889 struct sky2_port *sky2 = netdev_priv(dev);
1890 struct sky2_hw *hw = sky2->hw;
1891 int err;
1892 u16 ctl, mode;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001893 u32 imask;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001894
1895 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
1896 return -EINVAL;
1897
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08001898 if (hw->chip_id == CHIP_ID_YUKON_EC_U && new_mtu > ETH_DATA_LEN)
1899 return -EINVAL;
1900
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001901 if (!netif_running(dev)) {
1902 dev->mtu = new_mtu;
1903 return 0;
1904 }
1905
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001906 imask = sky2_read32(hw, B0_IMSK);
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001907 sky2_write32(hw, B0_IMSK, 0);
1908
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001909 dev->trans_start = jiffies; /* prevent tx timeout */
1910 netif_stop_queue(dev);
1911 netif_poll_disable(hw->dev[0]);
1912
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001913 synchronize_irq(hw->pdev->irq);
1914
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001915 ctl = gma_read16(hw, sky2->port, GM_GP_CTRL);
1916 gma_write16(hw, sky2->port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA);
1917 sky2_rx_stop(sky2);
1918 sky2_rx_clean(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001919
1920 dev->mtu = new_mtu;
Stephen Hemminger14d02632006-09-26 11:57:43 -07001921
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001922 mode = DATA_BLIND_VAL(DATA_BLIND_DEF) |
1923 GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001924
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001925 if (dev->mtu > ETH_DATA_LEN)
1926 mode |= GM_SMOD_JUMBO_ENA;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001927
shemminger@osdl.org6b1a3ae2005-09-27 15:02:55 -07001928 gma_write16(hw, sky2->port, GM_SERIAL_MODE, mode);
1929
1930 sky2_write8(hw, RB_ADDR(rxqaddr[sky2->port], RB_CTRL), RB_ENA_OP_MD);
1931
1932 err = sky2_rx_start(sky2);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08001933 sky2_write32(hw, B0_IMSK, imask);
shemminger@osdl.org018d1c62005-11-30 11:45:18 -08001934
Stephen Hemminger1b537562005-12-20 15:08:07 -08001935 if (err)
1936 dev_close(dev);
1937 else {
1938 gma_write16(hw, sky2->port, GM_GP_CTRL, ctl);
1939
1940 netif_poll_enable(hw->dev[0]);
1941 netif_wake_queue(dev);
1942 }
1943
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07001944 return err;
1945}
1946
Stephen Hemminger14d02632006-09-26 11:57:43 -07001947/* For small just reuse existing skb for next receive */
1948static struct sk_buff *receive_copy(struct sky2_port *sky2,
1949 const struct rx_ring_info *re,
1950 unsigned length)
1951{
1952 struct sk_buff *skb;
1953
1954 skb = netdev_alloc_skb(sky2->netdev, length + 2);
1955 if (likely(skb)) {
1956 skb_reserve(skb, 2);
1957 pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr,
1958 length, PCI_DMA_FROMDEVICE);
1959 memcpy(skb->data, re->skb->data, length);
1960 skb->ip_summed = re->skb->ip_summed;
1961 skb->csum = re->skb->csum;
1962 pci_dma_sync_single_for_device(sky2->hw->pdev, re->data_addr,
1963 length, PCI_DMA_FROMDEVICE);
1964 re->skb->ip_summed = CHECKSUM_NONE;
Stephen Hemminger489b10c2006-10-03 16:39:12 -07001965 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07001966 }
1967 return skb;
1968}
1969
1970/* Adjust length of skb with fragments to match received data */
1971static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space,
1972 unsigned int length)
1973{
1974 int i, num_frags;
1975 unsigned int size;
1976
1977 /* put header into skb */
1978 size = min(length, hdr_space);
1979 skb->tail += size;
1980 skb->len += size;
1981 length -= size;
1982
1983 num_frags = skb_shinfo(skb)->nr_frags;
1984 for (i = 0; i < num_frags; i++) {
1985 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1986
1987 if (length == 0) {
1988 /* don't need this page */
1989 __free_page(frag->page);
1990 --skb_shinfo(skb)->nr_frags;
1991 } else {
1992 size = min(length, (unsigned) PAGE_SIZE);
1993
1994 frag->size = size;
1995 skb->data_len += size;
1996 skb->truesize += size;
1997 skb->len += size;
1998 length -= size;
1999 }
2000 }
2001}
2002
2003/* Normal packet - take skb from ring element and put in a new one */
2004static struct sk_buff *receive_new(struct sky2_port *sky2,
2005 struct rx_ring_info *re,
2006 unsigned int length)
2007{
2008 struct sk_buff *skb, *nskb;
2009 unsigned hdr_space = sky2->rx_data_size;
2010
2011 pr_debug(PFX "receive new length=%d\n", length);
2012
2013 /* Don't be tricky about reusing pages (yet) */
2014 nskb = sky2_rx_alloc(sky2);
2015 if (unlikely(!nskb))
2016 return NULL;
2017
2018 skb = re->skb;
2019 sky2_rx_unmap_skb(sky2->hw->pdev, re);
2020
2021 prefetch(skb->data);
2022 re->skb = nskb;
2023 sky2_rx_map_skb(sky2->hw->pdev, re, hdr_space);
2024
2025 if (skb_shinfo(skb)->nr_frags)
2026 skb_put_frags(skb, hdr_space, length);
2027 else
Stephen Hemminger489b10c2006-10-03 16:39:12 -07002028 skb_put(skb, length);
Stephen Hemminger14d02632006-09-26 11:57:43 -07002029 return skb;
2030}
2031
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002032/*
2033 * Receive one packet.
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002034 * For larger packets, get new buffer.
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002035 */
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002036static struct sk_buff *sky2_receive(struct net_device *dev,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002037 u16 length, u32 status)
2038{
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002039 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger291ea612006-09-26 11:57:41 -07002040 struct rx_ring_info *re = sky2->rx_ring + sky2->rx_next;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002041 struct sk_buff *skb = NULL;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002042
2043 if (unlikely(netif_msg_rx_status(sky2)))
2044 printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002045 dev->name, sky2->rx_next, status, length);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002046
Stephen Hemminger793b8832005-09-14 16:06:14 -07002047 sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending;
Stephen Hemmingerd70cd512005-12-09 11:35:09 -08002048 prefetch(sky2->rx_ring + sky2->rx_next);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002049
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002050 if (status & GMR_FS_ANY_ERR)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002051 goto error;
2052
shemminger@osdl.org42eeea02005-11-30 11:45:13 -08002053 if (!(status & GMR_FS_RX_OK))
2054 goto resubmit;
2055
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002056 if (length > dev->mtu + ETH_HLEN)
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002057 goto oversize;
2058
Stephen Hemminger14d02632006-09-26 11:57:43 -07002059 if (length < copybreak)
2060 skb = receive_copy(sky2, re, length);
2061 else
2062 skb = receive_new(sky2, re, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002063resubmit:
Stephen Hemminger14d02632006-09-26 11:57:43 -07002064 sky2_rx_submit(sky2, re);
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002065
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002066 return skb;
2067
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002068oversize:
2069 ++sky2->net_stats.rx_over_errors;
2070 goto resubmit;
2071
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002072error:
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002073 ++sky2->net_stats.rx_errors;
Stephen Hemmingerb6d77732006-10-17 10:24:16 -07002074 if (status & GMR_FS_RX_FF_OV) {
2075 sky2->net_stats.rx_fifo_errors++;
2076 goto resubmit;
2077 }
Stephen Hemminger6e15b712005-12-20 15:08:09 -08002078
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002079 if (netif_msg_rx_err(sky2) && net_ratelimit())
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002080 printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n",
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002081 dev->name, status, length);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002082
2083 if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002084 sky2->net_stats.rx_length_errors++;
2085 if (status & GMR_FS_FRAGMENT)
2086 sky2->net_stats.rx_frame_errors++;
2087 if (status & GMR_FS_CRC_ERR)
2088 sky2->net_stats.rx_crc_errors++;
Stephen Hemminger79e57d32005-09-19 15:42:33 -07002089
Stephen Hemminger793b8832005-09-14 16:06:14 -07002090 goto resubmit;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002091}
2092
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002093/* Transmit complete */
2094static inline void sky2_tx_done(struct net_device *dev, u16 last)
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002095{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002096 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger302d1252006-01-17 13:43:20 -08002097
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002098 if (netif_running(dev)) {
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002099 netif_tx_lock(dev);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002100 sky2_tx_complete(sky2, last);
Stephen Hemminger2bb8c262006-09-26 11:57:42 -07002101 netif_tx_unlock(dev);
shemminger@osdl.org22247952005-11-30 11:45:19 -08002102 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002103}
2104
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002105/* Process status response ring */
2106static int sky2_status_intr(struct sky2_hw *hw, int to_do)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002107{
Stephen Hemminger22e11702006-07-12 15:23:48 -07002108 struct sky2_port *sky2;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002109 int work_done = 0;
Stephen Hemminger22e11702006-07-12 15:23:48 -07002110 unsigned buf_write[2] = { 0, 0 };
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002111 u16 hwidx = sky2_read16(hw, STAT_PUT_IDX);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002112
Stephen Hemmingeraf2a58a2005-12-09 11:35:04 -08002113 rmb();
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002114
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002115 while (hw->st_idx != hwidx) {
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002116 struct sky2_status_le *le = hw->st_le + hw->st_idx;
2117 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002118 struct sk_buff *skb;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002119 u32 status;
2120 u16 length;
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002121
Stephen Hemmingercb5d9542006-05-08 15:11:29 -07002122 hw->st_idx = RING_NEXT(hw->st_idx, STATUS_RING_SIZE);
shemminger@osdl.orgbea86102005-10-26 12:16:10 -07002123
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002124 BUG_ON(le->link >= 2);
2125 dev = hw->dev[le->link];
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002126
2127 sky2 = netdev_priv(dev);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002128 length = le16_to_cpu(le->length);
2129 status = le32_to_cpu(le->status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002130
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002131 switch (le->opcode & ~HW_OWNER) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002132 case OP_RXSTAT:
shemminger@osdl.org497d7c82006-08-28 10:00:46 -07002133 skb = sky2_receive(dev, length, status);
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002134 if (!skb)
Stephen Hemminger5df79112006-12-01 14:29:33 -08002135 goto force_update;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002136
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002137 skb->protocol = eth_type_trans(skb, dev);
shemminger@linux-foundation.org2bf56fe2007-01-26 11:38:39 -08002138 sky2->net_stats.rx_packets++;
2139 sky2->net_stats.rx_bytes += skb->len;
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002140 dev->last_rx = jiffies;
2141
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002142#ifdef SKY2_VLAN_TAG_USED
2143 if (sky2->vlgrp && (status & GMR_FS_VLAN)) {
2144 vlan_hwaccel_receive_skb(skb,
2145 sky2->vlgrp,
2146 be16_to_cpu(sky2->rx_tag));
2147 } else
2148#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002149 netif_receive_skb(skb);
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002150
Stephen Hemminger22e11702006-07-12 15:23:48 -07002151 /* Update receiver after 16 frames */
2152 if (++buf_write[le->link] == RX_BUF_WRITE) {
Stephen Hemminger5df79112006-12-01 14:29:33 -08002153force_update:
2154 sky2_put_idx(hw, rxqaddr[le->link], sky2->rx_put);
Stephen Hemminger22e11702006-07-12 15:23:48 -07002155 buf_write[le->link] = 0;
2156 }
2157
2158 /* Stop after net poll weight */
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002159 if (++work_done >= to_do)
2160 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002161 break;
2162
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07002163#ifdef SKY2_VLAN_TAG_USED
2164 case OP_RXVLAN:
2165 sky2->rx_tag = length;
2166 break;
2167
2168 case OP_RXCHKSVLAN:
2169 sky2->rx_tag = length;
2170 /* fall through */
2171#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002172 case OP_RXCHKS:
shemminger@osdl.orgd11c13e2005-09-27 15:02:56 -07002173 skb = sky2->rx_ring[sky2->rx_next].skb;
Patrick McHardy84fa7932006-08-29 16:44:56 -07002174 skb->ip_summed = CHECKSUM_COMPLETE;
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07002175 skb->csum = status & 0xffff;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002176 break;
2177
2178 case OP_TXINDEXLE:
Stephen Hemminger13b97b72005-12-09 11:35:03 -08002179 /* TX index reports status for both ports */
Stephen Hemmingerf55925d2006-05-08 15:11:28 -07002180 BUILD_BUG_ON(TX_RING_SIZE > 0x1000);
2181 sky2_tx_done(hw->dev[0], status & 0xfff);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002182 if (hw->dev[1])
2183 sky2_tx_done(hw->dev[1],
2184 ((status >> 24) & 0xff)
2185 | (u16)(length & 0xf) << 8);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002186 break;
2187
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002188 default:
2189 if (net_ratelimit())
Stephen Hemminger793b8832005-09-14 16:06:14 -07002190 printk(KERN_WARNING PFX
Stephen Hemmingere71ebd72006-05-08 15:11:31 -07002191 "unknown status opcode 0x%x\n", le->opcode);
2192 goto exit_loop;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002193 }
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002194 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002195
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002196 /* Fully processed status ring so clear irq */
2197 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ);
2198
shemminger@osdl.org13210ce2005-11-30 11:45:14 -08002199exit_loop:
Stephen Hemminger22e11702006-07-12 15:23:48 -07002200 if (buf_write[0]) {
2201 sky2 = netdev_priv(hw->dev[0]);
2202 sky2_put_idx(hw, Q_R1, sky2->rx_put);
2203 }
2204
2205 if (buf_write[1]) {
2206 sky2 = netdev_priv(hw->dev[1]);
2207 sky2_put_idx(hw, Q_R2, sky2->rx_put);
2208 }
2209
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002210 return work_done;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002211}
2212
2213static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status)
2214{
2215 struct net_device *dev = hw->dev[port];
2216
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002217 if (net_ratelimit())
2218 printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n",
2219 dev->name, status);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002220
2221 if (status & Y2_IS_PAR_RD1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002222 if (net_ratelimit())
2223 printk(KERN_ERR PFX "%s: ram data read parity error\n",
2224 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002225 /* Clear IRQ */
2226 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR);
2227 }
2228
2229 if (status & Y2_IS_PAR_WR1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002230 if (net_ratelimit())
2231 printk(KERN_ERR PFX "%s: ram data write parity error\n",
2232 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002233
2234 sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR);
2235 }
2236
2237 if (status & Y2_IS_PAR_MAC1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002238 if (net_ratelimit())
2239 printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002240 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE);
2241 }
2242
2243 if (status & Y2_IS_PAR_RX1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002244 if (net_ratelimit())
2245 printk(KERN_ERR PFX "%s: RX parity error\n", dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002246 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2247 }
2248
2249 if (status & Y2_IS_TCP_TXA1) {
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002250 if (net_ratelimit())
2251 printk(KERN_ERR PFX "%s: TCP segmentation error\n",
2252 dev->name);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002253 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2254 }
2255}
2256
2257static void sky2_hw_intr(struct sky2_hw *hw)
2258{
2259 u32 status = sky2_read32(hw, B0_HWE_ISRC);
2260
Stephen Hemminger793b8832005-09-14 16:06:14 -07002261 if (status & Y2_IS_TIST_OV)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002262 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002263
2264 if (status & (Y2_IS_MST_ERR | Y2_IS_IRQ_STAT)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002265 u16 pci_err;
2266
Stephen Hemminger56a645c2006-02-22 11:45:02 -08002267 pci_err = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002268 if (net_ratelimit())
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002269 dev_err(&hw->pdev->dev, "PCI hardware error (0x%x)\n",
2270 pci_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002271
2272 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger56a645c2006-02-22 11:45:02 -08002273 sky2_pci_write16(hw, PCI_STATUS,
Stephen Hemminger91aeb3e2006-09-26 11:57:38 -07002274 pci_err | PCI_STATUS_ERROR_BITS);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002275 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2276 }
2277
2278 if (status & Y2_IS_PCI_EXP) {
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002279 /* PCI-Express uncorrectable Error occurred */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002280 u32 pex_err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002281
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002282 pex_err = sky2_pci_read32(hw, PEX_UNC_ERR_STAT);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002283
Stephen Hemminger3be92a72006-01-17 13:43:17 -08002284 if (net_ratelimit())
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002285 dev_err(&hw->pdev->dev, "PCI Express error (0x%x)\n",
2286 pex_err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002287
2288 /* clear the interrupt */
2289 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002290 sky2_pci_write32(hw, PEX_UNC_ERR_STAT,
2291 0xffffffffUL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002292 sky2_write32(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2293
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002294 if (pex_err & PEX_FATAL_ERRORS) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002295 u32 hwmsk = sky2_read32(hw, B0_HWE_IMSK);
2296 hwmsk &= ~Y2_IS_PCI_EXP;
2297 sky2_write32(hw, B0_HWE_IMSK, hwmsk);
2298 }
2299 }
2300
2301 if (status & Y2_HWE_L1_MASK)
2302 sky2_hw_error(hw, 0, status);
2303 status >>= 8;
2304 if (status & Y2_HWE_L1_MASK)
2305 sky2_hw_error(hw, 1, status);
2306}
2307
2308static void sky2_mac_intr(struct sky2_hw *hw, unsigned port)
2309{
2310 struct net_device *dev = hw->dev[port];
2311 struct sky2_port *sky2 = netdev_priv(dev);
2312 u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC));
2313
2314 if (netif_msg_intr(sky2))
2315 printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n",
2316 dev->name, status);
2317
2318 if (status & GM_IS_RX_FF_OR) {
2319 ++sky2->net_stats.rx_fifo_errors;
2320 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO);
2321 }
2322
2323 if (status & GM_IS_TX_FF_UR) {
2324 ++sky2->net_stats.tx_fifo_errors;
2325 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_FU);
2326 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002327}
2328
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002329/* This should never happen it is a fatal situation */
2330static void sky2_descriptor_error(struct sky2_hw *hw, unsigned port,
2331 const char *rxtx, u32 mask)
2332{
2333 struct net_device *dev = hw->dev[port];
2334 struct sky2_port *sky2 = netdev_priv(dev);
2335 u32 imask;
2336
2337 printk(KERN_ERR PFX "%s: %s descriptor error (hardware problem)\n",
2338 dev ? dev->name : "<not registered>", rxtx);
2339
2340 imask = sky2_read32(hw, B0_IMSK);
2341 imask &= ~mask;
2342 sky2_write32(hw, B0_IMSK, imask);
2343
2344 if (dev) {
2345 spin_lock(&sky2->phy_lock);
2346 sky2_link_down(sky2);
2347 spin_unlock(&sky2->phy_lock);
2348 }
2349}
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002350
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002351/* If idle then force a fake soft NAPI poll once a second
2352 * to work around cases where sharing an edge triggered interrupt.
2353 */
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09002354static inline void sky2_idle_start(struct sky2_hw *hw)
2355{
2356 if (idle_timeout > 0)
2357 mod_timer(&hw->idle_timer,
2358 jiffies + msecs_to_jiffies(idle_timeout));
2359}
2360
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002361static void sky2_idle(unsigned long arg)
2362{
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002363 struct sky2_hw *hw = (struct sky2_hw *) arg;
2364 struct net_device *dev = hw->dev[0];
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002365
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002366 if (__netif_rx_schedule_prep(dev))
2367 __netif_rx_schedule(dev);
Stephen Hemminger01bd7562006-05-08 15:11:30 -07002368
2369 mod_timer(&hw->idle_timer, jiffies + msecs_to_jiffies(idle_timeout));
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07002370}
2371
2372
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002373static int sky2_poll(struct net_device *dev0, int *budget)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002374{
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002375 struct sky2_hw *hw = ((struct sky2_port *) netdev_priv(dev0))->hw;
2376 int work_limit = min(dev0->quota, *budget);
2377 int work_done = 0;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08002378 u32 status = sky2_read32(hw, B0_Y2_SP_EISR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002379
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002380 if (status & Y2_IS_HW_ERR)
2381 sky2_hw_intr(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002382
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002383 if (status & Y2_IS_IRQ_PHY1)
2384 sky2_phy_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002385
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002386 if (status & Y2_IS_IRQ_PHY2)
2387 sky2_phy_intr(hw, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002388
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002389 if (status & Y2_IS_IRQ_MAC1)
2390 sky2_mac_intr(hw, 0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002391
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002392 if (status & Y2_IS_IRQ_MAC2)
2393 sky2_mac_intr(hw, 1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002394
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002395 if (status & Y2_IS_CHK_RX1)
2396 sky2_descriptor_error(hw, 0, "receive", Y2_IS_CHK_RX1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002397
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002398 if (status & Y2_IS_CHK_RX2)
2399 sky2_descriptor_error(hw, 1, "receive", Y2_IS_CHK_RX2);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002400
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002401 if (status & Y2_IS_CHK_TXA1)
2402 sky2_descriptor_error(hw, 0, "transmit", Y2_IS_CHK_TXA1);
Stephen Hemmingerd2579242006-03-20 15:48:22 -08002403
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002404 if (status & Y2_IS_CHK_TXA2)
2405 sky2_descriptor_error(hw, 1, "transmit", Y2_IS_CHK_TXA2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002406
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002407 work_done = sky2_status_intr(hw, work_limit);
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002408 if (work_done < work_limit) {
2409 netif_rx_complete(dev0);
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002410
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002411 sky2_read32(hw, B0_Y2_SP_LISR);
2412 return 0;
2413 } else {
2414 *budget -= work_done;
2415 dev0->quota -= work_done;
Stephen Hemminger1e5f1282006-05-08 15:11:27 -07002416 return 1;
Stephen Hemmingerfe2a24d2006-08-01 11:55:23 -07002417 }
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002418}
2419
David Howells7d12e782006-10-05 14:55:46 +01002420static irqreturn_t sky2_intr(int irq, void *dev_id)
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08002421{
2422 struct sky2_hw *hw = dev_id;
2423 struct net_device *dev0 = hw->dev[0];
2424 u32 status;
2425
2426 /* Reading this mask interrupts as side effect */
2427 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
2428 if (status == 0 || status == ~0)
2429 return IRQ_NONE;
2430
2431 prefetch(&hw->st_le[hw->st_idx]);
2432 if (likely(__netif_rx_schedule_prep(dev0)))
2433 __netif_rx_schedule(dev0);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002434
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002435 return IRQ_HANDLED;
2436}
2437
2438#ifdef CONFIG_NET_POLL_CONTROLLER
2439static void sky2_netpoll(struct net_device *dev)
2440{
2441 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger88d11362006-06-16 12:10:46 -07002442 struct net_device *dev0 = sky2->hw->dev[0];
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002443
Stephen Hemminger88d11362006-06-16 12:10:46 -07002444 if (netif_running(dev) && __netif_rx_schedule_prep(dev0))
2445 __netif_rx_schedule(dev0);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002446}
2447#endif
2448
2449/* Chip internal frequency for clock calculations */
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002450static inline u32 sky2_mhz(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002451{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002452 switch (hw->chip_id) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002453 case CHIP_ID_YUKON_EC:
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08002454 case CHIP_ID_YUKON_EC_U:
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002455 return 125; /* 125 Mhz */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002456 case CHIP_ID_YUKON_FE:
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002457 return 100; /* 100 Mhz */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002458 default: /* YUKON_XL */
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002459 return 156; /* 156 Mhz */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002460 }
2461}
2462
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002463static inline u32 sky2_us2clk(const struct sky2_hw *hw, u32 us)
2464{
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002465 return sky2_mhz(hw) * us;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002466}
2467
Stephen Hemmingerfb173582005-12-09 11:34:56 -08002468static inline u32 sky2_clk2us(const struct sky2_hw *hw, u32 clk)
2469{
2470 return clk / sky2_mhz(hw);
2471}
2472
2473
Stephen Hemmingere3173832007-02-06 10:45:39 -08002474static int __devinit sky2_init(struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002475{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002476 u8 t8;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002477
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002478 sky2_write8(hw, B0_CTST, CS_RST_CLR);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08002479
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002480 hw->chip_id = sky2_read8(hw, B2_CHIP_ID);
2481 if (hw->chip_id < CHIP_ID_YUKON_XL || hw->chip_id > CHIP_ID_YUKON_FE) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002482 dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n",
2483 hw->chip_id);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002484 return -EOPNOTSUPP;
2485 }
2486
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002487 hw->chip_rev = (sky2_read8(hw, B2_MAC_CFG) & CFG_CHIP_R_MSK) >> 4;
2488
2489 /* This rev is really old, and requires untested workarounds */
2490 if (hw->chip_id == CHIP_ID_YUKON_EC && hw->chip_rev == CHIP_REV_YU_EC_A1) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08002491 dev_err(&hw->pdev->dev, "unsupported revision Yukon-%s (0x%x) rev %d\n",
2492 yukon2_name[hw->chip_id - CHIP_ID_YUKON_XL],
2493 hw->chip_id, hw->chip_rev);
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002494 return -EOPNOTSUPP;
2495 }
2496
Stephen Hemmingere3173832007-02-06 10:45:39 -08002497 hw->pmd_type = sky2_read8(hw, B2_PMD_TYP);
2498 hw->ports = 1;
2499 t8 = sky2_read8(hw, B2_Y2_HW_RES);
2500 if ((t8 & CFG_DUAL_MAC_MSK) == CFG_DUAL_MAC_MSK) {
2501 if (!(sky2_read8(hw, B2_Y2_CLK_GATE) & Y2_STATUS_LNK2_INAC))
2502 ++hw->ports;
2503 }
2504
2505 return 0;
2506}
2507
2508static void sky2_reset(struct sky2_hw *hw)
2509{
2510 u16 status;
2511 int i;
2512
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002513 /* disable ASF */
2514 if (hw->chip_id <= CHIP_ID_YUKON_EC) {
2515 sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET);
2516 sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE);
2517 }
2518
2519 /* do a SW reset */
2520 sky2_write8(hw, B0_CTST, CS_RST_SET);
2521 sky2_write8(hw, B0_CTST, CS_RST_CLR);
2522
2523 /* clear PCI errors, if any */
Stephen Hemminger56a645c2006-02-22 11:45:02 -08002524 status = sky2_pci_read16(hw, PCI_STATUS);
Stephen Hemminger2d42d212006-01-30 11:37:55 -08002525
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002526 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON);
Stephen Hemminger56a645c2006-02-22 11:45:02 -08002527 sky2_pci_write16(hw, PCI_STATUS, status | PCI_STATUS_ERROR_BITS);
2528
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002529
2530 sky2_write8(hw, B0_CTST, CS_MRST_CLR);
2531
2532 /* clear any PEX errors */
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002533 if (pci_find_capability(hw->pdev, PCI_CAP_ID_EXP))
2534 sky2_pci_write32(hw, PEX_UNC_ERR_STAT, 0xffffffffUL);
2535
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002536
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08002537 sky2_power_on(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002538
2539 for (i = 0; i < hw->ports; i++) {
2540 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET);
2541 sky2_write8(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR);
2542 }
2543
2544 sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
2545
Stephen Hemminger793b8832005-09-14 16:06:14 -07002546 /* Clear I2C IRQ noise */
2547 sky2_write32(hw, B2_I2C_IRQ, 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002548
2549 /* turn off hardware timer (unused) */
2550 sky2_write8(hw, B2_TI_CTRL, TIM_STOP);
2551 sky2_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002552
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002553 sky2_write8(hw, B0_Y2LED, LED_STAT_ON);
2554
Stephen Hemminger69634ee2005-12-09 11:35:06 -08002555 /* Turn off descriptor polling */
2556 sky2_write32(hw, B28_DPT_CTRL, DPT_STOP);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002557
2558 /* Turn off receive timestamp */
2559 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_STOP);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002560 sky2_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002561
2562 /* enable the Tx Arbiters */
2563 for (i = 0; i < hw->ports; i++)
2564 sky2_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB);
2565
2566 /* Initialize ram interface */
2567 for (i = 0; i < hw->ports; i++) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002568 sky2_write8(hw, RAM_BUFFER(i, B3_RI_CTRL), RI_RST_CLR);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002569
2570 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R1), SK_RI_TO_53);
2571 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA1), SK_RI_TO_53);
2572 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS1), SK_RI_TO_53);
2573 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R1), SK_RI_TO_53);
2574 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA1), SK_RI_TO_53);
2575 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS1), SK_RI_TO_53);
2576 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_R2), SK_RI_TO_53);
2577 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XA2), SK_RI_TO_53);
2578 sky2_write8(hw, RAM_BUFFER(i, B3_RI_WTO_XS2), SK_RI_TO_53);
2579 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_R2), SK_RI_TO_53);
2580 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XA2), SK_RI_TO_53);
2581 sky2_write8(hw, RAM_BUFFER(i, B3_RI_RTO_XS2), SK_RI_TO_53);
2582 }
2583
Stephen Hemminger7bd656d2006-10-09 14:40:38 -07002584 sky2_write32(hw, B0_HWE_IMSK, Y2_HWE_ALL_MASK);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002585
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002586 for (i = 0; i < hw->ports; i++)
shemminger@osdl.orgd3bcfbe2006-08-28 10:00:51 -07002587 sky2_gmac_reset(hw, i);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002588
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002589 memset(hw->st_le, 0, STATUS_LE_BYTES);
2590 hw->st_idx = 0;
2591
2592 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_SET);
2593 sky2_write32(hw, STAT_CTRL, SC_STAT_RST_CLR);
2594
2595 sky2_write32(hw, STAT_LIST_ADDR_LO, hw->st_dma);
Stephen Hemminger793b8832005-09-14 16:06:14 -07002596 sky2_write32(hw, STAT_LIST_ADDR_HI, (u64) hw->st_dma >> 32);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002597
2598 /* Set the list last index */
Stephen Hemminger793b8832005-09-14 16:06:14 -07002599 sky2_write16(hw, STAT_LAST_IDX, STATUS_RING_SIZE - 1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002600
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002601 sky2_write16(hw, STAT_TX_IDX_TH, 10);
2602 sky2_write8(hw, STAT_FIFO_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002603
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002604 /* set Status-FIFO ISR watermark */
2605 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
2606 sky2_write8(hw, STAT_FIFO_ISR_WM, 4);
2607 else
2608 sky2_write8(hw, STAT_FIFO_ISR_WM, 16);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002609
Stephen Hemminger290d4de2006-03-20 15:48:15 -08002610 sky2_write32(hw, STAT_TX_TIMER_INI, sky2_us2clk(hw, 1000));
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08002611 sky2_write32(hw, STAT_ISR_TIMER_INI, sky2_us2clk(hw, 20));
2612 sky2_write32(hw, STAT_LEV_TIMER_INI, sky2_us2clk(hw, 100));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002613
Stephen Hemminger793b8832005-09-14 16:06:14 -07002614 /* enable status unit */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002615 sky2_write32(hw, STAT_CTRL, SC_STAT_OP_ON);
2616
2617 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
2618 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
2619 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
Stephen Hemmingere3173832007-02-06 10:45:39 -08002620}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002621
Stephen Hemmingere3173832007-02-06 10:45:39 -08002622static inline u8 sky2_wol_supported(const struct sky2_hw *hw)
2623{
2624 return sky2_is_copper(hw) ? (WAKE_PHY | WAKE_MAGIC) : 0;
2625}
2626
2627static void sky2_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2628{
2629 const struct sky2_port *sky2 = netdev_priv(dev);
2630
2631 wol->supported = sky2_wol_supported(sky2->hw);
2632 wol->wolopts = sky2->wol;
2633}
2634
2635static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2636{
2637 struct sky2_port *sky2 = netdev_priv(dev);
2638 struct sky2_hw *hw = sky2->hw;
2639
2640 if (wol->wolopts & ~sky2_wol_supported(sky2->hw))
2641 return -EOPNOTSUPP;
2642
2643 sky2->wol = wol->wolopts;
2644
2645 if (hw->chip_id == CHIP_ID_YUKON_EC_U)
2646 sky2_write32(hw, B0_CTST, sky2->wol
2647 ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF);
2648
2649 if (!netif_running(dev))
2650 sky2_wol_init(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002651 return 0;
2652}
2653
Stephen Hemminger28bd1812006-01-17 13:43:19 -08002654static u32 sky2_supported_modes(const struct sky2_hw *hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002655{
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002656 if (sky2_is_copper(hw)) {
2657 u32 modes = SUPPORTED_10baseT_Half
2658 | SUPPORTED_10baseT_Full
2659 | SUPPORTED_100baseT_Half
2660 | SUPPORTED_100baseT_Full
2661 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002662
2663 if (hw->chip_id != CHIP_ID_YUKON_FE)
2664 modes |= SUPPORTED_1000baseT_Half
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002665 | SUPPORTED_1000baseT_Full;
2666 return modes;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002667 } else
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002668 return SUPPORTED_1000baseT_Half
2669 | SUPPORTED_1000baseT_Full
2670 | SUPPORTED_Autoneg
2671 | SUPPORTED_FIBRE;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002672}
2673
Stephen Hemminger793b8832005-09-14 16:06:14 -07002674static int sky2_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002675{
2676 struct sky2_port *sky2 = netdev_priv(dev);
2677 struct sky2_hw *hw = sky2->hw;
2678
2679 ecmd->transceiver = XCVR_INTERNAL;
2680 ecmd->supported = sky2_supported_modes(hw);
2681 ecmd->phy_address = PHY_ADDR_MARV;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002682 if (sky2_is_copper(hw)) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002683 ecmd->supported = SUPPORTED_10baseT_Half
Stephen Hemminger793b8832005-09-14 16:06:14 -07002684 | SUPPORTED_10baseT_Full
2685 | SUPPORTED_100baseT_Half
2686 | SUPPORTED_100baseT_Full
2687 | SUPPORTED_1000baseT_Half
2688 | SUPPORTED_1000baseT_Full
2689 | SUPPORTED_Autoneg | SUPPORTED_TP;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002690 ecmd->port = PORT_TP;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002691 ecmd->speed = sky2->speed;
2692 } else {
2693 ecmd->speed = SPEED_1000;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002694 ecmd->port = PORT_FIBRE;
Stephen Hemmingerb89165f2006-09-06 12:44:53 -07002695 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002696
2697 ecmd->advertising = sky2->advertising;
2698 ecmd->autoneg = sky2->autoneg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002699 ecmd->duplex = sky2->duplex;
2700 return 0;
2701}
2702
2703static int sky2_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2704{
2705 struct sky2_port *sky2 = netdev_priv(dev);
2706 const struct sky2_hw *hw = sky2->hw;
2707 u32 supported = sky2_supported_modes(hw);
2708
2709 if (ecmd->autoneg == AUTONEG_ENABLE) {
2710 ecmd->advertising = supported;
2711 sky2->duplex = -1;
2712 sky2->speed = -1;
2713 } else {
2714 u32 setting;
2715
Stephen Hemminger793b8832005-09-14 16:06:14 -07002716 switch (ecmd->speed) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002717 case SPEED_1000:
2718 if (ecmd->duplex == DUPLEX_FULL)
2719 setting = SUPPORTED_1000baseT_Full;
2720 else if (ecmd->duplex == DUPLEX_HALF)
2721 setting = SUPPORTED_1000baseT_Half;
2722 else
2723 return -EINVAL;
2724 break;
2725 case SPEED_100:
2726 if (ecmd->duplex == DUPLEX_FULL)
2727 setting = SUPPORTED_100baseT_Full;
2728 else if (ecmd->duplex == DUPLEX_HALF)
2729 setting = SUPPORTED_100baseT_Half;
2730 else
2731 return -EINVAL;
2732 break;
2733
2734 case SPEED_10:
2735 if (ecmd->duplex == DUPLEX_FULL)
2736 setting = SUPPORTED_10baseT_Full;
2737 else if (ecmd->duplex == DUPLEX_HALF)
2738 setting = SUPPORTED_10baseT_Half;
2739 else
2740 return -EINVAL;
2741 break;
2742 default:
2743 return -EINVAL;
2744 }
2745
2746 if ((setting & supported) == 0)
2747 return -EINVAL;
2748
2749 sky2->speed = ecmd->speed;
2750 sky2->duplex = ecmd->duplex;
2751 }
2752
2753 sky2->autoneg = ecmd->autoneg;
2754 sky2->advertising = ecmd->advertising;
2755
Stephen Hemminger1b537562005-12-20 15:08:07 -08002756 if (netif_running(dev))
2757 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002758
2759 return 0;
2760}
2761
2762static void sky2_get_drvinfo(struct net_device *dev,
2763 struct ethtool_drvinfo *info)
2764{
2765 struct sky2_port *sky2 = netdev_priv(dev);
2766
2767 strcpy(info->driver, DRV_NAME);
2768 strcpy(info->version, DRV_VERSION);
2769 strcpy(info->fw_version, "N/A");
2770 strcpy(info->bus_info, pci_name(sky2->hw->pdev));
2771}
2772
2773static const struct sky2_stat {
Stephen Hemminger793b8832005-09-14 16:06:14 -07002774 char name[ETH_GSTRING_LEN];
2775 u16 offset;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002776} sky2_stats[] = {
2777 { "tx_bytes", GM_TXO_OK_HI },
2778 { "rx_bytes", GM_RXO_OK_HI },
2779 { "tx_broadcast", GM_TXF_BC_OK },
2780 { "rx_broadcast", GM_RXF_BC_OK },
2781 { "tx_multicast", GM_TXF_MC_OK },
2782 { "rx_multicast", GM_RXF_MC_OK },
2783 { "tx_unicast", GM_TXF_UC_OK },
2784 { "rx_unicast", GM_RXF_UC_OK },
2785 { "tx_mac_pause", GM_TXF_MPAUSE },
2786 { "rx_mac_pause", GM_RXF_MPAUSE },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08002787 { "collisions", GM_TXF_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002788 { "late_collision",GM_TXF_LAT_COL },
2789 { "aborted", GM_TXF_ABO_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08002790 { "single_collisions", GM_TXF_SNG_COL },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002791 { "multi_collisions", GM_TXF_MUL_COL },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08002792
Stephen Hemmingerd2604542006-03-23 08:51:36 -08002793 { "rx_short", GM_RXF_SHT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002794 { "rx_runt", GM_RXE_FRAG },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08002795 { "rx_64_byte_packets", GM_RXF_64B },
2796 { "rx_65_to_127_byte_packets", GM_RXF_127B },
2797 { "rx_128_to_255_byte_packets", GM_RXF_255B },
2798 { "rx_256_to_511_byte_packets", GM_RXF_511B },
2799 { "rx_512_to_1023_byte_packets", GM_RXF_1023B },
2800 { "rx_1024_to_1518_byte_packets", GM_RXF_1518B },
2801 { "rx_1518_to_max_byte_packets", GM_RXF_MAX_SZ },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002802 { "rx_too_long", GM_RXF_LNG_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08002803 { "rx_fifo_overflow", GM_RXE_FIFO_OV },
2804 { "rx_jabber", GM_RXF_JAB_PKT },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002805 { "rx_fcs_error", GM_RXF_FCS_ERR },
Stephen Hemmingereadfa7dd2006-03-22 10:38:45 -08002806
2807 { "tx_64_byte_packets", GM_TXF_64B },
2808 { "tx_65_to_127_byte_packets", GM_TXF_127B },
2809 { "tx_128_to_255_byte_packets", GM_TXF_255B },
2810 { "tx_256_to_511_byte_packets", GM_TXF_511B },
2811 { "tx_512_to_1023_byte_packets", GM_TXF_1023B },
2812 { "tx_1024_to_1518_byte_packets", GM_TXF_1518B },
2813 { "tx_1519_to_max_byte_packets", GM_TXF_MAX_SZ },
2814 { "tx_fifo_underrun", GM_TXE_FIFO_UR },
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002815};
2816
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002817static u32 sky2_get_rx_csum(struct net_device *dev)
2818{
2819 struct sky2_port *sky2 = netdev_priv(dev);
2820
2821 return sky2->rx_csum;
2822}
2823
2824static int sky2_set_rx_csum(struct net_device *dev, u32 data)
2825{
2826 struct sky2_port *sky2 = netdev_priv(dev);
2827
2828 sky2->rx_csum = data;
Stephen Hemminger793b8832005-09-14 16:06:14 -07002829
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002830 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
2831 data ? BMU_ENA_RX_CHKSUM : BMU_DIS_RX_CHKSUM);
2832
2833 return 0;
2834}
2835
2836static u32 sky2_get_msglevel(struct net_device *netdev)
2837{
2838 struct sky2_port *sky2 = netdev_priv(netdev);
2839 return sky2->msg_enable;
2840}
2841
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07002842static int sky2_nway_reset(struct net_device *dev)
2843{
2844 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07002845
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07002846 if (!netif_running(dev) || sky2->autoneg != AUTONEG_ENABLE)
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07002847 return -EINVAL;
2848
Stephen Hemminger1b537562005-12-20 15:08:07 -08002849 sky2_phy_reinit(sky2);
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07002850
2851 return 0;
2852}
2853
Stephen Hemminger793b8832005-09-14 16:06:14 -07002854static void sky2_phy_stats(struct sky2_port *sky2, u64 * data, unsigned count)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002855{
2856 struct sky2_hw *hw = sky2->hw;
2857 unsigned port = sky2->port;
2858 int i;
2859
2860 data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07002861 | (u64) gma_read32(hw, port, GM_TXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002862 data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32
Stephen Hemminger793b8832005-09-14 16:06:14 -07002863 | (u64) gma_read32(hw, port, GM_RXO_OK_LO);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002864
Stephen Hemminger793b8832005-09-14 16:06:14 -07002865 for (i = 2; i < count; i++)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002866 data[i] = (u64) gma_read32(hw, port, sky2_stats[i].offset);
2867}
2868
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002869static void sky2_set_msglevel(struct net_device *netdev, u32 value)
2870{
2871 struct sky2_port *sky2 = netdev_priv(netdev);
2872 sky2->msg_enable = value;
2873}
2874
2875static int sky2_get_stats_count(struct net_device *dev)
2876{
2877 return ARRAY_SIZE(sky2_stats);
2878}
2879
2880static void sky2_get_ethtool_stats(struct net_device *dev,
Stephen Hemminger793b8832005-09-14 16:06:14 -07002881 struct ethtool_stats *stats, u64 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002882{
2883 struct sky2_port *sky2 = netdev_priv(dev);
2884
Stephen Hemminger793b8832005-09-14 16:06:14 -07002885 sky2_phy_stats(sky2, data, ARRAY_SIZE(sky2_stats));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002886}
2887
Stephen Hemminger793b8832005-09-14 16:06:14 -07002888static void sky2_get_strings(struct net_device *dev, u32 stringset, u8 * data)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002889{
2890 int i;
2891
2892 switch (stringset) {
2893 case ETH_SS_STATS:
2894 for (i = 0; i < ARRAY_SIZE(sky2_stats); i++)
2895 memcpy(data + i * ETH_GSTRING_LEN,
2896 sky2_stats[i].name, ETH_GSTRING_LEN);
2897 break;
2898 }
2899}
2900
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002901static struct net_device_stats *sky2_get_stats(struct net_device *dev)
2902{
2903 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002904 return &sky2->net_stats;
2905}
2906
2907static int sky2_set_mac_address(struct net_device *dev, void *p)
2908{
2909 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08002910 struct sky2_hw *hw = sky2->hw;
2911 unsigned port = sky2->port;
2912 const struct sockaddr *addr = p;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002913
2914 if (!is_valid_ether_addr(addr->sa_data))
2915 return -EADDRNOTAVAIL;
2916
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002917 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08002918 memcpy_toio(hw->regs + B2_MAC_1 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002919 dev->dev_addr, ETH_ALEN);
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08002920 memcpy_toio(hw->regs + B2_MAC_2 + port * 8,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002921 dev->dev_addr, ETH_ALEN);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002922
Stephen Hemmingera8ab1ec2006-01-30 11:37:57 -08002923 /* virtual address for data */
2924 gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr);
2925
2926 /* physical address: used for pause frames */
2927 gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr);
Stephen Hemminger1b537562005-12-20 15:08:07 -08002928
2929 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002930}
2931
Stephen Hemmingera052b522006-10-17 10:24:23 -07002932static void inline sky2_add_filter(u8 filter[8], const u8 *addr)
2933{
2934 u32 bit;
2935
2936 bit = ether_crc(ETH_ALEN, addr) & 63;
2937 filter[bit >> 3] |= 1 << (bit & 7);
2938}
2939
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002940static void sky2_set_multicast(struct net_device *dev)
2941{
2942 struct sky2_port *sky2 = netdev_priv(dev);
2943 struct sky2_hw *hw = sky2->hw;
2944 unsigned port = sky2->port;
2945 struct dev_mc_list *list = dev->mc_list;
2946 u16 reg;
2947 u8 filter[8];
Stephen Hemmingera052b522006-10-17 10:24:23 -07002948 int rx_pause;
2949 static const u8 pause_mc_addr[ETH_ALEN] = { 0x1, 0x80, 0xc2, 0x0, 0x0, 0x1 };
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002950
Stephen Hemmingera052b522006-10-17 10:24:23 -07002951 rx_pause = (sky2->flow_status == FC_RX || sky2->flow_status == FC_BOTH);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002952 memset(filter, 0, sizeof(filter));
2953
2954 reg = gma_read16(hw, port, GM_RX_CTRL);
2955 reg |= GM_RXCR_UCF_ENA;
2956
shemminger@osdl.orgd571b692005-10-26 12:16:09 -07002957 if (dev->flags & IFF_PROMISC) /* promiscuous */
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002958 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
Stephen Hemmingera052b522006-10-17 10:24:23 -07002959 else if (dev->flags & IFF_ALLMULTI)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002960 memset(filter, 0xff, sizeof(filter));
Stephen Hemmingera052b522006-10-17 10:24:23 -07002961 else if (dev->mc_count == 0 && !rx_pause)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002962 reg &= ~GM_RXCR_MCF_ENA;
2963 else {
2964 int i;
2965 reg |= GM_RXCR_MCF_ENA;
2966
Stephen Hemmingera052b522006-10-17 10:24:23 -07002967 if (rx_pause)
2968 sky2_add_filter(filter, pause_mc_addr);
2969
2970 for (i = 0; list && i < dev->mc_count; i++, list = list->next)
2971 sky2_add_filter(filter, list->dmi_addr);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002972 }
2973
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002974 gma_write16(hw, port, GM_MC_ADDR_H1,
Stephen Hemminger793b8832005-09-14 16:06:14 -07002975 (u16) filter[0] | ((u16) filter[1] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002976 gma_write16(hw, port, GM_MC_ADDR_H2,
Stephen Hemminger793b8832005-09-14 16:06:14 -07002977 (u16) filter[2] | ((u16) filter[3] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002978 gma_write16(hw, port, GM_MC_ADDR_H3,
Stephen Hemminger793b8832005-09-14 16:06:14 -07002979 (u16) filter[4] | ((u16) filter[5] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002980 gma_write16(hw, port, GM_MC_ADDR_H4,
Stephen Hemminger793b8832005-09-14 16:06:14 -07002981 (u16) filter[6] | ((u16) filter[7] << 8));
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002982
2983 gma_write16(hw, port, GM_RX_CTRL, reg);
2984}
2985
2986/* Can have one global because blinking is controlled by
2987 * ethtool and that is always under RTNL mutex
2988 */
Stephen Hemminger91c86df2005-12-09 11:34:57 -08002989static void sky2_led(struct sky2_hw *hw, unsigned port, int on)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002990{
Stephen Hemminger793b8832005-09-14 16:06:14 -07002991 u16 pg;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07002992
Stephen Hemminger793b8832005-09-14 16:06:14 -07002993 switch (hw->chip_id) {
2994 case CHIP_ID_YUKON_XL:
2995 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
2996 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
2997 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL,
2998 on ? (PHY_M_LEDC_LOS_CTRL(1) |
2999 PHY_M_LEDC_INIT_CTRL(7) |
3000 PHY_M_LEDC_STA1_CTRL(7) |
3001 PHY_M_LEDC_STA0_CTRL(7))
3002 : 0);
3003
3004 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
3005 break;
3006
3007 default:
3008 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0);
Stephen Hemminger0efdf262006-12-05 12:03:41 -08003009 gm_phy_write(hw, port, PHY_MARV_LED_OVER,
3010 on ? PHY_M_LED_ALL : 0);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003011 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003012}
3013
3014/* blink LED's for finding board */
3015static int sky2_phys_id(struct net_device *dev, u32 data)
3016{
3017 struct sky2_port *sky2 = netdev_priv(dev);
3018 struct sky2_hw *hw = sky2->hw;
3019 unsigned port = sky2->port;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003020 u16 ledctrl, ledover = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003021 long ms;
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003022 int interrupted;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003023 int onoff = 1;
3024
Stephen Hemminger793b8832005-09-14 16:06:14 -07003025 if (!data || data > (u32) (MAX_SCHEDULE_TIMEOUT / HZ))
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003026 ms = jiffies_to_msecs(MAX_SCHEDULE_TIMEOUT);
3027 else
3028 ms = data * 1000;
3029
3030 /* save initial values */
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003031 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003032 if (hw->chip_id == CHIP_ID_YUKON_XL) {
3033 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3034 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
3035 ledctrl = gm_phy_read(hw, port, PHY_MARV_PHY_CTRL);
3036 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
3037 } else {
3038 ledctrl = gm_phy_read(hw, port, PHY_MARV_LED_CTRL);
3039 ledover = gm_phy_read(hw, port, PHY_MARV_LED_OVER);
3040 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003041
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003042 interrupted = 0;
3043 while (!interrupted && ms > 0) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003044 sky2_led(hw, port, onoff);
3045 onoff = !onoff;
3046
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003047 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003048 interrupted = msleep_interruptible(250);
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003049 spin_lock_bh(&sky2->phy_lock);
Stephen Hemminger91c86df2005-12-09 11:34:57 -08003050
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003051 ms -= 250;
3052 }
3053
3054 /* resume regularly scheduled programming */
Stephen Hemminger793b8832005-09-14 16:06:14 -07003055 if (hw->chip_id == CHIP_ID_YUKON_XL) {
3056 u16 pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR);
3057 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 3);
3058 gm_phy_write(hw, port, PHY_MARV_PHY_CTRL, ledctrl);
3059 gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg);
3060 } else {
3061 gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl);
3062 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
3063 }
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003064 spin_unlock_bh(&sky2->phy_lock);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003065
3066 return 0;
3067}
3068
3069static void sky2_get_pauseparam(struct net_device *dev,
3070 struct ethtool_pauseparam *ecmd)
3071{
3072 struct sky2_port *sky2 = netdev_priv(dev);
3073
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003074 switch (sky2->flow_mode) {
3075 case FC_NONE:
3076 ecmd->tx_pause = ecmd->rx_pause = 0;
3077 break;
3078 case FC_TX:
3079 ecmd->tx_pause = 1, ecmd->rx_pause = 0;
3080 break;
3081 case FC_RX:
3082 ecmd->tx_pause = 0, ecmd->rx_pause = 1;
3083 break;
3084 case FC_BOTH:
3085 ecmd->tx_pause = ecmd->rx_pause = 1;
3086 }
3087
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003088 ecmd->autoneg = sky2->autoneg;
3089}
3090
3091static int sky2_set_pauseparam(struct net_device *dev,
3092 struct ethtool_pauseparam *ecmd)
3093{
3094 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003095
3096 sky2->autoneg = ecmd->autoneg;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003097 sky2->flow_mode = sky2_flow(ecmd->rx_pause, ecmd->tx_pause);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003098
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003099 if (netif_running(dev))
3100 sky2_phy_reinit(sky2);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003101
Stephen Hemminger2eaba1a2006-09-06 12:44:47 -07003102 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003103}
3104
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003105static int sky2_get_coalesce(struct net_device *dev,
3106 struct ethtool_coalesce *ecmd)
3107{
3108 struct sky2_port *sky2 = netdev_priv(dev);
3109 struct sky2_hw *hw = sky2->hw;
3110
3111 if (sky2_read8(hw, STAT_TX_TIMER_CTRL) == TIM_STOP)
3112 ecmd->tx_coalesce_usecs = 0;
3113 else {
3114 u32 clks = sky2_read32(hw, STAT_TX_TIMER_INI);
3115 ecmd->tx_coalesce_usecs = sky2_clk2us(hw, clks);
3116 }
3117 ecmd->tx_max_coalesced_frames = sky2_read16(hw, STAT_TX_IDX_TH);
3118
3119 if (sky2_read8(hw, STAT_LEV_TIMER_CTRL) == TIM_STOP)
3120 ecmd->rx_coalesce_usecs = 0;
3121 else {
3122 u32 clks = sky2_read32(hw, STAT_LEV_TIMER_INI);
3123 ecmd->rx_coalesce_usecs = sky2_clk2us(hw, clks);
3124 }
3125 ecmd->rx_max_coalesced_frames = sky2_read8(hw, STAT_FIFO_WM);
3126
3127 if (sky2_read8(hw, STAT_ISR_TIMER_CTRL) == TIM_STOP)
3128 ecmd->rx_coalesce_usecs_irq = 0;
3129 else {
3130 u32 clks = sky2_read32(hw, STAT_ISR_TIMER_INI);
3131 ecmd->rx_coalesce_usecs_irq = sky2_clk2us(hw, clks);
3132 }
3133
3134 ecmd->rx_max_coalesced_frames_irq = sky2_read8(hw, STAT_FIFO_ISR_WM);
3135
3136 return 0;
3137}
3138
3139/* Note: this affect both ports */
3140static int sky2_set_coalesce(struct net_device *dev,
3141 struct ethtool_coalesce *ecmd)
3142{
3143 struct sky2_port *sky2 = netdev_priv(dev);
3144 struct sky2_hw *hw = sky2->hw;
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003145 const u32 tmax = sky2_clk2us(hw, 0x0ffffff);
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003146
Stephen Hemminger77b3d6a2006-03-20 15:48:18 -08003147 if (ecmd->tx_coalesce_usecs > tmax ||
3148 ecmd->rx_coalesce_usecs > tmax ||
3149 ecmd->rx_coalesce_usecs_irq > tmax)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003150 return -EINVAL;
3151
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003152 if (ecmd->tx_max_coalesced_frames >= TX_RING_SIZE-1)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003153 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003154 if (ecmd->rx_max_coalesced_frames > RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003155 return -EINVAL;
Stephen Hemmingerff81fbb2006-02-22 11:44:59 -08003156 if (ecmd->rx_max_coalesced_frames_irq >RX_MAX_PENDING)
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003157 return -EINVAL;
3158
3159 if (ecmd->tx_coalesce_usecs == 0)
3160 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_STOP);
3161 else {
3162 sky2_write32(hw, STAT_TX_TIMER_INI,
3163 sky2_us2clk(hw, ecmd->tx_coalesce_usecs));
3164 sky2_write8(hw, STAT_TX_TIMER_CTRL, TIM_START);
3165 }
3166 sky2_write16(hw, STAT_TX_IDX_TH, ecmd->tx_max_coalesced_frames);
3167
3168 if (ecmd->rx_coalesce_usecs == 0)
3169 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_STOP);
3170 else {
3171 sky2_write32(hw, STAT_LEV_TIMER_INI,
3172 sky2_us2clk(hw, ecmd->rx_coalesce_usecs));
3173 sky2_write8(hw, STAT_LEV_TIMER_CTRL, TIM_START);
3174 }
3175 sky2_write8(hw, STAT_FIFO_WM, ecmd->rx_max_coalesced_frames);
3176
3177 if (ecmd->rx_coalesce_usecs_irq == 0)
3178 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_STOP);
3179 else {
Stephen Hemmingerd28d4872006-01-30 11:37:56 -08003180 sky2_write32(hw, STAT_ISR_TIMER_INI,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003181 sky2_us2clk(hw, ecmd->rx_coalesce_usecs_irq));
3182 sky2_write8(hw, STAT_ISR_TIMER_CTRL, TIM_START);
3183 }
3184 sky2_write8(hw, STAT_FIFO_ISR_WM, ecmd->rx_max_coalesced_frames_irq);
3185 return 0;
3186}
3187
Stephen Hemminger793b8832005-09-14 16:06:14 -07003188static void sky2_get_ringparam(struct net_device *dev,
3189 struct ethtool_ringparam *ering)
3190{
3191 struct sky2_port *sky2 = netdev_priv(dev);
3192
3193 ering->rx_max_pending = RX_MAX_PENDING;
3194 ering->rx_mini_max_pending = 0;
3195 ering->rx_jumbo_max_pending = 0;
3196 ering->tx_max_pending = TX_RING_SIZE - 1;
3197
3198 ering->rx_pending = sky2->rx_pending;
3199 ering->rx_mini_pending = 0;
3200 ering->rx_jumbo_pending = 0;
3201 ering->tx_pending = sky2->tx_pending;
3202}
3203
3204static int sky2_set_ringparam(struct net_device *dev,
3205 struct ethtool_ringparam *ering)
3206{
3207 struct sky2_port *sky2 = netdev_priv(dev);
3208 int err = 0;
3209
3210 if (ering->rx_pending > RX_MAX_PENDING ||
3211 ering->rx_pending < 8 ||
3212 ering->tx_pending < MAX_SKB_TX_LE ||
3213 ering->tx_pending > TX_RING_SIZE - 1)
3214 return -EINVAL;
3215
3216 if (netif_running(dev))
3217 sky2_down(dev);
3218
3219 sky2->rx_pending = ering->rx_pending;
3220 sky2->tx_pending = ering->tx_pending;
3221
Stephen Hemminger1b537562005-12-20 15:08:07 -08003222 if (netif_running(dev)) {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003223 err = sky2_up(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003224 if (err)
3225 dev_close(dev);
Stephen Hemminger6ed995b2005-12-20 15:08:08 -08003226 else
3227 sky2_set_multicast(dev);
Stephen Hemminger1b537562005-12-20 15:08:07 -08003228 }
Stephen Hemminger793b8832005-09-14 16:06:14 -07003229
3230 return err;
3231}
3232
Stephen Hemminger793b8832005-09-14 16:06:14 -07003233static int sky2_get_regs_len(struct net_device *dev)
3234{
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003235 return 0x4000;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003236}
3237
3238/*
3239 * Returns copy of control register region
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003240 * Note: access to the RAM address register set will cause timeouts.
Stephen Hemminger793b8832005-09-14 16:06:14 -07003241 */
3242static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs,
3243 void *p)
3244{
3245 const struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003246 const void __iomem *io = sky2->hw->regs;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003247
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003248 BUG_ON(regs->len < B3_RI_WTO_R1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003249 regs->version = 1;
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003250 memset(p, 0, regs->len);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003251
Stephen Hemminger6e4cbb32005-09-19 15:47:57 -07003252 memcpy_fromio(p, io, B3_RAM_ADDR);
3253
3254 memcpy_fromio(p + B3_RI_WTO_R1,
3255 io + B3_RI_WTO_R1,
3256 regs->len - B3_RI_WTO_R1);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003257}
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003258
Jeff Garzik7282d492006-09-13 14:30:00 -04003259static const struct ethtool_ops sky2_ethtool_ops = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003260 .get_settings = sky2_get_settings,
3261 .set_settings = sky2_set_settings,
Stephen Hemmingere3173832007-02-06 10:45:39 -08003262 .get_drvinfo = sky2_get_drvinfo,
3263 .get_wol = sky2_get_wol,
3264 .set_wol = sky2_set_wol,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003265 .get_msglevel = sky2_get_msglevel,
3266 .set_msglevel = sky2_set_msglevel,
Stephen Hemminger9a7ae0a2005-09-27 15:28:42 -07003267 .nway_reset = sky2_nway_reset,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003268 .get_regs_len = sky2_get_regs_len,
3269 .get_regs = sky2_get_regs,
3270 .get_link = ethtool_op_get_link,
3271 .get_sg = ethtool_op_get_sg,
3272 .set_sg = ethtool_op_set_sg,
3273 .get_tx_csum = ethtool_op_get_tx_csum,
3274 .set_tx_csum = ethtool_op_set_tx_csum,
3275 .get_tso = ethtool_op_get_tso,
3276 .set_tso = ethtool_op_set_tso,
3277 .get_rx_csum = sky2_get_rx_csum,
3278 .set_rx_csum = sky2_set_rx_csum,
3279 .get_strings = sky2_get_strings,
Stephen Hemmingerfb173582005-12-09 11:34:56 -08003280 .get_coalesce = sky2_get_coalesce,
3281 .set_coalesce = sky2_set_coalesce,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003282 .get_ringparam = sky2_get_ringparam,
3283 .set_ringparam = sky2_set_ringparam,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003284 .get_pauseparam = sky2_get_pauseparam,
3285 .set_pauseparam = sky2_set_pauseparam,
Stephen Hemminger793b8832005-09-14 16:06:14 -07003286 .phys_id = sky2_phys_id,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003287 .get_stats_count = sky2_get_stats_count,
3288 .get_ethtool_stats = sky2_get_ethtool_stats,
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07003289 .get_perm_addr = ethtool_op_get_perm_addr,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003290};
3291
3292/* Initialize network device */
3293static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
Stephen Hemmingere3173832007-02-06 10:45:39 -08003294 unsigned port,
3295 int highmem, int wol)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003296{
3297 struct sky2_port *sky2;
3298 struct net_device *dev = alloc_etherdev(sizeof(*sky2));
3299
3300 if (!dev) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003301 dev_err(&hw->pdev->dev, "etherdev alloc failed");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003302 return NULL;
3303 }
3304
3305 SET_MODULE_OWNER(dev);
3306 SET_NETDEV_DEV(dev, &hw->pdev->dev);
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08003307 dev->irq = hw->pdev->irq;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003308 dev->open = sky2_up;
3309 dev->stop = sky2_down;
shemminger@osdl.orgef743d32005-11-30 11:45:12 -08003310 dev->do_ioctl = sky2_ioctl;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003311 dev->hard_start_xmit = sky2_xmit_frame;
3312 dev->get_stats = sky2_get_stats;
3313 dev->set_multicast_list = sky2_set_multicast;
3314 dev->set_mac_address = sky2_set_mac_address;
3315 dev->change_mtu = sky2_change_mtu;
3316 SET_ETHTOOL_OPS(dev, &sky2_ethtool_ops);
3317 dev->tx_timeout = sky2_tx_timeout;
3318 dev->watchdog_timeo = TX_WATCHDOG;
3319 if (port == 0)
3320 dev->poll = sky2_poll;
3321 dev->weight = NAPI_WEIGHT;
3322#ifdef CONFIG_NET_POLL_CONTROLLER
Stephen Hemminger0ca43232006-10-18 13:39:28 -07003323 /* Network console (only works on port 0)
3324 * because netpoll makes assumptions about NAPI
3325 */
3326 if (port == 0)
3327 dev->poll_controller = sky2_netpoll;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003328#endif
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003329
3330 sky2 = netdev_priv(dev);
3331 sky2->netdev = dev;
3332 sky2->hw = hw;
3333 sky2->msg_enable = netif_msg_init(debug, default_msg);
3334
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003335 /* Auto speed and flow control */
3336 sky2->autoneg = AUTONEG_ENABLE;
Stephen Hemminger16ad91e2006-10-17 10:24:13 -07003337 sky2->flow_mode = FC_BOTH;
3338
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003339 sky2->duplex = -1;
3340 sky2->speed = -1;
3341 sky2->advertising = sky2_supported_modes(hw);
Stephen Hemmingeree7abb02006-05-18 11:16:21 -07003342 sky2->rx_csum = 1;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003343 sky2->wol = wol;
Stephen Hemminger75d070c2005-12-09 11:35:11 -08003344
Stephen Hemmingere07b1aa2006-03-20 15:48:17 -08003345 spin_lock_init(&sky2->phy_lock);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003346 sky2->tx_pending = TX_DEF_PENDING;
Stephen Hemminger290d4de2006-03-20 15:48:15 -08003347 sky2->rx_pending = RX_DEF_PENDING;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003348
3349 hw->dev[port] = dev;
3350
3351 sky2->port = port;
3352
shemminger@osdl.org5a5b1ea2005-11-30 11:45:15 -08003353 if (hw->chip_id != CHIP_ID_YUKON_EC_U)
3354 dev->features |= NETIF_F_TSO;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003355 if (highmem)
3356 dev->features |= NETIF_F_HIGHDMA;
Stephen Hemminger793b8832005-09-14 16:06:14 -07003357 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003358
shemminger@osdl.orgd1f13702005-09-27 15:02:57 -07003359#ifdef SKY2_VLAN_TAG_USED
3360 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
3361 dev->vlan_rx_register = sky2_vlan_rx_register;
3362 dev->vlan_rx_kill_vid = sky2_vlan_rx_kill_vid;
3363#endif
3364
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003365 /* read the mac address */
Stephen Hemminger793b8832005-09-14 16:06:14 -07003366 memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port * 8, ETH_ALEN);
Stephen Hemminger2995bfb2005-09-28 10:01:03 -07003367 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003368
3369 /* device is off until link detection */
3370 netif_carrier_off(dev);
3371 netif_stop_queue(dev);
3372
3373 return dev;
3374}
3375
Stephen Hemminger28bd1812006-01-17 13:43:19 -08003376static void __devinit sky2_show_addr(struct net_device *dev)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003377{
3378 const struct sky2_port *sky2 = netdev_priv(dev);
3379
3380 if (netif_msg_probe(sky2))
3381 printk(KERN_INFO PFX "%s: addr %02x:%02x:%02x:%02x:%02x:%02x\n",
3382 dev->name,
3383 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
3384 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
3385}
3386
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003387/* Handle software interrupt used during MSI test */
David Howells7d12e782006-10-05 14:55:46 +01003388static irqreturn_t __devinit sky2_test_intr(int irq, void *dev_id)
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003389{
3390 struct sky2_hw *hw = dev_id;
3391 u32 status = sky2_read32(hw, B0_Y2_SP_ISRC2);
3392
3393 if (status == 0)
3394 return IRQ_NONE;
3395
3396 if (status & Y2_IS_IRQ_SW) {
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08003397 hw->msi = 1;
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003398 wake_up(&hw->msi_wait);
3399 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
3400 }
3401 sky2_write32(hw, B0_Y2_SP_ICR, 2);
3402
3403 return IRQ_HANDLED;
3404}
3405
3406/* Test interrupt path by forcing a a software IRQ */
3407static int __devinit sky2_test_msi(struct sky2_hw *hw)
3408{
3409 struct pci_dev *pdev = hw->pdev;
3410 int err;
3411
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07003412 init_waitqueue_head (&hw->msi_wait);
3413
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003414 sky2_write32(hw, B0_IMSK, Y2_IS_IRQ_SW);
3415
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08003416 err = request_irq(pdev->irq, sky2_test_intr, 0, DRV_NAME, hw);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003417 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003418 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003419 return err;
3420 }
3421
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003422 sky2_write8(hw, B0_CTST, CS_ST_SW_IRQ);
shemminger@osdl.orgbb507fe2006-08-28 10:00:48 -07003423 sky2_read8(hw, B0_CTST);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003424
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08003425 wait_event_timeout(hw->msi_wait, hw->msi, HZ/10);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003426
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08003427 if (!hw->msi) {
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003428 /* MSI test failed, go back to INTx mode */
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003429 dev_info(&pdev->dev, "No interrupt generated using MSI, "
3430 "switching to INTx mode.\n");
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003431
3432 err = -EOPNOTSUPP;
3433 sky2_write8(hw, B0_CTST, CS_CL_SW_IRQ);
3434 }
3435
3436 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger2bffc232006-10-17 10:17:18 -07003437 sky2_read32(hw, B0_IMSK);
Stephen Hemmingerfb2690a2006-03-20 15:48:19 -08003438
3439 free_irq(pdev->irq, hw);
3440
3441 return err;
3442}
3443
Stephen Hemmingere3173832007-02-06 10:45:39 -08003444static int __devinit pci_wake_enabled(struct pci_dev *dev)
3445{
3446 int pm = pci_find_capability(dev, PCI_CAP_ID_PM);
3447 u16 value;
3448
3449 if (!pm)
3450 return 0;
3451 if (pci_read_config_word(dev, pm + PCI_PM_CTRL, &value))
3452 return 0;
3453 return value & PCI_PM_CTRL_PME_ENABLE;
3454}
3455
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003456static int __devinit sky2_probe(struct pci_dev *pdev,
3457 const struct pci_device_id *ent)
3458{
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08003459 struct net_device *dev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003460 struct sky2_hw *hw;
Stephen Hemmingere3173832007-02-06 10:45:39 -08003461 int err, using_dac = 0, wol_default;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003462
Stephen Hemminger793b8832005-09-14 16:06:14 -07003463 err = pci_enable_device(pdev);
3464 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003465 dev_err(&pdev->dev, "cannot enable PCI device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003466 goto err_out;
3467 }
3468
Stephen Hemminger793b8832005-09-14 16:06:14 -07003469 err = pci_request_regions(pdev, DRV_NAME);
3470 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003471 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
Stephen Hemminger793b8832005-09-14 16:06:14 -07003472 goto err_out;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003473 }
3474
3475 pci_set_master(pdev);
3476
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08003477 if (sizeof(dma_addr_t) > sizeof(u32) &&
3478 !(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
3479 using_dac = 1;
3480 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
3481 if (err < 0) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003482 dev_err(&pdev->dev, "unable to obtain 64 bit DMA "
3483 "for consistent allocations\n");
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08003484 goto err_out_free_regions;
3485 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08003486 } else {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003487 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
3488 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003489 dev_err(&pdev->dev, "no usable DMA configuration\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003490 goto err_out_free_regions;
3491 }
3492 }
Stephen Hemmingerd1f3d4d2006-01-17 13:43:11 -08003493
Stephen Hemmingere3173832007-02-06 10:45:39 -08003494 wol_default = pci_wake_enabled(pdev) ? WAKE_MAGIC : 0;
3495
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003496 err = -ENOMEM;
Stephen Hemminger6aad85d2006-01-17 13:43:18 -08003497 hw = kzalloc(sizeof(*hw), GFP_KERNEL);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003498 if (!hw) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003499 dev_err(&pdev->dev, "cannot allocate hardware struct\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003500 goto err_out_free_regions;
3501 }
3502
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003503 hw->pdev = pdev;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003504
3505 hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000);
3506 if (!hw->regs) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003507 dev_err(&pdev->dev, "cannot map device registers\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003508 goto err_out_free_hw;
3509 }
3510
Stephen Hemminger56a645c2006-02-22 11:45:02 -08003511#ifdef __BIG_ENDIAN
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07003512 /* The sk98lin vendor driver uses hardware byte swapping but
3513 * this driver uses software swapping.
3514 */
Stephen Hemminger56a645c2006-02-22 11:45:02 -08003515 {
3516 u32 reg;
Stephen Hemminger56a645c2006-02-22 11:45:02 -08003517 reg = sky2_pci_read32(hw, PCI_DEV_REG2);
Stephen Hemmingerf65b1382006-09-06 12:45:02 -07003518 reg &= ~PCI_REV_DESC;
Stephen Hemminger56a645c2006-02-22 11:45:02 -08003519 sky2_pci_write32(hw, PCI_DEV_REG2, reg);
3520 }
3521#endif
3522
Stephen Hemminger08c06d82006-01-30 11:37:54 -08003523 /* ring for status responses */
3524 hw->st_le = pci_alloc_consistent(hw->pdev, STATUS_LE_BYTES,
3525 &hw->st_dma);
3526 if (!hw->st_le)
3527 goto err_out_iounmap;
3528
Stephen Hemmingere3173832007-02-06 10:45:39 -08003529 err = sky2_init(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003530 if (err)
Stephen Hemminger793b8832005-09-14 16:06:14 -07003531 goto err_out_iounmap;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003532
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003533 dev_info(&pdev->dev, "v%s addr 0x%llx irq %d Yukon-%s (0x%x) rev %d\n",
Greg Kroah-Hartman7c7459d2006-06-12 15:13:08 -07003534 DRV_VERSION, (unsigned long long)pci_resource_start(pdev, 0),
3535 pdev->irq, yukon2_name[hw->chip_id - CHIP_ID_YUKON_XL],
Stephen Hemminger793b8832005-09-14 16:06:14 -07003536 hw->chip_id, hw->chip_rev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003537
Stephen Hemmingere3173832007-02-06 10:45:39 -08003538 sky2_reset(hw);
3539
3540 dev = sky2_init_netdev(hw, 0, using_dac, wol_default);
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08003541 if (!dev) {
3542 err = -ENOMEM;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003543 goto err_out_free_pci;
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08003544 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003545
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07003546 if (!disable_msi && pci_enable_msi(pdev) == 0) {
3547 err = sky2_test_msi(hw);
3548 if (err == -EOPNOTSUPP)
3549 pci_disable_msi(pdev);
3550 else if (err)
3551 goto err_out_free_netdev;
3552 }
3553
Stephen Hemminger793b8832005-09-14 16:06:14 -07003554 err = register_netdev(dev);
3555 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003556 dev_err(&pdev->dev, "cannot register net device\n");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003557 goto err_out_free_netdev;
3558 }
3559
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08003560 err = request_irq(pdev->irq, sky2_intr, hw->msi ? 0 : IRQF_SHARED,
3561 dev->name, hw);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07003562 if (err) {
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003563 dev_err(&pdev->dev, "cannot assign irq %d\n", pdev->irq);
Stephen Hemminger9fa1b1f2006-09-26 11:57:40 -07003564 goto err_out_unregister;
3565 }
3566 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
3567
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003568 sky2_show_addr(dev);
3569
shemminger@linux-foundation.org7f60c642007-01-26 11:38:36 -08003570 if (hw->ports > 1) {
3571 struct net_device *dev1;
3572
Stephen Hemmingere3173832007-02-06 10:45:39 -08003573 dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003574 if (!dev1)
3575 dev_warn(&pdev->dev, "allocation for second device failed\n");
3576 else if ((err = register_netdev(dev1))) {
3577 dev_warn(&pdev->dev,
3578 "register of second port failed (%d)\n", err);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003579 hw->dev[1] = NULL;
3580 free_netdev(dev1);
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003581 } else
3582 sky2_show_addr(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003583 }
3584
Stephen Hemminger01bd7562006-05-08 15:11:30 -07003585 setup_timer(&hw->idle_timer, sky2_idle, (unsigned long) hw);
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09003586 sky2_idle_start(hw);
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07003587
Stephen Hemminger793b8832005-09-14 16:06:14 -07003588 pci_set_drvdata(pdev, hw);
3589
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003590 return 0;
3591
Stephen Hemminger793b8832005-09-14 16:06:14 -07003592err_out_unregister:
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08003593 if (hw->msi)
3594 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003595 unregister_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003596err_out_free_netdev:
3597 free_netdev(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003598err_out_free_pci:
Stephen Hemminger793b8832005-09-14 16:06:14 -07003599 sky2_write8(hw, B0_CTST, CS_RST_SET);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003600 pci_free_consistent(hw->pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
3601err_out_iounmap:
3602 iounmap(hw->regs);
3603err_out_free_hw:
3604 kfree(hw);
3605err_out_free_regions:
3606 pci_release_regions(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003607 pci_disable_device(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003608err_out:
3609 return err;
3610}
3611
3612static void __devexit sky2_remove(struct pci_dev *pdev)
3613{
Stephen Hemminger793b8832005-09-14 16:06:14 -07003614 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003615 struct net_device *dev0, *dev1;
3616
Stephen Hemminger793b8832005-09-14 16:06:14 -07003617 if (!hw)
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003618 return;
3619
Stephen Hemmingerd27ed382006-04-25 10:58:51 -07003620 del_timer_sync(&hw->idle_timer);
3621
3622 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemminger72cb8522006-05-08 15:11:32 -07003623 synchronize_irq(hw->pdev->irq);
3624
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003625 dev0 = hw->dev[0];
Stephen Hemminger793b8832005-09-14 16:06:14 -07003626 dev1 = hw->dev[1];
3627 if (dev1)
3628 unregister_netdev(dev1);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003629 unregister_netdev(dev0);
3630
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003631 sky2_power_aux(hw);
3632
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003633 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003634 sky2_write8(hw, B0_CTST, CS_RST_SET);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07003635 sky2_read8(hw, B0_CTST);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003636
3637 free_irq(pdev->irq, hw);
Stephen Hemmingerb0a20de2006-12-01 14:29:37 -08003638 if (hw->msi)
3639 pci_disable_msi(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003640 pci_free_consistent(pdev, STATUS_LE_BYTES, hw->st_le, hw->st_dma);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003641 pci_release_regions(pdev);
3642 pci_disable_device(pdev);
Stephen Hemminger793b8832005-09-14 16:06:14 -07003643
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003644 if (dev1)
3645 free_netdev(dev1);
3646 free_netdev(dev0);
3647 iounmap(hw->regs);
3648 kfree(hw);
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07003649
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003650 pci_set_drvdata(pdev, NULL);
3651}
3652
3653#ifdef CONFIG_PM
3654static int sky2_suspend(struct pci_dev *pdev, pm_message_t state)
3655{
Stephen Hemminger793b8832005-09-14 16:06:14 -07003656 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003657 int i, wol = 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003658
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09003659 del_timer_sync(&hw->idle_timer);
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07003660 netif_poll_disable(hw->dev[0]);
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09003661
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09003662 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003663 struct net_device *dev = hw->dev[i];
Stephen Hemmingere3173832007-02-06 10:45:39 -08003664 struct sky2_port *sky2 = netdev_priv(dev);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003665
Stephen Hemmingere3173832007-02-06 10:45:39 -08003666 if (netif_running(dev))
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07003667 sky2_down(dev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003668
3669 if (sky2->wol)
3670 sky2_wol_init(sky2);
3671
3672 wol |= sky2->wol;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003673 }
3674
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09003675 sky2_write32(hw, B0_IMSK, 0);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003676 sky2_power_aux(hw);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003677
Linus Torvaldsd374c1c2006-06-12 12:53:27 -07003678 pci_save_state(pdev);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003679 pci_enable_wake(pdev, pci_choose_state(pdev, state), wol);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003680 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3681
Stephen Hemminger2ccc99b2006-06-13 17:17:27 +09003682 return 0;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003683}
3684
3685static int sky2_resume(struct pci_dev *pdev)
3686{
Stephen Hemminger793b8832005-09-14 16:06:14 -07003687 struct sky2_hw *hw = pci_get_drvdata(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08003688 int i, err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003689
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003690 err = pci_set_power_state(pdev, PCI_D0);
3691 if (err)
3692 goto out;
3693
3694 err = pci_restore_state(pdev);
3695 if (err)
3696 goto out;
3697
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003698 pci_enable_wake(pdev, PCI_D0, 0);
Stephen Hemmingere3173832007-02-06 10:45:39 -08003699 sky2_reset(hw);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003700
Stephen Hemminger8ab8fca2006-06-13 17:17:30 +09003701 sky2_write32(hw, B0_IMSK, Y2_IS_BASE);
3702
Stephen Hemmingerf05267e2006-06-13 17:17:28 +09003703 for (i = 0; i < hw->ports; i++) {
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003704 struct net_device *dev = hw->dev[i];
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07003705 if (netif_running(dev)) {
Stephen Hemminger08c06d82006-01-30 11:37:54 -08003706 err = sky2_up(dev);
3707 if (err) {
3708 printk(KERN_ERR PFX "%s: could not up: %d\n",
3709 dev->name, err);
3710 dev_close(dev);
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09003711 goto out;
shemminger@osdl.org5afa0a92005-09-27 15:03:00 -07003712 }
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003713 }
3714 }
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09003715
Stephen Hemminger6a5706b2006-07-12 15:23:46 -07003716 netif_poll_enable(hw->dev[0]);
Stephen Hemmingereb35cf62006-06-13 17:17:31 +09003717 sky2_idle_start(hw);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003718 return 0;
Stephen Hemminger08c06d82006-01-30 11:37:54 -08003719out:
Stephen Hemmingerb02a9252007-02-06 10:45:40 -08003720 dev_err(&pdev->dev, "resume failed (%d)\n", err);
Stephen Hemmingerae306cc2006-12-20 13:06:36 -08003721 pci_disable_device(pdev);
Stephen Hemminger08c06d82006-01-30 11:37:54 -08003722 return err;
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003723}
3724#endif
3725
Stephen Hemmingere3173832007-02-06 10:45:39 -08003726static void sky2_shutdown(struct pci_dev *pdev)
3727{
3728 struct sky2_hw *hw = pci_get_drvdata(pdev);
3729 int i, wol = 0;
3730
3731 del_timer_sync(&hw->idle_timer);
3732 netif_poll_disable(hw->dev[0]);
3733
3734 for (i = 0; i < hw->ports; i++) {
3735 struct net_device *dev = hw->dev[i];
3736 struct sky2_port *sky2 = netdev_priv(dev);
3737
3738 if (sky2->wol) {
3739 wol = 1;
3740 sky2_wol_init(sky2);
3741 }
3742 }
3743
3744 if (wol)
3745 sky2_power_aux(hw);
3746
3747 pci_enable_wake(pdev, PCI_D3hot, wol);
3748 pci_enable_wake(pdev, PCI_D3cold, wol);
3749
3750 pci_disable_device(pdev);
3751 pci_set_power_state(pdev, PCI_D3hot);
3752
3753}
3754
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003755static struct pci_driver sky2_driver = {
Stephen Hemminger793b8832005-09-14 16:06:14 -07003756 .name = DRV_NAME,
3757 .id_table = sky2_id_table,
3758 .probe = sky2_probe,
3759 .remove = __devexit_p(sky2_remove),
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003760#ifdef CONFIG_PM
Stephen Hemminger793b8832005-09-14 16:06:14 -07003761 .suspend = sky2_suspend,
3762 .resume = sky2_resume,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003763#endif
Stephen Hemmingere3173832007-02-06 10:45:39 -08003764 .shutdown = sky2_shutdown,
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003765};
3766
3767static int __init sky2_init_module(void)
3768{
shemminger@osdl.org50241c42005-11-30 11:45:22 -08003769 return pci_register_driver(&sky2_driver);
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003770}
3771
3772static void __exit sky2_cleanup_module(void)
3773{
3774 pci_unregister_driver(&sky2_driver);
3775}
3776
3777module_init(sky2_init_module);
3778module_exit(sky2_cleanup_module);
3779
3780MODULE_DESCRIPTION("Marvell Yukon 2 Gigabit Ethernet driver");
Stephen Hemminger65ebe632007-01-23 11:38:57 -08003781MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
Stephen Hemmingercd28ab62005-08-16 16:36:49 -07003782MODULE_LICENSE("GPL");
shemminger@osdl.org5f4f9dc2005-11-30 11:45:23 -08003783MODULE_VERSION(DRV_VERSION);