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gerrit-public.fairphone.software / fp2-dev / kernel / msm / b6014e15bc38a33cf9591d33674dd870027cb623 / . / arch / powerpc / boot / dts / sam440ep.dts
blob: b0984d550476e6cec27461519bbcab556d9738dd [file] [log] [blame]
Giuseppe Coviellob6014e12008-05-20 01:20:47 +1000[diff] [blame^]1/*
2 * Device Tree Source for ACube Sam440ep based off bamboo.dts code
3 * original copyrights below
4 *
5 * Copyright (c) 2006, 2007 IBM Corp.
6 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
7 *
8 * Modified from bamboo.dts for sam440ep:
9 * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without
13 * any warranty of any kind, whether express or implied.
14 */
15
16/ {
17 #address-cells = <2>;
18 #size-cells = <1>;
19 model = "acube,sam440ep";
20 compatible = "acube,sam440ep";
21 dcr-parent = <&/cpus/cpu@0>;
22
23 aliases {
24 ethernet0 = &EMAC0;
25 ethernet1 = &EMAC1;
26 serial0 = &UART0;
27 serial1 = &UART1;
28 serial2 = &UART2;
29 serial3 = &UART3;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 cpu@0 {
37 device_type = "cpu";
38 model = "PowerPC,440EP";
39 reg = <0>;
40 clock-frequency = <0>; /* Filled in by zImage */
41 timebase-frequency = <0>; /* Filled in by zImage */
42 i-cache-line-size = <20>;
43 d-cache-line-size = <20>;
44 i-cache-size = <8000>;
45 d-cache-size = <8000>;
46 dcr-controller;
47 dcr-access-method = "native";
48 };
49 };
50
51 memory {
52 device_type = "memory";
53 reg = <0 0 0>; /* Filled in by zImage */
54 };
55
56 UIC0: interrupt-controller0 {
57 compatible = "ibm,uic-440ep","ibm,uic";
58 interrupt-controller;
59 cell-index = <0>;
60 dcr-reg = <0c0 009>;
61 #address-cells = <0>;
62 #size-cells = <0>;
63 #interrupt-cells = <2>;
64 };
65
66 UIC1: interrupt-controller1 {
67 compatible = "ibm,uic-440ep","ibm,uic";
68 interrupt-controller;
69 cell-index = <1>;
70 dcr-reg = <0d0 009>;
71 #address-cells = <0>;
72 #size-cells = <0>;
73 #interrupt-cells = <2>;
74 interrupts = <1e 4 1f 4>; /* cascade */
75 interrupt-parent = <&UIC0>;
76 };
77
78 SDR0: sdr {
79 compatible = "ibm,sdr-440ep";
80 dcr-reg = <00e 002>;
81 };
82
83 CPR0: cpr {
84 compatible = "ibm,cpr-440ep";
85 dcr-reg = <00c 002>;
86 };
87
88 plb {
89 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
90 #address-cells = <2>;
91 #size-cells = <1>;
92 ranges;
93 clock-frequency = <0>; /* Filled in by zImage */
94
95 SDRAM0: sdram {
96 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
97 dcr-reg = <010 2>;
98 };
99
100 DMA0: dma {
101 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
102 dcr-reg = <100 027>;
103 };
104
105 MAL0: mcmal {
106 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
107 dcr-reg = <180 62>;
108 num-tx-chans = <4>;
109 num-rx-chans = <2>;
110 interrupt-parent = <&MAL0>;
111 interrupts = <0 1 2 3 4>;
112 #interrupt-cells = <1>;
113 #address-cells = <0>;
114 #size-cells = <0>;
115 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
116 /*RXEOB*/ 1 &UIC0 b 4
117 /*SERR*/ 2 &UIC1 0 4
118 /*TXDE*/ 3 &UIC1 1 4
119 /*RXDE*/ 4 &UIC1 2 4>;
120 };
121
122 POB0: opb {
123 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
124 #address-cells = <1>;
125 #size-cells = <1>;
126 /* Bamboo is oddball in the 44x world and doesn't use the ERPN
127 * bits.
128 */
129 ranges = <00000000 0 00000000 80000000
130 80000000 0 80000000 80000000>;
131 interrupt-parent = <&UIC1>;
132 interrupts = <7 4>;
133 clock-frequency = <0>; /* Filled in by zImage */
134
135 EBC0: ebc {
136 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
137 dcr-reg = <012 2>;
138 #address-cells = <2>;
139 #size-cells = <1>;
140 clock-frequency = <0>; /* Filled in by zImage */
141 interrupts = <5 1>;
142 interrupt-parent = <&UIC1>;
143 };
144
145 UART0: serial@ef600300 {
146 device_type = "serial";
147 compatible = "ns16550";
148 reg = <ef600300 8>;
149 virtual-reg = <ef600300>;
150 clock-frequency = <0>; /* Filled in by zImage */
151 current-speed = <1c200>;
152 interrupt-parent = <&UIC0>;
153 interrupts = <0 4>;
154 };
155
156 UART1: serial@ef600400 {
157 device_type = "serial";
158 compatible = "ns16550";
159 reg = <ef600400 8>;
160 virtual-reg = <ef600400>;
161 clock-frequency = <0>;
162 current-speed = <0>;
163 interrupt-parent = <&UIC0>;
164 interrupts = <1 4>;
165 };
166
167 UART2: serial@ef600500 {
168 device_type = "serial";
169 compatible = "ns16550";
170 reg = <ef600500 8>;
171 virtual-reg = <ef600500>;
172 clock-frequency = <0>;
173 current-speed = <0>;
174 interrupt-parent = <&UIC0>;
175 interrupts = <3 4>;
176 };
177
178 UART3: serial@ef600600 {
179 device_type = "serial";
180 compatible = "ns16550";
181 reg = <ef600600 8>;
182 virtual-reg = <ef600600>;
183 clock-frequency = <0>;
184 current-speed = <0>;
185 interrupt-parent = <&UIC0>;
186 interrupts = <4 4>;
187 };
188
189 IIC0: i2c@ef600700 {
190 #address-cells = <1>;
191 #size-cells = <0>;
192 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
193 index = <0>;
194 reg = <ef600700 14>;
195 interrupt-parent = <&UIC0>;
196 interrupts = <2 4>;
197 rtc@68 {
198 compatible = "stm,m41t80";
199 reg = <68>;
200 };
201 };
202
203 IIC1: i2c@ef600800 {
204 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
205 index = <5>;
206 reg = <ef600800 14>;
207 interrupt-parent = <&UIC0>;
208 interrupts = <7 4>;
209 };
210
211 ZMII0: emac-zmii@ef600d00 {
212 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
213 reg = <ef600d00 c>;
214 };
215
216 EMAC0: ethernet@ef600e00 {
217 linux,network-index = <0>;
218 device_type = "network";
219 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
220 interrupt-parent = <&UIC1>;
221 interrupts = <1c 4 1d 4>;
222 reg = <ef600e00 70>;
223 local-mac-address = [000000000000];
224 mal-device = <&MAL0>;
225 mal-tx-channel = <0 1>;
226 mal-rx-channel = <0>;
227 cell-index = <0>;
228 max-frame-size = <5dc>;
229 rx-fifo-size = <1000>;
230 tx-fifo-size = <800>;
231 phy-mode = "rmii";
232 phy-map = <00000000>;
233 zmii-device = <&ZMII0>;
234 zmii-channel = <0>;
235 };
236
237 EMAC1: ethernet@ef600f00 {
238 linux,network-index = <1>;
239 device_type = "network";
240 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
241 interrupt-parent = <&UIC1>;
242 interrupts = <1e 4 1f 4>;
243 reg = <ef600f00 70>;
244 local-mac-address = [000000000000];
245 mal-device = <&MAL0>;
246 mal-tx-channel = <2 3>;
247 mal-rx-channel = <1>;
248 cell-index = <1>;
249 max-frame-size = <5dc>;
250 rx-fifo-size = <1000>;
251 tx-fifo-size = <800>;
252 phy-mode = "rmii";
253 phy-map = <00000000>;
254 zmii-device = <&ZMII0>;
255 zmii-channel = <1>;
256 };
257 usb@ef601000 {
258 compatible = "ohci-be";
259 reg = <ef601000 80>;
260 interrupts = <8 4 9 4>;
261 interrupt-parent = < &UIC1 >;
262 };
263 };
264
265 PCI0: pci@ec000000 {
266 device_type = "pci";
267 #interrupt-cells = <1>;
268 #size-cells = <2>;
269 #address-cells = <3>;
270 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
271 primary;
272 reg = <0 eec00000 8 /* Config space access */
273 0 eed00000 4 /* IACK */
274 0 eed00000 4 /* Special cycle */
275 0 ef400000 40>; /* Internal registers */
276
277 /* Outbound ranges, one memory and one IO,
278 * later cannot be changed. Chip supports a second
279 * IO range but we don't use it for now
280 */
281 ranges = <02000000 0 a0000000 0 a0000000 0 20000000
282 01000000 0 00000000 0 e8000000 0 00010000>;
283
284 /* Inbound 2GB range starting at 0 */
285 dma-ranges = <42000000 0 0 0 0 0 80000000>;
286 };
287 };
288
289 chosen {
290 linux,stdout-path = "/plb/opb/serial@ef600300";
291 };
292};