blob: 25f25da7691714f881073404dc71e8500b8fc758 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 drivers/net/tulip/tulip.h
3
4 Copyright 2000,2001 The Linux Kernel Team
5 Written/copyright 1994-2001 by Donald Becker.
6
7 This software may be used and distributed according to the terms
8 of the GNU General Public License, incorporated herein by reference.
9
10 Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
11 for more information on this driver, or visit the project
12 Web page at http://sourceforge.net/projects/tulip/
13
14*/
15
16#ifndef __NET_TULIP_H__
17#define __NET_TULIP_H__
18
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/kernel.h>
20#include <linux/types.h>
21#include <linux/spinlock.h>
22#include <linux/netdevice.h>
23#include <linux/timer.h>
24#include <linux/delay.h>
25#include <asm/io.h>
26#include <asm/irq.h>
27
28
29
30/* undefine, or define to various debugging levels (>4 == obscene levels) */
31#define TULIP_DEBUG 1
32
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#ifdef CONFIG_TULIP_MMIO
Grant Grundler7f2b1242006-09-08 11:15:39 -070034#define TULIP_BAR 1 /* CBMA */
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#else
Grant Grundler7f2b1242006-09-08 11:15:39 -070036#define TULIP_BAR 0 /* CBIO */
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#endif
38
39
40
41struct tulip_chip_table {
42 char *chip_name;
43 int io_size;
44 int valid_intrs; /* CSR7 interrupt enable settings */
45 int flags;
Francois Romieu0bb3cf72006-09-08 11:15:38 -070046 void (*media_timer) (unsigned long);
David Howellsc4028952006-11-22 14:57:56 +000047 work_func_t media_task;
Linus Torvalds1da177e2005-04-16 15:20:36 -070048};
49
50
51enum tbl_flag {
52 HAS_MII = 0x0001,
53 HAS_MEDIA_TABLE = 0x0002,
54 CSR12_IN_SROM = 0x0004,
55 ALWAYS_CHECK_MII = 0x0008,
56 HAS_ACPI = 0x0010,
57 MC_HASH_ONLY = 0x0020, /* Hash-only multicast filter. */
58 HAS_PNICNWAY = 0x0080,
59 HAS_NWAY = 0x0040, /* Uses internal NWay xcvr. */
60 HAS_INTR_MITIGATION = 0x0100,
61 IS_ASIX = 0x0200,
62 HAS_8023X = 0x0400,
63 COMET_MAC_ADDR = 0x0800,
64 HAS_PCI_MWI = 0x1000,
65 HAS_PHY_IRQ = 0x2000,
66 HAS_SWAPPED_SEEPROM = 0x4000,
67 NEEDS_FAKE_MEDIA_TABLE = 0x8000,
68};
69
70
71/* chip types. careful! order is VERY IMPORTANT here, as these
72 * are used throughout the driver as indices into arrays */
73/* Note 21142 == 21143. */
74enum chips {
75 DC21040 = 0,
76 DC21041 = 1,
77 DC21140 = 2,
78 DC21142 = 3, DC21143 = 3,
79 LC82C168,
80 MX98713,
81 MX98715,
82 MX98725,
83 AX88140,
84 PNIC2,
85 COMET,
86 COMPEX9881,
87 I21145,
88 DM910X,
89 CONEXANT,
Linus Torvalds1da177e2005-04-16 15:20:36 -070090};
91
92
93enum MediaIs {
94 MediaIsFD = 1,
95 MediaAlwaysFD = 2,
96 MediaIsMII = 4,
97 MediaIsFx = 8,
98 MediaIs100 = 16
99};
100
101
102/* Offsets to the Command and Status Registers, "CSRs". All accesses
103 must be longword instructions and quadword aligned. */
104enum tulip_offsets {
105 CSR0 = 0,
106 CSR1 = 0x08,
107 CSR2 = 0x10,
108 CSR3 = 0x18,
109 CSR4 = 0x20,
110 CSR5 = 0x28,
111 CSR6 = 0x30,
112 CSR7 = 0x38,
113 CSR8 = 0x40,
114 CSR9 = 0x48,
115 CSR10 = 0x50,
116 CSR11 = 0x58,
117 CSR12 = 0x60,
118 CSR13 = 0x68,
119 CSR14 = 0x70,
120 CSR15 = 0x78,
121};
122
123/* register offset and bits for CFDD PCI config reg */
124enum pci_cfg_driver_reg {
125 CFDD = 0x40,
126 CFDD_Sleep = (1 << 31),
127 CFDD_Snooze = (1 << 30),
128};
129
130#define RxPollInt (RxIntr|RxNoBuf|RxDied|RxJabber)
131
132/* The bits in the CSR5 status registers, mostly interrupt sources. */
133enum status_bits {
134 TimerInt = 0x800,
135 SytemError = 0x2000,
136 TPLnkFail = 0x1000,
137 TPLnkPass = 0x10,
138 NormalIntr = 0x10000,
139 AbnormalIntr = 0x8000,
140 RxJabber = 0x200,
141 RxDied = 0x100,
142 RxNoBuf = 0x80,
143 RxIntr = 0x40,
144 TxFIFOUnderflow = 0x20,
Grant Grundler7f2b1242006-09-08 11:15:39 -0700145 RxErrIntr = 0x10,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146 TxJabber = 0x08,
147 TxNoBuf = 0x04,
148 TxDied = 0x02,
149 TxIntr = 0x01,
150};
151
152/* bit mask for CSR5 TX/RX process state */
153#define CSR5_TS 0x00700000
154#define CSR5_RS 0x000e0000
155
156enum tulip_mode_bits {
157 TxThreshold = (1 << 22),
158 FullDuplex = (1 << 9),
159 TxOn = 0x2000,
160 AcceptBroadcast = 0x0100,
161 AcceptAllMulticast = 0x0080,
162 AcceptAllPhys = 0x0040,
163 AcceptRunt = 0x0008,
164 RxOn = 0x0002,
165 RxTx = (TxOn | RxOn),
166};
167
168
169enum tulip_busconfig_bits {
170 MWI = (1 << 24),
171 MRL = (1 << 23),
172 MRM = (1 << 21),
173 CALShift = 14,
174 BurstLenShift = 8,
175};
176
177
178/* The Tulip Rx and Tx buffer descriptors. */
179struct tulip_rx_desc {
180 s32 status;
181 s32 length;
182 u32 buffer1;
183 u32 buffer2;
184};
185
186
187struct tulip_tx_desc {
188 s32 status;
189 s32 length;
190 u32 buffer1;
191 u32 buffer2; /* We use only buffer 1. */
192};
193
194
195enum desc_status_bits {
Grant Grundler7f2b1242006-09-08 11:15:39 -0700196 DescOwned = 0x80000000,
197 DescWholePkt = 0x60000000,
198 DescEndPkt = 0x40000000,
199 DescStartPkt = 0x20000000,
200 DescEndRing = 0x02000000,
201 DescUseLink = 0x01000000,
202 RxDescFatalErr = 0x008000,
203 RxWholePkt = 0x00000300,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204};
205
206
207enum t21143_csr6_bits {
208 csr6_sc = (1<<31),
209 csr6_ra = (1<<30),
210 csr6_ign_dest_msb = (1<<26),
211 csr6_mbo = (1<<25),
212 csr6_scr = (1<<24), /* scramble mode flag: can't be set */
213 csr6_pcs = (1<<23), /* Enables PCS functions (symbol mode requires csr6_ps be set) default is set */
214 csr6_ttm = (1<<22), /* Transmit Threshold Mode, set for 10baseT, 0 for 100BaseTX */
215 csr6_sf = (1<<21), /* Store and forward. If set ignores TR bits */
216 csr6_hbd = (1<<19), /* Heart beat disable. Disables SQE function in 10baseT */
217 csr6_ps = (1<<18), /* Port Select. 0 (defualt) = 10baseT, 1 = 100baseTX: can't be set */
218 csr6_ca = (1<<17), /* Collision Offset Enable. If set uses special algorithm in low collision situations */
219 csr6_trh = (1<<15), /* Transmit Threshold high bit */
220 csr6_trl = (1<<14), /* Transmit Threshold low bit */
221
222 /***************************************************************
223 * This table shows transmit threshold values based on media *
224 * and these two registers (from PNIC1 & 2 docs) Note: this is *
225 * all meaningless if sf is set. *
226 ***************************************************************/
227
228 /***********************************
229 * (trh,trl) * 100BaseTX * 10BaseT *
230 ***********************************
231 * (0,0) * 128 * 72 *
232 * (0,1) * 256 * 96 *
233 * (1,0) * 512 * 128 *
234 * (1,1) * 1024 * 160 *
235 ***********************************/
236
237 csr6_fc = (1<<12), /* Forces a collision in next transmission (for testing in loopback mode) */
238 csr6_om_int_loop = (1<<10), /* internal (FIFO) loopback flag */
239 csr6_om_ext_loop = (1<<11), /* external (PMD) loopback flag */
240 /* set both and you get (PHY) loopback */
241 csr6_fd = (1<<9), /* Full duplex mode, disables hearbeat, no loopback */
242 csr6_pm = (1<<7), /* Pass All Multicast */
243 csr6_pr = (1<<6), /* Promiscuous mode */
244 csr6_sb = (1<<5), /* Start(1)/Stop(0) backoff counter */
245 csr6_if = (1<<4), /* Inverse Filtering, rejects only addresses in address table: can't be set */
246 csr6_pb = (1<<3), /* Pass Bad Frames, (1) causes even bad frames to be passed on */
247 csr6_ho = (1<<2), /* Hash-only filtering mode: can't be set */
248 csr6_hp = (1<<0), /* Hash/Perfect Receive Filtering Mode: can't be set */
249
250 csr6_mask_capture = (csr6_sc | csr6_ca),
251 csr6_mask_defstate = (csr6_mask_capture | csr6_mbo),
252 csr6_mask_hdcap = (csr6_mask_defstate | csr6_hbd | csr6_ps),
253 csr6_mask_hdcaptt = (csr6_mask_hdcap | csr6_trh | csr6_trl),
254 csr6_mask_fullcap = (csr6_mask_hdcaptt | csr6_fd),
255 csr6_mask_fullpromisc = (csr6_pr | csr6_pm),
256 csr6_mask_filters = (csr6_hp | csr6_ho | csr6_if),
257 csr6_mask_100bt = (csr6_scr | csr6_pcs | csr6_hbd),
258};
259
260
261/* Keep the ring sizes a power of two for efficiency.
262 Making the Tx ring too large decreases the effectiveness of channel
263 bonding and packet priority.
264 There are no ill effects from too-large receive rings. */
265
266#define TX_RING_SIZE 32
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400267#define RX_RING_SIZE 128
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268#define MEDIA_MASK 31
269
270#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer. */
271
272#define TULIP_MIN_CACHE_LINE 8 /* in units of 32-bit words */
273
274#if defined(__sparc__) || defined(__hppa__)
275/* The UltraSparc PCI controllers will disconnect at every 64-byte
276 * crossing anyways so it makes no sense to tell Tulip to burst
277 * any more than that.
278 */
279#define TULIP_MAX_CACHE_LINE 16 /* in units of 32-bit words */
280#else
281#define TULIP_MAX_CACHE_LINE 32 /* in units of 32-bit words */
282#endif
283
284
285/* Ring-wrap flag in length field, use for last ring entry.
286 0x01000000 means chain on buffer2 address,
287 0x02000000 means use the ring start address in CSR2/3.
288 Note: Some work-alike chips do not function correctly in chained mode.
289 The ASIX chip works only in chained mode.
290 Thus we indicates ring mode, but always write the 'next' field for
291 chained mode as well.
292*/
293#define DESC_RING_WRAP 0x02000000
294
295
296#define EEPROM_SIZE 512 /* 2 << EEPROM_ADDRLEN */
297
298
299#define RUN_AT(x) (jiffies + (x))
300
301#if defined(__i386__) /* AKA get_unaligned() */
302#define get_u16(ptr) (*(u16 *)(ptr))
303#else
304#define get_u16(ptr) (((u8*)(ptr))[0] + (((u8*)(ptr))[1]<<8))
305#endif
306
307struct medialeaf {
308 u8 type;
309 u8 media;
310 unsigned char *leafdata;
311};
312
313
314struct mediatable {
315 u16 defaultmedia;
316 u8 leafcount;
317 u8 csr12dir; /* General purpose pin directions. */
318 unsigned has_mii:1;
319 unsigned has_nonmii:1;
320 unsigned has_reset:6;
321 u32 csr15dir;
322 u32 csr15val; /* 21143 NWay setting. */
323 struct medialeaf mleaf[0];
324};
325
326
327struct mediainfo {
328 struct mediainfo *next;
329 int info_type;
330 int index;
331 unsigned char *info;
332};
333
334struct ring_info {
335 struct sk_buff *skb;
336 dma_addr_t mapping;
337};
338
339
340struct tulip_private {
341 const char *product_name;
342 struct net_device *next_module;
343 struct tulip_rx_desc *rx_ring;
344 struct tulip_tx_desc *tx_ring;
345 dma_addr_t rx_ring_dma;
346 dma_addr_t tx_ring_dma;
347 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
348 struct ring_info tx_buffers[TX_RING_SIZE];
349 /* The addresses of receive-in-place skbuffs. */
350 struct ring_info rx_buffers[RX_RING_SIZE];
351 u16 setup_frame[96]; /* Pseudo-Tx frame to init address table. */
352 int chip_id;
353 int revision;
354 int flags;
355 struct net_device_stats stats;
356 struct timer_list timer; /* Media selection timer. */
357 struct timer_list oom_timer; /* Out of memory timer. */
358 u32 mc_filter[2];
359 spinlock_t lock;
360 spinlock_t mii_lock;
361 unsigned int cur_rx, cur_tx; /* The next free ring entry */
362 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
363
364#ifdef CONFIG_TULIP_NAPI_HW_MITIGATION
365 int mit_on;
366#endif
367 unsigned int full_duplex:1; /* Full-duplex operation requested. */
368 unsigned int full_duplex_lock:1;
369 unsigned int fake_addr:1; /* Multiport board faked address. */
370 unsigned int default_port:4; /* Last dev->if_port value. */
371 unsigned int media2:4; /* Secondary monitored media port. */
372 unsigned int medialock:1; /* Don't sense media type. */
373 unsigned int mediasense:1; /* Media sensing in progress. */
374 unsigned int nway:1, nwayset:1; /* 21143 internal NWay. */
Francois Romieu0bb3cf72006-09-08 11:15:38 -0700375 unsigned int timeout_recovery:1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376 unsigned int csr0; /* CSR0 setting. */
377 unsigned int csr6; /* Current CSR6 control settings. */
378 unsigned char eeprom[EEPROM_SIZE]; /* Serial EEPROM contents. */
379 void (*link_change) (struct net_device * dev, int csr5);
380 u16 sym_advertise, mii_advertise; /* NWay capabilities advertised. */
381 u16 lpar; /* 21143 Link partner ability. */
382 u16 advertising[4];
383 signed char phys[4], mii_cnt; /* MII device addresses. */
384 struct mediatable *mtable;
385 int cur_index; /* Current media index. */
386 int saved_if_port;
387 struct pci_dev *pdev;
388 int ttimer;
389 int susp_rx;
390 unsigned long nir;
391 void __iomem *base_addr;
392 int csr12_shadow;
393 int pad0; /* Used for 8-byte alignment */
Francois Romieu0bb3cf72006-09-08 11:15:38 -0700394 struct work_struct media_work;
David Howellsc4028952006-11-22 14:57:56 +0000395 struct net_device *dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396};
397
398
399struct eeprom_fixup {
400 char *name;
401 unsigned char addr0;
402 unsigned char addr1;
403 unsigned char addr2;
404 u16 newtable[32]; /* Max length below. */
405};
406
407
408/* 21142.c */
409extern u16 t21142_csr14[];
David Howellsc4028952006-11-22 14:57:56 +0000410void t21142_media_task(struct work_struct *work);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411void t21142_start_nway(struct net_device *dev);
412void t21142_lnk_change(struct net_device *dev, int csr5);
413
414
415/* PNIC2.c */
416void pnic2_lnk_change(struct net_device *dev, int csr5);
417void pnic2_timer(unsigned long data);
418void pnic2_start_nway(struct net_device *dev);
419void pnic2_lnk_change(struct net_device *dev, int csr5);
420
421/* eeprom.c */
422void tulip_parse_eeprom(struct net_device *dev);
423int tulip_read_eeprom(struct net_device *dev, int location, int addr_len);
424
425/* interrupt.c */
426extern unsigned int tulip_max_interrupt_work;
427extern int tulip_rx_copybreak;
David Howells7d12e782006-10-05 14:55:46 +0100428irqreturn_t tulip_interrupt(int irq, void *dev_instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429int tulip_refill_rx(struct net_device *dev);
430#ifdef CONFIG_TULIP_NAPI
431int tulip_poll(struct net_device *dev, int *budget);
432#endif
433
434
435/* media.c */
436int tulip_mdio_read(struct net_device *dev, int phy_id, int location);
437void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int value);
438void tulip_select_media(struct net_device *dev, int startup);
439int tulip_check_duplex(struct net_device *dev);
440void tulip_find_mii (struct net_device *dev, int board_idx);
441
442/* pnic.c */
443void pnic_do_nway(struct net_device *dev);
444void pnic_lnk_change(struct net_device *dev, int csr5);
445void pnic_timer(unsigned long data);
446
447/* timer.c */
David Howellsc4028952006-11-22 14:57:56 +0000448void tulip_media_task(struct work_struct *work);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449void mxic_timer(unsigned long data);
450void comet_timer(unsigned long data);
451
452/* tulip_core.c */
453extern int tulip_debug;
454extern const char * const medianame[];
455extern const char tulip_media_cap[];
456extern struct tulip_chip_table tulip_tbl[];
457void oom_timer(unsigned long data);
458extern u8 t21040_csr13[];
459
460static inline void tulip_start_rxtx(struct tulip_private *tp)
461{
462 void __iomem *ioaddr = tp->base_addr;
463 iowrite32(tp->csr6 | RxTx, ioaddr + CSR6);
464 barrier();
465 (void) ioread32(ioaddr + CSR6); /* mmio sync */
466}
467
468static inline void tulip_stop_rxtx(struct tulip_private *tp)
469{
470 void __iomem *ioaddr = tp->base_addr;
471 u32 csr6 = ioread32(ioaddr + CSR6);
472
473 if (csr6 & RxTx) {
474 unsigned i=1300/10;
475 iowrite32(csr6 & ~RxTx, ioaddr + CSR6);
476 barrier();
477 /* wait until in-flight frame completes.
478 * Max time @ 10BT: 1500*8b/10Mbps == 1200us (+ 100us margin)
479 * Typically expect this loop to end in < 50 us on 100BT.
480 */
481 while (--i && (ioread32(ioaddr + CSR5) & (CSR5_TS|CSR5_RS)))
482 udelay(10);
483
484 if (!i)
485 printk(KERN_DEBUG "%s: tulip_stop_rxtx() failed\n",
486 pci_name(tp->pdev));
487 }
488}
489
490static inline void tulip_restart_rxtx(struct tulip_private *tp)
491{
Peer Chenea8f4002005-08-11 15:09:23 -0400492 tulip_stop_rxtx(tp);
493 udelay(5);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494 tulip_start_rxtx(tp);
495}
496
Francois Romieu0bb3cf72006-09-08 11:15:38 -0700497static inline void tulip_tx_timeout_complete(struct tulip_private *tp, void __iomem *ioaddr)
498{
499 /* Stop and restart the chip's Tx processes. */
500 tulip_restart_rxtx(tp);
501 /* Trigger an immediate transmit demand. */
502 iowrite32(0, ioaddr + CSR1);
503
504 tp->stats.tx_errors++;
505}
506
Linus Torvalds1da177e2005-04-16 15:20:36 -0700507#endif /* __NET_TULIP_H__ */