blob: 9d6e50d5c90aad3c5e239d1dfc5e9b238f6fc5b2 [file] [log] [blame]
Kalle Valobdcd8172011-07-18 00:22:30 +03001
2/*
3 * Copyright (c) 2011 Atheros Communications Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Stephen Rothwellc6efe572011-09-28 18:32:34 +100018#include <linux/moduleparam.h>
Sangwook Leef7830202011-10-26 16:28:38 +010019#include <linux/errno.h>
Sam Leffler92ecbff2011-09-07 10:55:16 +030020#include <linux/of.h>
Kalle Valobdcd8172011-07-18 00:22:30 +030021#include <linux/mmc/sdio_func.h>
22#include "core.h"
23#include "cfg80211.h"
24#include "target.h"
25#include "debug.h"
26#include "hif-ops.h"
27
28unsigned int debug_mask;
Kalle Valo003353b2011-09-01 10:14:21 +030029static unsigned int testmode;
Kalle Valo8277de12011-11-03 12:18:31 +020030static bool suspend_cutpower;
Kalle Valobdcd8172011-07-18 00:22:30 +030031
32module_param(debug_mask, uint, 0644);
Kalle Valo003353b2011-09-01 10:14:21 +030033module_param(testmode, uint, 0644);
Kalle Valo8277de12011-11-03 12:18:31 +020034module_param(suspend_cutpower, bool, 0444);
Kalle Valobdcd8172011-07-18 00:22:30 +030035
Kalle Valo856f4b32011-11-14 19:30:29 +020036static const struct ath6kl_hw hw_list[] = {
37 {
Kalle Valo0d0192b2011-11-14 19:31:07 +020038 .id = AR6003_HW_2_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020039 .name = "ar6003 hw 2.0",
Kalle Valo856f4b32011-11-14 19:30:29 +020040 .dataset_patch_addr = 0x57e884,
41 .app_load_addr = 0x543180,
42 .board_ext_data_addr = 0x57e500,
43 .reserved_ram_size = 6912,
44
45 /* hw2.0 needs override address hardcoded */
46 .app_start_override_addr = 0x944C00,
Kalle Valod1a94212011-11-14 19:31:23 +020047
48 .fw_otp = AR6003_HW_2_0_OTP_FILE,
49 .fw = AR6003_HW_2_0_FIRMWARE_FILE,
50 .fw_tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
51 .fw_patch = AR6003_HW_2_0_PATCH_FILE,
52 .fw_api2 = AR6003_HW_2_0_FIRMWARE_2_FILE,
53 .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
54 .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b32011-11-14 19:30:29 +020055 },
56 {
Kalle Valo0d0192b2011-11-14 19:31:07 +020057 .id = AR6003_HW_2_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020058 .name = "ar6003 hw 2.1.1",
Kalle Valo856f4b32011-11-14 19:30:29 +020059 .dataset_patch_addr = 0x57ff74,
60 .app_load_addr = 0x1234,
61 .board_ext_data_addr = 0x542330,
62 .reserved_ram_size = 512,
Kalle Valod1a94212011-11-14 19:31:23 +020063
64 .fw_otp = AR6003_HW_2_1_1_OTP_FILE,
65 .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
66 .fw_tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
67 .fw_patch = AR6003_HW_2_1_1_PATCH_FILE,
68 .fw_api2 = AR6003_HW_2_1_1_FIRMWARE_2_FILE,
69 .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
70 .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b32011-11-14 19:30:29 +020071 },
72 {
Kalle Valo0d0192b2011-11-14 19:31:07 +020073 .id = AR6004_HW_1_0_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020074 .name = "ar6004 hw 1.0",
Kalle Valo856f4b32011-11-14 19:30:29 +020075 .dataset_patch_addr = 0x57e884,
76 .app_load_addr = 0x1234,
77 .board_ext_data_addr = 0x437000,
78 .reserved_ram_size = 19456,
Kalle Valo0d4d72b2011-11-14 19:30:39 +020079 .board_addr = 0x433900,
Kalle Valod1a94212011-11-14 19:31:23 +020080
81 .fw = AR6004_HW_1_0_FIRMWARE_FILE,
82 .fw_api2 = AR6004_HW_1_0_FIRMWARE_2_FILE,
83 .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
84 .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b32011-11-14 19:30:29 +020085 },
86 {
Kalle Valo0d0192b2011-11-14 19:31:07 +020087 .id = AR6004_HW_1_1_VERSION,
Kalle Valo293badf2011-11-14 19:30:54 +020088 .name = "ar6004 hw 1.1",
Kalle Valo856f4b32011-11-14 19:30:29 +020089 .dataset_patch_addr = 0x57e884,
90 .app_load_addr = 0x1234,
91 .board_ext_data_addr = 0x437000,
92 .reserved_ram_size = 11264,
Kalle Valo0d4d72b2011-11-14 19:30:39 +020093 .board_addr = 0x43d400,
Kalle Valod1a94212011-11-14 19:31:23 +020094
95 .fw = AR6004_HW_1_1_FIRMWARE_FILE,
96 .fw_api2 = AR6004_HW_1_1_FIRMWARE_2_FILE,
97 .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
98 .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
Kalle Valo856f4b32011-11-14 19:30:29 +020099 },
100};
101
Kalle Valobdcd8172011-07-18 00:22:30 +0300102/*
103 * Include definitions here that can be used to tune the WLAN module
104 * behavior. Different customers can tune the behavior as per their needs,
105 * here.
106 */
107
108/*
109 * This configuration item enable/disable keepalive support.
110 * Keepalive support: In the absence of any data traffic to AP, null
111 * frames will be sent to the AP at periodic interval, to keep the association
112 * active. This configuration item defines the periodic interval.
113 * Use value of zero to disable keepalive support
114 * Default: 60 seconds
115 */
116#define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
117
118/*
119 * This configuration item sets the value of disconnect timeout
120 * Firmware delays sending the disconnec event to the host for this
121 * timeout after is gets disconnected from the current AP.
122 * If the firmware successly roams within the disconnect timeout
123 * it sends a new connect event
124 */
125#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
126
127#define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
128
Kalle Valobdcd8172011-07-18 00:22:30 +0300129#define ATH6KL_DATA_OFFSET 64
130struct sk_buff *ath6kl_buf_alloc(int size)
131{
132 struct sk_buff *skb;
133 u16 reserved;
134
135 /* Add chacheline space at front and back of buffer */
136 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
Vasanthakumar Thiagarajan1df94a82011-08-17 18:45:10 +0530137 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
Kalle Valobdcd8172011-07-18 00:22:30 +0300138 skb = dev_alloc_skb(size + reserved);
139
140 if (skb)
141 skb_reserve(skb, reserved - L1_CACHE_BYTES);
142 return skb;
143}
144
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530145void ath6kl_init_profile_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300146{
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530147 vif->ssid_len = 0;
148 memset(vif->ssid, 0, sizeof(vif->ssid));
149
150 vif->dot11_auth_mode = OPEN_AUTH;
151 vif->auth_mode = NONE_AUTH;
152 vif->prwise_crypto = NONE_CRYPT;
153 vif->prwise_crypto_len = 0;
154 vif->grp_crypto = NONE_CRYPT;
155 vif->grp_crypto_len = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530156 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajan8c8b65e2011-10-25 19:34:04 +0530157 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
158 memset(vif->bssid, 0, sizeof(vif->bssid));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530159 vif->bss_ch = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300160}
161
Kalle Valobdcd8172011-07-18 00:22:30 +0300162static int ath6kl_set_host_app_area(struct ath6kl *ar)
163{
164 u32 address, data;
165 struct host_app_area host_app_area;
166
167 /* Fetch the address of the host_app_area_s
168 * instance in the host interest area */
169 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
Kevin Fang31024d92011-07-11 17:14:13 +0800170 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300171
Kalle Valoaddb44b2011-09-02 10:32:05 +0300172 if (ath6kl_diag_read32(ar, address, &data))
Kalle Valobdcd8172011-07-18 00:22:30 +0300173 return -EIO;
174
Kevin Fang31024d92011-07-11 17:14:13 +0800175 address = TARG_VTOP(ar->target_type, data);
Kalle Valocbf49a62011-10-05 12:23:17 +0300176 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
Kalle Valoaddb44b2011-09-02 10:32:05 +0300177 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
178 sizeof(struct host_app_area)))
Kalle Valobdcd8172011-07-18 00:22:30 +0300179 return -EIO;
180
181 return 0;
182}
183
184static inline void set_ac2_ep_map(struct ath6kl *ar,
185 u8 ac,
186 enum htc_endpoint_id ep)
187{
188 ar->ac2ep_map[ac] = ep;
189 ar->ep2ac_map[ep] = ac;
190}
191
192/* connect to a service */
193static int ath6kl_connectservice(struct ath6kl *ar,
194 struct htc_service_connect_req *con_req,
195 char *desc)
196{
197 int status;
198 struct htc_service_connect_resp response;
199
200 memset(&response, 0, sizeof(response));
201
Kalle Vaload226ec2011-08-10 09:49:12 +0300202 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
Kalle Valobdcd8172011-07-18 00:22:30 +0300203 if (status) {
204 ath6kl_err("failed to connect to %s service status:%d\n",
205 desc, status);
206 return status;
207 }
208
209 switch (con_req->svc_id) {
210 case WMI_CONTROL_SVC:
211 if (test_bit(WMI_ENABLED, &ar->flag))
212 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
213 ar->ctrl_ep = response.endpoint;
214 break;
215 case WMI_DATA_BE_SVC:
216 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
217 break;
218 case WMI_DATA_BK_SVC:
219 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
220 break;
221 case WMI_DATA_VI_SVC:
222 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
223 break;
224 case WMI_DATA_VO_SVC:
225 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
226 break;
227 default:
228 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
229 return -EINVAL;
230 }
231
232 return 0;
233}
234
235static int ath6kl_init_service_ep(struct ath6kl *ar)
236{
237 struct htc_service_connect_req connect;
238
239 memset(&connect, 0, sizeof(connect));
240
241 /* these fields are the same for all service endpoints */
242 connect.ep_cb.rx = ath6kl_rx;
243 connect.ep_cb.rx_refill = ath6kl_rx_refill;
244 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
245
246 /*
247 * Set the max queue depth so that our ath6kl_tx_queue_full handler
248 * gets called.
249 */
250 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
251 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
252 if (!connect.ep_cb.rx_refill_thresh)
253 connect.ep_cb.rx_refill_thresh++;
254
255 /* connect to control service */
256 connect.svc_id = WMI_CONTROL_SVC;
257 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
258 return -EIO;
259
260 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
261
262 /*
263 * Limit the HTC message size on the send path, although e can
264 * receive A-MSDU frames of 4K, we will only send ethernet-sized
265 * (802.3) frames on the send path.
266 */
267 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
268
269 /*
270 * To reduce the amount of committed memory for larger A_MSDU
271 * frames, use the recv-alloc threshold mechanism for larger
272 * packets.
273 */
274 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
275 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
276
277 /*
278 * For the remaining data services set the connection flag to
279 * reduce dribbling, if configured to do so.
280 */
281 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
282 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
283 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
284
285 connect.svc_id = WMI_DATA_BE_SVC;
286
287 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
288 return -EIO;
289
290 /* connect to back-ground map this to WMI LOW_PRI */
291 connect.svc_id = WMI_DATA_BK_SVC;
292 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
293 return -EIO;
294
295 /* connect to Video service, map this to to HI PRI */
296 connect.svc_id = WMI_DATA_VI_SVC;
297 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
298 return -EIO;
299
300 /*
301 * Connect to VO service, this is currently not mapped to a WMI
302 * priority stream due to historical reasons. WMI originally
303 * defined 3 priorities over 3 mailboxes We can change this when
304 * WMI is reworked so that priorities are not dependent on
305 * mailboxes.
306 */
307 connect.svc_id = WMI_DATA_VO_SVC;
308 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
309 return -EIO;
310
311 return 0;
312}
313
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530314void ath6kl_init_control_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300315{
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530316 ath6kl_init_profile_info(vif);
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530317 vif->def_txkey_index = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530318 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530319 vif->ch_hint = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300320}
321
322/*
323 * Set HTC/Mbox operational parameters, this can only be called when the
324 * target is in the BMI phase.
325 */
326static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
327 u8 htc_ctrl_buf)
328{
329 int status;
330 u32 blk_size;
331
332 blk_size = ar->mbox_info.block_size;
333
334 if (htc_ctrl_buf)
335 blk_size |= ((u32)htc_ctrl_buf) << 16;
336
337 /* set the host interest area for the block size */
338 status = ath6kl_bmi_write(ar,
339 ath6kl_get_hi_item_addr(ar,
340 HI_ITEM(hi_mbox_io_block_sz)),
341 (u8 *)&blk_size,
342 4);
343 if (status) {
344 ath6kl_err("bmi_write_memory for IO block size failed\n");
345 goto out;
346 }
347
348 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
349 blk_size,
350 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
351
352 if (mbox_isr_yield_val) {
353 /* set the host interest area for the mbox ISR yield limit */
354 status = ath6kl_bmi_write(ar,
355 ath6kl_get_hi_item_addr(ar,
356 HI_ITEM(hi_mbox_isr_yield_limit)),
357 (u8 *)&mbox_isr_yield_val,
358 4);
359 if (status) {
360 ath6kl_err("bmi_write_memory for yield limit failed\n");
361 goto out;
362 }
363 }
364
365out:
366 return status;
367}
368
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530369static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
Kalle Valobdcd8172011-07-18 00:22:30 +0300370{
371 int status = 0;
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300372 int ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300373
374 /*
375 * Configure the device for rx dot11 header rules. "0,0" are the
376 * default values. Required if checksum offload is needed. Set
377 * RxMetaVersion to 2.
378 */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530379 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300380 ar->rx_meta_ver, 0, 0)) {
381 ath6kl_err("unable to set the rx frame format\n");
382 status = -EIO;
383 }
384
385 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530386 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
Kalle Valobdcd8172011-07-18 00:22:30 +0300387 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
388 ath6kl_err("unable to set power save fail event policy\n");
389 status = -EIO;
390 }
391
392 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530393 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
Kalle Valobdcd8172011-07-18 00:22:30 +0300394 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
395 ath6kl_err("unable to set barker preamble policy\n");
396 status = -EIO;
397 }
398
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530399 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300400 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
401 ath6kl_err("unable to set keep alive interval\n");
402 status = -EIO;
403 }
404
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530405 if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
Kalle Valobdcd8172011-07-18 00:22:30 +0300406 WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
407 ath6kl_err("unable to set disconnect timeout\n");
408 status = -EIO;
409 }
410
411 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530412 if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
Kalle Valobdcd8172011-07-18 00:22:30 +0300413 ath6kl_err("unable to set txop bursting\n");
414 status = -EIO;
415 }
416
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530417 /*
418 * FIXME: Make sure p2p configurations are not applied to
419 * non-p2p capable interfaces when multivif support is enabled.
420 */
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300421 if (ar->p2p) {
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530422 ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300423 P2P_FLAG_CAPABILITIES_REQ |
424 P2P_FLAG_MACADDR_REQ |
425 P2P_FLAG_HMODEL_REQ);
426 if (ret) {
427 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
428 "capabilities (%d) - assuming P2P not "
429 "supported\n", ret);
430 ar->p2p = 0;
431 }
432 }
433
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530434 /*
435 * FIXME: Make sure p2p configurations are not applied to
436 * non-p2p capable interfaces when multivif support is enabled.
437 */
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300438 if (ar->p2p) {
439 /* Enable Probe Request reporting for P2P */
Vasanthakumar Thiagarajan0ce59442011-10-25 19:34:25 +0530440 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300441 if (ret) {
442 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
443 "Request reporting (%d)\n", ret);
444 }
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300445 }
446
Kalle Valobdcd8172011-07-18 00:22:30 +0300447 return status;
448}
449
450int ath6kl_configure_target(struct ath6kl *ar)
451{
452 u32 param, ram_reserved_size;
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530453 u8 fw_iftype, fw_mode = 0, fw_submode = 0;
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530454 int i;
Kalle Valobdcd8172011-07-18 00:22:30 +0300455
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530456 /*
457 * Note: Even though the firmware interface type is
458 * chosen as BSS_STA for all three interfaces, can
459 * be configured to IBSS/AP as long as the fw submode
460 * remains normal mode (0 - AP, STA and IBSS). But
461 * due to an target assert in firmware only one interface is
462 * configured for now.
463 */
Vasanthakumar Thiagarajandd3751f2011-10-25 19:33:59 +0530464 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
Kalle Valobdcd8172011-07-18 00:22:30 +0300465
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530466 for (i = 0; i < MAX_NUM_VIF; i++)
467 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
468
469 /*
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530470 * By default, submodes :
471 * vif[0] - AP/STA/IBSS
472 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
473 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530474 */
Vasanthakumar Thiagarajan3226f68a2011-10-25 19:34:24 +0530475
476 for (i = 0; i < ar->max_norm_iface; i++)
477 fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
478 (i * HI_OPTION_FW_SUBMODE_BITS);
479
480 for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++)
481 fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
482 (i * HI_OPTION_FW_SUBMODE_BITS);
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530483
484 /*
485 * FIXME: This needs to be removed once the multivif
486 * support is enabled.
487 */
488 if (ar->p2p)
489 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530490
Kalle Valobdcd8172011-07-18 00:22:30 +0300491 param = HTC_PROTOCOL_VERSION;
492 if (ath6kl_bmi_write(ar,
493 ath6kl_get_hi_item_addr(ar,
494 HI_ITEM(hi_app_host_interest)),
495 (u8 *)&param, 4) != 0) {
496 ath6kl_err("bmi_write_memory for htc version failed\n");
497 return -EIO;
498 }
499
500 /* set the firmware mode to STA/IBSS/AP */
501 param = 0;
502
503 if (ath6kl_bmi_read(ar,
504 ath6kl_get_hi_item_addr(ar,
505 HI_ITEM(hi_option_flag)),
506 (u8 *)&param, 4) != 0) {
507 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
508 return -EIO;
509 }
510
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530511 param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT);
512 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
513 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
514
Kalle Valobdcd8172011-07-18 00:22:30 +0300515 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
516 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
517
518 if (ath6kl_bmi_write(ar,
519 ath6kl_get_hi_item_addr(ar,
520 HI_ITEM(hi_option_flag)),
521 (u8 *)&param,
522 4) != 0) {
523 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
524 return -EIO;
525 }
526
527 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
528
529 /*
530 * Hardcode the address use for the extended board data
531 * Ideally this should be pre-allocate by the OS at boot time
532 * But since it is a new feature and board data is loaded
533 * at init time, we have to workaround this from host.
534 * It is difficult to patch the firmware boot code,
535 * but possible in theory.
536 */
537
Kalle Valo991b27e2011-09-07 10:55:17 +0300538 param = ar->hw.board_ext_data_addr;
539 ram_reserved_size = ar->hw.reserved_ram_size;
Kalle Valobdcd8172011-07-18 00:22:30 +0300540
Kalle Valo991b27e2011-09-07 10:55:17 +0300541 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
542 HI_ITEM(hi_board_ext_data)),
543 (u8 *)&param, 4) != 0) {
544 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
545 return -EIO;
546 }
547
548 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
549 HI_ITEM(hi_end_ram_reserve_sz)),
550 (u8 *)&ram_reserved_size, 4) != 0) {
551 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
552 return -EIO;
Kalle Valobdcd8172011-07-18 00:22:30 +0300553 }
554
555 /* set the block size for the target */
556 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
557 /* use default number of control buffers */
558 return -EIO;
559
560 return 0;
561}
562
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530563void ath6kl_core_free(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300564{
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530565 wiphy_free(ar->wiphy);
Kalle Valobdcd8172011-07-18 00:22:30 +0300566}
567
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530568void ath6kl_core_cleanup(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300569{
Kalle Valob2e75692011-10-27 18:48:14 +0300570 ath6kl_hif_power_off(ar);
571
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530572 destroy_workqueue(ar->ath6kl_wq);
Kalle Valobdcd8172011-07-18 00:22:30 +0300573
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530574 if (ar->htc_target)
575 ath6kl_htc_cleanup(ar->htc_target);
576
577 ath6kl_cookie_cleanup(ar);
578
579 ath6kl_cleanup_amsdu_rxbufs(ar);
580
581 ath6kl_bmi_cleanup(ar);
582
583 ath6kl_debug_cleanup(ar);
584
585 kfree(ar->fw_board);
586 kfree(ar->fw_otp);
587 kfree(ar->fw);
588 kfree(ar->fw_patch);
589
590 ath6kl_deinit_ieee80211_hw(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +0300591}
592
593/* firmware upload */
Kalle Valobdcd8172011-07-18 00:22:30 +0300594static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
595 u8 **fw, size_t *fw_len)
596{
597 const struct firmware *fw_entry;
598 int ret;
599
600 ret = request_firmware(&fw_entry, filename, ar->dev);
601 if (ret)
602 return ret;
603
604 *fw_len = fw_entry->size;
605 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
606
607 if (*fw == NULL)
608 ret = -ENOMEM;
609
610 release_firmware(fw_entry);
611
612 return ret;
613}
614
Sam Leffler92ecbff2011-09-07 10:55:16 +0300615#ifdef CONFIG_OF
616static const char *get_target_ver_dir(const struct ath6kl *ar)
617{
618 switch (ar->version.target_ver) {
Kalle Valo0d0192b2011-11-14 19:31:07 +0200619 case AR6003_HW_1_0_VERSION:
Sam Leffler92ecbff2011-09-07 10:55:16 +0300620 return "ath6k/AR6003/hw1.0";
Kalle Valo0d0192b2011-11-14 19:31:07 +0200621 case AR6003_HW_2_0_VERSION:
Sam Leffler92ecbff2011-09-07 10:55:16 +0300622 return "ath6k/AR6003/hw2.0";
Kalle Valo0d0192b2011-11-14 19:31:07 +0200623 case AR6003_HW_2_1_1_VERSION:
Sam Leffler92ecbff2011-09-07 10:55:16 +0300624 return "ath6k/AR6003/hw2.1.1";
625 }
626 ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
627 ar->version.target_ver);
628 return NULL;
629}
630
631/*
632 * Check the device tree for a board-id and use it to construct
633 * the pathname to the firmware file. Used (for now) to find a
634 * fallback to the "bdata.bin" file--typically a symlink to the
635 * appropriate board-specific file.
636 */
637static bool check_device_tree(struct ath6kl *ar)
638{
639 static const char *board_id_prop = "atheros,board-id";
640 struct device_node *node;
641 char board_filename[64];
642 const char *board_id;
643 int ret;
644
645 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
646 board_id = of_get_property(node, board_id_prop, NULL);
647 if (board_id == NULL) {
648 ath6kl_warn("No \"%s\" property on %s node.\n",
649 board_id_prop, node->name);
650 continue;
651 }
652 snprintf(board_filename, sizeof(board_filename),
653 "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
654
655 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
656 &ar->fw_board_len);
657 if (ret) {
658 ath6kl_err("Failed to get DT board file %s: %d\n",
659 board_filename, ret);
660 continue;
661 }
662 return true;
663 }
664 return false;
665}
666#else
667static bool check_device_tree(struct ath6kl *ar)
668{
669 return false;
670}
671#endif /* CONFIG_OF */
672
Kalle Valobdcd8172011-07-18 00:22:30 +0300673static int ath6kl_fetch_board_file(struct ath6kl *ar)
674{
675 const char *filename;
676 int ret;
677
Kalle Valo772c31e2011-09-07 10:55:16 +0300678 if (ar->fw_board != NULL)
679 return 0;
680
Kalle Valod1a94212011-11-14 19:31:23 +0200681 if (WARN_ON(ar->hw.fw_board == NULL))
682 return -EINVAL;
683
684 filename = ar->hw.fw_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300685
686 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
687 &ar->fw_board_len);
688 if (ret == 0) {
689 /* managed to get proper board file */
690 return 0;
691 }
692
Sam Leffler92ecbff2011-09-07 10:55:16 +0300693 if (check_device_tree(ar)) {
694 /* got board file from device tree */
695 return 0;
696 }
697
Kalle Valobdcd8172011-07-18 00:22:30 +0300698 /* there was no proper board file, try to use default instead */
699 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
700 filename, ret);
701
Kalle Valod1a94212011-11-14 19:31:23 +0200702 filename = ar->hw.fw_default_board;
Kalle Valobdcd8172011-07-18 00:22:30 +0300703
704 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
705 &ar->fw_board_len);
706 if (ret) {
707 ath6kl_err("Failed to get default board file %s: %d\n",
708 filename, ret);
709 return ret;
710 }
711
712 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
713 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
714
715 return 0;
716}
717
Kalle Valo772c31e2011-09-07 10:55:16 +0300718static int ath6kl_fetch_otp_file(struct ath6kl *ar)
719{
720 const char *filename;
721 int ret;
722
723 if (ar->fw_otp != NULL)
724 return 0;
725
Kalle Valod1a94212011-11-14 19:31:23 +0200726 if (ar->hw.fw_otp == NULL) {
727 ath6kl_dbg(ATH6KL_DBG_BOOT,
728 "no OTP file configured for this hw\n");
Kalle Valo772c31e2011-09-07 10:55:16 +0300729 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300730 }
731
Kalle Valod1a94212011-11-14 19:31:23 +0200732 filename = ar->hw.fw_otp;
733
Kalle Valo772c31e2011-09-07 10:55:16 +0300734 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
735 &ar->fw_otp_len);
736 if (ret) {
737 ath6kl_err("Failed to get OTP file %s: %d\n",
738 filename, ret);
739 return ret;
740 }
741
742 return 0;
743}
744
745static int ath6kl_fetch_fw_file(struct ath6kl *ar)
746{
747 const char *filename;
748 int ret;
749
750 if (ar->fw != NULL)
751 return 0;
752
753 if (testmode) {
Kalle Valod1a94212011-11-14 19:31:23 +0200754 if (ar->hw.fw_tcmd == NULL) {
755 ath6kl_warn("testmode not supported\n");
Kalle Valo772c31e2011-09-07 10:55:16 +0300756 return -EOPNOTSUPP;
Kalle Valo772c31e2011-09-07 10:55:16 +0300757 }
758
Kalle Valod1a94212011-11-14 19:31:23 +0200759 filename = ar->hw.fw_tcmd;
760
Kalle Valo772c31e2011-09-07 10:55:16 +0300761 set_bit(TESTMODE, &ar->flag);
762
763 goto get_fw;
764 }
765
Kalle Valod1a94212011-11-14 19:31:23 +0200766 if (WARN_ON(ar->hw.fw == NULL))
767 return -EINVAL;
768
769 filename = ar->hw.fw;
Kalle Valo772c31e2011-09-07 10:55:16 +0300770
771get_fw:
772 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
773 if (ret) {
774 ath6kl_err("Failed to get firmware file %s: %d\n",
775 filename, ret);
776 return ret;
777 }
778
779 return 0;
780}
781
782static int ath6kl_fetch_patch_file(struct ath6kl *ar)
783{
784 const char *filename;
785 int ret;
786
Kalle Valod1a94212011-11-14 19:31:23 +0200787 if (ar->fw_patch != NULL)
Kalle Valo772c31e2011-09-07 10:55:16 +0300788 return 0;
Kalle Valo772c31e2011-09-07 10:55:16 +0300789
Kalle Valod1a94212011-11-14 19:31:23 +0200790 if (ar->hw.fw_patch == NULL)
791 return 0;
792
793 filename = ar->hw.fw_patch;
794
795 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
796 &ar->fw_patch_len);
797 if (ret) {
798 ath6kl_err("Failed to get patch file %s: %d\n",
799 filename, ret);
800 return ret;
Kalle Valo772c31e2011-09-07 10:55:16 +0300801 }
802
803 return 0;
804}
805
Kalle Valo50d41232011-09-07 10:55:17 +0300806static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
Kalle Valo772c31e2011-09-07 10:55:16 +0300807{
808 int ret;
809
Kalle Valo772c31e2011-09-07 10:55:16 +0300810 ret = ath6kl_fetch_otp_file(ar);
811 if (ret)
812 return ret;
813
814 ret = ath6kl_fetch_fw_file(ar);
815 if (ret)
816 return ret;
817
818 ret = ath6kl_fetch_patch_file(ar);
819 if (ret)
820 return ret;
821
822 return 0;
823}
Kalle Valobdcd8172011-07-18 00:22:30 +0300824
Kalle Valo50d41232011-09-07 10:55:17 +0300825static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
826{
827 size_t magic_len, len, ie_len;
828 const struct firmware *fw;
829 struct ath6kl_fw_ie *hdr;
830 const char *filename;
831 const u8 *data;
Kalle Valo97e04962011-09-12 13:47:34 +0300832 int ret, ie_id, i, index, bit;
Kalle Valo8a137482011-09-07 10:55:17 +0300833 __le32 *val;
Kalle Valo50d41232011-09-07 10:55:17 +0300834
Kalle Valod1a94212011-11-14 19:31:23 +0200835 if (ar->hw.fw_api2 == NULL)
Kalle Valo50d41232011-09-07 10:55:17 +0300836 return -EOPNOTSUPP;
Kalle Valod1a94212011-11-14 19:31:23 +0200837
838 filename = ar->hw.fw_api2;
Kalle Valo50d41232011-09-07 10:55:17 +0300839
840 ret = request_firmware(&fw, filename, ar->dev);
841 if (ret)
842 return ret;
843
844 data = fw->data;
845 len = fw->size;
846
847 /* magic also includes the null byte, check that as well */
848 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
849
850 if (len < magic_len) {
851 ret = -EINVAL;
852 goto out;
853 }
854
855 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
856 ret = -EINVAL;
857 goto out;
858 }
859
860 len -= magic_len;
861 data += magic_len;
862
863 /* loop elements */
864 while (len > sizeof(struct ath6kl_fw_ie)) {
865 /* hdr is unaligned! */
866 hdr = (struct ath6kl_fw_ie *) data;
867
868 ie_id = le32_to_cpup(&hdr->id);
869 ie_len = le32_to_cpup(&hdr->len);
870
871 len -= sizeof(*hdr);
872 data += sizeof(*hdr);
873
874 if (len < ie_len) {
875 ret = -EINVAL;
876 goto out;
877 }
878
879 switch (ie_id) {
880 case ATH6KL_FW_IE_OTP_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300881 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300882 ie_len);
883
Kalle Valo50d41232011-09-07 10:55:17 +0300884 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
885
886 if (ar->fw_otp == NULL) {
887 ret = -ENOMEM;
888 goto out;
889 }
890
891 ar->fw_otp_len = ie_len;
892 break;
893 case ATH6KL_FW_IE_FW_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300894 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300895 ie_len);
896
Kalle Valo50d41232011-09-07 10:55:17 +0300897 ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
898
899 if (ar->fw == NULL) {
900 ret = -ENOMEM;
901 goto out;
902 }
903
904 ar->fw_len = ie_len;
905 break;
906 case ATH6KL_FW_IE_PATCH_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300907 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300908 ie_len);
909
Kalle Valo50d41232011-09-07 10:55:17 +0300910 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
911
912 if (ar->fw_patch == NULL) {
913 ret = -ENOMEM;
914 goto out;
915 }
916
917 ar->fw_patch_len = ie_len;
918 break;
Kalle Valo8a137482011-09-07 10:55:17 +0300919 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
920 val = (__le32 *) data;
921 ar->hw.reserved_ram_size = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300922
923 ath6kl_dbg(ATH6KL_DBG_BOOT,
924 "found reserved ram size ie 0x%d\n",
925 ar->hw.reserved_ram_size);
Kalle Valo8a137482011-09-07 10:55:17 +0300926 break;
Kalle Valo97e04962011-09-12 13:47:34 +0300927 case ATH6KL_FW_IE_CAPABILITIES:
Kalle Valo6bc36432011-09-27 14:31:11 +0300928 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valoef548622011-10-01 09:43:09 +0300929 "found firmware capabilities ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300930 ie_len);
931
Kalle Valo97e04962011-09-12 13:47:34 +0300932 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
933 index = ALIGN(i, 8) / 8;
934 bit = i % 8;
935
936 if (data[index] & (1 << bit))
937 __set_bit(i, ar->fw_capabilities);
938 }
Kalle Valo6bc36432011-09-27 14:31:11 +0300939
940 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
941 ar->fw_capabilities,
942 sizeof(ar->fw_capabilities));
Kalle Valo97e04962011-09-12 13:47:34 +0300943 break;
Kalle Valo1b4304d2011-09-27 11:05:26 +0300944 case ATH6KL_FW_IE_PATCH_ADDR:
945 if (ie_len != sizeof(*val))
946 break;
947
948 val = (__le32 *) data;
949 ar->hw.dataset_patch_addr = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300950
951 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valo03ef0252011-11-14 19:30:47 +0200952 "found patch address ie 0x%x\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300953 ar->hw.dataset_patch_addr);
Kalle Valo1b4304d2011-09-27 11:05:26 +0300954 break;
Kalle Valo03ef0252011-11-14 19:30:47 +0200955 case ATH6KL_FW_IE_BOARD_ADDR:
956 if (ie_len != sizeof(*val))
957 break;
958
959 val = (__le32 *) data;
960 ar->hw.board_addr = le32_to_cpup(val);
961
962 ath6kl_dbg(ATH6KL_DBG_BOOT,
963 "found board address ie 0x%x\n",
964 ar->hw.board_addr);
965 break;
Kalle Valo50d41232011-09-07 10:55:17 +0300966 default:
Kalle Valo6bc36432011-09-27 14:31:11 +0300967 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
Kalle Valo50d41232011-09-07 10:55:17 +0300968 le32_to_cpup(&hdr->id));
969 break;
970 }
971
972 len -= ie_len;
973 data += ie_len;
974 };
975
976 ret = 0;
977out:
978 release_firmware(fw);
979
980 return ret;
981}
982
983static int ath6kl_fetch_firmwares(struct ath6kl *ar)
984{
985 int ret;
986
987 ret = ath6kl_fetch_board_file(ar);
988 if (ret)
989 return ret;
990
991 ret = ath6kl_fetch_fw_api2(ar);
Kalle Valo6bc36432011-09-27 14:31:11 +0300992 if (ret == 0) {
993 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
Kalle Valo50d41232011-09-07 10:55:17 +0300994 return 0;
Kalle Valo6bc36432011-09-27 14:31:11 +0300995 }
Kalle Valo50d41232011-09-07 10:55:17 +0300996
997 ret = ath6kl_fetch_fw_api1(ar);
998 if (ret)
999 return ret;
1000
Kalle Valo6bc36432011-09-27 14:31:11 +03001001 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
1002
Kalle Valo50d41232011-09-07 10:55:17 +03001003 return 0;
1004}
1005
Kalle Valobdcd8172011-07-18 00:22:30 +03001006static int ath6kl_upload_board_file(struct ath6kl *ar)
1007{
1008 u32 board_address, board_ext_address, param;
Kevin Fang31024d92011-07-11 17:14:13 +08001009 u32 board_data_size, board_ext_data_size;
Kalle Valobdcd8172011-07-18 00:22:30 +03001010 int ret;
1011
Kalle Valo772c31e2011-09-07 10:55:16 +03001012 if (WARN_ON(ar->fw_board == NULL))
1013 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001014
Kevin Fang31024d92011-07-11 17:14:13 +08001015 /*
1016 * Determine where in Target RAM to write Board Data.
1017 * For AR6004, host determine Target RAM address for
1018 * writing board data.
1019 */
Kalle Valo0d4d72b2011-11-14 19:30:39 +02001020 if (ar->hw.board_addr != 0) {
1021 board_address = ar->hw.board_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001022 ath6kl_bmi_write(ar,
1023 ath6kl_get_hi_item_addr(ar,
1024 HI_ITEM(hi_board_data)),
1025 (u8 *) &board_address, 4);
1026 } else {
1027 ath6kl_bmi_read(ar,
1028 ath6kl_get_hi_item_addr(ar,
1029 HI_ITEM(hi_board_data)),
1030 (u8 *) &board_address, 4);
1031 }
1032
Kalle Valobdcd8172011-07-18 00:22:30 +03001033 /* determine where in target ram to write extended board data */
1034 ath6kl_bmi_read(ar,
1035 ath6kl_get_hi_item_addr(ar,
1036 HI_ITEM(hi_board_ext_data)),
1037 (u8 *) &board_ext_address, 4);
1038
Kalle Valo50e27402011-11-11 12:18:06 +02001039 if (ar->target_type == TARGET_TYPE_AR6003 &&
1040 board_ext_address == 0) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001041 ath6kl_err("Failed to get board file target address.\n");
1042 return -EINVAL;
1043 }
1044
Kevin Fang31024d92011-07-11 17:14:13 +08001045 switch (ar->target_type) {
1046 case TARGET_TYPE_AR6003:
1047 board_data_size = AR6003_BOARD_DATA_SZ;
1048 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1049 break;
1050 case TARGET_TYPE_AR6004:
1051 board_data_size = AR6004_BOARD_DATA_SZ;
1052 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1053 break;
1054 default:
1055 WARN_ON(1);
1056 return -EINVAL;
1057 break;
1058 }
1059
Kalle Valo50e27402011-11-11 12:18:06 +02001060 if (board_ext_address &&
1061 ar->fw_board_len == (board_data_size + board_ext_data_size)) {
Kevin Fang31024d92011-07-11 17:14:13 +08001062
Kalle Valobdcd8172011-07-18 00:22:30 +03001063 /* write extended board data */
Kalle Valo6bc36432011-09-27 14:31:11 +03001064 ath6kl_dbg(ATH6KL_DBG_BOOT,
1065 "writing extended board data to 0x%x (%d B)\n",
1066 board_ext_address, board_ext_data_size);
1067
Kalle Valobdcd8172011-07-18 00:22:30 +03001068 ret = ath6kl_bmi_write(ar, board_ext_address,
Kevin Fang31024d92011-07-11 17:14:13 +08001069 ar->fw_board + board_data_size,
1070 board_ext_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001071 if (ret) {
1072 ath6kl_err("Failed to write extended board data: %d\n",
1073 ret);
1074 return ret;
1075 }
1076
1077 /* record that extended board data is initialized */
Kevin Fang31024d92011-07-11 17:14:13 +08001078 param = (board_ext_data_size << 16) | 1;
1079
Kalle Valobdcd8172011-07-18 00:22:30 +03001080 ath6kl_bmi_write(ar,
1081 ath6kl_get_hi_item_addr(ar,
1082 HI_ITEM(hi_board_ext_data_config)),
1083 (unsigned char *) &param, 4);
1084 }
1085
Kevin Fang31024d92011-07-11 17:14:13 +08001086 if (ar->fw_board_len < board_data_size) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001087 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1088 ret = -EINVAL;
1089 return ret;
1090 }
1091
Kalle Valo6bc36432011-09-27 14:31:11 +03001092 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1093 board_address, board_data_size);
1094
Kalle Valobdcd8172011-07-18 00:22:30 +03001095 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
Kevin Fang31024d92011-07-11 17:14:13 +08001096 board_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001097
1098 if (ret) {
1099 ath6kl_err("Board file bmi write failed: %d\n", ret);
1100 return ret;
1101 }
1102
1103 /* record the fact that Board Data IS initialized */
1104 param = 1;
1105 ath6kl_bmi_write(ar,
1106 ath6kl_get_hi_item_addr(ar,
1107 HI_ITEM(hi_board_data_initialized)),
1108 (u8 *)&param, 4);
1109
1110 return ret;
1111}
1112
1113static int ath6kl_upload_otp(struct ath6kl *ar)
1114{
Kalle Valobdcd8172011-07-18 00:22:30 +03001115 u32 address, param;
Kalle Valobef26a72011-10-12 09:58:28 +03001116 bool from_hw = false;
Kalle Valobdcd8172011-07-18 00:22:30 +03001117 int ret;
1118
Kalle Valo50e27402011-11-11 12:18:06 +02001119 if (ar->fw_otp == NULL)
1120 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001121
Kalle Valoa01ac412011-09-07 10:55:17 +03001122 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001123
Kalle Valoef548622011-10-01 09:43:09 +03001124 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
Kalle Valo6bc36432011-09-27 14:31:11 +03001125 ar->fw_otp_len);
1126
Kalle Valobdcd8172011-07-18 00:22:30 +03001127 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1128 ar->fw_otp_len);
1129 if (ret) {
1130 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1131 return ret;
1132 }
1133
Kalle Valo639d0b82011-09-12 12:48:09 +03001134 /* read firmware start address */
1135 ret = ath6kl_bmi_read(ar,
1136 ath6kl_get_hi_item_addr(ar,
1137 HI_ITEM(hi_app_start)),
1138 (u8 *) &address, sizeof(address));
1139
1140 if (ret) {
1141 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1142 return ret;
1143 }
1144
Kalle Valobef26a72011-10-12 09:58:28 +03001145 if (ar->hw.app_start_override_addr == 0) {
1146 ar->hw.app_start_override_addr = address;
1147 from_hw = true;
1148 }
Kalle Valo639d0b82011-09-12 12:48:09 +03001149
Kalle Valobef26a72011-10-12 09:58:28 +03001150 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1151 from_hw ? " (from hw)" : "",
Kalle Valo6bc36432011-09-27 14:31:11 +03001152 ar->hw.app_start_override_addr);
1153
Kalle Valobdcd8172011-07-18 00:22:30 +03001154 /* execute the OTP code */
Kalle Valobef26a72011-10-12 09:58:28 +03001155 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1156 ar->hw.app_start_override_addr);
Kalle Valobdcd8172011-07-18 00:22:30 +03001157 param = 0;
Kalle Valobef26a72011-10-12 09:58:28 +03001158 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
Kalle Valobdcd8172011-07-18 00:22:30 +03001159
1160 return ret;
1161}
1162
1163static int ath6kl_upload_firmware(struct ath6kl *ar)
1164{
Kalle Valobdcd8172011-07-18 00:22:30 +03001165 u32 address;
1166 int ret;
1167
Kalle Valo772c31e2011-09-07 10:55:16 +03001168 if (WARN_ON(ar->fw == NULL))
Kalle Valo50e27402011-11-11 12:18:06 +02001169 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001170
Kalle Valoa01ac412011-09-07 10:55:17 +03001171 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001172
Kalle Valoef548622011-10-01 09:43:09 +03001173 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001174 address, ar->fw_len);
1175
Kalle Valobdcd8172011-07-18 00:22:30 +03001176 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1177
1178 if (ret) {
1179 ath6kl_err("Failed to write firmware: %d\n", ret);
1180 return ret;
1181 }
1182
Kevin Fang31024d92011-07-11 17:14:13 +08001183 /*
1184 * Set starting address for firmware
1185 * Don't need to setup app_start override addr on AR6004
1186 */
1187 if (ar->target_type != TARGET_TYPE_AR6004) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001188 address = ar->hw.app_start_override_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001189 ath6kl_bmi_set_app_start(ar, address);
1190 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001191 return ret;
1192}
1193
1194static int ath6kl_upload_patch(struct ath6kl *ar)
1195{
Kalle Valobdcd8172011-07-18 00:22:30 +03001196 u32 address, param;
1197 int ret;
1198
Kalle Valo50e27402011-11-11 12:18:06 +02001199 if (ar->fw_patch == NULL)
1200 return 0;
Kalle Valobdcd8172011-07-18 00:22:30 +03001201
Kalle Valoa01ac412011-09-07 10:55:17 +03001202 address = ar->hw.dataset_patch_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001203
Kalle Valoef548622011-10-01 09:43:09 +03001204 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001205 address, ar->fw_patch_len);
1206
Kalle Valobdcd8172011-07-18 00:22:30 +03001207 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1208 if (ret) {
1209 ath6kl_err("Failed to write patch file: %d\n", ret);
1210 return ret;
1211 }
1212
1213 param = address;
1214 ath6kl_bmi_write(ar,
1215 ath6kl_get_hi_item_addr(ar,
1216 HI_ITEM(hi_dset_list_head)),
1217 (unsigned char *) &param, 4);
1218
1219 return 0;
1220}
1221
1222static int ath6kl_init_upload(struct ath6kl *ar)
1223{
1224 u32 param, options, sleep, address;
1225 int status = 0;
1226
Kevin Fang31024d92011-07-11 17:14:13 +08001227 if (ar->target_type != TARGET_TYPE_AR6003 &&
1228 ar->target_type != TARGET_TYPE_AR6004)
Kalle Valobdcd8172011-07-18 00:22:30 +03001229 return -EINVAL;
1230
1231 /* temporarily disable system sleep */
1232 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1233 status = ath6kl_bmi_reg_read(ar, address, &param);
1234 if (status)
1235 return status;
1236
1237 options = param;
1238
1239 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1240 status = ath6kl_bmi_reg_write(ar, address, param);
1241 if (status)
1242 return status;
1243
1244 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1245 status = ath6kl_bmi_reg_read(ar, address, &param);
1246 if (status)
1247 return status;
1248
1249 sleep = param;
1250
1251 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1252 status = ath6kl_bmi_reg_write(ar, address, param);
1253 if (status)
1254 return status;
1255
1256 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1257 options, sleep);
1258
1259 /* program analog PLL register */
Kevin Fang31024d92011-07-11 17:14:13 +08001260 /* no need to control 40/44MHz clock on AR6004 */
1261 if (ar->target_type != TARGET_TYPE_AR6004) {
1262 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1263 0xF9104001);
Kalle Valobdcd8172011-07-18 00:22:30 +03001264
Kevin Fang31024d92011-07-11 17:14:13 +08001265 if (status)
1266 return status;
Kalle Valobdcd8172011-07-18 00:22:30 +03001267
Kevin Fang31024d92011-07-11 17:14:13 +08001268 /* Run at 80/88MHz by default */
1269 param = SM(CPU_CLOCK_STANDARD, 1);
1270
1271 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1272 status = ath6kl_bmi_reg_write(ar, address, param);
1273 if (status)
1274 return status;
1275 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001276
1277 param = 0;
1278 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1279 param = SM(LPO_CAL_ENABLE, 1);
1280 status = ath6kl_bmi_reg_write(ar, address, param);
1281 if (status)
1282 return status;
1283
1284 /* WAR to avoid SDIO CRC err */
Kalle Valo0d0192b2011-11-14 19:31:07 +02001285 if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001286 ath6kl_err("temporary war to avoid sdio crc error\n");
1287
1288 param = 0x20;
1289
1290 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1291 status = ath6kl_bmi_reg_write(ar, address, param);
1292 if (status)
1293 return status;
1294
1295 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1296 status = ath6kl_bmi_reg_write(ar, address, param);
1297 if (status)
1298 return status;
1299
1300 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1301 status = ath6kl_bmi_reg_write(ar, address, param);
1302 if (status)
1303 return status;
1304
1305 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1306 status = ath6kl_bmi_reg_write(ar, address, param);
1307 if (status)
1308 return status;
1309 }
1310
1311 /* write EEPROM data to Target RAM */
1312 status = ath6kl_upload_board_file(ar);
1313 if (status)
1314 return status;
1315
1316 /* transfer One time Programmable data */
1317 status = ath6kl_upload_otp(ar);
1318 if (status)
1319 return status;
1320
1321 /* Download Target firmware */
1322 status = ath6kl_upload_firmware(ar);
1323 if (status)
1324 return status;
1325
1326 status = ath6kl_upload_patch(ar);
1327 if (status)
1328 return status;
1329
1330 /* Restore system sleep */
1331 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1332 status = ath6kl_bmi_reg_write(ar, address, sleep);
1333 if (status)
1334 return status;
1335
1336 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1337 param = options | 0x20;
1338 status = ath6kl_bmi_reg_write(ar, address, param);
1339 if (status)
1340 return status;
1341
1342 /* Configure GPIO AR6003 UART */
1343 param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
1344 status = ath6kl_bmi_write(ar,
1345 ath6kl_get_hi_item_addr(ar,
1346 HI_ITEM(hi_dbg_uart_txpin)),
1347 (u8 *)&param, 4);
1348
1349 return status;
1350}
1351
Kalle Valoa01ac412011-09-07 10:55:17 +03001352static int ath6kl_init_hw_params(struct ath6kl *ar)
1353{
Kalle Valo856f4b32011-11-14 19:30:29 +02001354 const struct ath6kl_hw *hw;
1355 int i;
Kalle Valobef26a72011-10-12 09:58:28 +03001356
Kalle Valo856f4b32011-11-14 19:30:29 +02001357 for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1358 hw = &hw_list[i];
Kalle Valobef26a72011-10-12 09:58:28 +03001359
Kalle Valo856f4b32011-11-14 19:30:29 +02001360 if (hw->id == ar->version.target_ver)
1361 break;
1362 }
1363
1364 if (i == ARRAY_SIZE(hw_list)) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001365 ath6kl_err("Unsupported hardware version: 0x%x\n",
1366 ar->version.target_ver);
1367 return -EINVAL;
1368 }
1369
Kalle Valo856f4b32011-11-14 19:30:29 +02001370 ar->hw = *hw;
1371
Kalle Valo6bc36432011-09-27 14:31:11 +03001372 ath6kl_dbg(ATH6KL_DBG_BOOT,
1373 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1374 ar->version.target_ver, ar->target_type,
1375 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1376 ath6kl_dbg(ATH6KL_DBG_BOOT,
1377 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1378 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1379 ar->hw.reserved_ram_size);
1380
Kalle Valoa01ac412011-09-07 10:55:17 +03001381 return 0;
1382}
1383
Kalle Valo293badf2011-11-14 19:30:54 +02001384static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1385{
1386 switch (type) {
1387 case ATH6KL_HIF_TYPE_SDIO:
1388 return "sdio";
1389 case ATH6KL_HIF_TYPE_USB:
1390 return "usb";
1391 }
1392
1393 return NULL;
1394}
1395
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001396int ath6kl_init_hw_start(struct ath6kl *ar)
Kalle Valo20459ee2011-10-27 18:48:37 +03001397{
1398 long timeleft;
1399 int ret, i;
1400
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001401 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1402
Kalle Valo20459ee2011-10-27 18:48:37 +03001403 ret = ath6kl_hif_power_on(ar);
1404 if (ret)
1405 return ret;
1406
1407 ret = ath6kl_configure_target(ar);
1408 if (ret)
1409 goto err_power_off;
1410
1411 ret = ath6kl_init_upload(ar);
1412 if (ret)
1413 goto err_power_off;
1414
1415 /* Do we need to finish the BMI phase */
1416 /* FIXME: return error from ath6kl_bmi_done() */
1417 if (ath6kl_bmi_done(ar)) {
1418 ret = -EIO;
1419 goto err_power_off;
1420 }
1421
1422 /*
1423 * The reason we have to wait for the target here is that the
1424 * driver layer has to init BMI in order to set the host block
1425 * size.
1426 */
1427 if (ath6kl_htc_wait_target(ar->htc_target)) {
1428 ret = -EIO;
1429 goto err_power_off;
1430 }
1431
1432 if (ath6kl_init_service_ep(ar)) {
1433 ret = -EIO;
1434 goto err_cleanup_scatter;
1435 }
1436
1437 /* setup credit distribution */
1438 ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
1439
1440 /* start HTC */
1441 ret = ath6kl_htc_start(ar->htc_target);
1442 if (ret) {
1443 /* FIXME: call this */
1444 ath6kl_cookie_cleanup(ar);
1445 goto err_cleanup_scatter;
1446 }
1447
1448 /* Wait for Wmi event to be ready */
1449 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1450 test_bit(WMI_READY,
1451 &ar->flag),
1452 WMI_TIMEOUT);
1453
1454 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1455
Kalle Valo293badf2011-11-14 19:30:54 +02001456
1457 if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1458 ath6kl_info("%s %s fw %s%s\n",
1459 ar->hw.name,
1460 ath6kl_init_get_hif_name(ar->hif_type),
1461 ar->wiphy->fw_version,
1462 test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1463 }
1464
Kalle Valo20459ee2011-10-27 18:48:37 +03001465 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1466 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1467 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1468 ret = -EIO;
1469 goto err_htc_stop;
1470 }
1471
1472 if (!timeleft || signal_pending(current)) {
1473 ath6kl_err("wmi is not ready or wait was interrupted\n");
1474 ret = -EIO;
1475 goto err_htc_stop;
1476 }
1477
1478 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1479
1480 /* communicate the wmi protocol verision to the target */
1481 /* FIXME: return error */
1482 if ((ath6kl_set_host_app_area(ar)) != 0)
1483 ath6kl_err("unable to set the host app area\n");
1484
1485 for (i = 0; i < MAX_NUM_VIF; i++) {
1486 ret = ath6kl_target_config_wlan_params(ar, i);
1487 if (ret)
1488 goto err_htc_stop;
1489 }
1490
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001491 ar->state = ATH6KL_STATE_ON;
1492
Kalle Valo20459ee2011-10-27 18:48:37 +03001493 return 0;
1494
1495err_htc_stop:
1496 ath6kl_htc_stop(ar->htc_target);
1497err_cleanup_scatter:
1498 ath6kl_hif_cleanup_scatter(ar);
1499err_power_off:
1500 ath6kl_hif_power_off(ar);
1501
1502 return ret;
1503}
1504
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001505int ath6kl_init_hw_stop(struct ath6kl *ar)
1506{
1507 int ret;
1508
1509 ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1510
1511 ath6kl_htc_stop(ar->htc_target);
1512
1513 ath6kl_hif_stop(ar);
1514
1515 ath6kl_bmi_reset(ar);
1516
1517 ret = ath6kl_hif_power_off(ar);
1518 if (ret)
1519 ath6kl_warn("failed to power off hif: %d\n", ret);
1520
Kalle Valo76a9fbe2011-11-01 08:44:28 +02001521 ar->state = ATH6KL_STATE_OFF;
1522
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001523 return 0;
1524}
1525
Kalle Valobdcd8172011-07-18 00:22:30 +03001526int ath6kl_core_init(struct ath6kl *ar)
1527{
Kalle Valobdcd8172011-07-18 00:22:30 +03001528 struct ath6kl_bmi_target_info targ_info;
Kalle Valo61448a92011-10-27 18:48:29 +03001529 struct net_device *ndev;
Kalle Valo20459ee2011-10-27 18:48:37 +03001530 int ret = 0, i;
Kalle Valobdcd8172011-07-18 00:22:30 +03001531
1532 ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
1533 if (!ar->ath6kl_wq)
1534 return -ENOMEM;
1535
1536 ret = ath6kl_bmi_init(ar);
1537 if (ret)
1538 goto err_wq;
1539
Kalle Valo20459ee2011-10-27 18:48:37 +03001540 /*
1541 * Turn on power to get hardware (target) version and leave power
1542 * on delibrately as we will boot the hardware anyway within few
1543 * seconds.
1544 */
Kalle Valob2e75692011-10-27 18:48:14 +03001545 ret = ath6kl_hif_power_on(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001546 if (ret)
1547 goto err_bmi_cleanup;
1548
Kalle Valob2e75692011-10-27 18:48:14 +03001549 ret = ath6kl_bmi_get_target_info(ar, &targ_info);
1550 if (ret)
1551 goto err_power_off;
1552
Kalle Valobdcd8172011-07-18 00:22:30 +03001553 ar->version.target_ver = le32_to_cpu(targ_info.version);
1554 ar->target_type = le32_to_cpu(targ_info.type);
Vasanthakumar Thiagarajanbe98e3a2011-10-25 19:33:57 +05301555 ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
Kalle Valobdcd8172011-07-18 00:22:30 +03001556
Kalle Valoa01ac412011-09-07 10:55:17 +03001557 ret = ath6kl_init_hw_params(ar);
1558 if (ret)
Kalle Valob2e75692011-10-27 18:48:14 +03001559 goto err_power_off;
Kalle Valoa01ac412011-09-07 10:55:17 +03001560
Kalle Vaload226ec2011-08-10 09:49:12 +03001561 ar->htc_target = ath6kl_htc_create(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001562
1563 if (!ar->htc_target) {
1564 ret = -ENOMEM;
Kalle Valob2e75692011-10-27 18:48:14 +03001565 goto err_power_off;
Kalle Valobdcd8172011-07-18 00:22:30 +03001566 }
1567
Kalle Valo772c31e2011-09-07 10:55:16 +03001568 ret = ath6kl_fetch_firmwares(ar);
1569 if (ret)
1570 goto err_htc_cleanup;
1571
Kalle Valo61448a92011-10-27 18:48:29 +03001572 /* FIXME: we should free all firmwares in the error cases below */
1573
Kalle Valo61448a92011-10-27 18:48:29 +03001574 /* Indicate that WMI is enabled (although not ready yet) */
1575 set_bit(WMI_ENABLED, &ar->flag);
1576 ar->wmi = ath6kl_wmi_init(ar);
1577 if (!ar->wmi) {
1578 ath6kl_err("failed to initialize wmi\n");
1579 ret = -EIO;
1580 goto err_htc_cleanup;
1581 }
1582
1583 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
1584
1585 ret = ath6kl_register_ieee80211_hw(ar);
1586 if (ret)
1587 goto err_node_cleanup;
1588
1589 ret = ath6kl_debug_init(ar);
1590 if (ret) {
1591 wiphy_unregister(ar->wiphy);
1592 goto err_node_cleanup;
1593 }
1594
1595 for (i = 0; i < MAX_NUM_VIF; i++)
1596 ar->avail_idx_map |= BIT(i);
1597
1598 rtnl_lock();
1599
1600 /* Add an initial station interface */
1601 ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
1602 INFRA_NETWORK);
1603
1604 rtnl_unlock();
1605
1606 if (!ndev) {
1607 ath6kl_err("Failed to instantiate a network device\n");
1608 ret = -ENOMEM;
1609 wiphy_unregister(ar->wiphy);
1610 goto err_debug_init;
1611 }
1612
1613
1614 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
1615 __func__, ndev->name, ndev, ar);
1616
Kalle Valo61448a92011-10-27 18:48:29 +03001617 /* setup access class priority mappings */
1618 ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
1619 ar->ac_stream_pri_map[WMM_AC_BE] = 1;
1620 ar->ac_stream_pri_map[WMM_AC_VI] = 2;
1621 ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
1622
1623 /* give our connected endpoints some buffers */
1624 ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
1625 ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
1626
1627 /* allocate some buffers that handle larger AMSDU frames */
1628 ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
1629
Kalle Valo61448a92011-10-27 18:48:29 +03001630 ath6kl_cookie_init(ar);
1631
Kalle Valo61448a92011-10-27 18:48:29 +03001632 ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
1633 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
1634
Kalle Valo8277de12011-11-03 12:18:31 +02001635 if (suspend_cutpower)
1636 ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
1637
Kalle Valo61448a92011-10-27 18:48:29 +03001638 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
1639 WIPHY_FLAG_HAVE_AP_SME;
1640
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001641 set_bit(FIRST_BOOT, &ar->flag);
1642
1643 ret = ath6kl_init_hw_start(ar);
Kalle Valo20459ee2011-10-27 18:48:37 +03001644 if (ret) {
Kalle Valo5fe4dff2011-10-30 21:16:15 +02001645 ath6kl_err("Failed to start hardware: %d\n", ret);
Kalle Valo20459ee2011-10-27 18:48:37 +03001646 goto err_rxbuf_cleanup;
Kalle Valo61448a92011-10-27 18:48:29 +03001647 }
1648
1649 /*
1650 * Set mac address which is received in ready event
1651 * FIXME: Move to ath6kl_interface_add()
1652 */
1653 memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
Kalle Valobdcd8172011-07-18 00:22:30 +03001654
Kalle Valobdcd8172011-07-18 00:22:30 +03001655 return ret;
1656
Kalle Valo61448a92011-10-27 18:48:29 +03001657err_rxbuf_cleanup:
1658 ath6kl_htc_flush_rx_buf(ar->htc_target);
1659 ath6kl_cleanup_amsdu_rxbufs(ar);
Kalle Valo61448a92011-10-27 18:48:29 +03001660 rtnl_lock();
1661 ath6kl_deinit_if_data(netdev_priv(ndev));
1662 rtnl_unlock();
1663 wiphy_unregister(ar->wiphy);
1664err_debug_init:
1665 ath6kl_debug_cleanup(ar);
1666err_node_cleanup:
1667 ath6kl_wmi_shutdown(ar->wmi);
1668 clear_bit(WMI_ENABLED, &ar->flag);
1669 ar->wmi = NULL;
Kalle Valobdcd8172011-07-18 00:22:30 +03001670err_htc_cleanup:
Kalle Vaload226ec2011-08-10 09:49:12 +03001671 ath6kl_htc_cleanup(ar->htc_target);
Kalle Valob2e75692011-10-27 18:48:14 +03001672err_power_off:
1673 ath6kl_hif_power_off(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001674err_bmi_cleanup:
1675 ath6kl_bmi_cleanup(ar);
1676err_wq:
1677 destroy_workqueue(ar->ath6kl_wq);
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301678
Kalle Valobdcd8172011-07-18 00:22:30 +03001679 return ret;
1680}
1681
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301682void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301683{
1684 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1685 bool discon_issued;
1686
1687 netif_stop_queue(vif->ndev);
1688
1689 clear_bit(WLAN_ENABLED, &vif->flags);
1690
1691 if (wmi_ready) {
1692 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1693 test_bit(CONNECT_PEND, &vif->flags);
1694 ath6kl_disconnect(vif);
1695 del_timer(&vif->disconnect_timer);
1696
1697 if (discon_issued)
1698 ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1699 (vif->nw_type & AP_NETWORK) ?
1700 bcast_mac : vif->bssid,
1701 0, NULL, 0);
1702 }
1703
1704 if (vif->scan_req) {
1705 cfg80211_scan_done(vif->scan_req, true);
1706 vif->scan_req = NULL;
1707 }
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301708}
1709
Kalle Valobdcd8172011-07-18 00:22:30 +03001710void ath6kl_stop_txrx(struct ath6kl *ar)
1711{
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301712 struct ath6kl_vif *vif, *tmp_vif;
Kalle Valobdcd8172011-07-18 00:22:30 +03001713
1714 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1715
1716 if (down_interruptible(&ar->sem)) {
1717 ath6kl_err("down_interruptible failed\n");
1718 return;
1719 }
1720
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301721 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301722 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1723 list_del(&vif->list);
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301724 spin_unlock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301725 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301726 rtnl_lock();
1727 ath6kl_deinit_if_data(vif);
1728 rtnl_unlock();
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301729 spin_lock_bh(&ar->list_lock);
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301730 }
Vasanthakumar Thiagarajan11f6e402011-11-01 16:38:50 +05301731 spin_unlock_bh(&ar->list_lock);
Kalle Valobdcd8172011-07-18 00:22:30 +03001732
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301733 clear_bit(WMI_READY, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001734
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301735 /*
1736 * After wmi_shudown all WMI events will be dropped. We
1737 * need to cleanup the buffers allocated in AP mode and
1738 * give disconnect notification to stack, which usually
1739 * happens in the disconnect_event. Simulate the disconnect
1740 * event by calling the function directly. Sometimes
1741 * disconnect_event will be received when the debug logs
1742 * are collected.
1743 */
1744 ath6kl_wmi_shutdown(ar->wmi);
Kalle Valobdcd8172011-07-18 00:22:30 +03001745
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301746 clear_bit(WMI_ENABLED, &ar->flag);
1747 if (ar->htc_target) {
1748 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1749 ath6kl_htc_stop(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001750 }
1751
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301752 /*
1753 * Try to reset the device if we can. The driver may have been
1754 * configure NOT to reset the target during a debug session.
1755 */
1756 ath6kl_dbg(ATH6KL_DBG_TRC,
1757 "attempting to reset target on instance destroy\n");
1758 ath6kl_reset_device(ar, ar->target_type, true, true);
Kalle Valobdcd8172011-07-18 00:22:30 +03001759
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301760 clear_bit(WLAN_ENABLED, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001761}