blob: 89700141f87e0d41b462ce6881a9f0a775d98549 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* $Id: serial.c,v 1.25 2004/09/29 10:33:49 starvik Exp $
2 *
3 * Serial port driver for the ETRAX 100LX chip
4 *
5 * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Axis Communications AB
6 *
7 * Many, many authors. Based once upon a time on serial.c for 16x50.
8 *
9 * $Log: serial.c,v $
10 * Revision 1.25 2004/09/29 10:33:49 starvik
11 * Resolved a dealock when printing debug from kernel.
12 *
13 * Revision 1.24 2004/08/27 23:25:59 johana
14 * rs_set_termios() must call change_speed() if c_iflag has changed or
15 * automatic XOFF handling will be enabled and transmitter will stop
16 * if 0x13 is received.
17 *
18 * Revision 1.23 2004/08/24 06:57:13 starvik
19 * More whitespace cleanup
20 *
21 * Revision 1.22 2004/08/24 06:12:20 starvik
22 * Whitespace cleanup
23 *
24 * Revision 1.20 2004/05/24 12:00:20 starvik
25 * Big merge of stuff from Linux 2.4 (e.g. manual mode for the serial port).
26 *
27 * Revision 1.19 2004/05/17 13:12:15 starvik
28 * Kernel console hook
29 * Big merge from Linux 2.4 still pending.
30 *
31 * Revision 1.18 2003/10/28 07:18:30 starvik
32 * Compiles with debug info
33 *
34 * Revision 1.17 2003/07/04 08:27:37 starvik
35 * Merge of Linux 2.5.74
36 *
37 * Revision 1.16 2003/06/13 10:05:19 johana
38 * Help the user to avoid trouble by:
39 * Forcing mixed mode for status/control lines if not all pins are used.
40 *
41 * Revision 1.15 2003/06/13 09:43:01 johana
42 * Merged in the following changes from os/linux/arch/cris/drivers/serial.c
43 * + some minor changes to reduce diff.
44 *
45 * Revision 1.49 2003/05/30 11:31:54 johana
46 * Merged in change-branch--serial9bit that adds CMSPAR support for sticky
47 * parity (mark/space)
48 *
49 * Revision 1.48 2003/05/30 11:03:57 johana
50 * Implemented rs_send_xchar() by disabling the DMA and writing manually.
51 * Added e100_disable_txdma_channel() and e100_enable_txdma_channel().
52 * Fixed rs_throttle() and rs_unthrottle() to properly call rs_send_xchar
53 * instead of setting info->x_char and check the CRTSCTS flag before
54 * controlling the rts pin.
55 *
56 * Revision 1.14 2003/04/09 08:12:44 pkj
57 * Corrected typo changes made upstream.
58 *
59 * Revision 1.13 2003/04/09 05:20:47 starvik
60 * Merge of Linux 2.5.67
61 *
62 * Revision 1.11 2003/01/22 06:48:37 starvik
63 * Fixed warnings issued by GCC 3.2.1
64 *
65 * Revision 1.9 2002/12/13 09:07:47 starvik
66 * Alert user that RX_TIMEOUT_TICKS==0 doesn't work
67 *
68 * Revision 1.8 2002/12/11 13:13:57 starvik
69 * Added arch/ to v10 specific includes
70 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
71 *
72 * Revision 1.7 2002/12/06 07:13:57 starvik
73 * Corrected work queue stuff
74 * Removed CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
75 *
76 * Revision 1.6 2002/11/21 07:17:46 starvik
77 * Change static inline to extern inline where otherwise outlined with gcc-3.2
78 *
79 * Revision 1.5 2002/11/14 15:59:49 starvik
80 * Linux 2.5 port of the latest serial driver from 2.4. The work queue stuff
81 * probably doesn't work yet.
82 *
83 * Revision 1.42 2002/11/05 09:08:47 johana
84 * Better implementation of rs_stop() and rs_start() that uses the XOFF
85 * register to start/stop transmission.
86 * change_speed() also initilises XOFF register correctly so that
87 * auto_xoff is enabled when IXON flag is set by user.
88 * This gives fast XOFF response times.
89 *
90 * Revision 1.41 2002/11/04 18:40:57 johana
91 * Implemented rs_stop() and rs_start().
92 * Simple tests using hwtestserial indicates that this should be enough
93 * to make it work.
94 *
95 * Revision 1.40 2002/10/14 05:33:18 starvik
96 * RS-485 uses fast timers even if SERIAL_FAST_TIMER is disabled
97 *
98 * Revision 1.39 2002/09/30 21:00:57 johana
99 * Support for CONFIG_ETRAX_SERx_DTR_RI_DSR_CD_MIXED where the status and
100 * control pins can be mixed between PA and PB.
101 * If no serial port uses MIXED old solution is used
102 * (saves a few bytes and cycles).
103 * control_pins struct uses masks instead of bit numbers.
104 * Corrected dummy values and polarity in line_info() so
105 * /proc/tty/driver/serial is now correct.
106 * (the E100_xxx_GET() macros is really active low - perhaps not obvious)
107 *
108 * Revision 1.38 2002/08/23 11:01:36 starvik
109 * Check that serial port is enabled in all interrupt handlers to avoid
110 * restarts of DMA channels not assigned to serial ports
111 *
112 * Revision 1.37 2002/08/13 13:02:37 bjornw
113 * Removed some warnings because of unused code
114 *
115 * Revision 1.36 2002/08/08 12:50:01 starvik
116 * Serial interrupt is shared with synchronous serial port driver
117 *
118 * Revision 1.35 2002/06/03 10:40:49 starvik
119 * Increased RS-485 RTS toggle timer to 2 characters
120 *
121 * Revision 1.34 2002/05/28 18:59:36 johana
122 * Whitespace and comment fixing to be more like etrax100ser.c 1.71.
123 *
124 * Revision 1.33 2002/05/28 17:55:43 johana
125 * RS-485 uses FAST_TIMER if enabled, and starts a short (one char time)
126 * timer from tranismit_chars (interrupt context).
127 * The timer toggles RTS in interrupt context when expired giving minimum
128 * latencies.
129 *
130 * Revision 1.32 2002/05/22 13:58:00 johana
131 * Renamed rs_write() to raw_write() and made it inline.
132 * New rs_write() handles RS-485 if configured and enabled
133 * (moved code from e100_write_rs485()).
134 * RS-485 ioctl's uses copy_from_user() instead of verify_area().
135 *
136 * Revision 1.31 2002/04/22 11:20:03 johana
137 * Updated copyright years.
138 *
139 * Revision 1.30 2002/04/22 09:39:12 johana
140 * RS-485 support compiles.
141 *
142 * Revision 1.29 2002/01/14 16:10:01 pkj
143 * Allocate the receive buffers dynamically. The static 4kB buffer was
144 * too small for the peaks. This means that we can get rid of the extra
145 * buffer and the copying to it. It also means we require less memory
146 * under normal operations, but can use more when needed (there is a
147 * cap at 64kB for safety reasons). If there is no memory available
148 * we panic(), and die a horrible death...
149 *
150 * Revision 1.28 2001/12/18 15:04:53 johana
151 * Cleaned up write_rs485() - now it works correctly without padding extra
152 * char.
153 * Added sane default initialisation of rs485.
154 * Added #ifdef around dummy variables.
155 *
156 * Revision 1.27 2001/11/29 17:00:41 pkj
157 * 2kB seems to be too small a buffer when using 921600 bps,
158 * so increase it to 4kB (this was already done for the elinux
159 * version of the serial driver).
160 *
161 * Revision 1.26 2001/11/19 14:20:41 pkj
162 * Minor changes to comments and unused code.
163 *
164 * Revision 1.25 2001/11/12 20:03:43 pkj
165 * Fixed compiler warnings.
166 *
167 * Revision 1.24 2001/11/12 15:10:05 pkj
168 * Total redesign of the receiving part of the serial driver.
169 * Uses eight chained descriptors to write to a 4kB buffer.
170 * This data is then serialised into a 2kB buffer. From there it
171 * is copied into the TTY's flip buffers when they become available.
172 * A lot of copying, and the sizes of the buffers might need to be
173 * tweaked, but all in all it should work better than the previous
174 * version, without the need to modify the TTY code in any way.
175 * Also note that erroneous bytes are now correctly marked in the
176 * flag buffers (instead of always marking the first byte).
177 *
178 * Revision 1.23 2001/10/30 17:53:26 pkj
179 * * Set info->uses_dma to 0 when a port is closed.
180 * * Mark the timer1 interrupt as a fast one (SA_INTERRUPT).
181 * * Call start_flush_timer() in start_receive() if
182 * CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST is defined.
183 *
184 * Revision 1.22 2001/10/30 17:44:03 pkj
185 * Use %lu for received and transmitted counters in line_info().
186 *
187 * Revision 1.21 2001/10/30 17:40:34 pkj
188 * Clean-up. The only change to functionality is that
189 * CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS(=5) is used instead of
190 * MAX_FLUSH_TIME(=8).
191 *
192 * Revision 1.20 2001/10/30 15:24:49 johana
193 * Added char_time stuff from 2.0 driver.
194 *
195 * Revision 1.19 2001/10/30 15:23:03 johana
196 * Merged with 1.13.2 branch + fixed indentation
197 * and changed CONFIG_ETRAX100_XYS to CONFIG_ETRAX_XYZ
198 *
199 * Revision 1.18 2001/09/24 09:27:22 pkj
200 * Completed ext_baud_table[] in cflag_to_baud() and cflag_to_etrax_baud().
201 *
202 * Revision 1.17 2001/08/24 11:32:49 ronny
203 * More fixes for the CONFIG_ETRAX_SERIAL_PORT0 define.
204 *
205 * Revision 1.16 2001/08/24 07:56:22 ronny
206 * Added config ifdefs around ser0 irq requests.
207 *
208 * Revision 1.15 2001/08/16 09:10:31 bjarne
209 * serial.c - corrected the initialization of rs_table, the wrong defines
210 * where used.
211 * Corrected a test in timed_flush_handler.
212 * Changed configured to enabled.
213 * serial.h - Changed configured to enabled.
214 *
215 * Revision 1.14 2001/08/15 07:31:23 bjarne
216 * Introduced two new members to the e100_serial struct.
217 * configured - Will be set to 1 if the port has been configured in .config
218 * uses_dma - Should be set to 1 if the port uses DMA. Currently it is set
219 * to 1
220 * when a port is opened. This is used to limit the DMA interrupt
221 * routines to only manipulate DMA channels actually used by the
222 * serial driver.
223 *
224 * Revision 1.13.2.2 2001/10/17 13:57:13 starvik
225 * Receiver was broken by the break fixes
226 *
227 * Revision 1.13.2.1 2001/07/20 13:57:39 ronny
228 * Merge with new stuff from etrax100ser.c. Works but haven't checked stuff
229 * like break handling.
230 *
231 * Revision 1.13 2001/05/09 12:40:31 johana
232 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
233 *
234 * Revision 1.12 2001/04/19 12:23:07 bjornw
235 * CONFIG_RS485 -> CONFIG_ETRAX_RS485
236 *
237 * Revision 1.11 2001/04/05 14:29:48 markusl
238 * Updated according to review remarks i.e.
239 * -Use correct types in port structure to avoid compiler warnings
240 * -Try to use IO_* macros whenever possible
241 * -Open should never return -EBUSY
242 *
243 * Revision 1.10 2001/03/05 13:14:07 bjornw
244 * Another spelling fix
245 *
246 * Revision 1.9 2001/02/23 13:46:38 bjornw
247 * Spellling check
248 *
249 * Revision 1.8 2001/01/23 14:56:35 markusl
250 * Made use of ser1 optional
251 * Needed by USB
252 *
253 * Revision 1.7 2001/01/19 16:14:48 perf
254 * Added kernel options for serial ports 234.
255 * Changed option names from CONFIG_ETRAX100_XYZ to CONFIG_ETRAX_XYZ.
256 *
257 * Revision 1.6 2000/11/22 16:36:09 bjornw
258 * Please marketing by using the correct case when spelling Etrax.
259 *
260 * Revision 1.5 2000/11/21 16:43:37 bjornw
261 * Fixed so it compiles under CONFIG_SVINTO_SIM
262 *
263 * Revision 1.4 2000/11/15 17:34:12 bjornw
264 * Added a timeout timer for flushing input channels. The interrupt-based
265 * fast flush system should be easy to merge with this later (works the same
266 * way, only with an irq instead of a system timer_list)
267 *
268 * Revision 1.3 2000/11/13 17:19:57 bjornw
269 * * Incredibly, this almost complete rewrite of serial.c worked (at least
270 * for output) the first time.
271 *
272 * Items worth noticing:
273 *
274 * No Etrax100 port 1 workarounds (does only compile on 2.4 anyway now)
275 * RS485 is not ported (why can't it be done in userspace as on x86 ?)
276 * Statistics done through async_icount - if any more stats are needed,
277 * that's the place to put them or in an arch-dep version of it.
278 * timeout_interrupt and the other fast timeout stuff not ported yet
279 * There be dragons in this 3k+ line driver
280 *
281 * Revision 1.2 2000/11/10 16:50:28 bjornw
282 * First shot at a 2.4 port, does not compile totally yet
283 *
284 * Revision 1.1 2000/11/10 16:47:32 bjornw
285 * Added verbatim copy of rev 1.49 etrax100ser.c from elinux
286 *
287 * Revision 1.49 2000/10/30 15:47:14 tobiasa
288 * Changed version number.
289 *
290 * Revision 1.48 2000/10/25 11:02:43 johana
291 * Changed %ul to %lu in printf's
292 *
293 * Revision 1.47 2000/10/18 15:06:53 pkj
294 * Compile correctly with CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST and
295 * CONFIG_ETRAX_SERIAL_PROC_ENTRY together.
296 * Some clean-up of the /proc/serial file.
297 *
298 * Revision 1.46 2000/10/16 12:59:40 johana
299 * Added CONFIG_ETRAX_SERIAL_PROC_ENTRY for statistics and debug info.
300 *
301 * Revision 1.45 2000/10/13 17:10:59 pkj
302 * Do not flush DMAs while flipping TTY buffers.
303 *
304 * Revision 1.44 2000/10/13 16:34:29 pkj
305 * Added a delay in ser_interrupt() for 2.3ms when an error is detected.
306 * We do not know why this delay is required yet, but without it the
307 * irmaflash program does not work (this was the program that needed
308 * the ser_interrupt() to be needed in the first place). This should not
309 * affect normal use of the serial ports.
310 *
311 * Revision 1.43 2000/10/13 16:30:44 pkj
312 * New version of the fast flush of serial buffers code. This time
313 * it is localized to the serial driver and uses a fast timer to
314 * do the work.
315 *
316 * Revision 1.42 2000/10/13 14:54:26 bennyo
317 * Fix for switching RTS when using rs485
318 *
319 * Revision 1.41 2000/10/12 11:43:44 pkj
320 * Cleaned up a number of comments.
321 *
322 * Revision 1.40 2000/10/10 11:58:39 johana
323 * Made RS485 support generic for all ports.
324 * Toggle rts in interrupt if no delay wanted.
325 * WARNING: No true transmitter empty check??
326 * Set d_wait bit when sending data so interrupt is delayed until
327 * fifo flushed. (Fix tcdrain() problem)
328 *
329 * Revision 1.39 2000/10/04 16:08:02 bjornw
330 * * Use virt_to_phys etc. for DMA addresses
331 * * Removed CONFIG_FLUSH_DMA_FAST hacks
332 * * Indentation fix
333 *
334 * Revision 1.38 2000/10/02 12:27:10 mattias
335 * * added variable used when using fast flush on serial dma.
336 * (CONFIG_FLUSH_DMA_FAST)
337 *
338 * Revision 1.37 2000/09/27 09:44:24 pkj
339 * Uncomment definition of SERIAL_HANDLE_EARLY_ERRORS.
340 *
341 * Revision 1.36 2000/09/20 13:12:52 johana
342 * Support for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS:
343 * Number of timer ticks between flush of receive fifo (1 tick = 10ms).
344 * Try 0-3 for low latency applications. Approx 5 for high load
345 * applications (e.g. PPP). Maybe this should be more adaptive some day...
346 *
347 * Revision 1.35 2000/09/20 10:36:08 johana
348 * Typo in get_lsr_info()
349 *
350 * Revision 1.34 2000/09/20 10:29:59 johana
351 * Let rs_chars_in_buffer() check fifo content as well.
352 * get_lsr_info() might work now (not tested).
353 * Easier to change the port to debug.
354 *
355 * Revision 1.33 2000/09/13 07:52:11 torbjore
356 * Support RS485
357 *
358 * Revision 1.32 2000/08/31 14:45:37 bjornw
359 * After sending a break we need to reset the transmit DMA channel
360 *
361 * Revision 1.31 2000/06/21 12:13:29 johana
362 * Fixed wait for all chars sent when closing port.
363 * (Used to always take 1 second!)
364 * Added shadows for directions of status/ctrl signals.
365 *
366 * Revision 1.30 2000/05/29 16:27:55 bjornw
367 * Simulator ifdef moved a bit
368 *
369 * Revision 1.29 2000/05/09 09:40:30 mattias
370 * * Added description of dma registers used in timeout_interrupt
371 * * Removed old code
372 *
373 * Revision 1.28 2000/05/08 16:38:58 mattias
374 * * Bugfix for flushing fifo in timeout_interrupt
375 * Problem occurs when bluetooth stack waits for a small number of bytes
376 * containing an event acknowledging free buffers in bluetooth HW
377 * As before, data was stuck in fifo until more data came on uart and
378 * flushed it up to the stack.
379 *
380 * Revision 1.27 2000/05/02 09:52:28 jonasd
381 * Added fix for peculiar etrax behaviour when eop is forced on an empty
382 * fifo. This is used when flashing the IRMA chip. Disabled by default.
383 *
384 * Revision 1.26 2000/03/29 15:32:02 bjornw
385 * 2.0.34 updates
386 *
387 * Revision 1.25 2000/02/16 16:59:36 bjornw
388 * * Receive DMA directly into the flip-buffer, eliminating an intermediary
389 * receive buffer and a memcpy. Will avoid some overruns.
390 * * Error message on debug port if an overrun or flip buffer overrun occurs.
391 * * Just use the first byte in the flag flip buffer for errors.
392 * * Check for timeout on the serial ports only each 5/100 s, not 1/100.
393 *
394 * Revision 1.24 2000/02/09 18:02:28 bjornw
395 * * Clear serial errors (overrun, framing, parity) correctly. Before, the
396 * receiver would get stuck if an error occurred and we did not restart
397 * the input DMA.
398 * * Cosmetics (indentation, some code made into inlines)
399 * * Some more debug options
400 * * Actually shut down the serial port (DMA irq, DMA reset, receiver stop)
401 * when the last open is closed. Corresponding fixes in startup().
402 * * rs_close() "tx FIFO wait" code moved into right place, bug & -> && fixed
403 * and make a special case out of port 1 (R_DMA_CHx_STATUS is broken for that)
404 * * e100_disable_rx/enable_rx just disables/enables the receiver, not RTS
405 *
406 * Revision 1.23 2000/01/24 17:46:19 johana
407 * Wait for flush of DMA/FIFO when closing port.
408 *
409 * Revision 1.22 2000/01/20 18:10:23 johana
410 * Added TIOCMGET ioctl to return modem status.
411 * Implemented modem status/control that works with the extra signals
412 * (DTR, DSR, RI,CD) as well.
413 * 3 different modes supported:
414 * ser0 on PB (Bundy), ser1 on PB (Lisa) and ser2 on PA (Bundy)
415 * Fixed DEF_TX value that caused the serial transmitter pin (txd) to go to 0 when
416 * closing the last filehandle, NASTY!.
417 * Added break generation, not tested though!
418 * Use SA_SHIRQ when request_irq() for ser2 and ser3 (shared with) par0 and par1.
419 * You can't use them at the same time (yet..), but you can hopefully switch
420 * between ser2/par0, ser3/par1 with the same kernel config.
421 * Replaced some magic constants with defines
422 *
423 *
424 */
425
426static char *serial_version = "$Revision: 1.25 $";
427
428#include <linux/config.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429#include <linux/types.h>
430#include <linux/errno.h>
431#include <linux/signal.h>
432#include <linux/sched.h>
433#include <linux/timer.h>
434#include <linux/interrupt.h>
435#include <linux/tty.h>
436#include <linux/tty_flip.h>
437#include <linux/major.h>
438#include <linux/string.h>
439#include <linux/fcntl.h>
440#include <linux/mm.h>
441#include <linux/slab.h>
442#include <linux/init.h>
443#include <asm/uaccess.h>
444#include <linux/kernel.h>
Arjan van de Venf392ecf2006-01-12 18:44:32 +0000445#include <linux/mutex.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446
447#include <asm/io.h>
448#include <asm/irq.h>
449#include <asm/system.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700450#include <asm/bitops.h>
451#include <linux/delay.h>
452
453#include <asm/arch/svinto.h>
454
455/* non-arch dependent serial structures are in linux/serial.h */
456#include <linux/serial.h>
457/* while we keep our own stuff (struct e100_serial) in a local .h file */
458#include "serial.h"
459#include <asm/fasttimer.h>
460
461#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
462#ifndef CONFIG_ETRAX_FAST_TIMER
463#error "Enable FAST_TIMER to use SERIAL_FAST_TIMER"
464#endif
465#endif
466
467#if defined(CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS) && \
468 (CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS == 0)
469#error "RX_TIMEOUT_TICKS == 0 not allowed, use 1"
470#endif
471
472#if defined(CONFIG_ETRAX_RS485_ON_PA) && defined(CONFIG_ETRAX_RS485_ON_PORT_G)
473#error "Disable either CONFIG_ETRAX_RS485_ON_PA or CONFIG_ETRAX_RS485_ON_PORT_G"
474#endif
475
476/*
477 * All of the compatibilty code so we can compile serial.c against
478 * older kernels is hidden in serial_compat.h
479 */
480#if defined(LOCAL_HEADERS)
481#include "serial_compat.h"
482#endif
483
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484struct tty_driver *serial_driver;
485
486/* serial subtype definitions */
487#ifndef SERIAL_TYPE_NORMAL
488#define SERIAL_TYPE_NORMAL 1
489#endif
490
491/* number of characters left in xmit buffer before we ask for more */
492#define WAKEUP_CHARS 256
493
494//#define SERIAL_DEBUG_INTR
495//#define SERIAL_DEBUG_OPEN
496//#define SERIAL_DEBUG_FLOW
497//#define SERIAL_DEBUG_DATA
498//#define SERIAL_DEBUG_THROTTLE
499//#define SERIAL_DEBUG_IO /* Debug for Extra control and status pins */
500//#define SERIAL_DEBUG_LINE 0 /* What serport we want to debug */
501
502/* Enable this to use serial interrupts to handle when you
503 expect the first received event on the serial port to
504 be an error, break or similar. Used to be able to flash IRMA
505 from eLinux */
506#define SERIAL_HANDLE_EARLY_ERRORS
507
508/* Defined and used in n_tty.c, but we need it here as well */
509#define TTY_THRESHOLD_THROTTLE 128
510
511/* Due to buffersizes and threshold values, our SERIAL_DESCR_BUF_SIZE
512 * must not be to high or flow control won't work if we leave it to the tty
513 * layer so we have our own throttling in flush_to_flip
514 * TTY_FLIPBUF_SIZE=512,
515 * TTY_THRESHOLD_THROTTLE/UNTHROTTLE=128
516 * BUF_SIZE can't be > 128
517 */
518/* Currently 16 descriptors x 128 bytes = 2048 bytes */
519#define SERIAL_DESCR_BUF_SIZE 256
520
521#define SERIAL_PRESCALE_BASE 3125000 /* 3.125MHz */
522#define DEF_BAUD_BASE SERIAL_PRESCALE_BASE
523
524/* We don't want to load the system with massive fast timer interrupt
525 * on high baudrates so limit it to 250 us (4kHz) */
526#define MIN_FLUSH_TIME_USEC 250
527
528/* Add an x here to log a lot of timer stuff */
529#define TIMERD(x)
530/* Debug details of interrupt handling */
531#define DINTR1(x) /* irq on/off, errors */
532#define DINTR2(x) /* tx and rx */
533/* Debug flip buffer stuff */
534#define DFLIP(x)
535/* Debug flow control and overview of data flow */
536#define DFLOW(x)
537#define DBAUD(x)
538#define DLOG_INT_TRIG(x)
539
540//#define DEBUG_LOG_INCLUDED
541#ifndef DEBUG_LOG_INCLUDED
542#define DEBUG_LOG(line, string, value)
543#else
544struct debug_log_info
545{
546 unsigned long time;
547 unsigned long timer_data;
548// int line;
549 const char *string;
550 int value;
551};
552#define DEBUG_LOG_SIZE 4096
553
554struct debug_log_info debug_log[DEBUG_LOG_SIZE];
555int debug_log_pos = 0;
556
557#define DEBUG_LOG(_line, _string, _value) do { \
558 if ((_line) == SERIAL_DEBUG_LINE) {\
559 debug_log_func(_line, _string, _value); \
560 }\
561}while(0)
562
563void debug_log_func(int line, const char *string, int value)
564{
565 if (debug_log_pos < DEBUG_LOG_SIZE) {
566 debug_log[debug_log_pos].time = jiffies;
567 debug_log[debug_log_pos].timer_data = *R_TIMER_DATA;
568// debug_log[debug_log_pos].line = line;
569 debug_log[debug_log_pos].string = string;
570 debug_log[debug_log_pos].value = value;
571 debug_log_pos++;
572 }
573 /*printk(string, value);*/
574}
575#endif
576
577#ifndef CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS
578/* Default number of timer ticks before flushing rx fifo
579 * When using "little data, low latency applications: use 0
580 * When using "much data applications (PPP)" use ~5
581 */
582#define CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS 5
583#endif
584
585unsigned long timer_data_to_ns(unsigned long timer_data);
586
587static void change_speed(struct e100_serial *info);
588static void rs_throttle(struct tty_struct * tty);
589static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
590static int rs_write(struct tty_struct * tty, int from_user,
591 const unsigned char *buf, int count);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700592#ifdef CONFIG_ETRAX_RS485
593static int e100_write_rs485(struct tty_struct * tty, int from_user,
594 const unsigned char *buf, int count);
595#endif
596static int get_lsr_info(struct e100_serial * info, unsigned int *value);
597
598
599#define DEF_BAUD 115200 /* 115.2 kbit/s */
600#define STD_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
601#define DEF_RX 0x20 /* or SERIAL_CTRL_W >> 8 */
602/* Default value of tx_ctrl register: has txd(bit 7)=1 (idle) as default */
603#define DEF_TX 0x80 /* or SERIAL_CTRL_B */
604
605/* offsets from R_SERIALx_CTRL */
606
607#define REG_DATA 0
608#define REG_DATA_STATUS32 0 /* this is the 32 bit register R_SERIALx_READ */
609#define REG_TR_DATA 0
610#define REG_STATUS 1
611#define REG_TR_CTRL 1
612#define REG_REC_CTRL 2
613#define REG_BAUD 3
614#define REG_XOFF 4 /* this is a 32 bit register */
615
616/* The bitfields are the same for all serial ports */
617#define SER_RXD_MASK IO_MASK(R_SERIAL0_STATUS, rxd)
618#define SER_DATA_AVAIL_MASK IO_MASK(R_SERIAL0_STATUS, data_avail)
619#define SER_FRAMING_ERR_MASK IO_MASK(R_SERIAL0_STATUS, framing_err)
620#define SER_PAR_ERR_MASK IO_MASK(R_SERIAL0_STATUS, par_err)
621#define SER_OVERRUN_MASK IO_MASK(R_SERIAL0_STATUS, overrun)
622
623#define SER_ERROR_MASK (SER_OVERRUN_MASK | SER_PAR_ERR_MASK | SER_FRAMING_ERR_MASK)
624
625/* Values for info->errorcode */
626#define ERRCODE_SET_BREAK (TTY_BREAK)
627#define ERRCODE_INSERT 0x100
628#define ERRCODE_INSERT_BREAK (ERRCODE_INSERT | TTY_BREAK)
629
630#define FORCE_EOP(info) *R_SET_EOP = 1U << info->iseteop;
631
632/*
633 * General note regarding the use of IO_* macros in this file:
634 *
635 * We will use the bits defined for DMA channel 6 when using various
636 * IO_* macros (e.g. IO_STATE, IO_MASK, IO_EXTRACT) and _assume_ they are
637 * the same for all channels (which of course they are).
638 *
639 * We will also use the bits defined for serial port 0 when writing commands
640 * to the different ports, as these bits too are the same for all ports.
641 */
642
643
644/* Mask for the irqs possibly enabled in R_IRQ_MASK1_RD etc. */
645static const unsigned long e100_ser_int_mask = 0
646#ifdef CONFIG_ETRAX_SERIAL_PORT0
647| IO_MASK(R_IRQ_MASK1_RD, ser0_data) | IO_MASK(R_IRQ_MASK1_RD, ser0_ready)
648#endif
649#ifdef CONFIG_ETRAX_SERIAL_PORT1
650| IO_MASK(R_IRQ_MASK1_RD, ser1_data) | IO_MASK(R_IRQ_MASK1_RD, ser1_ready)
651#endif
652#ifdef CONFIG_ETRAX_SERIAL_PORT2
653| IO_MASK(R_IRQ_MASK1_RD, ser2_data) | IO_MASK(R_IRQ_MASK1_RD, ser2_ready)
654#endif
655#ifdef CONFIG_ETRAX_SERIAL_PORT3
656| IO_MASK(R_IRQ_MASK1_RD, ser3_data) | IO_MASK(R_IRQ_MASK1_RD, ser3_ready)
657#endif
658;
659unsigned long r_alt_ser_baudrate_shadow = 0;
660
661/* this is the data for the four serial ports in the etrax100 */
662/* DMA2(ser2), DMA4(ser3), DMA6(ser0) or DMA8(ser1) */
663/* R_DMA_CHx_CLR_INTR, R_DMA_CHx_FIRST, R_DMA_CHx_CMD */
664
665static struct e100_serial rs_table[] = {
666 { .baud = DEF_BAUD,
667 .port = (unsigned char *)R_SERIAL0_CTRL,
668 .irq = 1U << 12, /* uses DMA 6 and 7 */
669 .oclrintradr = R_DMA_CH6_CLR_INTR,
670 .ofirstadr = R_DMA_CH6_FIRST,
671 .ocmdadr = R_DMA_CH6_CMD,
672 .ostatusadr = R_DMA_CH6_STATUS,
673 .iclrintradr = R_DMA_CH7_CLR_INTR,
674 .ifirstadr = R_DMA_CH7_FIRST,
675 .icmdadr = R_DMA_CH7_CMD,
676 .idescradr = R_DMA_CH7_DESCR,
677 .flags = STD_FLAGS,
678 .rx_ctrl = DEF_RX,
679 .tx_ctrl = DEF_TX,
680 .iseteop = 2,
681#ifdef CONFIG_ETRAX_SERIAL_PORT0
682 .enabled = 1,
683#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
684 .dma_out_enabled = 1,
685#else
686 .dma_out_enabled = 0,
687#endif
688#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
689 .dma_in_enabled = 1,
690#else
691 .dma_in_enabled = 0
692#endif
693#else
694 .enabled = 0,
695 .dma_out_enabled = 0,
696 .dma_in_enabled = 0
697#endif
698
699}, /* ttyS0 */
700#ifndef CONFIG_SVINTO_SIM
701 { .baud = DEF_BAUD,
702 .port = (unsigned char *)R_SERIAL1_CTRL,
703 .irq = 1U << 16, /* uses DMA 8 and 9 */
704 .oclrintradr = R_DMA_CH8_CLR_INTR,
705 .ofirstadr = R_DMA_CH8_FIRST,
706 .ocmdadr = R_DMA_CH8_CMD,
707 .ostatusadr = R_DMA_CH8_STATUS,
708 .iclrintradr = R_DMA_CH9_CLR_INTR,
709 .ifirstadr = R_DMA_CH9_FIRST,
710 .icmdadr = R_DMA_CH9_CMD,
711 .idescradr = R_DMA_CH9_DESCR,
712 .flags = STD_FLAGS,
713 .rx_ctrl = DEF_RX,
714 .tx_ctrl = DEF_TX,
715 .iseteop = 3,
716#ifdef CONFIG_ETRAX_SERIAL_PORT1
717 .enabled = 1,
718#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
719 .dma_out_enabled = 1,
720#else
721 .dma_out_enabled = 0,
722#endif
723#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
724 .dma_in_enabled = 1,
725#else
726 .dma_in_enabled = 0
727#endif
728#else
729 .enabled = 0,
730 .dma_out_enabled = 0,
731 .dma_in_enabled = 0
732#endif
733}, /* ttyS1 */
734
735 { .baud = DEF_BAUD,
736 .port = (unsigned char *)R_SERIAL2_CTRL,
737 .irq = 1U << 4, /* uses DMA 2 and 3 */
738 .oclrintradr = R_DMA_CH2_CLR_INTR,
739 .ofirstadr = R_DMA_CH2_FIRST,
740 .ocmdadr = R_DMA_CH2_CMD,
741 .ostatusadr = R_DMA_CH2_STATUS,
742 .iclrintradr = R_DMA_CH3_CLR_INTR,
743 .ifirstadr = R_DMA_CH3_FIRST,
744 .icmdadr = R_DMA_CH3_CMD,
745 .idescradr = R_DMA_CH3_DESCR,
746 .flags = STD_FLAGS,
747 .rx_ctrl = DEF_RX,
748 .tx_ctrl = DEF_TX,
749 .iseteop = 0,
750#ifdef CONFIG_ETRAX_SERIAL_PORT2
751 .enabled = 1,
752#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
753 .dma_out_enabled = 1,
754#else
755 .dma_out_enabled = 0,
756#endif
757#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
758 .dma_in_enabled = 1,
759#else
760 .dma_in_enabled = 0
761#endif
762#else
763 .enabled = 0,
764 .dma_out_enabled = 0,
765 .dma_in_enabled = 0
766#endif
767 }, /* ttyS2 */
768
769 { .baud = DEF_BAUD,
770 .port = (unsigned char *)R_SERIAL3_CTRL,
771 .irq = 1U << 8, /* uses DMA 4 and 5 */
772 .oclrintradr = R_DMA_CH4_CLR_INTR,
773 .ofirstadr = R_DMA_CH4_FIRST,
774 .ocmdadr = R_DMA_CH4_CMD,
775 .ostatusadr = R_DMA_CH4_STATUS,
776 .iclrintradr = R_DMA_CH5_CLR_INTR,
777 .ifirstadr = R_DMA_CH5_FIRST,
778 .icmdadr = R_DMA_CH5_CMD,
779 .idescradr = R_DMA_CH5_DESCR,
780 .flags = STD_FLAGS,
781 .rx_ctrl = DEF_RX,
782 .tx_ctrl = DEF_TX,
783 .iseteop = 1,
784#ifdef CONFIG_ETRAX_SERIAL_PORT3
785 .enabled = 1,
786#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
787 .dma_out_enabled = 1,
788#else
789 .dma_out_enabled = 0,
790#endif
791#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
792 .dma_in_enabled = 1,
793#else
794 .dma_in_enabled = 0
795#endif
796#else
797 .enabled = 0,
798 .dma_out_enabled = 0,
799 .dma_in_enabled = 0
800#endif
801 } /* ttyS3 */
802#endif
803};
804
805
806#define NR_PORTS (sizeof(rs_table)/sizeof(struct e100_serial))
807
808static struct termios *serial_termios[NR_PORTS];
809static struct termios *serial_termios_locked[NR_PORTS];
810#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
811static struct fast_timer fast_timers[NR_PORTS];
812#endif
813
814#ifdef CONFIG_ETRAX_SERIAL_PROC_ENTRY
815#define PROCSTAT(x) x
816struct ser_statistics_type {
817 int overrun_cnt;
818 int early_errors_cnt;
819 int ser_ints_ok_cnt;
820 int errors_cnt;
821 unsigned long int processing_flip;
822 unsigned long processing_flip_still_room;
823 unsigned long int timeout_flush_cnt;
824 int rx_dma_ints;
825 int tx_dma_ints;
826 int rx_tot;
827 int tx_tot;
828};
829
830static struct ser_statistics_type ser_stat[NR_PORTS];
831
832#else
833
834#define PROCSTAT(x)
835
836#endif /* CONFIG_ETRAX_SERIAL_PROC_ENTRY */
837
838/* RS-485 */
839#if defined(CONFIG_ETRAX_RS485)
840#ifdef CONFIG_ETRAX_FAST_TIMER
841static struct fast_timer fast_timers_rs485[NR_PORTS];
842#endif
843#if defined(CONFIG_ETRAX_RS485_ON_PA)
844static int rs485_pa_bit = CONFIG_ETRAX_RS485_ON_PA_BIT;
845#endif
846#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
847static int rs485_port_g_bit = CONFIG_ETRAX_RS485_ON_PORT_G_BIT;
848#endif
849#endif
850
851/* Info and macros needed for each ports extra control/status signals. */
852#define E100_STRUCT_PORT(line, pinname) \
853 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
854 (R_PORT_PA_DATA): ( \
855 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
856 (R_PORT_PB_DATA):&dummy_ser[line]))
857
858#define E100_STRUCT_SHADOW(line, pinname) \
859 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
860 (&port_pa_data_shadow): ( \
861 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
862 (&port_pb_data_shadow):&dummy_ser[line]))
863#define E100_STRUCT_MASK(line, pinname) \
864 ((CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT >= 0)? \
865 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PA_BIT): ( \
866 (CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT >= 0)? \
867 (1<<CONFIG_ETRAX_SER##line##_##pinname##_ON_PB_BIT):DUMMY_##pinname##_MASK))
868
869#define DUMMY_DTR_MASK 1
870#define DUMMY_RI_MASK 2
871#define DUMMY_DSR_MASK 4
872#define DUMMY_CD_MASK 8
873static unsigned char dummy_ser[NR_PORTS] = {0xFF, 0xFF, 0xFF,0xFF};
874
875/* If not all status pins are used or disabled, use mixed mode */
876#ifdef CONFIG_ETRAX_SERIAL_PORT0
877
878#define SER0_PA_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PA_BIT+CONFIG_ETRAX_SER0_RI_ON_PA_BIT+CONFIG_ETRAX_SER0_DSR_ON_PA_BIT+CONFIG_ETRAX_SER0_CD_ON_PA_BIT)
879
880#if SER0_PA_BITSUM != -4
881# if CONFIG_ETRAX_SER0_DTR_ON_PA_BIT == -1
882# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
883# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
884# endif
885# endif
886# if CONFIG_ETRAX_SER0_RI_ON_PA_BIT == -1
887# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
888# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
889# endif
890# endif
891# if CONFIG_ETRAX_SER0_DSR_ON_PA_BIT == -1
892# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
893# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
894# endif
895# endif
896# if CONFIG_ETRAX_SER0_CD_ON_PA_BIT == -1
897# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
898# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
899# endif
900# endif
901#endif
902
903#define SER0_PB_BITSUM (CONFIG_ETRAX_SER0_DTR_ON_PB_BIT+CONFIG_ETRAX_SER0_RI_ON_PB_BIT+CONFIG_ETRAX_SER0_DSR_ON_PB_BIT+CONFIG_ETRAX_SER0_CD_ON_PB_BIT)
904
905#if SER0_PB_BITSUM != -4
906# if CONFIG_ETRAX_SER0_DTR_ON_PB_BIT == -1
907# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
908# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
909# endif
910# endif
911# if CONFIG_ETRAX_SER0_RI_ON_PB_BIT == -1
912# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
913# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
914# endif
915# endif
916# if CONFIG_ETRAX_SER0_DSR_ON_PB_BIT == -1
917# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
918# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
919# endif
920# endif
921# if CONFIG_ETRAX_SER0_CD_ON_PB_BIT == -1
922# ifndef CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED
923# define CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED 1
924# endif
925# endif
926#endif
927
928#endif /* PORT0 */
929
930
931#ifdef CONFIG_ETRAX_SERIAL_PORT1
932
933#define SER1_PA_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PA_BIT+CONFIG_ETRAX_SER1_RI_ON_PA_BIT+CONFIG_ETRAX_SER1_DSR_ON_PA_BIT+CONFIG_ETRAX_SER1_CD_ON_PA_BIT)
934
935#if SER1_PA_BITSUM != -4
936# if CONFIG_ETRAX_SER1_DTR_ON_PA_BIT == -1
937# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
938# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
939# endif
940# endif
941# if CONFIG_ETRAX_SER1_RI_ON_PA_BIT == -1
942# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
943# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
944# endif
945# endif
946# if CONFIG_ETRAX_SER1_DSR_ON_PA_BIT == -1
947# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
948# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
949# endif
950# endif
951# if CONFIG_ETRAX_SER1_CD_ON_PA_BIT == -1
952# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
953# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
954# endif
955# endif
956#endif
957
958#define SER1_PB_BITSUM (CONFIG_ETRAX_SER1_DTR_ON_PB_BIT+CONFIG_ETRAX_SER1_RI_ON_PB_BIT+CONFIG_ETRAX_SER1_DSR_ON_PB_BIT+CONFIG_ETRAX_SER1_CD_ON_PB_BIT)
959
960#if SER1_PB_BITSUM != -4
961# if CONFIG_ETRAX_SER1_DTR_ON_PB_BIT == -1
962# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
963# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
964# endif
965# endif
966# if CONFIG_ETRAX_SER1_RI_ON_PB_BIT == -1
967# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
968# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
969# endif
970# endif
971# if CONFIG_ETRAX_SER1_DSR_ON_PB_BIT == -1
972# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
973# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
974# endif
975# endif
976# if CONFIG_ETRAX_SER1_CD_ON_PB_BIT == -1
977# ifndef CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED
978# define CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED 1
979# endif
980# endif
981#endif
982
983#endif /* PORT1 */
984
985#ifdef CONFIG_ETRAX_SERIAL_PORT2
986
987#define SER2_PA_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PA_BIT+CONFIG_ETRAX_SER2_RI_ON_PA_BIT+CONFIG_ETRAX_SER2_DSR_ON_PA_BIT+CONFIG_ETRAX_SER2_CD_ON_PA_BIT)
988
989#if SER2_PA_BITSUM != -4
990# if CONFIG_ETRAX_SER2_DTR_ON_PA_BIT == -1
991# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
992# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
993# endif
994# endif
995# if CONFIG_ETRAX_SER2_RI_ON_PA_BIT == -1
996# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
997# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
998# endif
999# endif
1000# if CONFIG_ETRAX_SER2_DSR_ON_PA_BIT == -1
1001# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1002# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1003# endif
1004# endif
1005# if CONFIG_ETRAX_SER2_CD_ON_PA_BIT == -1
1006# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1007# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1008# endif
1009# endif
1010#endif
1011
1012#define SER2_PB_BITSUM (CONFIG_ETRAX_SER2_DTR_ON_PB_BIT+CONFIG_ETRAX_SER2_RI_ON_PB_BIT+CONFIG_ETRAX_SER2_DSR_ON_PB_BIT+CONFIG_ETRAX_SER2_CD_ON_PB_BIT)
1013
1014#if SER2_PB_BITSUM != -4
1015# if CONFIG_ETRAX_SER2_DTR_ON_PB_BIT == -1
1016# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1017# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1018# endif
1019# endif
1020# if CONFIG_ETRAX_SER2_RI_ON_PB_BIT == -1
1021# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1022# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1023# endif
1024# endif
1025# if CONFIG_ETRAX_SER2_DSR_ON_PB_BIT == -1
1026# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1027# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1028# endif
1029# endif
1030# if CONFIG_ETRAX_SER2_CD_ON_PB_BIT == -1
1031# ifndef CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED
1032# define CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED 1
1033# endif
1034# endif
1035#endif
1036
1037#endif /* PORT2 */
1038
1039#ifdef CONFIG_ETRAX_SERIAL_PORT3
1040
1041#define SER3_PA_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PA_BIT+CONFIG_ETRAX_SER3_RI_ON_PA_BIT+CONFIG_ETRAX_SER3_DSR_ON_PA_BIT+CONFIG_ETRAX_SER3_CD_ON_PA_BIT)
1042
1043#if SER3_PA_BITSUM != -4
1044# if CONFIG_ETRAX_SER3_DTR_ON_PA_BIT == -1
1045# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1046# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1047# endif
1048# endif
1049# if CONFIG_ETRAX_SER3_RI_ON_PA_BIT == -1
1050# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1051# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1052# endif
1053# endif
1054# if CONFIG_ETRAX_SER3_DSR_ON_PA_BIT == -1
1055# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1056# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1057# endif
1058# endif
1059# if CONFIG_ETRAX_SER3_CD_ON_PA_BIT == -1
1060# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1061# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1062# endif
1063# endif
1064#endif
1065
1066#define SER3_PB_BITSUM (CONFIG_ETRAX_SER3_DTR_ON_PB_BIT+CONFIG_ETRAX_SER3_RI_ON_PB_BIT+CONFIG_ETRAX_SER3_DSR_ON_PB_BIT+CONFIG_ETRAX_SER3_CD_ON_PB_BIT)
1067
1068#if SER3_PB_BITSUM != -4
1069# if CONFIG_ETRAX_SER3_DTR_ON_PB_BIT == -1
1070# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1071# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1072# endif
1073# endif
1074# if CONFIG_ETRAX_SER3_RI_ON_PB_BIT == -1
1075# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1076# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1077# endif
1078# endif
1079# if CONFIG_ETRAX_SER3_DSR_ON_PB_BIT == -1
1080# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1081# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1082# endif
1083# endif
1084# if CONFIG_ETRAX_SER3_CD_ON_PB_BIT == -1
1085# ifndef CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED
1086# define CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED 1
1087# endif
1088# endif
1089#endif
1090
1091#endif /* PORT3 */
1092
1093
1094#if defined(CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_MIXED) || \
1095 defined(CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_MIXED) || \
1096 defined(CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_MIXED) || \
1097 defined(CONFIG_ETRAX_SER3_DTR_RI_DSR_CD_MIXED)
1098#define CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1099#endif
1100
1101#ifdef CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED
1102/* The pins can be mixed on PA and PB */
1103#define CONTROL_PINS_PORT_NOT_USED(line) \
1104 &dummy_ser[line], &dummy_ser[line], \
1105 &dummy_ser[line], &dummy_ser[line], \
1106 &dummy_ser[line], &dummy_ser[line], \
1107 &dummy_ser[line], &dummy_ser[line], \
1108 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1109
1110
1111struct control_pins
1112{
1113 volatile unsigned char *dtr_port;
1114 unsigned char *dtr_shadow;
1115 volatile unsigned char *ri_port;
1116 unsigned char *ri_shadow;
1117 volatile unsigned char *dsr_port;
1118 unsigned char *dsr_shadow;
1119 volatile unsigned char *cd_port;
1120 unsigned char *cd_shadow;
1121
1122 unsigned char dtr_mask;
1123 unsigned char ri_mask;
1124 unsigned char dsr_mask;
1125 unsigned char cd_mask;
1126};
1127
1128static const struct control_pins e100_modem_pins[NR_PORTS] =
1129{
1130 /* Ser 0 */
1131 {
1132#ifdef CONFIG_ETRAX_SERIAL_PORT0
1133 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1134 E100_STRUCT_PORT(0,RI), E100_STRUCT_SHADOW(0,RI),
1135 E100_STRUCT_PORT(0,DSR), E100_STRUCT_SHADOW(0,DSR),
1136 E100_STRUCT_PORT(0,CD), E100_STRUCT_SHADOW(0,CD),
1137 E100_STRUCT_MASK(0,DTR),
1138 E100_STRUCT_MASK(0,RI),
1139 E100_STRUCT_MASK(0,DSR),
1140 E100_STRUCT_MASK(0,CD)
1141#else
1142 CONTROL_PINS_PORT_NOT_USED(0)
1143#endif
1144 },
1145
1146 /* Ser 1 */
1147 {
1148#ifdef CONFIG_ETRAX_SERIAL_PORT1
1149 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1150 E100_STRUCT_PORT(1,RI), E100_STRUCT_SHADOW(1,RI),
1151 E100_STRUCT_PORT(1,DSR), E100_STRUCT_SHADOW(1,DSR),
1152 E100_STRUCT_PORT(1,CD), E100_STRUCT_SHADOW(1,CD),
1153 E100_STRUCT_MASK(1,DTR),
1154 E100_STRUCT_MASK(1,RI),
1155 E100_STRUCT_MASK(1,DSR),
1156 E100_STRUCT_MASK(1,CD)
1157#else
1158 CONTROL_PINS_PORT_NOT_USED(1)
1159#endif
1160 },
1161
1162 /* Ser 2 */
1163 {
1164#ifdef CONFIG_ETRAX_SERIAL_PORT2
1165 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1166 E100_STRUCT_PORT(2,RI), E100_STRUCT_SHADOW(2,RI),
1167 E100_STRUCT_PORT(2,DSR), E100_STRUCT_SHADOW(2,DSR),
1168 E100_STRUCT_PORT(2,CD), E100_STRUCT_SHADOW(2,CD),
1169 E100_STRUCT_MASK(2,DTR),
1170 E100_STRUCT_MASK(2,RI),
1171 E100_STRUCT_MASK(2,DSR),
1172 E100_STRUCT_MASK(2,CD)
1173#else
1174 CONTROL_PINS_PORT_NOT_USED(2)
1175#endif
1176 },
1177
1178 /* Ser 3 */
1179 {
1180#ifdef CONFIG_ETRAX_SERIAL_PORT3
1181 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1182 E100_STRUCT_PORT(3,RI), E100_STRUCT_SHADOW(3,RI),
1183 E100_STRUCT_PORT(3,DSR), E100_STRUCT_SHADOW(3,DSR),
1184 E100_STRUCT_PORT(3,CD), E100_STRUCT_SHADOW(3,CD),
1185 E100_STRUCT_MASK(3,DTR),
1186 E100_STRUCT_MASK(3,RI),
1187 E100_STRUCT_MASK(3,DSR),
1188 E100_STRUCT_MASK(3,CD)
1189#else
1190 CONTROL_PINS_PORT_NOT_USED(3)
1191#endif
1192 }
1193};
1194#else /* CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1195
1196/* All pins are on either PA or PB for each serial port */
1197#define CONTROL_PINS_PORT_NOT_USED(line) \
1198 &dummy_ser[line], &dummy_ser[line], \
1199 DUMMY_DTR_MASK, DUMMY_RI_MASK, DUMMY_DSR_MASK, DUMMY_CD_MASK
1200
1201
1202struct control_pins
1203{
1204 volatile unsigned char *port;
1205 unsigned char *shadow;
1206
1207 unsigned char dtr_mask;
1208 unsigned char ri_mask;
1209 unsigned char dsr_mask;
1210 unsigned char cd_mask;
1211};
1212
1213#define dtr_port port
1214#define dtr_shadow shadow
1215#define ri_port port
1216#define ri_shadow shadow
1217#define dsr_port port
1218#define dsr_shadow shadow
1219#define cd_port port
1220#define cd_shadow shadow
1221
1222static const struct control_pins e100_modem_pins[NR_PORTS] =
1223{
1224 /* Ser 0 */
1225 {
1226#ifdef CONFIG_ETRAX_SERIAL_PORT0
1227 E100_STRUCT_PORT(0,DTR), E100_STRUCT_SHADOW(0,DTR),
1228 E100_STRUCT_MASK(0,DTR),
1229 E100_STRUCT_MASK(0,RI),
1230 E100_STRUCT_MASK(0,DSR),
1231 E100_STRUCT_MASK(0,CD)
1232#else
1233 CONTROL_PINS_PORT_NOT_USED(0)
1234#endif
1235 },
1236
1237 /* Ser 1 */
1238 {
1239#ifdef CONFIG_ETRAX_SERIAL_PORT1
1240 E100_STRUCT_PORT(1,DTR), E100_STRUCT_SHADOW(1,DTR),
1241 E100_STRUCT_MASK(1,DTR),
1242 E100_STRUCT_MASK(1,RI),
1243 E100_STRUCT_MASK(1,DSR),
1244 E100_STRUCT_MASK(1,CD)
1245#else
1246 CONTROL_PINS_PORT_NOT_USED(1)
1247#endif
1248 },
1249
1250 /* Ser 2 */
1251 {
1252#ifdef CONFIG_ETRAX_SERIAL_PORT2
1253 E100_STRUCT_PORT(2,DTR), E100_STRUCT_SHADOW(2,DTR),
1254 E100_STRUCT_MASK(2,DTR),
1255 E100_STRUCT_MASK(2,RI),
1256 E100_STRUCT_MASK(2,DSR),
1257 E100_STRUCT_MASK(2,CD)
1258#else
1259 CONTROL_PINS_PORT_NOT_USED(2)
1260#endif
1261 },
1262
1263 /* Ser 3 */
1264 {
1265#ifdef CONFIG_ETRAX_SERIAL_PORT3
1266 E100_STRUCT_PORT(3,DTR), E100_STRUCT_SHADOW(3,DTR),
1267 E100_STRUCT_MASK(3,DTR),
1268 E100_STRUCT_MASK(3,RI),
1269 E100_STRUCT_MASK(3,DSR),
1270 E100_STRUCT_MASK(3,CD)
1271#else
1272 CONTROL_PINS_PORT_NOT_USED(3)
1273#endif
1274 }
1275};
1276#endif /* !CONFIG_ETRAX_SERX_DTR_RI_DSR_CD_MIXED */
1277
1278#define E100_RTS_MASK 0x20
1279#define E100_CTS_MASK 0x40
1280
1281/* All serial port signals are active low:
1282 * active = 0 -> 3.3V to RS-232 driver -> -12V on RS-232 level
1283 * inactive = 1 -> 0V to RS-232 driver -> +12V on RS-232 level
1284 *
1285 * These macros returns the pin value: 0=0V, >=1 = 3.3V on ETRAX chip
1286 */
1287
1288/* Output */
1289#define E100_RTS_GET(info) ((info)->rx_ctrl & E100_RTS_MASK)
1290/* Input */
1291#define E100_CTS_GET(info) ((info)->port[REG_STATUS] & E100_CTS_MASK)
1292
1293/* These are typically PA or PB and 0 means 0V, 1 means 3.3V */
1294/* Is an output */
1295#define E100_DTR_GET(info) ((*e100_modem_pins[(info)->line].dtr_shadow) & e100_modem_pins[(info)->line].dtr_mask)
1296
1297/* Normally inputs */
1298#define E100_RI_GET(info) ((*e100_modem_pins[(info)->line].ri_port) & e100_modem_pins[(info)->line].ri_mask)
1299#define E100_CD_GET(info) ((*e100_modem_pins[(info)->line].cd_port) & e100_modem_pins[(info)->line].cd_mask)
1300
1301/* Input */
1302#define E100_DSR_GET(info) ((*e100_modem_pins[(info)->line].dsr_port) & e100_modem_pins[(info)->line].dsr_mask)
1303
1304
1305/*
1306 * tmp_buf is used as a temporary buffer by serial_write. We need to
1307 * lock it in case the memcpy_fromfs blocks while swapping in a page,
1308 * and some other program tries to do a serial write at the same time.
1309 * Since the lock will only come under contention when the system is
1310 * swapping and available memory is low, it makes sense to share one
1311 * buffer across all the serial ports, since it significantly saves
1312 * memory if large numbers of serial ports are open.
1313 */
1314static unsigned char *tmp_buf;
Arjan van de Venf392ecf2006-01-12 18:44:32 +00001315static DEFINE_MUTEX(tmp_buf_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001316
1317/* Calculate the chartime depending on baudrate, numbor of bits etc. */
1318static void update_char_time(struct e100_serial * info)
1319{
1320 tcflag_t cflags = info->tty->termios->c_cflag;
1321 int bits;
1322
1323 /* calc. number of bits / data byte */
1324 /* databits + startbit and 1 stopbit */
1325 if ((cflags & CSIZE) == CS7)
1326 bits = 9;
1327 else
1328 bits = 10;
1329
1330 if (cflags & CSTOPB) /* 2 stopbits ? */
1331 bits++;
1332
1333 if (cflags & PARENB) /* parity bit ? */
1334 bits++;
1335
1336 /* calc timeout */
1337 info->char_time_usec = ((bits * 1000000) / info->baud) + 1;
1338 info->flush_time_usec = 4*info->char_time_usec;
1339 if (info->flush_time_usec < MIN_FLUSH_TIME_USEC)
1340 info->flush_time_usec = MIN_FLUSH_TIME_USEC;
1341
1342}
1343
1344/*
1345 * This function maps from the Bxxxx defines in asm/termbits.h into real
1346 * baud rates.
1347 */
1348
1349static int
1350cflag_to_baud(unsigned int cflag)
1351{
1352 static int baud_table[] = {
1353 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
1354 4800, 9600, 19200, 38400 };
1355
1356 static int ext_baud_table[] = {
1357 0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
1358 0, 0, 0, 0, 0, 0, 0, 0 };
1359
1360 if (cflag & CBAUDEX)
1361 return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1362 else
1363 return baud_table[cflag & CBAUD];
1364}
1365
1366/* and this maps to an etrax100 hardware baud constant */
1367
1368static unsigned char
1369cflag_to_etrax_baud(unsigned int cflag)
1370{
1371 char retval;
1372
1373 static char baud_table[] = {
1374 -1, -1, -1, -1, -1, -1, -1, 0, 1, 2, -1, 3, 4, 5, 6, 7 };
1375
1376 static char ext_baud_table[] = {
1377 -1, 8, 9, 10, 11, 12, 13, 14, -1, -1, -1, -1, -1, -1, -1, -1 };
1378
1379 if (cflag & CBAUDEX)
1380 retval = ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
1381 else
1382 retval = baud_table[cflag & CBAUD];
1383
1384 if (retval < 0) {
1385 printk(KERN_WARNING "serdriver tried setting invalid baud rate, flags %x.\n", cflag);
1386 retval = 5; /* choose default 9600 instead */
1387 }
1388
1389 return retval | (retval << 4); /* choose same for both TX and RX */
1390}
1391
1392
1393/* Various static support functions */
1394
1395/* Functions to set or clear DTR/RTS on the requested line */
1396/* It is complicated by the fact that RTS is a serial port register, while
1397 * DTR might not be implemented in the HW at all, and if it is, it can be on
1398 * any general port.
1399 */
1400
1401
1402static inline void
1403e100_dtr(struct e100_serial *info, int set)
1404{
1405#ifndef CONFIG_SVINTO_SIM
1406 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1407
1408#ifdef SERIAL_DEBUG_IO
1409 printk("ser%i dtr %i mask: 0x%02X\n", info->line, set, mask);
1410 printk("ser%i shadow before 0x%02X get: %i\n",
1411 info->line, *e100_modem_pins[info->line].dtr_shadow,
1412 E100_DTR_GET(info));
1413#endif
1414 /* DTR is active low */
1415 {
1416 unsigned long flags;
1417
1418 save_flags(flags);
1419 cli();
1420 *e100_modem_pins[info->line].dtr_shadow &= ~mask;
1421 *e100_modem_pins[info->line].dtr_shadow |= (set ? 0 : mask);
1422 *e100_modem_pins[info->line].dtr_port = *e100_modem_pins[info->line].dtr_shadow;
1423 restore_flags(flags);
1424 }
1425
1426#ifdef SERIAL_DEBUG_IO
1427 printk("ser%i shadow after 0x%02X get: %i\n",
1428 info->line, *e100_modem_pins[info->line].dtr_shadow,
1429 E100_DTR_GET(info));
1430#endif
1431#endif
1432}
1433
1434/* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
1435 * 0=0V , 1=3.3V
1436 */
1437static inline void
1438e100_rts(struct e100_serial *info, int set)
1439{
1440#ifndef CONFIG_SVINTO_SIM
1441 unsigned long flags;
1442 save_flags(flags);
1443 cli();
1444 info->rx_ctrl &= ~E100_RTS_MASK;
1445 info->rx_ctrl |= (set ? 0 : E100_RTS_MASK); /* RTS is active low */
1446 info->port[REG_REC_CTRL] = info->rx_ctrl;
1447 restore_flags(flags);
1448#ifdef SERIAL_DEBUG_IO
1449 printk("ser%i rts %i\n", info->line, set);
1450#endif
1451#endif
1452}
1453
1454
1455/* If this behaves as a modem, RI and CD is an output */
1456static inline void
1457e100_ri_out(struct e100_serial *info, int set)
1458{
1459#ifndef CONFIG_SVINTO_SIM
1460 /* RI is active low */
1461 {
1462 unsigned char mask = e100_modem_pins[info->line].ri_mask;
1463 unsigned long flags;
1464
1465 save_flags(flags);
1466 cli();
1467 *e100_modem_pins[info->line].ri_shadow &= ~mask;
1468 *e100_modem_pins[info->line].ri_shadow |= (set ? 0 : mask);
1469 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1470 restore_flags(flags);
1471 }
1472#endif
1473}
1474static inline void
1475e100_cd_out(struct e100_serial *info, int set)
1476{
1477#ifndef CONFIG_SVINTO_SIM
1478 /* CD is active low */
1479 {
1480 unsigned char mask = e100_modem_pins[info->line].cd_mask;
1481 unsigned long flags;
1482
1483 save_flags(flags);
1484 cli();
1485 *e100_modem_pins[info->line].cd_shadow &= ~mask;
1486 *e100_modem_pins[info->line].cd_shadow |= (set ? 0 : mask);
1487 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1488 restore_flags(flags);
1489 }
1490#endif
1491}
1492
1493static inline void
1494e100_disable_rx(struct e100_serial *info)
1495{
1496#ifndef CONFIG_SVINTO_SIM
1497 /* disable the receiver */
1498 info->port[REG_REC_CTRL] =
1499 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1500#endif
1501}
1502
1503static inline void
1504e100_enable_rx(struct e100_serial *info)
1505{
1506#ifndef CONFIG_SVINTO_SIM
1507 /* enable the receiver */
1508 info->port[REG_REC_CTRL] =
1509 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1510#endif
1511}
1512
1513/* the rx DMA uses both the dma_descr and the dma_eop interrupts */
1514
1515static inline void
1516e100_disable_rxdma_irq(struct e100_serial *info)
1517{
1518#ifdef SERIAL_DEBUG_INTR
1519 printk("rxdma_irq(%d): 0\n",info->line);
1520#endif
1521 DINTR1(DEBUG_LOG(info->line,"IRQ disable_rxdma_irq %i\n", info->line));
1522 *R_IRQ_MASK2_CLR = (info->irq << 2) | (info->irq << 3);
1523}
1524
1525static inline void
1526e100_enable_rxdma_irq(struct e100_serial *info)
1527{
1528#ifdef SERIAL_DEBUG_INTR
1529 printk("rxdma_irq(%d): 1\n",info->line);
1530#endif
1531 DINTR1(DEBUG_LOG(info->line,"IRQ enable_rxdma_irq %i\n", info->line));
1532 *R_IRQ_MASK2_SET = (info->irq << 2) | (info->irq << 3);
1533}
1534
1535/* the tx DMA uses only dma_descr interrupt */
1536
Adrian Bunk41c28ff2006-03-23 03:00:56 -08001537static void e100_disable_txdma_irq(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001538{
1539#ifdef SERIAL_DEBUG_INTR
1540 printk("txdma_irq(%d): 0\n",info->line);
1541#endif
1542 DINTR1(DEBUG_LOG(info->line,"IRQ disable_txdma_irq %i\n", info->line));
1543 *R_IRQ_MASK2_CLR = info->irq;
1544}
1545
Adrian Bunk41c28ff2006-03-23 03:00:56 -08001546static void e100_enable_txdma_irq(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001547{
1548#ifdef SERIAL_DEBUG_INTR
1549 printk("txdma_irq(%d): 1\n",info->line);
1550#endif
1551 DINTR1(DEBUG_LOG(info->line,"IRQ enable_txdma_irq %i\n", info->line));
1552 *R_IRQ_MASK2_SET = info->irq;
1553}
1554
Adrian Bunk41c28ff2006-03-23 03:00:56 -08001555static void e100_disable_txdma_channel(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001556{
1557 unsigned long flags;
1558
1559 /* Disable output DMA channel for the serial port in question
1560 * ( set to something other then serialX)
1561 */
1562 save_flags(flags);
1563 cli();
1564 DFLOW(DEBUG_LOG(info->line, "disable_txdma_channel %i\n", info->line));
1565 if (info->line == 0) {
1566 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma6)) ==
1567 IO_STATE(R_GEN_CONFIG, dma6, serial0)) {
1568 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1569 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused);
1570 }
1571 } else if (info->line == 1) {
1572 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma8)) ==
1573 IO_STATE(R_GEN_CONFIG, dma8, serial1)) {
1574 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1575 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb);
1576 }
1577 } else if (info->line == 2) {
1578 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma2)) ==
1579 IO_STATE(R_GEN_CONFIG, dma2, serial2)) {
1580 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1581 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0);
1582 }
1583 } else if (info->line == 3) {
1584 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma4)) ==
1585 IO_STATE(R_GEN_CONFIG, dma4, serial3)) {
1586 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1587 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1);
1588 }
1589 }
1590 *R_GEN_CONFIG = genconfig_shadow;
1591 restore_flags(flags);
1592}
1593
1594
Adrian Bunk41c28ff2006-03-23 03:00:56 -08001595static void e100_enable_txdma_channel(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001596{
1597 unsigned long flags;
1598
1599 save_flags(flags);
1600 cli();
1601 DFLOW(DEBUG_LOG(info->line, "enable_txdma_channel %i\n", info->line));
1602 /* Enable output DMA channel for the serial port in question */
1603 if (info->line == 0) {
1604 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma6);
1605 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, serial0);
1606 } else if (info->line == 1) {
1607 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma8);
1608 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, serial1);
1609 } else if (info->line == 2) {
1610 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma2);
1611 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, serial2);
1612 } else if (info->line == 3) {
1613 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma4);
1614 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, serial3);
1615 }
1616 *R_GEN_CONFIG = genconfig_shadow;
1617 restore_flags(flags);
1618}
1619
Adrian Bunk41c28ff2006-03-23 03:00:56 -08001620static void e100_disable_rxdma_channel(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001621{
1622 unsigned long flags;
1623
1624 /* Disable input DMA channel for the serial port in question
1625 * ( set to something other then serialX)
1626 */
1627 save_flags(flags);
1628 cli();
1629 if (info->line == 0) {
1630 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma7)) ==
1631 IO_STATE(R_GEN_CONFIG, dma7, serial0)) {
1632 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1633 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, unused);
1634 }
1635 } else if (info->line == 1) {
1636 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma9)) ==
1637 IO_STATE(R_GEN_CONFIG, dma9, serial1)) {
1638 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1639 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, usb);
1640 }
1641 } else if (info->line == 2) {
1642 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma3)) ==
1643 IO_STATE(R_GEN_CONFIG, dma3, serial2)) {
1644 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1645 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0);
1646 }
1647 } else if (info->line == 3) {
1648 if ((genconfig_shadow & IO_MASK(R_GEN_CONFIG, dma5)) ==
1649 IO_STATE(R_GEN_CONFIG, dma5, serial3)) {
1650 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1651 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, par1);
1652 }
1653 }
1654 *R_GEN_CONFIG = genconfig_shadow;
1655 restore_flags(flags);
1656}
1657
1658
Adrian Bunk41c28ff2006-03-23 03:00:56 -08001659static void e100_enable_rxdma_channel(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001660{
1661 unsigned long flags;
1662
1663 save_flags(flags);
1664 cli();
1665 /* Enable input DMA channel for the serial port in question */
1666 if (info->line == 0) {
1667 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma7);
1668 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma7, serial0);
1669 } else if (info->line == 1) {
1670 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma9);
1671 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma9, serial1);
1672 } else if (info->line == 2) {
1673 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma3);
1674 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, serial2);
1675 } else if (info->line == 3) {
1676 genconfig_shadow &= ~IO_MASK(R_GEN_CONFIG, dma5);
1677 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma5, serial3);
1678 }
1679 *R_GEN_CONFIG = genconfig_shadow;
1680 restore_flags(flags);
1681}
1682
1683#ifdef SERIAL_HANDLE_EARLY_ERRORS
1684/* in order to detect and fix errors on the first byte
1685 we have to use the serial interrupts as well. */
1686
1687static inline void
1688e100_disable_serial_data_irq(struct e100_serial *info)
1689{
1690#ifdef SERIAL_DEBUG_INTR
1691 printk("ser_irq(%d): 0\n",info->line);
1692#endif
1693 DINTR1(DEBUG_LOG(info->line,"IRQ disable data_irq %i\n", info->line));
1694 *R_IRQ_MASK1_CLR = (1U << (8+2*info->line));
1695}
1696
1697static inline void
1698e100_enable_serial_data_irq(struct e100_serial *info)
1699{
1700#ifdef SERIAL_DEBUG_INTR
1701 printk("ser_irq(%d): 1\n",info->line);
1702 printk("**** %d = %d\n",
1703 (8+2*info->line),
1704 (1U << (8+2*info->line)));
1705#endif
1706 DINTR1(DEBUG_LOG(info->line,"IRQ enable data_irq %i\n", info->line));
1707 *R_IRQ_MASK1_SET = (1U << (8+2*info->line));
1708}
1709#endif
1710
1711static inline void
1712e100_disable_serial_tx_ready_irq(struct e100_serial *info)
1713{
1714#ifdef SERIAL_DEBUG_INTR
1715 printk("ser_tx_irq(%d): 0\n",info->line);
1716#endif
1717 DINTR1(DEBUG_LOG(info->line,"IRQ disable ready_irq %i\n", info->line));
1718 *R_IRQ_MASK1_CLR = (1U << (8+1+2*info->line));
1719}
1720
1721static inline void
1722e100_enable_serial_tx_ready_irq(struct e100_serial *info)
1723{
1724#ifdef SERIAL_DEBUG_INTR
1725 printk("ser_tx_irq(%d): 1\n",info->line);
1726 printk("**** %d = %d\n",
1727 (8+1+2*info->line),
1728 (1U << (8+1+2*info->line)));
1729#endif
1730 DINTR2(DEBUG_LOG(info->line,"IRQ enable ready_irq %i\n", info->line));
1731 *R_IRQ_MASK1_SET = (1U << (8+1+2*info->line));
1732}
1733
1734static inline void e100_enable_rx_irq(struct e100_serial *info)
1735{
1736 if (info->uses_dma_in)
1737 e100_enable_rxdma_irq(info);
1738 else
1739 e100_enable_serial_data_irq(info);
1740}
1741static inline void e100_disable_rx_irq(struct e100_serial *info)
1742{
1743 if (info->uses_dma_in)
1744 e100_disable_rxdma_irq(info);
1745 else
1746 e100_disable_serial_data_irq(info);
1747}
1748
1749#if defined(CONFIG_ETRAX_RS485)
1750/* Enable RS-485 mode on selected port. This is UGLY. */
1751static int
1752e100_enable_rs485(struct tty_struct *tty,struct rs485_control *r)
1753{
1754 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1755
1756#if defined(CONFIG_ETRAX_RS485_ON_PA)
1757 *R_PORT_PA_DATA = port_pa_data_shadow |= (1 << rs485_pa_bit);
1758#endif
1759#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
1760 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1761 rs485_port_g_bit, 1);
1762#endif
1763#if defined(CONFIG_ETRAX_RS485_LTC1387)
1764 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1765 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 1);
1766 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
1767 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 1);
1768#endif
1769
1770 info->rs485.rts_on_send = 0x01 & r->rts_on_send;
1771 info->rs485.rts_after_sent = 0x01 & r->rts_after_sent;
1772 if (r->delay_rts_before_send >= 1000)
1773 info->rs485.delay_rts_before_send = 1000;
1774 else
1775 info->rs485.delay_rts_before_send = r->delay_rts_before_send;
1776 info->rs485.enabled = r->enabled;
1777/* printk("rts: on send = %i, after = %i, enabled = %i",
1778 info->rs485.rts_on_send,
1779 info->rs485.rts_after_sent,
1780 info->rs485.enabled
1781 );
1782*/
1783 return 0;
1784}
1785
1786static int
1787e100_write_rs485(struct tty_struct *tty, int from_user,
1788 const unsigned char *buf, int count)
1789{
1790 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
1791 int old_enabled = info->rs485.enabled;
1792
1793 /* rs485 is always implicitly enabled if we're using the ioctl()
1794 * but it doesn't have to be set in the rs485_control
1795 * (to be backward compatible with old apps)
1796 * So we store, set and restore it.
1797 */
1798 info->rs485.enabled = 1;
1799 /* rs_write now deals with RS485 if enabled */
1800 count = rs_write(tty, from_user, buf, count);
1801 info->rs485.enabled = old_enabled;
1802 return count;
1803}
1804
1805#ifdef CONFIG_ETRAX_FAST_TIMER
1806/* Timer function to toggle RTS when using FAST_TIMER */
1807static void rs485_toggle_rts_timer_function(unsigned long data)
1808{
1809 struct e100_serial *info = (struct e100_serial *)data;
1810
1811 fast_timers_rs485[info->line].function = NULL;
1812 e100_rts(info, info->rs485.rts_after_sent);
1813#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
1814 e100_enable_rx(info);
1815 e100_enable_rx_irq(info);
1816#endif
1817}
1818#endif
1819#endif /* CONFIG_ETRAX_RS485 */
1820
1821/*
1822 * ------------------------------------------------------------
1823 * rs_stop() and rs_start()
1824 *
1825 * This routines are called before setting or resetting tty->stopped.
1826 * They enable or disable transmitter using the XOFF registers, as necessary.
1827 * ------------------------------------------------------------
1828 */
1829
1830static void
1831rs_stop(struct tty_struct *tty)
1832{
1833 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1834 if (info) {
1835 unsigned long flags;
1836 unsigned long xoff;
1837
1838 save_flags(flags); cli();
1839 DFLOW(DEBUG_LOG(info->line, "XOFF rs_stop xmit %i\n",
1840 CIRC_CNT(info->xmit.head,
1841 info->xmit.tail,SERIAL_XMIT_SIZE)));
1842
1843 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
1844 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, stop);
1845 if (tty->termios->c_iflag & IXON ) {
1846 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1847 }
1848
1849 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1850 restore_flags(flags);
1851 }
1852}
1853
1854static void
1855rs_start(struct tty_struct *tty)
1856{
1857 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
1858 if (info) {
1859 unsigned long flags;
1860 unsigned long xoff;
1861
1862 save_flags(flags); cli();
1863 DFLOW(DEBUG_LOG(info->line, "XOFF rs_start xmit %i\n",
1864 CIRC_CNT(info->xmit.head,
1865 info->xmit.tail,SERIAL_XMIT_SIZE)));
1866 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(tty));
1867 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
1868 if (tty->termios->c_iflag & IXON ) {
1869 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
1870 }
1871
1872 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
1873 if (!info->uses_dma_out &&
1874 info->xmit.head != info->xmit.tail && info->xmit.buf)
1875 e100_enable_serial_tx_ready_irq(info);
1876
1877 restore_flags(flags);
1878 }
1879}
1880
1881/*
1882 * ----------------------------------------------------------------------
1883 *
1884 * Here starts the interrupt handling routines. All of the following
1885 * subroutines are declared as inline and are folded into
1886 * rs_interrupt(). They were separated out for readability's sake.
1887 *
1888 * Note: rs_interrupt() is a "fast" interrupt, which means that it
1889 * runs with interrupts turned off. People who may want to modify
1890 * rs_interrupt() should try to keep the interrupt handler as fast as
1891 * possible. After you are done making modifications, it is not a bad
1892 * idea to do:
1893 *
1894 * gcc -S -DKERNEL -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer serial.c
1895 *
1896 * and look at the resulting assemble code in serial.s.
1897 *
1898 * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
1899 * -----------------------------------------------------------------------
1900 */
1901
1902/*
1903 * This routine is used by the interrupt handler to schedule
1904 * processing in the software interrupt portion of the driver.
1905 */
Adrian Bunk41c28ff2006-03-23 03:00:56 -08001906static void rs_sched_event(struct e100_serial *info, int event)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001907{
1908 if (info->event & (1 << event))
1909 return;
1910 info->event |= 1 << event;
1911 schedule_work(&info->work);
1912}
1913
1914/* The output DMA channel is free - use it to send as many chars as possible
1915 * NOTES:
1916 * We don't pay attention to info->x_char, which means if the TTY wants to
1917 * use XON/XOFF it will set info->x_char but we won't send any X char!
1918 *
1919 * To implement this, we'd just start a DMA send of 1 byte pointing at a
1920 * buffer containing the X char, and skip updating xmit. We'd also have to
1921 * check if the last sent char was the X char when we enter this function
1922 * the next time, to avoid updating xmit with the sent X value.
1923 */
1924
1925static void
1926transmit_chars_dma(struct e100_serial *info)
1927{
1928 unsigned int c, sentl;
1929 struct etrax_dma_descr *descr;
1930
1931#ifdef CONFIG_SVINTO_SIM
1932 /* This will output too little if tail is not 0 always since
1933 * we don't reloop to send the other part. Anyway this SHOULD be a
1934 * no-op - transmit_chars_dma would never really be called during sim
1935 * since rs_write does not write into the xmit buffer then.
1936 */
1937 if (info->xmit.tail)
1938 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1939 if (info->xmit.head != info->xmit.tail) {
1940 SIMCOUT(info->xmit.buf + info->xmit.tail,
1941 CIRC_CNT(info->xmit.head,
1942 info->xmit.tail,
1943 SERIAL_XMIT_SIZE));
1944 info->xmit.head = info->xmit.tail; /* move back head */
1945 info->tr_running = 0;
1946 }
1947 return;
1948#endif
1949 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1950 *info->oclrintradr =
1951 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
1952 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
1953
1954#ifdef SERIAL_DEBUG_INTR
1955 if (info->line == SERIAL_DEBUG_LINE)
1956 printk("tc\n");
1957#endif
1958 if (!info->tr_running) {
1959 /* weirdo... we shouldn't get here! */
1960 printk(KERN_WARNING "Achtung: transmit_chars_dma with !tr_running\n");
1961 return;
1962 }
1963
1964 descr = &info->tr_descr;
1965
1966 /* first get the amount of bytes sent during the last DMA transfer,
1967 and update xmit accordingly */
1968
1969 /* if the stop bit was not set, all data has been sent */
1970 if (!(descr->status & d_stop)) {
1971 sentl = descr->sw_len;
1972 } else
1973 /* otherwise we find the amount of data sent here */
1974 sentl = descr->hw_len;
1975
1976 DFLOW(DEBUG_LOG(info->line, "TX %i done\n", sentl));
1977
1978 /* update stats */
1979 info->icount.tx += sentl;
1980
1981 /* update xmit buffer */
1982 info->xmit.tail = (info->xmit.tail + sentl) & (SERIAL_XMIT_SIZE - 1);
1983
1984 /* if there is only a few chars left in the buf, wake up the blocked
1985 write if any */
1986 if (CIRC_CNT(info->xmit.head,
1987 info->xmit.tail,
1988 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
1989 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
1990
1991 /* find out the largest amount of consecutive bytes we want to send now */
1992
1993 c = CIRC_CNT_TO_END(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
1994
1995 /* Don't send all in one DMA transfer - divide it so we wake up
1996 * application before all is sent
1997 */
1998
1999 if (c >= 4*WAKEUP_CHARS)
2000 c = c/2;
2001
2002 if (c <= 0) {
2003 /* our job here is done, don't schedule any new DMA transfer */
2004 info->tr_running = 0;
2005
2006#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
2007 if (info->rs485.enabled) {
2008 /* Set a short timer to toggle RTS */
2009 start_one_shot_timer(&fast_timers_rs485[info->line],
2010 rs485_toggle_rts_timer_function,
2011 (unsigned long)info,
2012 info->char_time_usec*2,
2013 "RS-485");
2014 }
2015#endif /* RS485 */
2016 return;
2017 }
2018
2019 /* ok we can schedule a dma send of c chars starting at info->xmit.tail */
2020 /* set up the descriptor correctly for output */
2021 DFLOW(DEBUG_LOG(info->line, "TX %i\n", c));
2022 descr->ctrl = d_int | d_eol | d_wait; /* Wait needed for tty_wait_until_sent() */
2023 descr->sw_len = c;
2024 descr->buf = virt_to_phys(info->xmit.buf + info->xmit.tail);
2025 descr->status = 0;
2026
2027 *info->ofirstadr = virt_to_phys(descr); /* write to R_DMAx_FIRST */
2028 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2029
2030 /* DMA is now running (hopefully) */
2031} /* transmit_chars_dma */
2032
2033static void
2034start_transmit(struct e100_serial *info)
2035{
2036#if 0
2037 if (info->line == SERIAL_DEBUG_LINE)
2038 printk("x\n");
2039#endif
2040
2041 info->tr_descr.sw_len = 0;
2042 info->tr_descr.hw_len = 0;
2043 info->tr_descr.status = 0;
2044 info->tr_running = 1;
2045 if (info->uses_dma_out)
2046 transmit_chars_dma(info);
2047 else
2048 e100_enable_serial_tx_ready_irq(info);
2049} /* start_transmit */
2050
2051#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2052static int serial_fast_timer_started = 0;
2053static int serial_fast_timer_expired = 0;
2054static void flush_timeout_function(unsigned long data);
2055#define START_FLUSH_FAST_TIMER_TIME(info, string, usec) {\
2056 unsigned long timer_flags; \
2057 save_flags(timer_flags); \
2058 cli(); \
2059 if (fast_timers[info->line].function == NULL) { \
2060 serial_fast_timer_started++; \
2061 TIMERD(DEBUG_LOG(info->line, "start_timer %i ", info->line)); \
2062 TIMERD(DEBUG_LOG(info->line, "num started: %i\n", serial_fast_timer_started)); \
2063 start_one_shot_timer(&fast_timers[info->line], \
2064 flush_timeout_function, \
2065 (unsigned long)info, \
2066 (usec), \
2067 string); \
2068 } \
2069 else { \
2070 TIMERD(DEBUG_LOG(info->line, "timer %i already running\n", info->line)); \
2071 } \
2072 restore_flags(timer_flags); \
2073}
2074#define START_FLUSH_FAST_TIMER(info, string) START_FLUSH_FAST_TIMER_TIME(info, string, info->flush_time_usec)
2075
2076#else
2077#define START_FLUSH_FAST_TIMER_TIME(info, string, usec)
2078#define START_FLUSH_FAST_TIMER(info, string)
2079#endif
2080
2081static struct etrax_recv_buffer *
2082alloc_recv_buffer(unsigned int size)
2083{
2084 struct etrax_recv_buffer *buffer;
2085
2086 if (!(buffer = kmalloc(sizeof *buffer + size, GFP_ATOMIC)))
2087 return NULL;
2088
2089 buffer->next = NULL;
2090 buffer->length = 0;
2091 buffer->error = TTY_NORMAL;
2092
2093 return buffer;
2094}
2095
2096static void
2097append_recv_buffer(struct e100_serial *info, struct etrax_recv_buffer *buffer)
2098{
2099 unsigned long flags;
2100
2101 save_flags(flags);
2102 cli();
2103
2104 if (!info->first_recv_buffer)
2105 info->first_recv_buffer = buffer;
2106 else
2107 info->last_recv_buffer->next = buffer;
2108
2109 info->last_recv_buffer = buffer;
2110
2111 info->recv_cnt += buffer->length;
2112 if (info->recv_cnt > info->max_recv_cnt)
2113 info->max_recv_cnt = info->recv_cnt;
2114
2115 restore_flags(flags);
2116}
2117
2118static int
2119add_char_and_flag(struct e100_serial *info, unsigned char data, unsigned char flag)
2120{
2121 struct etrax_recv_buffer *buffer;
2122 if (info->uses_dma_in) {
2123 if (!(buffer = alloc_recv_buffer(4)))
2124 return 0;
2125
2126 buffer->length = 1;
2127 buffer->error = flag;
2128 buffer->buffer[0] = data;
2129
2130 append_recv_buffer(info, buffer);
2131
2132 info->icount.rx++;
2133 } else {
2134 struct tty_struct *tty = info->tty;
2135 *tty->flip.char_buf_ptr = data;
2136 *tty->flip.flag_buf_ptr = flag;
2137 tty->flip.flag_buf_ptr++;
2138 tty->flip.char_buf_ptr++;
2139 tty->flip.count++;
2140 info->icount.rx++;
2141 }
2142
2143 return 1;
2144}
2145
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002146static unsigned int handle_descr_data(struct e100_serial *info,
2147 struct etrax_dma_descr *descr,
2148 unsigned int recvl)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002149{
2150 struct etrax_recv_buffer *buffer = phys_to_virt(descr->buf) - sizeof *buffer;
2151
2152 if (info->recv_cnt + recvl > 65536) {
2153 printk(KERN_CRIT
2154 "%s: Too much pending incoming serial data! Dropping %u bytes.\n", __FUNCTION__, recvl);
2155 return 0;
2156 }
2157
2158 buffer->length = recvl;
2159
2160 if (info->errorcode == ERRCODE_SET_BREAK)
2161 buffer->error = TTY_BREAK;
2162 info->errorcode = 0;
2163
2164 append_recv_buffer(info, buffer);
2165
2166 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2167 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2168
2169 descr->buf = virt_to_phys(buffer->buffer);
2170
2171 return recvl;
2172}
2173
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002174static unsigned int handle_all_descr_data(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002175{
2176 struct etrax_dma_descr *descr;
2177 unsigned int recvl;
2178 unsigned int ret = 0;
2179
2180 while (1)
2181 {
2182 descr = &info->rec_descr[info->cur_rec_descr];
2183
2184 if (descr == phys_to_virt(*info->idescradr))
2185 break;
2186
2187 if (++info->cur_rec_descr == SERIAL_RECV_DESCRIPTORS)
2188 info->cur_rec_descr = 0;
2189
2190 /* find out how many bytes were read */
2191
2192 /* if the eop bit was not set, all data has been received */
2193 if (!(descr->status & d_eop)) {
2194 recvl = descr->sw_len;
2195 } else {
2196 /* otherwise we find the amount of data received here */
2197 recvl = descr->hw_len;
2198 }
2199
2200 /* Reset the status information */
2201 descr->status = 0;
2202
2203 DFLOW( DEBUG_LOG(info->line, "RX %lu\n", recvl);
2204 if (info->tty->stopped) {
2205 unsigned char *buf = phys_to_virt(descr->buf);
2206 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[0]);
2207 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[1]);
2208 DEBUG_LOG(info->line, "rx 0x%02X\n", buf[2]);
2209 }
2210 );
2211
2212 /* update stats */
2213 info->icount.rx += recvl;
2214
2215 ret += handle_descr_data(info, descr, recvl);
2216 }
2217
2218 return ret;
2219}
2220
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002221static void receive_chars_dma(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002222{
2223 struct tty_struct *tty;
2224 unsigned char rstat;
2225
2226#ifdef CONFIG_SVINTO_SIM
2227 /* No receive in the simulator. Will probably be when the rest of
2228 * the serial interface works, and this piece will just be removed.
2229 */
2230 return;
2231#endif
2232
2233 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
2234 *info->iclrintradr =
2235 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
2236 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
2237
2238 tty = info->tty;
2239 if (!tty) /* Something wrong... */
2240 return;
2241
2242#ifdef SERIAL_HANDLE_EARLY_ERRORS
2243 if (info->uses_dma_in)
2244 e100_enable_serial_data_irq(info);
2245#endif
2246
2247 if (info->errorcode == ERRCODE_INSERT_BREAK)
2248 add_char_and_flag(info, '\0', TTY_BREAK);
2249
2250 handle_all_descr_data(info);
2251
2252 /* Read the status register to detect errors */
2253 rstat = info->port[REG_STATUS];
2254 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2255 DFLOW(DEBUG_LOG(info->line, "XOFF detect stat %x\n", rstat));
2256 }
2257
2258 if (rstat & SER_ERROR_MASK) {
2259 /* If we got an error, we must reset it by reading the
2260 * data_in field
2261 */
2262 unsigned char data = info->port[REG_DATA];
2263
2264 PROCSTAT(ser_stat[info->line].errors_cnt++);
2265 DEBUG_LOG(info->line, "#dERR: s d 0x%04X\n",
2266 ((rstat & SER_ERROR_MASK) << 8) | data);
2267
2268 if (rstat & SER_PAR_ERR_MASK)
2269 add_char_and_flag(info, data, TTY_PARITY);
2270 else if (rstat & SER_OVERRUN_MASK)
2271 add_char_and_flag(info, data, TTY_OVERRUN);
2272 else if (rstat & SER_FRAMING_ERR_MASK)
2273 add_char_and_flag(info, data, TTY_FRAME);
2274 }
2275
2276 START_FLUSH_FAST_TIMER(info, "receive_chars");
2277
2278 /* Restart the receiving DMA */
2279 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2280}
2281
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002282static int start_recv_dma(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002283{
2284 struct etrax_dma_descr *descr = info->rec_descr;
2285 struct etrax_recv_buffer *buffer;
2286 int i;
2287
2288 /* Set up the receiving descriptors */
2289 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++) {
2290 if (!(buffer = alloc_recv_buffer(SERIAL_DESCR_BUF_SIZE)))
2291 panic("%s: Failed to allocate memory for receive buffer!\n", __FUNCTION__);
2292
2293 descr[i].ctrl = d_int;
2294 descr[i].buf = virt_to_phys(buffer->buffer);
2295 descr[i].sw_len = SERIAL_DESCR_BUF_SIZE;
2296 descr[i].hw_len = 0;
2297 descr[i].status = 0;
2298 descr[i].next = virt_to_phys(&descr[i+1]);
2299 }
2300
2301 /* Link the last descriptor to the first */
2302 descr[i-1].next = virt_to_phys(&descr[0]);
2303
2304 /* Start with the first descriptor in the list */
2305 info->cur_rec_descr = 0;
2306
2307 /* Start the DMA */
2308 *info->ifirstadr = virt_to_phys(&descr[info->cur_rec_descr]);
2309 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, start);
2310
2311 /* Input DMA should be running now */
2312 return 1;
2313}
2314
2315static void
2316start_receive(struct e100_serial *info)
2317{
2318#ifdef CONFIG_SVINTO_SIM
2319 /* No receive in the simulator. Will probably be when the rest of
2320 * the serial interface works, and this piece will just be removed.
2321 */
2322 return;
2323#endif
2324 info->tty->flip.count = 0;
2325 if (info->uses_dma_in) {
2326 /* reset the input dma channel to be sure it works */
2327
2328 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
2329 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
2330 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
2331
2332 start_recv_dma(info);
2333 }
2334}
2335
2336
Linus Torvalds1da177e2005-04-16 15:20:36 -07002337/* the bits in the MASK2 register are laid out like this:
2338 DMAI_EOP DMAI_DESCR DMAO_EOP DMAO_DESCR
2339 where I is the input channel and O is the output channel for the port.
2340 info->irq is the bit number for the DMAO_DESCR so to check the others we
2341 shift info->irq to the left.
2342*/
2343
2344/* dma output channel interrupt handler
2345 this interrupt is called from DMA2(ser2), DMA4(ser3), DMA6(ser0) or
2346 DMA8(ser1) when they have finished a descriptor with the intr flag set.
2347*/
2348
2349static irqreturn_t
2350tr_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2351{
2352 struct e100_serial *info;
2353 unsigned long ireg;
2354 int i;
2355 int handled = 0;
2356
2357#ifdef CONFIG_SVINTO_SIM
2358 /* No receive in the simulator. Will probably be when the rest of
2359 * the serial interface works, and this piece will just be removed.
2360 */
2361 {
2362 const char *s = "What? tr_interrupt in simulator??\n";
2363 SIMCOUT(s,strlen(s));
2364 }
2365 return IRQ_HANDLED;
2366#endif
2367
2368 /* find out the line that caused this irq and get it from rs_table */
2369
2370 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2371
2372 for (i = 0; i < NR_PORTS; i++) {
2373 info = rs_table + i;
2374 if (!info->enabled || !info->uses_dma_out)
2375 continue;
2376 /* check for dma_descr (don't need to check for dma_eop in output dma for serial */
2377 if (ireg & info->irq) {
2378 handled = 1;
2379 /* we can send a new dma bunch. make it so. */
2380 DINTR2(DEBUG_LOG(info->line, "tr_interrupt %i\n", i));
2381 /* Read jiffies_usec first,
2382 * we want this time to be as late as possible
2383 */
2384 PROCSTAT(ser_stat[info->line].tx_dma_ints++);
2385 info->last_tx_active_usec = GET_JIFFIES_USEC();
2386 info->last_tx_active = jiffies;
2387 transmit_chars_dma(info);
2388 }
2389
2390 /* FIXME: here we should really check for a change in the
2391 status lines and if so call status_handle(info) */
2392 }
2393 return IRQ_RETVAL(handled);
2394} /* tr_interrupt */
2395
2396/* dma input channel interrupt handler */
2397
2398static irqreturn_t
2399rec_interrupt(int irq, void *dev_id, struct pt_regs * regs)
2400{
2401 struct e100_serial *info;
2402 unsigned long ireg;
2403 int i;
2404 int handled = 0;
2405
2406#ifdef CONFIG_SVINTO_SIM
2407 /* No receive in the simulator. Will probably be when the rest of
2408 * the serial interface works, and this piece will just be removed.
2409 */
2410 {
2411 const char *s = "What? rec_interrupt in simulator??\n";
2412 SIMCOUT(s,strlen(s));
2413 }
2414 return IRQ_HANDLED;
2415#endif
2416
2417 /* find out the line that caused this irq and get it from rs_table */
2418
2419 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
2420
2421 for (i = 0; i < NR_PORTS; i++) {
2422 info = rs_table + i;
2423 if (!info->enabled || !info->uses_dma_in)
2424 continue;
2425 /* check for both dma_eop and dma_descr for the input dma channel */
2426 if (ireg & ((info->irq << 2) | (info->irq << 3))) {
2427 handled = 1;
2428 /* we have received something */
2429 receive_chars_dma(info);
2430 }
2431
2432 /* FIXME: here we should really check for a change in the
2433 status lines and if so call status_handle(info) */
2434 }
2435 return IRQ_RETVAL(handled);
2436} /* rec_interrupt */
2437
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002438static int force_eop_if_needed(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002439{
2440 /* We check data_avail bit to determine if data has
2441 * arrived since last time
2442 */
2443 unsigned char rstat = info->port[REG_STATUS];
2444
2445 /* error or datavail? */
2446 if (rstat & SER_ERROR_MASK) {
2447 /* Some error has occurred. If there has been valid data, an
2448 * EOP interrupt will be made automatically. If no data, the
2449 * normal ser_interrupt should be enabled and handle it.
2450 * So do nothing!
2451 */
2452 DEBUG_LOG(info->line, "timeout err: rstat 0x%03X\n",
2453 rstat | (info->line << 8));
2454 return 0;
2455 }
2456
2457 if (rstat & SER_DATA_AVAIL_MASK) {
2458 /* Ok data, no error, count it */
2459 TIMERD(DEBUG_LOG(info->line, "timeout: rstat 0x%03X\n",
2460 rstat | (info->line << 8)));
2461 /* Read data to clear status flags */
2462 (void)info->port[REG_DATA];
2463
2464 info->forced_eop = 0;
2465 START_FLUSH_FAST_TIMER(info, "magic");
2466 return 0;
2467 }
2468
2469 /* hit the timeout, force an EOP for the input
2470 * dma channel if we haven't already
2471 */
2472 if (!info->forced_eop) {
2473 info->forced_eop = 1;
2474 PROCSTAT(ser_stat[info->line].timeout_flush_cnt++);
2475 TIMERD(DEBUG_LOG(info->line, "timeout EOP %i\n", info->line));
2476 FORCE_EOP(info);
2477 }
2478
2479 return 1;
2480}
2481
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002482static void flush_to_flip_buffer(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002483{
2484 struct tty_struct *tty;
2485 struct etrax_recv_buffer *buffer;
2486 unsigned int length;
2487 unsigned long flags;
2488 int max_flip_size;
2489
2490 if (!info->first_recv_buffer)
2491 return;
2492
2493 save_flags(flags);
2494 cli();
2495
2496 if (!(tty = info->tty)) {
2497 restore_flags(flags);
2498 return;
2499 }
2500
2501 length = tty->flip.count;
2502 /* Don't flip more than the ldisc has room for.
2503 * The return value from ldisc.receive_room(tty) - might not be up to
2504 * date, the previous flip of up to TTY_FLIPBUF_SIZE might be on the
2505 * processed and not accounted for yet.
2506 * Since we use DMA, 1 SERIAL_DESCR_BUF_SIZE could be on the way.
2507 * Lets buffer data here and let flow control take care of it.
2508 * Since we normally flip large chunks, the ldisc don't react
2509 * with throttle until too late if we flip to much.
2510 */
2511 max_flip_size = tty->ldisc.receive_room(tty);
2512 if (max_flip_size < 0)
2513 max_flip_size = 0;
2514 if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2515 length + info->recv_cnt + /* We have this queued */
2516 2*SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2517 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2518 /* check TTY_THROTTLED first so it indicates our state */
2519 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2520 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles room %lu\n", max_flip_size));
2521 rs_throttle(tty);
2522 }
2523#if 0
2524 else if (max_flip_size <= (TTY_FLIPBUF_SIZE + /* Maybe not accounted for */
2525 length + info->recv_cnt + /* We have this queued */
2526 SERIAL_DESCR_BUF_SIZE + /* This could be on the way */
2527 TTY_THRESHOLD_THROTTLE)) { /* Some slack */
2528 DFLOW(DEBUG_LOG(info->line,"flush_to_flip throttles again! %lu\n", max_flip_size));
2529 rs_throttle(tty);
2530 }
2531#endif
2532 }
2533
2534 if (max_flip_size > TTY_FLIPBUF_SIZE)
2535 max_flip_size = TTY_FLIPBUF_SIZE;
2536
2537 while ((buffer = info->first_recv_buffer) && length < max_flip_size) {
2538 unsigned int count = buffer->length;
2539
2540 if (length + count > max_flip_size)
2541 count = max_flip_size - length;
2542
2543 memcpy(tty->flip.char_buf_ptr + length, buffer->buffer, count);
2544 memset(tty->flip.flag_buf_ptr + length, TTY_NORMAL, count);
2545 tty->flip.flag_buf_ptr[length] = buffer->error;
2546
2547 length += count;
2548 info->recv_cnt -= count;
2549 DFLIP(DEBUG_LOG(info->line,"flip: %i\n", length));
2550
2551 if (count == buffer->length) {
2552 info->first_recv_buffer = buffer->next;
2553 kfree(buffer);
2554 } else {
2555 buffer->length -= count;
2556 memmove(buffer->buffer, buffer->buffer + count, buffer->length);
2557 buffer->error = TTY_NORMAL;
2558 }
2559 }
2560
2561 if (!info->first_recv_buffer)
2562 info->last_recv_buffer = NULL;
2563
2564 tty->flip.count = length;
2565 DFLIP(if (tty->ldisc.chars_in_buffer(tty) > 3500) {
2566 DEBUG_LOG(info->line, "ldisc %lu\n",
2567 tty->ldisc.chars_in_buffer(tty));
2568 DEBUG_LOG(info->line, "flip.count %lu\n",
2569 tty->flip.count);
2570 }
2571 );
2572 restore_flags(flags);
2573
2574 DFLIP(
2575 if (1) {
2576
2577 if (test_bit(TTY_DONT_FLIP, &tty->flags)) {
2578 DEBUG_LOG(info->line, "*** TTY_DONT_FLIP set flip.count %i ***\n", tty->flip.count);
2579 DEBUG_LOG(info->line, "*** recv_cnt %i\n", info->recv_cnt);
2580 } else {
2581 }
2582 DEBUG_LOG(info->line, "*** rxtot %i\n", info->icount.rx);
2583 DEBUG_LOG(info->line, "ldisc %lu\n", tty->ldisc.chars_in_buffer(tty));
2584 DEBUG_LOG(info->line, "room %lu\n", tty->ldisc.receive_room(tty));
2585 }
2586
2587 );
2588
2589 /* this includes a check for low-latency */
2590 tty_flip_buffer_push(tty);
2591}
2592
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002593static void check_flush_timeout(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002594{
2595 /* Flip what we've got (if we can) */
2596 flush_to_flip_buffer(info);
2597
2598 /* We might need to flip later, but not to fast
2599 * since the system is busy processing input... */
2600 if (info->first_recv_buffer)
2601 START_FLUSH_FAST_TIMER_TIME(info, "flip", 2000);
2602
2603 /* Force eop last, since data might have come while we're processing
2604 * and if we started the slow timer above, we won't start a fast
2605 * below.
2606 */
2607 force_eop_if_needed(info);
2608}
2609
2610#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
2611static void flush_timeout_function(unsigned long data)
2612{
2613 struct e100_serial *info = (struct e100_serial *)data;
2614
2615 fast_timers[info->line].function = NULL;
2616 serial_fast_timer_expired++;
2617 TIMERD(DEBUG_LOG(info->line, "flush_timout %i ", info->line));
2618 TIMERD(DEBUG_LOG(info->line, "num expired: %i\n", serial_fast_timer_expired));
2619 check_flush_timeout(info);
2620}
2621
2622#else
2623
2624/* dma fifo/buffer timeout handler
2625 forces an end-of-packet for the dma input channel if no chars
2626 have been received for CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS/100 s.
2627*/
2628
2629static struct timer_list flush_timer;
2630
2631static void
2632timed_flush_handler(unsigned long ptr)
2633{
2634 struct e100_serial *info;
2635 int i;
2636
2637#ifdef CONFIG_SVINTO_SIM
2638 return;
2639#endif
2640
2641 for (i = 0; i < NR_PORTS; i++) {
2642 info = rs_table + i;
2643 if (info->uses_dma_in)
2644 check_flush_timeout(info);
2645 }
2646
2647 /* restart flush timer */
2648 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
2649}
2650#endif
2651
2652#ifdef SERIAL_HANDLE_EARLY_ERRORS
2653
2654/* If there is an error (ie break) when the DMA is running and
2655 * there are no bytes in the fifo the DMA is stopped and we get no
2656 * eop interrupt. Thus we have to monitor the first bytes on a DMA
2657 * transfer, and if it is without error we can turn the serial
2658 * interrupts off.
2659 */
2660
2661/*
2662BREAK handling on ETRAX 100:
2663ETRAX will generate interrupt although there is no stop bit between the
2664characters.
2665
2666Depending on how long the break sequence is, the end of the breaksequence
2667will look differently:
2668| indicates start/end of a character.
2669
2670B= Break character (0x00) with framing error.
2671E= Error byte with parity error received after B characters.
2672F= "Faked" valid byte received immediately after B characters.
2673V= Valid byte
2674
26751.
2676 B BL ___________________________ V
2677.._|__________|__________| |valid data |
2678
2679Multiple frame errors with data == 0x00 (B),
2680the timing matches up "perfectly" so no extra ending char is detected.
2681The RXD pin is 1 in the last interrupt, in that case
2682we set info->errorcode = ERRCODE_INSERT_BREAK, but we can't really
2683know if another byte will come and this really is case 2. below
2684(e.g F=0xFF or 0xFE)
2685If RXD pin is 0 we can expect another character (see 2. below).
2686
2687
26882.
2689
2690 B B E or F__________________..__ V
2691.._|__________|__________|______ | |valid data
2692 "valid" or
2693 parity error
2694
2695Multiple frame errors with data == 0x00 (B),
2696but the part of the break trigs is interpreted as a start bit (and possibly
2697some 0 bits followed by a number of 1 bits and a stop bit).
2698Depending on parity settings etc. this last character can be either
2699a fake "valid" char (F) or have a parity error (E).
2700
2701If the character is valid it will be put in the buffer,
2702we set info->errorcode = ERRCODE_SET_BREAK so the receive interrupt
2703will set the flags so the tty will handle it,
2704if it's an error byte it will not be put in the buffer
2705and we set info->errorcode = ERRCODE_INSERT_BREAK.
2706
2707To distinguish a V byte in 1. from an F byte in 2. we keep a timestamp
2708of the last faulty char (B) and compares it with the current time:
2709If the time elapsed time is less then 2*char_time_usec we will assume
2710it's a faked F char and not a Valid char and set
2711info->errorcode = ERRCODE_SET_BREAK.
2712
2713Flaws in the above solution:
2714~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2715We use the timer to distinguish a F character from a V character,
2716if a V character is to close after the break we might make the wrong decision.
2717
2718TODO: The break will be delayed until an F or V character is received.
2719
2720*/
2721
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002722static
Linus Torvalds1da177e2005-04-16 15:20:36 -07002723struct e100_serial * handle_ser_rx_interrupt_no_dma(struct e100_serial *info)
2724{
2725 unsigned long data_read;
2726 struct tty_struct *tty = info->tty;
2727
2728 if (!tty) {
2729 printk("!NO TTY!\n");
2730 return info;
2731 }
2732 if (tty->flip.count >= TTY_FLIPBUF_SIZE - TTY_THRESHOLD_THROTTLE) {
2733 /* check TTY_THROTTLED first so it indicates our state */
2734 if (!test_and_set_bit(TTY_THROTTLED, &tty->flags)) {
2735 DFLOW(DEBUG_LOG(info->line, "rs_throttle flip.count: %i\n", tty->flip.count));
2736 rs_throttle(tty);
2737 }
2738 }
2739 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2740 DEBUG_LOG(info->line, "force FLIP! %i\n", tty->flip.count);
2741 tty->flip.work.func((void *) tty);
2742 if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
2743 DEBUG_LOG(info->line, "FLIP FULL! %i\n", tty->flip.count);
2744 return info; /* if TTY_DONT_FLIP is set */
2745 }
2746 }
2747 /* Read data and status at the same time */
2748 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2749more_data:
2750 if (data_read & IO_MASK(R_SERIAL0_READ, xoff_detect) ) {
2751 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2752 }
2753 DINTR2(DEBUG_LOG(info->line, "ser_rx %c\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read)));
2754
2755 if (data_read & ( IO_MASK(R_SERIAL0_READ, framing_err) |
2756 IO_MASK(R_SERIAL0_READ, par_err) |
2757 IO_MASK(R_SERIAL0_READ, overrun) )) {
2758 /* An error */
2759 info->last_rx_active_usec = GET_JIFFIES_USEC();
2760 info->last_rx_active = jiffies;
2761 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat_data %04X\n", data_read));
2762 DLOG_INT_TRIG(
2763 if (!log_int_trig1_pos) {
2764 log_int_trig1_pos = log_int_pos;
2765 log_int(rdpc(), 0, 0);
2766 }
2767 );
2768
2769
2770 if ( ((data_read & IO_MASK(R_SERIAL0_READ, data_in)) == 0) &&
2771 (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) ) {
2772 /* Most likely a break, but we get interrupts over and
2773 * over again.
2774 */
2775
2776 if (!info->break_detected_cnt) {
2777 DEBUG_LOG(info->line, "#BRK start\n", 0);
2778 }
2779 if (data_read & IO_MASK(R_SERIAL0_READ, rxd)) {
2780 /* The RX pin is high now, so the break
2781 * must be over, but....
2782 * we can't really know if we will get another
2783 * last byte ending the break or not.
2784 * And we don't know if the byte (if any) will
2785 * have an error or look valid.
2786 */
2787 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2788 info->errorcode = ERRCODE_INSERT_BREAK;
2789 }
2790 info->break_detected_cnt++;
2791 } else {
2792 /* The error does not look like a break, but could be
2793 * the end of one
2794 */
2795 if (info->break_detected_cnt) {
2796 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2797 info->errorcode = ERRCODE_INSERT_BREAK;
2798 } else {
2799 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2800 info->icount.brk++;
2801 *tty->flip.char_buf_ptr = 0;
2802 *tty->flip.flag_buf_ptr = TTY_BREAK;
2803 tty->flip.flag_buf_ptr++;
2804 tty->flip.char_buf_ptr++;
2805 tty->flip.count++;
2806 info->icount.rx++;
2807 }
2808 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2809
2810 if (data_read & IO_MASK(R_SERIAL0_READ, par_err)) {
2811 info->icount.parity++;
2812 *tty->flip.flag_buf_ptr = TTY_PARITY;
2813 } else if (data_read & IO_MASK(R_SERIAL0_READ, overrun)) {
2814 info->icount.overrun++;
2815 *tty->flip.flag_buf_ptr = TTY_OVERRUN;
2816 } else if (data_read & IO_MASK(R_SERIAL0_READ, framing_err)) {
2817 info->icount.frame++;
2818 *tty->flip.flag_buf_ptr = TTY_FRAME;
2819 }
2820 info->errorcode = 0;
2821 }
2822 info->break_detected_cnt = 0;
2823 }
2824 } else if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2825 /* No error */
2826 DLOG_INT_TRIG(
2827 if (!log_int_trig1_pos) {
2828 if (log_int_pos >= log_int_size) {
2829 log_int_pos = 0;
2830 }
2831 log_int_trig0_pos = log_int_pos;
2832 log_int(rdpc(), 0, 0);
2833 }
2834 );
2835 *tty->flip.char_buf_ptr = IO_EXTRACT(R_SERIAL0_READ, data_in, data_read);
2836 *tty->flip.flag_buf_ptr = 0;
2837 } else {
2838 DEBUG_LOG(info->line, "ser_rx int but no data_avail %08lX\n", data_read);
2839 }
2840
2841
2842 tty->flip.flag_buf_ptr++;
2843 tty->flip.char_buf_ptr++;
2844 tty->flip.count++;
2845 info->icount.rx++;
2846 data_read = *((unsigned long *)&info->port[REG_DATA_STATUS32]);
2847 if (data_read & IO_MASK(R_SERIAL0_READ, data_avail)) {
2848 DEBUG_LOG(info->line, "ser_rx %c in loop\n", IO_EXTRACT(R_SERIAL0_READ, data_in, data_read));
2849 goto more_data;
2850 }
2851
2852 tty_flip_buffer_push(info->tty);
2853 return info;
2854}
2855
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002856static struct e100_serial* handle_ser_rx_interrupt(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002857{
2858 unsigned char rstat;
2859
2860#ifdef SERIAL_DEBUG_INTR
2861 printk("Interrupt from serport %d\n", i);
2862#endif
2863/* DEBUG_LOG(info->line, "ser_interrupt stat %03X\n", rstat | (i << 8)); */
2864 if (!info->uses_dma_in) {
2865 return handle_ser_rx_interrupt_no_dma(info);
2866 }
2867 /* DMA is used */
2868 rstat = info->port[REG_STATUS];
2869 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) ) {
2870 DFLOW(DEBUG_LOG(info->line, "XOFF detect\n", 0));
2871 }
2872
2873 if (rstat & SER_ERROR_MASK) {
2874 unsigned char data;
2875
2876 info->last_rx_active_usec = GET_JIFFIES_USEC();
2877 info->last_rx_active = jiffies;
2878 /* If we got an error, we must reset it by reading the
2879 * data_in field
2880 */
2881 data = info->port[REG_DATA];
2882 DINTR1(DEBUG_LOG(info->line, "ser_rx! %c\n", data));
2883 DINTR1(DEBUG_LOG(info->line, "ser_rx err stat %02X\n", rstat));
2884 if (!data && (rstat & SER_FRAMING_ERR_MASK)) {
2885 /* Most likely a break, but we get interrupts over and
2886 * over again.
2887 */
2888
2889 if (!info->break_detected_cnt) {
2890 DEBUG_LOG(info->line, "#BRK start\n", 0);
2891 }
2892 if (rstat & SER_RXD_MASK) {
2893 /* The RX pin is high now, so the break
2894 * must be over, but....
2895 * we can't really know if we will get another
2896 * last byte ending the break or not.
2897 * And we don't know if the byte (if any) will
2898 * have an error or look valid.
2899 */
2900 DEBUG_LOG(info->line, "# BL BRK\n", 0);
2901 info->errorcode = ERRCODE_INSERT_BREAK;
2902 }
2903 info->break_detected_cnt++;
2904 } else {
2905 /* The error does not look like a break, but could be
2906 * the end of one
2907 */
2908 if (info->break_detected_cnt) {
2909 DEBUG_LOG(info->line, "EBRK %i\n", info->break_detected_cnt);
2910 info->errorcode = ERRCODE_INSERT_BREAK;
2911 } else {
2912 if (info->errorcode == ERRCODE_INSERT_BREAK) {
2913 info->icount.brk++;
2914 add_char_and_flag(info, '\0', TTY_BREAK);
2915 }
2916
2917 if (rstat & SER_PAR_ERR_MASK) {
2918 info->icount.parity++;
2919 add_char_and_flag(info, data, TTY_PARITY);
2920 } else if (rstat & SER_OVERRUN_MASK) {
2921 info->icount.overrun++;
2922 add_char_and_flag(info, data, TTY_OVERRUN);
2923 } else if (rstat & SER_FRAMING_ERR_MASK) {
2924 info->icount.frame++;
2925 add_char_and_flag(info, data, TTY_FRAME);
2926 }
2927
2928 info->errorcode = 0;
2929 }
2930 info->break_detected_cnt = 0;
2931 DEBUG_LOG(info->line, "#iERR s d %04X\n",
2932 ((rstat & SER_ERROR_MASK) << 8) | data);
2933 }
2934 PROCSTAT(ser_stat[info->line].early_errors_cnt++);
2935 } else { /* It was a valid byte, now let the DMA do the rest */
2936 unsigned long curr_time_u = GET_JIFFIES_USEC();
2937 unsigned long curr_time = jiffies;
2938
2939 if (info->break_detected_cnt) {
2940 /* Detect if this character is a new valid char or the
2941 * last char in a break sequence: If LSBits are 0 and
2942 * MSBits are high AND the time is close to the
2943 * previous interrupt we should discard it.
2944 */
2945 long elapsed_usec =
2946 (curr_time - info->last_rx_active) * (1000000/HZ) +
2947 curr_time_u - info->last_rx_active_usec;
2948 if (elapsed_usec < 2*info->char_time_usec) {
2949 DEBUG_LOG(info->line, "FBRK %i\n", info->line);
2950 /* Report as BREAK (error) and let
2951 * receive_chars_dma() handle it
2952 */
2953 info->errorcode = ERRCODE_SET_BREAK;
2954 } else {
2955 DEBUG_LOG(info->line, "Not end of BRK (V)%i\n", info->line);
2956 }
2957 DEBUG_LOG(info->line, "num brk %i\n", info->break_detected_cnt);
2958 }
2959
2960#ifdef SERIAL_DEBUG_INTR
2961 printk("** OK, disabling ser_interrupts\n");
2962#endif
2963 e100_disable_serial_data_irq(info);
2964 DINTR2(DEBUG_LOG(info->line, "ser_rx OK %d\n", info->line));
2965 info->break_detected_cnt = 0;
2966
2967 PROCSTAT(ser_stat[info->line].ser_ints_ok_cnt++);
2968 }
2969 /* Restarting the DMA never hurts */
2970 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, restart);
2971 START_FLUSH_FAST_TIMER(info, "ser_int");
2972 return info;
2973} /* handle_ser_rx_interrupt */
2974
Adrian Bunk41c28ff2006-03-23 03:00:56 -08002975static void handle_ser_tx_interrupt(struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002976{
2977 unsigned long flags;
2978
2979 if (info->x_char) {
2980 unsigned char rstat;
2981 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar 0x%02X\n", info->x_char));
2982 save_flags(flags); cli();
2983 rstat = info->port[REG_STATUS];
2984 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
2985
2986 info->port[REG_TR_DATA] = info->x_char;
2987 info->icount.tx++;
2988 info->x_char = 0;
2989 /* We must enable since it is disabled in ser_interrupt */
2990 e100_enable_serial_tx_ready_irq(info);
2991 restore_flags(flags);
2992 return;
2993 }
2994 if (info->uses_dma_out) {
2995 unsigned char rstat;
2996 int i;
2997 /* We only use normal tx interrupt when sending x_char */
2998 DFLOW(DEBUG_LOG(info->line, "tx_int: xchar sent\n", 0));
2999 save_flags(flags); cli();
3000 rstat = info->port[REG_STATUS];
3001 DFLOW(DEBUG_LOG(info->line, "stat %x\n", rstat));
3002 e100_disable_serial_tx_ready_irq(info);
3003 if (info->tty->stopped)
3004 rs_stop(info->tty);
3005 /* Enable the DMA channel and tell it to continue */
3006 e100_enable_txdma_channel(info);
3007 /* Wait 12 cycles before doing the DMA command */
3008 for(i = 6; i > 0; i--)
3009 nop();
3010
3011 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, continue);
3012 restore_flags(flags);
3013 return;
3014 }
3015 /* Normal char-by-char interrupt */
3016 if (info->xmit.head == info->xmit.tail
3017 || info->tty->stopped
3018 || info->tty->hw_stopped) {
3019 DFLOW(DEBUG_LOG(info->line, "tx_int: stopped %i\n", info->tty->stopped));
3020 e100_disable_serial_tx_ready_irq(info);
3021 info->tr_running = 0;
3022 return;
3023 }
3024 DINTR2(DEBUG_LOG(info->line, "tx_int %c\n", info->xmit.buf[info->xmit.tail]));
3025 /* Send a byte, rs485 timing is critical so turn of ints */
3026 save_flags(flags); cli();
3027 info->port[REG_TR_DATA] = info->xmit.buf[info->xmit.tail];
3028 info->xmit.tail = (info->xmit.tail + 1) & (SERIAL_XMIT_SIZE-1);
3029 info->icount.tx++;
3030 if (info->xmit.head == info->xmit.tail) {
3031#if defined(CONFIG_ETRAX_RS485) && defined(CONFIG_ETRAX_FAST_TIMER)
3032 if (info->rs485.enabled) {
3033 /* Set a short timer to toggle RTS */
3034 start_one_shot_timer(&fast_timers_rs485[info->line],
3035 rs485_toggle_rts_timer_function,
3036 (unsigned long)info,
3037 info->char_time_usec*2,
3038 "RS-485");
3039 }
3040#endif /* RS485 */
3041 info->last_tx_active_usec = GET_JIFFIES_USEC();
3042 info->last_tx_active = jiffies;
3043 e100_disable_serial_tx_ready_irq(info);
3044 info->tr_running = 0;
3045 DFLOW(DEBUG_LOG(info->line, "tx_int: stop2\n", 0));
3046 } else {
3047 /* We must enable since it is disabled in ser_interrupt */
3048 e100_enable_serial_tx_ready_irq(info);
3049 }
3050 restore_flags(flags);
3051
3052 if (CIRC_CNT(info->xmit.head,
3053 info->xmit.tail,
3054 SERIAL_XMIT_SIZE) < WAKEUP_CHARS)
3055 rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
3056
3057} /* handle_ser_tx_interrupt */
3058
3059/* result of time measurements:
3060 * RX duration 54-60 us when doing something, otherwise 6-9 us
3061 * ser_int duration: just sending: 8-15 us normally, up to 73 us
3062 */
3063static irqreturn_t
3064ser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
3065{
3066 static volatile int tx_started = 0;
3067 struct e100_serial *info;
3068 int i;
3069 unsigned long flags;
3070 unsigned long irq_mask1_rd;
3071 unsigned long data_mask = (1 << (8+2*0)); /* ser0 data_avail */
3072 int handled = 0;
3073 static volatile unsigned long reentered_ready_mask = 0;
3074
3075 save_flags(flags); cli();
3076 irq_mask1_rd = *R_IRQ_MASK1_RD;
3077 /* First handle all rx interrupts with ints disabled */
3078 info = rs_table;
3079 irq_mask1_rd &= e100_ser_int_mask;
3080 for (i = 0; i < NR_PORTS; i++) {
3081 /* Which line caused the data irq? */
3082 if (irq_mask1_rd & data_mask) {
3083 handled = 1;
3084 handle_ser_rx_interrupt(info);
3085 }
3086 info += 1;
3087 data_mask <<= 2;
3088 }
3089 /* Handle tx interrupts with interrupts enabled so we
3090 * can take care of new data interrupts while transmitting
3091 * We protect the tx part with the tx_started flag.
3092 * We disable the tr_ready interrupts we are about to handle and
3093 * unblock the serial interrupt so new serial interrupts may come.
3094 *
3095 * If we get a new interrupt:
3096 * - it migth be due to synchronous serial ports.
3097 * - serial irq will be blocked by general irq handler.
3098 * - async data will be handled above (sync will be ignored).
3099 * - tx_started flag will prevent us from trying to send again and
3100 * we will exit fast - no need to unblock serial irq.
3101 * - Next (sync) serial interrupt handler will be runned with
3102 * disabled interrupt due to restore_flags() at end of function,
3103 * so sync handler will not be preempted or reentered.
3104 */
3105 if (!tx_started) {
3106 unsigned long ready_mask;
3107 unsigned long
3108 tx_started = 1;
3109 /* Only the tr_ready interrupts left */
3110 irq_mask1_rd &= (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3111 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3112 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3113 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3114 while (irq_mask1_rd) {
3115 /* Disable those we are about to handle */
3116 *R_IRQ_MASK1_CLR = irq_mask1_rd;
3117 /* Unblock the serial interrupt */
3118 *R_VECT_MASK_SET = IO_STATE(R_VECT_MASK_SET, serial, set);
3119
3120 sti();
3121 ready_mask = (1 << (8+1+2*0)); /* ser0 tr_ready */
3122 info = rs_table;
3123 for (i = 0; i < NR_PORTS; i++) {
3124 /* Which line caused the ready irq? */
3125 if (irq_mask1_rd & ready_mask) {
3126 handled = 1;
3127 handle_ser_tx_interrupt(info);
3128 }
3129 info += 1;
3130 ready_mask <<= 2;
3131 }
3132 /* handle_ser_tx_interrupt enables tr_ready interrupts */
3133 cli();
3134 /* Handle reentered TX interrupt */
3135 irq_mask1_rd = reentered_ready_mask;
3136 }
3137 cli();
3138 tx_started = 0;
3139 } else {
3140 unsigned long ready_mask;
3141 ready_mask = irq_mask1_rd & (IO_MASK(R_IRQ_MASK1_RD, ser0_ready) |
3142 IO_MASK(R_IRQ_MASK1_RD, ser1_ready) |
3143 IO_MASK(R_IRQ_MASK1_RD, ser2_ready) |
3144 IO_MASK(R_IRQ_MASK1_RD, ser3_ready));
3145 if (ready_mask) {
3146 reentered_ready_mask |= ready_mask;
3147 /* Disable those we are about to handle */
3148 *R_IRQ_MASK1_CLR = ready_mask;
3149 DFLOW(DEBUG_LOG(SERIAL_DEBUG_LINE, "ser_int reentered with TX %X\n", ready_mask));
3150 }
3151 }
3152
3153 restore_flags(flags);
3154 return IRQ_RETVAL(handled);
3155} /* ser_interrupt */
3156#endif
3157
3158/*
3159 * -------------------------------------------------------------------
3160 * Here ends the serial interrupt routines.
3161 * -------------------------------------------------------------------
3162 */
3163
3164/*
3165 * This routine is used to handle the "bottom half" processing for the
3166 * serial driver, known also the "software interrupt" processing.
3167 * This processing is done at the kernel interrupt level, after the
3168 * rs_interrupt() has returned, BUT WITH INTERRUPTS TURNED ON. This
3169 * is where time-consuming activities which can not be done in the
3170 * interrupt driver proper are done; the interrupt driver schedules
3171 * them using rs_sched_event(), and they get done here.
3172 */
3173static void
3174do_softint(void *private_)
3175{
3176 struct e100_serial *info = (struct e100_serial *) private_;
3177 struct tty_struct *tty;
3178
3179 tty = info->tty;
3180 if (!tty)
3181 return;
3182
3183 if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event)) {
3184 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3185 tty->ldisc.write_wakeup)
3186 (tty->ldisc.write_wakeup)(tty);
3187 wake_up_interruptible(&tty->write_wait);
3188 }
3189}
3190
3191static int
3192startup(struct e100_serial * info)
3193{
3194 unsigned long flags;
3195 unsigned long xmit_page;
3196 int i;
3197
3198 xmit_page = get_zeroed_page(GFP_KERNEL);
3199 if (!xmit_page)
3200 return -ENOMEM;
3201
3202 save_flags(flags);
3203 cli();
3204
3205 /* if it was already initialized, skip this */
3206
3207 if (info->flags & ASYNC_INITIALIZED) {
3208 restore_flags(flags);
3209 free_page(xmit_page);
3210 return 0;
3211 }
3212
3213 if (info->xmit.buf)
3214 free_page(xmit_page);
3215 else
3216 info->xmit.buf = (unsigned char *) xmit_page;
3217
3218#ifdef SERIAL_DEBUG_OPEN
3219 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
3220#endif
3221
3222#ifdef CONFIG_SVINTO_SIM
3223 /* Bits and pieces collected from below. Better to have them
3224 in one ifdef:ed clause than to mix in a lot of ifdefs,
3225 right? */
3226 if (info->tty)
3227 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3228
3229 info->xmit.head = info->xmit.tail = 0;
3230 info->first_recv_buffer = info->last_recv_buffer = NULL;
3231 info->recv_cnt = info->max_recv_cnt = 0;
3232
3233 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3234 info->rec_descr[i].buf = NULL;
3235
3236 /* No real action in the simulator, but may set info important
3237 to ioctl. */
3238 change_speed(info);
3239#else
3240
3241 /*
3242 * Clear the FIFO buffers and disable them
3243 * (they will be reenabled in change_speed())
3244 */
3245
3246 /*
3247 * Reset the DMA channels and make sure their interrupts are cleared
3248 */
3249
3250 if (info->dma_in_enabled) {
3251 info->uses_dma_in = 1;
3252 e100_enable_rxdma_channel(info);
3253
3254 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3255
3256 /* Wait until reset cycle is complete */
3257 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->icmdadr) ==
3258 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3259
3260 /* Make sure the irqs are cleared */
3261 *info->iclrintradr =
3262 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3263 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3264 } else {
3265 e100_disable_rxdma_channel(info);
3266 }
3267
3268 if (info->dma_out_enabled) {
3269 info->uses_dma_out = 1;
3270 e100_enable_txdma_channel(info);
3271 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3272
3273 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) ==
3274 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, reset));
3275
3276 /* Make sure the irqs are cleared */
3277 *info->oclrintradr =
3278 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
3279 IO_STATE(R_DMA_CH6_CLR_INTR, clr_eop, do);
3280 } else {
3281 e100_disable_txdma_channel(info);
3282 }
3283
3284 if (info->tty)
3285 clear_bit(TTY_IO_ERROR, &info->tty->flags);
3286
3287 info->xmit.head = info->xmit.tail = 0;
3288 info->first_recv_buffer = info->last_recv_buffer = NULL;
3289 info->recv_cnt = info->max_recv_cnt = 0;
3290
3291 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3292 info->rec_descr[i].buf = 0;
3293
3294 /*
3295 * and set the speed and other flags of the serial port
3296 * this will start the rx/tx as well
3297 */
3298#ifdef SERIAL_HANDLE_EARLY_ERRORS
3299 e100_enable_serial_data_irq(info);
3300#endif
3301 change_speed(info);
3302
3303 /* dummy read to reset any serial errors */
3304
3305 (void)info->port[REG_DATA];
3306
3307 /* enable the interrupts */
3308 if (info->uses_dma_out)
3309 e100_enable_txdma_irq(info);
3310
3311 e100_enable_rx_irq(info);
3312
3313 info->tr_running = 0; /* to be sure we don't lock up the transmitter */
3314
3315 /* setup the dma input descriptor and start dma */
3316
3317 start_receive(info);
3318
3319 /* for safety, make sure the descriptors last result is 0 bytes written */
3320
3321 info->tr_descr.sw_len = 0;
3322 info->tr_descr.hw_len = 0;
3323 info->tr_descr.status = 0;
3324
3325 /* enable RTS/DTR last */
3326
3327 e100_rts(info, 1);
3328 e100_dtr(info, 1);
3329
3330#endif /* CONFIG_SVINTO_SIM */
3331
3332 info->flags |= ASYNC_INITIALIZED;
3333
3334 restore_flags(flags);
3335 return 0;
3336}
3337
3338/*
3339 * This routine will shutdown a serial port; interrupts are disabled, and
3340 * DTR is dropped if the hangup on close termio flag is on.
3341 */
3342static void
3343shutdown(struct e100_serial * info)
3344{
3345 unsigned long flags;
3346 struct etrax_dma_descr *descr = info->rec_descr;
3347 struct etrax_recv_buffer *buffer;
3348 int i;
3349
3350#ifndef CONFIG_SVINTO_SIM
3351 /* shut down the transmitter and receiver */
3352 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
3353 e100_disable_rx(info);
3354 info->port[REG_TR_CTRL] = (info->tx_ctrl &= ~0x40);
3355
3356 /* disable interrupts, reset dma channels */
3357 if (info->uses_dma_in) {
3358 e100_disable_rxdma_irq(info);
3359 *info->icmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3360 info->uses_dma_in = 0;
3361 } else {
3362 e100_disable_serial_data_irq(info);
3363 }
3364
3365 if (info->uses_dma_out) {
3366 e100_disable_txdma_irq(info);
3367 info->tr_running = 0;
3368 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, reset);
3369 info->uses_dma_out = 0;
3370 } else {
3371 e100_disable_serial_tx_ready_irq(info);
3372 info->tr_running = 0;
3373 }
3374
3375#endif /* CONFIG_SVINTO_SIM */
3376
3377 if (!(info->flags & ASYNC_INITIALIZED))
3378 return;
3379
3380#ifdef SERIAL_DEBUG_OPEN
3381 printk("Shutting down serial port %d (irq %d)....\n", info->line,
3382 info->irq);
3383#endif
3384
3385 save_flags(flags);
3386 cli(); /* Disable interrupts */
3387
3388 if (info->xmit.buf) {
3389 free_page((unsigned long)info->xmit.buf);
3390 info->xmit.buf = NULL;
3391 }
3392
3393 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
3394 if (descr[i].buf) {
3395 buffer = phys_to_virt(descr[i].buf) - sizeof *buffer;
3396 kfree(buffer);
3397 descr[i].buf = 0;
3398 }
3399
3400 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
3401 /* hang up DTR and RTS if HUPCL is enabled */
3402 e100_dtr(info, 0);
3403 e100_rts(info, 0); /* could check CRTSCTS before doing this */
3404 }
3405
3406 if (info->tty)
3407 set_bit(TTY_IO_ERROR, &info->tty->flags);
3408
3409 info->flags &= ~ASYNC_INITIALIZED;
3410 restore_flags(flags);
3411}
3412
3413
3414/* change baud rate and other assorted parameters */
3415
3416static void
3417change_speed(struct e100_serial *info)
3418{
3419 unsigned int cflag;
3420 unsigned long xoff;
3421 unsigned long flags;
3422 /* first some safety checks */
3423
3424 if (!info->tty || !info->tty->termios)
3425 return;
3426 if (!info->port)
3427 return;
3428
3429 cflag = info->tty->termios->c_cflag;
3430
3431 /* possibly, the tx/rx should be disabled first to do this safely */
3432
3433 /* change baud-rate and write it to the hardware */
3434 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST) {
3435 /* Special baudrate */
3436 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3437 unsigned long alt_source =
3438 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3439 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3440 /* R_ALT_SER_BAUDRATE selects the source */
3441 DBAUD(printk("Custom baudrate: baud_base/divisor %lu/%i\n",
3442 (unsigned long)info->baud_base, info->custom_divisor));
3443 if (info->baud_base == SERIAL_PRESCALE_BASE) {
3444 /* 0, 2-65535 (0=65536) */
3445 u16 divisor = info->custom_divisor;
3446 /* R_SERIAL_PRESCALE (upper 16 bits of R_CLOCK_PRESCALE) */
3447 /* baudrate is 3.125MHz/custom_divisor */
3448 alt_source =
3449 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, prescale) |
3450 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, prescale);
3451 alt_source = 0x11;
3452 DBAUD(printk("Writing SERIAL_PRESCALE: divisor %i\n", divisor));
3453 *R_SERIAL_PRESCALE = divisor;
3454 info->baud = SERIAL_PRESCALE_BASE/divisor;
3455 }
3456#ifdef CONFIG_ETRAX_EXTERN_PB6CLK_ENABLED
3457 else if ((info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8 &&
3458 info->custom_divisor == 1) ||
3459 (info->baud_base==CONFIG_ETRAX_EXTERN_PB6CLK_FREQ &&
3460 info->custom_divisor == 8)) {
3461 /* ext_clk selected */
3462 alt_source =
3463 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, extern) |
3464 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, extern);
3465 DBAUD(printk("using external baudrate: %lu\n", CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8));
3466 info->baud = CONFIG_ETRAX_EXTERN_PB6CLK_FREQ/8;
3467 }
3468 }
3469#endif
3470 else
3471 {
3472 /* Bad baudbase, we don't support using timer0
3473 * for baudrate.
3474 */
3475 printk(KERN_WARNING "Bad baud_base/custom_divisor: %lu/%i\n",
3476 (unsigned long)info->baud_base, info->custom_divisor);
3477 }
3478 r_alt_ser_baudrate_shadow &= ~mask;
3479 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3480 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3481 } else {
3482 /* Normal baudrate */
3483 /* Make sure we use normal baudrate */
3484 u32 mask = 0xFF << (info->line*8); /* Each port has 8 bits */
3485 unsigned long alt_source =
3486 IO_STATE(R_ALT_SER_BAUDRATE, ser0_rec, normal) |
3487 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
3488 r_alt_ser_baudrate_shadow &= ~mask;
3489 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
3490#ifndef CONFIG_SVINTO_SIM
3491 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3492#endif /* CONFIG_SVINTO_SIM */
3493
3494 info->baud = cflag_to_baud(cflag);
3495#ifndef CONFIG_SVINTO_SIM
3496 info->port[REG_BAUD] = cflag_to_etrax_baud(cflag);
3497#endif /* CONFIG_SVINTO_SIM */
3498 }
3499
3500#ifndef CONFIG_SVINTO_SIM
3501 /* start with default settings and then fill in changes */
3502 save_flags(flags);
3503 cli();
3504 /* 8 bit, no/even parity */
3505 info->rx_ctrl &= ~(IO_MASK(R_SERIAL0_REC_CTRL, rec_bitnr) |
3506 IO_MASK(R_SERIAL0_REC_CTRL, rec_par_en) |
3507 IO_MASK(R_SERIAL0_REC_CTRL, rec_par));
3508
3509 /* 8 bit, no/even parity, 1 stop bit, no cts */
3510 info->tx_ctrl &= ~(IO_MASK(R_SERIAL0_TR_CTRL, tr_bitnr) |
3511 IO_MASK(R_SERIAL0_TR_CTRL, tr_par_en) |
3512 IO_MASK(R_SERIAL0_TR_CTRL, tr_par) |
3513 IO_MASK(R_SERIAL0_TR_CTRL, stop_bits) |
3514 IO_MASK(R_SERIAL0_TR_CTRL, auto_cts));
3515
3516 if ((cflag & CSIZE) == CS7) {
3517 /* set 7 bit mode */
3518 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_bitnr, tr_7bit);
3519 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_bitnr, rec_7bit);
3520 }
3521
3522 if (cflag & CSTOPB) {
3523 /* set 2 stop bit mode */
3524 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, stop_bits, two_bits);
3525 }
3526
3527 if (cflag & PARENB) {
3528 /* enable parity */
3529 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par_en, enable);
3530 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par_en, enable);
3531 }
3532
3533 if (cflag & CMSPAR) {
3534 /* enable stick parity, PARODD mean Mark which matches ETRAX */
3535 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_stick_par, stick);
3536 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_stick_par, stick);
3537 }
3538 if (cflag & PARODD) {
3539 /* set odd parity (or Mark if CMSPAR) */
3540 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_par, odd);
3541 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_par, odd);
3542 }
3543
3544 if (cflag & CRTSCTS) {
3545 /* enable automatic CTS handling */
3546 DFLOW(DEBUG_LOG(info->line, "FLOW auto_cts enabled\n", 0));
3547 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, auto_cts, active);
3548 }
3549
3550 /* make sure the tx and rx are enabled */
3551
3552 info->tx_ctrl |= IO_STATE(R_SERIAL0_TR_CTRL, tr_enable, enable);
3553 info->rx_ctrl |= IO_STATE(R_SERIAL0_REC_CTRL, rec_enable, enable);
3554
3555 /* actually write the control regs to the hardware */
3556
3557 info->port[REG_TR_CTRL] = info->tx_ctrl;
3558 info->port[REG_REC_CTRL] = info->rx_ctrl;
3559 xoff = IO_FIELD(R_SERIAL0_XOFF, xoff_char, STOP_CHAR(info->tty));
3560 xoff |= IO_STATE(R_SERIAL0_XOFF, tx_stop, enable);
3561 if (info->tty->termios->c_iflag & IXON ) {
3562 DFLOW(DEBUG_LOG(info->line, "FLOW XOFF enabled 0x%02X\n", STOP_CHAR(info->tty)));
3563 xoff |= IO_STATE(R_SERIAL0_XOFF, auto_xoff, enable);
3564 }
3565
3566 *((unsigned long *)&info->port[REG_XOFF]) = xoff;
3567 restore_flags(flags);
3568#endif /* !CONFIG_SVINTO_SIM */
3569
3570 update_char_time(info);
3571
3572} /* change_speed */
3573
3574/* start transmitting chars NOW */
3575
3576static void
3577rs_flush_chars(struct tty_struct *tty)
3578{
3579 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3580 unsigned long flags;
3581
3582 if (info->tr_running ||
3583 info->xmit.head == info->xmit.tail ||
3584 tty->stopped ||
3585 tty->hw_stopped ||
3586 !info->xmit.buf)
3587 return;
3588
3589#ifdef SERIAL_DEBUG_FLOW
3590 printk("rs_flush_chars\n");
3591#endif
3592
3593 /* this protection might not exactly be necessary here */
3594
3595 save_flags(flags);
3596 cli();
3597 start_transmit(info);
3598 restore_flags(flags);
3599}
3600
Adrian Bunk41c28ff2006-03-23 03:00:56 -08003601static int rs_raw_write(struct tty_struct * tty, int from_user,
3602 const unsigned char *buf, int count)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003603{
3604 int c, ret = 0;
3605 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3606 unsigned long flags;
3607
3608 /* first some sanity checks */
3609
3610 if (!tty || !info->xmit.buf || !tmp_buf)
3611 return 0;
3612
3613#ifdef SERIAL_DEBUG_DATA
3614 if (info->line == SERIAL_DEBUG_LINE)
3615 printk("rs_raw_write (%d), status %d\n",
3616 count, info->port[REG_STATUS]);
3617#endif
3618
3619#ifdef CONFIG_SVINTO_SIM
3620 /* Really simple. The output is here and now. */
3621 SIMCOUT(buf, count);
3622 return count;
3623#endif
3624 save_flags(flags);
3625 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3626 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
3627
3628
3629 /* the cli/restore_flags pairs below are needed because the
3630 * DMA interrupt handler moves the info->xmit values. the memcpy
3631 * needs to be in the critical region unfortunately, because we
3632 * need to read xmit values, memcpy, write xmit values in one
3633 * atomic operation... this could perhaps be avoided by more clever
3634 * design.
3635 */
3636 if (from_user) {
Arjan van de Venf392ecf2006-01-12 18:44:32 +00003637 mutex_lock(&tmp_buf_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003638 while (1) {
3639 int c1;
3640 c = CIRC_SPACE_TO_END(info->xmit.head,
3641 info->xmit.tail,
3642 SERIAL_XMIT_SIZE);
3643 if (count < c)
3644 c = count;
3645 if (c <= 0)
3646 break;
3647
3648 c -= copy_from_user(tmp_buf, buf, c);
3649 if (!c) {
3650 if (!ret)
3651 ret = -EFAULT;
3652 break;
3653 }
3654 cli();
3655 c1 = CIRC_SPACE_TO_END(info->xmit.head,
3656 info->xmit.tail,
3657 SERIAL_XMIT_SIZE);
3658 if (c1 < c)
3659 c = c1;
3660 memcpy(info->xmit.buf + info->xmit.head, tmp_buf, c);
3661 info->xmit.head = ((info->xmit.head + c) &
3662 (SERIAL_XMIT_SIZE-1));
3663 restore_flags(flags);
3664 buf += c;
3665 count -= c;
3666 ret += c;
3667 }
Arjan van de Venf392ecf2006-01-12 18:44:32 +00003668 mutex_unlock(&tmp_buf_mutex);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003669 } else {
3670 cli();
3671 while (count) {
3672 c = CIRC_SPACE_TO_END(info->xmit.head,
3673 info->xmit.tail,
3674 SERIAL_XMIT_SIZE);
3675
3676 if (count < c)
3677 c = count;
3678 if (c <= 0)
3679 break;
3680
3681 memcpy(info->xmit.buf + info->xmit.head, buf, c);
3682 info->xmit.head = (info->xmit.head + c) &
3683 (SERIAL_XMIT_SIZE-1);
3684 buf += c;
3685 count -= c;
3686 ret += c;
3687 }
3688 restore_flags(flags);
3689 }
3690
3691 /* enable transmitter if not running, unless the tty is stopped
3692 * this does not need IRQ protection since if tr_running == 0
3693 * the IRQ's are not running anyway for this port.
3694 */
3695 DFLOW(DEBUG_LOG(info->line, "write ret %i\n", ret));
3696
3697 if (info->xmit.head != info->xmit.tail &&
3698 !tty->stopped &&
3699 !tty->hw_stopped &&
3700 !info->tr_running) {
3701 start_transmit(info);
3702 }
3703
3704 return ret;
3705} /* raw_raw_write() */
3706
3707static int
3708rs_write(struct tty_struct * tty, int from_user,
3709 const unsigned char *buf, int count)
3710{
3711#if defined(CONFIG_ETRAX_RS485)
3712 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3713
3714 if (info->rs485.enabled)
3715 {
3716 /* If we are in RS-485 mode, we need to toggle RTS and disable
3717 * the receiver before initiating a DMA transfer
3718 */
3719#ifdef CONFIG_ETRAX_FAST_TIMER
3720 /* Abort any started timer */
3721 fast_timers_rs485[info->line].function = NULL;
3722 del_fast_timer(&fast_timers_rs485[info->line]);
3723#endif
3724 e100_rts(info, info->rs485.rts_on_send);
3725#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3726 e100_disable_rx(info);
3727 e100_enable_rx_irq(info);
3728#endif
3729
3730 if (info->rs485.delay_rts_before_send > 0)
3731 msleep(info->rs485.delay_rts_before_send);
3732 }
3733#endif /* CONFIG_ETRAX_RS485 */
3734
3735 count = rs_raw_write(tty, from_user, buf, count);
3736
3737#if defined(CONFIG_ETRAX_RS485)
3738 if (info->rs485.enabled)
3739 {
3740 unsigned int val;
3741 /* If we are in RS-485 mode the following has to be done:
3742 * wait until DMA is ready
3743 * wait on transmit shift register
3744 * toggle RTS
3745 * enable the receiver
3746 */
3747
3748 /* Sleep until all sent */
3749 tty_wait_until_sent(tty, 0);
3750#ifdef CONFIG_ETRAX_FAST_TIMER
3751 /* Now sleep a little more so that shift register is empty */
3752 schedule_usleep(info->char_time_usec * 2);
3753#endif
3754 /* wait on transmit shift register */
3755 do{
3756 get_lsr_info(info, &val);
3757 }while (!(val & TIOCSER_TEMT));
3758
3759 e100_rts(info, info->rs485.rts_after_sent);
3760
3761#if defined(CONFIG_ETRAX_RS485_DISABLE_RECEIVER)
3762 e100_enable_rx(info);
3763 e100_enable_rxdma_irq(info);
3764#endif
3765 }
3766#endif /* CONFIG_ETRAX_RS485 */
3767
3768 return count;
3769} /* rs_write */
3770
3771
3772/* how much space is available in the xmit buffer? */
3773
3774static int
3775rs_write_room(struct tty_struct *tty)
3776{
3777 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3778
3779 return CIRC_SPACE(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3780}
3781
3782/* How many chars are in the xmit buffer?
3783 * This does not include any chars in the transmitter FIFO.
3784 * Use wait_until_sent for waiting for FIFO drain.
3785 */
3786
3787static int
3788rs_chars_in_buffer(struct tty_struct *tty)
3789{
3790 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3791
3792 return CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
3793}
3794
3795/* discard everything in the xmit buffer */
3796
3797static void
3798rs_flush_buffer(struct tty_struct *tty)
3799{
3800 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3801 unsigned long flags;
3802
3803 save_flags(flags);
3804 cli();
3805 info->xmit.head = info->xmit.tail = 0;
3806 restore_flags(flags);
3807
3808 wake_up_interruptible(&tty->write_wait);
3809
3810 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) &&
3811 tty->ldisc.write_wakeup)
3812 (tty->ldisc.write_wakeup)(tty);
3813}
3814
3815/*
3816 * This function is used to send a high-priority XON/XOFF character to
3817 * the device
3818 *
3819 * Since we use DMA we don't check for info->x_char in transmit_chars_dma(),
3820 * but we do it in handle_ser_tx_interrupt().
3821 * We disable DMA channel and enable tx ready interrupt and write the
3822 * character when possible.
3823 */
3824static void rs_send_xchar(struct tty_struct *tty, char ch)
3825{
3826 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3827 unsigned long flags;
3828 save_flags(flags); cli();
3829 if (info->uses_dma_out) {
3830 /* Put the DMA on hold and disable the channel */
3831 *info->ocmdadr = IO_STATE(R_DMA_CH6_CMD, cmd, hold);
3832 while (IO_EXTRACT(R_DMA_CH6_CMD, cmd, *info->ocmdadr) !=
3833 IO_STATE_VALUE(R_DMA_CH6_CMD, cmd, hold));
3834 e100_disable_txdma_channel(info);
3835 }
3836
3837 /* Must make sure transmitter is not stopped before we can transmit */
3838 if (tty->stopped)
3839 rs_start(tty);
3840
3841 /* Enable manual transmit interrupt and send from there */
3842 DFLOW(DEBUG_LOG(info->line, "rs_send_xchar 0x%02X\n", ch));
3843 info->x_char = ch;
3844 e100_enable_serial_tx_ready_irq(info);
3845 restore_flags(flags);
3846}
3847
3848/*
3849 * ------------------------------------------------------------
3850 * rs_throttle()
3851 *
3852 * This routine is called by the upper-layer tty layer to signal that
3853 * incoming characters should be throttled.
3854 * ------------------------------------------------------------
3855 */
3856static void
3857rs_throttle(struct tty_struct * tty)
3858{
3859 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3860#ifdef SERIAL_DEBUG_THROTTLE
3861 char buf[64];
3862
3863 printk("throttle %s: %lu....\n", tty_name(tty, buf),
3864 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3865#endif
3866 DFLOW(DEBUG_LOG(info->line,"rs_throttle %lu\n", tty->ldisc.chars_in_buffer(tty)));
3867
3868 /* Do RTS before XOFF since XOFF might take some time */
3869 if (tty->termios->c_cflag & CRTSCTS) {
3870 /* Turn off RTS line */
3871 e100_rts(info, 0);
3872 }
3873 if (I_IXOFF(tty))
3874 rs_send_xchar(tty, STOP_CHAR(tty));
3875
3876}
3877
3878static void
3879rs_unthrottle(struct tty_struct * tty)
3880{
3881 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
3882#ifdef SERIAL_DEBUG_THROTTLE
3883 char buf[64];
3884
3885 printk("unthrottle %s: %lu....\n", tty_name(tty, buf),
3886 (unsigned long)tty->ldisc.chars_in_buffer(tty));
3887#endif
3888 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle ldisc %d\n", tty->ldisc.chars_in_buffer(tty)));
3889 DFLOW(DEBUG_LOG(info->line,"rs_unthrottle flip.count: %i\n", tty->flip.count));
3890 /* Do RTS before XOFF since XOFF might take some time */
3891 if (tty->termios->c_cflag & CRTSCTS) {
3892 /* Assert RTS line */
3893 e100_rts(info, 1);
3894 }
3895
3896 if (I_IXOFF(tty)) {
3897 if (info->x_char)
3898 info->x_char = 0;
3899 else
3900 rs_send_xchar(tty, START_CHAR(tty));
3901 }
3902
3903}
3904
3905/*
3906 * ------------------------------------------------------------
3907 * rs_ioctl() and friends
3908 * ------------------------------------------------------------
3909 */
3910
3911static int
3912get_serial_info(struct e100_serial * info,
3913 struct serial_struct * retinfo)
3914{
3915 struct serial_struct tmp;
3916
3917 /* this is all probably wrong, there are a lot of fields
3918 * here that we don't have in e100_serial and maybe we
3919 * should set them to something else than 0.
3920 */
3921
3922 if (!retinfo)
3923 return -EFAULT;
3924 memset(&tmp, 0, sizeof(tmp));
3925 tmp.type = info->type;
3926 tmp.line = info->line;
3927 tmp.port = (int)info->port;
3928 tmp.irq = info->irq;
3929 tmp.flags = info->flags;
3930 tmp.baud_base = info->baud_base;
3931 tmp.close_delay = info->close_delay;
3932 tmp.closing_wait = info->closing_wait;
3933 tmp.custom_divisor = info->custom_divisor;
3934 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
3935 return -EFAULT;
3936 return 0;
3937}
3938
3939static int
3940set_serial_info(struct e100_serial *info,
3941 struct serial_struct *new_info)
3942{
3943 struct serial_struct new_serial;
3944 struct e100_serial old_info;
3945 int retval = 0;
3946
3947 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
3948 return -EFAULT;
3949
3950 old_info = *info;
3951
3952 if (!capable(CAP_SYS_ADMIN)) {
3953 if ((new_serial.type != info->type) ||
3954 (new_serial.close_delay != info->close_delay) ||
3955 ((new_serial.flags & ~ASYNC_USR_MASK) !=
3956 (info->flags & ~ASYNC_USR_MASK)))
3957 return -EPERM;
3958 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
3959 (new_serial.flags & ASYNC_USR_MASK));
3960 goto check_and_exit;
3961 }
3962
3963 if (info->count > 1)
3964 return -EBUSY;
3965
3966 /*
3967 * OK, past this point, all the error checking has been done.
3968 * At this point, we start making changes.....
3969 */
3970
3971 info->baud_base = new_serial.baud_base;
3972 info->flags = ((info->flags & ~ASYNC_FLAGS) |
3973 (new_serial.flags & ASYNC_FLAGS));
3974 info->custom_divisor = new_serial.custom_divisor;
3975 info->type = new_serial.type;
3976 info->close_delay = new_serial.close_delay;
3977 info->closing_wait = new_serial.closing_wait;
3978 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
3979
3980 check_and_exit:
3981 if (info->flags & ASYNC_INITIALIZED) {
3982 change_speed(info);
3983 } else
3984 retval = startup(info);
3985 return retval;
3986}
3987
3988/*
3989 * get_lsr_info - get line status register info
3990 *
3991 * Purpose: Let user call ioctl() to get info when the UART physically
3992 * is emptied. On bus types like RS485, the transmitter must
3993 * release the bus after transmitting. This must be done when
3994 * the transmit shift register is empty, not be done when the
3995 * transmit holding register is empty. This functionality
3996 * allows an RS485 driver to be written in user space.
3997 */
3998static int
3999get_lsr_info(struct e100_serial * info, unsigned int *value)
4000{
4001 unsigned int result = TIOCSER_TEMT;
4002#ifndef CONFIG_SVINTO_SIM
4003 unsigned long curr_time = jiffies;
4004 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4005 unsigned long elapsed_usec =
4006 (curr_time - info->last_tx_active) * 1000000/HZ +
4007 curr_time_usec - info->last_tx_active_usec;
4008
4009 if (info->xmit.head != info->xmit.tail ||
4010 elapsed_usec < 2*info->char_time_usec) {
4011 result = 0;
4012 }
4013#endif
4014
4015 if (copy_to_user(value, &result, sizeof(int)))
4016 return -EFAULT;
4017 return 0;
4018}
4019
4020#ifdef SERIAL_DEBUG_IO
4021struct state_str
4022{
4023 int state;
4024 const char *str;
4025};
4026
4027const struct state_str control_state_str[] = {
4028 {TIOCM_DTR, "DTR" },
4029 {TIOCM_RTS, "RTS"},
4030 {TIOCM_ST, "ST?" },
4031 {TIOCM_SR, "SR?" },
4032 {TIOCM_CTS, "CTS" },
4033 {TIOCM_CD, "CD" },
4034 {TIOCM_RI, "RI" },
4035 {TIOCM_DSR, "DSR" },
4036 {0, NULL }
4037};
4038
4039char *get_control_state_str(int MLines, char *s)
4040{
4041 int i = 0;
4042
4043 s[0]='\0';
4044 while (control_state_str[i].str != NULL) {
4045 if (MLines & control_state_str[i].state) {
4046 if (s[0] != '\0') {
4047 strcat(s, ", ");
4048 }
4049 strcat(s, control_state_str[i].str);
4050 }
4051 i++;
4052 }
4053 return s;
4054}
4055#endif
4056
4057static int
4058get_modem_info(struct e100_serial * info, unsigned int *value)
4059{
4060 unsigned int result;
4061 /* Polarity isn't verified */
4062#if 0 /*def SERIAL_DEBUG_IO */
4063
4064 printk("get_modem_info: RTS: %i DTR: %i CD: %i RI: %i DSR: %i CTS: %i\n",
4065 E100_RTS_GET(info),
4066 E100_DTR_GET(info),
4067 E100_CD_GET(info),
4068 E100_RI_GET(info),
4069 E100_DSR_GET(info),
4070 E100_CTS_GET(info));
4071#endif
4072
4073 result =
4074 (!E100_RTS_GET(info) ? TIOCM_RTS : 0)
4075 | (!E100_DTR_GET(info) ? TIOCM_DTR : 0)
4076 | (!E100_RI_GET(info) ? TIOCM_RNG : 0)
4077 | (!E100_DSR_GET(info) ? TIOCM_DSR : 0)
4078 | (!E100_CD_GET(info) ? TIOCM_CAR : 0)
4079 | (!E100_CTS_GET(info) ? TIOCM_CTS : 0);
4080
4081#ifdef SERIAL_DEBUG_IO
4082 printk("e100ser: modem state: %i 0x%08X\n", result, result);
4083 {
4084 char s[100];
4085
4086 get_control_state_str(result, s);
4087 printk("state: %s\n", s);
4088 }
4089#endif
4090 if (copy_to_user(value, &result, sizeof(int)))
4091 return -EFAULT;
4092 return 0;
4093}
4094
4095
4096static int
4097set_modem_info(struct e100_serial * info, unsigned int cmd,
4098 unsigned int *value)
4099{
4100 unsigned int arg;
4101
4102 if (copy_from_user(&arg, value, sizeof(int)))
4103 return -EFAULT;
4104
4105 switch (cmd) {
4106 case TIOCMBIS:
4107 if (arg & TIOCM_RTS) {
4108 e100_rts(info, 1);
4109 }
4110 if (arg & TIOCM_DTR) {
4111 e100_dtr(info, 1);
4112 }
4113 /* Handle FEMALE behaviour */
4114 if (arg & TIOCM_RI) {
4115 e100_ri_out(info, 1);
4116 }
4117 if (arg & TIOCM_CD) {
4118 e100_cd_out(info, 1);
4119 }
4120 break;
4121 case TIOCMBIC:
4122 if (arg & TIOCM_RTS) {
4123 e100_rts(info, 0);
4124 }
4125 if (arg & TIOCM_DTR) {
4126 e100_dtr(info, 0);
4127 }
4128 /* Handle FEMALE behaviour */
4129 if (arg & TIOCM_RI) {
4130 e100_ri_out(info, 0);
4131 }
4132 if (arg & TIOCM_CD) {
4133 e100_cd_out(info, 0);
4134 }
4135 break;
4136 case TIOCMSET:
4137 e100_rts(info, arg & TIOCM_RTS);
4138 e100_dtr(info, arg & TIOCM_DTR);
4139 /* Handle FEMALE behaviour */
4140 e100_ri_out(info, arg & TIOCM_RI);
4141 e100_cd_out(info, arg & TIOCM_CD);
4142 break;
4143 default:
4144 return -EINVAL;
4145 }
4146 return 0;
4147}
4148
4149
4150static void
4151rs_break(struct tty_struct *tty, int break_state)
4152{
4153 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4154 unsigned long flags;
4155
4156 if (!info->port)
4157 return;
4158
4159 save_flags(flags);
4160 cli();
4161 if (break_state == -1) {
4162 /* Go to manual mode and set the txd pin to 0 */
4163 info->tx_ctrl &= 0x3F; /* Clear bit 7 (txd) and 6 (tr_enable) */
4164 } else {
4165 info->tx_ctrl |= (0x80 | 0x40); /* Set bit 7 (txd) and 6 (tr_enable) */
4166 }
4167 info->port[REG_TR_CTRL] = info->tx_ctrl;
4168 restore_flags(flags);
4169}
4170
4171static int
4172rs_ioctl(struct tty_struct *tty, struct file * file,
4173 unsigned int cmd, unsigned long arg)
4174{
4175 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4176
4177 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
4178 (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD) &&
4179 (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT)) {
4180 if (tty->flags & (1 << TTY_IO_ERROR))
4181 return -EIO;
4182 }
4183
4184 switch (cmd) {
4185 case TIOCMGET:
4186 return get_modem_info(info, (unsigned int *) arg);
4187 case TIOCMBIS:
4188 case TIOCMBIC:
4189 case TIOCMSET:
4190 return set_modem_info(info, cmd, (unsigned int *) arg);
4191 case TIOCGSERIAL:
4192 return get_serial_info(info,
4193 (struct serial_struct *) arg);
4194 case TIOCSSERIAL:
4195 return set_serial_info(info,
4196 (struct serial_struct *) arg);
4197 case TIOCSERGETLSR: /* Get line status register */
4198 return get_lsr_info(info, (unsigned int *) arg);
4199
4200 case TIOCSERGSTRUCT:
4201 if (copy_to_user((struct e100_serial *) arg,
4202 info, sizeof(struct e100_serial)))
4203 return -EFAULT;
4204 return 0;
4205
4206#if defined(CONFIG_ETRAX_RS485)
4207 case TIOCSERSETRS485:
4208 {
4209 struct rs485_control rs485ctrl;
4210 if (copy_from_user(&rs485ctrl, (struct rs485_control*)arg, sizeof(rs485ctrl)))
4211 return -EFAULT;
4212
4213 return e100_enable_rs485(tty, &rs485ctrl);
4214 }
4215
4216 case TIOCSERWRRS485:
4217 {
4218 struct rs485_write rs485wr;
4219 if (copy_from_user(&rs485wr, (struct rs485_write*)arg, sizeof(rs485wr)))
4220 return -EFAULT;
4221
4222 return e100_write_rs485(tty, 1, rs485wr.outc, rs485wr.outc_size);
4223 }
4224#endif
4225
4226 default:
4227 return -ENOIOCTLCMD;
4228 }
4229 return 0;
4230}
4231
4232static void
4233rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
4234{
4235 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4236
4237 if (tty->termios->c_cflag == old_termios->c_cflag &&
4238 tty->termios->c_iflag == old_termios->c_iflag)
4239 return;
4240
4241 change_speed(info);
4242
4243 /* Handle turning off CRTSCTS */
4244 if ((old_termios->c_cflag & CRTSCTS) &&
4245 !(tty->termios->c_cflag & CRTSCTS)) {
4246 tty->hw_stopped = 0;
4247 rs_start(tty);
4248 }
4249
4250}
4251
4252/* In debugport.c - register a console write function that uses the normal
4253 * serial driver
4254 */
4255typedef int (*debugport_write_function)(int i, const char *buf, unsigned int len);
4256
4257extern debugport_write_function debug_write_function;
4258
4259static int rs_debug_write_function(int i, const char *buf, unsigned int len)
4260{
4261 int cnt;
4262 int written = 0;
4263 struct tty_struct *tty;
4264 static int recurse_cnt = 0;
4265
4266 tty = rs_table[i].tty;
4267 if (tty) {
4268 unsigned long flags;
4269 if (recurse_cnt > 5) /* We skip this debug output */
4270 return 1;
4271
4272 local_irq_save(flags);
4273 recurse_cnt++;
4274 local_irq_restore(flags);
4275 do {
4276 cnt = rs_write(tty, 0, buf + written, len);
4277 if (cnt >= 0) {
4278 written += cnt;
4279 buf += cnt;
4280 len -= cnt;
4281 } else
4282 len = cnt;
4283 } while(len > 0);
4284 local_irq_save(flags);
4285 recurse_cnt--;
4286 local_irq_restore(flags);
4287 return 1;
4288 }
4289 return 0;
4290}
4291
4292/*
4293 * ------------------------------------------------------------
4294 * rs_close()
4295 *
4296 * This routine is called when the serial port gets closed. First, we
4297 * wait for the last remaining data to be sent. Then, we unlink its
4298 * S structure from the interrupt chain if necessary, and we free
4299 * that IRQ if nothing is left in the chain.
4300 * ------------------------------------------------------------
4301 */
4302static void
4303rs_close(struct tty_struct *tty, struct file * filp)
4304{
4305 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4306 unsigned long flags;
4307
4308 if (!info)
4309 return;
4310
4311 /* interrupts are disabled for this entire function */
4312
4313 save_flags(flags);
4314 cli();
4315
4316 if (tty_hung_up_p(filp)) {
4317 restore_flags(flags);
4318 return;
4319 }
4320
4321#ifdef SERIAL_DEBUG_OPEN
4322 printk("[%d] rs_close ttyS%d, count = %d\n", current->pid,
4323 info->line, info->count);
4324#endif
4325 if ((tty->count == 1) && (info->count != 1)) {
4326 /*
4327 * Uh, oh. tty->count is 1, which means that the tty
4328 * structure will be freed. Info->count should always
4329 * be one in these conditions. If it's greater than
4330 * one, we've got real problems, since it means the
4331 * serial port won't be shutdown.
4332 */
4333 printk(KERN_CRIT
4334 "rs_close: bad serial port count; tty->count is 1, "
4335 "info->count is %d\n", info->count);
4336 info->count = 1;
4337 }
4338 if (--info->count < 0) {
4339 printk(KERN_CRIT "rs_close: bad serial port count for ttyS%d: %d\n",
4340 info->line, info->count);
4341 info->count = 0;
4342 }
4343 if (info->count) {
4344 restore_flags(flags);
4345 return;
4346 }
4347 info->flags |= ASYNC_CLOSING;
4348 /*
4349 * Save the termios structure, since this port may have
4350 * separate termios for callout and dialin.
4351 */
4352 if (info->flags & ASYNC_NORMAL_ACTIVE)
4353 info->normal_termios = *tty->termios;
4354 /*
4355 * Now we wait for the transmit buffer to clear; and we notify
4356 * the line discipline to only process XON/XOFF characters.
4357 */
4358 tty->closing = 1;
4359 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
4360 tty_wait_until_sent(tty, info->closing_wait);
4361 /*
4362 * At this point we stop accepting input. To do this, we
4363 * disable the serial receiver and the DMA receive interrupt.
4364 */
4365#ifdef SERIAL_HANDLE_EARLY_ERRORS
4366 e100_disable_serial_data_irq(info);
4367#endif
4368
4369#ifndef CONFIG_SVINTO_SIM
4370 e100_disable_rx(info);
4371 e100_disable_rx_irq(info);
4372
4373 if (info->flags & ASYNC_INITIALIZED) {
4374 /*
4375 * Before we drop DTR, make sure the UART transmitter
4376 * has completely drained; this is especially
4377 * important as we have a transmit FIFO!
4378 */
4379 rs_wait_until_sent(tty, HZ);
4380 }
4381#endif
4382
4383 shutdown(info);
4384 if (tty->driver->flush_buffer)
4385 tty->driver->flush_buffer(tty);
4386 if (tty->ldisc.flush_buffer)
4387 tty->ldisc.flush_buffer(tty);
4388 tty->closing = 0;
4389 info->event = 0;
4390 info->tty = 0;
4391 if (info->blocked_open) {
Nishanth Aravamudan3c76bc52005-11-07 01:01:21 -08004392 if (info->close_delay)
4393 schedule_timeout_interruptible(info->close_delay);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004394 wake_up_interruptible(&info->open_wait);
4395 }
4396 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
4397 wake_up_interruptible(&info->close_wait);
4398 restore_flags(flags);
4399
4400 /* port closed */
4401
4402#if defined(CONFIG_ETRAX_RS485)
4403 if (info->rs485.enabled) {
4404 info->rs485.enabled = 0;
4405#if defined(CONFIG_ETRAX_RS485_ON_PA)
4406 *R_PORT_PA_DATA = port_pa_data_shadow &= ~(1 << rs485_pa_bit);
4407#endif
4408#if defined(CONFIG_ETRAX_RS485_ON_PORT_G)
4409 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4410 rs485_port_g_bit, 0);
4411#endif
4412#if defined(CONFIG_ETRAX_RS485_LTC1387)
4413 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4414 CONFIG_ETRAX_RS485_LTC1387_DXEN_PORT_G_BIT, 0);
4415 REG_SHADOW_SET(R_PORT_G_DATA, port_g_data_shadow,
4416 CONFIG_ETRAX_RS485_LTC1387_RXEN_PORT_G_BIT, 0);
4417#endif
4418 }
4419#endif
4420}
4421
4422/*
4423 * rs_wait_until_sent() --- wait until the transmitter is empty
4424 */
4425static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
4426{
4427 unsigned long orig_jiffies;
4428 struct e100_serial *info = (struct e100_serial *)tty->driver_data;
4429 unsigned long curr_time = jiffies;
4430 unsigned long curr_time_usec = GET_JIFFIES_USEC();
4431 long elapsed_usec =
4432 (curr_time - info->last_tx_active) * (1000000/HZ) +
4433 curr_time_usec - info->last_tx_active_usec;
4434
4435 /*
4436 * Check R_DMA_CHx_STATUS bit 0-6=number of available bytes in FIFO
4437 * R_DMA_CHx_HWSW bit 31-16=nbr of bytes left in DMA buffer (0=64k)
4438 */
4439 orig_jiffies = jiffies;
4440 while (info->xmit.head != info->xmit.tail || /* More in send queue */
4441 (*info->ostatusadr & 0x007f) || /* more in FIFO */
4442 (elapsed_usec < 2*info->char_time_usec)) {
Nishanth Aravamudan3c76bc52005-11-07 01:01:21 -08004443 schedule_timeout_interruptible(1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004444 if (signal_pending(current))
4445 break;
4446 if (timeout && time_after(jiffies, orig_jiffies + timeout))
4447 break;
4448 curr_time = jiffies;
4449 curr_time_usec = GET_JIFFIES_USEC();
4450 elapsed_usec =
4451 (curr_time - info->last_tx_active) * (1000000/HZ) +
4452 curr_time_usec - info->last_tx_active_usec;
4453 }
4454 set_current_state(TASK_RUNNING);
4455}
4456
4457/*
4458 * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
4459 */
4460void
4461rs_hangup(struct tty_struct *tty)
4462{
4463 struct e100_serial * info = (struct e100_serial *)tty->driver_data;
4464
4465 rs_flush_buffer(tty);
4466 shutdown(info);
4467 info->event = 0;
4468 info->count = 0;
4469 info->flags &= ~ASYNC_NORMAL_ACTIVE;
4470 info->tty = 0;
4471 wake_up_interruptible(&info->open_wait);
4472}
4473
4474/*
4475 * ------------------------------------------------------------
4476 * rs_open() and friends
4477 * ------------------------------------------------------------
4478 */
4479static int
4480block_til_ready(struct tty_struct *tty, struct file * filp,
4481 struct e100_serial *info)
4482{
4483 DECLARE_WAITQUEUE(wait, current);
4484 unsigned long flags;
4485 int retval;
4486 int do_clocal = 0, extra_count = 0;
4487
4488 /*
4489 * If the device is in the middle of being closed, then block
4490 * until it's done, and then try again.
4491 */
4492 if (tty_hung_up_p(filp) ||
4493 (info->flags & ASYNC_CLOSING)) {
4494 if (info->flags & ASYNC_CLOSING)
4495 interruptible_sleep_on(&info->close_wait);
4496#ifdef SERIAL_DO_RESTART
4497 if (info->flags & ASYNC_HUP_NOTIFY)
4498 return -EAGAIN;
4499 else
4500 return -ERESTARTSYS;
4501#else
4502 return -EAGAIN;
4503#endif
4504 }
4505
4506 /*
4507 * If non-blocking mode is set, or the port is not enabled,
4508 * then make the check up front and then exit.
4509 */
4510 if ((filp->f_flags & O_NONBLOCK) ||
4511 (tty->flags & (1 << TTY_IO_ERROR))) {
4512 info->flags |= ASYNC_NORMAL_ACTIVE;
4513 return 0;
4514 }
4515
4516 if (tty->termios->c_cflag & CLOCAL) {
4517 do_clocal = 1;
4518 }
4519
4520 /*
4521 * Block waiting for the carrier detect and the line to become
4522 * free (i.e., not in use by the callout). While we are in
4523 * this loop, info->count is dropped by one, so that
4524 * rs_close() knows when to free things. We restore it upon
4525 * exit, either normal or abnormal.
4526 */
4527 retval = 0;
4528 add_wait_queue(&info->open_wait, &wait);
4529#ifdef SERIAL_DEBUG_OPEN
4530 printk("block_til_ready before block: ttyS%d, count = %d\n",
4531 info->line, info->count);
4532#endif
4533 save_flags(flags);
4534 cli();
4535 if (!tty_hung_up_p(filp)) {
4536 extra_count++;
4537 info->count--;
4538 }
4539 restore_flags(flags);
4540 info->blocked_open++;
4541 while (1) {
4542 save_flags(flags);
4543 cli();
4544 /* assert RTS and DTR */
4545 e100_rts(info, 1);
4546 e100_dtr(info, 1);
4547 restore_flags(flags);
4548 set_current_state(TASK_INTERRUPTIBLE);
4549 if (tty_hung_up_p(filp) ||
4550 !(info->flags & ASYNC_INITIALIZED)) {
4551#ifdef SERIAL_DO_RESTART
4552 if (info->flags & ASYNC_HUP_NOTIFY)
4553 retval = -EAGAIN;
4554 else
4555 retval = -ERESTARTSYS;
4556#else
4557 retval = -EAGAIN;
4558#endif
4559 break;
4560 }
4561 if (!(info->flags & ASYNC_CLOSING) && do_clocal)
4562 /* && (do_clocal || DCD_IS_ASSERTED) */
4563 break;
4564 if (signal_pending(current)) {
4565 retval = -ERESTARTSYS;
4566 break;
4567 }
4568#ifdef SERIAL_DEBUG_OPEN
4569 printk("block_til_ready blocking: ttyS%d, count = %d\n",
4570 info->line, info->count);
4571#endif
4572 schedule();
4573 }
4574 set_current_state(TASK_RUNNING);
4575 remove_wait_queue(&info->open_wait, &wait);
4576 if (extra_count)
4577 info->count++;
4578 info->blocked_open--;
4579#ifdef SERIAL_DEBUG_OPEN
4580 printk("block_til_ready after blocking: ttyS%d, count = %d\n",
4581 info->line, info->count);
4582#endif
4583 if (retval)
4584 return retval;
4585 info->flags |= ASYNC_NORMAL_ACTIVE;
4586 return 0;
4587}
4588
4589/*
4590 * This routine is called whenever a serial port is opened.
4591 * It performs the serial-specific initialization for the tty structure.
4592 */
4593static int
4594rs_open(struct tty_struct *tty, struct file * filp)
4595{
4596 struct e100_serial *info;
4597 int retval, line;
4598 unsigned long page;
4599
4600 /* find which port we want to open */
4601
4602 line = tty->index;
4603
4604 if (line < 0 || line >= NR_PORTS)
4605 return -ENODEV;
4606
4607 /* find the corresponding e100_serial struct in the table */
4608 info = rs_table + line;
4609
4610 /* don't allow the opening of ports that are not enabled in the HW config */
4611 if (!info->enabled)
4612 return -ENODEV;
4613
4614#ifdef SERIAL_DEBUG_OPEN
4615 printk("[%d] rs_open %s, count = %d\n", current->pid, tty->name,
4616 info->count);
4617#endif
4618
4619 info->count++;
4620 tty->driver_data = info;
4621 info->tty = tty;
4622
4623 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
4624
4625 if (!tmp_buf) {
4626 page = get_zeroed_page(GFP_KERNEL);
4627 if (!page) {
4628 return -ENOMEM;
4629 }
4630 if (tmp_buf)
4631 free_page(page);
4632 else
4633 tmp_buf = (unsigned char *) page;
4634 }
4635
4636 /*
4637 * If the port is in the middle of closing, bail out now
4638 */
4639 if (tty_hung_up_p(filp) ||
4640 (info->flags & ASYNC_CLOSING)) {
4641 if (info->flags & ASYNC_CLOSING)
4642 interruptible_sleep_on(&info->close_wait);
4643#ifdef SERIAL_DO_RESTART
4644 return ((info->flags & ASYNC_HUP_NOTIFY) ?
4645 -EAGAIN : -ERESTARTSYS);
4646#else
4647 return -EAGAIN;
4648#endif
4649 }
4650
4651 /*
4652 * Start up the serial port
4653 */
4654
4655 retval = startup(info);
4656 if (retval)
4657 return retval;
4658
4659 retval = block_til_ready(tty, filp, info);
4660 if (retval) {
4661#ifdef SERIAL_DEBUG_OPEN
4662 printk("rs_open returning after block_til_ready with %d\n",
4663 retval);
4664#endif
4665 return retval;
4666 }
4667
4668 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
4669 *tty->termios = info->normal_termios;
4670 change_speed(info);
4671 }
4672
4673#ifdef SERIAL_DEBUG_OPEN
4674 printk("rs_open ttyS%d successful...\n", info->line);
4675#endif
4676 DLOG_INT_TRIG( log_int_pos = 0);
4677
4678 DFLIP( if (info->line == SERIAL_DEBUG_LINE) {
4679 info->icount.rx = 0;
4680 } );
4681
4682 return 0;
4683}
4684
4685/*
4686 * /proc fs routines....
4687 */
4688
Adrian Bunk41c28ff2006-03-23 03:00:56 -08004689static int line_info(char *buf, struct e100_serial *info)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004690{
4691 char stat_buf[30];
4692 int ret;
4693 unsigned long tmp;
4694
4695 ret = sprintf(buf, "%d: uart:E100 port:%lX irq:%d",
4696 info->line, (unsigned long)info->port, info->irq);
4697
4698 if (!info->port || (info->type == PORT_UNKNOWN)) {
4699 ret += sprintf(buf+ret, "\n");
4700 return ret;
4701 }
4702
4703 stat_buf[0] = 0;
4704 stat_buf[1] = 0;
4705 if (!E100_RTS_GET(info))
4706 strcat(stat_buf, "|RTS");
4707 if (!E100_CTS_GET(info))
4708 strcat(stat_buf, "|CTS");
4709 if (!E100_DTR_GET(info))
4710 strcat(stat_buf, "|DTR");
4711 if (!E100_DSR_GET(info))
4712 strcat(stat_buf, "|DSR");
4713 if (!E100_CD_GET(info))
4714 strcat(stat_buf, "|CD");
4715 if (!E100_RI_GET(info))
4716 strcat(stat_buf, "|RI");
4717
4718 ret += sprintf(buf+ret, " baud:%d", info->baud);
4719
4720 ret += sprintf(buf+ret, " tx:%lu rx:%lu",
4721 (unsigned long)info->icount.tx,
4722 (unsigned long)info->icount.rx);
4723 tmp = CIRC_CNT(info->xmit.head, info->xmit.tail, SERIAL_XMIT_SIZE);
4724 if (tmp) {
4725 ret += sprintf(buf+ret, " tx_pend:%lu/%lu",
4726 (unsigned long)tmp,
4727 (unsigned long)SERIAL_XMIT_SIZE);
4728 }
4729
4730 ret += sprintf(buf+ret, " rx_pend:%lu/%lu",
4731 (unsigned long)info->recv_cnt,
4732 (unsigned long)info->max_recv_cnt);
4733
4734#if 1
4735 if (info->tty) {
4736
4737 if (info->tty->stopped)
4738 ret += sprintf(buf+ret, " stopped:%i",
4739 (int)info->tty->stopped);
4740 if (info->tty->hw_stopped)
4741 ret += sprintf(buf+ret, " hw_stopped:%i",
4742 (int)info->tty->hw_stopped);
4743 }
4744
4745 {
4746 unsigned char rstat = info->port[REG_STATUS];
4747 if (rstat & IO_MASK(R_SERIAL0_STATUS, xoff_detect) )
4748 ret += sprintf(buf+ret, " xoff_detect:1");
4749 }
4750
4751#endif
4752
4753
4754
4755
4756 if (info->icount.frame)
4757 ret += sprintf(buf+ret, " fe:%lu",
4758 (unsigned long)info->icount.frame);
4759
4760 if (info->icount.parity)
4761 ret += sprintf(buf+ret, " pe:%lu",
4762 (unsigned long)info->icount.parity);
4763
4764 if (info->icount.brk)
4765 ret += sprintf(buf+ret, " brk:%lu",
4766 (unsigned long)info->icount.brk);
4767
4768 if (info->icount.overrun)
4769 ret += sprintf(buf+ret, " oe:%lu",
4770 (unsigned long)info->icount.overrun);
4771
4772 /*
4773 * Last thing is the RS-232 status lines
4774 */
4775 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
4776 return ret;
4777}
4778
4779int rs_read_proc(char *page, char **start, off_t off, int count,
4780 int *eof, void *data)
4781{
4782 int i, len = 0, l;
4783 off_t begin = 0;
4784
4785 len += sprintf(page, "serinfo:1.0 driver:%s\n",
4786 serial_version);
4787 for (i = 0; i < NR_PORTS && len < 4000; i++) {
4788 if (!rs_table[i].enabled)
4789 continue;
4790 l = line_info(page + len, &rs_table[i]);
4791 len += l;
4792 if (len+begin > off+count)
4793 goto done;
4794 if (len+begin < off) {
4795 begin += len;
4796 len = 0;
4797 }
4798 }
4799#ifdef DEBUG_LOG_INCLUDED
4800 for (i = 0; i < debug_log_pos; i++) {
4801 len += sprintf(page + len, "%-4i %lu.%lu ", i, debug_log[i].time, timer_data_to_ns(debug_log[i].timer_data));
4802 len += sprintf(page + len, debug_log[i].string, debug_log[i].value);
4803 if (len+begin > off+count)
4804 goto done;
4805 if (len+begin < off) {
4806 begin += len;
4807 len = 0;
4808 }
4809 }
4810 len += sprintf(page + len, "debug_log %i/%i %li bytes\n",
4811 i, DEBUG_LOG_SIZE, begin+len);
4812 debug_log_pos = 0;
4813#endif
4814
4815 *eof = 1;
4816done:
4817 if (off >= len+begin)
4818 return 0;
4819 *start = page + (off-begin);
4820 return ((count < begin+len-off) ? count : begin+len-off);
4821}
4822
4823/* Finally, routines used to initialize the serial driver. */
4824
4825static void
4826show_serial_version(void)
4827{
4828 printk(KERN_INFO
4829 "ETRAX 100LX serial-driver %s, (c) 2000-2004 Axis Communications AB\r\n",
4830 &serial_version[11]); /* "$Revision: x.yy" */
4831}
4832
4833/* rs_init inits the driver at boot (using the module_init chain) */
4834
4835static struct tty_operations rs_ops = {
4836 .open = rs_open,
4837 .close = rs_close,
4838 .write = rs_write,
4839 .flush_chars = rs_flush_chars,
4840 .write_room = rs_write_room,
4841 .chars_in_buffer = rs_chars_in_buffer,
4842 .flush_buffer = rs_flush_buffer,
4843 .ioctl = rs_ioctl,
4844 .throttle = rs_throttle,
4845 .unthrottle = rs_unthrottle,
4846 .set_termios = rs_set_termios,
4847 .stop = rs_stop,
4848 .start = rs_start,
4849 .hangup = rs_hangup,
4850 .break_ctl = rs_break,
4851 .send_xchar = rs_send_xchar,
4852 .wait_until_sent = rs_wait_until_sent,
4853 .read_proc = rs_read_proc,
4854};
4855
4856static int __init
4857rs_init(void)
4858{
4859 int i;
4860 struct e100_serial *info;
4861 struct tty_driver *driver = alloc_tty_driver(NR_PORTS);
4862
4863 if (!driver)
4864 return -ENOMEM;
4865
4866 show_serial_version();
4867
4868 /* Setup the timed flush handler system */
4869
4870#if !defined(CONFIG_ETRAX_SERIAL_FAST_TIMER)
4871 init_timer(&flush_timer);
4872 flush_timer.function = timed_flush_handler;
4873 mod_timer(&flush_timer, jiffies + CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS);
4874#endif
4875
4876 /* Initialize the tty_driver structure */
4877
4878 driver->driver_name = "serial";
4879 driver->name = "ttyS";
4880 driver->major = TTY_MAJOR;
4881 driver->minor_start = 64;
4882 driver->type = TTY_DRIVER_TYPE_SERIAL;
4883 driver->subtype = SERIAL_TYPE_NORMAL;
4884 driver->init_termios = tty_std_termios;
4885 driver->init_termios.c_cflag =
4886 B115200 | CS8 | CREAD | HUPCL | CLOCAL; /* is normally B9600 default... */
4887 driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_NO_DEVFS;
4888 driver->termios = serial_termios;
4889 driver->termios_locked = serial_termios_locked;
4890
4891 tty_set_operations(driver, &rs_ops);
4892 serial_driver = driver;
4893 if (tty_register_driver(driver))
4894 panic("Couldn't register serial driver\n");
4895 /* do some initializing for the separate ports */
4896
4897 for (i = 0, info = rs_table; i < NR_PORTS; i++,info++) {
4898 info->uses_dma_in = 0;
4899 info->uses_dma_out = 0;
4900 info->line = i;
4901 info->tty = 0;
4902 info->type = PORT_ETRAX;
4903 info->tr_running = 0;
4904 info->forced_eop = 0;
4905 info->baud_base = DEF_BAUD_BASE;
4906 info->custom_divisor = 0;
4907 info->flags = 0;
4908 info->close_delay = 5*HZ/10;
4909 info->closing_wait = 30*HZ;
4910 info->x_char = 0;
4911 info->event = 0;
4912 info->count = 0;
4913 info->blocked_open = 0;
4914 info->normal_termios = driver->init_termios;
4915 init_waitqueue_head(&info->open_wait);
4916 init_waitqueue_head(&info->close_wait);
4917 info->xmit.buf = NULL;
4918 info->xmit.tail = info->xmit.head = 0;
4919 info->first_recv_buffer = info->last_recv_buffer = NULL;
4920 info->recv_cnt = info->max_recv_cnt = 0;
4921 info->last_tx_active_usec = 0;
4922 info->last_tx_active = 0;
4923
4924#if defined(CONFIG_ETRAX_RS485)
4925 /* Set sane defaults */
4926 info->rs485.rts_on_send = 0;
4927 info->rs485.rts_after_sent = 1;
4928 info->rs485.delay_rts_before_send = 0;
4929 info->rs485.enabled = 0;
4930#endif
4931 INIT_WORK(&info->work, do_softint, info);
4932
4933 if (info->enabled) {
4934 printk(KERN_INFO "%s%d at 0x%x is a builtin UART with DMA\n",
4935 serial_driver->name, info->line, (unsigned int)info->port);
4936 }
4937 }
4938#ifdef CONFIG_ETRAX_FAST_TIMER
4939#ifdef CONFIG_ETRAX_SERIAL_FAST_TIMER
4940 memset(fast_timers, 0, sizeof(fast_timers));
4941#endif
4942#ifdef CONFIG_ETRAX_RS485
4943 memset(fast_timers_rs485, 0, sizeof(fast_timers_rs485));
4944#endif
4945 fast_timer_init();
4946#endif
4947
4948#ifndef CONFIG_SVINTO_SIM
4949 /* Not needed in simulator. May only complicate stuff. */
4950 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
4951
4952 if (request_irq(SERIAL_IRQ_NBR, ser_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial ", NULL))
4953 panic("irq8");
4954
4955#ifdef CONFIG_ETRAX_SERIAL_PORT0
4956#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA6_OUT
4957 if (request_irq(SER0_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 0 dma tr", NULL))
4958 panic("irq22");
4959#endif
4960#ifdef CONFIG_ETRAX_SERIAL_PORT0_DMA7_IN
4961 if (request_irq(SER0_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 0 dma rec", NULL))
4962 panic("irq23");
4963#endif
4964#endif
4965
4966#ifdef CONFIG_ETRAX_SERIAL_PORT1
4967#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA8_OUT
4968 if (request_irq(SER1_DMA_TX_IRQ_NBR, tr_interrupt, SA_INTERRUPT, "serial 1 dma tr", NULL))
4969 panic("irq24");
4970#endif
4971#ifdef CONFIG_ETRAX_SERIAL_PORT1_DMA9_IN
4972 if (request_irq(SER1_DMA_RX_IRQ_NBR, rec_interrupt, SA_INTERRUPT, "serial 1 dma rec", NULL))
4973 panic("irq25");
4974#endif
4975#endif
4976#ifdef CONFIG_ETRAX_SERIAL_PORT2
4977 /* DMA Shared with par0 (and SCSI0 and ATA) */
4978#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA2_OUT
4979 if (request_irq(SER2_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma tr", NULL))
4980 panic("irq18");
4981#endif
4982#ifdef CONFIG_ETRAX_SERIAL_PORT2_DMA3_IN
4983 if (request_irq(SER2_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 2 dma rec", NULL))
4984 panic("irq19");
4985#endif
4986#endif
4987#ifdef CONFIG_ETRAX_SERIAL_PORT3
4988 /* DMA Shared with par1 (and SCSI1 and Extern DMA 0) */
4989#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA4_OUT
4990 if (request_irq(SER3_DMA_TX_IRQ_NBR, tr_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma tr", NULL))
4991 panic("irq20");
4992#endif
4993#ifdef CONFIG_ETRAX_SERIAL_PORT3_DMA5_IN
4994 if (request_irq(SER3_DMA_RX_IRQ_NBR, rec_interrupt, SA_SHIRQ | SA_INTERRUPT, "serial 3 dma rec", NULL))
4995 panic("irq21");
4996#endif
4997#endif
4998
4999#ifdef CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST
5000 if (request_irq(TIMER1_IRQ_NBR, timeout_interrupt, SA_SHIRQ | SA_INTERRUPT,
5001 "fast serial dma timeout", NULL)) {
5002 printk(KERN_CRIT "err: timer1 irq\n");
5003 }
5004#endif
5005#endif /* CONFIG_SVINTO_SIM */
5006 debug_write_function = rs_debug_write_function;
5007 return 0;
5008}
5009
5010/* this makes sure that rs_init is called during kernel boot */
5011
5012module_init(rs_init);