blob: 303bd668deb7ca6e0f830b1a99f81f35c4c62006 [file] [log] [blame]
Li Yang7a234d02006-10-02 20:10:10 -05001/*
2 * MPC8360E EMDS Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12
13/*
14/memreserve/ 00000000 1000000;
15*/
16
17/ {
18 model = "MPC8360EPB";
19 compatible = "MPC83xx";
20 #address-cells = <1>;
21 #size-cells = <1>;
22 linux,phandle = <100>;
23
24 cpus {
25 #cpus = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
28 linux,phandle = <200>;
29
30 PowerPC,8360@0 {
31 device_type = "cpu";
32 reg = <0>;
33 d-cache-line-size = <20>; // 32 bytes
34 i-cache-line-size = <20>; // 32 bytes
35 d-cache-size = <8000>; // L1, 32K
36 i-cache-size = <8000>; // L1, 32K
37 timebase-frequency = <3EF1480>;
38 bus-frequency = <FBC5200>;
39 clock-frequency = <1F78A400>;
40 32-bit;
41 linux,phandle = <201>;
Li Yang7a234d02006-10-02 20:10:10 -050042 };
43 };
44
45 memory {
46 device_type = "memory";
47 linux,phandle = <300>;
48 reg = <00000000 10000000>;
49 };
50
51 bcsr@f8000000 {
52 device_type = "board-control";
53 reg = <f8000000 8000>;
54 };
55
56 soc8360@e0000000 {
57 #address-cells = <1>;
58 #size-cells = <1>;
59 #interrupt-cells = <2>;
60 device_type = "soc";
61 ranges = <0 e0000000 00100000>;
62 reg = <e0000000 00000200>;
63 bus-frequency = <FBC5200>;
64
65 wdt@200 {
66 device_type = "watchdog";
67 compatible = "mpc83xx_wdt";
68 reg = <200 100>;
69 };
70
71 i2c@3000 {
72 device_type = "i2c";
73 compatible = "fsl-i2c";
74 reg = <3000 100>;
75 interrupts = <e 8>;
76 interrupt-parent = <700>;
77 dfsrr;
78 };
79
80 i2c@3100 {
81 device_type = "i2c";
82 compatible = "fsl-i2c";
83 reg = <3100 100>;
84 interrupts = <f 8>;
85 interrupt-parent = <700>;
86 dfsrr;
87 };
88
89 serial@4500 {
90 device_type = "serial";
91 compatible = "ns16550";
92 reg = <4500 100>;
93 clock-frequency = <FBC5200>;
94 interrupts = <9 8>;
95 interrupt-parent = <700>;
96 };
97
98 serial@4600 {
99 device_type = "serial";
100 compatible = "ns16550";
101 reg = <4600 100>;
102 clock-frequency = <FBC5200>;
103 interrupts = <a 8>;
104 interrupt-parent = <700>;
105 };
106
107 crypto@30000 {
108 device_type = "crypto";
109 model = "SEC2";
110 compatible = "talitos";
111 reg = <30000 10000>;
112 interrupts = <b 8>;
113 interrupt-parent = <700>;
114 num-channels = <4>;
115 channel-fifo-len = <18>;
116 exec-units-mask = <0000007e>;
117 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
118 descriptor-types-mask = <01010ebf>;
119 };
120
121 pci@8500 {
122 linux,phandle = <8500>;
123 interrupt-map-mask = <f800 0 0 7>;
124 interrupt-map = <
125
126 /* IDSEL 0x11 AD17 */
127 8800 0 0 1 700 14 8
128 8800 0 0 2 700 15 8
129 8800 0 0 3 700 16 8
130 8800 0 0 4 700 17 8
131
132 /* IDSEL 0x12 AD18 */
133 9000 0 0 1 700 16 8
134 9000 0 0 2 700 17 8
135 9000 0 0 3 700 14 8
136 9000 0 0 4 700 15 8
137
138 /* IDSEL 0x13 AD19 */
139 9800 0 0 1 700 17 8
140 9800 0 0 2 700 14 8
141 9800 0 0 3 700 15 8
142 9800 0 0 4 700 16 8
143
144 /* IDSEL 0x15 AD21*/
145 a800 0 0 1 700 14 8
146 a800 0 0 2 700 15 8
147 a800 0 0 3 700 16 8
148 a800 0 0 4 700 17 8
149
150 /* IDSEL 0x16 AD22*/
151 b000 0 0 1 700 17 8
152 b000 0 0 2 700 14 8
153 b000 0 0 3 700 15 8
154 b000 0 0 4 700 16 8
155
156 /* IDSEL 0x17 AD23*/
157 b800 0 0 1 700 16 8
158 b800 0 0 2 700 17 8
159 b800 0 0 3 700 14 8
160 b800 0 0 4 700 15 8
161
162 /* IDSEL 0x18 AD24*/
163 c000 0 0 1 700 15 8
164 c000 0 0 2 700 16 8
165 c000 0 0 3 700 17 8
166 c000 0 0 4 700 14 8>;
167 interrupt-parent = <700>;
168 interrupts = <42 8>;
169 bus-range = <0 0>;
170 ranges = <02000000 0 a0000000 a0000000 0 10000000
171 42000000 0 80000000 80000000 0 10000000
172 01000000 0 00000000 e2000000 0 00100000>;
173 clock-frequency = <3f940aa>;
174 #interrupt-cells = <1>;
175 #size-cells = <2>;
176 #address-cells = <3>;
177 reg = <8500 100>;
178 compatible = "83xx";
179 device_type = "pci";
180 };
181
182 pic@700 {
183 linux,phandle = <700>;
184 interrupt-controller;
185 #address-cells = <0>;
186 #interrupt-cells = <2>;
187 reg = <700 100>;
188 built-in;
189 device_type = "ipic";
190 };
191
192 par_io@1400 {
193 reg = <1400 100>;
194 device_type = "par_io";
195 num-ports = <7>;
196
197 ucc_pin@01 {
198 linux,phandle = <140001>;
199 pio-map = <
200 /* port pin dir open_drain assignment has_irq */
201 0 3 1 0 1 0 /* TxD0 */
202 0 4 1 0 1 0 /* TxD1 */
203 0 5 1 0 1 0 /* TxD2 */
204 0 6 1 0 1 0 /* TxD3 */
205 1 6 1 0 3 0 /* TxD4 */
206 1 7 1 0 1 0 /* TxD5 */
207 1 9 1 0 2 0 /* TxD6 */
208 1 a 1 0 2 0 /* TxD7 */
209 0 9 2 0 1 0 /* RxD0 */
210 0 a 2 0 1 0 /* RxD1 */
211 0 b 2 0 1 0 /* RxD2 */
212 0 c 2 0 1 0 /* RxD3 */
213 0 d 2 0 1 0 /* RxD4 */
214 1 1 2 0 2 0 /* RxD5 */
215 1 0 2 0 2 0 /* RxD6 */
216 1 4 2 0 2 0 /* RxD7 */
217 0 7 1 0 1 0 /* TX_EN */
218 0 8 1 0 1 0 /* TX_ER */
219 0 f 2 0 1 0 /* RX_DV */
220 0 10 2 0 1 0 /* RX_ER */
221 0 0 2 0 1 0 /* RX_CLK */
222 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
223 2 8 2 0 1 0>; /* GTX125 - CLK9 */
224 };
225 ucc_pin@02 {
226 linux,phandle = <140002>;
227 pio-map = <
228 /* port pin dir open_drain assignment has_irq */
229 0 11 1 0 1 0 /* TxD0 */
230 0 12 1 0 1 0 /* TxD1 */
231 0 13 1 0 1 0 /* TxD2 */
232 0 14 1 0 1 0 /* TxD3 */
233 1 2 1 0 1 0 /* TxD4 */
234 1 3 1 0 2 0 /* TxD5 */
235 1 5 1 0 3 0 /* TxD6 */
236 1 8 1 0 3 0 /* TxD7 */
237 0 17 2 0 1 0 /* RxD0 */
238 0 18 2 0 1 0 /* RxD1 */
239 0 19 2 0 1 0 /* RxD2 */
240 0 1a 2 0 1 0 /* RxD3 */
241 0 1b 2 0 1 0 /* RxD4 */
242 1 c 2 0 2 0 /* RxD5 */
243 1 d 2 0 3 0 /* RxD6 */
244 1 b 2 0 2 0 /* RxD7 */
245 0 15 1 0 1 0 /* TX_EN */
246 0 16 1 0 1 0 /* TX_ER */
247 0 1d 2 0 1 0 /* RX_DV */
248 0 1e 2 0 1 0 /* RX_ER */
249 0 1f 2 0 1 0 /* RX_CLK */
250 2 2 1 0 2 0 /* GTX_CLK - CLK10 */
251 2 3 2 0 1 0 /* GTX125 - CLK4 */
252 0 1 3 0 2 0 /* MDIO */
253 0 2 1 0 1 0>; /* MDC */
254 };
255
256 };
257 };
258
259 qe@e0100000 {
260 #address-cells = <1>;
261 #size-cells = <1>;
262 device_type = "qe";
263 model = "QE";
264 ranges = <0 e0100000 00100000>;
265 reg = <e0100000 480>;
266 brg-frequency = <0>;
267 bus-frequency = <179A7B00>;
268
269 muram@10000 {
270 device_type = "muram";
271 ranges = <0 00010000 0000c000>;
272
273 data-only@0{
274 reg = <0 c000>;
275 };
276 };
277
278 spi@4c0 {
279 device_type = "spi";
280 compatible = "fsl_spi";
281 reg = <4c0 40>;
282 interrupts = <2>;
283 interrupt-parent = <80>;
284 mode = "cpu";
285 };
286
287 spi@500 {
288 device_type = "spi";
289 compatible = "fsl_spi";
290 reg = <500 40>;
291 interrupts = <1>;
292 interrupt-parent = <80>;
293 mode = "cpu";
294 };
295
296 usb@6c0 {
297 device_type = "usb";
298 compatible = "qe_udc";
299 reg = <6c0 40 8B00 100>;
300 interrupts = <b>;
301 interrupt-parent = <80>;
302 mode = "slave";
303 };
304
305 ucc@2000 {
306 device_type = "network";
307 compatible = "ucc_geth";
308 model = "UCC";
309 device-id = <1>;
310 reg = <2000 200>;
311 interrupts = <20>;
312 interrupt-parent = <80>;
313 mac-address = [ 00 04 9f 00 23 23 ];
314 rx-clock = <0>;
315 tx-clock = <19>;
316 phy-handle = <212000>;
317 pio-handle = <140001>;
318 };
319
320 ucc@3000 {
321 device_type = "network";
322 compatible = "ucc_geth";
323 model = "UCC";
324 device-id = <2>;
325 reg = <3000 200>;
326 interrupts = <21>;
327 interrupt-parent = <80>;
328 mac-address = [ 00 11 22 33 44 55 ];
329 rx-clock = <0>;
330 tx-clock = <14>;
331 phy-handle = <212001>;
332 pio-handle = <140002>;
333 };
334
335 mdio@2120 {
336 #address-cells = <1>;
337 #size-cells = <0>;
338 reg = <2120 18>;
339 device_type = "mdio";
340 compatible = "ucc_geth_phy";
341
342 ethernet-phy@00 {
343 linux,phandle = <212000>;
344 interrupt-parent = <700>;
345 interrupts = <11 2>;
346 reg = <0>;
347 device_type = "ethernet-phy";
348 interface = <6>; //ENET_1000_GMII
349 };
350 ethernet-phy@01 {
351 linux,phandle = <212001>;
352 interrupt-parent = <700>;
353 interrupts = <12 2>;
354 reg = <1>;
355 device_type = "ethernet-phy";
356 interface = <6>;
357 };
358 };
359
360 qeic@80 {
361 linux,phandle = <80>;
362 interrupt-controller;
363 device_type = "qeic";
364 #address-cells = <0>;
365 #interrupt-cells = <1>;
366 reg = <80 80>;
367 built-in;
368 big-endian;
369 interrupts = <20 8 21 8>; //high:32 low:33
370 interrupt-parent = <700>;
371 };
372
373 };
374};