Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1 | |
| 2 | /* |
| 3 | * Copyright (c) 2011 Atheros Communications Inc. |
| 4 | * |
| 5 | * Permission to use, copy, modify, and/or distribute this software for any |
| 6 | * purpose with or without fee is hereby granted, provided that the above |
| 7 | * copyright notice and this permission notice appear in all copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 10 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 11 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 12 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 13 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 14 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 15 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 16 | */ |
| 17 | |
Stephen Rothwell | c6efe57 | 2011-09-28 18:32:34 +1000 | [diff] [blame] | 18 | #include <linux/moduleparam.h> |
Sam Leffler | 92ecbff | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 19 | #include <linux/of.h> |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 20 | #include <linux/mmc/sdio_func.h> |
| 21 | #include "core.h" |
| 22 | #include "cfg80211.h" |
| 23 | #include "target.h" |
| 24 | #include "debug.h" |
| 25 | #include "hif-ops.h" |
| 26 | |
| 27 | unsigned int debug_mask; |
Kalle Valo | 003353b | 2011-09-01 10:14:21 +0300 | [diff] [blame] | 28 | static unsigned int testmode; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 29 | |
| 30 | module_param(debug_mask, uint, 0644); |
Kalle Valo | 003353b | 2011-09-01 10:14:21 +0300 | [diff] [blame] | 31 | module_param(testmode, uint, 0644); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 32 | |
| 33 | /* |
| 34 | * Include definitions here that can be used to tune the WLAN module |
| 35 | * behavior. Different customers can tune the behavior as per their needs, |
| 36 | * here. |
| 37 | */ |
| 38 | |
| 39 | /* |
| 40 | * This configuration item enable/disable keepalive support. |
| 41 | * Keepalive support: In the absence of any data traffic to AP, null |
| 42 | * frames will be sent to the AP at periodic interval, to keep the association |
| 43 | * active. This configuration item defines the periodic interval. |
| 44 | * Use value of zero to disable keepalive support |
| 45 | * Default: 60 seconds |
| 46 | */ |
| 47 | #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60 |
| 48 | |
| 49 | /* |
| 50 | * This configuration item sets the value of disconnect timeout |
| 51 | * Firmware delays sending the disconnec event to the host for this |
| 52 | * timeout after is gets disconnected from the current AP. |
| 53 | * If the firmware successly roams within the disconnect timeout |
| 54 | * it sends a new connect event |
| 55 | */ |
| 56 | #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10 |
| 57 | |
| 58 | #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8 |
| 59 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 60 | #define ATH6KL_DATA_OFFSET 64 |
| 61 | struct sk_buff *ath6kl_buf_alloc(int size) |
| 62 | { |
| 63 | struct sk_buff *skb; |
| 64 | u16 reserved; |
| 65 | |
| 66 | /* Add chacheline space at front and back of buffer */ |
| 67 | reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET + |
Vasanthakumar Thiagarajan | 1df94a8 | 2011-08-17 18:45:10 +0530 | [diff] [blame] | 68 | sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 69 | skb = dev_alloc_skb(size + reserved); |
| 70 | |
| 71 | if (skb) |
| 72 | skb_reserve(skb, reserved - L1_CACHE_BYTES); |
| 73 | return skb; |
| 74 | } |
| 75 | |
| 76 | void ath6kl_init_profile_info(struct ath6kl *ar) |
| 77 | { |
| 78 | ar->ssid_len = 0; |
| 79 | memset(ar->ssid, 0, sizeof(ar->ssid)); |
| 80 | |
| 81 | ar->dot11_auth_mode = OPEN_AUTH; |
| 82 | ar->auth_mode = NONE_AUTH; |
| 83 | ar->prwise_crypto = NONE_CRYPT; |
| 84 | ar->prwise_crypto_len = 0; |
| 85 | ar->grp_crypto = NONE_CRYPT; |
Edward Lu | 38acde3 | 2011-08-30 21:58:06 +0300 | [diff] [blame] | 86 | ar->grp_crypto_len = 0; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 87 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); |
| 88 | memset(ar->req_bssid, 0, sizeof(ar->req_bssid)); |
| 89 | memset(ar->bssid, 0, sizeof(ar->bssid)); |
| 90 | ar->bss_ch = 0; |
| 91 | ar->nw_type = ar->next_mode = INFRA_NETWORK; |
| 92 | } |
| 93 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 94 | static int ath6kl_set_host_app_area(struct ath6kl *ar) |
| 95 | { |
| 96 | u32 address, data; |
| 97 | struct host_app_area host_app_area; |
| 98 | |
| 99 | /* Fetch the address of the host_app_area_s |
| 100 | * instance in the host interest area */ |
| 101 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest)); |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 102 | address = TARG_VTOP(ar->target_type, address); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 103 | |
Kalle Valo | addb44b | 2011-09-02 10:32:05 +0300 | [diff] [blame] | 104 | if (ath6kl_diag_read32(ar, address, &data)) |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 105 | return -EIO; |
| 106 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 107 | address = TARG_VTOP(ar->target_type, data); |
Kalle Valo | cbf49a6 | 2011-10-05 12:23:17 +0300 | [diff] [blame] | 108 | host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION); |
Kalle Valo | addb44b | 2011-09-02 10:32:05 +0300 | [diff] [blame] | 109 | if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area, |
| 110 | sizeof(struct host_app_area))) |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 111 | return -EIO; |
| 112 | |
| 113 | return 0; |
| 114 | } |
| 115 | |
| 116 | static inline void set_ac2_ep_map(struct ath6kl *ar, |
| 117 | u8 ac, |
| 118 | enum htc_endpoint_id ep) |
| 119 | { |
| 120 | ar->ac2ep_map[ac] = ep; |
| 121 | ar->ep2ac_map[ep] = ac; |
| 122 | } |
| 123 | |
| 124 | /* connect to a service */ |
| 125 | static int ath6kl_connectservice(struct ath6kl *ar, |
| 126 | struct htc_service_connect_req *con_req, |
| 127 | char *desc) |
| 128 | { |
| 129 | int status; |
| 130 | struct htc_service_connect_resp response; |
| 131 | |
| 132 | memset(&response, 0, sizeof(response)); |
| 133 | |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 134 | status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 135 | if (status) { |
| 136 | ath6kl_err("failed to connect to %s service status:%d\n", |
| 137 | desc, status); |
| 138 | return status; |
| 139 | } |
| 140 | |
| 141 | switch (con_req->svc_id) { |
| 142 | case WMI_CONTROL_SVC: |
| 143 | if (test_bit(WMI_ENABLED, &ar->flag)) |
| 144 | ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint); |
| 145 | ar->ctrl_ep = response.endpoint; |
| 146 | break; |
| 147 | case WMI_DATA_BE_SVC: |
| 148 | set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint); |
| 149 | break; |
| 150 | case WMI_DATA_BK_SVC: |
| 151 | set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint); |
| 152 | break; |
| 153 | case WMI_DATA_VI_SVC: |
| 154 | set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint); |
| 155 | break; |
| 156 | case WMI_DATA_VO_SVC: |
| 157 | set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint); |
| 158 | break; |
| 159 | default: |
| 160 | ath6kl_err("service id is not mapped %d\n", con_req->svc_id); |
| 161 | return -EINVAL; |
| 162 | } |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
| 167 | static int ath6kl_init_service_ep(struct ath6kl *ar) |
| 168 | { |
| 169 | struct htc_service_connect_req connect; |
| 170 | |
| 171 | memset(&connect, 0, sizeof(connect)); |
| 172 | |
| 173 | /* these fields are the same for all service endpoints */ |
| 174 | connect.ep_cb.rx = ath6kl_rx; |
| 175 | connect.ep_cb.rx_refill = ath6kl_rx_refill; |
| 176 | connect.ep_cb.tx_full = ath6kl_tx_queue_full; |
| 177 | |
| 178 | /* |
| 179 | * Set the max queue depth so that our ath6kl_tx_queue_full handler |
| 180 | * gets called. |
| 181 | */ |
| 182 | connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH; |
| 183 | connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4; |
| 184 | if (!connect.ep_cb.rx_refill_thresh) |
| 185 | connect.ep_cb.rx_refill_thresh++; |
| 186 | |
| 187 | /* connect to control service */ |
| 188 | connect.svc_id = WMI_CONTROL_SVC; |
| 189 | if (ath6kl_connectservice(ar, &connect, "WMI CONTROL")) |
| 190 | return -EIO; |
| 191 | |
| 192 | connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN; |
| 193 | |
| 194 | /* |
| 195 | * Limit the HTC message size on the send path, although e can |
| 196 | * receive A-MSDU frames of 4K, we will only send ethernet-sized |
| 197 | * (802.3) frames on the send path. |
| 198 | */ |
| 199 | connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH; |
| 200 | |
| 201 | /* |
| 202 | * To reduce the amount of committed memory for larger A_MSDU |
| 203 | * frames, use the recv-alloc threshold mechanism for larger |
| 204 | * packets. |
| 205 | */ |
| 206 | connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE; |
| 207 | connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf; |
| 208 | |
| 209 | /* |
| 210 | * For the remaining data services set the connection flag to |
| 211 | * reduce dribbling, if configured to do so. |
| 212 | */ |
| 213 | connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB; |
| 214 | connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK; |
| 215 | connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF; |
| 216 | |
| 217 | connect.svc_id = WMI_DATA_BE_SVC; |
| 218 | |
| 219 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BE")) |
| 220 | return -EIO; |
| 221 | |
| 222 | /* connect to back-ground map this to WMI LOW_PRI */ |
| 223 | connect.svc_id = WMI_DATA_BK_SVC; |
| 224 | if (ath6kl_connectservice(ar, &connect, "WMI DATA BK")) |
| 225 | return -EIO; |
| 226 | |
| 227 | /* connect to Video service, map this to to HI PRI */ |
| 228 | connect.svc_id = WMI_DATA_VI_SVC; |
| 229 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VI")) |
| 230 | return -EIO; |
| 231 | |
| 232 | /* |
| 233 | * Connect to VO service, this is currently not mapped to a WMI |
| 234 | * priority stream due to historical reasons. WMI originally |
| 235 | * defined 3 priorities over 3 mailboxes We can change this when |
| 236 | * WMI is reworked so that priorities are not dependent on |
| 237 | * mailboxes. |
| 238 | */ |
| 239 | connect.svc_id = WMI_DATA_VO_SVC; |
| 240 | if (ath6kl_connectservice(ar, &connect, "WMI DATA VO")) |
| 241 | return -EIO; |
| 242 | |
| 243 | return 0; |
| 244 | } |
| 245 | |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 246 | void ath6kl_init_control_info(struct ath6kl *ar) |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 247 | { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 248 | ath6kl_init_profile_info(ar); |
| 249 | ar->def_txkey_index = 0; |
| 250 | memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list)); |
| 251 | ar->ch_hint = 0; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 252 | } |
| 253 | |
| 254 | /* |
| 255 | * Set HTC/Mbox operational parameters, this can only be called when the |
| 256 | * target is in the BMI phase. |
| 257 | */ |
| 258 | static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val, |
| 259 | u8 htc_ctrl_buf) |
| 260 | { |
| 261 | int status; |
| 262 | u32 blk_size; |
| 263 | |
| 264 | blk_size = ar->mbox_info.block_size; |
| 265 | |
| 266 | if (htc_ctrl_buf) |
| 267 | blk_size |= ((u32)htc_ctrl_buf) << 16; |
| 268 | |
| 269 | /* set the host interest area for the block size */ |
| 270 | status = ath6kl_bmi_write(ar, |
| 271 | ath6kl_get_hi_item_addr(ar, |
| 272 | HI_ITEM(hi_mbox_io_block_sz)), |
| 273 | (u8 *)&blk_size, |
| 274 | 4); |
| 275 | if (status) { |
| 276 | ath6kl_err("bmi_write_memory for IO block size failed\n"); |
| 277 | goto out; |
| 278 | } |
| 279 | |
| 280 | ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n", |
| 281 | blk_size, |
| 282 | ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz))); |
| 283 | |
| 284 | if (mbox_isr_yield_val) { |
| 285 | /* set the host interest area for the mbox ISR yield limit */ |
| 286 | status = ath6kl_bmi_write(ar, |
| 287 | ath6kl_get_hi_item_addr(ar, |
| 288 | HI_ITEM(hi_mbox_isr_yield_limit)), |
| 289 | (u8 *)&mbox_isr_yield_val, |
| 290 | 4); |
| 291 | if (status) { |
| 292 | ath6kl_err("bmi_write_memory for yield limit failed\n"); |
| 293 | goto out; |
| 294 | } |
| 295 | } |
| 296 | |
| 297 | out: |
| 298 | return status; |
| 299 | } |
| 300 | |
| 301 | #define REG_DUMP_COUNT_AR6003 60 |
| 302 | #define REGISTER_DUMP_LEN_MAX 60 |
| 303 | |
| 304 | static void ath6kl_dump_target_assert_info(struct ath6kl *ar) |
| 305 | { |
| 306 | u32 address; |
| 307 | u32 regdump_loc = 0; |
| 308 | int status; |
| 309 | u32 regdump_val[REGISTER_DUMP_LEN_MAX]; |
| 310 | u32 i; |
| 311 | |
| 312 | if (ar->target_type != TARGET_TYPE_AR6003) |
| 313 | return; |
| 314 | |
| 315 | /* the reg dump pointer is copied to the host interest area */ |
| 316 | address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state)); |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 317 | address = TARG_VTOP(ar->target_type, address); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 318 | |
| 319 | /* read RAM location through diagnostic window */ |
Kalle Valo | addb44b | 2011-09-02 10:32:05 +0300 | [diff] [blame] | 320 | status = ath6kl_diag_read32(ar, address, ®dump_loc); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 321 | |
| 322 | if (status || !regdump_loc) { |
| 323 | ath6kl_err("failed to get ptr to register dump area\n"); |
| 324 | return; |
| 325 | } |
| 326 | |
| 327 | ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n", |
| 328 | regdump_loc); |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 329 | regdump_loc = TARG_VTOP(ar->target_type, regdump_loc); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 330 | |
| 331 | /* fetch register dump data */ |
Kalle Valo | addb44b | 2011-09-02 10:32:05 +0300 | [diff] [blame] | 332 | status = ath6kl_diag_read(ar, regdump_loc, (u8 *)®dump_val[0], |
| 333 | REG_DUMP_COUNT_AR6003 * (sizeof(u32))); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 334 | |
| 335 | if (status) { |
| 336 | ath6kl_err("failed to get register dump\n"); |
| 337 | return; |
| 338 | } |
| 339 | ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n"); |
| 340 | |
| 341 | for (i = 0; i < REG_DUMP_COUNT_AR6003; i++) |
| 342 | ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n", |
| 343 | i, regdump_val[i]); |
| 344 | |
| 345 | } |
| 346 | |
| 347 | void ath6kl_target_failure(struct ath6kl *ar) |
| 348 | { |
| 349 | ath6kl_err("target asserted\n"); |
| 350 | |
| 351 | /* try dumping target assertion information (if any) */ |
| 352 | ath6kl_dump_target_assert_info(ar); |
| 353 | |
| 354 | } |
| 355 | |
| 356 | static int ath6kl_target_config_wlan_params(struct ath6kl *ar) |
| 357 | { |
| 358 | int status = 0; |
Jouni Malinen | 4dea08e | 2011-08-30 21:57:57 +0300 | [diff] [blame] | 359 | int ret; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 360 | |
| 361 | /* |
| 362 | * Configure the device for rx dot11 header rules. "0,0" are the |
| 363 | * default values. Required if checksum offload is needed. Set |
| 364 | * RxMetaVersion to 2. |
| 365 | */ |
| 366 | if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, |
| 367 | ar->rx_meta_ver, 0, 0)) { |
| 368 | ath6kl_err("unable to set the rx frame format\n"); |
| 369 | status = -EIO; |
| 370 | } |
| 371 | |
| 372 | if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) |
| 373 | if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1, |
| 374 | IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) { |
| 375 | ath6kl_err("unable to set power save fail event policy\n"); |
| 376 | status = -EIO; |
| 377 | } |
| 378 | |
| 379 | if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) |
| 380 | if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0, |
| 381 | WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) { |
| 382 | ath6kl_err("unable to set barker preamble policy\n"); |
| 383 | status = -EIO; |
| 384 | } |
| 385 | |
| 386 | if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, |
| 387 | WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) { |
| 388 | ath6kl_err("unable to set keep alive interval\n"); |
| 389 | status = -EIO; |
| 390 | } |
| 391 | |
| 392 | if (ath6kl_wmi_disctimeout_cmd(ar->wmi, |
| 393 | WLAN_CONFIG_DISCONNECT_TIMEOUT)) { |
| 394 | ath6kl_err("unable to set disconnect timeout\n"); |
| 395 | status = -EIO; |
| 396 | } |
| 397 | |
| 398 | if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) |
| 399 | if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) { |
| 400 | ath6kl_err("unable to set txop bursting\n"); |
| 401 | status = -EIO; |
| 402 | } |
| 403 | |
Jouni Malinen | 6bbc7c3 | 2011-09-05 17:38:47 +0300 | [diff] [blame] | 404 | if (ar->p2p) { |
| 405 | ret = ath6kl_wmi_info_req_cmd(ar->wmi, |
| 406 | P2P_FLAG_CAPABILITIES_REQ | |
| 407 | P2P_FLAG_MACADDR_REQ | |
| 408 | P2P_FLAG_HMODEL_REQ); |
| 409 | if (ret) { |
| 410 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P " |
| 411 | "capabilities (%d) - assuming P2P not " |
| 412 | "supported\n", ret); |
| 413 | ar->p2p = 0; |
| 414 | } |
| 415 | } |
| 416 | |
| 417 | if (ar->p2p) { |
| 418 | /* Enable Probe Request reporting for P2P */ |
| 419 | ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true); |
| 420 | if (ret) { |
| 421 | ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe " |
| 422 | "Request reporting (%d)\n", ret); |
| 423 | } |
Jouni Malinen | 4dea08e | 2011-08-30 21:57:57 +0300 | [diff] [blame] | 424 | } |
| 425 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 426 | return status; |
| 427 | } |
| 428 | |
| 429 | int ath6kl_configure_target(struct ath6kl *ar) |
| 430 | { |
| 431 | u32 param, ram_reserved_size; |
| 432 | u8 fw_iftype; |
| 433 | |
Vasanthakumar Thiagarajan | dd3751f | 2011-10-25 19:33:59 +0530 | [diff] [blame^] | 434 | fw_iftype = HI_OPTION_FW_MODE_BSS_STA; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 435 | |
| 436 | /* Tell target which HTC version it is used*/ |
| 437 | param = HTC_PROTOCOL_VERSION; |
| 438 | if (ath6kl_bmi_write(ar, |
| 439 | ath6kl_get_hi_item_addr(ar, |
| 440 | HI_ITEM(hi_app_host_interest)), |
| 441 | (u8 *)¶m, 4) != 0) { |
| 442 | ath6kl_err("bmi_write_memory for htc version failed\n"); |
| 443 | return -EIO; |
| 444 | } |
| 445 | |
| 446 | /* set the firmware mode to STA/IBSS/AP */ |
| 447 | param = 0; |
| 448 | |
| 449 | if (ath6kl_bmi_read(ar, |
| 450 | ath6kl_get_hi_item_addr(ar, |
| 451 | HI_ITEM(hi_option_flag)), |
| 452 | (u8 *)¶m, 4) != 0) { |
| 453 | ath6kl_err("bmi_read_memory for setting fwmode failed\n"); |
| 454 | return -EIO; |
| 455 | } |
| 456 | |
| 457 | param |= (1 << HI_OPTION_NUM_DEV_SHIFT); |
| 458 | param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT); |
Jouni Malinen | 6bbc7c3 | 2011-09-05 17:38:47 +0300 | [diff] [blame] | 459 | if (ar->p2p && fw_iftype == HI_OPTION_FW_MODE_BSS_STA) { |
| 460 | param |= HI_OPTION_FW_SUBMODE_P2PDEV << |
| 461 | HI_OPTION_FW_SUBMODE_SHIFT; |
| 462 | } |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 463 | param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); |
| 464 | param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); |
| 465 | |
| 466 | if (ath6kl_bmi_write(ar, |
| 467 | ath6kl_get_hi_item_addr(ar, |
| 468 | HI_ITEM(hi_option_flag)), |
| 469 | (u8 *)¶m, |
| 470 | 4) != 0) { |
| 471 | ath6kl_err("bmi_write_memory for setting fwmode failed\n"); |
| 472 | return -EIO; |
| 473 | } |
| 474 | |
| 475 | ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n"); |
| 476 | |
| 477 | /* |
| 478 | * Hardcode the address use for the extended board data |
| 479 | * Ideally this should be pre-allocate by the OS at boot time |
| 480 | * But since it is a new feature and board data is loaded |
| 481 | * at init time, we have to workaround this from host. |
| 482 | * It is difficult to patch the firmware boot code, |
| 483 | * but possible in theory. |
| 484 | */ |
| 485 | |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 486 | param = ar->hw.board_ext_data_addr; |
| 487 | ram_reserved_size = ar->hw.reserved_ram_size; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 488 | |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 489 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, |
| 490 | HI_ITEM(hi_board_ext_data)), |
| 491 | (u8 *)¶m, 4) != 0) { |
| 492 | ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n"); |
| 493 | return -EIO; |
| 494 | } |
| 495 | |
| 496 | if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar, |
| 497 | HI_ITEM(hi_end_ram_reserve_sz)), |
| 498 | (u8 *)&ram_reserved_size, 4) != 0) { |
| 499 | ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n"); |
| 500 | return -EIO; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 501 | } |
| 502 | |
| 503 | /* set the block size for the target */ |
| 504 | if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0)) |
| 505 | /* use default number of control buffers */ |
| 506 | return -EIO; |
| 507 | |
| 508 | return 0; |
| 509 | } |
| 510 | |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 511 | void ath6kl_core_free(struct ath6kl *ar) |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 512 | { |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 513 | wiphy_free(ar->wiphy); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 514 | } |
| 515 | |
| 516 | int ath6kl_unavail_ev(struct ath6kl *ar) |
| 517 | { |
| 518 | ath6kl_destroy(ar->net_dev, 1); |
| 519 | |
| 520 | return 0; |
| 521 | } |
| 522 | |
| 523 | /* firmware upload */ |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 524 | static int ath6kl_get_fw(struct ath6kl *ar, const char *filename, |
| 525 | u8 **fw, size_t *fw_len) |
| 526 | { |
| 527 | const struct firmware *fw_entry; |
| 528 | int ret; |
| 529 | |
| 530 | ret = request_firmware(&fw_entry, filename, ar->dev); |
| 531 | if (ret) |
| 532 | return ret; |
| 533 | |
| 534 | *fw_len = fw_entry->size; |
| 535 | *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL); |
| 536 | |
| 537 | if (*fw == NULL) |
| 538 | ret = -ENOMEM; |
| 539 | |
| 540 | release_firmware(fw_entry); |
| 541 | |
| 542 | return ret; |
| 543 | } |
| 544 | |
Sam Leffler | 92ecbff | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 545 | #ifdef CONFIG_OF |
| 546 | static const char *get_target_ver_dir(const struct ath6kl *ar) |
| 547 | { |
| 548 | switch (ar->version.target_ver) { |
| 549 | case AR6003_REV1_VERSION: |
| 550 | return "ath6k/AR6003/hw1.0"; |
| 551 | case AR6003_REV2_VERSION: |
| 552 | return "ath6k/AR6003/hw2.0"; |
| 553 | case AR6003_REV3_VERSION: |
| 554 | return "ath6k/AR6003/hw2.1.1"; |
| 555 | } |
| 556 | ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__, |
| 557 | ar->version.target_ver); |
| 558 | return NULL; |
| 559 | } |
| 560 | |
| 561 | /* |
| 562 | * Check the device tree for a board-id and use it to construct |
| 563 | * the pathname to the firmware file. Used (for now) to find a |
| 564 | * fallback to the "bdata.bin" file--typically a symlink to the |
| 565 | * appropriate board-specific file. |
| 566 | */ |
| 567 | static bool check_device_tree(struct ath6kl *ar) |
| 568 | { |
| 569 | static const char *board_id_prop = "atheros,board-id"; |
| 570 | struct device_node *node; |
| 571 | char board_filename[64]; |
| 572 | const char *board_id; |
| 573 | int ret; |
| 574 | |
| 575 | for_each_compatible_node(node, NULL, "atheros,ath6kl") { |
| 576 | board_id = of_get_property(node, board_id_prop, NULL); |
| 577 | if (board_id == NULL) { |
| 578 | ath6kl_warn("No \"%s\" property on %s node.\n", |
| 579 | board_id_prop, node->name); |
| 580 | continue; |
| 581 | } |
| 582 | snprintf(board_filename, sizeof(board_filename), |
| 583 | "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id); |
| 584 | |
| 585 | ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board, |
| 586 | &ar->fw_board_len); |
| 587 | if (ret) { |
| 588 | ath6kl_err("Failed to get DT board file %s: %d\n", |
| 589 | board_filename, ret); |
| 590 | continue; |
| 591 | } |
| 592 | return true; |
| 593 | } |
| 594 | return false; |
| 595 | } |
| 596 | #else |
| 597 | static bool check_device_tree(struct ath6kl *ar) |
| 598 | { |
| 599 | return false; |
| 600 | } |
| 601 | #endif /* CONFIG_OF */ |
| 602 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 603 | static int ath6kl_fetch_board_file(struct ath6kl *ar) |
| 604 | { |
| 605 | const char *filename; |
| 606 | int ret; |
| 607 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 608 | if (ar->fw_board != NULL) |
| 609 | return 0; |
| 610 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 611 | switch (ar->version.target_ver) { |
| 612 | case AR6003_REV2_VERSION: |
| 613 | filename = AR6003_REV2_BOARD_DATA_FILE; |
| 614 | break; |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 615 | case AR6004_REV1_VERSION: |
| 616 | filename = AR6004_REV1_BOARD_DATA_FILE; |
| 617 | break; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 618 | default: |
| 619 | filename = AR6003_REV3_BOARD_DATA_FILE; |
| 620 | break; |
| 621 | } |
| 622 | |
| 623 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, |
| 624 | &ar->fw_board_len); |
| 625 | if (ret == 0) { |
| 626 | /* managed to get proper board file */ |
| 627 | return 0; |
| 628 | } |
| 629 | |
Sam Leffler | 92ecbff | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 630 | if (check_device_tree(ar)) { |
| 631 | /* got board file from device tree */ |
| 632 | return 0; |
| 633 | } |
| 634 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 635 | /* there was no proper board file, try to use default instead */ |
| 636 | ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n", |
| 637 | filename, ret); |
| 638 | |
| 639 | switch (ar->version.target_ver) { |
| 640 | case AR6003_REV2_VERSION: |
| 641 | filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE; |
| 642 | break; |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 643 | case AR6004_REV1_VERSION: |
| 644 | filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE; |
| 645 | break; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 646 | default: |
| 647 | filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE; |
| 648 | break; |
| 649 | } |
| 650 | |
| 651 | ret = ath6kl_get_fw(ar, filename, &ar->fw_board, |
| 652 | &ar->fw_board_len); |
| 653 | if (ret) { |
| 654 | ath6kl_err("Failed to get default board file %s: %d\n", |
| 655 | filename, ret); |
| 656 | return ret; |
| 657 | } |
| 658 | |
| 659 | ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n"); |
| 660 | ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n"); |
| 661 | |
| 662 | return 0; |
| 663 | } |
| 664 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 665 | static int ath6kl_fetch_otp_file(struct ath6kl *ar) |
| 666 | { |
| 667 | const char *filename; |
| 668 | int ret; |
| 669 | |
| 670 | if (ar->fw_otp != NULL) |
| 671 | return 0; |
| 672 | |
| 673 | switch (ar->version.target_ver) { |
| 674 | case AR6003_REV2_VERSION: |
| 675 | filename = AR6003_REV2_OTP_FILE; |
| 676 | break; |
| 677 | case AR6004_REV1_VERSION: |
| 678 | ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n"); |
| 679 | return 0; |
| 680 | break; |
| 681 | default: |
| 682 | filename = AR6003_REV3_OTP_FILE; |
| 683 | break; |
| 684 | } |
| 685 | |
| 686 | ret = ath6kl_get_fw(ar, filename, &ar->fw_otp, |
| 687 | &ar->fw_otp_len); |
| 688 | if (ret) { |
| 689 | ath6kl_err("Failed to get OTP file %s: %d\n", |
| 690 | filename, ret); |
| 691 | return ret; |
| 692 | } |
| 693 | |
| 694 | return 0; |
| 695 | } |
| 696 | |
| 697 | static int ath6kl_fetch_fw_file(struct ath6kl *ar) |
| 698 | { |
| 699 | const char *filename; |
| 700 | int ret; |
| 701 | |
| 702 | if (ar->fw != NULL) |
| 703 | return 0; |
| 704 | |
| 705 | if (testmode) { |
| 706 | switch (ar->version.target_ver) { |
| 707 | case AR6003_REV2_VERSION: |
| 708 | filename = AR6003_REV2_TCMD_FIRMWARE_FILE; |
| 709 | break; |
| 710 | case AR6003_REV3_VERSION: |
| 711 | filename = AR6003_REV3_TCMD_FIRMWARE_FILE; |
| 712 | break; |
| 713 | case AR6004_REV1_VERSION: |
| 714 | ath6kl_warn("testmode not supported with ar6004\n"); |
| 715 | return -EOPNOTSUPP; |
| 716 | default: |
| 717 | ath6kl_warn("unknown target version: 0x%x\n", |
| 718 | ar->version.target_ver); |
| 719 | return -EINVAL; |
| 720 | } |
| 721 | |
| 722 | set_bit(TESTMODE, &ar->flag); |
| 723 | |
| 724 | goto get_fw; |
| 725 | } |
| 726 | |
| 727 | switch (ar->version.target_ver) { |
| 728 | case AR6003_REV2_VERSION: |
| 729 | filename = AR6003_REV2_FIRMWARE_FILE; |
| 730 | break; |
| 731 | case AR6004_REV1_VERSION: |
| 732 | filename = AR6004_REV1_FIRMWARE_FILE; |
| 733 | break; |
| 734 | default: |
| 735 | filename = AR6003_REV3_FIRMWARE_FILE; |
| 736 | break; |
| 737 | } |
| 738 | |
| 739 | get_fw: |
| 740 | ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len); |
| 741 | if (ret) { |
| 742 | ath6kl_err("Failed to get firmware file %s: %d\n", |
| 743 | filename, ret); |
| 744 | return ret; |
| 745 | } |
| 746 | |
| 747 | return 0; |
| 748 | } |
| 749 | |
| 750 | static int ath6kl_fetch_patch_file(struct ath6kl *ar) |
| 751 | { |
| 752 | const char *filename; |
| 753 | int ret; |
| 754 | |
| 755 | switch (ar->version.target_ver) { |
| 756 | case AR6003_REV2_VERSION: |
| 757 | filename = AR6003_REV2_PATCH_FILE; |
| 758 | break; |
| 759 | case AR6004_REV1_VERSION: |
| 760 | /* FIXME: implement for AR6004 */ |
| 761 | return 0; |
| 762 | break; |
| 763 | default: |
| 764 | filename = AR6003_REV3_PATCH_FILE; |
| 765 | break; |
| 766 | } |
| 767 | |
| 768 | if (ar->fw_patch == NULL) { |
| 769 | ret = ath6kl_get_fw(ar, filename, &ar->fw_patch, |
| 770 | &ar->fw_patch_len); |
| 771 | if (ret) { |
| 772 | ath6kl_err("Failed to get patch file %s: %d\n", |
| 773 | filename, ret); |
| 774 | return ret; |
| 775 | } |
| 776 | } |
| 777 | |
| 778 | return 0; |
| 779 | } |
| 780 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 781 | static int ath6kl_fetch_fw_api1(struct ath6kl *ar) |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 782 | { |
| 783 | int ret; |
| 784 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 785 | ret = ath6kl_fetch_otp_file(ar); |
| 786 | if (ret) |
| 787 | return ret; |
| 788 | |
| 789 | ret = ath6kl_fetch_fw_file(ar); |
| 790 | if (ret) |
| 791 | return ret; |
| 792 | |
| 793 | ret = ath6kl_fetch_patch_file(ar); |
| 794 | if (ret) |
| 795 | return ret; |
| 796 | |
| 797 | return 0; |
| 798 | } |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 799 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 800 | static int ath6kl_fetch_fw_api2(struct ath6kl *ar) |
| 801 | { |
| 802 | size_t magic_len, len, ie_len; |
| 803 | const struct firmware *fw; |
| 804 | struct ath6kl_fw_ie *hdr; |
| 805 | const char *filename; |
| 806 | const u8 *data; |
Kalle Valo | 97e0496 | 2011-09-12 13:47:34 +0300 | [diff] [blame] | 807 | int ret, ie_id, i, index, bit; |
Kalle Valo | 8a13748 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 808 | __le32 *val; |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 809 | |
| 810 | switch (ar->version.target_ver) { |
| 811 | case AR6003_REV2_VERSION: |
| 812 | filename = AR6003_REV2_FIRMWARE_2_FILE; |
| 813 | break; |
| 814 | case AR6003_REV3_VERSION: |
| 815 | filename = AR6003_REV3_FIRMWARE_2_FILE; |
| 816 | break; |
| 817 | case AR6004_REV1_VERSION: |
| 818 | filename = AR6004_REV1_FIRMWARE_2_FILE; |
| 819 | break; |
| 820 | default: |
| 821 | return -EOPNOTSUPP; |
| 822 | } |
| 823 | |
| 824 | ret = request_firmware(&fw, filename, ar->dev); |
| 825 | if (ret) |
| 826 | return ret; |
| 827 | |
| 828 | data = fw->data; |
| 829 | len = fw->size; |
| 830 | |
| 831 | /* magic also includes the null byte, check that as well */ |
| 832 | magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1; |
| 833 | |
| 834 | if (len < magic_len) { |
| 835 | ret = -EINVAL; |
| 836 | goto out; |
| 837 | } |
| 838 | |
| 839 | if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) { |
| 840 | ret = -EINVAL; |
| 841 | goto out; |
| 842 | } |
| 843 | |
| 844 | len -= magic_len; |
| 845 | data += magic_len; |
| 846 | |
| 847 | /* loop elements */ |
| 848 | while (len > sizeof(struct ath6kl_fw_ie)) { |
| 849 | /* hdr is unaligned! */ |
| 850 | hdr = (struct ath6kl_fw_ie *) data; |
| 851 | |
| 852 | ie_id = le32_to_cpup(&hdr->id); |
| 853 | ie_len = le32_to_cpup(&hdr->len); |
| 854 | |
| 855 | len -= sizeof(*hdr); |
| 856 | data += sizeof(*hdr); |
| 857 | |
| 858 | if (len < ie_len) { |
| 859 | ret = -EINVAL; |
| 860 | goto out; |
| 861 | } |
| 862 | |
| 863 | switch (ie_id) { |
| 864 | case ATH6KL_FW_IE_OTP_IMAGE: |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 865 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 866 | ie_len); |
| 867 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 868 | ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL); |
| 869 | |
| 870 | if (ar->fw_otp == NULL) { |
| 871 | ret = -ENOMEM; |
| 872 | goto out; |
| 873 | } |
| 874 | |
| 875 | ar->fw_otp_len = ie_len; |
| 876 | break; |
| 877 | case ATH6KL_FW_IE_FW_IMAGE: |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 878 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 879 | ie_len); |
| 880 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 881 | ar->fw = kmemdup(data, ie_len, GFP_KERNEL); |
| 882 | |
| 883 | if (ar->fw == NULL) { |
| 884 | ret = -ENOMEM; |
| 885 | goto out; |
| 886 | } |
| 887 | |
| 888 | ar->fw_len = ie_len; |
| 889 | break; |
| 890 | case ATH6KL_FW_IE_PATCH_IMAGE: |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 891 | ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 892 | ie_len); |
| 893 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 894 | ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL); |
| 895 | |
| 896 | if (ar->fw_patch == NULL) { |
| 897 | ret = -ENOMEM; |
| 898 | goto out; |
| 899 | } |
| 900 | |
| 901 | ar->fw_patch_len = ie_len; |
| 902 | break; |
Kalle Valo | 8a13748 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 903 | case ATH6KL_FW_IE_RESERVED_RAM_SIZE: |
| 904 | val = (__le32 *) data; |
| 905 | ar->hw.reserved_ram_size = le32_to_cpup(val); |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 906 | |
| 907 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 908 | "found reserved ram size ie 0x%d\n", |
| 909 | ar->hw.reserved_ram_size); |
Kalle Valo | 8a13748 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 910 | break; |
Kalle Valo | 97e0496 | 2011-09-12 13:47:34 +0300 | [diff] [blame] | 911 | case ATH6KL_FW_IE_CAPABILITIES: |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 912 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 913 | "found firmware capabilities ie (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 914 | ie_len); |
| 915 | |
Kalle Valo | 97e0496 | 2011-09-12 13:47:34 +0300 | [diff] [blame] | 916 | for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) { |
| 917 | index = ALIGN(i, 8) / 8; |
| 918 | bit = i % 8; |
| 919 | |
| 920 | if (data[index] & (1 << bit)) |
| 921 | __set_bit(i, ar->fw_capabilities); |
| 922 | } |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 923 | |
| 924 | ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "", |
| 925 | ar->fw_capabilities, |
| 926 | sizeof(ar->fw_capabilities)); |
Kalle Valo | 97e0496 | 2011-09-12 13:47:34 +0300 | [diff] [blame] | 927 | break; |
Kalle Valo | 1b4304d | 2011-09-27 11:05:26 +0300 | [diff] [blame] | 928 | case ATH6KL_FW_IE_PATCH_ADDR: |
| 929 | if (ie_len != sizeof(*val)) |
| 930 | break; |
| 931 | |
| 932 | val = (__le32 *) data; |
| 933 | ar->hw.dataset_patch_addr = le32_to_cpup(val); |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 934 | |
| 935 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 936 | "found patch address ie 0x%d\n", |
| 937 | ar->hw.dataset_patch_addr); |
Kalle Valo | 1b4304d | 2011-09-27 11:05:26 +0300 | [diff] [blame] | 938 | break; |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 939 | default: |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 940 | ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n", |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 941 | le32_to_cpup(&hdr->id)); |
| 942 | break; |
| 943 | } |
| 944 | |
| 945 | len -= ie_len; |
| 946 | data += ie_len; |
| 947 | }; |
| 948 | |
| 949 | ret = 0; |
| 950 | out: |
| 951 | release_firmware(fw); |
| 952 | |
| 953 | return ret; |
| 954 | } |
| 955 | |
| 956 | static int ath6kl_fetch_firmwares(struct ath6kl *ar) |
| 957 | { |
| 958 | int ret; |
| 959 | |
| 960 | ret = ath6kl_fetch_board_file(ar); |
| 961 | if (ret) |
| 962 | return ret; |
| 963 | |
| 964 | ret = ath6kl_fetch_fw_api2(ar); |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 965 | if (ret == 0) { |
| 966 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n"); |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 967 | return 0; |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 968 | } |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 969 | |
| 970 | ret = ath6kl_fetch_fw_api1(ar); |
| 971 | if (ret) |
| 972 | return ret; |
| 973 | |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 974 | ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n"); |
| 975 | |
Kalle Valo | 50d4123 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 976 | return 0; |
| 977 | } |
| 978 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 979 | static int ath6kl_upload_board_file(struct ath6kl *ar) |
| 980 | { |
| 981 | u32 board_address, board_ext_address, param; |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 982 | u32 board_data_size, board_ext_data_size; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 983 | int ret; |
| 984 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 985 | if (WARN_ON(ar->fw_board == NULL)) |
| 986 | return -ENOENT; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 987 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 988 | /* |
| 989 | * Determine where in Target RAM to write Board Data. |
| 990 | * For AR6004, host determine Target RAM address for |
| 991 | * writing board data. |
| 992 | */ |
| 993 | if (ar->target_type == TARGET_TYPE_AR6004) { |
| 994 | board_address = AR6004_REV1_BOARD_DATA_ADDRESS; |
| 995 | ath6kl_bmi_write(ar, |
| 996 | ath6kl_get_hi_item_addr(ar, |
| 997 | HI_ITEM(hi_board_data)), |
| 998 | (u8 *) &board_address, 4); |
| 999 | } else { |
| 1000 | ath6kl_bmi_read(ar, |
| 1001 | ath6kl_get_hi_item_addr(ar, |
| 1002 | HI_ITEM(hi_board_data)), |
| 1003 | (u8 *) &board_address, 4); |
| 1004 | } |
| 1005 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1006 | /* determine where in target ram to write extended board data */ |
| 1007 | ath6kl_bmi_read(ar, |
| 1008 | ath6kl_get_hi_item_addr(ar, |
| 1009 | HI_ITEM(hi_board_ext_data)), |
| 1010 | (u8 *) &board_ext_address, 4); |
| 1011 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1012 | if (board_ext_address == 0) { |
| 1013 | ath6kl_err("Failed to get board file target address.\n"); |
| 1014 | return -EINVAL; |
| 1015 | } |
| 1016 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1017 | switch (ar->target_type) { |
| 1018 | case TARGET_TYPE_AR6003: |
| 1019 | board_data_size = AR6003_BOARD_DATA_SZ; |
| 1020 | board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ; |
| 1021 | break; |
| 1022 | case TARGET_TYPE_AR6004: |
| 1023 | board_data_size = AR6004_BOARD_DATA_SZ; |
| 1024 | board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ; |
| 1025 | break; |
| 1026 | default: |
| 1027 | WARN_ON(1); |
| 1028 | return -EINVAL; |
| 1029 | break; |
| 1030 | } |
| 1031 | |
| 1032 | if (ar->fw_board_len == (board_data_size + |
| 1033 | board_ext_data_size)) { |
| 1034 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1035 | /* write extended board data */ |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1036 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 1037 | "writing extended board data to 0x%x (%d B)\n", |
| 1038 | board_ext_address, board_ext_data_size); |
| 1039 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1040 | ret = ath6kl_bmi_write(ar, board_ext_address, |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1041 | ar->fw_board + board_data_size, |
| 1042 | board_ext_data_size); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1043 | if (ret) { |
| 1044 | ath6kl_err("Failed to write extended board data: %d\n", |
| 1045 | ret); |
| 1046 | return ret; |
| 1047 | } |
| 1048 | |
| 1049 | /* record that extended board data is initialized */ |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1050 | param = (board_ext_data_size << 16) | 1; |
| 1051 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1052 | ath6kl_bmi_write(ar, |
| 1053 | ath6kl_get_hi_item_addr(ar, |
| 1054 | HI_ITEM(hi_board_ext_data_config)), |
| 1055 | (unsigned char *) ¶m, 4); |
| 1056 | } |
| 1057 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1058 | if (ar->fw_board_len < board_data_size) { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1059 | ath6kl_err("Too small board file: %zu\n", ar->fw_board_len); |
| 1060 | ret = -EINVAL; |
| 1061 | return ret; |
| 1062 | } |
| 1063 | |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1064 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n", |
| 1065 | board_address, board_data_size); |
| 1066 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1067 | ret = ath6kl_bmi_write(ar, board_address, ar->fw_board, |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1068 | board_data_size); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1069 | |
| 1070 | if (ret) { |
| 1071 | ath6kl_err("Board file bmi write failed: %d\n", ret); |
| 1072 | return ret; |
| 1073 | } |
| 1074 | |
| 1075 | /* record the fact that Board Data IS initialized */ |
| 1076 | param = 1; |
| 1077 | ath6kl_bmi_write(ar, |
| 1078 | ath6kl_get_hi_item_addr(ar, |
| 1079 | HI_ITEM(hi_board_data_initialized)), |
| 1080 | (u8 *)¶m, 4); |
| 1081 | |
| 1082 | return ret; |
| 1083 | } |
| 1084 | |
| 1085 | static int ath6kl_upload_otp(struct ath6kl *ar) |
| 1086 | { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1087 | u32 address, param; |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame] | 1088 | bool from_hw = false; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1089 | int ret; |
| 1090 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 1091 | if (WARN_ON(ar->fw_otp == NULL)) |
| 1092 | return -ENOENT; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1093 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1094 | address = ar->hw.app_load_addr; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1095 | |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 1096 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address, |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1097 | ar->fw_otp_len); |
| 1098 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1099 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp, |
| 1100 | ar->fw_otp_len); |
| 1101 | if (ret) { |
| 1102 | ath6kl_err("Failed to upload OTP file: %d\n", ret); |
| 1103 | return ret; |
| 1104 | } |
| 1105 | |
Kalle Valo | 639d0b8 | 2011-09-12 12:48:09 +0300 | [diff] [blame] | 1106 | /* read firmware start address */ |
| 1107 | ret = ath6kl_bmi_read(ar, |
| 1108 | ath6kl_get_hi_item_addr(ar, |
| 1109 | HI_ITEM(hi_app_start)), |
| 1110 | (u8 *) &address, sizeof(address)); |
| 1111 | |
| 1112 | if (ret) { |
| 1113 | ath6kl_err("Failed to read hi_app_start: %d\n", ret); |
| 1114 | return ret; |
| 1115 | } |
| 1116 | |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame] | 1117 | if (ar->hw.app_start_override_addr == 0) { |
| 1118 | ar->hw.app_start_override_addr = address; |
| 1119 | from_hw = true; |
| 1120 | } |
Kalle Valo | 639d0b8 | 2011-09-12 12:48:09 +0300 | [diff] [blame] | 1121 | |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame] | 1122 | ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n", |
| 1123 | from_hw ? " (from hw)" : "", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1124 | ar->hw.app_start_override_addr); |
| 1125 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1126 | /* execute the OTP code */ |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame] | 1127 | ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n", |
| 1128 | ar->hw.app_start_override_addr); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1129 | param = 0; |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame] | 1130 | ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, ¶m); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1131 | |
| 1132 | return ret; |
| 1133 | } |
| 1134 | |
| 1135 | static int ath6kl_upload_firmware(struct ath6kl *ar) |
| 1136 | { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1137 | u32 address; |
| 1138 | int ret; |
| 1139 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 1140 | if (WARN_ON(ar->fw == NULL)) |
| 1141 | return -ENOENT; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1142 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1143 | address = ar->hw.app_load_addr; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1144 | |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 1145 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1146 | address, ar->fw_len); |
| 1147 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1148 | ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len); |
| 1149 | |
| 1150 | if (ret) { |
| 1151 | ath6kl_err("Failed to write firmware: %d\n", ret); |
| 1152 | return ret; |
| 1153 | } |
| 1154 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1155 | /* |
| 1156 | * Set starting address for firmware |
| 1157 | * Don't need to setup app_start override addr on AR6004 |
| 1158 | */ |
| 1159 | if (ar->target_type != TARGET_TYPE_AR6004) { |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1160 | address = ar->hw.app_start_override_addr; |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1161 | ath6kl_bmi_set_app_start(ar, address); |
| 1162 | } |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1163 | return ret; |
| 1164 | } |
| 1165 | |
| 1166 | static int ath6kl_upload_patch(struct ath6kl *ar) |
| 1167 | { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1168 | u32 address, param; |
| 1169 | int ret; |
| 1170 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 1171 | if (WARN_ON(ar->fw_patch == NULL)) |
| 1172 | return -ENOENT; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1173 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1174 | address = ar->hw.dataset_patch_addr; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1175 | |
Kalle Valo | ef54862 | 2011-10-01 09:43:09 +0300 | [diff] [blame] | 1176 | ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n", |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1177 | address, ar->fw_patch_len); |
| 1178 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1179 | ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len); |
| 1180 | if (ret) { |
| 1181 | ath6kl_err("Failed to write patch file: %d\n", ret); |
| 1182 | return ret; |
| 1183 | } |
| 1184 | |
| 1185 | param = address; |
| 1186 | ath6kl_bmi_write(ar, |
| 1187 | ath6kl_get_hi_item_addr(ar, |
| 1188 | HI_ITEM(hi_dset_list_head)), |
| 1189 | (unsigned char *) ¶m, 4); |
| 1190 | |
| 1191 | return 0; |
| 1192 | } |
| 1193 | |
| 1194 | static int ath6kl_init_upload(struct ath6kl *ar) |
| 1195 | { |
| 1196 | u32 param, options, sleep, address; |
| 1197 | int status = 0; |
| 1198 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1199 | if (ar->target_type != TARGET_TYPE_AR6003 && |
| 1200 | ar->target_type != TARGET_TYPE_AR6004) |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1201 | return -EINVAL; |
| 1202 | |
| 1203 | /* temporarily disable system sleep */ |
| 1204 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; |
| 1205 | status = ath6kl_bmi_reg_read(ar, address, ¶m); |
| 1206 | if (status) |
| 1207 | return status; |
| 1208 | |
| 1209 | options = param; |
| 1210 | |
| 1211 | param |= ATH6KL_OPTION_SLEEP_DISABLE; |
| 1212 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1213 | if (status) |
| 1214 | return status; |
| 1215 | |
| 1216 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; |
| 1217 | status = ath6kl_bmi_reg_read(ar, address, ¶m); |
| 1218 | if (status) |
| 1219 | return status; |
| 1220 | |
| 1221 | sleep = param; |
| 1222 | |
| 1223 | param |= SM(SYSTEM_SLEEP_DISABLE, 1); |
| 1224 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1225 | if (status) |
| 1226 | return status; |
| 1227 | |
| 1228 | ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n", |
| 1229 | options, sleep); |
| 1230 | |
| 1231 | /* program analog PLL register */ |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1232 | /* no need to control 40/44MHz clock on AR6004 */ |
| 1233 | if (ar->target_type != TARGET_TYPE_AR6004) { |
| 1234 | status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER, |
| 1235 | 0xF9104001); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1236 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1237 | if (status) |
| 1238 | return status; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1239 | |
Kevin Fang | 31024d9 | 2011-07-11 17:14:13 +0800 | [diff] [blame] | 1240 | /* Run at 80/88MHz by default */ |
| 1241 | param = SM(CPU_CLOCK_STANDARD, 1); |
| 1242 | |
| 1243 | address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS; |
| 1244 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1245 | if (status) |
| 1246 | return status; |
| 1247 | } |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1248 | |
| 1249 | param = 0; |
| 1250 | address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS; |
| 1251 | param = SM(LPO_CAL_ENABLE, 1); |
| 1252 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1253 | if (status) |
| 1254 | return status; |
| 1255 | |
| 1256 | /* WAR to avoid SDIO CRC err */ |
| 1257 | if (ar->version.target_ver == AR6003_REV2_VERSION) { |
| 1258 | ath6kl_err("temporary war to avoid sdio crc error\n"); |
| 1259 | |
| 1260 | param = 0x20; |
| 1261 | |
| 1262 | address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS; |
| 1263 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1264 | if (status) |
| 1265 | return status; |
| 1266 | |
| 1267 | address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS; |
| 1268 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1269 | if (status) |
| 1270 | return status; |
| 1271 | |
| 1272 | address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS; |
| 1273 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1274 | if (status) |
| 1275 | return status; |
| 1276 | |
| 1277 | address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS; |
| 1278 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1279 | if (status) |
| 1280 | return status; |
| 1281 | } |
| 1282 | |
| 1283 | /* write EEPROM data to Target RAM */ |
| 1284 | status = ath6kl_upload_board_file(ar); |
| 1285 | if (status) |
| 1286 | return status; |
| 1287 | |
| 1288 | /* transfer One time Programmable data */ |
| 1289 | status = ath6kl_upload_otp(ar); |
| 1290 | if (status) |
| 1291 | return status; |
| 1292 | |
| 1293 | /* Download Target firmware */ |
| 1294 | status = ath6kl_upload_firmware(ar); |
| 1295 | if (status) |
| 1296 | return status; |
| 1297 | |
| 1298 | status = ath6kl_upload_patch(ar); |
| 1299 | if (status) |
| 1300 | return status; |
| 1301 | |
| 1302 | /* Restore system sleep */ |
| 1303 | address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS; |
| 1304 | status = ath6kl_bmi_reg_write(ar, address, sleep); |
| 1305 | if (status) |
| 1306 | return status; |
| 1307 | |
| 1308 | address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS; |
| 1309 | param = options | 0x20; |
| 1310 | status = ath6kl_bmi_reg_write(ar, address, param); |
| 1311 | if (status) |
| 1312 | return status; |
| 1313 | |
| 1314 | /* Configure GPIO AR6003 UART */ |
| 1315 | param = CONFIG_AR600x_DEBUG_UART_TX_PIN; |
| 1316 | status = ath6kl_bmi_write(ar, |
| 1317 | ath6kl_get_hi_item_addr(ar, |
| 1318 | HI_ITEM(hi_dbg_uart_txpin)), |
| 1319 | (u8 *)¶m, 4); |
| 1320 | |
| 1321 | return status; |
| 1322 | } |
| 1323 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1324 | static int ath6kl_init_hw_params(struct ath6kl *ar) |
| 1325 | { |
| 1326 | switch (ar->version.target_ver) { |
| 1327 | case AR6003_REV2_VERSION: |
| 1328 | ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; |
| 1329 | ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS; |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1330 | ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS; |
| 1331 | ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE; |
Kalle Valo | bef26a7 | 2011-10-12 09:58:28 +0300 | [diff] [blame] | 1332 | |
| 1333 | /* hw2.0 needs override address hardcoded */ |
| 1334 | ar->hw.app_start_override_addr = 0x944C00; |
| 1335 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1336 | break; |
| 1337 | case AR6003_REV3_VERSION: |
| 1338 | ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS; |
| 1339 | ar->hw.app_load_addr = 0x1234; |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1340 | ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS; |
| 1341 | ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE; |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1342 | break; |
| 1343 | case AR6004_REV1_VERSION: |
| 1344 | ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS; |
| 1345 | ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS; |
Kalle Valo | 991b27e | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1346 | ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS; |
| 1347 | ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE; |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1348 | break; |
| 1349 | default: |
| 1350 | ath6kl_err("Unsupported hardware version: 0x%x\n", |
| 1351 | ar->version.target_ver); |
| 1352 | return -EINVAL; |
| 1353 | } |
| 1354 | |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1355 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 1356 | "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n", |
| 1357 | ar->version.target_ver, ar->target_type, |
| 1358 | ar->hw.dataset_patch_addr, ar->hw.app_load_addr); |
| 1359 | ath6kl_dbg(ATH6KL_DBG_BOOT, |
| 1360 | "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x", |
| 1361 | ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr, |
| 1362 | ar->hw.reserved_ram_size); |
| 1363 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1364 | return 0; |
| 1365 | } |
| 1366 | |
Vasanthakumar Thiagarajan | 521dffc | 2011-10-25 19:33:56 +0530 | [diff] [blame] | 1367 | static int ath6kl_init(struct ath6kl *ar) |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1368 | { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1369 | int status = 0; |
| 1370 | s32 timeleft; |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 1371 | struct net_device *ndev; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1372 | |
| 1373 | if (!ar) |
| 1374 | return -EIO; |
| 1375 | |
| 1376 | /* Do we need to finish the BMI phase */ |
| 1377 | if (ath6kl_bmi_done(ar)) { |
| 1378 | status = -EIO; |
| 1379 | goto ath6kl_init_done; |
| 1380 | } |
| 1381 | |
| 1382 | /* Indicate that WMI is enabled (although not ready yet) */ |
| 1383 | set_bit(WMI_ENABLED, &ar->flag); |
Vasanthakumar Thiagarajan | 2865785 | 2011-07-21 12:00:49 +0530 | [diff] [blame] | 1384 | ar->wmi = ath6kl_wmi_init(ar); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1385 | if (!ar->wmi) { |
| 1386 | ath6kl_err("failed to initialize wmi\n"); |
| 1387 | status = -EIO; |
| 1388 | goto ath6kl_init_done; |
| 1389 | } |
| 1390 | |
| 1391 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi); |
| 1392 | |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 1393 | status = ath6kl_register_ieee80211_hw(ar); |
| 1394 | if (status) |
| 1395 | goto err_node_cleanup; |
| 1396 | |
| 1397 | status = ath6kl_debug_init(ar); |
| 1398 | if (status) { |
| 1399 | wiphy_unregister(ar->wiphy); |
| 1400 | goto err_node_cleanup; |
| 1401 | } |
| 1402 | |
| 1403 | /* Add an initial station interface */ |
| 1404 | ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION); |
| 1405 | if (!ndev) { |
| 1406 | ath6kl_err("Failed to instantiate a network device\n"); |
| 1407 | status = -ENOMEM; |
| 1408 | wiphy_unregister(ar->wiphy); |
| 1409 | goto err_debug_init; |
| 1410 | } |
| 1411 | |
| 1412 | |
| 1413 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n", |
| 1414 | __func__, ar->net_dev->name, ar->net_dev, ar); |
| 1415 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1416 | /* |
| 1417 | * The reason we have to wait for the target here is that the |
| 1418 | * driver layer has to init BMI in order to set the host block |
| 1419 | * size. |
| 1420 | */ |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1421 | if (ath6kl_htc_wait_target(ar->htc_target)) { |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1422 | status = -EIO; |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 1423 | goto err_if_deinit; |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1424 | } |
| 1425 | |
| 1426 | if (ath6kl_init_service_ep(ar)) { |
| 1427 | status = -EIO; |
| 1428 | goto err_cleanup_scatter; |
| 1429 | } |
| 1430 | |
| 1431 | /* setup access class priority mappings */ |
| 1432 | ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */ |
| 1433 | ar->ac_stream_pri_map[WMM_AC_BE] = 1; |
| 1434 | ar->ac_stream_pri_map[WMM_AC_VI] = 2; |
| 1435 | ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */ |
| 1436 | |
| 1437 | /* give our connected endpoints some buffers */ |
| 1438 | ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep); |
| 1439 | ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]); |
| 1440 | |
| 1441 | /* allocate some buffers that handle larger AMSDU frames */ |
| 1442 | ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS); |
| 1443 | |
| 1444 | /* setup credit distribution */ |
| 1445 | ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info); |
| 1446 | |
| 1447 | ath6kl_cookie_init(ar); |
| 1448 | |
| 1449 | /* start HTC */ |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1450 | status = ath6kl_htc_start(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1451 | |
| 1452 | if (status) { |
| 1453 | ath6kl_cookie_cleanup(ar); |
| 1454 | goto err_rxbuf_cleanup; |
| 1455 | } |
| 1456 | |
| 1457 | /* Wait for Wmi event to be ready */ |
| 1458 | timeleft = wait_event_interruptible_timeout(ar->event_wq, |
| 1459 | test_bit(WMI_READY, |
| 1460 | &ar->flag), |
| 1461 | WMI_TIMEOUT); |
| 1462 | |
Kalle Valo | 6bc3643 | 2011-09-27 14:31:11 +0300 | [diff] [blame] | 1463 | ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n"); |
| 1464 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1465 | if (ar->version.abi_ver != ATH6KL_ABI_VERSION) { |
| 1466 | ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n", |
| 1467 | ATH6KL_ABI_VERSION, ar->version.abi_ver); |
| 1468 | status = -EIO; |
| 1469 | goto err_htc_stop; |
| 1470 | } |
| 1471 | |
| 1472 | if (!timeleft || signal_pending(current)) { |
| 1473 | ath6kl_err("wmi is not ready or wait was interrupted\n"); |
| 1474 | status = -EIO; |
| 1475 | goto err_htc_stop; |
| 1476 | } |
| 1477 | |
| 1478 | ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__); |
| 1479 | |
| 1480 | /* communicate the wmi protocol verision to the target */ |
| 1481 | if ((ath6kl_set_host_app_area(ar)) != 0) |
| 1482 | ath6kl_err("unable to set the host app area\n"); |
| 1483 | |
| 1484 | ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER | |
| 1485 | ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST; |
| 1486 | |
Vasanthakumar Thiagarajan | be98e3a | 2011-10-25 19:33:57 +0530 | [diff] [blame] | 1487 | ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM | |
| 1488 | WIPHY_FLAG_HAVE_AP_SME; |
Vivek Natarajan | 011a36e | 2011-09-19 13:29:16 +0530 | [diff] [blame] | 1489 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1490 | status = ath6kl_target_config_wlan_params(ar); |
| 1491 | if (!status) |
| 1492 | goto ath6kl_init_done; |
| 1493 | |
| 1494 | err_htc_stop: |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1495 | ath6kl_htc_stop(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1496 | err_rxbuf_cleanup: |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1497 | ath6kl_htc_flush_rx_buf(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1498 | ath6kl_cleanup_amsdu_rxbufs(ar); |
| 1499 | err_cleanup_scatter: |
| 1500 | ath6kl_hif_cleanup_scatter(ar); |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 1501 | err_if_deinit: |
| 1502 | ath6kl_deinit_if_data(ar, ndev); |
| 1503 | wiphy_unregister(ar->wiphy); |
| 1504 | err_debug_init: |
| 1505 | ath6kl_debug_cleanup(ar); |
Vasanthakumar Thiagarajan | 852bd9d | 2011-07-21 14:24:54 +0530 | [diff] [blame] | 1506 | err_node_cleanup: |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1507 | ath6kl_wmi_shutdown(ar->wmi); |
| 1508 | clear_bit(WMI_ENABLED, &ar->flag); |
| 1509 | ar->wmi = NULL; |
| 1510 | |
| 1511 | ath6kl_init_done: |
| 1512 | return status; |
| 1513 | } |
| 1514 | |
| 1515 | int ath6kl_core_init(struct ath6kl *ar) |
| 1516 | { |
| 1517 | int ret = 0; |
| 1518 | struct ath6kl_bmi_target_info targ_info; |
| 1519 | |
| 1520 | ar->ath6kl_wq = create_singlethread_workqueue("ath6kl"); |
| 1521 | if (!ar->ath6kl_wq) |
| 1522 | return -ENOMEM; |
| 1523 | |
| 1524 | ret = ath6kl_bmi_init(ar); |
| 1525 | if (ret) |
| 1526 | goto err_wq; |
| 1527 | |
| 1528 | ret = ath6kl_bmi_get_target_info(ar, &targ_info); |
| 1529 | if (ret) |
| 1530 | goto err_bmi_cleanup; |
| 1531 | |
| 1532 | ar->version.target_ver = le32_to_cpu(targ_info.version); |
| 1533 | ar->target_type = le32_to_cpu(targ_info.type); |
Vasanthakumar Thiagarajan | be98e3a | 2011-10-25 19:33:57 +0530 | [diff] [blame] | 1534 | ar->wiphy->hw_version = le32_to_cpu(targ_info.version); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1535 | |
Kalle Valo | a01ac41 | 2011-09-07 10:55:17 +0300 | [diff] [blame] | 1536 | ret = ath6kl_init_hw_params(ar); |
| 1537 | if (ret) |
| 1538 | goto err_bmi_cleanup; |
| 1539 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1540 | ret = ath6kl_configure_target(ar); |
| 1541 | if (ret) |
| 1542 | goto err_bmi_cleanup; |
| 1543 | |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1544 | ar->htc_target = ath6kl_htc_create(ar); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1545 | |
| 1546 | if (!ar->htc_target) { |
| 1547 | ret = -ENOMEM; |
| 1548 | goto err_bmi_cleanup; |
| 1549 | } |
| 1550 | |
Kalle Valo | 772c31e | 2011-09-07 10:55:16 +0300 | [diff] [blame] | 1551 | ret = ath6kl_fetch_firmwares(ar); |
| 1552 | if (ret) |
| 1553 | goto err_htc_cleanup; |
| 1554 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1555 | ret = ath6kl_init_upload(ar); |
| 1556 | if (ret) |
| 1557 | goto err_htc_cleanup; |
| 1558 | |
Vasanthakumar Thiagarajan | 521dffc | 2011-10-25 19:33:56 +0530 | [diff] [blame] | 1559 | ret = ath6kl_init(ar); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1560 | if (ret) |
| 1561 | goto err_htc_cleanup; |
| 1562 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1563 | return ret; |
| 1564 | |
| 1565 | err_htc_cleanup: |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1566 | ath6kl_htc_cleanup(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1567 | err_bmi_cleanup: |
| 1568 | ath6kl_bmi_cleanup(ar); |
| 1569 | err_wq: |
| 1570 | destroy_workqueue(ar->ath6kl_wq); |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 1571 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1572 | return ret; |
| 1573 | } |
| 1574 | |
| 1575 | void ath6kl_stop_txrx(struct ath6kl *ar) |
| 1576 | { |
| 1577 | struct net_device *ndev = ar->net_dev; |
| 1578 | |
| 1579 | if (!ndev) |
| 1580 | return; |
| 1581 | |
| 1582 | set_bit(DESTROY_IN_PROGRESS, &ar->flag); |
| 1583 | |
| 1584 | if (down_interruptible(&ar->sem)) { |
| 1585 | ath6kl_err("down_interruptible failed\n"); |
| 1586 | return; |
| 1587 | } |
| 1588 | |
| 1589 | if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR) |
| 1590 | ath6kl_stop_endpoint(ndev, false, true); |
| 1591 | |
Raja Mani | 575b5f3 | 2011-07-19 19:27:33 +0530 | [diff] [blame] | 1592 | clear_bit(WLAN_ENABLED, &ar->flag); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1593 | } |
| 1594 | |
| 1595 | /* |
| 1596 | * We need to differentiate between the surprise and planned removal of the |
| 1597 | * device because of the following consideration: |
| 1598 | * |
| 1599 | * - In case of surprise removal, the hcd already frees up the pending |
| 1600 | * for the device and hence there is no need to unregister the function |
| 1601 | * driver inorder to get these requests. For planned removal, the function |
| 1602 | * driver has to explicitly unregister itself to have the hcd return all the |
| 1603 | * pending requests before the data structures for the devices are freed up. |
| 1604 | * Note that as per the current implementation, the function driver will |
| 1605 | * end up releasing all the devices since there is no API to selectively |
| 1606 | * release a particular device. |
| 1607 | * |
| 1608 | * - Certain commands issued to the target can be skipped for surprise |
| 1609 | * removal since they will anyway not go through. |
| 1610 | */ |
| 1611 | void ath6kl_destroy(struct net_device *dev, unsigned int unregister) |
| 1612 | { |
| 1613 | struct ath6kl *ar; |
| 1614 | |
| 1615 | if (!dev || !ath6kl_priv(dev)) { |
| 1616 | ath6kl_err("failed to get device structure\n"); |
| 1617 | return; |
| 1618 | } |
| 1619 | |
| 1620 | ar = ath6kl_priv(dev); |
| 1621 | |
| 1622 | destroy_workqueue(ar->ath6kl_wq); |
| 1623 | |
| 1624 | if (ar->htc_target) |
Kalle Valo | ad226ec | 2011-08-10 09:49:12 +0300 | [diff] [blame] | 1625 | ath6kl_htc_cleanup(ar->htc_target); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1626 | |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1627 | ath6kl_cookie_cleanup(ar); |
| 1628 | |
| 1629 | ath6kl_cleanup_amsdu_rxbufs(ar); |
| 1630 | |
| 1631 | ath6kl_bmi_cleanup(ar); |
| 1632 | |
Kalle Valo | bdf5396 | 2011-09-02 10:32:04 +0300 | [diff] [blame] | 1633 | ath6kl_debug_cleanup(ar); |
| 1634 | |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 1635 | ath6kl_deinit_if_data(ar, dev); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1636 | |
Raja Mani | 1970357 | 2011-08-04 19:26:30 +0530 | [diff] [blame] | 1637 | kfree(ar->fw_board); |
| 1638 | kfree(ar->fw_otp); |
| 1639 | kfree(ar->fw); |
| 1640 | kfree(ar->fw_patch); |
| 1641 | |
Vasanthakumar Thiagarajan | 8dafb70 | 2011-10-25 19:33:58 +0530 | [diff] [blame] | 1642 | ath6kl_deinit_ieee80211_hw(ar); |
Kalle Valo | bdcd817 | 2011-07-18 00:22:30 +0300 | [diff] [blame] | 1643 | } |