blob: 97f42799fa589caae5f1c99ebc11670ee16f93a3 [file] [log] [blame]
Juergen Beiserteea643f2008-07-05 10:02:56 +02001/*
2 * Copyright (C) 1999 ARM Limited
3 * Copyright (C) 2000 Deep Blue Solutions Ltd
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
Ilya Yanok74bef9a2009-03-03 02:49:23 +03006 * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
Juergen Beiserteea643f2008-07-05 10:02:56 +02007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/clk.h>
25#include <linux/io.h>
Ilya Yanok74bef9a2009-03-03 02:49:23 +030026#include <linux/err.h>
27#include <linux/delay.h>
Juergen Beiserteea643f2008-07-05 10:02:56 +020028
Russell Kinga09e64f2008-08-05 16:14:15 +010029#include <mach/hardware.h>
Dmitriy Taychenachevfd6ac7b2009-07-31 20:29:22 +090030#include <mach/common.h>
Juergen Beiserteea643f2008-07-05 10:02:56 +020031#include <asm/proc-fns.h>
32#include <asm/system.h>
33
Sascha Hauerbe124c92009-06-04 12:19:02 +020034static void __iomem *wdog_base;
Juergen Beiserteea643f2008-07-05 10:02:56 +020035
36/*
37 * Reset the system. It is called by machine_restart().
38 */
Russell Kingbe093be2009-03-19 16:20:24 +000039void arch_reset(char mode, const char *cmd)
Juergen Beiserteea643f2008-07-05 10:02:56 +020040{
Sascha Hauerbe124c92009-06-04 12:19:02 +020041 unsigned int wcr_enable;
42
Dmitriy Taychenachevfd6ac7b2009-07-31 20:29:22 +090043#ifdef CONFIG_ARCH_MXC91231
44 if (cpu_is_mxc91231()) {
45 mxc91231_arch_reset(mode, cmd);
46 return;
47 }
48#endif
Sascha Hauerbe124c92009-06-04 12:19:02 +020049 if (cpu_is_mx1()) {
50 wcr_enable = (1 << 0);
51 } else {
Ilya Yanok74bef9a2009-03-03 02:49:23 +030052 struct clk *clk;
Juergen Beiserteea643f2008-07-05 10:02:56 +020053
Ilya Yanok74bef9a2009-03-03 02:49:23 +030054 clk = clk_get_sys("imx-wdt.0", NULL);
55 if (!IS_ERR(clk))
56 clk_enable(clk);
Sascha Hauerbe124c92009-06-04 12:19:02 +020057 wcr_enable = (1 << 2);
Juergen Beiserteea643f2008-07-05 10:02:56 +020058 }
59
Juergen Beiserteea643f2008-07-05 10:02:56 +020060 /* Assert SRS signal */
Sascha Hauerbe124c92009-06-04 12:19:02 +020061 __raw_writew(wcr_enable, wdog_base);
Ilya Yanok74bef9a2009-03-03 02:49:23 +030062
63 /* wait for reset to assert... */
64 mdelay(500);
65
66 printk(KERN_ERR "Watchdog reset failed to assert reset\n");
67
68 /* delay to allow the serial port to show the message */
69 mdelay(50);
70
71 /* we'll take a jump through zero as a poor second */
72 cpu_reset(0);
Juergen Beiserteea643f2008-07-05 10:02:56 +020073}
Sascha Hauerbe124c92009-06-04 12:19:02 +020074
75void mxc_arch_reset_init(void __iomem *base)
76{
77 wdog_base = base;
78}