blob: 4ba959153cb134a1399ad4c4273a16e0eccb3f73 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -07003 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Zhu Yib481de92007-09-25 17:54:57 -070030#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/version.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/dma-mapping.h>
36#include <linux/delay.h>
37#include <linux/skbuff.h>
38#include <linux/netdevice.h>
39#include <linux/wireless.h>
40#include <linux/firmware.h>
Zhu Yib481de92007-09-25 17:54:57 -070041#include <linux/etherdevice.h>
42#include <linux/if_arp.h>
43
44#include <net/ieee80211_radiotap.h>
45#include <net/mac80211.h>
46
47#include <asm/div64.h>
48
Tomas Winkler82b9a122008-03-04 18:09:30 -080049#include "iwl-3945-core.h"
Zhu Yib481de92007-09-25 17:54:57 -070050#include "iwl-3945.h"
51#include "iwl-helpers.h"
52
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080053#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080054u32 iwl3945_debug_level;
Zhu Yib481de92007-09-25 17:54:57 -070055#endif
56
Christoph Hellwigbb8c0932008-01-27 16:41:47 -080057static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
58 struct iwl3945_tx_queue *txq);
Christoph Hellwig416e1432007-10-25 17:15:49 +080059
Zhu Yib481de92007-09-25 17:54:57 -070060/******************************************************************************
61 *
62 * module boiler plate
63 *
64 ******************************************************************************/
65
66/* module parameters */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080067static int iwl3945_param_disable_hw_scan; /* def: 0 = use 3945's h/w scan */
68static int iwl3945_param_debug; /* def: 0 = minimal debug log messages */
69static int iwl3945_param_disable; /* def: 0 = enable radio */
Ben Cahill9fbab512007-11-29 11:09:47 +080070static int iwl3945_param_antenna; /* def: 0 = both antennas (use diversity) */
Cahill, Ben M6440adb2007-11-29 11:09:55 +080071int iwl3945_param_hwcrypto; /* def: 0 = use software encryption */
72static int iwl3945_param_qos_enable = 1; /* def: 1 = use quality of service */
73int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 8 Tx queues */
Zhu Yib481de92007-09-25 17:54:57 -070074
75/*
76 * module name, copyright, version, etc.
77 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
78 */
79
80#define DRV_DESCRIPTION \
81"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
82
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080083#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -070084#define VD "d"
85#else
86#define VD
87#endif
88
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +080089#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -070090#define VS "s"
91#else
92#define VS
93#endif
94
Reinette Chatreb9e0b442008-02-08 16:39:11 -080095#define IWLWIFI_VERSION "1.2.26k" VD VS
Reinette Chatreeb7ae892008-03-11 16:17:17 -070096#define DRV_COPYRIGHT "Copyright(c) 2003-2008 Intel Corporation"
Zhu Yib481de92007-09-25 17:54:57 -070097#define DRV_VERSION IWLWIFI_VERSION
98
Zhu Yib481de92007-09-25 17:54:57 -070099
100MODULE_DESCRIPTION(DRV_DESCRIPTION);
101MODULE_VERSION(DRV_VERSION);
102MODULE_AUTHOR(DRV_COPYRIGHT);
103MODULE_LICENSE("GPL");
104
Christoph Hellwig416e1432007-10-25 17:15:49 +0800105static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -0700106{
107 u16 fc = le16_to_cpu(hdr->frame_control);
108 int hdr_len = ieee80211_get_hdrlen(fc);
109
110 if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
111 return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
112 return NULL;
113}
114
Johannes Berg8318d782008-01-24 19:38:38 +0100115static const struct ieee80211_supported_band *iwl3945_get_band(
116 struct iwl3945_priv *priv, enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -0700117{
Johannes Berg8318d782008-01-24 19:38:38 +0100118 return priv->hw->wiphy->bands[band];
Zhu Yib481de92007-09-25 17:54:57 -0700119}
120
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800121static int iwl3945_is_empty_essid(const char *essid, int essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700122{
123 /* Single white space is for Linksys APs */
124 if (essid_len == 1 && essid[0] == ' ')
125 return 1;
126
127 /* Otherwise, if the entire essid is 0, we assume it is hidden */
128 while (essid_len) {
129 essid_len--;
130 if (essid[essid_len] != '\0')
131 return 0;
132 }
133
134 return 1;
135}
136
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800137static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
Zhu Yib481de92007-09-25 17:54:57 -0700138{
139 static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
140 const char *s = essid;
141 char *d = escaped;
142
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800143 if (iwl3945_is_empty_essid(essid, essid_len)) {
Zhu Yib481de92007-09-25 17:54:57 -0700144 memcpy(escaped, "<hidden>", sizeof("<hidden>"));
145 return escaped;
146 }
147
148 essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
149 while (essid_len--) {
150 if (*s == '\0') {
151 *d++ = '\\';
152 *d++ = '0';
153 s++;
154 } else
155 *d++ = *s++;
156 }
157 *d = '\0';
158 return escaped;
159}
160
Zhu Yib481de92007-09-25 17:54:57 -0700161/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
162 * DMA services
163 *
164 * Theory of operation
165 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800166 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
167 * of buffer descriptors, each of which points to one or more data buffers for
168 * the device to read from or fill. Driver and device exchange status of each
169 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
170 * entries in each circular buffer, to protect against confusing empty and full
171 * queue states.
172 *
173 * The device reads or writes the data in the queues via the device's several
174 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
Zhu Yib481de92007-09-25 17:54:57 -0700175 *
176 * For Tx queue, there are low mark and high mark limits. If, after queuing
177 * the packet for Tx, free space become < low mark, Tx queue stopped. When
178 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
179 * Tx queue resumed.
180 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800181 * The 3945 operates with six queues: One receive queue, one transmit queue
182 * (#4) for sending commands to the device firmware, and four transmit queues
183 * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
Zhu Yib481de92007-09-25 17:54:57 -0700184 ***************************************************/
185
Tomas Winklerc54b6792008-03-06 17:36:53 -0800186int iwl3945_queue_space(const struct iwl3945_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -0700187{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800188 int s = q->read_ptr - q->write_ptr;
Zhu Yib481de92007-09-25 17:54:57 -0700189
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800190 if (q->read_ptr > q->write_ptr)
Zhu Yib481de92007-09-25 17:54:57 -0700191 s -= q->n_bd;
192
193 if (s <= 0)
194 s += q->n_window;
195 /* keep some reserve to not confuse empty and full situations */
196 s -= 2;
197 if (s < 0)
198 s = 0;
199 return s;
200}
201
Tomas Winklerc54b6792008-03-06 17:36:53 -0800202int iwl3945_x2_queue_used(const struct iwl3945_queue *q, int i)
Zhu Yib481de92007-09-25 17:54:57 -0700203{
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800204 return q->write_ptr > q->read_ptr ?
205 (i >= q->read_ptr && i < q->write_ptr) :
206 !(i < q->read_ptr && i >= q->write_ptr);
Zhu Yib481de92007-09-25 17:54:57 -0700207}
208
Tomas Winklerc54b6792008-03-06 17:36:53 -0800209
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800210static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
Zhu Yib481de92007-09-25 17:54:57 -0700211{
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800212 /* This is for scan command, the big buffer at end of command array */
Zhu Yib481de92007-09-25 17:54:57 -0700213 if (is_huge)
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800214 return q->n_window; /* must be power of 2 */
Zhu Yib481de92007-09-25 17:54:57 -0700215
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800216 /* Otherwise, use normal size buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700217 return index & (q->n_window - 1);
218}
219
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800220/**
221 * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
222 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800223static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
Zhu Yib481de92007-09-25 17:54:57 -0700224 int count, int slots_num, u32 id)
225{
226 q->n_bd = count;
227 q->n_window = slots_num;
228 q->id = id;
229
Tomas Winklerc54b6792008-03-06 17:36:53 -0800230 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
231 * and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700232 BUG_ON(!is_power_of_2(count));
233
234 /* slots_num must be power-of-two size, otherwise
235 * get_cmd_index is broken. */
236 BUG_ON(!is_power_of_2(slots_num));
237
238 q->low_mark = q->n_window / 4;
239 if (q->low_mark < 4)
240 q->low_mark = 4;
241
242 q->high_mark = q->n_window / 8;
243 if (q->high_mark < 2)
244 q->high_mark = 2;
245
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800246 q->write_ptr = q->read_ptr = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700247
248 return 0;
249}
250
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800251/**
252 * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
253 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800254static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
255 struct iwl3945_tx_queue *txq, u32 id)
Zhu Yib481de92007-09-25 17:54:57 -0700256{
257 struct pci_dev *dev = priv->pci_dev;
258
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800259 /* Driver private data, only for Tx (not command) queues,
260 * not shared with device. */
Zhu Yib481de92007-09-25 17:54:57 -0700261 if (id != IWL_CMD_QUEUE_NUM) {
262 txq->txb = kmalloc(sizeof(txq->txb[0]) *
263 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
264 if (!txq->txb) {
Ian Schram01ebd062007-10-25 17:15:22 +0800265 IWL_ERROR("kmalloc for auxiliary BD "
Zhu Yib481de92007-09-25 17:54:57 -0700266 "structures failed\n");
267 goto error;
268 }
269 } else
270 txq->txb = NULL;
271
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800272 /* Circular buffer of transmit frame descriptors (TFDs),
273 * shared with device */
Zhu Yib481de92007-09-25 17:54:57 -0700274 txq->bd = pci_alloc_consistent(dev,
275 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
276 &txq->q.dma_addr);
277
278 if (!txq->bd) {
279 IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
280 sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
281 goto error;
282 }
283 txq->q.id = id;
284
285 return 0;
286
287 error:
288 if (txq->txb) {
289 kfree(txq->txb);
290 txq->txb = NULL;
291 }
292
293 return -ENOMEM;
294}
295
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800296/**
297 * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
298 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800299int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
300 struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
Zhu Yib481de92007-09-25 17:54:57 -0700301{
302 struct pci_dev *dev = priv->pci_dev;
303 int len;
304 int rc = 0;
305
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800306 /*
307 * Alloc buffer array for commands (Tx or other types of commands).
308 * For the command queue (#4), allocate command space + one big
309 * command for scan, since scan command is very huge; the system will
310 * not have two scans at the same time, so only one is needed.
311 * For data Tx queues (all other queues), no super-size command
312 * space is needed.
313 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800314 len = sizeof(struct iwl3945_cmd) * slots_num;
Zhu Yib481de92007-09-25 17:54:57 -0700315 if (txq_id == IWL_CMD_QUEUE_NUM)
316 len += IWL_MAX_SCAN_SIZE;
317 txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
318 if (!txq->cmd)
319 return -ENOMEM;
320
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800321 /* Alloc driver data array and TFD circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800322 rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700323 if (rc) {
324 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
325
326 return -ENOMEM;
327 }
328 txq->need_update = 0;
329
330 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
Tomas Winklerc54b6792008-03-06 17:36:53 -0800331 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
Zhu Yib481de92007-09-25 17:54:57 -0700332 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800333
334 /* Initialize queue high/low-water, head/tail indexes */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800335 iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
Zhu Yib481de92007-09-25 17:54:57 -0700336
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800337 /* Tell device where to find queue, enable DMA channel. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800338 iwl3945_hw_tx_queue_init(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700339
340 return 0;
341}
342
343/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800344 * iwl3945_tx_queue_free - Deallocate DMA queue.
Zhu Yib481de92007-09-25 17:54:57 -0700345 * @txq: Transmit queue to deallocate.
346 *
347 * Empty queue by removing and destroying all BD's.
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800348 * Free all buffers.
349 * 0-fill, but do not free "txq" descriptor structure.
Zhu Yib481de92007-09-25 17:54:57 -0700350 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800351void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -0700352{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800353 struct iwl3945_queue *q = &txq->q;
Zhu Yib481de92007-09-25 17:54:57 -0700354 struct pci_dev *dev = priv->pci_dev;
355 int len;
356
357 if (q->n_bd == 0)
358 return;
359
360 /* first, empty all BD's */
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800361 for (; q->write_ptr != q->read_ptr;
Tomas Winklerc54b6792008-03-06 17:36:53 -0800362 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800363 iwl3945_hw_txq_free_tfd(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700364
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800365 len = sizeof(struct iwl3945_cmd) * q->n_window;
Zhu Yib481de92007-09-25 17:54:57 -0700366 if (q->id == IWL_CMD_QUEUE_NUM)
367 len += IWL_MAX_SCAN_SIZE;
368
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800369 /* De-alloc array of command/tx buffers */
Zhu Yib481de92007-09-25 17:54:57 -0700370 pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
371
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800372 /* De-alloc circular buffer of TFDs */
Zhu Yib481de92007-09-25 17:54:57 -0700373 if (txq->q.n_bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800374 pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
Zhu Yib481de92007-09-25 17:54:57 -0700375 txq->q.n_bd, txq->bd, txq->q.dma_addr);
376
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800377 /* De-alloc array of per-TFD driver data */
Zhu Yib481de92007-09-25 17:54:57 -0700378 if (txq->txb) {
379 kfree(txq->txb);
380 txq->txb = NULL;
381 }
382
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800383 /* 0-fill queue descriptor structure */
Zhu Yib481de92007-09-25 17:54:57 -0700384 memset(txq, 0, sizeof(*txq));
385}
386
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800387const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
Zhu Yib481de92007-09-25 17:54:57 -0700388
389/*************** STATION TABLE MANAGEMENT ****
Ben Cahill9fbab512007-11-29 11:09:47 +0800390 * mac80211 should be examined to determine if sta_info is duplicating
Zhu Yib481de92007-09-25 17:54:57 -0700391 * the functionality provided here
392 */
393
394/**************************************************************/
Ian Schram01ebd062007-10-25 17:15:22 +0800395#if 0 /* temporary disable till we add real remove station */
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800396/**
397 * iwl3945_remove_station - Remove driver's knowledge of station.
398 *
399 * NOTE: This does not remove station from device's station table.
400 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800401static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
Zhu Yib481de92007-09-25 17:54:57 -0700402{
403 int index = IWL_INVALID_STATION;
404 int i;
405 unsigned long flags;
406
407 spin_lock_irqsave(&priv->sta_lock, flags);
408
409 if (is_ap)
410 index = IWL_AP_ID;
411 else if (is_broadcast_ether_addr(addr))
412 index = priv->hw_setting.bcast_sta_id;
413 else
414 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
415 if (priv->stations[i].used &&
416 !compare_ether_addr(priv->stations[i].sta.sta.addr,
417 addr)) {
418 index = i;
419 break;
420 }
421
422 if (unlikely(index == IWL_INVALID_STATION))
423 goto out;
424
425 if (priv->stations[index].used) {
426 priv->stations[index].used = 0;
427 priv->num_stations--;
428 }
429
430 BUG_ON(priv->num_stations < 0);
431
432out:
433 spin_unlock_irqrestore(&priv->sta_lock, flags);
434 return 0;
435}
Zhu Yi556f8db2007-09-27 11:27:33 +0800436#endif
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800437
438/**
439 * iwl3945_clear_stations_table - Clear the driver's station table
440 *
441 * NOTE: This does not clear or otherwise alter the device's station table.
442 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800443static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700444{
445 unsigned long flags;
446
447 spin_lock_irqsave(&priv->sta_lock, flags);
448
449 priv->num_stations = 0;
450 memset(priv->stations, 0, sizeof(priv->stations));
451
452 spin_unlock_irqrestore(&priv->sta_lock, flags);
453}
454
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800455/**
456 * iwl3945_add_station - Add station to station tables in driver and device
457 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800458u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -0700459{
460 int i;
461 int index = IWL_INVALID_STATION;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800462 struct iwl3945_station_entry *station;
Zhu Yib481de92007-09-25 17:54:57 -0700463 unsigned long flags_spin;
Joe Perches0795af52007-10-03 17:59:30 -0700464 DECLARE_MAC_BUF(mac);
Zhu Yic14c5212007-09-27 11:27:35 +0800465 u8 rate;
Zhu Yib481de92007-09-25 17:54:57 -0700466
467 spin_lock_irqsave(&priv->sta_lock, flags_spin);
468 if (is_ap)
469 index = IWL_AP_ID;
470 else if (is_broadcast_ether_addr(addr))
471 index = priv->hw_setting.bcast_sta_id;
472 else
473 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
474 if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
475 addr)) {
476 index = i;
477 break;
478 }
479
480 if (!priv->stations[i].used &&
481 index == IWL_INVALID_STATION)
482 index = i;
483 }
484
Ian Schram01ebd062007-10-25 17:15:22 +0800485 /* These two conditions has the same outcome but keep them separate
Zhu Yib481de92007-09-25 17:54:57 -0700486 since they have different meaning */
487 if (unlikely(index == IWL_INVALID_STATION)) {
488 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
489 return index;
490 }
491
492 if (priv->stations[index].used &&
493 !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
494 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
495 return index;
496 }
497
Joe Perches0795af52007-10-03 17:59:30 -0700498 IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -0700499 station = &priv->stations[index];
500 station->used = 1;
501 priv->num_stations++;
502
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800503 /* Set up the REPLY_ADD_STA command to send to device */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800504 memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
Zhu Yib481de92007-09-25 17:54:57 -0700505 memcpy(station->sta.sta.addr, addr, ETH_ALEN);
506 station->sta.mode = 0;
507 station->sta.sta.sta_id = index;
508 station->sta.station_flags = 0;
509
Johannes Berg8318d782008-01-24 19:38:38 +0100510 if (priv->band == IEEE80211_BAND_5GHZ)
Tomas Winkler69946332007-10-25 17:15:27 +0800511 rate = IWL_RATE_6M_PLCP;
512 else
513 rate = IWL_RATE_1M_PLCP;
Zhu Yic14c5212007-09-27 11:27:35 +0800514
515 /* Turn on both antennas for the station... */
516 station->sta.rate_n_flags =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800517 iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
Zhu Yic14c5212007-09-27 11:27:35 +0800518 station->current_rate.rate_n_flags =
519 le16_to_cpu(station->sta.rate_n_flags);
520
Zhu Yib481de92007-09-25 17:54:57 -0700521 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800522
523 /* Add station to device's station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800524 iwl3945_send_add_station(priv, &station->sta, flags);
Zhu Yib481de92007-09-25 17:54:57 -0700525 return index;
526
527}
528
529/*************** DRIVER STATUS FUNCTIONS *****/
530
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800531static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700532{
533 /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
534 * set but EXIT_PENDING is not */
535 return test_bit(STATUS_READY, &priv->status) &&
536 test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
537 !test_bit(STATUS_EXIT_PENDING, &priv->status);
538}
539
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800540static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700541{
542 return test_bit(STATUS_ALIVE, &priv->status);
543}
544
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800545static inline int iwl3945_is_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700546{
547 return test_bit(STATUS_INIT, &priv->status);
548}
549
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800550static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700551{
552 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
553 test_bit(STATUS_RF_KILL_SW, &priv->status);
554}
555
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800556static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700557{
558
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800559 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -0700560 return 0;
561
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800562 return iwl3945_is_ready(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700563}
564
565/*************** HOST COMMAND QUEUE FUNCTIONS *****/
566
567#define IWL_CMD(x) case x : return #x
568
569static const char *get_cmd_string(u8 cmd)
570{
571 switch (cmd) {
572 IWL_CMD(REPLY_ALIVE);
573 IWL_CMD(REPLY_ERROR);
574 IWL_CMD(REPLY_RXON);
575 IWL_CMD(REPLY_RXON_ASSOC);
576 IWL_CMD(REPLY_QOS_PARAM);
577 IWL_CMD(REPLY_RXON_TIMING);
578 IWL_CMD(REPLY_ADD_STA);
579 IWL_CMD(REPLY_REMOVE_STA);
580 IWL_CMD(REPLY_REMOVE_ALL_STA);
581 IWL_CMD(REPLY_3945_RX);
582 IWL_CMD(REPLY_TX);
583 IWL_CMD(REPLY_RATE_SCALE);
584 IWL_CMD(REPLY_LEDS_CMD);
585 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
586 IWL_CMD(RADAR_NOTIFICATION);
587 IWL_CMD(REPLY_QUIET_CMD);
588 IWL_CMD(REPLY_CHANNEL_SWITCH);
589 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
590 IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
591 IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
592 IWL_CMD(POWER_TABLE_CMD);
593 IWL_CMD(PM_SLEEP_NOTIFICATION);
594 IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
595 IWL_CMD(REPLY_SCAN_CMD);
596 IWL_CMD(REPLY_SCAN_ABORT_CMD);
597 IWL_CMD(SCAN_START_NOTIFICATION);
598 IWL_CMD(SCAN_RESULTS_NOTIFICATION);
599 IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
600 IWL_CMD(BEACON_NOTIFICATION);
601 IWL_CMD(REPLY_TX_BEACON);
602 IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
603 IWL_CMD(QUIET_NOTIFICATION);
604 IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
605 IWL_CMD(MEASURE_ABORT_NOTIFICATION);
606 IWL_CMD(REPLY_BT_CONFIG);
607 IWL_CMD(REPLY_STATISTICS_CMD);
608 IWL_CMD(STATISTICS_NOTIFICATION);
609 IWL_CMD(REPLY_CARD_STATE_CMD);
610 IWL_CMD(CARD_STATE_NOTIFICATION);
611 IWL_CMD(MISSED_BEACONS_NOTIFICATION);
612 default:
613 return "UNKNOWN";
614
615 }
616}
617
618#define HOST_COMPLETE_TIMEOUT (HZ / 2)
619
620/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800621 * iwl3945_enqueue_hcmd - enqueue a uCode command
Zhu Yib481de92007-09-25 17:54:57 -0700622 * @priv: device private data point
623 * @cmd: a point to the ucode command structure
624 *
625 * The function returns < 0 values to indicate the operation is
626 * failed. On success, it turns the index (> 0) of command in the
627 * command queue.
628 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800629static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700630{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800631 struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
632 struct iwl3945_queue *q = &txq->q;
633 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -0700634 u32 *control_flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800635 struct iwl3945_cmd *out_cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700636 u32 idx;
637 u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
638 dma_addr_t phys_addr;
639 int pad;
640 u16 count;
641 int ret;
642 unsigned long flags;
643
644 /* If any of the command structures end up being larger than
645 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
646 * we will need to increase the size of the TFD entries */
647 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
648 !(cmd->meta.flags & CMD_SIZE_HUGE));
649
Gregory Greenmanc342a1b2008-02-06 11:20:40 -0800650
651 if (iwl3945_is_rfkill(priv)) {
652 IWL_DEBUG_INFO("Not sending command - RF KILL");
653 return -EIO;
654 }
655
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800656 if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
Zhu Yib481de92007-09-25 17:54:57 -0700657 IWL_ERROR("No space for Tx\n");
658 return -ENOSPC;
659 }
660
661 spin_lock_irqsave(&priv->hcmd_lock, flags);
662
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800663 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -0700664 memset(tfd, 0, sizeof(*tfd));
665
666 control_flags = (u32 *) tfd;
667
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800668 idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
Zhu Yib481de92007-09-25 17:54:57 -0700669 out_cmd = &txq->cmd[idx];
670
671 out_cmd->hdr.cmd = cmd->id;
672 memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
673 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
674
675 /* At this point, the out_cmd now has all of the incoming cmd
676 * information */
677
678 out_cmd->hdr.flags = 0;
679 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800680 INDEX_TO_SEQ(q->write_ptr));
Zhu Yib481de92007-09-25 17:54:57 -0700681 if (out_cmd->meta.flags & CMD_SIZE_HUGE)
682 out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
683
684 phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800685 offsetof(struct iwl3945_cmd, hdr);
686 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
Zhu Yib481de92007-09-25 17:54:57 -0700687
688 pad = U32_PAD(cmd->len);
689 count = TFD_CTL_COUNT_GET(*control_flags);
690 *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
691
692 IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
693 "%d bytes at %d[%d]:%d\n",
694 get_cmd_string(out_cmd->hdr.cmd),
695 out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
Tomas Winklerfc4b6852007-10-25 17:15:24 +0800696 fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
Zhu Yib481de92007-09-25 17:54:57 -0700697
698 txq->need_update = 1;
Cahill, Ben M6440adb2007-11-29 11:09:55 +0800699
700 /* Increment and update queue's write index */
Tomas Winklerc54b6792008-03-06 17:36:53 -0800701 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800702 ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -0700703
704 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
705 return ret ? ret : idx;
706}
707
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800708static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700709{
710 int ret;
711
712 BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
713
714 /* An asynchronous command can not expect an SKB to be set. */
715 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
716
717 /* An asynchronous command MUST have a callback. */
718 BUG_ON(!cmd->meta.u.callback);
719
720 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
721 return -EBUSY;
722
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800723 ret = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700724 if (ret < 0) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800725 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700726 get_cmd_string(cmd->id), ret);
727 return ret;
728 }
729 return 0;
730}
731
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800732static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700733{
734 int cmd_idx;
735 int ret;
736 static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
737
738 BUG_ON(cmd->meta.flags & CMD_ASYNC);
739
740 /* A synchronous command can not have a callback set. */
741 BUG_ON(cmd->meta.u.callback != NULL);
742
743 if (atomic_xchg(&entry, 1)) {
744 IWL_ERROR("Error sending %s: Already sending a host command\n",
745 get_cmd_string(cmd->id));
746 return -EBUSY;
747 }
748
749 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
750
751 if (cmd->meta.flags & CMD_WANT_SKB)
752 cmd->meta.source = &cmd->meta;
753
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800754 cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700755 if (cmd_idx < 0) {
756 ret = cmd_idx;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800757 IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700758 get_cmd_string(cmd->id), ret);
759 goto out;
760 }
761
762 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
763 !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
764 HOST_COMPLETE_TIMEOUT);
765 if (!ret) {
766 if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
767 IWL_ERROR("Error sending %s: time out after %dms.\n",
768 get_cmd_string(cmd->id),
769 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
770
771 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
772 ret = -ETIMEDOUT;
773 goto cancel;
774 }
775 }
776
777 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
778 IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
779 get_cmd_string(cmd->id));
780 ret = -ECANCELED;
781 goto fail;
782 }
783 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
784 IWL_DEBUG_INFO("Command %s failed: FW Error\n",
785 get_cmd_string(cmd->id));
786 ret = -EIO;
787 goto fail;
788 }
789 if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
790 IWL_ERROR("Error: Response NULL in '%s'\n",
791 get_cmd_string(cmd->id));
792 ret = -EIO;
793 goto out;
794 }
795
796 ret = 0;
797 goto out;
798
799cancel:
800 if (cmd->meta.flags & CMD_WANT_SKB) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800801 struct iwl3945_cmd *qcmd;
Zhu Yib481de92007-09-25 17:54:57 -0700802
803 /* Cancel the CMD_WANT_SKB flag for the cmd in the
804 * TX cmd queue. Otherwise in case the cmd comes
805 * in later, it will possibly set an invalid
806 * address (cmd->meta.source). */
807 qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
808 qcmd->meta.flags &= ~CMD_WANT_SKB;
809 }
810fail:
811 if (cmd->meta.u.skb) {
812 dev_kfree_skb_any(cmd->meta.u.skb);
813 cmd->meta.u.skb = NULL;
814 }
815out:
816 atomic_set(&entry, 0);
817 return ret;
818}
819
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800820int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
Zhu Yib481de92007-09-25 17:54:57 -0700821{
Zhu Yib481de92007-09-25 17:54:57 -0700822 if (cmd->meta.flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800823 return iwl3945_send_cmd_async(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700824
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800825 return iwl3945_send_cmd_sync(priv, cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700826}
827
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800828int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
Zhu Yib481de92007-09-25 17:54:57 -0700829{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800830 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700831 .id = id,
832 .len = len,
833 .data = data,
834 };
835
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800836 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700837}
838
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800839static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
Zhu Yib481de92007-09-25 17:54:57 -0700840{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800841 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -0700842 .id = id,
843 .len = sizeof(val),
844 .data = &val,
845 };
846
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800847 return iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -0700848}
849
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800850int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700851{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800852 return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700853}
854
855/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800856 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
Johannes Berg8318d782008-01-24 19:38:38 +0100857 * @band: 2.4 or 5 GHz band
858 * @channel: Any channel valid for the requested band
Zhu Yib481de92007-09-25 17:54:57 -0700859
Johannes Berg8318d782008-01-24 19:38:38 +0100860 * In addition to setting the staging RXON, priv->band is also set.
Zhu Yib481de92007-09-25 17:54:57 -0700861 *
862 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
Johannes Berg8318d782008-01-24 19:38:38 +0100863 * in the staging RXON flag structure based on the band
Zhu Yib481de92007-09-25 17:54:57 -0700864 */
Johannes Berg8318d782008-01-24 19:38:38 +0100865static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv,
866 enum ieee80211_band band,
867 u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700868{
Johannes Berg8318d782008-01-24 19:38:38 +0100869 if (!iwl3945_get_channel_info(priv, band, channel)) {
Zhu Yib481de92007-09-25 17:54:57 -0700870 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
Johannes Berg8318d782008-01-24 19:38:38 +0100871 channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700872 return -EINVAL;
873 }
874
875 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
Johannes Berg8318d782008-01-24 19:38:38 +0100876 (priv->band == band))
Zhu Yib481de92007-09-25 17:54:57 -0700877 return 0;
878
879 priv->staging_rxon.channel = cpu_to_le16(channel);
Johannes Berg8318d782008-01-24 19:38:38 +0100880 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -0700881 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
882 else
883 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
884
Johannes Berg8318d782008-01-24 19:38:38 +0100885 priv->band = band;
Zhu Yib481de92007-09-25 17:54:57 -0700886
Johannes Berg8318d782008-01-24 19:38:38 +0100887 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
Zhu Yib481de92007-09-25 17:54:57 -0700888
889 return 0;
890}
891
892/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800893 * iwl3945_check_rxon_cmd - validate RXON structure is valid
Zhu Yib481de92007-09-25 17:54:57 -0700894 *
895 * NOTE: This is really only useful during development and can eventually
896 * be #ifdef'd out once the driver is stable and folks aren't actively
897 * making changes
898 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800899static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -0700900{
901 int error = 0;
902 int counter = 1;
903
904 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
905 error |= le32_to_cpu(rxon->flags &
906 (RXON_FLG_TGJ_NARROW_BAND_MSK |
907 RXON_FLG_RADAR_DETECT_MSK));
908 if (error)
909 IWL_WARNING("check 24G fields %d | %d\n",
910 counter++, error);
911 } else {
912 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
913 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
914 if (error)
915 IWL_WARNING("check 52 fields %d | %d\n",
916 counter++, error);
917 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
918 if (error)
919 IWL_WARNING("check 52 CCK %d | %d\n",
920 counter++, error);
921 }
922 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
923 if (error)
924 IWL_WARNING("check mac addr %d | %d\n", counter++, error);
925
926 /* make sure basic rates 6Mbps and 1Mbps are supported */
927 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
928 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
929 if (error)
930 IWL_WARNING("check basic rate %d | %d\n", counter++, error);
931
932 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
933 if (error)
934 IWL_WARNING("check assoc id %d | %d\n", counter++, error);
935
936 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
937 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
938 if (error)
939 IWL_WARNING("check CCK and short slot %d | %d\n",
940 counter++, error);
941
942 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
943 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
944 if (error)
945 IWL_WARNING("check CCK & auto detect %d | %d\n",
946 counter++, error);
947
948 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
949 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
950 if (error)
951 IWL_WARNING("check TGG and auto detect %d | %d\n",
952 counter++, error);
953
954 if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
955 error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
956 RXON_FLG_ANT_A_MSK)) == 0);
957 if (error)
958 IWL_WARNING("check antenna %d %d\n", counter++, error);
959
960 if (error)
961 IWL_WARNING("Tuning to channel %d\n",
962 le16_to_cpu(rxon->channel));
963
964 if (error) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800965 IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
Zhu Yib481de92007-09-25 17:54:57 -0700966 return -1;
967 }
968 return 0;
969}
970
971/**
Ben Cahill9fbab512007-11-29 11:09:47 +0800972 * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
Ian Schram01ebd062007-10-25 17:15:22 +0800973 * @priv: staging_rxon is compared to active_rxon
Zhu Yib481de92007-09-25 17:54:57 -0700974 *
Ben Cahill9fbab512007-11-29 11:09:47 +0800975 * If the RXON structure is changing enough to require a new tune,
976 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
977 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
Zhu Yib481de92007-09-25 17:54:57 -0700978 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800979static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700980{
981
982 /* These items are only settable from the full RXON command */
983 if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
984 compare_ether_addr(priv->staging_rxon.bssid_addr,
985 priv->active_rxon.bssid_addr) ||
986 compare_ether_addr(priv->staging_rxon.node_addr,
987 priv->active_rxon.node_addr) ||
988 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
989 priv->active_rxon.wlap_bssid_addr) ||
990 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
991 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
992 (priv->staging_rxon.air_propagation !=
993 priv->active_rxon.air_propagation) ||
994 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
995 return 1;
996
997 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
998 * be updated with the RXON_ASSOC command -- however only some
999 * flag transitions are allowed using RXON_ASSOC */
1000
1001 /* Check if we are not switching bands */
1002 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
1003 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
1004 return 1;
1005
1006 /* Check if we are switching association toggle */
1007 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
1008 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
1009 return 1;
1010
1011 return 0;
1012}
1013
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001014static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001015{
1016 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001017 struct iwl3945_rx_packet *res = NULL;
1018 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1019 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001020 .id = REPLY_RXON_ASSOC,
1021 .len = sizeof(rxon_assoc),
1022 .meta.flags = CMD_WANT_SKB,
1023 .data = &rxon_assoc,
1024 };
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001025 const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
1026 const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001027
1028 if ((rxon1->flags == rxon2->flags) &&
1029 (rxon1->filter_flags == rxon2->filter_flags) &&
1030 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1031 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1032 IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
1033 return 0;
1034 }
1035
1036 rxon_assoc.flags = priv->staging_rxon.flags;
1037 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1038 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1039 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1040 rxon_assoc.reserved = 0;
1041
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001042 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001043 if (rc)
1044 return rc;
1045
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001046 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001047 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1048 IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
1049 rc = -EIO;
1050 }
1051
1052 priv->alloc_rxb_skb--;
1053 dev_kfree_skb_any(cmd.meta.u.skb);
1054
1055 return rc;
1056}
1057
1058/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001059 * iwl3945_commit_rxon - commit staging_rxon to hardware
Zhu Yib481de92007-09-25 17:54:57 -07001060 *
Ian Schram01ebd062007-10-25 17:15:22 +08001061 * The RXON command in staging_rxon is committed to the hardware and
Zhu Yib481de92007-09-25 17:54:57 -07001062 * the active_rxon structure is updated with the new data. This
1063 * function correctly transitions out of the RXON_ASSOC_MSK state if
1064 * a HW tune is required based on the RXON structure changes.
1065 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001066static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001067{
1068 /* cast away the const for active_rxon in this function */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001069 struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07001070 int rc = 0;
Joe Perches0795af52007-10-03 17:59:30 -07001071 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07001072
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001073 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001074 return -1;
1075
1076 /* always get timestamp with Rx frame */
1077 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
1078
1079 /* select antenna */
1080 priv->staging_rxon.flags &=
1081 ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
1082 priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
1083
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001084 rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001085 if (rc) {
1086 IWL_ERROR("Invalid RXON configuration. Not committing.\n");
1087 return -EINVAL;
1088 }
1089
1090 /* If we don't need to send a full RXON, we can use
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001091 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
Zhu Yib481de92007-09-25 17:54:57 -07001092 * and other flags for the current radio configuration. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001093 if (!iwl3945_full_rxon_required(priv)) {
1094 rc = iwl3945_send_rxon_assoc(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001095 if (rc) {
1096 IWL_ERROR("Error setting RXON_ASSOC "
1097 "configuration (%d).\n", rc);
1098 return rc;
1099 }
1100
1101 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1102
1103 return 0;
1104 }
1105
1106 /* If we are currently associated and the new config requires
1107 * an RXON_ASSOC and the new config wants the associated mask enabled,
1108 * we must clear the associated from the active configuration
1109 * before we apply the new config */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001110 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001111 (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
1112 IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
1113 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1114
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001115 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1116 sizeof(struct iwl3945_rxon_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001117 &priv->active_rxon);
1118
1119 /* If the mask clearing failed then we set
1120 * active_rxon back to what it was previously */
1121 if (rc) {
1122 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
1123 IWL_ERROR("Error clearing ASSOC_MSK on current "
1124 "configuration (%d).\n", rc);
1125 return rc;
1126 }
Zhu Yib481de92007-09-25 17:54:57 -07001127 }
1128
1129 IWL_DEBUG_INFO("Sending RXON\n"
1130 "* with%s RXON_FILTER_ASSOC_MSK\n"
1131 "* channel = %d\n"
Joe Perches0795af52007-10-03 17:59:30 -07001132 "* bssid = %s\n",
Zhu Yib481de92007-09-25 17:54:57 -07001133 ((priv->staging_rxon.filter_flags &
1134 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
1135 le16_to_cpu(priv->staging_rxon.channel),
Joe Perches0795af52007-10-03 17:59:30 -07001136 print_mac(mac, priv->staging_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07001137
1138 /* Apply the new configuration */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001139 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
1140 sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07001141 if (rc) {
1142 IWL_ERROR("Error setting new configuration (%d).\n", rc);
1143 return rc;
1144 }
1145
1146 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
1147
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001148 iwl3945_clear_stations_table(priv);
Zhu Yi556f8db2007-09-27 11:27:33 +08001149
Zhu Yib481de92007-09-25 17:54:57 -07001150 /* If we issue a new RXON command which required a tune then we must
1151 * send a new TXPOWER command or we won't be able to Tx any frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001152 rc = iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001153 if (rc) {
1154 IWL_ERROR("Error setting Tx power (%d).\n", rc);
1155 return rc;
1156 }
1157
1158 /* Add the broadcast address so we can send broadcast frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001159 if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
Zhu Yib481de92007-09-25 17:54:57 -07001160 IWL_INVALID_STATION) {
1161 IWL_ERROR("Error adding BROADCAST address for transmit.\n");
1162 return -EIO;
1163 }
1164
1165 /* If we have set the ASSOC_MSK and we are in BSS mode then
1166 * add the IWL_AP_ID to the station rate table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001167 if (iwl3945_is_associated(priv) &&
Zhu Yib481de92007-09-25 17:54:57 -07001168 (priv->iw_mode == IEEE80211_IF_TYPE_STA))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001169 if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
Zhu Yib481de92007-09-25 17:54:57 -07001170 == IWL_INVALID_STATION) {
1171 IWL_ERROR("Error adding AP address for transmit.\n");
1172 return -EIO;
1173 }
1174
Johannes Berg8318d782008-01-24 19:38:38 +01001175 /* Init the hardware's rate fallback order based on the band */
Zhu Yib481de92007-09-25 17:54:57 -07001176 rc = iwl3945_init_hw_rate_table(priv);
1177 if (rc) {
1178 IWL_ERROR("Error setting HW rate table: %02X\n", rc);
1179 return -EIO;
1180 }
1181
1182 return 0;
1183}
1184
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001185static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001186{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001187 struct iwl3945_bt_cmd bt_cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001188 .flags = 3,
1189 .lead_time = 0xAA,
1190 .max_kill = 1,
1191 .kill_ack_mask = 0,
1192 .kill_cts_mask = 0,
1193 };
1194
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001195 return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1196 sizeof(struct iwl3945_bt_cmd), &bt_cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001197}
1198
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001199static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001200{
1201 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001202 struct iwl3945_rx_packet *res;
1203 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001204 .id = REPLY_SCAN_ABORT_CMD,
1205 .meta.flags = CMD_WANT_SKB,
1206 };
1207
1208 /* If there isn't a scan actively going on in the hardware
1209 * then we are in between scan bands and not actually
1210 * actively scanning, so don't send the abort command */
1211 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
1212 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1213 return 0;
1214 }
1215
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001216 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001217 if (rc) {
1218 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1219 return rc;
1220 }
1221
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001222 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001223 if (res->u.status != CAN_ABORT_STATUS) {
1224 /* The scan abort will return 1 for success or
1225 * 2 for "failure". A failure condition can be
1226 * due to simply not being in an active scan which
1227 * can occur if we send the scan abort before we
1228 * the microcode has notified us that a scan is
1229 * completed. */
1230 IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
1231 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
1232 clear_bit(STATUS_SCAN_HW, &priv->status);
1233 }
1234
1235 dev_kfree_skb_any(cmd.meta.u.skb);
1236
1237 return rc;
1238}
1239
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001240static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
1241 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07001242 struct sk_buff *skb)
1243{
1244 return 1;
1245}
1246
1247/*
1248 * CARD_STATE_CMD
1249 *
Ben Cahill9fbab512007-11-29 11:09:47 +08001250 * Use: Sets the device's internal card state to enable, disable, or halt
Zhu Yib481de92007-09-25 17:54:57 -07001251 *
1252 * When in the 'enable' state the card operates as normal.
1253 * When in the 'disable' state, the card enters into a low power mode.
1254 * When in the 'halt' state, the card is shut down and must be fully
1255 * restarted to come back on.
1256 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001257static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
Zhu Yib481de92007-09-25 17:54:57 -07001258{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001259 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001260 .id = REPLY_CARD_STATE_CMD,
1261 .len = sizeof(u32),
1262 .data = &flags,
1263 .meta.flags = meta_flag,
1264 };
1265
1266 if (meta_flag & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001267 cmd.meta.u.callback = iwl3945_card_state_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001268
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001269 return iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001270}
1271
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001272static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
1273 struct iwl3945_cmd *cmd, struct sk_buff *skb)
Zhu Yib481de92007-09-25 17:54:57 -07001274{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001275 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001276
1277 if (!skb) {
1278 IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
1279 return 1;
1280 }
1281
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001282 res = (struct iwl3945_rx_packet *)skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001283 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1284 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1285 res->hdr.flags);
1286 return 1;
1287 }
1288
1289 switch (res->u.add_sta.status) {
1290 case ADD_STA_SUCCESS_MSK:
1291 break;
1292 default:
1293 break;
1294 }
1295
1296 /* We didn't cache the SKB; let the caller free it */
1297 return 1;
1298}
1299
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001300int iwl3945_send_add_station(struct iwl3945_priv *priv,
1301 struct iwl3945_addsta_cmd *sta, u8 flags)
Zhu Yib481de92007-09-25 17:54:57 -07001302{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001303 struct iwl3945_rx_packet *res = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07001304 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001305 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07001306 .id = REPLY_ADD_STA,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001307 .len = sizeof(struct iwl3945_addsta_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07001308 .meta.flags = flags,
1309 .data = sta,
1310 };
1311
1312 if (flags & CMD_ASYNC)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001313 cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
Zhu Yib481de92007-09-25 17:54:57 -07001314 else
1315 cmd.meta.flags |= CMD_WANT_SKB;
1316
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001317 rc = iwl3945_send_cmd(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001318
1319 if (rc || (flags & CMD_ASYNC))
1320 return rc;
1321
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001322 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07001323 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
1324 IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
1325 res->hdr.flags);
1326 rc = -EIO;
1327 }
1328
1329 if (rc == 0) {
1330 switch (res->u.add_sta.status) {
1331 case ADD_STA_SUCCESS_MSK:
1332 IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
1333 break;
1334 default:
1335 rc = -EIO;
1336 IWL_WARNING("REPLY_ADD_STA failed\n");
1337 break;
1338 }
1339 }
1340
1341 priv->alloc_rxb_skb--;
1342 dev_kfree_skb_any(cmd.meta.u.skb);
1343
1344 return rc;
1345}
1346
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001347static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001348 struct ieee80211_key_conf *keyconf,
1349 u8 sta_id)
1350{
1351 unsigned long flags;
1352 __le16 key_flags = 0;
1353
1354 switch (keyconf->alg) {
1355 case ALG_CCMP:
1356 key_flags |= STA_KEY_FLG_CCMP;
1357 key_flags |= cpu_to_le16(
1358 keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
1359 key_flags &= ~STA_KEY_FLG_INVALID;
1360 break;
1361 case ALG_TKIP:
1362 case ALG_WEP:
Zhu Yib481de92007-09-25 17:54:57 -07001363 default:
1364 return -EINVAL;
1365 }
1366 spin_lock_irqsave(&priv->sta_lock, flags);
1367 priv->stations[sta_id].keyinfo.alg = keyconf->alg;
1368 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
1369 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
1370 keyconf->keylen);
1371
1372 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
1373 keyconf->keylen);
1374 priv->stations[sta_id].sta.key.key_flags = key_flags;
1375 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1376 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1377
1378 spin_unlock_irqrestore(&priv->sta_lock, flags);
1379
1380 IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001381 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001382 return 0;
1383}
1384
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001385static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
Zhu Yib481de92007-09-25 17:54:57 -07001386{
1387 unsigned long flags;
1388
1389 spin_lock_irqsave(&priv->sta_lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001390 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
1391 memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
Zhu Yib481de92007-09-25 17:54:57 -07001392 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
1393 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
1394 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1395 spin_unlock_irqrestore(&priv->sta_lock, flags);
1396
1397 IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001398 iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
Zhu Yib481de92007-09-25 17:54:57 -07001399 return 0;
1400}
1401
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001402static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001403{
1404 struct list_head *element;
1405
1406 IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
1407 priv->frames_count);
1408
1409 while (!list_empty(&priv->free_frames)) {
1410 element = priv->free_frames.next;
1411 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001412 kfree(list_entry(element, struct iwl3945_frame, list));
Zhu Yib481de92007-09-25 17:54:57 -07001413 priv->frames_count--;
1414 }
1415
1416 if (priv->frames_count) {
1417 IWL_WARNING("%d frames still in use. Did we lose one?\n",
1418 priv->frames_count);
1419 priv->frames_count = 0;
1420 }
1421}
1422
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001423static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001424{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001425 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001426 struct list_head *element;
1427 if (list_empty(&priv->free_frames)) {
1428 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
1429 if (!frame) {
1430 IWL_ERROR("Could not allocate frame!\n");
1431 return NULL;
1432 }
1433
1434 priv->frames_count++;
1435 return frame;
1436 }
1437
1438 element = priv->free_frames.next;
1439 list_del(element);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001440 return list_entry(element, struct iwl3945_frame, list);
Zhu Yib481de92007-09-25 17:54:57 -07001441}
1442
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001443static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
Zhu Yib481de92007-09-25 17:54:57 -07001444{
1445 memset(frame, 0, sizeof(*frame));
1446 list_add(&frame->list, &priv->free_frames);
1447}
1448
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001449unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001450 struct ieee80211_hdr *hdr,
1451 const u8 *dest, int left)
1452{
1453
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001454 if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
Zhu Yib481de92007-09-25 17:54:57 -07001455 ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
1456 (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
1457 return 0;
1458
1459 if (priv->ibss_beacon->len > left)
1460 return 0;
1461
1462 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
1463
1464 return priv->ibss_beacon->len;
1465}
1466
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001467static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
Zhu Yib481de92007-09-25 17:54:57 -07001468{
1469 u8 i;
1470
1471 for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001472 i = iwl3945_rates[i].next_ieee) {
Zhu Yib481de92007-09-25 17:54:57 -07001473 if (rate_mask & (1 << i))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001474 return iwl3945_rates[i].plcp;
Zhu Yib481de92007-09-25 17:54:57 -07001475 }
1476
1477 return IWL_RATE_INVALID;
1478}
1479
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001480static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001481{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001482 struct iwl3945_frame *frame;
Zhu Yib481de92007-09-25 17:54:57 -07001483 unsigned int frame_size;
1484 int rc;
1485 u8 rate;
1486
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001487 frame = iwl3945_get_free_frame(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001488
1489 if (!frame) {
1490 IWL_ERROR("Could not obtain free frame buffer for beacon "
1491 "command.\n");
1492 return -ENOMEM;
1493 }
1494
1495 if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001496 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
Zhu Yib481de92007-09-25 17:54:57 -07001497 0xFF0);
1498 if (rate == IWL_INVALID_RATE)
1499 rate = IWL_RATE_6M_PLCP;
1500 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001501 rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
Zhu Yib481de92007-09-25 17:54:57 -07001502 if (rate == IWL_INVALID_RATE)
1503 rate = IWL_RATE_1M_PLCP;
1504 }
1505
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001506 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
Zhu Yib481de92007-09-25 17:54:57 -07001507
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001508 rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
Zhu Yib481de92007-09-25 17:54:57 -07001509 &frame->u.cmd[0]);
1510
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001511 iwl3945_free_frame(priv, frame);
Zhu Yib481de92007-09-25 17:54:57 -07001512
1513 return rc;
1514}
1515
1516/******************************************************************************
1517 *
1518 * EEPROM related functions
1519 *
1520 ******************************************************************************/
1521
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001522static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
Zhu Yib481de92007-09-25 17:54:57 -07001523{
1524 memcpy(mac, priv->eeprom.mac_address, 6);
1525}
1526
Reinette Chatre74a3a252008-01-23 10:15:19 -08001527/*
1528 * Clear the OWNER_MSK, to establish driver (instead of uCode running on
1529 * embedded controller) as EEPROM reader; each read is a series of pulses
1530 * to/from the EEPROM chip, not a single event, so even reads could conflict
1531 * if they weren't arbitrated by some ownership mechanism. Here, the driver
1532 * simply claims ownership, which should be safe when this function is called
1533 * (i.e. before loading uCode!).
1534 */
1535static inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
1536{
1537 _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
1538 return 0;
1539}
1540
Zhu Yib481de92007-09-25 17:54:57 -07001541/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001542 * iwl3945_eeprom_init - read EEPROM contents
Zhu Yib481de92007-09-25 17:54:57 -07001543 *
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001544 * Load the EEPROM contents from adapter into priv->eeprom
Zhu Yib481de92007-09-25 17:54:57 -07001545 *
1546 * NOTE: This routine uses the non-debug IO access functions.
1547 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001548int iwl3945_eeprom_init(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001549{
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001550 u16 *e = (u16 *)&priv->eeprom;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001551 u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
Zhu Yib481de92007-09-25 17:54:57 -07001552 u32 r;
1553 int sz = sizeof(priv->eeprom);
1554 int rc;
1555 int i;
1556 u16 addr;
1557
1558 /* The EEPROM structure has several padding buffers within it
1559 * and when adding new EEPROM maps is subject to programmer errors
1560 * which may be very difficult to identify without explicitly
1561 * checking the resulting size of the eeprom map. */
1562 BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
1563
1564 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
1565 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
1566 return -ENOENT;
1567 }
1568
Cahill, Ben M6440adb2007-11-29 11:09:55 +08001569 /* Make sure driver (instead of uCode) is allowed to read EEPROM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001570 rc = iwl3945_eeprom_acquire_semaphore(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001571 if (rc < 0) {
Ian Schram91e17472007-10-25 17:15:23 +08001572 IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001573 return -ENOENT;
1574 }
1575
1576 /* eeprom is an array of 16bit values */
1577 for (addr = 0; addr < sz; addr += sizeof(u16)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001578 _iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
1579 _iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
Zhu Yib481de92007-09-25 17:54:57 -07001580
1581 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
1582 i += IWL_EEPROM_ACCESS_DELAY) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001583 r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
Zhu Yib481de92007-09-25 17:54:57 -07001584 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
1585 break;
1586 udelay(IWL_EEPROM_ACCESS_DELAY);
1587 }
1588
1589 if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
1590 IWL_ERROR("Time out reading EEPROM[%d]", addr);
1591 return -ETIMEDOUT;
1592 }
Tomas Winkler58ff6d42008-02-13 02:47:54 +02001593 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
Zhu Yib481de92007-09-25 17:54:57 -07001594 }
1595
1596 return 0;
1597}
1598
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001599static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001600{
1601 if (priv->hw_setting.shared_virt)
1602 pci_free_consistent(priv->pci_dev,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001603 sizeof(struct iwl3945_shared),
Zhu Yib481de92007-09-25 17:54:57 -07001604 priv->hw_setting.shared_virt,
1605 priv->hw_setting.shared_phys);
1606}
1607
1608/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001609 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
Zhu Yib481de92007-09-25 17:54:57 -07001610 *
1611 * return : set the bit for each supported rate insert in ie
1612 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001613static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001614 u16 basic_rate, int *left)
Zhu Yib481de92007-09-25 17:54:57 -07001615{
1616 u16 ret_rates = 0, bit;
1617 int i;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001618 u8 *cnt = ie;
1619 u8 *rates = ie + 1;
Zhu Yib481de92007-09-25 17:54:57 -07001620
1621 for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
1622 if (bit & supported_rate) {
1623 ret_rates |= bit;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001624 rates[*cnt] = iwl3945_rates[i].ieee |
Tomas Winklerc7c46672007-10-18 02:04:15 +02001625 ((bit & basic_rate) ? 0x80 : 0x00);
1626 (*cnt)++;
1627 (*left)--;
1628 if ((*left <= 0) ||
1629 (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
Zhu Yib481de92007-09-25 17:54:57 -07001630 break;
1631 }
1632 }
1633
1634 return ret_rates;
1635}
1636
1637/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001638 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
Zhu Yib481de92007-09-25 17:54:57 -07001639 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001640static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07001641 struct ieee80211_mgmt *frame,
1642 int left, int is_direct)
1643{
1644 int len = 0;
1645 u8 *pos = NULL;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001646 u16 active_rates, ret_rates, cck_rates;
Zhu Yib481de92007-09-25 17:54:57 -07001647
1648 /* Make sure there is enough space for the probe request,
1649 * two mandatory IEs and the data */
1650 left -= 24;
1651 if (left < 0)
1652 return 0;
1653 len += 24;
1654
1655 frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001656 memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001657 memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001658 memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
Zhu Yib481de92007-09-25 17:54:57 -07001659 frame->seq_ctrl = 0;
1660
1661 /* fill in our indirect SSID IE */
1662 /* ...next IE... */
1663
1664 left -= 2;
1665 if (left < 0)
1666 return 0;
1667 len += 2;
1668 pos = &(frame->u.probe_req.variable[0]);
1669 *pos++ = WLAN_EID_SSID;
1670 *pos++ = 0;
1671
1672 /* fill in our direct SSID IE... */
1673 if (is_direct) {
1674 /* ...next IE... */
1675 left -= 2 + priv->essid_len;
1676 if (left < 0)
1677 return 0;
1678 /* ... fill it in... */
1679 *pos++ = WLAN_EID_SSID;
1680 *pos++ = priv->essid_len;
1681 memcpy(pos, priv->essid, priv->essid_len);
1682 pos += priv->essid_len;
1683 len += 2 + priv->essid_len;
1684 }
1685
1686 /* fill in supported rate */
1687 /* ...next IE... */
1688 left -= 2;
1689 if (left < 0)
1690 return 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001691
Zhu Yib481de92007-09-25 17:54:57 -07001692 /* ... fill it in... */
1693 *pos++ = WLAN_EID_SUPP_RATES;
1694 *pos = 0;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001695
1696 priv->active_rate = priv->rates_mask;
1697 active_rates = priv->active_rate;
Zhu Yib481de92007-09-25 17:54:57 -07001698 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1699
Tomas Winklerc7c46672007-10-18 02:04:15 +02001700 cck_rates = IWL_CCK_RATES_MASK & active_rates;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001701 ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001702 priv->active_rate_basic, &left);
1703 active_rates &= ~ret_rates;
1704
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001705 ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001706 priv->active_rate_basic, &left);
1707 active_rates &= ~ret_rates;
1708
Zhu Yib481de92007-09-25 17:54:57 -07001709 len += 2 + *pos;
1710 pos += (*pos) + 1;
Tomas Winklerc7c46672007-10-18 02:04:15 +02001711 if (active_rates == 0)
Zhu Yib481de92007-09-25 17:54:57 -07001712 goto fill_end;
1713
1714 /* fill in supported extended rate */
1715 /* ...next IE... */
1716 left -= 2;
1717 if (left < 0)
1718 return 0;
1719 /* ... fill it in... */
1720 *pos++ = WLAN_EID_EXT_SUPP_RATES;
1721 *pos = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001722 iwl3945_supported_rate_to_ie(pos, active_rates,
Tomas Winklerc7c46672007-10-18 02:04:15 +02001723 priv->active_rate_basic, &left);
Zhu Yib481de92007-09-25 17:54:57 -07001724 if (*pos > 0)
1725 len += 2 + *pos;
1726
1727 fill_end:
1728 return (u16)len;
1729}
1730
1731/*
1732 * QoS support
1733*/
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001734static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
1735 struct iwl3945_qosparam_cmd *qos)
Zhu Yib481de92007-09-25 17:54:57 -07001736{
1737
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001738 return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
1739 sizeof(struct iwl3945_qosparam_cmd), qos);
Zhu Yib481de92007-09-25 17:54:57 -07001740}
1741
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001742static void iwl3945_reset_qos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001743{
1744 u16 cw_min = 15;
1745 u16 cw_max = 1023;
1746 u8 aifs = 2;
1747 u8 is_legacy = 0;
1748 unsigned long flags;
1749 int i;
1750
1751 spin_lock_irqsave(&priv->lock, flags);
1752 priv->qos_data.qos_active = 0;
1753
1754 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
1755 if (priv->qos_data.qos_enable)
1756 priv->qos_data.qos_active = 1;
1757 if (!(priv->active_rate & 0xfff0)) {
1758 cw_min = 31;
1759 is_legacy = 1;
1760 }
1761 } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
1762 if (priv->qos_data.qos_enable)
1763 priv->qos_data.qos_active = 1;
1764 } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
1765 cw_min = 31;
1766 is_legacy = 1;
1767 }
1768
1769 if (priv->qos_data.qos_active)
1770 aifs = 3;
1771
1772 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
1773 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
1774 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
1775 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
1776 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
1777
1778 if (priv->qos_data.qos_active) {
1779 i = 1;
1780 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
1781 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
1782 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
1783 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1784 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1785
1786 i = 2;
1787 priv->qos_data.def_qos_parm.ac[i].cw_min =
1788 cpu_to_le16((cw_min + 1) / 2 - 1);
1789 priv->qos_data.def_qos_parm.ac[i].cw_max =
1790 cpu_to_le16(cw_max);
1791 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1792 if (is_legacy)
1793 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1794 cpu_to_le16(6016);
1795 else
1796 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1797 cpu_to_le16(3008);
1798 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1799
1800 i = 3;
1801 priv->qos_data.def_qos_parm.ac[i].cw_min =
1802 cpu_to_le16((cw_min + 1) / 4 - 1);
1803 priv->qos_data.def_qos_parm.ac[i].cw_max =
1804 cpu_to_le16((cw_max + 1) / 2 - 1);
1805 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
1806 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1807 if (is_legacy)
1808 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1809 cpu_to_le16(3264);
1810 else
1811 priv->qos_data.def_qos_parm.ac[i].edca_txop =
1812 cpu_to_le16(1504);
1813 } else {
1814 for (i = 1; i < 4; i++) {
1815 priv->qos_data.def_qos_parm.ac[i].cw_min =
1816 cpu_to_le16(cw_min);
1817 priv->qos_data.def_qos_parm.ac[i].cw_max =
1818 cpu_to_le16(cw_max);
1819 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
1820 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
1821 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
1822 }
1823 }
1824 IWL_DEBUG_QOS("set QoS to default \n");
1825
1826 spin_unlock_irqrestore(&priv->lock, flags);
1827}
1828
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001829static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
Zhu Yib481de92007-09-25 17:54:57 -07001830{
1831 unsigned long flags;
1832
Zhu Yib481de92007-09-25 17:54:57 -07001833 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1834 return;
1835
1836 if (!priv->qos_data.qos_enable)
1837 return;
1838
1839 spin_lock_irqsave(&priv->lock, flags);
1840 priv->qos_data.def_qos_parm.qos_flags = 0;
1841
1842 if (priv->qos_data.qos_cap.q_AP.queue_request &&
1843 !priv->qos_data.qos_cap.q_AP.txop_request)
1844 priv->qos_data.def_qos_parm.qos_flags |=
1845 QOS_PARAM_FLG_TXOP_TYPE_MSK;
1846
1847 if (priv->qos_data.qos_active)
1848 priv->qos_data.def_qos_parm.qos_flags |=
1849 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
1850
1851 spin_unlock_irqrestore(&priv->lock, flags);
1852
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001853 if (force || iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07001854 IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
1855 priv->qos_data.qos_active);
1856
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001857 iwl3945_send_qos_params_command(priv,
Zhu Yib481de92007-09-25 17:54:57 -07001858 &(priv->qos_data.def_qos_parm));
1859 }
1860}
1861
Zhu Yib481de92007-09-25 17:54:57 -07001862/*
1863 * Power management (not Tx power!) functions
1864 */
1865#define MSEC_TO_USEC 1024
1866
1867#define NOSLP __constant_cpu_to_le32(0)
1868#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
1869#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
1870#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
1871 __constant_cpu_to_le32(X1), \
1872 __constant_cpu_to_le32(X2), \
1873 __constant_cpu_to_le32(X3), \
1874 __constant_cpu_to_le32(X4)}
1875
1876
1877/* default power management (not Tx power) table values */
1878/* for tim 0-10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001879static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001880 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1881 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
1882 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
1883 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
1884 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
1885 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
1886};
1887
1888/* for tim > 10 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001889static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
Zhu Yib481de92007-09-25 17:54:57 -07001890 {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
1891 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
1892 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
1893 {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
1894 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
1895 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
1896 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
1897 {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
1898 {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
1899 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
1900};
1901
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001902int iwl3945_power_init_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001903{
1904 int rc = 0, i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001905 struct iwl3945_power_mgr *pow_data;
1906 int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
Zhu Yib481de92007-09-25 17:54:57 -07001907 u16 pci_pm;
1908
1909 IWL_DEBUG_POWER("Initialize power \n");
1910
1911 pow_data = &(priv->power_data);
1912
1913 memset(pow_data, 0, sizeof(*pow_data));
1914
1915 pow_data->active_index = IWL_POWER_RANGE_0;
1916 pow_data->dtim_val = 0xffff;
1917
1918 memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
1919 memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
1920
1921 rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
1922 if (rc != 0)
1923 return 0;
1924 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001925 struct iwl3945_powertable_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07001926
1927 IWL_DEBUG_POWER("adjust power command flags\n");
1928
1929 for (i = 0; i < IWL_POWER_AC; i++) {
1930 cmd = &pow_data->pwr_range_0[i].cmd;
1931
1932 if (pci_pm & 0x1)
1933 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
1934 else
1935 cmd->flags |= IWL_POWER_PCI_PM_MSK;
1936 }
1937 }
1938 return rc;
1939}
1940
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001941static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
1942 struct iwl3945_powertable_cmd *cmd, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07001943{
1944 int rc = 0, i;
1945 u8 skip;
1946 u32 max_sleep = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001947 struct iwl3945_power_vec_entry *range;
Zhu Yib481de92007-09-25 17:54:57 -07001948 u8 period = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001949 struct iwl3945_power_mgr *pow_data;
Zhu Yib481de92007-09-25 17:54:57 -07001950
1951 if (mode > IWL_POWER_INDEX_5) {
1952 IWL_DEBUG_POWER("Error invalid power mode \n");
1953 return -1;
1954 }
1955 pow_data = &(priv->power_data);
1956
1957 if (pow_data->active_index == IWL_POWER_RANGE_0)
1958 range = &pow_data->pwr_range_0[0];
1959 else
1960 range = &pow_data->pwr_range_1[1];
1961
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001962 memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
Zhu Yib481de92007-09-25 17:54:57 -07001963
1964#ifdef IWL_MAC80211_DISABLE
1965 if (priv->assoc_network != NULL) {
1966 unsigned long flags;
1967
1968 period = priv->assoc_network->tim.tim_period;
1969 }
1970#endif /*IWL_MAC80211_DISABLE */
1971 skip = range[mode].no_dtim;
1972
1973 if (period == 0) {
1974 period = 1;
1975 skip = 0;
1976 }
1977
1978 if (skip == 0) {
1979 max_sleep = period;
1980 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
1981 } else {
1982 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
1983 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
1984 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
1985 }
1986
1987 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
1988 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
1989 cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
1990 }
1991
1992 IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
1993 IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1994 IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1995 IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1996 le32_to_cpu(cmd->sleep_interval[0]),
1997 le32_to_cpu(cmd->sleep_interval[1]),
1998 le32_to_cpu(cmd->sleep_interval[2]),
1999 le32_to_cpu(cmd->sleep_interval[3]),
2000 le32_to_cpu(cmd->sleep_interval[4]));
2001
2002 return rc;
2003}
2004
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002005static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
Zhu Yib481de92007-09-25 17:54:57 -07002006{
John W. Linville9a62f732007-11-15 16:27:36 -05002007 u32 uninitialized_var(final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002008 int rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002009 struct iwl3945_powertable_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -07002010
2011 /* If on battery, set to 3,
Ian Schram01ebd062007-10-25 17:15:22 +08002012 * if plugged into AC power, set to CAM ("continuously aware mode"),
Zhu Yib481de92007-09-25 17:54:57 -07002013 * else user level */
2014 switch (mode) {
2015 case IWL_POWER_BATTERY:
2016 final_mode = IWL_POWER_INDEX_3;
2017 break;
2018 case IWL_POWER_AC:
2019 final_mode = IWL_POWER_MODE_CAM;
2020 break;
2021 default:
2022 final_mode = mode;
2023 break;
2024 }
2025
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002026 iwl3945_update_power_cmd(priv, &cmd, final_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002027
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002028 rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07002029
2030 if (final_mode == IWL_POWER_MODE_CAM)
2031 clear_bit(STATUS_POWER_PMI, &priv->status);
2032 else
2033 set_bit(STATUS_POWER_PMI, &priv->status);
2034
2035 return rc;
2036}
2037
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002038int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002039{
2040 /* Filter incoming packets to determine if they are targeted toward
2041 * this network, discarding packets coming from ourselves */
2042 switch (priv->iw_mode) {
2043 case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
2044 /* packets from our adapter are dropped (echo) */
2045 if (!compare_ether_addr(header->addr2, priv->mac_addr))
2046 return 0;
2047 /* {broad,multi}cast packets to our IBSS go through */
2048 if (is_multicast_ether_addr(header->addr1))
2049 return !compare_ether_addr(header->addr3, priv->bssid);
2050 /* packets to our adapter go through */
2051 return !compare_ether_addr(header->addr1, priv->mac_addr);
2052 case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
2053 /* packets from our adapter are dropped (echo) */
2054 if (!compare_ether_addr(header->addr3, priv->mac_addr))
2055 return 0;
2056 /* {broad,multi}cast packets to our BSS go through */
2057 if (is_multicast_ether_addr(header->addr1))
2058 return !compare_ether_addr(header->addr2, priv->bssid);
2059 /* packets to our adapter go through */
2060 return !compare_ether_addr(header->addr1, priv->mac_addr);
2061 }
2062
2063 return 1;
2064}
2065
Zhu Yib481de92007-09-25 17:54:57 -07002066/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002067 * iwl3945_scan_cancel - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002068 *
2069 * NOTE: priv->mutex is not required before calling this function
2070 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002071static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002072{
2073 if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
2074 clear_bit(STATUS_SCANNING, &priv->status);
2075 return 0;
2076 }
2077
2078 if (test_bit(STATUS_SCANNING, &priv->status)) {
2079 if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2080 IWL_DEBUG_SCAN("Queuing scan abort.\n");
2081 set_bit(STATUS_SCAN_ABORTING, &priv->status);
2082 queue_work(priv->workqueue, &priv->abort_scan);
2083
2084 } else
2085 IWL_DEBUG_SCAN("Scan abort already in progress.\n");
2086
2087 return test_bit(STATUS_SCANNING, &priv->status);
2088 }
2089
2090 return 0;
2091}
2092
2093/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002094 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
Zhu Yib481de92007-09-25 17:54:57 -07002095 * @ms: amount of time to wait (in milliseconds) for scan to abort
2096 *
2097 * NOTE: priv->mutex must be held before calling this function
2098 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002099static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
Zhu Yib481de92007-09-25 17:54:57 -07002100{
2101 unsigned long now = jiffies;
2102 int ret;
2103
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002104 ret = iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002105 if (ret && ms) {
2106 mutex_unlock(&priv->mutex);
2107 while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
2108 test_bit(STATUS_SCANNING, &priv->status))
2109 msleep(1);
2110 mutex_lock(&priv->mutex);
2111
2112 return test_bit(STATUS_SCANNING, &priv->status);
2113 }
2114
2115 return ret;
2116}
2117
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002118static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002119{
2120 /* Reset ieee stats */
2121
2122 /* We don't reset the net_device_stats (ieee->stats) on
2123 * re-association */
2124
2125 priv->last_seq_num = -1;
2126 priv->last_frag_num = -1;
2127 priv->last_packet_time = 0;
2128
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002129 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002130}
2131
2132#define MAX_UCODE_BEACON_INTERVAL 1024
2133#define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
2134
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002135static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
Zhu Yib481de92007-09-25 17:54:57 -07002136{
2137 u16 new_val = 0;
2138 u16 beacon_factor = 0;
2139
2140 beacon_factor =
2141 (beacon_val + MAX_UCODE_BEACON_INTERVAL)
2142 / MAX_UCODE_BEACON_INTERVAL;
2143 new_val = beacon_val / beacon_factor;
2144
2145 return cpu_to_le16(new_val);
2146}
2147
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002148static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002149{
2150 u64 interval_tm_unit;
2151 u64 tsf, result;
2152 unsigned long flags;
2153 struct ieee80211_conf *conf = NULL;
2154 u16 beacon_int = 0;
2155
2156 conf = ieee80211_get_hw_conf(priv->hw);
2157
2158 spin_lock_irqsave(&priv->lock, flags);
2159 priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
2160 priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
2161
2162 priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
2163
2164 tsf = priv->timestamp1;
2165 tsf = ((tsf << 32) | priv->timestamp0);
2166
2167 beacon_int = priv->beacon_int;
2168 spin_unlock_irqrestore(&priv->lock, flags);
2169
2170 if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
2171 if (beacon_int == 0) {
2172 priv->rxon_timing.beacon_interval = cpu_to_le16(100);
2173 priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
2174 } else {
2175 priv->rxon_timing.beacon_interval =
2176 cpu_to_le16(beacon_int);
2177 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002178 iwl3945_adjust_beacon_interval(
Zhu Yib481de92007-09-25 17:54:57 -07002179 le16_to_cpu(priv->rxon_timing.beacon_interval));
2180 }
2181
2182 priv->rxon_timing.atim_window = 0;
2183 } else {
2184 priv->rxon_timing.beacon_interval =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002185 iwl3945_adjust_beacon_interval(conf->beacon_int);
Zhu Yib481de92007-09-25 17:54:57 -07002186 /* TODO: we need to get atim_window from upper stack
2187 * for now we set to 0 */
2188 priv->rxon_timing.atim_window = 0;
2189 }
2190
2191 interval_tm_unit =
2192 (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
2193 result = do_div(tsf, interval_tm_unit);
2194 priv->rxon_timing.beacon_init_val =
2195 cpu_to_le32((u32) ((u64) interval_tm_unit - result));
2196
2197 IWL_DEBUG_ASSOC
2198 ("beacon interval %d beacon timer %d beacon tim %d\n",
2199 le16_to_cpu(priv->rxon_timing.beacon_interval),
2200 le32_to_cpu(priv->rxon_timing.beacon_init_val),
2201 le16_to_cpu(priv->rxon_timing.atim_window));
2202}
2203
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002204static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002205{
2206 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
2207 IWL_ERROR("APs don't scan.\n");
2208 return 0;
2209 }
2210
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002211 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002212 IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
2213 return -EIO;
2214 }
2215
2216 if (test_bit(STATUS_SCANNING, &priv->status)) {
2217 IWL_DEBUG_SCAN("Scan already in progress.\n");
2218 return -EAGAIN;
2219 }
2220
2221 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
2222 IWL_DEBUG_SCAN("Scan request while abort pending. "
2223 "Queuing.\n");
2224 return -EAGAIN;
2225 }
2226
2227 IWL_DEBUG_INFO("Starting scan...\n");
2228 priv->scan_bands = 2;
2229 set_bit(STATUS_SCANNING, &priv->status);
2230 priv->scan_start = jiffies;
2231 priv->scan_pass_start = priv->scan_start;
2232
2233 queue_work(priv->workqueue, &priv->request_scan);
2234
2235 return 0;
2236}
2237
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002238static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
Zhu Yib481de92007-09-25 17:54:57 -07002239{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002240 struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
Zhu Yib481de92007-09-25 17:54:57 -07002241
2242 if (hw_decrypt)
2243 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
2244 else
2245 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
2246
2247 return 0;
2248}
2249
Johannes Berg8318d782008-01-24 19:38:38 +01002250static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv,
2251 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07002252{
Johannes Berg8318d782008-01-24 19:38:38 +01002253 if (band == IEEE80211_BAND_5GHZ) {
Zhu Yib481de92007-09-25 17:54:57 -07002254 priv->staging_rxon.flags &=
2255 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
2256 | RXON_FLG_CCK_MSK);
2257 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2258 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002259 /* Copied from iwl3945_bg_post_associate() */
Zhu Yib481de92007-09-25 17:54:57 -07002260 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
2261 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
2262 else
2263 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2264
2265 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
2266 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2267
2268 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
2269 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
2270 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
2271 }
2272}
2273
2274/*
Ian Schram01ebd062007-10-25 17:15:22 +08002275 * initialize rxon structure with default values from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07002276 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002277static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002278{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002279 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002280
2281 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
2282
2283 switch (priv->iw_mode) {
2284 case IEEE80211_IF_TYPE_AP:
2285 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
2286 break;
2287
2288 case IEEE80211_IF_TYPE_STA:
2289 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
2290 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
2291 break;
2292
2293 case IEEE80211_IF_TYPE_IBSS:
2294 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
2295 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
2296 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
2297 RXON_FILTER_ACCEPT_GRP_MSK;
2298 break;
2299
2300 case IEEE80211_IF_TYPE_MNTR:
2301 priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
2302 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2303 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2304 break;
2305 }
2306
2307#if 0
2308 /* TODO: Figure out when short_preamble would be set and cache from
2309 * that */
2310 if (!hw_to_local(priv->hw)->short_preamble)
2311 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2312 else
2313 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2314#endif
2315
Johannes Berg8318d782008-01-24 19:38:38 +01002316 ch_info = iwl3945_get_channel_info(priv, priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002317 le16_to_cpu(priv->staging_rxon.channel));
2318
2319 if (!ch_info)
2320 ch_info = &priv->channel_info[0];
2321
2322 /*
2323 * in some case A channels are all non IBSS
2324 * in this case force B/G channel
2325 */
2326 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
2327 !(is_channel_ibss(ch_info)))
2328 ch_info = &priv->channel_info[0];
2329
2330 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
2331 if (is_channel_a_band(ch_info))
Johannes Berg8318d782008-01-24 19:38:38 +01002332 priv->band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002333 else
Johannes Berg8318d782008-01-24 19:38:38 +01002334 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07002335
Johannes Berg8318d782008-01-24 19:38:38 +01002336 iwl3945_set_flags_for_phymode(priv, priv->band);
Zhu Yib481de92007-09-25 17:54:57 -07002337
2338 priv->staging_rxon.ofdm_basic_rates =
2339 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2340 priv->staging_rxon.cck_basic_rates =
2341 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2342}
2343
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002344static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
Zhu Yib481de92007-09-25 17:54:57 -07002345{
Zhu Yib481de92007-09-25 17:54:57 -07002346 if (mode == IEEE80211_IF_TYPE_IBSS) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002347 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07002348
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002349 ch_info = iwl3945_get_channel_info(priv,
Johannes Berg8318d782008-01-24 19:38:38 +01002350 priv->band,
Zhu Yib481de92007-09-25 17:54:57 -07002351 le16_to_cpu(priv->staging_rxon.channel));
2352
2353 if (!ch_info || !is_channel_ibss(ch_info)) {
2354 IWL_ERROR("channel %d not IBSS channel\n",
2355 le16_to_cpu(priv->staging_rxon.channel));
2356 return -EINVAL;
2357 }
2358 }
2359
Zhu Yib481de92007-09-25 17:54:57 -07002360 priv->iw_mode = mode;
2361
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002362 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002363 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2364
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002365 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002366
Mohamed Abbasfde35712007-11-29 11:10:15 +08002367 /* dont commit rxon if rf-kill is on*/
2368 if (!iwl3945_is_ready_rf(priv))
2369 return -EAGAIN;
2370
2371 cancel_delayed_work(&priv->scan_check);
2372 if (iwl3945_scan_cancel_timeout(priv, 100)) {
2373 IWL_WARNING("Aborted scan still in progress after 100ms\n");
2374 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
2375 return -EAGAIN;
2376 }
2377
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002378 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002379
2380 return 0;
2381}
2382
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002383static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002384 struct ieee80211_tx_control *ctl,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002385 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002386 struct sk_buff *skb_frag,
2387 int last_frag)
2388{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002389 struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
Zhu Yib481de92007-09-25 17:54:57 -07002390
2391 switch (keyinfo->alg) {
2392 case ALG_CCMP:
2393 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
2394 memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
2395 IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
2396 break;
2397
2398 case ALG_TKIP:
2399#if 0
2400 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
2401
2402 if (last_frag)
2403 memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
2404 8);
2405 else
2406 memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
2407#endif
2408 break;
2409
2410 case ALG_WEP:
2411 cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
2412 (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
2413
2414 if (keyinfo->keylen == 13)
2415 cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
2416
2417 memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
2418
2419 IWL_DEBUG_TX("Configuring packet for WEP encryption "
2420 "with key %d\n", ctl->key_idx);
2421 break;
2422
Zhu Yib481de92007-09-25 17:54:57 -07002423 default:
2424 printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
2425 break;
2426 }
2427}
2428
2429/*
2430 * handle build REPLY_TX command notification.
2431 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002432static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2433 struct iwl3945_cmd *cmd,
Zhu Yib481de92007-09-25 17:54:57 -07002434 struct ieee80211_tx_control *ctrl,
2435 struct ieee80211_hdr *hdr,
2436 int is_unicast, u8 std_id)
2437{
2438 __le16 *qc;
2439 u16 fc = le16_to_cpu(hdr->frame_control);
2440 __le32 tx_flags = cmd->cmd.tx.tx_flags;
2441
2442 cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2443 if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
2444 tx_flags |= TX_CMD_FLG_ACK_MSK;
2445 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
2446 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2447 if (ieee80211_is_probe_response(fc) &&
2448 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
2449 tx_flags |= TX_CMD_FLG_TSF_MSK;
2450 } else {
2451 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
2452 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2453 }
2454
2455 cmd->cmd.tx.sta_id = std_id;
2456 if (ieee80211_get_morefrag(hdr))
2457 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
2458
2459 qc = ieee80211_get_qos_ctrl(hdr);
2460 if (qc) {
2461 cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
2462 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
2463 } else
2464 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
2465
2466 if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
2467 tx_flags |= TX_CMD_FLG_RTS_MSK;
2468 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
2469 } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
2470 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2471 tx_flags |= TX_CMD_FLG_CTS_MSK;
2472 }
2473
2474 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
2475 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
2476
2477 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
2478 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2479 if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
2480 (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
Ian Schrambc434dd2007-10-25 17:15:29 +08002481 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
Zhu Yib481de92007-09-25 17:54:57 -07002482 else
Ian Schrambc434dd2007-10-25 17:15:29 +08002483 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
Zhu Yib481de92007-09-25 17:54:57 -07002484 } else
2485 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2486
2487 cmd->cmd.tx.driver_txop = 0;
2488 cmd->cmd.tx.tx_flags = tx_flags;
2489 cmd->cmd.tx.next_frame_len = 0;
2490}
2491
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002492/**
2493 * iwl3945_get_sta_id - Find station's index within station table
2494 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002495static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
Zhu Yib481de92007-09-25 17:54:57 -07002496{
2497 int sta_id;
2498 u16 fc = le16_to_cpu(hdr->frame_control);
2499
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002500 /* If this frame is broadcast or management, use broadcast station id */
Zhu Yib481de92007-09-25 17:54:57 -07002501 if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
2502 is_multicast_ether_addr(hdr->addr1))
2503 return priv->hw_setting.bcast_sta_id;
2504
2505 switch (priv->iw_mode) {
2506
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002507 /* If we are a client station in a BSS network, use the special
2508 * AP station entry (that's the only station we communicate with) */
Zhu Yib481de92007-09-25 17:54:57 -07002509 case IEEE80211_IF_TYPE_STA:
2510 return IWL_AP_ID;
2511
2512 /* If we are an AP, then find the station, or use BCAST */
2513 case IEEE80211_IF_TYPE_AP:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002514 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002515 if (sta_id != IWL_INVALID_STATION)
2516 return sta_id;
2517 return priv->hw_setting.bcast_sta_id;
2518
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002519 /* If this frame is going out to an IBSS network, find the station,
2520 * or create a new station table entry */
Joe Perches0795af52007-10-03 17:59:30 -07002521 case IEEE80211_IF_TYPE_IBSS: {
2522 DECLARE_MAC_BUF(mac);
2523
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002524 /* Create new station table entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002525 sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
Zhu Yib481de92007-09-25 17:54:57 -07002526 if (sta_id != IWL_INVALID_STATION)
2527 return sta_id;
2528
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002529 sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
Zhu Yib481de92007-09-25 17:54:57 -07002530
2531 if (sta_id != IWL_INVALID_STATION)
2532 return sta_id;
2533
Joe Perches0795af52007-10-03 17:59:30 -07002534 IWL_DEBUG_DROP("Station %s not in station map. "
Zhu Yib481de92007-09-25 17:54:57 -07002535 "Defaulting to broadcast...\n",
Joe Perches0795af52007-10-03 17:59:30 -07002536 print_mac(mac, hdr->addr1));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002537 iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
Zhu Yib481de92007-09-25 17:54:57 -07002538 return priv->hw_setting.bcast_sta_id;
Joe Perches0795af52007-10-03 17:59:30 -07002539 }
Zhu Yib481de92007-09-25 17:54:57 -07002540 default:
Ian Schram01ebd062007-10-25 17:15:22 +08002541 IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07002542 return priv->hw_setting.bcast_sta_id;
2543 }
2544}
2545
2546/*
2547 * start REPLY_TX command process
2548 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002549static int iwl3945_tx_skb(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07002550 struct sk_buff *skb, struct ieee80211_tx_control *ctl)
2551{
2552 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002553 struct iwl3945_tfd_frame *tfd;
Zhu Yib481de92007-09-25 17:54:57 -07002554 u32 *control_flags;
2555 int txq_id = ctl->queue;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002556 struct iwl3945_tx_queue *txq = NULL;
2557 struct iwl3945_queue *q = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002558 dma_addr_t phys_addr;
2559 dma_addr_t txcmd_phys;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002560 struct iwl3945_cmd *out_cmd = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002561 u16 len, idx, len_org;
2562 u8 id, hdr_len, unicast;
2563 u8 sta_id;
2564 u16 seq_number = 0;
2565 u16 fc;
2566 __le16 *qc;
2567 u8 wait_write_ptr = 0;
2568 unsigned long flags;
2569 int rc;
2570
2571 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002572 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07002573 IWL_DEBUG_DROP("Dropping - RF KILL\n");
2574 goto drop_unlock;
2575 }
2576
Johannes Berg32bfd352007-12-19 01:31:26 +01002577 if (!priv->vif) {
2578 IWL_DEBUG_DROP("Dropping - !priv->vif\n");
Zhu Yib481de92007-09-25 17:54:57 -07002579 goto drop_unlock;
2580 }
2581
Johannes Berg8318d782008-01-24 19:38:38 +01002582 if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
Zhu Yib481de92007-09-25 17:54:57 -07002583 IWL_ERROR("ERROR: No TX rate available.\n");
2584 goto drop_unlock;
2585 }
2586
2587 unicast = !is_multicast_ether_addr(hdr->addr1);
2588 id = 0;
2589
2590 fc = le16_to_cpu(hdr->frame_control);
2591
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002592#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07002593 if (ieee80211_is_auth(fc))
2594 IWL_DEBUG_TX("Sending AUTH frame\n");
2595 else if (ieee80211_is_assoc_request(fc))
2596 IWL_DEBUG_TX("Sending ASSOC frame\n");
2597 else if (ieee80211_is_reassoc_request(fc))
2598 IWL_DEBUG_TX("Sending REASSOC frame\n");
2599#endif
2600
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08002601 /* drop all data frame if we are not associated */
Reinette Chatrea6477242008-02-14 10:40:28 -08002602 if ((!iwl3945_is_associated(priv) ||
2603 ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id)) &&
Zhu Yib481de92007-09-25 17:54:57 -07002604 ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002605 IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
Zhu Yib481de92007-09-25 17:54:57 -07002606 goto drop_unlock;
2607 }
2608
2609 spin_unlock_irqrestore(&priv->lock, flags);
2610
2611 hdr_len = ieee80211_get_hdrlen(fc);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002612
2613 /* Find (or create) index into station table for destination station */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002614 sta_id = iwl3945_get_sta_id(priv, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002615 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07002616 DECLARE_MAC_BUF(mac);
2617
2618 IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
2619 print_mac(mac, hdr->addr1));
Zhu Yib481de92007-09-25 17:54:57 -07002620 goto drop;
2621 }
2622
2623 IWL_DEBUG_RATE("station Id %d\n", sta_id);
2624
2625 qc = ieee80211_get_qos_ctrl(hdr);
2626 if (qc) {
2627 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2628 seq_number = priv->stations[sta_id].tid[tid].seq_number &
2629 IEEE80211_SCTL_SEQ;
2630 hdr->seq_ctrl = cpu_to_le16(seq_number) |
2631 (hdr->seq_ctrl &
2632 __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
2633 seq_number += 0x10;
2634 }
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002635
2636 /* Descriptor for chosen Tx queue */
Zhu Yib481de92007-09-25 17:54:57 -07002637 txq = &priv->txq[txq_id];
2638 q = &txq->q;
2639
2640 spin_lock_irqsave(&priv->lock, flags);
2641
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002642 /* Set up first empty TFD within this queue's circular TFD buffer */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002643 tfd = &txq->bd[q->write_ptr];
Zhu Yib481de92007-09-25 17:54:57 -07002644 memset(tfd, 0, sizeof(*tfd));
2645 control_flags = (u32 *) tfd;
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002646 idx = get_cmd_index(q, q->write_ptr, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002647
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002648 /* Set up driver data for this TFD */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002649 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002650 txq->txb[q->write_ptr].skb[0] = skb;
2651 memcpy(&(txq->txb[q->write_ptr].status.control),
Zhu Yib481de92007-09-25 17:54:57 -07002652 ctl, sizeof(struct ieee80211_tx_control));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002653
2654 /* Init first empty entry in queue's array of Tx/cmd buffers */
Zhu Yib481de92007-09-25 17:54:57 -07002655 out_cmd = &txq->cmd[idx];
2656 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
2657 memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002658
2659 /*
2660 * Set up the Tx-command (not MAC!) header.
2661 * Store the chosen Tx queue and TFD index within the sequence field;
2662 * after Tx, uCode's Tx response will return this value so driver can
2663 * locate the frame within the tx queue and do post-tx processing.
2664 */
Zhu Yib481de92007-09-25 17:54:57 -07002665 out_cmd->hdr.cmd = REPLY_TX;
2666 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
Tomas Winklerfc4b6852007-10-25 17:15:24 +08002667 INDEX_TO_SEQ(q->write_ptr)));
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002668
2669 /* Copy MAC header from skb into command buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002670 memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
2671
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002672 /*
2673 * Use the first empty entry in this queue's command buffer array
2674 * to contain the Tx command and MAC header concatenated together
2675 * (payload data will be in another buffer).
2676 * Size of this varies, due to varying MAC header length.
2677 * If end is not dword aligned, we'll have 2 extra bytes at the end
2678 * of the MAC header (device reads on dword boundaries).
2679 * We'll tell device about this padding later.
2680 */
Zhu Yib481de92007-09-25 17:54:57 -07002681 len = priv->hw_setting.tx_cmd_len +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002682 sizeof(struct iwl3945_cmd_header) + hdr_len;
Zhu Yib481de92007-09-25 17:54:57 -07002683
2684 len_org = len;
2685 len = (len + 3) & ~3;
2686
2687 if (len_org != len)
2688 len_org = 1;
2689 else
2690 len_org = 0;
2691
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002692 /* Physical address of this Tx command's header (not MAC header!),
2693 * within command buffer array. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002694 txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
2695 offsetof(struct iwl3945_cmd, hdr);
Zhu Yib481de92007-09-25 17:54:57 -07002696
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002697 /* Add buffer containing Tx command and MAC(!) header to TFD's
2698 * first entry */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002699 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
Zhu Yib481de92007-09-25 17:54:57 -07002700
2701 if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002702 iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002703
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002704 /* Set up TFD's 2nd entry to point directly to remainder of skb,
2705 * if any (802.11 null frames have no payload). */
Zhu Yib481de92007-09-25 17:54:57 -07002706 len = skb->len - hdr_len;
2707 if (len) {
2708 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
2709 len, PCI_DMA_TODEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002710 iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
Zhu Yib481de92007-09-25 17:54:57 -07002711 }
2712
Zhu Yib481de92007-09-25 17:54:57 -07002713 if (!len)
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002714 /* If there is no payload, then we use only one Tx buffer */
Zhu Yib481de92007-09-25 17:54:57 -07002715 *control_flags = TFD_CTL_COUNT_SET(1);
2716 else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002717 /* Else use 2 buffers.
2718 * Tell 3945 about any padding after MAC header */
Zhu Yib481de92007-09-25 17:54:57 -07002719 *control_flags = TFD_CTL_COUNT_SET(2) |
2720 TFD_CTL_PAD_SET(U32_PAD(len));
2721
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002722 /* Total # bytes to be transmitted */
Zhu Yib481de92007-09-25 17:54:57 -07002723 len = (u16)skb->len;
2724 out_cmd->cmd.tx.len = cpu_to_le16(len);
2725
2726 /* TODO need this for burst mode later on */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002727 iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07002728
2729 /* set is_hcca to 0; it probably will never be implemented */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002730 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002731
2732 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
2733 out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
2734
2735 if (!ieee80211_get_morefrag(hdr)) {
2736 txq->need_update = 1;
2737 if (qc) {
2738 u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
2739 priv->stations[sta_id].tid[tid].seq_number = seq_number;
2740 }
2741 } else {
2742 wait_write_ptr = 1;
2743 txq->need_update = 0;
2744 }
2745
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002746 iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
Zhu Yib481de92007-09-25 17:54:57 -07002747 sizeof(out_cmd->cmd.tx));
2748
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002749 iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
Zhu Yib481de92007-09-25 17:54:57 -07002750 ieee80211_get_hdrlen(fc));
2751
Cahill, Ben M6440adb2007-11-29 11:09:55 +08002752 /* Tell device the write index *just past* this latest filled TFD */
Tomas Winklerc54b6792008-03-06 17:36:53 -08002753 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002754 rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002755 spin_unlock_irqrestore(&priv->lock, flags);
2756
2757 if (rc)
2758 return rc;
2759
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002760 if ((iwl3945_queue_space(q) < q->high_mark)
Zhu Yib481de92007-09-25 17:54:57 -07002761 && priv->mac80211_registered) {
2762 if (wait_write_ptr) {
2763 spin_lock_irqsave(&priv->lock, flags);
2764 txq->need_update = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002765 iwl3945_tx_queue_update_write_ptr(priv, txq);
Zhu Yib481de92007-09-25 17:54:57 -07002766 spin_unlock_irqrestore(&priv->lock, flags);
2767 }
2768
2769 ieee80211_stop_queue(priv->hw, ctl->queue);
2770 }
2771
2772 return 0;
2773
2774drop_unlock:
2775 spin_unlock_irqrestore(&priv->lock, flags);
2776drop:
2777 return -1;
2778}
2779
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002780static void iwl3945_set_rate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002781{
Johannes Berg8318d782008-01-24 19:38:38 +01002782 const struct ieee80211_supported_band *sband = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002783 struct ieee80211_rate *rate;
2784 int i;
2785
Johannes Berg8318d782008-01-24 19:38:38 +01002786 sband = iwl3945_get_band(priv, priv->band);
2787 if (!sband) {
Saleem Abdulrasoolc4ba9622007-11-18 23:59:08 -08002788 IWL_ERROR("Failed to set rate: unable to get hw mode\n");
2789 return;
2790 }
Zhu Yib481de92007-09-25 17:54:57 -07002791
2792 priv->active_rate = 0;
2793 priv->active_rate_basic = 0;
2794
Johannes Berg8318d782008-01-24 19:38:38 +01002795 IWL_DEBUG_RATE("Setting rates for %s GHz\n",
2796 sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
Zhu Yib481de92007-09-25 17:54:57 -07002797
Johannes Berg8318d782008-01-24 19:38:38 +01002798 for (i = 0; i < sband->n_bitrates; i++) {
2799 rate = &sband->bitrates[i];
2800 if ((rate->hw_value < IWL_RATE_COUNT) &&
2801 !(rate->flags & IEEE80211_CHAN_DISABLED)) {
2802 IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
2803 rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
2804 priv->active_rate |= (1 << rate->hw_value);
2805 }
Zhu Yib481de92007-09-25 17:54:57 -07002806 }
2807
2808 IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
2809 priv->active_rate, priv->active_rate_basic);
2810
2811 /*
2812 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
2813 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
2814 * OFDM
2815 */
2816 if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
2817 priv->staging_rxon.cck_basic_rates =
2818 ((priv->active_rate_basic &
2819 IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
2820 else
2821 priv->staging_rxon.cck_basic_rates =
2822 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
2823
2824 if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
2825 priv->staging_rxon.ofdm_basic_rates =
2826 ((priv->active_rate_basic &
2827 (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
2828 IWL_FIRST_OFDM_RATE) & 0xFF;
2829 else
2830 priv->staging_rxon.ofdm_basic_rates =
2831 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2832}
2833
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002834static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
Zhu Yib481de92007-09-25 17:54:57 -07002835{
2836 unsigned long flags;
2837
2838 if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
2839 return;
2840
2841 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
2842 disable_radio ? "OFF" : "ON");
2843
2844 if (disable_radio) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002845 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002846 /* FIXME: This is a workaround for AP */
2847 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2848 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002849 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07002850 CSR_UCODE_SW_BIT_RFKILL);
2851 spin_unlock_irqrestore(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002852 iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
Zhu Yib481de92007-09-25 17:54:57 -07002853 set_bit(STATUS_RF_KILL_SW, &priv->status);
2854 }
2855 return;
2856 }
2857
2858 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002859 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07002860
2861 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2862 spin_unlock_irqrestore(&priv->lock, flags);
2863
2864 /* wake up ucode */
2865 msleep(10);
2866
2867 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002868 iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
2869 if (!iwl3945_grab_nic_access(priv))
2870 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07002871 spin_unlock_irqrestore(&priv->lock, flags);
2872
2873 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
2874 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
2875 "disabled by HW switch\n");
2876 return;
2877 }
2878
2879 queue_work(priv->workqueue, &priv->restart);
2880 return;
2881}
2882
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002883void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07002884 u32 decrypt_res, struct ieee80211_rx_status *stats)
2885{
2886 u16 fc =
2887 le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
2888
2889 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2890 return;
2891
2892 if (!(fc & IEEE80211_FCTL_PROTECTED))
2893 return;
2894
2895 IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
2896 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2897 case RX_RES_STATUS_SEC_TYPE_TKIP:
2898 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2899 RX_RES_STATUS_BAD_ICV_MIC)
2900 stats->flag |= RX_FLAG_MMIC_ERROR;
2901 case RX_RES_STATUS_SEC_TYPE_WEP:
2902 case RX_RES_STATUS_SEC_TYPE_CCMP:
2903 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2904 RX_RES_STATUS_DECRYPT_OK) {
2905 IWL_DEBUG_RX("hw decrypt successfully!!!\n");
2906 stats->flag |= RX_FLAG_DECRYPTED;
2907 }
2908 break;
2909
2910 default:
2911 break;
2912 }
2913}
2914
Zhu Yib481de92007-09-25 17:54:57 -07002915#define IWL_PACKET_RETRY_TIME HZ
2916
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002917int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
Zhu Yib481de92007-09-25 17:54:57 -07002918{
2919 u16 sc = le16_to_cpu(header->seq_ctrl);
2920 u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
2921 u16 frag = sc & IEEE80211_SCTL_FRAG;
2922 u16 *last_seq, *last_frag;
2923 unsigned long *last_time;
2924
2925 switch (priv->iw_mode) {
2926 case IEEE80211_IF_TYPE_IBSS:{
2927 struct list_head *p;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002928 struct iwl3945_ibss_seq *entry = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07002929 u8 *mac = header->addr2;
2930 int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
2931
2932 __list_for_each(p, &priv->ibss_mac_hash[index]) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002933 entry = list_entry(p, struct iwl3945_ibss_seq, list);
Zhu Yib481de92007-09-25 17:54:57 -07002934 if (!compare_ether_addr(entry->mac, mac))
2935 break;
2936 }
2937 if (p == &priv->ibss_mac_hash[index]) {
2938 entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
2939 if (!entry) {
Ian Schrambc434dd2007-10-25 17:15:29 +08002940 IWL_ERROR("Cannot malloc new mac entry\n");
Zhu Yib481de92007-09-25 17:54:57 -07002941 return 0;
2942 }
2943 memcpy(entry->mac, mac, ETH_ALEN);
2944 entry->seq_num = seq;
2945 entry->frag_num = frag;
2946 entry->packet_time = jiffies;
Ian Schrambc434dd2007-10-25 17:15:29 +08002947 list_add(&entry->list, &priv->ibss_mac_hash[index]);
Zhu Yib481de92007-09-25 17:54:57 -07002948 return 0;
2949 }
2950 last_seq = &entry->seq_num;
2951 last_frag = &entry->frag_num;
2952 last_time = &entry->packet_time;
2953 break;
2954 }
2955 case IEEE80211_IF_TYPE_STA:
2956 last_seq = &priv->last_seq_num;
2957 last_frag = &priv->last_frag_num;
2958 last_time = &priv->last_packet_time;
2959 break;
2960 default:
2961 return 0;
2962 }
2963 if ((*last_seq == seq) &&
2964 time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
2965 if (*last_frag == frag)
2966 goto drop;
2967 if (*last_frag + 1 != frag)
2968 /* out-of-order fragment */
2969 goto drop;
2970 } else
2971 *last_seq = seq;
2972
2973 *last_frag = frag;
2974 *last_time = jiffies;
2975 return 0;
2976
2977 drop:
2978 return 1;
2979}
2980
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08002981#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07002982
2983#include "iwl-spectrum.h"
2984
2985#define BEACON_TIME_MASK_LOW 0x00FFFFFF
2986#define BEACON_TIME_MASK_HIGH 0xFF000000
2987#define TIME_UNIT 1024
2988
2989/*
2990 * extended beacon time format
2991 * time in usec will be changed into a 32-bit value in 8:24 format
2992 * the high 1 byte is the beacon counts
2993 * the lower 3 bytes is the time in usec within one beacon interval
2994 */
2995
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08002996static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07002997{
2998 u32 quot;
2999 u32 rem;
3000 u32 interval = beacon_interval * 1024;
3001
3002 if (!interval || !usec)
3003 return 0;
3004
3005 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
3006 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
3007
3008 return (quot << 24) + rem;
3009}
3010
3011/* base is usually what we get from ucode with each received frame,
3012 * the same as HW timer counter counting down
3013 */
3014
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003015static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
Zhu Yib481de92007-09-25 17:54:57 -07003016{
3017 u32 base_low = base & BEACON_TIME_MASK_LOW;
3018 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
3019 u32 interval = beacon_interval * TIME_UNIT;
3020 u32 res = (base & BEACON_TIME_MASK_HIGH) +
3021 (addon & BEACON_TIME_MASK_HIGH);
3022
3023 if (base_low > addon_low)
3024 res += base_low - addon_low;
3025 else if (base_low < addon_low) {
3026 res += interval + base_low - addon_low;
3027 res += (1 << 24);
3028 } else
3029 res += (1 << 24);
3030
3031 return cpu_to_le32(res);
3032}
3033
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003034static int iwl3945_get_measurement(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003035 struct ieee80211_measurement_params *params,
3036 u8 type)
3037{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003038 struct iwl3945_spectrum_cmd spectrum;
3039 struct iwl3945_rx_packet *res;
3040 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07003041 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
3042 .data = (void *)&spectrum,
3043 .meta.flags = CMD_WANT_SKB,
3044 };
3045 u32 add_time = le64_to_cpu(params->start_time);
3046 int rc;
3047 int spectrum_resp_status;
3048 int duration = le16_to_cpu(params->duration);
3049
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003050 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003051 add_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003052 iwl3945_usecs_to_beacons(
Zhu Yib481de92007-09-25 17:54:57 -07003053 le64_to_cpu(params->start_time) - priv->last_tsf,
3054 le16_to_cpu(priv->rxon_timing.beacon_interval));
3055
3056 memset(&spectrum, 0, sizeof(spectrum));
3057
3058 spectrum.channel_count = cpu_to_le16(1);
3059 spectrum.flags =
3060 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
3061 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
3062 cmd.len = sizeof(spectrum);
3063 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
3064
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003065 if (iwl3945_is_associated(priv))
Zhu Yib481de92007-09-25 17:54:57 -07003066 spectrum.start_time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003067 iwl3945_add_beacon_time(priv->last_beacon_time,
Zhu Yib481de92007-09-25 17:54:57 -07003068 add_time,
3069 le16_to_cpu(priv->rxon_timing.beacon_interval));
3070 else
3071 spectrum.start_time = 0;
3072
3073 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
3074 spectrum.channels[0].channel = params->channel;
3075 spectrum.channels[0].type = type;
3076 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
3077 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
3078 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
3079
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003080 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07003081 if (rc)
3082 return rc;
3083
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003084 res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003085 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
3086 IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
3087 rc = -EIO;
3088 }
3089
3090 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
3091 switch (spectrum_resp_status) {
3092 case 0: /* Command will be handled */
3093 if (res->u.spectrum.id != 0xff) {
Ian Schrambc434dd2007-10-25 17:15:29 +08003094 IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
3095 res->u.spectrum.id);
Zhu Yib481de92007-09-25 17:54:57 -07003096 priv->measurement_status &= ~MEASUREMENT_READY;
3097 }
3098 priv->measurement_status |= MEASUREMENT_ACTIVE;
3099 rc = 0;
3100 break;
3101
3102 case 1: /* Command will not be handled */
3103 rc = -EAGAIN;
3104 break;
3105 }
3106
3107 dev_kfree_skb_any(cmd.meta.u.skb);
3108
3109 return rc;
3110}
3111#endif
3112
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003113static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
3114 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003115{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003116 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3117 struct iwl3945_alive_resp *palive;
Zhu Yib481de92007-09-25 17:54:57 -07003118 struct delayed_work *pwork;
3119
3120 palive = &pkt->u.alive_frame;
3121
3122 IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
3123 "0x%01X 0x%01X\n",
3124 palive->is_valid, palive->ver_type,
3125 palive->ver_subtype);
3126
3127 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
3128 IWL_DEBUG_INFO("Initialization Alive received.\n");
3129 memcpy(&priv->card_alive_init,
3130 &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003131 sizeof(struct iwl3945_init_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003132 pwork = &priv->init_alive_start;
3133 } else {
3134 IWL_DEBUG_INFO("Runtime Alive received.\n");
3135 memcpy(&priv->card_alive, &pkt->u.alive_frame,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003136 sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07003137 pwork = &priv->alive_start;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003138 iwl3945_disable_events(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003139 }
3140
3141 /* We delay the ALIVE response by 5ms to
3142 * give the HW RF Kill time to activate... */
3143 if (palive->is_valid == UCODE_VALID_OK)
3144 queue_delayed_work(priv->workqueue, pwork,
3145 msecs_to_jiffies(5));
3146 else
3147 IWL_WARNING("uCode did not respond OK.\n");
3148}
3149
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003150static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
3151 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003152{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003153 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003154
3155 IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
3156 return;
3157}
3158
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003159static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
3160 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003161{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003162 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003163
3164 IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
3165 "seq 0x%04X ser 0x%08X\n",
3166 le32_to_cpu(pkt->u.err_resp.error_type),
3167 get_cmd_string(pkt->u.err_resp.cmd_id),
3168 pkt->u.err_resp.cmd_id,
3169 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
3170 le32_to_cpu(pkt->u.err_resp.error_info));
3171}
3172
3173#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
3174
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003175static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003176{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003177 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3178 struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
3179 struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003180 IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
3181 le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
3182 rxon->channel = csa->channel;
3183 priv->staging_rxon.channel = csa->channel;
3184}
3185
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003186static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
3187 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003188{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003189#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003190 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3191 struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003192
3193 if (!report->state) {
3194 IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
3195 "Spectrum Measure Notification: Start\n");
3196 return;
3197 }
3198
3199 memcpy(&priv->measure_report, report, sizeof(*report));
3200 priv->measurement_status |= MEASUREMENT_READY;
3201#endif
3202}
3203
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003204static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
3205 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003206{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003207#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003208 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3209 struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
Zhu Yib481de92007-09-25 17:54:57 -07003210 IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
3211 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
3212#endif
3213}
3214
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003215static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
3216 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003217{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003218 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003219 IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
3220 "notification for %s:\n",
3221 le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003222 iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
Zhu Yib481de92007-09-25 17:54:57 -07003223}
3224
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003225static void iwl3945_bg_beacon_update(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07003226{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003227 struct iwl3945_priv *priv =
3228 container_of(work, struct iwl3945_priv, beacon_update);
Zhu Yib481de92007-09-25 17:54:57 -07003229 struct sk_buff *beacon;
3230
3231 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
Johannes Berg32bfd352007-12-19 01:31:26 +01003232 beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
Zhu Yib481de92007-09-25 17:54:57 -07003233
3234 if (!beacon) {
3235 IWL_ERROR("update beacon failed\n");
3236 return;
3237 }
3238
3239 mutex_lock(&priv->mutex);
3240 /* new beacon skb is allocated every time; dispose previous.*/
3241 if (priv->ibss_beacon)
3242 dev_kfree_skb(priv->ibss_beacon);
3243
3244 priv->ibss_beacon = beacon;
3245 mutex_unlock(&priv->mutex);
3246
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003247 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003248}
3249
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003250static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
3251 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003252{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003253#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003254 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3255 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
Zhu Yib481de92007-09-25 17:54:57 -07003256 u8 rate = beacon->beacon_notify_hdr.rate;
3257
3258 IWL_DEBUG_RX("beacon status %x retries %d iss %d "
3259 "tsf %d %d rate %d\n",
3260 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
3261 beacon->beacon_notify_hdr.failure_frame,
3262 le32_to_cpu(beacon->ibss_mgr_status),
3263 le32_to_cpu(beacon->high_tsf),
3264 le32_to_cpu(beacon->low_tsf), rate);
3265#endif
3266
3267 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
3268 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
3269 queue_work(priv->workqueue, &priv->beacon_update);
3270}
3271
3272/* Service response to REPLY_SCAN_CMD (0x80) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003273static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
3274 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003275{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08003276#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003277 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3278 struct iwl3945_scanreq_notification *notif =
3279 (struct iwl3945_scanreq_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003280
3281 IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
3282#endif
3283}
3284
3285/* Service SCAN_START_NOTIFICATION (0x82) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003286static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
3287 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003288{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003289 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3290 struct iwl3945_scanstart_notification *notif =
3291 (struct iwl3945_scanstart_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003292 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
3293 IWL_DEBUG_SCAN("Scan start: "
3294 "%d [802.11%s] "
3295 "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
3296 notif->channel,
3297 notif->band ? "bg" : "a",
3298 notif->tsf_high,
3299 notif->tsf_low, notif->status, notif->beacon_timer);
3300}
3301
3302/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003303static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
3304 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003305{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003306 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3307 struct iwl3945_scanresults_notification *notif =
3308 (struct iwl3945_scanresults_notification *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003309
3310 IWL_DEBUG_SCAN("Scan ch.res: "
3311 "%d [802.11%s] "
3312 "(TSF: 0x%08X:%08X) - %d "
3313 "elapsed=%lu usec (%dms since last)\n",
3314 notif->channel,
3315 notif->band ? "bg" : "a",
3316 le32_to_cpu(notif->tsf_high),
3317 le32_to_cpu(notif->tsf_low),
3318 le32_to_cpu(notif->statistics[0]),
3319 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
3320 jiffies_to_msecs(elapsed_jiffies
3321 (priv->last_scan_jiffies, jiffies)));
3322
3323 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003324 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003325}
3326
3327/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003328static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
3329 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003330{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003331 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3332 struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
Zhu Yib481de92007-09-25 17:54:57 -07003333
3334 IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
3335 scan_notif->scanned_channels,
3336 scan_notif->tsf_low,
3337 scan_notif->tsf_high, scan_notif->status);
3338
3339 /* The HW is no longer scanning */
3340 clear_bit(STATUS_SCAN_HW, &priv->status);
3341
3342 /* The scan completion notification came in, so kill that timer... */
3343 cancel_delayed_work(&priv->scan_check);
3344
3345 IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
3346 (priv->scan_bands == 2) ? "2.4" : "5.2",
3347 jiffies_to_msecs(elapsed_jiffies
3348 (priv->scan_pass_start, jiffies)));
3349
3350 /* Remove this scanned band from the list
3351 * of pending bands to scan */
3352 priv->scan_bands--;
3353
3354 /* If a request to abort was given, or the scan did not succeed
3355 * then we reset the scan state machine and terminate,
3356 * re-queuing another scan if one has been requested */
3357 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
3358 IWL_DEBUG_INFO("Aborted scan completed.\n");
3359 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
3360 } else {
3361 /* If there are more bands on this scan pass reschedule */
3362 if (priv->scan_bands > 0)
3363 goto reschedule;
3364 }
3365
3366 priv->last_scan_jiffies = jiffies;
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08003367 priv->next_scan_jiffies = 0;
Zhu Yib481de92007-09-25 17:54:57 -07003368 IWL_DEBUG_INFO("Setting scan to off\n");
3369
3370 clear_bit(STATUS_SCANNING, &priv->status);
3371
3372 IWL_DEBUG_INFO("Scan took %dms\n",
3373 jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
3374
3375 queue_work(priv->workqueue, &priv->scan_completed);
3376
3377 return;
3378
3379reschedule:
3380 priv->scan_pass_start = jiffies;
3381 queue_work(priv->workqueue, &priv->request_scan);
3382}
3383
3384/* Handle notification from uCode that card's power state is changing
3385 * due to software, hardware, or critical temperature RFKILL */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003386static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
3387 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003388{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003389 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003390 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
3391 unsigned long status = priv->status;
3392
3393 IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
3394 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
3395 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
3396
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003397 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
Zhu Yib481de92007-09-25 17:54:57 -07003398 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3399
3400 if (flags & HW_CARD_DISABLED)
3401 set_bit(STATUS_RF_KILL_HW, &priv->status);
3402 else
3403 clear_bit(STATUS_RF_KILL_HW, &priv->status);
3404
3405
3406 if (flags & SW_CARD_DISABLED)
3407 set_bit(STATUS_RF_KILL_SW, &priv->status);
3408 else
3409 clear_bit(STATUS_RF_KILL_SW, &priv->status);
3410
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003411 iwl3945_scan_cancel(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003412
3413 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
3414 test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
3415 (test_bit(STATUS_RF_KILL_SW, &status) !=
3416 test_bit(STATUS_RF_KILL_SW, &priv->status)))
3417 queue_work(priv->workqueue, &priv->rf_kill);
3418 else
3419 wake_up_interruptible(&priv->wait_command_queue);
3420}
3421
3422/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003423 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
Zhu Yib481de92007-09-25 17:54:57 -07003424 *
3425 * Setup the RX handlers for each of the reply types sent from the uCode
3426 * to the host.
3427 *
3428 * This function chains into the hardware specific files for them to setup
3429 * any hardware specific handlers as well.
3430 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003431static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003432{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003433 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
3434 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
3435 priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
3436 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
Zhu Yib481de92007-09-25 17:54:57 -07003437 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003438 iwl3945_rx_spectrum_measure_notif;
3439 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003440 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003441 iwl3945_rx_pm_debug_statistics_notif;
3442 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003443
Ben Cahill9fbab512007-11-29 11:09:47 +08003444 /*
3445 * The same handler is used for both the REPLY to a discrete
3446 * statistics request from the host as well as for the periodic
3447 * statistics notifications (after received beacons) from the uCode.
Zhu Yib481de92007-09-25 17:54:57 -07003448 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003449 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
3450 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
Zhu Yib481de92007-09-25 17:54:57 -07003451
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003452 priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
3453 priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003454 priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003455 iwl3945_rx_scan_results_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003456 priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003457 iwl3945_rx_scan_complete_notif;
3458 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
Zhu Yib481de92007-09-25 17:54:57 -07003459
Ben Cahill9fbab512007-11-29 11:09:47 +08003460 /* Set up hardware specific Rx handlers */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003461 iwl3945_hw_rx_handler_setup(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003462}
3463
3464/**
Tomas Winkler91c066f2008-03-06 17:36:55 -08003465 * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
3466 * When FW advances 'R' index, all entries between old and new 'R' index
3467 * need to be reclaimed.
3468 */
3469static void iwl3945_cmd_queue_reclaim(struct iwl3945_priv *priv,
3470 int txq_id, int index)
3471{
3472 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3473 struct iwl3945_queue *q = &txq->q;
3474 int nfreed = 0;
3475
3476 if ((index >= q->n_bd) || (iwl3945_x2_queue_used(q, index) == 0)) {
3477 IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
3478 "is out of range [0-%d] %d %d.\n", txq_id,
3479 index, q->n_bd, q->write_ptr, q->read_ptr);
3480 return;
3481 }
3482
3483 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
3484 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3485 if (nfreed > 1) {
3486 IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3487 q->write_ptr, q->read_ptr);
3488 queue_work(priv->workqueue, &priv->restart);
3489 break;
3490 }
3491 nfreed++;
3492 }
3493}
3494
3495
3496/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003497 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
Zhu Yib481de92007-09-25 17:54:57 -07003498 * @rxb: Rx buffer to reclaim
3499 *
3500 * If an Rx buffer has an async callback associated with it the callback
3501 * will be executed. The attached skb (if present) will only be freed
3502 * if the callback returns 1
3503 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003504static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
3505 struct iwl3945_rx_mem_buffer *rxb)
Zhu Yib481de92007-09-25 17:54:57 -07003506{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003507 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07003508 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3509 int txq_id = SEQ_TO_QUEUE(sequence);
3510 int index = SEQ_TO_INDEX(sequence);
3511 int huge = sequence & SEQ_HUGE_FRAME;
3512 int cmd_index;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003513 struct iwl3945_cmd *cmd;
Zhu Yib481de92007-09-25 17:54:57 -07003514
Zhu Yib481de92007-09-25 17:54:57 -07003515 BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
3516
3517 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
3518 cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
3519
3520 /* Input error checking is done when commands are added to queue. */
3521 if (cmd->meta.flags & CMD_WANT_SKB) {
3522 cmd->meta.source->u.skb = rxb->skb;
3523 rxb->skb = NULL;
3524 } else if (cmd->meta.u.callback &&
3525 !cmd->meta.u.callback(priv, cmd, rxb->skb))
3526 rxb->skb = NULL;
3527
Tomas Winkler91c066f2008-03-06 17:36:55 -08003528 iwl3945_cmd_queue_reclaim(priv, txq_id, index);
Zhu Yib481de92007-09-25 17:54:57 -07003529
3530 if (!(cmd->meta.flags & CMD_ASYNC)) {
3531 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
3532 wake_up_interruptible(&priv->wait_command_queue);
3533 }
3534}
3535
3536/************************** RX-FUNCTIONS ****************************/
3537/*
3538 * Rx theory of operation
3539 *
3540 * The host allocates 32 DMA target addresses and passes the host address
3541 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
3542 * 0 to 31
3543 *
3544 * Rx Queue Indexes
3545 * The host/firmware share two index registers for managing the Rx buffers.
3546 *
3547 * The READ index maps to the first position that the firmware may be writing
3548 * to -- the driver can read up to (but not including) this position and get
3549 * good data.
3550 * The READ index is managed by the firmware once the card is enabled.
3551 *
3552 * The WRITE index maps to the last position the driver has read from -- the
3553 * position preceding WRITE is the last slot the firmware can place a packet.
3554 *
3555 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
3556 * WRITE = READ.
3557 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003558 * During initialization, the host sets up the READ queue position to the first
Zhu Yib481de92007-09-25 17:54:57 -07003559 * INDEX position, and WRITE to the last (READ - 1 wrapped)
3560 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003561 * When the firmware places a packet in a buffer, it will advance the READ index
Zhu Yib481de92007-09-25 17:54:57 -07003562 * and fire the RX interrupt. The driver can then query the READ index and
3563 * process as many packets as possible, moving the WRITE index forward as it
3564 * resets the Rx queue buffers with new memory.
3565 *
3566 * The management in the driver is as follows:
3567 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
3568 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
Ian Schram01ebd062007-10-25 17:15:22 +08003569 * to replenish the iwl->rxq->rx_free.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003570 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
Zhu Yib481de92007-09-25 17:54:57 -07003571 * iwl->rxq is replenished and the READ INDEX is updated (updating the
3572 * 'processed' and 'read' driver indexes as well)
3573 * + A received packet is processed and handed to the kernel network stack,
3574 * detached from the iwl->rxq. The driver 'processed' index is updated.
3575 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
3576 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
3577 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
3578 * were enough free buffers and RX_STALLED is set it is cleared.
3579 *
3580 *
3581 * Driver sequence:
3582 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003583 * iwl3945_rx_queue_alloc() Allocates rx_free
3584 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003585 * iwl3945_rx_queue_restock
Ben Cahill9fbab512007-11-29 11:09:47 +08003586 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
Zhu Yib481de92007-09-25 17:54:57 -07003587 * queue, updates firmware pointers, and updates
3588 * the WRITE index. If insufficient rx_free buffers
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003589 * are available, schedules iwl3945_rx_replenish
Zhu Yib481de92007-09-25 17:54:57 -07003590 *
3591 * -- enable interrupts --
Ben Cahill9fbab512007-11-29 11:09:47 +08003592 * ISR - iwl3945_rx() Detach iwl3945_rx_mem_buffers from pool up to the
Zhu Yib481de92007-09-25 17:54:57 -07003593 * READ INDEX, detaching the SKB from the pool.
3594 * Moves the packet buffer from queue to rx_used.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003595 * Calls iwl3945_rx_queue_restock to refill any empty
Zhu Yib481de92007-09-25 17:54:57 -07003596 * slots.
3597 * ...
3598 *
3599 */
3600
3601/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003602 * iwl3945_rx_queue_space - Return number of free slots available in queue.
Zhu Yib481de92007-09-25 17:54:57 -07003603 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003604static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003605{
3606 int s = q->read - q->write;
3607 if (s <= 0)
3608 s += RX_QUEUE_SIZE;
3609 /* keep some buffer to not confuse full and empty queue */
3610 s -= 2;
3611 if (s < 0)
3612 s = 0;
3613 return s;
3614}
3615
3616/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003617 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
Zhu Yib481de92007-09-25 17:54:57 -07003618 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003619int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
Zhu Yib481de92007-09-25 17:54:57 -07003620{
3621 u32 reg = 0;
3622 int rc = 0;
3623 unsigned long flags;
3624
3625 spin_lock_irqsave(&q->lock, flags);
3626
3627 if (q->need_update == 0)
3628 goto exit_unlock;
3629
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003630 /* If power-saving is in use, make sure device is awake */
Zhu Yib481de92007-09-25 17:54:57 -07003631 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003632 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07003633
3634 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003635 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07003636 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3637 goto exit_unlock;
3638 }
3639
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003640 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003641 if (rc)
3642 goto exit_unlock;
3643
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003644 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003645 iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
Zhu Yib481de92007-09-25 17:54:57 -07003646 q->write & ~0x7);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003647 iwl3945_release_nic_access(priv);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003648
3649 /* Else device is assumed to be awake */
Zhu Yib481de92007-09-25 17:54:57 -07003650 } else
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003651 /* Device expects a multiple of 8 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003652 iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
Zhu Yib481de92007-09-25 17:54:57 -07003653
3654
3655 q->need_update = 0;
3656
3657 exit_unlock:
3658 spin_unlock_irqrestore(&q->lock, flags);
3659 return rc;
3660}
3661
3662/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003663 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
Zhu Yib481de92007-09-25 17:54:57 -07003664 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003665static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07003666 dma_addr_t dma_addr)
3667{
3668 return cpu_to_le32((u32)dma_addr);
3669}
3670
3671/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003672 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
Zhu Yib481de92007-09-25 17:54:57 -07003673 *
Ben Cahill9fbab512007-11-29 11:09:47 +08003674 * If there are slots in the RX queue that need to be restocked,
Zhu Yib481de92007-09-25 17:54:57 -07003675 * and we have free pre-allocated buffers, fill the ranks as much
Ben Cahill9fbab512007-11-29 11:09:47 +08003676 * as we can, pulling from rx_free.
Zhu Yib481de92007-09-25 17:54:57 -07003677 *
3678 * This moves the 'write' index forward to catch up with 'processed', and
3679 * also updates the memory address in the firmware to reference the new
3680 * target buffer.
3681 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003682static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003683{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003684 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003685 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003686 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003687 unsigned long flags;
3688 int write, rc;
3689
3690 spin_lock_irqsave(&rxq->lock, flags);
3691 write = rxq->write & ~0x7;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003692 while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003693 /* Get next free Rx buffer, remove from free list */
Zhu Yib481de92007-09-25 17:54:57 -07003694 element = rxq->rx_free.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003695 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Zhu Yib481de92007-09-25 17:54:57 -07003696 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003697
3698 /* Point to Rx buffer via next RBD in circular buffer */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003699 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
Zhu Yib481de92007-09-25 17:54:57 -07003700 rxq->queue[rxq->write] = rxb;
3701 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
3702 rxq->free_count--;
3703 }
3704 spin_unlock_irqrestore(&rxq->lock, flags);
3705 /* If the pre-allocated buffer pool is dropping low, schedule to
3706 * refill it */
3707 if (rxq->free_count <= RX_LOW_WATERMARK)
3708 queue_work(priv->workqueue, &priv->rx_replenish);
3709
3710
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003711 /* If we've added more space for the firmware to place data, tell it.
3712 * Increment device's write pointer in multiples of 8. */
Zhu Yib481de92007-09-25 17:54:57 -07003713 if ((write != (rxq->write & ~0x7))
3714 || (abs(rxq->write - rxq->read) > 7)) {
3715 spin_lock_irqsave(&rxq->lock, flags);
3716 rxq->need_update = 1;
3717 spin_unlock_irqrestore(&rxq->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003718 rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
Zhu Yib481de92007-09-25 17:54:57 -07003719 if (rc)
3720 return rc;
3721 }
3722
3723 return 0;
3724}
3725
3726/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003727 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
Zhu Yib481de92007-09-25 17:54:57 -07003728 *
3729 * When moving to rx_free an SKB is allocated for the slot.
3730 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003731 * Also restock the Rx queue via iwl3945_rx_queue_restock.
Ian Schram01ebd062007-10-25 17:15:22 +08003732 * This is called as a scheduled work item (except for during initialization)
Zhu Yib481de92007-09-25 17:54:57 -07003733 */
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003734static void iwl3945_rx_allocate(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003735{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003736 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003737 struct list_head *element;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003738 struct iwl3945_rx_mem_buffer *rxb;
Zhu Yib481de92007-09-25 17:54:57 -07003739 unsigned long flags;
3740 spin_lock_irqsave(&rxq->lock, flags);
3741 while (!list_empty(&rxq->rx_used)) {
3742 element = rxq->rx_used.next;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003743 rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003744
3745 /* Alloc a new receive buffer */
Zhu Yib481de92007-09-25 17:54:57 -07003746 rxb->skb =
3747 alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
3748 if (!rxb->skb) {
3749 if (net_ratelimit())
3750 printk(KERN_CRIT DRV_NAME
3751 ": Can not allocate SKB buffers\n");
3752 /* We don't reschedule replenish work here -- we will
3753 * call the restock method and if it still needs
3754 * more buffers it will schedule replenish */
3755 break;
3756 }
Zhu Yi12342c42007-12-20 11:27:32 +08003757
3758 /* If radiotap head is required, reserve some headroom here.
3759 * The physical head count is a variable rx_stats->phy_count.
3760 * We reserve 4 bytes here. Plus these extra bytes, the
3761 * headroom of the physical head should be enough for the
3762 * radiotap head that iwl3945 supported. See iwl3945_rt.
3763 */
3764 skb_reserve(rxb->skb, 4);
3765
Zhu Yib481de92007-09-25 17:54:57 -07003766 priv->alloc_rxb_skb++;
3767 list_del(element);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003768
3769 /* Get physical address of RB/SKB */
Zhu Yib481de92007-09-25 17:54:57 -07003770 rxb->dma_addr =
3771 pci_map_single(priv->pci_dev, rxb->skb->data,
3772 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3773 list_add_tail(&rxb->list, &rxq->rx_free);
3774 rxq->free_count++;
3775 }
3776 spin_unlock_irqrestore(&rxq->lock, flags);
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003777}
3778
3779/*
3780 * this should be called while priv->lock is locked
3781 */
Tomas Winkler4fd1f842007-12-05 20:59:58 +02003782static void __iwl3945_rx_replenish(void *data)
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003783{
3784 struct iwl3945_priv *priv = data;
3785
3786 iwl3945_rx_allocate(priv);
3787 iwl3945_rx_queue_restock(priv);
3788}
3789
3790
3791void iwl3945_rx_replenish(void *data)
3792{
3793 struct iwl3945_priv *priv = data;
3794 unsigned long flags;
3795
3796 iwl3945_rx_allocate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003797
3798 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003799 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003800 spin_unlock_irqrestore(&priv->lock, flags);
3801}
3802
3803/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
Ben Cahill9fbab512007-11-29 11:09:47 +08003804 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
Zhu Yib481de92007-09-25 17:54:57 -07003805 * This free routine walks the list of POOL entries and if SKB is set to
3806 * non NULL it is unmapped and freed
3807 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003808static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003809{
3810 int i;
3811 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
3812 if (rxq->pool[i].skb != NULL) {
3813 pci_unmap_single(priv->pci_dev,
3814 rxq->pool[i].dma_addr,
3815 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3816 dev_kfree_skb(rxq->pool[i].skb);
3817 }
3818 }
3819
3820 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
3821 rxq->dma_addr);
3822 rxq->bd = NULL;
3823}
3824
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003825int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003826{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003827 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003828 struct pci_dev *dev = priv->pci_dev;
3829 int i;
3830
3831 spin_lock_init(&rxq->lock);
3832 INIT_LIST_HEAD(&rxq->rx_free);
3833 INIT_LIST_HEAD(&rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003834
3835 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
Zhu Yib481de92007-09-25 17:54:57 -07003836 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
3837 if (!rxq->bd)
3838 return -ENOMEM;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003839
Zhu Yib481de92007-09-25 17:54:57 -07003840 /* Fill the rx_used queue with _all_ of the Rx buffers */
3841 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
3842 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003843
Zhu Yib481de92007-09-25 17:54:57 -07003844 /* Set us so that we have processed and used all buffers, but have
3845 * not restocked the Rx queue with fresh buffers */
3846 rxq->read = rxq->write = 0;
3847 rxq->free_count = 0;
3848 rxq->need_update = 0;
3849 return 0;
3850}
3851
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003852void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
Zhu Yib481de92007-09-25 17:54:57 -07003853{
3854 unsigned long flags;
3855 int i;
3856 spin_lock_irqsave(&rxq->lock, flags);
3857 INIT_LIST_HEAD(&rxq->rx_free);
3858 INIT_LIST_HEAD(&rxq->rx_used);
3859 /* Fill the rx_used queue with _all_ of the Rx buffers */
3860 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
3861 /* In the reset function, these buffers may have been allocated
3862 * to an SKB, so we need to unmap and free potential storage */
3863 if (rxq->pool[i].skb != NULL) {
3864 pci_unmap_single(priv->pci_dev,
3865 rxq->pool[i].dma_addr,
3866 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
3867 priv->alloc_rxb_skb--;
3868 dev_kfree_skb(rxq->pool[i].skb);
3869 rxq->pool[i].skb = NULL;
3870 }
3871 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
3872 }
3873
3874 /* Set us so that we have processed and used all buffers, but have
3875 * not restocked the Rx queue with fresh buffers */
3876 rxq->read = rxq->write = 0;
3877 rxq->free_count = 0;
3878 spin_unlock_irqrestore(&rxq->lock, flags);
3879}
3880
3881/* Convert linear signal-to-noise ratio into dB */
3882static u8 ratio2dB[100] = {
3883/* 0 1 2 3 4 5 6 7 8 9 */
3884 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
3885 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
3886 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
3887 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
3888 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
3889 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
3890 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
3891 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
3892 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
3893 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
3894};
3895
3896/* Calculates a relative dB value from a ratio of linear
3897 * (i.e. not dB) signal levels.
3898 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003899int iwl3945_calc_db_from_ratio(int sig_ratio)
Zhu Yib481de92007-09-25 17:54:57 -07003900{
Adrian Bunk221c80c2008-02-02 23:19:01 +02003901 /* 1000:1 or higher just report as 60 dB */
3902 if (sig_ratio >= 1000)
Zhu Yib481de92007-09-25 17:54:57 -07003903 return 60;
3904
Adrian Bunk221c80c2008-02-02 23:19:01 +02003905 /* 100:1 or higher, divide by 10 and use table,
Zhu Yib481de92007-09-25 17:54:57 -07003906 * add 20 dB to make up for divide by 10 */
Adrian Bunk221c80c2008-02-02 23:19:01 +02003907 if (sig_ratio >= 100)
Zhu Yib481de92007-09-25 17:54:57 -07003908 return (20 + (int)ratio2dB[sig_ratio/10]);
3909
3910 /* We shouldn't see this */
3911 if (sig_ratio < 1)
3912 return 0;
3913
3914 /* Use table for ratios 1:1 - 99:1 */
3915 return (int)ratio2dB[sig_ratio];
3916}
3917
3918#define PERFECT_RSSI (-20) /* dBm */
3919#define WORST_RSSI (-95) /* dBm */
3920#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
3921
3922/* Calculate an indication of rx signal quality (a percentage, not dBm!).
3923 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
3924 * about formulas used below. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003925int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
Zhu Yib481de92007-09-25 17:54:57 -07003926{
3927 int sig_qual;
3928 int degradation = PERFECT_RSSI - rssi_dbm;
3929
3930 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
3931 * as indicator; formula is (signal dbm - noise dbm).
3932 * SNR at or above 40 is a great signal (100%).
3933 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
3934 * Weakest usable signal is usually 10 - 15 dB SNR. */
3935 if (noise_dbm) {
3936 if (rssi_dbm - noise_dbm >= 40)
3937 return 100;
3938 else if (rssi_dbm < noise_dbm)
3939 return 0;
3940 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
3941
3942 /* Else use just the signal level.
3943 * This formula is a least squares fit of data points collected and
3944 * compared with a reference system that had a percentage (%) display
3945 * for signal quality. */
3946 } else
3947 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
3948 (15 * RSSI_RANGE + 62 * degradation)) /
3949 (RSSI_RANGE * RSSI_RANGE);
3950
3951 if (sig_qual > 100)
3952 sig_qual = 100;
3953 else if (sig_qual < 1)
3954 sig_qual = 0;
3955
3956 return sig_qual;
3957}
3958
3959/**
Ben Cahill9fbab512007-11-29 11:09:47 +08003960 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
Zhu Yib481de92007-09-25 17:54:57 -07003961 *
3962 * Uses the priv->rx_handlers callback function array to invoke
3963 * the appropriate handlers, including command responses,
3964 * frame-received notifications, and other notifications.
3965 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003966static void iwl3945_rx_handle(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07003967{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003968 struct iwl3945_rx_mem_buffer *rxb;
3969 struct iwl3945_rx_packet *pkt;
3970 struct iwl3945_rx_queue *rxq = &priv->rxq;
Zhu Yib481de92007-09-25 17:54:57 -07003971 u32 r, i;
3972 int reclaim;
3973 unsigned long flags;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003974 u8 fill_rx = 0;
Mohamed Abbasd68ab682008-02-07 13:16:33 -08003975 u32 count = 8;
Zhu Yib481de92007-09-25 17:54:57 -07003976
Cahill, Ben M6440adb2007-11-29 11:09:55 +08003977 /* uCode's read index (stored in shared DRAM) indicates the last Rx
3978 * buffer that the driver may process (last buffer filled by ucode). */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08003979 r = iwl3945_hw_get_rx_read(priv);
Zhu Yib481de92007-09-25 17:54:57 -07003980 i = rxq->read;
3981
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08003982 if (iwl3945_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
3983 fill_rx = 1;
Zhu Yib481de92007-09-25 17:54:57 -07003984 /* Rx interrupt, but nothing sent from uCode */
3985 if (i == r)
3986 IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
3987
3988 while (i != r) {
3989 rxb = rxq->queue[i];
3990
Ben Cahill9fbab512007-11-29 11:09:47 +08003991 /* If an RXB doesn't have a Rx queue slot associated with it,
Zhu Yib481de92007-09-25 17:54:57 -07003992 * then a bug has been introduced in the queue refilling
3993 * routines -- catch it here */
3994 BUG_ON(rxb == NULL);
3995
3996 rxq->queue[i] = NULL;
3997
3998 pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
3999 IWL_RX_BUF_SIZE,
4000 PCI_DMA_FROMDEVICE);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004001 pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
Zhu Yib481de92007-09-25 17:54:57 -07004002
4003 /* Reclaim a command buffer only if this packet is a response
4004 * to a (driver-originated) command.
4005 * If the packet (e.g. Rx frame) originated from uCode,
4006 * there is no command buffer to reclaim.
4007 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4008 * but apparently a few don't get set; catch them here. */
4009 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4010 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
4011 (pkt->hdr.cmd != REPLY_TX);
4012
4013 /* Based on type of command response or notification,
4014 * handle those that need handling via function in
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004015 * rx_handlers table. See iwl3945_setup_rx_handlers() */
Zhu Yib481de92007-09-25 17:54:57 -07004016 if (priv->rx_handlers[pkt->hdr.cmd]) {
4017 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4018 "r = %d, i = %d, %s, 0x%02x\n", r, i,
4019 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4020 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
4021 } else {
4022 /* No handling needed */
4023 IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
4024 "r %d i %d No handler needed for %s, 0x%02x\n",
4025 r, i, get_cmd_string(pkt->hdr.cmd),
4026 pkt->hdr.cmd);
4027 }
4028
4029 if (reclaim) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004030 /* Invoke any callbacks, transfer the skb to caller, and
4031 * fire off the (possibly) blocking iwl3945_send_cmd()
Zhu Yib481de92007-09-25 17:54:57 -07004032 * as we reclaim the driver command queue */
4033 if (rxb && rxb->skb)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004034 iwl3945_tx_cmd_complete(priv, rxb);
Zhu Yib481de92007-09-25 17:54:57 -07004035 else
4036 IWL_WARNING("Claim null rxb?\n");
4037 }
4038
4039 /* For now we just don't re-use anything. We can tweak this
4040 * later to try and re-use notification packets and SKBs that
4041 * fail to Rx correctly */
4042 if (rxb->skb != NULL) {
4043 priv->alloc_rxb_skb--;
4044 dev_kfree_skb_any(rxb->skb);
4045 rxb->skb = NULL;
4046 }
4047
4048 pci_unmap_single(priv->pci_dev, rxb->dma_addr,
4049 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
4050 spin_lock_irqsave(&rxq->lock, flags);
4051 list_add_tail(&rxb->list, &priv->rxq.rx_used);
4052 spin_unlock_irqrestore(&rxq->lock, flags);
4053 i = (i + 1) & RX_QUEUE_MASK;
Mohamed Abbas5c0eef92007-11-29 11:10:14 +08004054 /* If there are a lot of unused frames,
4055 * restock the Rx queue so ucode won't assert. */
4056 if (fill_rx) {
4057 count++;
4058 if (count >= 8) {
4059 priv->rxq.read = i;
4060 __iwl3945_rx_replenish(priv);
4061 count = 0;
4062 }
4063 }
Zhu Yib481de92007-09-25 17:54:57 -07004064 }
4065
4066 /* Backtrack one entry */
4067 priv->rxq.read = i;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004068 iwl3945_rx_queue_restock(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004069}
4070
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004071/**
4072 * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware
4073 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004074static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
4075 struct iwl3945_tx_queue *txq)
Zhu Yib481de92007-09-25 17:54:57 -07004076{
4077 u32 reg = 0;
4078 int rc = 0;
4079 int txq_id = txq->q.id;
4080
4081 if (txq->need_update == 0)
4082 return rc;
4083
4084 /* if we're trying to save power */
4085 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
4086 /* wake up nic if it's powered down ...
4087 * uCode will wake up, and interrupt us again, so next
4088 * time we'll skip this part. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004089 reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
Zhu Yib481de92007-09-25 17:54:57 -07004090
4091 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4092 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004093 iwl3945_set_bit(priv, CSR_GP_CNTRL,
Zhu Yib481de92007-09-25 17:54:57 -07004094 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4095 return rc;
4096 }
4097
4098 /* restore this queue's parameters in nic hardware. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004099 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004100 if (rc)
4101 return rc;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004102 iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004103 txq->q.write_ptr | (txq_id << 8));
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004104 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004105
4106 /* else not in power-save mode, uCode will never sleep when we're
4107 * trying to tx (during RFKILL, we're not trying to tx). */
4108 } else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004109 iwl3945_write32(priv, HBUS_TARG_WRPTR,
Tomas Winklerfc4b6852007-10-25 17:15:24 +08004110 txq->q.write_ptr | (txq_id << 8));
Zhu Yib481de92007-09-25 17:54:57 -07004111
4112 txq->need_update = 0;
4113
4114 return rc;
4115}
4116
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004117#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004118static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
Zhu Yib481de92007-09-25 17:54:57 -07004119{
Joe Perches0795af52007-10-03 17:59:30 -07004120 DECLARE_MAC_BUF(mac);
4121
Zhu Yib481de92007-09-25 17:54:57 -07004122 IWL_DEBUG_RADIO("RX CONFIG:\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004123 iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
Zhu Yib481de92007-09-25 17:54:57 -07004124 IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4125 IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4126 IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
4127 le32_to_cpu(rxon->filter_flags));
4128 IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4129 IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
4130 rxon->ofdm_basic_rates);
4131 IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
Joe Perches0795af52007-10-03 17:59:30 -07004132 IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
4133 print_mac(mac, rxon->node_addr));
4134 IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
4135 print_mac(mac, rxon->bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07004136 IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4137}
4138#endif
4139
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004140static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004141{
4142 IWL_DEBUG_ISR("Enabling interrupts\n");
4143 set_bit(STATUS_INT_ENABLED, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004144 iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004145}
4146
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004147static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004148{
4149 clear_bit(STATUS_INT_ENABLED, &priv->status);
4150
4151 /* disable interrupts from uCode/NIC to host */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004152 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004153
4154 /* acknowledge/clear/reset any interrupts still pending
4155 * from uCode or flow handler (Rx/Tx DMA) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004156 iwl3945_write32(priv, CSR_INT, 0xffffffff);
4157 iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
Zhu Yib481de92007-09-25 17:54:57 -07004158 IWL_DEBUG_ISR("Disabled interrupts\n");
4159}
4160
4161static const char *desc_lookup(int i)
4162{
4163 switch (i) {
4164 case 1:
4165 return "FAIL";
4166 case 2:
4167 return "BAD_PARAM";
4168 case 3:
4169 return "BAD_CHECKSUM";
4170 case 4:
4171 return "NMI_INTERRUPT";
4172 case 5:
4173 return "SYSASSERT";
4174 case 6:
4175 return "FATAL_ERROR";
4176 }
4177
4178 return "UNKNOWN";
4179}
4180
4181#define ERROR_START_OFFSET (1 * sizeof(u32))
4182#define ERROR_ELEM_SIZE (7 * sizeof(u32))
4183
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004184static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004185{
4186 u32 i;
4187 u32 desc, time, count, base, data1;
4188 u32 blink1, blink2, ilink1, ilink2;
4189 int rc;
4190
4191 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
4192
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004193 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004194 IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
4195 return;
4196 }
4197
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004198 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004199 if (rc) {
4200 IWL_WARNING("Can not read from adapter at this time.\n");
4201 return;
4202 }
4203
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004204 count = iwl3945_read_targ_mem(priv, base);
Zhu Yib481de92007-09-25 17:54:57 -07004205
4206 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4207 IWL_ERROR("Start IWL Error Log Dump:\n");
Tomas Winkler2acae162008-03-02 01:25:59 +02004208 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
Zhu Yib481de92007-09-25 17:54:57 -07004209 }
4210
4211 IWL_ERROR("Desc Time asrtPC blink2 "
4212 "ilink1 nmiPC Line\n");
4213 for (i = ERROR_START_OFFSET;
4214 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
4215 i += ERROR_ELEM_SIZE) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004216 desc = iwl3945_read_targ_mem(priv, base + i);
Zhu Yib481de92007-09-25 17:54:57 -07004217 time =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004218 iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004219 blink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004220 iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004221 blink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004222 iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004223 ilink1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004224 iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004225 ilink2 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004226 iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004227 data1 =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004228 iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07004229
4230 IWL_ERROR
4231 ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
4232 desc_lookup(desc), desc, time, blink1, blink2,
4233 ilink1, ilink2, data1);
4234 }
4235
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004236 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004237
4238}
4239
Ben Cahillf58177b2007-11-29 11:09:43 +08004240#define EVENT_START_OFFSET (6 * sizeof(u32))
Zhu Yib481de92007-09-25 17:54:57 -07004241
4242/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004243 * iwl3945_print_event_log - Dump error event log to syslog
Zhu Yib481de92007-09-25 17:54:57 -07004244 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004245 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
Zhu Yib481de92007-09-25 17:54:57 -07004246 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004247static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
Zhu Yib481de92007-09-25 17:54:57 -07004248 u32 num_events, u32 mode)
4249{
4250 u32 i;
4251 u32 base; /* SRAM byte address of event log header */
4252 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
4253 u32 ptr; /* SRAM byte address of log data */
4254 u32 ev, time, data; /* event log data */
4255
4256 if (num_events == 0)
4257 return;
4258
4259 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4260
4261 if (mode == 0)
4262 event_size = 2 * sizeof(u32);
4263 else
4264 event_size = 3 * sizeof(u32);
4265
4266 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
4267
4268 /* "time" is actually "data" for mode 0 (no timestamp).
4269 * place event id # at far right for easier visual parsing. */
4270 for (i = 0; i < num_events; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004271 ev = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004272 ptr += sizeof(u32);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004273 time = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004274 ptr += sizeof(u32);
4275 if (mode == 0)
4276 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4277 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004278 data = iwl3945_read_targ_mem(priv, ptr);
Zhu Yib481de92007-09-25 17:54:57 -07004279 ptr += sizeof(u32);
4280 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4281 }
4282 }
4283}
4284
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004285static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004286{
4287 int rc;
4288 u32 base; /* SRAM byte address of event log header */
4289 u32 capacity; /* event log capacity in # entries */
4290 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
4291 u32 num_wraps; /* # times uCode wrapped to top of log */
4292 u32 next_entry; /* index of next entry to be written by uCode */
4293 u32 size; /* # entries that we'll print */
4294
4295 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004296 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
Zhu Yib481de92007-09-25 17:54:57 -07004297 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
4298 return;
4299 }
4300
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004301 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004302 if (rc) {
4303 IWL_WARNING("Can not read from adapter at this time.\n");
4304 return;
4305 }
4306
4307 /* event log header */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004308 capacity = iwl3945_read_targ_mem(priv, base);
4309 mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
4310 num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
4311 next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
Zhu Yib481de92007-09-25 17:54:57 -07004312
4313 size = num_wraps ? capacity : next_entry;
4314
4315 /* bail out if nothing in log */
4316 if (size == 0) {
Zhu Yi583fab32007-09-27 11:27:30 +08004317 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004318 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004319 return;
4320 }
4321
Zhu Yi583fab32007-09-27 11:27:30 +08004322 IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07004323 size, num_wraps);
4324
4325 /* if uCode has wrapped back to top of log, start at the oldest entry,
4326 * i.e the next one that uCode would fill. */
4327 if (num_wraps)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004328 iwl3945_print_event_log(priv, next_entry,
Zhu Yib481de92007-09-25 17:54:57 -07004329 capacity - next_entry, mode);
4330
4331 /* (then/else) start at top of log */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004332 iwl3945_print_event_log(priv, 0, next_entry, mode);
Zhu Yib481de92007-09-25 17:54:57 -07004333
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004334 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004335}
4336
4337/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004338 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
Zhu Yib481de92007-09-25 17:54:57 -07004339 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004340static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004341{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004342 /* Set the FW error flag -- cleared on iwl3945_down */
Zhu Yib481de92007-09-25 17:54:57 -07004343 set_bit(STATUS_FW_ERROR, &priv->status);
4344
4345 /* Cancel currently queued command. */
4346 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
4347
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004348#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004349 if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
4350 iwl3945_dump_nic_error_log(priv);
4351 iwl3945_dump_nic_event_log(priv);
4352 iwl3945_print_rx_config_cmd(&priv->staging_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07004353 }
4354#endif
4355
4356 wake_up_interruptible(&priv->wait_command_queue);
4357
4358 /* Keep the restart process from trying to send host
4359 * commands by clearing the INIT status bit */
4360 clear_bit(STATUS_READY, &priv->status);
4361
4362 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
4363 IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
4364 "Restarting adapter due to uCode error.\n");
4365
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004366 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004367 memcpy(&priv->recovery_rxon, &priv->active_rxon,
4368 sizeof(priv->recovery_rxon));
4369 priv->error_recovering = 1;
4370 }
4371 queue_work(priv->workqueue, &priv->restart);
4372 }
4373}
4374
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004375static void iwl3945_error_recovery(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004376{
4377 unsigned long flags;
4378
4379 memcpy(&priv->staging_rxon, &priv->recovery_rxon,
4380 sizeof(priv->staging_rxon));
4381 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004382 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004383
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004384 iwl3945_add_station(priv, priv->bssid, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07004385
4386 spin_lock_irqsave(&priv->lock, flags);
4387 priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
4388 priv->error_recovering = 0;
4389 spin_unlock_irqrestore(&priv->lock, flags);
4390}
4391
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004392static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004393{
4394 u32 inta, handled = 0;
4395 u32 inta_fh;
4396 unsigned long flags;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004397#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07004398 u32 inta_mask;
4399#endif
4400
4401 spin_lock_irqsave(&priv->lock, flags);
4402
4403 /* Ack/clear/reset pending uCode interrupts.
4404 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4405 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004406 inta = iwl3945_read32(priv, CSR_INT);
4407 iwl3945_write32(priv, CSR_INT, inta);
Zhu Yib481de92007-09-25 17:54:57 -07004408
4409 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4410 * Any new interrupts that happen after this, either while we're
4411 * in this tasklet, or later, will show up in next ISR/tasklet. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004412 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4413 iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
Zhu Yib481de92007-09-25 17:54:57 -07004414
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004415#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004416 if (iwl3945_debug_level & IWL_DL_ISR) {
Ben Cahill9fbab512007-11-29 11:09:47 +08004417 /* just for debug */
4418 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
Zhu Yib481de92007-09-25 17:54:57 -07004419 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4420 inta, inta_mask, inta_fh);
4421 }
4422#endif
4423
4424 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4425 * atomic, make sure that inta covers all the interrupts that
4426 * we've discovered, even if FH interrupt came in just after
4427 * reading CSR_INT. */
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004428 if (inta_fh & CSR39_FH_INT_RX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004429 inta |= CSR_INT_BIT_FH_RX;
Tomas Winkler6f83eaa2008-03-04 18:09:28 -08004430 if (inta_fh & CSR39_FH_INT_TX_MASK)
Zhu Yib481de92007-09-25 17:54:57 -07004431 inta |= CSR_INT_BIT_FH_TX;
4432
4433 /* Now service all interrupt bits discovered above. */
4434 if (inta & CSR_INT_BIT_HW_ERR) {
4435 IWL_ERROR("Microcode HW error detected. Restarting.\n");
4436
4437 /* Tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004438 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004439
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004440 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004441
4442 handled |= CSR_INT_BIT_HW_ERR;
4443
4444 spin_unlock_irqrestore(&priv->lock, flags);
4445
4446 return;
4447 }
4448
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004449#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004450 if (iwl3945_debug_level & (IWL_DL_ISR)) {
Zhu Yib481de92007-09-25 17:54:57 -07004451 /* NIC fires this, but we don't use it, redundant with WAKEUP */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004452 if (inta & CSR_INT_BIT_SCD)
4453 IWL_DEBUG_ISR("Scheduler finished to transmit "
4454 "the frame/frames.\n");
Zhu Yib481de92007-09-25 17:54:57 -07004455
4456 /* Alive notification via Rx interrupt will do the real work */
4457 if (inta & CSR_INT_BIT_ALIVE)
4458 IWL_DEBUG_ISR("Alive interrupt\n");
4459 }
4460#endif
4461 /* Safely ignore these bits for debug checks below */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004462 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
Zhu Yib481de92007-09-25 17:54:57 -07004463
4464 /* HW RF KILL switch toggled (4965 only) */
4465 if (inta & CSR_INT_BIT_RF_KILL) {
4466 int hw_rf_kill = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004467 if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
Zhu Yib481de92007-09-25 17:54:57 -07004468 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4469 hw_rf_kill = 1;
4470
4471 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
4472 "RF_KILL bit toggled to %s.\n",
4473 hw_rf_kill ? "disable radio":"enable radio");
4474
4475 /* Queue restart only if RF_KILL switch was set to "kill"
4476 * when we loaded driver, and is now set to "enable".
4477 * After we're Alive, RF_KILL gets handled by
Reinette Chatre32304552008-02-15 14:34:37 -08004478 * iwl3945_rx_card_state_notif() */
Zhu Yi53e49092007-12-06 16:08:44 +08004479 if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
4480 clear_bit(STATUS_RF_KILL_HW, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07004481 queue_work(priv->workqueue, &priv->restart);
Zhu Yi53e49092007-12-06 16:08:44 +08004482 }
Zhu Yib481de92007-09-25 17:54:57 -07004483
4484 handled |= CSR_INT_BIT_RF_KILL;
4485 }
4486
4487 /* Chip got too hot and stopped itself (4965 only) */
4488 if (inta & CSR_INT_BIT_CT_KILL) {
4489 IWL_ERROR("Microcode CT kill error detected.\n");
4490 handled |= CSR_INT_BIT_CT_KILL;
4491 }
4492
4493 /* Error detected by uCode */
4494 if (inta & CSR_INT_BIT_SW_ERR) {
4495 IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
4496 inta);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004497 iwl3945_irq_handle_error(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004498 handled |= CSR_INT_BIT_SW_ERR;
4499 }
4500
4501 /* uCode wakes up after power-down sleep */
4502 if (inta & CSR_INT_BIT_WAKEUP) {
4503 IWL_DEBUG_ISR("Wakeup interrupt\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004504 iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
4505 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
4506 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
4507 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
4508 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
4509 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
4510 iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
Zhu Yib481de92007-09-25 17:54:57 -07004511
4512 handled |= CSR_INT_BIT_WAKEUP;
4513 }
4514
4515 /* All uCode command responses, including Tx command responses,
4516 * Rx "responses" (frame-received notification), and other
4517 * notifications from uCode come through here*/
4518 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004519 iwl3945_rx_handle(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004520 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4521 }
4522
4523 if (inta & CSR_INT_BIT_FH_TX) {
4524 IWL_DEBUG_ISR("Tx interrupt\n");
4525
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004526 iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
4527 if (!iwl3945_grab_nic_access(priv)) {
4528 iwl3945_write_direct32(priv,
Zhu Yib481de92007-09-25 17:54:57 -07004529 FH_TCSR_CREDIT
4530 (ALM_FH_SRVC_CHNL), 0x0);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004531 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004532 }
4533 handled |= CSR_INT_BIT_FH_TX;
4534 }
4535
4536 if (inta & ~handled)
4537 IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4538
4539 if (inta & ~CSR_INI_SET_MASK) {
4540 IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
4541 inta & ~CSR_INI_SET_MASK);
4542 IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
4543 }
4544
4545 /* Re-enable all interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004546 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004547
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08004548#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004549 if (iwl3945_debug_level & (IWL_DL_ISR)) {
4550 inta = iwl3945_read32(priv, CSR_INT);
4551 inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
4552 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004553 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4554 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4555 }
4556#endif
4557 spin_unlock_irqrestore(&priv->lock, flags);
4558}
4559
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004560static irqreturn_t iwl3945_isr(int irq, void *data)
Zhu Yib481de92007-09-25 17:54:57 -07004561{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004562 struct iwl3945_priv *priv = data;
Zhu Yib481de92007-09-25 17:54:57 -07004563 u32 inta, inta_mask;
4564 u32 inta_fh;
4565 if (!priv)
4566 return IRQ_NONE;
4567
4568 spin_lock(&priv->lock);
4569
4570 /* Disable (but don't clear!) interrupts here to avoid
4571 * back-to-back ISRs and sporadic interrupts from our NIC.
4572 * If we have something to service, the tasklet will re-enable ints.
4573 * If we *don't* have something, we'll re-enable before leaving here. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004574 inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4575 iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
Zhu Yib481de92007-09-25 17:54:57 -07004576
4577 /* Discover which interrupts are active/pending */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004578 inta = iwl3945_read32(priv, CSR_INT);
4579 inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
Zhu Yib481de92007-09-25 17:54:57 -07004580
4581 /* Ignore interrupt if there's nothing in NIC to service.
4582 * This may be due to IRQ shared with another device,
4583 * or due to sporadic interrupts thrown from our NIC. */
4584 if (!inta && !inta_fh) {
4585 IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
4586 goto none;
4587 }
4588
4589 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
4590 /* Hardware disappeared */
4591 IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004592 goto unplugged;
Zhu Yib481de92007-09-25 17:54:57 -07004593 }
4594
4595 IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4596 inta, inta_mask, inta_fh);
4597
Joonwoo Park25c03d82008-01-23 10:15:20 -08004598 inta &= ~CSR_INT_BIT_SCD;
4599
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004600 /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
Joonwoo Park25c03d82008-01-23 10:15:20 -08004601 if (likely(inta || inta_fh))
4602 tasklet_schedule(&priv->irq_tasklet);
Oliver Neukumcb4da1a2007-11-13 21:10:32 -08004603unplugged:
Zhu Yib481de92007-09-25 17:54:57 -07004604 spin_unlock(&priv->lock);
4605
4606 return IRQ_HANDLED;
4607
4608 none:
4609 /* re-enable interrupts here since we don't have anything to service. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004610 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07004611 spin_unlock(&priv->lock);
4612 return IRQ_NONE;
4613}
4614
4615/************************** EEPROM BANDS ****************************
4616 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004617 * The iwl3945_eeprom_band definitions below provide the mapping from the
Zhu Yib481de92007-09-25 17:54:57 -07004618 * EEPROM contents to the specific channel number supported for each
4619 * band.
4620 *
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004621 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
Zhu Yib481de92007-09-25 17:54:57 -07004622 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
4623 * The specific geography and calibration information for that channel
4624 * is contained in the eeprom map itself.
4625 *
4626 * During init, we copy the eeprom information and channel map
4627 * information into priv->channel_info_24/52 and priv->channel_map_24/52
4628 *
4629 * channel_map_24/52 provides the index in the channel_info array for a
4630 * given channel. We have to have two separate maps as there is channel
4631 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
4632 * band_2
4633 *
4634 * A value of 0xff stored in the channel_map indicates that the channel
4635 * is not supported by the hardware at all.
4636 *
4637 * A value of 0xfe in the channel_map indicates that the channel is not
4638 * valid for Tx with the current hardware. This means that
4639 * while the system can tune and receive on a given channel, it may not
4640 * be able to associate or transmit any frames on that
4641 * channel. There is no corresponding channel information for that
4642 * entry.
4643 *
4644 *********************************************************************/
4645
4646/* 2.4 GHz */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004647static const u8 iwl3945_eeprom_band_1[14] = {
Zhu Yib481de92007-09-25 17:54:57 -07004648 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
4649};
4650
4651/* 5.2 GHz bands */
Ben Cahill9fbab512007-11-29 11:09:47 +08004652static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004653 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
4654};
4655
Ben Cahill9fbab512007-11-29 11:09:47 +08004656static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004657 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
4658};
4659
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004660static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004661 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
4662};
4663
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004664static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
Zhu Yib481de92007-09-25 17:54:57 -07004665 145, 149, 153, 157, 161, 165
4666};
4667
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004668static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
Zhu Yib481de92007-09-25 17:54:57 -07004669 int *eeprom_ch_count,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004670 const struct iwl3945_eeprom_channel
Zhu Yib481de92007-09-25 17:54:57 -07004671 **eeprom_ch_info,
4672 const u8 **eeprom_ch_index)
4673{
4674 switch (band) {
4675 case 1: /* 2.4GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004676 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
Zhu Yib481de92007-09-25 17:54:57 -07004677 *eeprom_ch_info = priv->eeprom.band_1_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004678 *eeprom_ch_index = iwl3945_eeprom_band_1;
Zhu Yib481de92007-09-25 17:54:57 -07004679 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004680 case 2: /* 4.9GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004681 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
Zhu Yib481de92007-09-25 17:54:57 -07004682 *eeprom_ch_info = priv->eeprom.band_2_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004683 *eeprom_ch_index = iwl3945_eeprom_band_2;
Zhu Yib481de92007-09-25 17:54:57 -07004684 break;
4685 case 3: /* 5.2GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004686 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
Zhu Yib481de92007-09-25 17:54:57 -07004687 *eeprom_ch_info = priv->eeprom.band_3_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004688 *eeprom_ch_index = iwl3945_eeprom_band_3;
Zhu Yib481de92007-09-25 17:54:57 -07004689 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004690 case 4: /* 5.5GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004691 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
Zhu Yib481de92007-09-25 17:54:57 -07004692 *eeprom_ch_info = priv->eeprom.band_4_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004693 *eeprom_ch_index = iwl3945_eeprom_band_4;
Zhu Yib481de92007-09-25 17:54:57 -07004694 break;
Ben Cahill9fbab512007-11-29 11:09:47 +08004695 case 5: /* 5.7GHz band */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004696 *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004697 *eeprom_ch_info = priv->eeprom.band_5_channels;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004698 *eeprom_ch_index = iwl3945_eeprom_band_5;
Zhu Yib481de92007-09-25 17:54:57 -07004699 break;
4700 default:
4701 BUG();
4702 return;
4703 }
4704}
4705
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004706/**
4707 * iwl3945_get_channel_info - Find driver's private channel info
4708 *
4709 * Based on band and channel number.
4710 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004711const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
Johannes Berg8318d782008-01-24 19:38:38 +01004712 enum ieee80211_band band, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07004713{
4714 int i;
4715
Johannes Berg8318d782008-01-24 19:38:38 +01004716 switch (band) {
4717 case IEEE80211_BAND_5GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004718 for (i = 14; i < priv->channel_count; i++) {
4719 if (priv->channel_info[i].channel == channel)
4720 return &priv->channel_info[i];
4721 }
4722 break;
4723
Johannes Berg8318d782008-01-24 19:38:38 +01004724 case IEEE80211_BAND_2GHZ:
Zhu Yib481de92007-09-25 17:54:57 -07004725 if (channel >= 1 && channel <= 14)
4726 return &priv->channel_info[channel - 1];
4727 break;
Johannes Berg8318d782008-01-24 19:38:38 +01004728 case IEEE80211_NUM_BANDS:
4729 WARN_ON(1);
Zhu Yib481de92007-09-25 17:54:57 -07004730 }
4731
4732 return NULL;
4733}
4734
4735#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
4736 ? # x " " : "")
4737
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004738/**
4739 * iwl3945_init_channel_map - Set up driver's info for all possible channels
4740 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004741static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07004742{
4743 int eeprom_ch_count = 0;
4744 const u8 *eeprom_ch_index = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004745 const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07004746 int band, ch;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004747 struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07004748
4749 if (priv->channel_count) {
4750 IWL_DEBUG_INFO("Channel map already initialized.\n");
4751 return 0;
4752 }
4753
4754 if (priv->eeprom.version < 0x2f) {
4755 IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
4756 priv->eeprom.version);
4757 return -EINVAL;
4758 }
4759
4760 IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
4761
4762 priv->channel_count =
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004763 ARRAY_SIZE(iwl3945_eeprom_band_1) +
4764 ARRAY_SIZE(iwl3945_eeprom_band_2) +
4765 ARRAY_SIZE(iwl3945_eeprom_band_3) +
4766 ARRAY_SIZE(iwl3945_eeprom_band_4) +
4767 ARRAY_SIZE(iwl3945_eeprom_band_5);
Zhu Yib481de92007-09-25 17:54:57 -07004768
4769 IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
4770
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004771 priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
Zhu Yib481de92007-09-25 17:54:57 -07004772 priv->channel_count, GFP_KERNEL);
4773 if (!priv->channel_info) {
4774 IWL_ERROR("Could not allocate channel_info\n");
4775 priv->channel_count = 0;
4776 return -ENOMEM;
4777 }
4778
4779 ch_info = priv->channel_info;
4780
4781 /* Loop through the 5 EEPROM bands adding them in order to the
4782 * channel map we maintain (that contains additional information than
4783 * what just in the EEPROM) */
4784 for (band = 1; band <= 5; band++) {
4785
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004786 iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
Zhu Yib481de92007-09-25 17:54:57 -07004787 &eeprom_ch_info, &eeprom_ch_index);
4788
4789 /* Loop through each band adding each of the channels */
4790 for (ch = 0; ch < eeprom_ch_count; ch++) {
4791 ch_info->channel = eeprom_ch_index[ch];
Johannes Berg8318d782008-01-24 19:38:38 +01004792 ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
4793 IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07004794
4795 /* permanently store EEPROM's channel regulatory flags
4796 * and max power in channel info database. */
4797 ch_info->eeprom = eeprom_ch_info[ch];
4798
4799 /* Copy the run-time flags so they are there even on
4800 * invalid channels */
4801 ch_info->flags = eeprom_ch_info[ch].flags;
4802
4803 if (!(is_channel_valid(ch_info))) {
4804 IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
4805 "No traffic\n",
4806 ch_info->channel,
4807 ch_info->flags,
4808 is_channel_a_band(ch_info) ?
4809 "5.2" : "2.4");
4810 ch_info++;
4811 continue;
4812 }
4813
4814 /* Initialize regulatory-based run-time data */
4815 ch_info->max_power_avg = ch_info->curr_txpow =
4816 eeprom_ch_info[ch].max_power_avg;
4817 ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
4818 ch_info->min_power = 0;
4819
Tomas Winkler8211ef72008-03-02 01:36:04 +02004820 IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
Zhu Yib481de92007-09-25 17:54:57 -07004821 " %ddBm): Ad-Hoc %ssupported\n",
4822 ch_info->channel,
4823 is_channel_a_band(ch_info) ?
4824 "5.2" : "2.4",
Tomas Winkler8211ef72008-03-02 01:36:04 +02004825 CHECK_AND_PRINT(VALID),
Zhu Yib481de92007-09-25 17:54:57 -07004826 CHECK_AND_PRINT(IBSS),
4827 CHECK_AND_PRINT(ACTIVE),
4828 CHECK_AND_PRINT(RADAR),
4829 CHECK_AND_PRINT(WIDE),
4830 CHECK_AND_PRINT(NARROW),
4831 CHECK_AND_PRINT(DFS),
4832 eeprom_ch_info[ch].flags,
4833 eeprom_ch_info[ch].max_power_avg,
4834 ((eeprom_ch_info[ch].
4835 flags & EEPROM_CHANNEL_IBSS)
4836 && !(eeprom_ch_info[ch].
4837 flags & EEPROM_CHANNEL_RADAR))
4838 ? "" : "not ");
4839
4840 /* Set the user_txpower_limit to the highest power
4841 * supported by any channel */
4842 if (eeprom_ch_info[ch].max_power_avg >
4843 priv->user_txpower_limit)
4844 priv->user_txpower_limit =
4845 eeprom_ch_info[ch].max_power_avg;
4846
4847 ch_info++;
4848 }
4849 }
4850
Cahill, Ben M6440adb2007-11-29 11:09:55 +08004851 /* Set up txpower settings in driver for all channels */
Zhu Yib481de92007-09-25 17:54:57 -07004852 if (iwl3945_txpower_set_from_eeprom(priv))
4853 return -EIO;
4854
4855 return 0;
4856}
4857
Reinette Chatre849e0dc2008-01-23 10:15:18 -08004858/*
4859 * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
4860 */
4861static void iwl3945_free_channel_map(struct iwl3945_priv *priv)
4862{
4863 kfree(priv->channel_info);
4864 priv->channel_count = 0;
4865}
4866
Zhu Yib481de92007-09-25 17:54:57 -07004867/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
4868 * sending probe req. This should be set long enough to hear probe responses
4869 * from more than one AP. */
4870#define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
4871#define IWL_ACTIVE_DWELL_TIME_52 (10)
4872
4873/* For faster active scanning, scan will move to the next channel if fewer than
4874 * PLCP_QUIET_THRESH packets are heard on this channel within
4875 * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
4876 * time if it's a quiet channel (nothing responded to our probe, and there's
4877 * no other traffic).
4878 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
4879#define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
4880#define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
4881
4882/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
4883 * Must be set longer than active dwell time.
4884 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
4885#define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
4886#define IWL_PASSIVE_DWELL_TIME_52 (10)
4887#define IWL_PASSIVE_DWELL_BASE (100)
4888#define IWL_CHANNEL_TUNE_TIME 5
4889
Johannes Berg8318d782008-01-24 19:38:38 +01004890static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv,
4891 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07004892{
Johannes Berg8318d782008-01-24 19:38:38 +01004893 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07004894 return IWL_ACTIVE_DWELL_TIME_52;
4895 else
4896 return IWL_ACTIVE_DWELL_TIME_24;
4897}
4898
Johannes Berg8318d782008-01-24 19:38:38 +01004899static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv,
4900 enum ieee80211_band band)
Zhu Yib481de92007-09-25 17:54:57 -07004901{
Johannes Berg8318d782008-01-24 19:38:38 +01004902 u16 active = iwl3945_get_active_dwell_time(priv, band);
4903 u16 passive = (band == IEEE80211_BAND_2GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07004904 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
4905 IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
4906
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004907 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004908 /* If we're associated, we clamp the maximum passive
4909 * dwell time to be 98% of the beacon interval (minus
4910 * 2 * channel tune time) */
4911 passive = priv->beacon_int;
4912 if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
4913 passive = IWL_PASSIVE_DWELL_BASE;
4914 passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
4915 }
4916
4917 if (passive <= active)
4918 passive = active + 1;
4919
4920 return passive;
4921}
4922
Johannes Berg8318d782008-01-24 19:38:38 +01004923static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv,
4924 enum ieee80211_band band,
Zhu Yib481de92007-09-25 17:54:57 -07004925 u8 is_active, u8 direct_mask,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004926 struct iwl3945_scan_channel *scan_ch)
Zhu Yib481de92007-09-25 17:54:57 -07004927{
4928 const struct ieee80211_channel *channels = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01004929 const struct ieee80211_supported_band *sband;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004930 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07004931 u16 passive_dwell = 0;
4932 u16 active_dwell = 0;
4933 int added, i;
4934
Johannes Berg8318d782008-01-24 19:38:38 +01004935 sband = iwl3945_get_band(priv, band);
4936 if (!sband)
Zhu Yib481de92007-09-25 17:54:57 -07004937 return 0;
4938
Johannes Berg8318d782008-01-24 19:38:38 +01004939 channels = sband->channels;
Zhu Yib481de92007-09-25 17:54:57 -07004940
Johannes Berg8318d782008-01-24 19:38:38 +01004941 active_dwell = iwl3945_get_active_dwell_time(priv, band);
4942 passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
Zhu Yib481de92007-09-25 17:54:57 -07004943
Johannes Berg8318d782008-01-24 19:38:38 +01004944 for (i = 0, added = 0; i < sband->n_channels; i++) {
4945 if (channels[i].hw_value ==
Zhu Yib481de92007-09-25 17:54:57 -07004946 le16_to_cpu(priv->active_rxon.channel)) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08004947 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07004948 IWL_DEBUG_SCAN
4949 ("Skipping current channel %d\n",
4950 le16_to_cpu(priv->active_rxon.channel));
4951 continue;
4952 }
4953 } else if (priv->only_active_channel)
4954 continue;
4955
Johannes Berg8318d782008-01-24 19:38:38 +01004956 scan_ch->channel = channels[i].hw_value;
Zhu Yib481de92007-09-25 17:54:57 -07004957
Johannes Berg8318d782008-01-24 19:38:38 +01004958 ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
Zhu Yib481de92007-09-25 17:54:57 -07004959 if (!is_channel_valid(ch_info)) {
4960 IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
4961 scan_ch->channel);
4962 continue;
4963 }
4964
4965 if (!is_active || is_channel_passive(ch_info) ||
Johannes Berg8318d782008-01-24 19:38:38 +01004966 (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
Zhu Yib481de92007-09-25 17:54:57 -07004967 scan_ch->type = 0; /* passive */
4968 else
4969 scan_ch->type = 1; /* active */
4970
4971 if (scan_ch->type & 1)
4972 scan_ch->type |= (direct_mask << 1);
4973
4974 if (is_channel_narrow(ch_info))
4975 scan_ch->type |= (1 << 7);
4976
4977 scan_ch->active_dwell = cpu_to_le16(active_dwell);
4978 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
4979
Ben Cahill9fbab512007-11-29 11:09:47 +08004980 /* Set txpower levels to defaults */
Zhu Yib481de92007-09-25 17:54:57 -07004981 scan_ch->tpc.dsp_atten = 110;
4982 /* scan_pwr_info->tpc.dsp_atten; */
4983
4984 /*scan_pwr_info->tpc.tx_gain; */
Johannes Berg8318d782008-01-24 19:38:38 +01004985 if (band == IEEE80211_BAND_5GHZ)
Zhu Yib481de92007-09-25 17:54:57 -07004986 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
4987 else {
4988 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
4989 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
Ben Cahill9fbab512007-11-29 11:09:47 +08004990 * power level:
Reinette Chatre8a1b0242008-01-14 17:46:25 -08004991 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
Zhu Yib481de92007-09-25 17:54:57 -07004992 */
4993 }
4994
4995 IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
4996 scan_ch->channel,
4997 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
4998 (scan_ch->type & 1) ?
4999 active_dwell : passive_dwell);
5000
5001 scan_ch++;
5002 added++;
5003 }
5004
5005 IWL_DEBUG_SCAN("total channels to scan %d \n", added);
5006 return added;
5007}
5008
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005009static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
Zhu Yib481de92007-09-25 17:54:57 -07005010 struct ieee80211_rate *rates)
5011{
5012 int i;
5013
5014 for (i = 0; i < IWL_RATE_COUNT; i++) {
Johannes Berg8318d782008-01-24 19:38:38 +01005015 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
5016 rates[i].hw_value = i; /* Rate scaling will work on indexes */
5017 rates[i].hw_value_short = i;
5018 rates[i].flags = 0;
5019 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
Zhu Yib481de92007-09-25 17:54:57 -07005020 /*
Johannes Berg8318d782008-01-24 19:38:38 +01005021 * If CCK != 1M then set short preamble rate flag.
Zhu Yib481de92007-09-25 17:54:57 -07005022 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005023 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
Johannes Berg8318d782008-01-24 19:38:38 +01005024 0 : IEEE80211_RATE_SHORT_PREAMBLE;
Zhu Yib481de92007-09-25 17:54:57 -07005025 }
Zhu Yib481de92007-09-25 17:54:57 -07005026 }
5027}
5028
5029/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005030 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
Zhu Yib481de92007-09-25 17:54:57 -07005031 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005032static int iwl3945_init_geos(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005033{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005034 struct iwl3945_channel_info *ch;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005035 struct ieee80211_supported_band *sband;
Zhu Yib481de92007-09-25 17:54:57 -07005036 struct ieee80211_channel *channels;
5037 struct ieee80211_channel *geo_ch;
5038 struct ieee80211_rate *rates;
5039 int i = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005040
Johannes Berg8318d782008-01-24 19:38:38 +01005041 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
5042 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
Zhu Yib481de92007-09-25 17:54:57 -07005043 IWL_DEBUG_INFO("Geography modes already initialized.\n");
5044 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5045 return 0;
5046 }
5047
Zhu Yib481de92007-09-25 17:54:57 -07005048 channels = kzalloc(sizeof(struct ieee80211_channel) *
5049 priv->channel_count, GFP_KERNEL);
Johannes Berg8318d782008-01-24 19:38:38 +01005050 if (!channels)
Zhu Yib481de92007-09-25 17:54:57 -07005051 return -ENOMEM;
Zhu Yib481de92007-09-25 17:54:57 -07005052
Tomas Winkler8211ef72008-03-02 01:36:04 +02005053 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
Zhu Yib481de92007-09-25 17:54:57 -07005054 GFP_KERNEL);
5055 if (!rates) {
Zhu Yib481de92007-09-25 17:54:57 -07005056 kfree(channels);
5057 return -ENOMEM;
5058 }
5059
Zhu Yib481de92007-09-25 17:54:57 -07005060 /* 5.2GHz channels start after the 2.4GHz channels */
Tomas Winkler8211ef72008-03-02 01:36:04 +02005061 sband = &priv->bands[IEEE80211_BAND_5GHZ];
5062 sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5063 /* just OFDM */
5064 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5065 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
Zhu Yib481de92007-09-25 17:54:57 -07005066
Tomas Winkler8211ef72008-03-02 01:36:04 +02005067 sband = &priv->bands[IEEE80211_BAND_2GHZ];
5068 sband->channels = channels;
5069 /* OFDM & CCK */
5070 sband->bitrates = rates;
5071 sband->n_bitrates = IWL_RATE_COUNT;
Zhu Yib481de92007-09-25 17:54:57 -07005072
5073 priv->ieee_channels = channels;
5074 priv->ieee_rates = rates;
5075
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005076 iwl3945_init_hw_rates(priv, rates);
Zhu Yib481de92007-09-25 17:54:57 -07005077
Tomas Winkler8211ef72008-03-02 01:36:04 +02005078 for (i = 0; i < priv->channel_count; i++) {
Zhu Yib481de92007-09-25 17:54:57 -07005079 ch = &priv->channel_info[i];
5080
Tomas Winkler8211ef72008-03-02 01:36:04 +02005081 /* FIXME: might be removed if scan is OK*/
5082 if (!is_channel_valid(ch))
Zhu Yib481de92007-09-25 17:54:57 -07005083 continue;
Zhu Yib481de92007-09-25 17:54:57 -07005084
5085 if (is_channel_a_band(ch))
Tomas Winkler8211ef72008-03-02 01:36:04 +02005086 sband = &priv->bands[IEEE80211_BAND_5GHZ];
Johannes Berg8318d782008-01-24 19:38:38 +01005087 else
Tomas Winkler8211ef72008-03-02 01:36:04 +02005088 sband = &priv->bands[IEEE80211_BAND_2GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005089
Tomas Winkler8211ef72008-03-02 01:36:04 +02005090 geo_ch = &sband->channels[sband->n_channels++];
5091
5092 geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
Johannes Berg8318d782008-01-24 19:38:38 +01005093 geo_ch->max_power = ch->max_power_avg;
5094 geo_ch->max_antenna_gain = 0xff;
Mohamed Abbas7b723042008-01-31 21:46:40 -08005095 geo_ch->hw_value = ch->channel;
Zhu Yib481de92007-09-25 17:54:57 -07005096
5097 if (is_channel_valid(ch)) {
Johannes Berg8318d782008-01-24 19:38:38 +01005098 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
5099 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
Zhu Yib481de92007-09-25 17:54:57 -07005100
Johannes Berg8318d782008-01-24 19:38:38 +01005101 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
5102 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07005103
5104 if (ch->flags & EEPROM_CHANNEL_RADAR)
Johannes Berg8318d782008-01-24 19:38:38 +01005105 geo_ch->flags |= IEEE80211_CHAN_RADAR;
Zhu Yib481de92007-09-25 17:54:57 -07005106
5107 if (ch->max_power_avg > priv->max_channel_txpower_limit)
5108 priv->max_channel_txpower_limit =
5109 ch->max_power_avg;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005110 } else {
Johannes Berg8318d782008-01-24 19:38:38 +01005111 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
Tomas Winkler8211ef72008-03-02 01:36:04 +02005112 }
5113
5114 /* Save flags for reg domain usage */
5115 geo_ch->orig_flags = geo_ch->flags;
5116
5117 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
5118 ch->channel, geo_ch->center_freq,
5119 is_channel_a_band(ch) ? "5.2" : "2.4",
5120 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
5121 "restricted" : "valid",
5122 geo_ch->flags);
Zhu Yib481de92007-09-25 17:54:57 -07005123 }
5124
Tomas Winkler82b9a122008-03-04 18:09:30 -08005125 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
5126 priv->cfg->sku & IWL_SKU_A) {
Zhu Yib481de92007-09-25 17:54:57 -07005127 printk(KERN_INFO DRV_NAME
5128 ": Incorrectly detected BG card as ABG. Please send "
5129 "your PCI ID 0x%04X:0x%04X to maintainer.\n",
5130 priv->pci_dev->device, priv->pci_dev->subsystem_device);
Tomas Winkler82b9a122008-03-04 18:09:30 -08005131 priv->cfg->sku &= ~IWL_SKU_A;
Zhu Yib481de92007-09-25 17:54:57 -07005132 }
5133
5134 printk(KERN_INFO DRV_NAME
5135 ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
Johannes Berg8318d782008-01-24 19:38:38 +01005136 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5137 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
Zhu Yib481de92007-09-25 17:54:57 -07005138
John W. Linvillee0e0a672008-03-25 15:58:40 -04005139 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5140 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5141 &priv->bands[IEEE80211_BAND_2GHZ];
5142 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5143 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5144 &priv->bands[IEEE80211_BAND_5GHZ];
Zhu Yib481de92007-09-25 17:54:57 -07005145
Zhu Yib481de92007-09-25 17:54:57 -07005146 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5147
5148 return 0;
5149}
5150
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005151/*
5152 * iwl3945_free_geos - undo allocations in iwl3945_init_geos
5153 */
5154static void iwl3945_free_geos(struct iwl3945_priv *priv)
5155{
Reinette Chatre849e0dc2008-01-23 10:15:18 -08005156 kfree(priv->ieee_channels);
5157 kfree(priv->ieee_rates);
5158 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
5159}
5160
Zhu Yib481de92007-09-25 17:54:57 -07005161/******************************************************************************
5162 *
5163 * uCode download functions
5164 *
5165 ******************************************************************************/
5166
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005167static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005168{
Tomas Winkler98c92212008-01-14 17:46:20 -08005169 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
5170 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
5171 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
5172 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
5173 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
5174 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
Zhu Yib481de92007-09-25 17:54:57 -07005175}
5176
5177/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005178 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005179 * looking at all data.
5180 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005181static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005182{
5183 u32 val;
5184 u32 save_len = len;
5185 int rc = 0;
5186 u32 errcnt;
5187
5188 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5189
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005190 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005191 if (rc)
5192 return rc;
5193
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005194 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -07005195
5196 errcnt = 0;
5197 for (; len > 0; len -= sizeof(u32), image++) {
5198 /* read data comes through single port, auto-incr addr */
5199 /* NOTE: Use the debugless read so we don't flood kernel log
5200 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005201 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005202 if (val != le32_to_cpu(*image)) {
5203 IWL_ERROR("uCode INST section is invalid at "
5204 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5205 save_len - len, val, le32_to_cpu(*image));
5206 rc = -EIO;
5207 errcnt++;
5208 if (errcnt >= 20)
5209 break;
5210 }
5211 }
5212
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005213 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005214
5215 if (!errcnt)
Ian Schrambc434dd2007-10-25 17:15:29 +08005216 IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
Zhu Yib481de92007-09-25 17:54:57 -07005217
5218 return rc;
5219}
5220
5221
5222/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005223 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
Zhu Yib481de92007-09-25 17:54:57 -07005224 * using sample data 100 bytes apart. If these sample points are good,
5225 * it's a pretty good bet that everything between them is good, too.
5226 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005227static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
Zhu Yib481de92007-09-25 17:54:57 -07005228{
5229 u32 val;
5230 int rc = 0;
5231 u32 errcnt = 0;
5232 u32 i;
5233
5234 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5235
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005236 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005237 if (rc)
5238 return rc;
5239
5240 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
5241 /* read data comes through single port, auto-incr addr */
5242 /* NOTE: Use the debugless read so we don't flood kernel log
5243 * if IWL_DL_IO is set */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005244 iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
Zhu Yib481de92007-09-25 17:54:57 -07005245 i + RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005246 val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
Zhu Yib481de92007-09-25 17:54:57 -07005247 if (val != le32_to_cpu(*image)) {
5248#if 0 /* Enable this if you want to see details */
5249 IWL_ERROR("uCode INST section is invalid at "
5250 "offset 0x%x, is 0x%x, s/b 0x%x\n",
5251 i, val, *image);
5252#endif
5253 rc = -EIO;
5254 errcnt++;
5255 if (errcnt >= 3)
5256 break;
5257 }
5258 }
5259
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005260 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005261
5262 return rc;
5263}
5264
5265
5266/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005267 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
Zhu Yib481de92007-09-25 17:54:57 -07005268 * and verify its contents
5269 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005270static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005271{
5272 __le32 *image;
5273 u32 len;
5274 int rc = 0;
5275
5276 /* Try bootstrap */
5277 image = (__le32 *)priv->ucode_boot.v_addr;
5278 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005279 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005280 if (rc == 0) {
5281 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
5282 return 0;
5283 }
5284
5285 /* Try initialize */
5286 image = (__le32 *)priv->ucode_init.v_addr;
5287 len = priv->ucode_init.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005288 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005289 if (rc == 0) {
5290 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
5291 return 0;
5292 }
5293
5294 /* Try runtime/protocol */
5295 image = (__le32 *)priv->ucode_code.v_addr;
5296 len = priv->ucode_code.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005297 rc = iwl3945_verify_inst_sparse(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005298 if (rc == 0) {
5299 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
5300 return 0;
5301 }
5302
5303 IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
5304
Ben Cahill9fbab512007-11-29 11:09:47 +08005305 /* Since nothing seems to match, show first several data entries in
5306 * instruction SRAM, so maybe visual inspection will give a clue.
5307 * Selection of bootstrap image (vs. other images) is arbitrary. */
Zhu Yib481de92007-09-25 17:54:57 -07005308 image = (__le32 *)priv->ucode_boot.v_addr;
5309 len = priv->ucode_boot.len;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005310 rc = iwl3945_verify_inst_full(priv, image, len);
Zhu Yib481de92007-09-25 17:54:57 -07005311
5312 return rc;
5313}
5314
5315
5316/* check contents of special bootstrap uCode SRAM */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005317static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005318{
5319 __le32 *image = priv->ucode_boot.v_addr;
5320 u32 len = priv->ucode_boot.len;
5321 u32 reg;
5322 u32 val;
5323
5324 IWL_DEBUG_INFO("Begin verify bsm\n");
5325
5326 /* verify BSM SRAM contents */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005327 val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005328 for (reg = BSM_SRAM_LOWER_BOUND;
5329 reg < BSM_SRAM_LOWER_BOUND + len;
5330 reg += sizeof(u32), image ++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005331 val = iwl3945_read_prph(priv, reg);
Zhu Yib481de92007-09-25 17:54:57 -07005332 if (val != le32_to_cpu(*image)) {
5333 IWL_ERROR("BSM uCode verification failed at "
5334 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
5335 BSM_SRAM_LOWER_BOUND,
5336 reg - BSM_SRAM_LOWER_BOUND, len,
5337 val, le32_to_cpu(*image));
5338 return -EIO;
5339 }
5340 }
5341
5342 IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
5343
5344 return 0;
5345}
5346
5347/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005348 * iwl3945_load_bsm - Load bootstrap instructions
Zhu Yib481de92007-09-25 17:54:57 -07005349 *
5350 * BSM operation:
5351 *
5352 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
5353 * in special SRAM that does not power down during RFKILL. When powering back
5354 * up after power-saving sleeps (or during initial uCode load), the BSM loads
5355 * the bootstrap program into the on-board processor, and starts it.
5356 *
5357 * The bootstrap program loads (via DMA) instructions and data for a new
5358 * program from host DRAM locations indicated by the host driver in the
5359 * BSM_DRAM_* registers. Once the new program is loaded, it starts
5360 * automatically.
5361 *
5362 * When initializing the NIC, the host driver points the BSM to the
5363 * "initialize" uCode image. This uCode sets up some internal data, then
5364 * notifies host via "initialize alive" that it is complete.
5365 *
5366 * The host then replaces the BSM_DRAM_* pointer values to point to the
5367 * normal runtime uCode instructions and a backup uCode data cache buffer
5368 * (filled initially with starting data values for the on-board processor),
5369 * then triggers the "initialize" uCode to load and launch the runtime uCode,
5370 * which begins normal operation.
5371 *
5372 * When doing a power-save shutdown, runtime uCode saves data SRAM into
5373 * the backup data cache in DRAM before SRAM is powered down.
5374 *
5375 * When powering back up, the BSM loads the bootstrap program. This reloads
5376 * the runtime uCode instructions and the backup data cache into SRAM,
5377 * and re-launches the runtime uCode from where it left off.
5378 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005379static int iwl3945_load_bsm(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005380{
5381 __le32 *image = priv->ucode_boot.v_addr;
5382 u32 len = priv->ucode_boot.len;
5383 dma_addr_t pinst;
5384 dma_addr_t pdata;
5385 u32 inst_len;
5386 u32 data_len;
5387 int rc;
5388 int i;
5389 u32 done;
5390 u32 reg_offset;
5391
5392 IWL_DEBUG_INFO("Begin load bsm\n");
5393
5394 /* make sure bootstrap program is no larger than BSM's SRAM size */
5395 if (len > IWL_MAX_BSM_SIZE)
5396 return -EINVAL;
5397
5398 /* Tell bootstrap uCode where to find the "Initialize" uCode
Ben Cahill9fbab512007-11-29 11:09:47 +08005399 * in host DRAM ... host DRAM physical address bits 31:0 for 3945.
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005400 * NOTE: iwl3945_initialize_alive_start() will replace these values,
Zhu Yib481de92007-09-25 17:54:57 -07005401 * after the "initialize" uCode has run, to point to
5402 * runtime/protocol instructions and backup data cache. */
5403 pinst = priv->ucode_init.p_addr;
5404 pdata = priv->ucode_init_data.p_addr;
5405 inst_len = priv->ucode_init.len;
5406 data_len = priv->ucode_init_data.len;
5407
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005408 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005409 if (rc)
5410 return rc;
5411
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005412 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5413 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5414 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5415 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
Zhu Yib481de92007-09-25 17:54:57 -07005416
5417 /* Fill BSM memory with bootstrap instructions */
5418 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5419 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5420 reg_offset += sizeof(u32), image++)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005421 _iwl3945_write_prph(priv, reg_offset,
Zhu Yib481de92007-09-25 17:54:57 -07005422 le32_to_cpu(*image));
5423
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005424 rc = iwl3945_verify_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005425 if (rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005426 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005427 return rc;
5428 }
5429
5430 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005431 iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5432 iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005433 RTC_INST_LOWER_BOUND);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005434 iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
Zhu Yib481de92007-09-25 17:54:57 -07005435
5436 /* Load bootstrap code into instruction SRAM now,
5437 * to prepare to load "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005438 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005439 BSM_WR_CTRL_REG_BIT_START);
5440
5441 /* Wait for load of bootstrap uCode to finish */
5442 for (i = 0; i < 100; i++) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005443 done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005444 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5445 break;
5446 udelay(10);
5447 }
5448 if (i < 100)
5449 IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
5450 else {
5451 IWL_ERROR("BSM write did not complete!\n");
5452 return -EIO;
5453 }
5454
5455 /* Enable future boot loads whenever power management unit triggers it
5456 * (e.g. when powering back up after power-save shutdown) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005457 iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005458 BSM_WR_CTRL_REG_BIT_START_EN);
5459
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005460 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005461
5462 return 0;
5463}
5464
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005465static void iwl3945_nic_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005466{
5467 /* Remove all resets to allow NIC to operate */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005468 iwl3945_write32(priv, CSR_RESET, 0);
Zhu Yib481de92007-09-25 17:54:57 -07005469}
5470
5471/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005472 * iwl3945_read_ucode - Read uCode images from disk file.
Zhu Yib481de92007-09-25 17:54:57 -07005473 *
5474 * Copy into buffers for card to fetch via bus-mastering
5475 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005476static int iwl3945_read_ucode(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005477{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005478 struct iwl3945_ucode *ucode;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005479 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07005480 const struct firmware *ucode_raw;
5481 /* firmware file name contains uCode/driver compatibility version */
Tomas Winkler4bf775cd2008-03-04 18:09:31 -08005482 const char *name = priv->cfg->fw_name;
Zhu Yib481de92007-09-25 17:54:57 -07005483 u8 *src;
5484 size_t len;
5485 u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
5486
5487 /* Ask kernel firmware_class module to get the boot firmware off disk.
5488 * request_firmware() is synchronous, file is in memory on return. */
Tomas Winkler90e759d2007-11-29 11:09:41 +08005489 ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
5490 if (ret < 0) {
5491 IWL_ERROR("%s firmware file req failed: Reason %d\n",
5492 name, ret);
Zhu Yib481de92007-09-25 17:54:57 -07005493 goto error;
5494 }
5495
5496 IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
5497 name, ucode_raw->size);
5498
5499 /* Make sure that we got at least our header! */
5500 if (ucode_raw->size < sizeof(*ucode)) {
5501 IWL_ERROR("File size way too small!\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005502 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005503 goto err_release;
5504 }
5505
5506 /* Data from ucode file: header followed by uCode images */
5507 ucode = (void *)ucode_raw->data;
5508
5509 ver = le32_to_cpu(ucode->ver);
5510 inst_size = le32_to_cpu(ucode->inst_size);
5511 data_size = le32_to_cpu(ucode->data_size);
5512 init_size = le32_to_cpu(ucode->init_size);
5513 init_data_size = le32_to_cpu(ucode->init_data_size);
5514 boot_size = le32_to_cpu(ucode->boot_size);
5515
5516 IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
Ian Schrambc434dd2007-10-25 17:15:29 +08005517 IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
5518 IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
5519 IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
5520 IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
5521 IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
Zhu Yib481de92007-09-25 17:54:57 -07005522
5523 /* Verify size of file vs. image size info in file's header */
5524 if (ucode_raw->size < sizeof(*ucode) +
5525 inst_size + data_size + init_size +
5526 init_data_size + boot_size) {
5527
5528 IWL_DEBUG_INFO("uCode file size %d too small\n",
5529 (int)ucode_raw->size);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005530 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005531 goto err_release;
5532 }
5533
5534 /* Verify that uCode images will fit in card's SRAM */
5535 if (inst_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005536 IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
5537 inst_size);
5538 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005539 goto err_release;
5540 }
5541
5542 if (data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005543 IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
5544 data_size);
5545 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005546 goto err_release;
5547 }
5548 if (init_size > IWL_MAX_INST_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005549 IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
5550 init_size);
5551 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005552 goto err_release;
5553 }
5554 if (init_data_size > IWL_MAX_DATA_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005555 IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
5556 init_data_size);
5557 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005558 goto err_release;
5559 }
5560 if (boot_size > IWL_MAX_BSM_SIZE) {
Tomas Winkler90e759d2007-11-29 11:09:41 +08005561 IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
5562 boot_size);
5563 ret = -EINVAL;
Zhu Yib481de92007-09-25 17:54:57 -07005564 goto err_release;
5565 }
5566
5567 /* Allocate ucode buffers for card's bus-master loading ... */
5568
5569 /* Runtime instructions and 2 copies of data:
5570 * 1) unmodified from disk
5571 * 2) backup cache for save/restore during power-downs */
5572 priv->ucode_code.len = inst_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005573 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
Zhu Yib481de92007-09-25 17:54:57 -07005574
5575 priv->ucode_data.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005576 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
Zhu Yib481de92007-09-25 17:54:57 -07005577
5578 priv->ucode_data_backup.len = data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005579 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
Zhu Yib481de92007-09-25 17:54:57 -07005580
5581 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
Tomas Winkler90e759d2007-11-29 11:09:41 +08005582 !priv->ucode_data_backup.v_addr)
Zhu Yib481de92007-09-25 17:54:57 -07005583 goto err_pci_alloc;
5584
Tomas Winkler90e759d2007-11-29 11:09:41 +08005585 /* Initialization instructions and data */
5586 if (init_size && init_data_size) {
5587 priv->ucode_init.len = init_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005588 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005589
5590 priv->ucode_init_data.len = init_data_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005591 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005592
5593 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
5594 goto err_pci_alloc;
5595 }
5596
5597 /* Bootstrap (instructions only, no data) */
5598 if (boot_size) {
5599 priv->ucode_boot.len = boot_size;
Tomas Winkler98c92212008-01-14 17:46:20 -08005600 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
Tomas Winkler90e759d2007-11-29 11:09:41 +08005601
5602 if (!priv->ucode_boot.v_addr)
5603 goto err_pci_alloc;
5604 }
5605
Zhu Yib481de92007-09-25 17:54:57 -07005606 /* Copy images into buffers for card's bus-master reads ... */
5607
5608 /* Runtime instructions (first block of data in file) */
5609 src = &ucode->data[0];
5610 len = priv->ucode_code.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005611 IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005612 memcpy(priv->ucode_code.v_addr, src, len);
5613 IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
5614 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
5615
5616 /* Runtime data (2nd block)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005617 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
Zhu Yib481de92007-09-25 17:54:57 -07005618 src = &ucode->data[inst_size];
5619 len = priv->ucode_data.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005620 IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
Zhu Yib481de92007-09-25 17:54:57 -07005621 memcpy(priv->ucode_data.v_addr, src, len);
5622 memcpy(priv->ucode_data_backup.v_addr, src, len);
5623
5624 /* Initialization instructions (3rd block) */
5625 if (init_size) {
5626 src = &ucode->data[inst_size + data_size];
5627 len = priv->ucode_init.len;
Tomas Winkler90e759d2007-11-29 11:09:41 +08005628 IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
5629 len);
Zhu Yib481de92007-09-25 17:54:57 -07005630 memcpy(priv->ucode_init.v_addr, src, len);
5631 }
5632
5633 /* Initialization data (4th block) */
5634 if (init_data_size) {
5635 src = &ucode->data[inst_size + data_size + init_size];
5636 len = priv->ucode_init_data.len;
5637 IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
5638 (int)len);
5639 memcpy(priv->ucode_init_data.v_addr, src, len);
5640 }
5641
5642 /* Bootstrap instructions (5th block) */
5643 src = &ucode->data[inst_size + data_size + init_size + init_data_size];
5644 len = priv->ucode_boot.len;
5645 IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
5646 (int)len);
5647 memcpy(priv->ucode_boot.v_addr, src, len);
5648
5649 /* We have our copies now, allow OS release its copies */
5650 release_firmware(ucode_raw);
5651 return 0;
5652
5653 err_pci_alloc:
5654 IWL_ERROR("failed to allocate pci memory\n");
Tomas Winkler90e759d2007-11-29 11:09:41 +08005655 ret = -ENOMEM;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005656 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005657
5658 err_release:
5659 release_firmware(ucode_raw);
5660
5661 error:
Tomas Winkler90e759d2007-11-29 11:09:41 +08005662 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07005663}
5664
5665
5666/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005667 * iwl3945_set_ucode_ptrs - Set uCode address location
Zhu Yib481de92007-09-25 17:54:57 -07005668 *
5669 * Tell initialization uCode where to find runtime uCode.
5670 *
5671 * BSM registers initially contain pointers to initialization uCode.
5672 * We need to replace them to load runtime uCode inst and data,
5673 * and to save runtime data when powering down.
5674 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005675static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005676{
5677 dma_addr_t pinst;
5678 dma_addr_t pdata;
5679 int rc = 0;
5680 unsigned long flags;
5681
5682 /* bits 31:0 for 3945 */
5683 pinst = priv->ucode_code.p_addr;
5684 pdata = priv->ucode_data_backup.p_addr;
5685
5686 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005687 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005688 if (rc) {
5689 spin_unlock_irqrestore(&priv->lock, flags);
5690 return rc;
5691 }
5692
5693 /* Tell bootstrap uCode where to find image to load */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005694 iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5695 iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5696 iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005697 priv->ucode_data.len);
5698
5699 /* Inst bytecount must be last to set up, bit 31 signals uCode
5700 * that all new ptr/size info is in place */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005701 iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005702 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5703
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005704 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005705
5706 spin_unlock_irqrestore(&priv->lock, flags);
5707
5708 IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
5709
5710 return rc;
5711}
5712
5713/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005714 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005715 *
5716 * Called after REPLY_ALIVE notification received from "initialize" uCode.
5717 *
Zhu Yib481de92007-09-25 17:54:57 -07005718 * Tell "initialize" uCode to go ahead and load the runtime uCode.
Ben Cahill9fbab512007-11-29 11:09:47 +08005719 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005720static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005721{
5722 /* Check alive response for "valid" sign from uCode */
5723 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
5724 /* We had an error bringing up the hardware, so take it
5725 * all the way back down so we can try again */
5726 IWL_DEBUG_INFO("Initialize Alive failed.\n");
5727 goto restart;
5728 }
5729
5730 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
5731 * This is a paranoid check, because we would not have gotten the
5732 * "initialize" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005733 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005734 /* Runtime instruction load was bad;
5735 * take it all the way back down so we can try again */
5736 IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
5737 goto restart;
5738 }
5739
5740 /* Send pointers to protocol/runtime uCode image ... init code will
5741 * load and launch runtime uCode, which will send us another "Alive"
5742 * notification. */
5743 IWL_DEBUG_INFO("Initialization Alive received.\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005744 if (iwl3945_set_ucode_ptrs(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005745 /* Runtime instruction load won't happen;
5746 * take it all the way back down so we can try again */
5747 IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
5748 goto restart;
5749 }
5750 return;
5751
5752 restart:
5753 queue_work(priv->workqueue, &priv->restart);
5754}
5755
5756
5757/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005758 * iwl3945_alive_start - called after REPLY_ALIVE notification received
Zhu Yib481de92007-09-25 17:54:57 -07005759 * from protocol/runtime uCode (initialization uCode's
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005760 * Alive gets handled by iwl3945_init_alive_start()).
Zhu Yib481de92007-09-25 17:54:57 -07005761 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005762static void iwl3945_alive_start(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005763{
5764 int rc = 0;
5765 int thermal_spin = 0;
5766 u32 rfkill;
5767
5768 IWL_DEBUG_INFO("Runtime Alive received.\n");
5769
5770 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
5771 /* We had an error bringing up the hardware, so take it
5772 * all the way back down so we can try again */
5773 IWL_DEBUG_INFO("Alive failed.\n");
5774 goto restart;
5775 }
5776
5777 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5778 * This is a paranoid check, because we would not have gotten the
5779 * "runtime" alive if code weren't properly loaded. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005780 if (iwl3945_verify_ucode(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005781 /* Runtime instruction load was bad;
5782 * take it all the way back down so we can try again */
5783 IWL_DEBUG_INFO("Bad runtime uCode load.\n");
5784 goto restart;
5785 }
5786
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005787 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005788
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005789 rc = iwl3945_grab_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005790 if (rc) {
5791 IWL_WARNING("Can not read rfkill status from adapter\n");
5792 return;
5793 }
5794
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005795 rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
Zhu Yib481de92007-09-25 17:54:57 -07005796 IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005797 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005798
5799 if (rfkill & 0x1) {
5800 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5801 /* if rfkill is not on, then wait for thermal
5802 * sensor in adapter to kick in */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005803 while (iwl3945_hw_get_temperature(priv) == 0) {
Zhu Yib481de92007-09-25 17:54:57 -07005804 thermal_spin++;
5805 udelay(10);
5806 }
5807
5808 if (thermal_spin)
5809 IWL_DEBUG_INFO("Thermal calibration took %dus\n",
5810 thermal_spin * 10);
5811 } else
5812 set_bit(STATUS_RF_KILL_HW, &priv->status);
5813
Ben Cahill9fbab512007-11-29 11:09:47 +08005814 /* After the ALIVE response, we can send commands to 3945 uCode */
Zhu Yib481de92007-09-25 17:54:57 -07005815 set_bit(STATUS_ALIVE, &priv->status);
5816
5817 /* Clear out the uCode error bit if it is set */
5818 clear_bit(STATUS_FW_ERROR, &priv->status);
5819
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005820 if (iwl3945_is_rfkill(priv))
Zhu Yib481de92007-09-25 17:54:57 -07005821 return;
5822
Zhu Yi5a669262008-01-14 17:46:18 -08005823 ieee80211_start_queues(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07005824
5825 priv->active_rate = priv->rates_mask;
5826 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
5827
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005828 iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
Zhu Yib481de92007-09-25 17:54:57 -07005829
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005830 if (iwl3945_is_associated(priv)) {
5831 struct iwl3945_rxon_cmd *active_rxon =
5832 (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
Zhu Yib481de92007-09-25 17:54:57 -07005833
5834 memcpy(&priv->staging_rxon, &priv->active_rxon,
5835 sizeof(priv->staging_rxon));
5836 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5837 } else {
5838 /* Initialize our rx_config data */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005839 iwl3945_connection_init_rx_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005840 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
5841 }
5842
Ben Cahill9fbab512007-11-29 11:09:47 +08005843 /* Configure Bluetooth device coexistence support */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005844 iwl3945_send_bt_config(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005845
5846 /* Configure the adapter for unassociated operation */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005847 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005848
5849 /* At this point, the NIC is initialized and operational */
5850 priv->notif_missed_beacons = 0;
5851 set_bit(STATUS_READY, &priv->status);
5852
5853 iwl3945_reg_txpower_periodic(priv);
5854
5855 IWL_DEBUG_INFO("ALIVE processing complete.\n");
Zhu Yi5a669262008-01-14 17:46:18 -08005856 wake_up_interruptible(&priv->wait_command_queue);
Zhu Yib481de92007-09-25 17:54:57 -07005857
5858 if (priv->error_recovering)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005859 iwl3945_error_recovery(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005860
5861 return;
5862
5863 restart:
5864 queue_work(priv->workqueue, &priv->restart);
5865}
5866
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005867static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
Zhu Yib481de92007-09-25 17:54:57 -07005868
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005869static void __iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005870{
5871 unsigned long flags;
5872 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
5873 struct ieee80211_conf *conf = NULL;
5874
5875 IWL_DEBUG_INFO(DRV_NAME " is going down\n");
5876
5877 conf = ieee80211_get_hw_conf(priv->hw);
5878
5879 if (!exit_pending)
5880 set_bit(STATUS_EXIT_PENDING, &priv->status);
5881
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005882 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005883
5884 /* Unblock any waiting calls */
5885 wake_up_interruptible_all(&priv->wait_command_queue);
5886
Zhu Yib481de92007-09-25 17:54:57 -07005887 /* Wipe out the EXIT_PENDING status bit if we are not actually
5888 * exiting the module */
5889 if (!exit_pending)
5890 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5891
5892 /* stop and reset the on-board processor */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005893 iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
Zhu Yib481de92007-09-25 17:54:57 -07005894
5895 /* tell the device to stop sending interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005896 iwl3945_disable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005897
5898 if (priv->mac80211_registered)
5899 ieee80211_stop_queues(priv->hw);
5900
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005901 /* If we have not previously called iwl3945_init() then
Zhu Yib481de92007-09-25 17:54:57 -07005902 * clear all bits but the RF Kill and SUSPEND bits and return */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005903 if (!iwl3945_is_init(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07005904 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5905 STATUS_RF_KILL_HW |
5906 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5907 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08005908 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5909 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07005910 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5911 STATUS_IN_SUSPEND;
5912 goto exit;
5913 }
5914
5915 /* ...otherwise clear out all the status bits but the RF Kill and
5916 * SUSPEND bits and continue taking the NIC down. */
5917 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
5918 STATUS_RF_KILL_HW |
5919 test_bit(STATUS_RF_KILL_SW, &priv->status) <<
5920 STATUS_RF_KILL_SW |
Reinette Chatre97888642008-02-06 11:20:38 -08005921 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
5922 STATUS_GEO_CONFIGURED |
Zhu Yib481de92007-09-25 17:54:57 -07005923 test_bit(STATUS_IN_SUSPEND, &priv->status) <<
5924 STATUS_IN_SUSPEND |
5925 test_bit(STATUS_FW_ERROR, &priv->status) <<
5926 STATUS_FW_ERROR;
5927
5928 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005929 iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
Zhu Yib481de92007-09-25 17:54:57 -07005930 spin_unlock_irqrestore(&priv->lock, flags);
5931
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005932 iwl3945_hw_txq_ctx_stop(priv);
5933 iwl3945_hw_rxq_stop(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005934
5935 spin_lock_irqsave(&priv->lock, flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005936 if (!iwl3945_grab_nic_access(priv)) {
5937 iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
Zhu Yib481de92007-09-25 17:54:57 -07005938 APMG_CLK_VAL_DMA_CLK_RQT);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005939 iwl3945_release_nic_access(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005940 }
5941 spin_unlock_irqrestore(&priv->lock, flags);
5942
5943 udelay(5);
5944
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005945 iwl3945_hw_nic_stop_master(priv);
5946 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5947 iwl3945_hw_nic_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005948
5949 exit:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005950 memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
Zhu Yib481de92007-09-25 17:54:57 -07005951
5952 if (priv->ibss_beacon)
5953 dev_kfree_skb(priv->ibss_beacon);
5954 priv->ibss_beacon = NULL;
5955
5956 /* clear out any free frames */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005957 iwl3945_clear_free_frames(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005958}
5959
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005960static void iwl3945_down(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005961{
5962 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005963 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005964 mutex_unlock(&priv->mutex);
Zhu Yib24d22b2007-12-19 13:59:52 +08005965
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005966 iwl3945_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07005967}
5968
5969#define MAX_HW_RESTARTS 5
5970
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08005971static int __iwl3945_up(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07005972{
5973 int rc, i;
5974
5975 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
5976 IWL_WARNING("Exit pending; will not bring the NIC up\n");
5977 return -EIO;
5978 }
5979
5980 if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
5981 IWL_WARNING("Radio disabled by SW RF kill (module "
5982 "parameter)\n");
Zhu Yie655b9f2008-01-24 02:19:38 -08005983 return -ENODEV;
5984 }
5985
Reinette Chatree903fbd2008-01-30 22:05:15 -08005986 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
5987 IWL_ERROR("ucode not available for device bringup\n");
5988 return -EIO;
5989 }
5990
Zhu Yie655b9f2008-01-24 02:19:38 -08005991 /* If platform's RF_KILL switch is NOT set to KILL */
5992 if (iwl3945_read32(priv, CSR_GP_CNTRL) &
5993 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5994 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5995 else {
5996 set_bit(STATUS_RF_KILL_HW, &priv->status);
5997 if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
5998 IWL_WARNING("Radio disabled by HW RF Kill switch\n");
5999 return -ENODEV;
6000 }
Zhu Yib481de92007-09-25 17:54:57 -07006001 }
6002
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006003 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
Zhu Yib481de92007-09-25 17:54:57 -07006004
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006005 rc = iwl3945_hw_nic_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006006 if (rc) {
6007 IWL_ERROR("Unable to int nic\n");
6008 return rc;
6009 }
6010
6011 /* make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006012 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6013 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
Zhu Yib481de92007-09-25 17:54:57 -07006014 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
6015
6016 /* clear (again), then enable host interrupts */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006017 iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6018 iwl3945_enable_interrupts(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006019
6020 /* really make sure rfkill handshake bits are cleared */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006021 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6022 iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
Zhu Yib481de92007-09-25 17:54:57 -07006023
6024 /* Copy original ucode data image from disk into backup cache.
6025 * This will be used to initialize the on-board processor's
6026 * data SRAM for a clean start when the runtime program first loads. */
6027 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
Zhu Yi5a669262008-01-14 17:46:18 -08006028 priv->ucode_data.len);
Zhu Yib481de92007-09-25 17:54:57 -07006029
Zhu Yie655b9f2008-01-24 02:19:38 -08006030 /* We return success when we resume from suspend and rf_kill is on. */
6031 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
6032 return 0;
6033
Zhu Yib481de92007-09-25 17:54:57 -07006034 for (i = 0; i < MAX_HW_RESTARTS; i++) {
6035
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006036 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006037
6038 /* load bootstrap state machine,
6039 * load bootstrap program into processor's memory,
6040 * prepare to load the "initialize" uCode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006041 rc = iwl3945_load_bsm(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006042
6043 if (rc) {
6044 IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
6045 continue;
6046 }
6047
6048 /* start card; "initialize" will load runtime ucode */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006049 iwl3945_nic_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006050
Zhu Yib481de92007-09-25 17:54:57 -07006051 IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
6052
6053 return 0;
6054 }
6055
6056 set_bit(STATUS_EXIT_PENDING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006057 __iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006058
6059 /* tried to restart and config the device for as long as our
6060 * patience could withstand */
6061 IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
6062 return -EIO;
6063}
6064
6065
6066/*****************************************************************************
6067 *
6068 * Workqueue callbacks
6069 *
6070 *****************************************************************************/
6071
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006072static void iwl3945_bg_init_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006073{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006074 struct iwl3945_priv *priv =
6075 container_of(data, struct iwl3945_priv, init_alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006076
6077 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6078 return;
6079
6080 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006081 iwl3945_init_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006082 mutex_unlock(&priv->mutex);
6083}
6084
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006085static void iwl3945_bg_alive_start(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006086{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006087 struct iwl3945_priv *priv =
6088 container_of(data, struct iwl3945_priv, alive_start.work);
Zhu Yib481de92007-09-25 17:54:57 -07006089
6090 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6091 return;
6092
6093 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006094 iwl3945_alive_start(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006095 mutex_unlock(&priv->mutex);
6096}
6097
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006098static void iwl3945_bg_rf_kill(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006099{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006100 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
Zhu Yib481de92007-09-25 17:54:57 -07006101
6102 wake_up_interruptible(&priv->wait_command_queue);
6103
6104 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6105 return;
6106
6107 mutex_lock(&priv->mutex);
6108
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006109 if (!iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006110 IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
6111 "HW and/or SW RF Kill no longer active, restarting "
6112 "device\n");
6113 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6114 queue_work(priv->workqueue, &priv->restart);
6115 } else {
6116
6117 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
6118 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
6119 "disabled by SW switch\n");
6120 else
6121 IWL_WARNING("Radio Frequency Kill Switch is On:\n"
6122 "Kill switch must be turned off for "
6123 "wireless networking to work.\n");
6124 }
6125 mutex_unlock(&priv->mutex);
6126}
6127
6128#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
6129
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006130static void iwl3945_bg_scan_check(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006131{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006132 struct iwl3945_priv *priv =
6133 container_of(data, struct iwl3945_priv, scan_check.work);
Zhu Yib481de92007-09-25 17:54:57 -07006134
6135 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6136 return;
6137
6138 mutex_lock(&priv->mutex);
6139 if (test_bit(STATUS_SCANNING, &priv->status) ||
6140 test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6141 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
6142 "Scan completion watchdog resetting adapter (%dms)\n",
6143 jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006144
Zhu Yib481de92007-09-25 17:54:57 -07006145 if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006146 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006147 }
6148 mutex_unlock(&priv->mutex);
6149}
6150
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006151static void iwl3945_bg_request_scan(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006152{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006153 struct iwl3945_priv *priv =
6154 container_of(data, struct iwl3945_priv, request_scan);
6155 struct iwl3945_host_cmd cmd = {
Zhu Yib481de92007-09-25 17:54:57 -07006156 .id = REPLY_SCAN_CMD,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006157 .len = sizeof(struct iwl3945_scan_cmd),
Zhu Yib481de92007-09-25 17:54:57 -07006158 .meta.flags = CMD_SIZE_HUGE,
6159 };
6160 int rc = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006161 struct iwl3945_scan_cmd *scan;
Zhu Yib481de92007-09-25 17:54:57 -07006162 struct ieee80211_conf *conf = NULL;
6163 u8 direct_mask;
Johannes Berg8318d782008-01-24 19:38:38 +01006164 enum ieee80211_band band;
Zhu Yib481de92007-09-25 17:54:57 -07006165
6166 conf = ieee80211_get_hw_conf(priv->hw);
6167
6168 mutex_lock(&priv->mutex);
6169
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006170 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006171 IWL_WARNING("request scan called when driver not ready.\n");
6172 goto done;
6173 }
6174
6175 /* Make sure the scan wasn't cancelled before this queued work
6176 * was given the chance to run... */
6177 if (!test_bit(STATUS_SCANNING, &priv->status))
6178 goto done;
6179
6180 /* This should never be called or scheduled if there is currently
6181 * a scan active in the hardware. */
6182 if (test_bit(STATUS_SCAN_HW, &priv->status)) {
6183 IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
6184 "Ignoring second request.\n");
6185 rc = -EIO;
6186 goto done;
6187 }
6188
6189 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
6190 IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
6191 goto done;
6192 }
6193
6194 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
6195 IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
6196 goto done;
6197 }
6198
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006199 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006200 IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
6201 goto done;
6202 }
6203
6204 if (!test_bit(STATUS_READY, &priv->status)) {
6205 IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
6206 goto done;
6207 }
6208
6209 if (!priv->scan_bands) {
6210 IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
6211 goto done;
6212 }
6213
6214 if (!priv->scan) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006215 priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
Zhu Yib481de92007-09-25 17:54:57 -07006216 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
6217 if (!priv->scan) {
6218 rc = -ENOMEM;
6219 goto done;
6220 }
6221 }
6222 scan = priv->scan;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006223 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
Zhu Yib481de92007-09-25 17:54:57 -07006224
6225 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
6226 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
6227
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006228 if (iwl3945_is_associated(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006229 u16 interval = 0;
6230 u32 extra;
6231 u32 suspend_time = 100;
6232 u32 scan_suspend_time = 100;
6233 unsigned long flags;
6234
6235 IWL_DEBUG_INFO("Scanning while associated...\n");
6236
6237 spin_lock_irqsave(&priv->lock, flags);
6238 interval = priv->beacon_int;
6239 spin_unlock_irqrestore(&priv->lock, flags);
6240
6241 scan->suspend_time = 0;
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006242 scan->max_out_time = cpu_to_le32(200 * 1024);
Zhu Yib481de92007-09-25 17:54:57 -07006243 if (!interval)
6244 interval = suspend_time;
6245 /*
6246 * suspend time format:
6247 * 0-19: beacon interval in usec (time before exec.)
6248 * 20-23: 0
6249 * 24-31: number of beacons (suspend between channels)
6250 */
6251
6252 extra = (suspend_time / interval) << 24;
6253 scan_suspend_time = 0xFF0FFFFF &
6254 (extra | ((suspend_time % interval) * 1024));
6255
6256 scan->suspend_time = cpu_to_le32(scan_suspend_time);
6257 IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
6258 scan_suspend_time, interval);
6259 }
6260
6261 /* We should add the ability for user to lock to PASSIVE ONLY */
6262 if (priv->one_direct_scan) {
6263 IWL_DEBUG_SCAN
6264 ("Kicking off one direct scan for '%s'\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006265 iwl3945_escape_essid(priv->direct_ssid,
Zhu Yib481de92007-09-25 17:54:57 -07006266 priv->direct_ssid_len));
6267 scan->direct_scan[0].id = WLAN_EID_SSID;
6268 scan->direct_scan[0].len = priv->direct_ssid_len;
6269 memcpy(scan->direct_scan[0].ssid,
6270 priv->direct_ssid, priv->direct_ssid_len);
6271 direct_mask = 1;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006272 } else if (!iwl3945_is_associated(priv) && priv->essid_len) {
Zhu Yib481de92007-09-25 17:54:57 -07006273 scan->direct_scan[0].id = WLAN_EID_SSID;
6274 scan->direct_scan[0].len = priv->essid_len;
6275 memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
6276 direct_mask = 1;
6277 } else
6278 direct_mask = 0;
6279
6280 /* We don't build a direct scan probe request; the uCode will do
6281 * that based on the direct_mask added to each channel entry */
6282 scan->tx_cmd.len = cpu_to_le16(
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006283 iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
Cyrill Gorcunov18904f52008-01-26 19:09:36 +03006284 IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
Zhu Yib481de92007-09-25 17:54:57 -07006285 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
6286 scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
6287 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
6288
6289 /* flags + rate selection */
6290
6291 switch (priv->scan_bands) {
6292 case 2:
6293 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
6294 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
6295 scan->good_CRC_th = 0;
Johannes Berg8318d782008-01-24 19:38:38 +01006296 band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006297 break;
6298
6299 case 1:
6300 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
6301 scan->good_CRC_th = IWL_GOOD_CRC_TH;
Johannes Berg8318d782008-01-24 19:38:38 +01006302 band = IEEE80211_BAND_5GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07006303 break;
6304
6305 default:
6306 IWL_WARNING("Invalid scan band count\n");
6307 goto done;
6308 }
6309
6310 /* select Rx antennas */
6311 scan->flags |= iwl3945_get_antenna_flags(priv);
6312
6313 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
6314 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
6315
Reinette Chatre26c0f032008-03-11 16:17:15 -07006316 if (direct_mask) {
Zhu Yib481de92007-09-25 17:54:57 -07006317 IWL_DEBUG_SCAN
6318 ("Initiating direct scan for %s.\n",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006319 iwl3945_escape_essid(priv->essid, priv->essid_len));
Reinette Chatre26c0f032008-03-11 16:17:15 -07006320 scan->channel_count =
6321 iwl3945_get_channels_for_scan(
6322 priv, band, 1, /* active */
6323 direct_mask,
6324 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6325 } else {
Zhu Yib481de92007-09-25 17:54:57 -07006326 IWL_DEBUG_SCAN("Initiating indirect scan.\n");
Reinette Chatre26c0f032008-03-11 16:17:15 -07006327 scan->channel_count =
6328 iwl3945_get_channels_for_scan(
6329 priv, band, 0, /* passive */
6330 direct_mask,
6331 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
6332 }
Zhu Yib481de92007-09-25 17:54:57 -07006333
6334 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006335 scan->channel_count * sizeof(struct iwl3945_scan_channel);
Zhu Yib481de92007-09-25 17:54:57 -07006336 cmd.data = scan;
6337 scan->len = cpu_to_le16(cmd.len);
6338
6339 set_bit(STATUS_SCAN_HW, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006340 rc = iwl3945_send_cmd_sync(priv, &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07006341 if (rc)
6342 goto done;
6343
6344 queue_delayed_work(priv->workqueue, &priv->scan_check,
6345 IWL_SCAN_CHECK_WATCHDOG);
6346
6347 mutex_unlock(&priv->mutex);
6348 return;
6349
6350 done:
Ian Schram01ebd062007-10-25 17:15:22 +08006351 /* inform mac80211 scan aborted */
Zhu Yib481de92007-09-25 17:54:57 -07006352 queue_work(priv->workqueue, &priv->scan_completed);
6353 mutex_unlock(&priv->mutex);
6354}
6355
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006356static void iwl3945_bg_up(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006357{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006358 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
Zhu Yib481de92007-09-25 17:54:57 -07006359
6360 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6361 return;
6362
6363 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006364 __iwl3945_up(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006365 mutex_unlock(&priv->mutex);
6366}
6367
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006368static void iwl3945_bg_restart(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006369{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006370 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
Zhu Yib481de92007-09-25 17:54:57 -07006371
6372 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6373 return;
6374
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006375 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006376 queue_work(priv->workqueue, &priv->up);
6377}
6378
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006379static void iwl3945_bg_rx_replenish(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006380{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006381 struct iwl3945_priv *priv =
6382 container_of(data, struct iwl3945_priv, rx_replenish);
Zhu Yib481de92007-09-25 17:54:57 -07006383
6384 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6385 return;
6386
6387 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006388 iwl3945_rx_replenish(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006389 mutex_unlock(&priv->mutex);
6390}
6391
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006392#define IWL_DELAY_NEXT_SCAN (HZ*2)
6393
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006394static void iwl3945_bg_post_associate(struct work_struct *data)
Zhu Yib481de92007-09-25 17:54:57 -07006395{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006396 struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
Zhu Yib481de92007-09-25 17:54:57 -07006397 post_associate.work);
6398
6399 int rc = 0;
6400 struct ieee80211_conf *conf = NULL;
Joe Perches0795af52007-10-03 17:59:30 -07006401 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006402
6403 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6404 IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
6405 return;
6406 }
6407
6408
Joe Perches0795af52007-10-03 17:59:30 -07006409 IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
6410 priv->assoc_id,
6411 print_mac(mac, priv->active_rxon.bssid_addr));
Zhu Yib481de92007-09-25 17:54:57 -07006412
6413 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6414 return;
6415
6416 mutex_lock(&priv->mutex);
6417
Johannes Berg32bfd352007-12-19 01:31:26 +01006418 if (!priv->vif || !priv->is_open) {
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006419 mutex_unlock(&priv->mutex);
6420 return;
6421 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006422 iwl3945_scan_cancel_timeout(priv, 200);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08006423
Zhu Yib481de92007-09-25 17:54:57 -07006424 conf = ieee80211_get_hw_conf(priv->hw);
6425
6426 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006427 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006428
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006429 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6430 iwl3945_setup_rxon_timing(priv);
6431 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006432 sizeof(priv->rxon_timing), &priv->rxon_timing);
6433 if (rc)
6434 IWL_WARNING("REPLY_RXON_TIMING failed - "
6435 "Attempting to continue.\n");
6436
6437 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
6438
6439 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6440
6441 IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
6442 priv->assoc_id, priv->beacon_int);
6443
6444 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6445 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
6446 else
6447 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
6448
6449 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6450 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
6451 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
6452 else
6453 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6454
6455 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6456 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
6457
6458 }
6459
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006460 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006461
6462 switch (priv->iw_mode) {
6463 case IEEE80211_IF_TYPE_STA:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006464 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07006465 break;
6466
6467 case IEEE80211_IF_TYPE_IBSS:
6468
6469 /* clear out the station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006470 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006471
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006472 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
6473 iwl3945_add_station(priv, priv->bssid, 0, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006474 iwl3945_sync_sta(priv, IWL_STA_ID,
Johannes Berg8318d782008-01-24 19:38:38 +01006475 (priv->band == IEEE80211_BAND_5GHZ) ?
Zhu Yib481de92007-09-25 17:54:57 -07006476 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
6477 CMD_ASYNC);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006478 iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
6479 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006480
6481 break;
6482
6483 default:
6484 IWL_ERROR("%s Should not be called in %d mode\n",
Ian Schrambc434dd2007-10-25 17:15:29 +08006485 __FUNCTION__, priv->iw_mode);
Zhu Yib481de92007-09-25 17:54:57 -07006486 break;
6487 }
6488
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006489 iwl3945_sequence_reset(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006490
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006491 iwl3945_activate_qos(priv, 0);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08006492
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08006493 /* we have just associated, don't start scan too early */
6494 priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
Zhu Yib481de92007-09-25 17:54:57 -07006495 mutex_unlock(&priv->mutex);
6496}
6497
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006498static void iwl3945_bg_abort_scan(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006499{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006500 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
Zhu Yib481de92007-09-25 17:54:57 -07006501
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006502 if (!iwl3945_is_ready(priv))
Zhu Yib481de92007-09-25 17:54:57 -07006503 return;
6504
6505 mutex_lock(&priv->mutex);
6506
6507 set_bit(STATUS_SCAN_ABORTING, &priv->status);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006508 iwl3945_send_scan_abort(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006509
6510 mutex_unlock(&priv->mutex);
6511}
6512
Zhu Yi76bb77e2007-11-22 10:53:22 +08006513static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
6514
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006515static void iwl3945_bg_scan_completed(struct work_struct *work)
Zhu Yib481de92007-09-25 17:54:57 -07006516{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006517 struct iwl3945_priv *priv =
6518 container_of(work, struct iwl3945_priv, scan_completed);
Zhu Yib481de92007-09-25 17:54:57 -07006519
6520 IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
6521
6522 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
6523 return;
6524
Zhu Yia0646472007-12-20 14:10:01 +08006525 if (test_bit(STATUS_CONF_PENDING, &priv->status))
6526 iwl3945_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
Zhu Yi76bb77e2007-11-22 10:53:22 +08006527
Zhu Yib481de92007-09-25 17:54:57 -07006528 ieee80211_scan_completed(priv->hw);
6529
6530 /* Since setting the TXPOWER may have been deferred while
6531 * performing the scan, fire one off */
6532 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006533 iwl3945_hw_reg_send_txpower(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006534 mutex_unlock(&priv->mutex);
6535}
6536
6537/*****************************************************************************
6538 *
6539 * mac80211 entry point functions
6540 *
6541 *****************************************************************************/
6542
Zhu Yi5a669262008-01-14 17:46:18 -08006543#define UCODE_READY_TIMEOUT (2 * HZ)
6544
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006545static int iwl3945_mac_start(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006546{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006547 struct iwl3945_priv *priv = hw->priv;
Zhu Yi5a669262008-01-14 17:46:18 -08006548 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07006549
6550 IWL_DEBUG_MAC80211("enter\n");
6551
Zhu Yi5a669262008-01-14 17:46:18 -08006552 if (pci_enable_device(priv->pci_dev)) {
6553 IWL_ERROR("Fail to pci_enable_device\n");
6554 return -ENODEV;
6555 }
6556 pci_restore_state(priv->pci_dev);
6557 pci_enable_msi(priv->pci_dev);
6558
6559 ret = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
6560 DRV_NAME, priv);
6561 if (ret) {
6562 IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
6563 goto out_disable_msi;
6564 }
6565
Zhu Yib481de92007-09-25 17:54:57 -07006566 /* we should be verifying the device is ready to be opened */
6567 mutex_lock(&priv->mutex);
6568
Zhu Yi5a669262008-01-14 17:46:18 -08006569 memset(&priv->staging_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
6570 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
6571 * ucode filename and max sizes are card-specific. */
6572
6573 if (!priv->ucode_code.len) {
6574 ret = iwl3945_read_ucode(priv);
6575 if (ret) {
6576 IWL_ERROR("Could not read microcode: %d\n", ret);
6577 mutex_unlock(&priv->mutex);
6578 goto out_release_irq;
6579 }
6580 }
6581
Zhu Yie655b9f2008-01-24 02:19:38 -08006582 ret = __iwl3945_up(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08006583
Zhu Yib481de92007-09-25 17:54:57 -07006584 mutex_unlock(&priv->mutex);
Zhu Yi5a669262008-01-14 17:46:18 -08006585
Zhu Yie655b9f2008-01-24 02:19:38 -08006586 if (ret)
6587 goto out_release_irq;
6588
6589 IWL_DEBUG_INFO("Start UP work.\n");
6590
6591 if (test_bit(STATUS_IN_SUSPEND, &priv->status))
6592 return 0;
6593
Zhu Yi5a669262008-01-14 17:46:18 -08006594 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
6595 * mac80211 will not be run successfully. */
6596 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
6597 test_bit(STATUS_READY, &priv->status),
6598 UCODE_READY_TIMEOUT);
6599 if (!ret) {
6600 if (!test_bit(STATUS_READY, &priv->status)) {
6601 IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
6602 jiffies_to_msecs(UCODE_READY_TIMEOUT));
6603 ret = -ETIMEDOUT;
6604 goto out_release_irq;
6605 }
6606 }
6607
Zhu Yie655b9f2008-01-24 02:19:38 -08006608 priv->is_open = 1;
Zhu Yib481de92007-09-25 17:54:57 -07006609 IWL_DEBUG_MAC80211("leave\n");
6610 return 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006611
6612out_release_irq:
6613 free_irq(priv->pci_dev->irq, priv);
6614out_disable_msi:
6615 pci_disable_msi(priv->pci_dev);
Zhu Yie655b9f2008-01-24 02:19:38 -08006616 pci_disable_device(priv->pci_dev);
6617 priv->is_open = 0;
6618 IWL_DEBUG_MAC80211("leave - failed\n");
Zhu Yi5a669262008-01-14 17:46:18 -08006619 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006620}
6621
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006622static void iwl3945_mac_stop(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07006623{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006624 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006625
6626 IWL_DEBUG_MAC80211("enter\n");
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006627
Zhu Yie655b9f2008-01-24 02:19:38 -08006628 if (!priv->is_open) {
6629 IWL_DEBUG_MAC80211("leave - skip\n");
6630 return;
6631 }
6632
Zhu Yib481de92007-09-25 17:54:57 -07006633 priv->is_open = 0;
Zhu Yi5a669262008-01-14 17:46:18 -08006634
6635 if (iwl3945_is_ready_rf(priv)) {
Zhu Yie655b9f2008-01-24 02:19:38 -08006636 /* stop mac, cancel any scan request and clear
6637 * RXON_FILTER_ASSOC_MSK BIT
6638 */
Zhu Yi5a669262008-01-14 17:46:18 -08006639 mutex_lock(&priv->mutex);
6640 iwl3945_scan_cancel_timeout(priv, 100);
6641 cancel_delayed_work(&priv->post_associate);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006642 mutex_unlock(&priv->mutex);
Mohamed Abbasfde35712007-11-29 11:10:15 +08006643 }
6644
Zhu Yi5a669262008-01-14 17:46:18 -08006645 iwl3945_down(priv);
6646
6647 flush_workqueue(priv->workqueue);
6648 free_irq(priv->pci_dev->irq, priv);
6649 pci_disable_msi(priv->pci_dev);
6650 pci_save_state(priv->pci_dev);
6651 pci_disable_device(priv->pci_dev);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006652
Zhu Yib481de92007-09-25 17:54:57 -07006653 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006654}
6655
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006656static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07006657 struct ieee80211_tx_control *ctl)
6658{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006659 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006660
6661 IWL_DEBUG_MAC80211("enter\n");
6662
6663 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
6664 IWL_DEBUG_MAC80211("leave - monitor\n");
6665 return -1;
6666 }
6667
6668 IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
Johannes Berg8318d782008-01-24 19:38:38 +01006669 ctl->tx_rate->bitrate);
Zhu Yib481de92007-09-25 17:54:57 -07006670
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006671 if (iwl3945_tx_skb(priv, skb, ctl))
Zhu Yib481de92007-09-25 17:54:57 -07006672 dev_kfree_skb_any(skb);
6673
6674 IWL_DEBUG_MAC80211("leave\n");
6675 return 0;
6676}
6677
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006678static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07006679 struct ieee80211_if_init_conf *conf)
6680{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006681 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006682 unsigned long flags;
Joe Perches0795af52007-10-03 17:59:30 -07006683 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006684
Johannes Berg32bfd352007-12-19 01:31:26 +01006685 IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006686
Johannes Berg32bfd352007-12-19 01:31:26 +01006687 if (priv->vif) {
6688 IWL_DEBUG_MAC80211("leave - vif != NULL\n");
Tomas Winkler864792e2007-11-27 21:00:52 +02006689 return -EOPNOTSUPP;
Zhu Yib481de92007-09-25 17:54:57 -07006690 }
6691
6692 spin_lock_irqsave(&priv->lock, flags);
Johannes Berg32bfd352007-12-19 01:31:26 +01006693 priv->vif = conf->vif;
Zhu Yib481de92007-09-25 17:54:57 -07006694
6695 spin_unlock_irqrestore(&priv->lock, flags);
6696
6697 mutex_lock(&priv->mutex);
Tomas Winkler864792e2007-11-27 21:00:52 +02006698
6699 if (conf->mac_addr) {
6700 IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
6701 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
6702 }
6703
Zhu Yi5a669262008-01-14 17:46:18 -08006704 if (iwl3945_is_ready(priv))
6705 iwl3945_set_mode(priv, conf->type);
Zhu Yib481de92007-09-25 17:54:57 -07006706
Zhu Yib481de92007-09-25 17:54:57 -07006707 mutex_unlock(&priv->mutex);
6708
Zhu Yi5a669262008-01-14 17:46:18 -08006709 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07006710 return 0;
6711}
6712
6713/**
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006714 * iwl3945_mac_config - mac80211 config callback
Zhu Yib481de92007-09-25 17:54:57 -07006715 *
6716 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
6717 * be set inappropriately and the driver currently sets the hardware up to
6718 * use it whenever needed.
6719 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006720static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
Zhu Yib481de92007-09-25 17:54:57 -07006721{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006722 struct iwl3945_priv *priv = hw->priv;
6723 const struct iwl3945_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07006724 unsigned long flags;
Zhu Yi76bb77e2007-11-22 10:53:22 +08006725 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -07006726
6727 mutex_lock(&priv->mutex);
Johannes Berg8318d782008-01-24 19:38:38 +01006728 IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006729
Zhu Yi12342c42007-12-20 11:27:32 +08006730 priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
6731
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006732 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006733 IWL_DEBUG_MAC80211("leave - not ready\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006734 ret = -EIO;
6735 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006736 }
6737
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006738 if (unlikely(!iwl3945_param_disable_hw_scan &&
Zhu Yib481de92007-09-25 17:54:57 -07006739 test_bit(STATUS_SCANNING, &priv->status))) {
Zhu Yia0646472007-12-20 14:10:01 +08006740 IWL_DEBUG_MAC80211("leave - scanning\n");
6741 set_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006742 mutex_unlock(&priv->mutex);
Zhu Yia0646472007-12-20 14:10:01 +08006743 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07006744 }
6745
6746 spin_lock_irqsave(&priv->lock, flags);
6747
Johannes Berg8318d782008-01-24 19:38:38 +01006748 ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
6749 conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006750 if (!is_channel_valid(ch_info)) {
6751 IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
Johannes Berg8318d782008-01-24 19:38:38 +01006752 conf->channel->hw_value, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006753 IWL_DEBUG_MAC80211("leave - invalid channel\n");
6754 spin_unlock_irqrestore(&priv->lock, flags);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006755 ret = -EINVAL;
6756 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006757 }
6758
Johannes Berg8318d782008-01-24 19:38:38 +01006759 iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
Zhu Yib481de92007-09-25 17:54:57 -07006760
Johannes Berg8318d782008-01-24 19:38:38 +01006761 iwl3945_set_flags_for_phymode(priv, conf->channel->band);
Zhu Yib481de92007-09-25 17:54:57 -07006762
6763 /* The list of supported rates and rate mask can be different
6764 * for each phymode; since the phymode may have changed, reset
6765 * the rate mask to what mac80211 lists */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006766 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006767
6768 spin_unlock_irqrestore(&priv->lock, flags);
6769
6770#ifdef IEEE80211_CONF_CHANNEL_SWITCH
6771 if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006772 iwl3945_hw_channel_switch(priv, conf->channel);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006773 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006774 }
6775#endif
6776
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006777 iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
Zhu Yib481de92007-09-25 17:54:57 -07006778
6779 if (!conf->radio_enabled) {
6780 IWL_DEBUG_MAC80211("leave - radio disabled\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006781 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006782 }
6783
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006784 if (iwl3945_is_rfkill(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07006785 IWL_DEBUG_MAC80211("leave - RF kill\n");
Zhu Yi76bb77e2007-11-22 10:53:22 +08006786 ret = -EIO;
6787 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07006788 }
6789
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006790 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006791
6792 if (memcmp(&priv->active_rxon,
6793 &priv->staging_rxon, sizeof(priv->staging_rxon)))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006794 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006795 else
6796 IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
6797
6798 IWL_DEBUG_MAC80211("leave\n");
6799
Zhu Yi76bb77e2007-11-22 10:53:22 +08006800out:
Zhu Yia0646472007-12-20 14:10:01 +08006801 clear_bit(STATUS_CONF_PENDING, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07006802 mutex_unlock(&priv->mutex);
Zhu Yi76bb77e2007-11-22 10:53:22 +08006803 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07006804}
6805
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006806static void iwl3945_config_ap(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07006807{
6808 int rc = 0;
6809
Maarten Lankhorstd986bcd2008-01-23 10:15:16 -08006810 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
Zhu Yib481de92007-09-25 17:54:57 -07006811 return;
6812
6813 /* The following should be done only at AP bring up */
6814 if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
6815
6816 /* RXON - unassoc (to set timing command) */
6817 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006818 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006819
6820 /* RXON Timing */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006821 memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
6822 iwl3945_setup_rxon_timing(priv);
6823 rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
Zhu Yib481de92007-09-25 17:54:57 -07006824 sizeof(priv->rxon_timing), &priv->rxon_timing);
6825 if (rc)
6826 IWL_WARNING("REPLY_RXON_TIMING failed - "
6827 "Attempting to continue.\n");
6828
6829 /* FIXME: what should be the assoc_id for AP? */
6830 priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
6831 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
6832 priv->staging_rxon.flags |=
6833 RXON_FLG_SHORT_PREAMBLE_MSK;
6834 else
6835 priv->staging_rxon.flags &=
6836 ~RXON_FLG_SHORT_PREAMBLE_MSK;
6837
6838 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
6839 if (priv->assoc_capability &
6840 WLAN_CAPABILITY_SHORT_SLOT_TIME)
6841 priv->staging_rxon.flags |=
6842 RXON_FLG_SHORT_SLOT_MSK;
6843 else
6844 priv->staging_rxon.flags &=
6845 ~RXON_FLG_SHORT_SLOT_MSK;
6846
6847 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
6848 priv->staging_rxon.flags &=
6849 ~RXON_FLG_SHORT_SLOT_MSK;
6850 }
6851 /* restore RXON assoc */
6852 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006853 iwl3945_commit_rxon(priv);
6854 iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
Zhu Yi556f8db2007-09-27 11:27:33 +08006855 }
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006856 iwl3945_send_beacon_cmd(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006857
6858 /* FIXME - we need to add code here to detect a totally new
6859 * configuration, reset the AP, unassoc, rxon timing, assoc,
6860 * clear sta table, add BCAST sta... */
6861}
6862
Johannes Berg32bfd352007-12-19 01:31:26 +01006863static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
6864 struct ieee80211_vif *vif,
Zhu Yib481de92007-09-25 17:54:57 -07006865 struct ieee80211_if_conf *conf)
6866{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006867 struct iwl3945_priv *priv = hw->priv;
Joe Perches0795af52007-10-03 17:59:30 -07006868 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07006869 unsigned long flags;
6870 int rc;
6871
6872 if (conf == NULL)
6873 return -EIO;
6874
Emmanuel Grumbachb716bb92008-03-04 18:09:32 -08006875 if (priv->vif != vif) {
6876 IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
6877 mutex_unlock(&priv->mutex);
6878 return 0;
6879 }
6880
Johannes Berg4150c572007-09-17 01:29:23 -04006881 /* XXX: this MUST use conf->mac_addr */
6882
Zhu Yib481de92007-09-25 17:54:57 -07006883 if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
6884 (!conf->beacon || !conf->ssid_len)) {
6885 IWL_DEBUG_MAC80211
6886 ("Leaving in AP mode because HostAPD is not ready.\n");
6887 return 0;
6888 }
6889
Zhu Yi5a669262008-01-14 17:46:18 -08006890 if (!iwl3945_is_alive(priv))
6891 return -EAGAIN;
6892
Zhu Yib481de92007-09-25 17:54:57 -07006893 mutex_lock(&priv->mutex);
6894
Zhu Yib481de92007-09-25 17:54:57 -07006895 if (conf->bssid)
Joe Perches0795af52007-10-03 17:59:30 -07006896 IWL_DEBUG_MAC80211("bssid: %s\n",
6897 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07006898
Johannes Berg4150c572007-09-17 01:29:23 -04006899/*
6900 * very dubious code was here; the probe filtering flag is never set:
6901 *
Zhu Yib481de92007-09-25 17:54:57 -07006902 if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
6903 !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
Johannes Berg4150c572007-09-17 01:29:23 -04006904 */
Zhu Yib481de92007-09-25 17:54:57 -07006905
6906 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
6907 if (!conf->bssid) {
6908 conf->bssid = priv->mac_addr;
6909 memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
Joe Perches0795af52007-10-03 17:59:30 -07006910 IWL_DEBUG_MAC80211("bssid was set to: %s\n",
6911 print_mac(mac, conf->bssid));
Zhu Yib481de92007-09-25 17:54:57 -07006912 }
6913 if (priv->ibss_beacon)
6914 dev_kfree_skb(priv->ibss_beacon);
6915
6916 priv->ibss_beacon = conf->beacon;
6917 }
6918
Mohamed Abbasfde35712007-11-29 11:10:15 +08006919 if (iwl3945_is_rfkill(priv))
6920 goto done;
6921
Zhu Yib481de92007-09-25 17:54:57 -07006922 if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
6923 !is_multicast_ether_addr(conf->bssid)) {
6924 /* If there is currently a HW scan going on in the background
6925 * then we need to cancel it else the RXON below will fail. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006926 if (iwl3945_scan_cancel_timeout(priv, 100)) {
Zhu Yib481de92007-09-25 17:54:57 -07006927 IWL_WARNING("Aborted scan still in progress "
6928 "after 100ms\n");
6929 IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
6930 mutex_unlock(&priv->mutex);
6931 return -EAGAIN;
6932 }
6933 memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
6934
6935 /* TODO: Audit driver for usage of these members and see
6936 * if mac80211 deprecates them (priv->bssid looks like it
6937 * shouldn't be there, but I haven't scanned the IBSS code
6938 * to verify) - jpk */
6939 memcpy(priv->bssid, conf->bssid, ETH_ALEN);
6940
6941 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006942 iwl3945_config_ap(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006943 else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006944 rc = iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006945 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006946 iwl3945_add_station(priv,
Zhu Yi556f8db2007-09-27 11:27:33 +08006947 priv->active_rxon.bssid_addr, 1, 0);
Zhu Yib481de92007-09-25 17:54:57 -07006948 }
6949
6950 } else {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006951 iwl3945_scan_cancel_timeout(priv, 100);
Zhu Yib481de92007-09-25 17:54:57 -07006952 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006953 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07006954 }
6955
Mohamed Abbasfde35712007-11-29 11:10:15 +08006956 done:
Zhu Yib481de92007-09-25 17:54:57 -07006957 spin_lock_irqsave(&priv->lock, flags);
6958 if (!conf->ssid_len)
6959 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
6960 else
6961 memcpy(priv->essid, conf->ssid, conf->ssid_len);
6962
6963 priv->essid_len = conf->ssid_len;
6964 spin_unlock_irqrestore(&priv->lock, flags);
6965
6966 IWL_DEBUG_MAC80211("leave\n");
6967 mutex_unlock(&priv->mutex);
6968
6969 return 0;
6970}
6971
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006972static void iwl3945_configure_filter(struct ieee80211_hw *hw,
Johannes Berg4150c572007-09-17 01:29:23 -04006973 unsigned int changed_flags,
6974 unsigned int *total_flags,
6975 int mc_count, struct dev_addr_list *mc_list)
6976{
6977 /*
6978 * XXX: dummy
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006979 * see also iwl3945_connection_init_rx_config
Johannes Berg4150c572007-09-17 01:29:23 -04006980 */
6981 *total_flags = 0;
6982}
6983
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006984static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07006985 struct ieee80211_if_init_conf *conf)
6986{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08006987 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07006988
6989 IWL_DEBUG_MAC80211("enter\n");
6990
6991 mutex_lock(&priv->mutex);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08006992
Mohamed Abbasfde35712007-11-29 11:10:15 +08006993 if (iwl3945_is_ready_rf(priv)) {
6994 iwl3945_scan_cancel_timeout(priv, 100);
6995 cancel_delayed_work(&priv->post_associate);
6996 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6997 iwl3945_commit_rxon(priv);
6998 }
Johannes Berg32bfd352007-12-19 01:31:26 +01006999 if (priv->vif == conf->vif) {
7000 priv->vif = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007001 memset(priv->bssid, 0, ETH_ALEN);
7002 memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
7003 priv->essid_len = 0;
7004 }
7005 mutex_unlock(&priv->mutex);
7006
7007 IWL_DEBUG_MAC80211("leave\n");
Zhu Yib481de92007-09-25 17:54:57 -07007008}
7009
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007010static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
Zhu Yib481de92007-09-25 17:54:57 -07007011{
7012 int rc = 0;
7013 unsigned long flags;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007014 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007015
7016 IWL_DEBUG_MAC80211("enter\n");
7017
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007018 mutex_lock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007019 spin_lock_irqsave(&priv->lock, flags);
7020
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007021 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007022 rc = -EIO;
7023 IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
7024 goto out_unlock;
7025 }
7026
7027 if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
7028 rc = -EIO;
7029 IWL_ERROR("ERROR: APs don't scan\n");
7030 goto out_unlock;
7031 }
7032
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007033 /* we don't schedule scan within next_scan_jiffies period */
7034 if (priv->next_scan_jiffies &&
7035 time_after(priv->next_scan_jiffies, jiffies)) {
7036 rc = -EAGAIN;
7037 goto out_unlock;
7038 }
Zhu Yib481de92007-09-25 17:54:57 -07007039 /* if we just finished scan ask for delay */
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007040 if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
7041 IWL_DELAY_NEXT_SCAN, jiffies)) {
Zhu Yib481de92007-09-25 17:54:57 -07007042 rc = -EAGAIN;
7043 goto out_unlock;
7044 }
7045 if (len) {
Mohamed Abbas7878a5a2007-11-29 11:10:13 +08007046 IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007047 iwl3945_escape_essid(ssid, len), (int)len);
Zhu Yib481de92007-09-25 17:54:57 -07007048
7049 priv->one_direct_scan = 1;
7050 priv->direct_ssid_len = (u8)
7051 min((u8) len, (u8) IW_ESSID_MAX_SIZE);
7052 memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08007053 } else
7054 priv->one_direct_scan = 0;
Zhu Yib481de92007-09-25 17:54:57 -07007055
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007056 rc = iwl3945_scan_initiate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007057
7058 IWL_DEBUG_MAC80211("leave\n");
7059
7060out_unlock:
7061 spin_unlock_irqrestore(&priv->lock, flags);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007062 mutex_unlock(&priv->mutex);
Zhu Yib481de92007-09-25 17:54:57 -07007063
7064 return rc;
7065}
7066
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007067static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
Zhu Yib481de92007-09-25 17:54:57 -07007068 const u8 *local_addr, const u8 *addr,
7069 struct ieee80211_key_conf *key)
7070{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007071 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007072 int rc = 0;
7073 u8 sta_id;
7074
7075 IWL_DEBUG_MAC80211("enter\n");
7076
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007077 if (!iwl3945_param_hwcrypto) {
Zhu Yib481de92007-09-25 17:54:57 -07007078 IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
7079 return -EOPNOTSUPP;
7080 }
7081
7082 if (is_zero_ether_addr(addr))
7083 /* only support pairwise keys */
7084 return -EOPNOTSUPP;
7085
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007086 sta_id = iwl3945_hw_find_station(priv, addr);
Zhu Yib481de92007-09-25 17:54:57 -07007087 if (sta_id == IWL_INVALID_STATION) {
Joe Perches0795af52007-10-03 17:59:30 -07007088 DECLARE_MAC_BUF(mac);
7089
7090 IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
7091 print_mac(mac, addr));
Zhu Yib481de92007-09-25 17:54:57 -07007092 return -EINVAL;
7093 }
7094
7095 mutex_lock(&priv->mutex);
7096
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007097 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007098
Zhu Yib481de92007-09-25 17:54:57 -07007099 switch (cmd) {
7100 case SET_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007101 rc = iwl3945_update_sta_key_info(priv, key, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007102 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007103 iwl3945_set_rxon_hwcrypto(priv, 1);
7104 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007105 key->hw_key_idx = sta_id;
7106 IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
7107 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
7108 }
7109 break;
7110 case DISABLE_KEY:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007111 rc = iwl3945_clear_sta_key_info(priv, sta_id);
Zhu Yib481de92007-09-25 17:54:57 -07007112 if (!rc) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007113 iwl3945_set_rxon_hwcrypto(priv, 0);
7114 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007115 IWL_DEBUG_MAC80211("disable hwcrypto key\n");
7116 }
7117 break;
7118 default:
7119 rc = -EINVAL;
7120 }
7121
7122 IWL_DEBUG_MAC80211("leave\n");
7123 mutex_unlock(&priv->mutex);
7124
7125 return rc;
7126}
7127
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007128static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
Zhu Yib481de92007-09-25 17:54:57 -07007129 const struct ieee80211_tx_queue_params *params)
7130{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007131 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007132 unsigned long flags;
7133 int q;
Zhu Yib481de92007-09-25 17:54:57 -07007134
7135 IWL_DEBUG_MAC80211("enter\n");
7136
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007137 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007138 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7139 return -EIO;
7140 }
7141
7142 if (queue >= AC_NUM) {
7143 IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
7144 return 0;
7145 }
7146
Zhu Yib481de92007-09-25 17:54:57 -07007147 if (!priv->qos_data.qos_enable) {
7148 priv->qos_data.qos_active = 0;
7149 IWL_DEBUG_MAC80211("leave - qos not enabled\n");
7150 return 0;
7151 }
7152 q = AC_NUM - 1 - queue;
7153
7154 spin_lock_irqsave(&priv->lock, flags);
7155
7156 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
7157 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
7158 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
7159 priv->qos_data.def_qos_parm.ac[q].edca_txop =
Johannes Berg3330d7b2008-02-10 16:49:38 +01007160 cpu_to_le16((params->txop * 32));
Zhu Yib481de92007-09-25 17:54:57 -07007161
7162 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
7163 priv->qos_data.qos_active = 1;
7164
7165 spin_unlock_irqrestore(&priv->lock, flags);
7166
7167 mutex_lock(&priv->mutex);
7168 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007169 iwl3945_activate_qos(priv, 1);
7170 else if (priv->assoc_id && iwl3945_is_associated(priv))
7171 iwl3945_activate_qos(priv, 0);
Zhu Yib481de92007-09-25 17:54:57 -07007172
7173 mutex_unlock(&priv->mutex);
7174
Zhu Yib481de92007-09-25 17:54:57 -07007175 IWL_DEBUG_MAC80211("leave\n");
7176 return 0;
7177}
7178
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007179static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007180 struct ieee80211_tx_queue_stats *stats)
7181{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007182 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007183 int i, avail;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007184 struct iwl3945_tx_queue *txq;
7185 struct iwl3945_queue *q;
Zhu Yib481de92007-09-25 17:54:57 -07007186 unsigned long flags;
7187
7188 IWL_DEBUG_MAC80211("enter\n");
7189
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007190 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007191 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7192 return -EIO;
7193 }
7194
7195 spin_lock_irqsave(&priv->lock, flags);
7196
7197 for (i = 0; i < AC_NUM; i++) {
7198 txq = &priv->txq[i];
7199 q = &txq->q;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007200 avail = iwl3945_queue_space(q);
Zhu Yib481de92007-09-25 17:54:57 -07007201
7202 stats->data[i].len = q->n_window - avail;
7203 stats->data[i].limit = q->n_window - q->high_mark;
7204 stats->data[i].count = q->n_window;
7205
7206 }
7207 spin_unlock_irqrestore(&priv->lock, flags);
7208
7209 IWL_DEBUG_MAC80211("leave\n");
7210
7211 return 0;
7212}
7213
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007214static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
Zhu Yib481de92007-09-25 17:54:57 -07007215 struct ieee80211_low_level_stats *stats)
7216{
7217 IWL_DEBUG_MAC80211("enter\n");
7218 IWL_DEBUG_MAC80211("leave\n");
7219
7220 return 0;
7221}
7222
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007223static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007224{
7225 IWL_DEBUG_MAC80211("enter\n");
7226 IWL_DEBUG_MAC80211("leave\n");
7227
7228 return 0;
7229}
7230
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007231static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
Zhu Yib481de92007-09-25 17:54:57 -07007232{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007233 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007234 unsigned long flags;
7235
7236 mutex_lock(&priv->mutex);
7237 IWL_DEBUG_MAC80211("enter\n");
7238
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007239 iwl3945_reset_qos(priv);
Ron Rindjunsky292ae172008-02-06 11:20:39 -08007240
Zhu Yib481de92007-09-25 17:54:57 -07007241 cancel_delayed_work(&priv->post_associate);
7242
7243 spin_lock_irqsave(&priv->lock, flags);
7244 priv->assoc_id = 0;
7245 priv->assoc_capability = 0;
7246 priv->call_post_assoc_from_beacon = 0;
7247
7248 /* new association get rid of ibss beacon skb */
7249 if (priv->ibss_beacon)
7250 dev_kfree_skb(priv->ibss_beacon);
7251
7252 priv->ibss_beacon = NULL;
7253
7254 priv->beacon_int = priv->hw->conf.beacon_int;
7255 priv->timestamp1 = 0;
7256 priv->timestamp0 = 0;
7257 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
7258 priv->beacon_int = 0;
7259
7260 spin_unlock_irqrestore(&priv->lock, flags);
7261
Mohamed Abbasfde35712007-11-29 11:10:15 +08007262 if (!iwl3945_is_ready_rf(priv)) {
7263 IWL_DEBUG_MAC80211("leave - not ready\n");
7264 mutex_unlock(&priv->mutex);
7265 return;
7266 }
7267
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007268 /* we are restarting association process
7269 * clear RXON_FILTER_ASSOC_MSK bit
7270 */
7271 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007272 iwl3945_scan_cancel_timeout(priv, 100);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007273 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007274 iwl3945_commit_rxon(priv);
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007275 }
7276
Zhu Yib481de92007-09-25 17:54:57 -07007277 /* Per mac80211.h: This is only used in IBSS mode... */
7278 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
Mohamed Abbas15e869d2007-10-25 17:15:46 +08007279
Zhu Yib481de92007-09-25 17:54:57 -07007280 IWL_DEBUG_MAC80211("leave - not in IBSS\n");
7281 mutex_unlock(&priv->mutex);
7282 return;
7283 }
7284
Zhu Yib481de92007-09-25 17:54:57 -07007285 priv->only_active_channel = 0;
7286
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007287 iwl3945_set_rate(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007288
7289 mutex_unlock(&priv->mutex);
7290
7291 IWL_DEBUG_MAC80211("leave\n");
7292
7293}
7294
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007295static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
Zhu Yib481de92007-09-25 17:54:57 -07007296 struct ieee80211_tx_control *control)
7297{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007298 struct iwl3945_priv *priv = hw->priv;
Zhu Yib481de92007-09-25 17:54:57 -07007299 unsigned long flags;
7300
7301 mutex_lock(&priv->mutex);
7302 IWL_DEBUG_MAC80211("enter\n");
7303
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007304 if (!iwl3945_is_ready_rf(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007305 IWL_DEBUG_MAC80211("leave - RF not ready\n");
7306 mutex_unlock(&priv->mutex);
7307 return -EIO;
7308 }
7309
7310 if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7311 IWL_DEBUG_MAC80211("leave - not IBSS\n");
7312 mutex_unlock(&priv->mutex);
7313 return -EIO;
7314 }
7315
7316 spin_lock_irqsave(&priv->lock, flags);
7317
7318 if (priv->ibss_beacon)
7319 dev_kfree_skb(priv->ibss_beacon);
7320
7321 priv->ibss_beacon = skb;
7322
7323 priv->assoc_id = 0;
7324
7325 IWL_DEBUG_MAC80211("leave\n");
7326 spin_unlock_irqrestore(&priv->lock, flags);
7327
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007328 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007329
7330 queue_work(priv->workqueue, &priv->post_associate.work);
7331
7332 mutex_unlock(&priv->mutex);
7333
7334 return 0;
7335}
7336
7337/*****************************************************************************
7338 *
7339 * sysfs attributes
7340 *
7341 *****************************************************************************/
7342
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007343#ifdef CONFIG_IWL3945_DEBUG
Zhu Yib481de92007-09-25 17:54:57 -07007344
7345/*
7346 * The following adds a new attribute to the sysfs representation
7347 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
7348 * used for controlling the debug level.
7349 *
7350 * See the level definitions in iwl for details.
7351 */
7352
7353static ssize_t show_debug_level(struct device_driver *d, char *buf)
7354{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007355 return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07007356}
7357static ssize_t store_debug_level(struct device_driver *d,
7358 const char *buf, size_t count)
7359{
7360 char *p = (char *)buf;
7361 u32 val;
7362
7363 val = simple_strtoul(p, &p, 0);
7364 if (p == buf)
7365 printk(KERN_INFO DRV_NAME
7366 ": %s is not in hex or decimal form.\n", buf);
7367 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007368 iwl3945_debug_level = val;
Zhu Yib481de92007-09-25 17:54:57 -07007369
7370 return strnlen(buf, count);
7371}
7372
7373static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
7374 show_debug_level, store_debug_level);
7375
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007376#endif /* CONFIG_IWL3945_DEBUG */
Zhu Yib481de92007-09-25 17:54:57 -07007377
7378static ssize_t show_rf_kill(struct device *d,
7379 struct device_attribute *attr, char *buf)
7380{
7381 /*
7382 * 0 - RF kill not enabled
7383 * 1 - SW based RF kill active (sysfs)
7384 * 2 - HW based RF kill active
7385 * 3 - Both HW and SW based RF kill active
7386 */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007387 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007388 int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
7389 (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
7390
7391 return sprintf(buf, "%i\n", val);
7392}
7393
7394static ssize_t store_rf_kill(struct device *d,
7395 struct device_attribute *attr,
7396 const char *buf, size_t count)
7397{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007398 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007399
7400 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007401 iwl3945_radio_kill_sw(priv, buf[0] == '1');
Zhu Yib481de92007-09-25 17:54:57 -07007402 mutex_unlock(&priv->mutex);
7403
7404 return count;
7405}
7406
7407static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
7408
7409static ssize_t show_temperature(struct device *d,
7410 struct device_attribute *attr, char *buf)
7411{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007412 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007413
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007414 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007415 return -EAGAIN;
7416
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007417 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
Zhu Yib481de92007-09-25 17:54:57 -07007418}
7419
7420static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
7421
7422static ssize_t show_rs_window(struct device *d,
7423 struct device_attribute *attr,
7424 char *buf)
7425{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007426 struct iwl3945_priv *priv = d->driver_data;
7427 return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
Zhu Yib481de92007-09-25 17:54:57 -07007428}
7429static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
7430
7431static ssize_t show_tx_power(struct device *d,
7432 struct device_attribute *attr, char *buf)
7433{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007434 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007435 return sprintf(buf, "%d\n", priv->user_txpower_limit);
7436}
7437
7438static ssize_t store_tx_power(struct device *d,
7439 struct device_attribute *attr,
7440 const char *buf, size_t count)
7441{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007442 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007443 char *p = (char *)buf;
7444 u32 val;
7445
7446 val = simple_strtoul(p, &p, 10);
7447 if (p == buf)
7448 printk(KERN_INFO DRV_NAME
7449 ": %s is not in decimal form.\n", buf);
7450 else
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007451 iwl3945_hw_reg_set_txpower(priv, val);
Zhu Yib481de92007-09-25 17:54:57 -07007452
7453 return count;
7454}
7455
7456static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
7457
7458static ssize_t show_flags(struct device *d,
7459 struct device_attribute *attr, char *buf)
7460{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007461 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007462
7463 return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
7464}
7465
7466static ssize_t store_flags(struct device *d,
7467 struct device_attribute *attr,
7468 const char *buf, size_t count)
7469{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007470 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007471 u32 flags = simple_strtoul(buf, NULL, 0);
7472
7473 mutex_lock(&priv->mutex);
7474 if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
7475 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007476 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007477 IWL_WARNING("Could not cancel scan.\n");
7478 else {
7479 IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
7480 flags);
7481 priv->staging_rxon.flags = cpu_to_le32(flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007482 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007483 }
7484 }
7485 mutex_unlock(&priv->mutex);
7486
7487 return count;
7488}
7489
7490static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
7491
7492static ssize_t show_filter_flags(struct device *d,
7493 struct device_attribute *attr, char *buf)
7494{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007495 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007496
7497 return sprintf(buf, "0x%04X\n",
7498 le32_to_cpu(priv->active_rxon.filter_flags));
7499}
7500
7501static ssize_t store_filter_flags(struct device *d,
7502 struct device_attribute *attr,
7503 const char *buf, size_t count)
7504{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007505 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
Zhu Yib481de92007-09-25 17:54:57 -07007506 u32 filter_flags = simple_strtoul(buf, NULL, 0);
7507
7508 mutex_lock(&priv->mutex);
7509 if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
7510 /* Cancel any currently running scans... */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007511 if (iwl3945_scan_cancel_timeout(priv, 100))
Zhu Yib481de92007-09-25 17:54:57 -07007512 IWL_WARNING("Could not cancel scan.\n");
7513 else {
7514 IWL_DEBUG_INFO("Committing rxon.filter_flags = "
7515 "0x%04X\n", filter_flags);
7516 priv->staging_rxon.filter_flags =
7517 cpu_to_le32(filter_flags);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007518 iwl3945_commit_rxon(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007519 }
7520 }
7521 mutex_unlock(&priv->mutex);
7522
7523 return count;
7524}
7525
7526static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
7527 store_filter_flags);
7528
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007529#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007530
7531static ssize_t show_measurement(struct device *d,
7532 struct device_attribute *attr, char *buf)
7533{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007534 struct iwl3945_priv *priv = dev_get_drvdata(d);
7535 struct iwl3945_spectrum_notification measure_report;
Zhu Yib481de92007-09-25 17:54:57 -07007536 u32 size = sizeof(measure_report), len = 0, ofs = 0;
7537 u8 *data = (u8 *) & measure_report;
7538 unsigned long flags;
7539
7540 spin_lock_irqsave(&priv->lock, flags);
7541 if (!(priv->measurement_status & MEASUREMENT_READY)) {
7542 spin_unlock_irqrestore(&priv->lock, flags);
7543 return 0;
7544 }
7545 memcpy(&measure_report, &priv->measure_report, size);
7546 priv->measurement_status = 0;
7547 spin_unlock_irqrestore(&priv->lock, flags);
7548
7549 while (size && (PAGE_SIZE - len)) {
7550 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7551 PAGE_SIZE - len, 1);
7552 len = strlen(buf);
7553 if (PAGE_SIZE - len)
7554 buf[len++] = '\n';
7555
7556 ofs += 16;
7557 size -= min(size, 16U);
7558 }
7559
7560 return len;
7561}
7562
7563static ssize_t store_measurement(struct device *d,
7564 struct device_attribute *attr,
7565 const char *buf, size_t count)
7566{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007567 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007568 struct ieee80211_measurement_params params = {
7569 .channel = le16_to_cpu(priv->active_rxon.channel),
7570 .start_time = cpu_to_le64(priv->last_tsf),
7571 .duration = cpu_to_le16(1),
7572 };
7573 u8 type = IWL_MEASURE_BASIC;
7574 u8 buffer[32];
7575 u8 channel;
7576
7577 if (count) {
7578 char *p = buffer;
7579 strncpy(buffer, buf, min(sizeof(buffer), count));
7580 channel = simple_strtoul(p, NULL, 0);
7581 if (channel)
7582 params.channel = channel;
7583
7584 p = buffer;
7585 while (*p && *p != ' ')
7586 p++;
7587 if (*p)
7588 type = simple_strtoul(p + 1, NULL, 0);
7589 }
7590
7591 IWL_DEBUG_INFO("Invoking measurement of type %d on "
7592 "channel %d (for '%s')\n", type, params.channel, buf);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007593 iwl3945_get_measurement(priv, &params, type);
Zhu Yib481de92007-09-25 17:54:57 -07007594
7595 return count;
7596}
7597
7598static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
7599 show_measurement, store_measurement);
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007600#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
Zhu Yib481de92007-09-25 17:54:57 -07007601
Zhu Yib481de92007-09-25 17:54:57 -07007602static ssize_t store_retry_rate(struct device *d,
7603 struct device_attribute *attr,
7604 const char *buf, size_t count)
7605{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007606 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007607
7608 priv->retry_rate = simple_strtoul(buf, NULL, 0);
7609 if (priv->retry_rate <= 0)
7610 priv->retry_rate = 1;
7611
7612 return count;
7613}
7614
7615static ssize_t show_retry_rate(struct device *d,
7616 struct device_attribute *attr, char *buf)
7617{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007618 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007619 return sprintf(buf, "%d", priv->retry_rate);
7620}
7621
7622static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
7623 store_retry_rate);
7624
7625static ssize_t store_power_level(struct device *d,
7626 struct device_attribute *attr,
7627 const char *buf, size_t count)
7628{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007629 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007630 int rc;
7631 int mode;
7632
7633 mode = simple_strtoul(buf, NULL, 0);
7634 mutex_lock(&priv->mutex);
7635
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007636 if (!iwl3945_is_ready(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07007637 rc = -EAGAIN;
7638 goto out;
7639 }
7640
7641 if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
7642 mode = IWL_POWER_AC;
7643 else
7644 mode |= IWL_POWER_ENABLED;
7645
7646 if (mode != priv->power_mode) {
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007647 rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
Zhu Yib481de92007-09-25 17:54:57 -07007648 if (rc) {
7649 IWL_DEBUG_MAC80211("failed setting power mode.\n");
7650 goto out;
7651 }
7652 priv->power_mode = mode;
7653 }
7654
7655 rc = count;
7656
7657 out:
7658 mutex_unlock(&priv->mutex);
7659 return rc;
7660}
7661
7662#define MAX_WX_STRING 80
7663
7664/* Values are in microsecond */
7665static const s32 timeout_duration[] = {
7666 350000,
7667 250000,
7668 75000,
7669 37000,
7670 25000,
7671};
7672static const s32 period_duration[] = {
7673 400000,
7674 700000,
7675 1000000,
7676 1000000,
7677 1000000
7678};
7679
7680static ssize_t show_power_level(struct device *d,
7681 struct device_attribute *attr, char *buf)
7682{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007683 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007684 int level = IWL_POWER_LEVEL(priv->power_mode);
7685 char *p = buf;
7686
7687 p += sprintf(p, "%d ", level);
7688 switch (level) {
7689 case IWL_POWER_MODE_CAM:
7690 case IWL_POWER_AC:
7691 p += sprintf(p, "(AC)");
7692 break;
7693 case IWL_POWER_BATTERY:
7694 p += sprintf(p, "(BATTERY)");
7695 break;
7696 default:
7697 p += sprintf(p,
7698 "(Timeout %dms, Period %dms)",
7699 timeout_duration[level - 1] / 1000,
7700 period_duration[level - 1] / 1000);
7701 }
7702
7703 if (!(priv->power_mode & IWL_POWER_ENABLED))
7704 p += sprintf(p, " OFF\n");
7705 else
7706 p += sprintf(p, " \n");
7707
7708 return (p - buf + 1);
7709
7710}
7711
7712static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
7713 store_power_level);
7714
7715static ssize_t show_channels(struct device *d,
7716 struct device_attribute *attr, char *buf)
7717{
Johannes Berg8318d782008-01-24 19:38:38 +01007718 /* all this shit doesn't belong into sysfs anyway */
7719 return 0;
Zhu Yib481de92007-09-25 17:54:57 -07007720}
7721
7722static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
7723
7724static ssize_t show_statistics(struct device *d,
7725 struct device_attribute *attr, char *buf)
7726{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007727 struct iwl3945_priv *priv = dev_get_drvdata(d);
7728 u32 size = sizeof(struct iwl3945_notif_statistics);
Zhu Yib481de92007-09-25 17:54:57 -07007729 u32 len = 0, ofs = 0;
7730 u8 *data = (u8 *) & priv->statistics;
7731 int rc = 0;
7732
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007733 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007734 return -EAGAIN;
7735
7736 mutex_lock(&priv->mutex);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007737 rc = iwl3945_send_statistics_request(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007738 mutex_unlock(&priv->mutex);
7739
7740 if (rc) {
7741 len = sprintf(buf,
7742 "Error sending statistics request: 0x%08X\n", rc);
7743 return len;
7744 }
7745
7746 while (size && (PAGE_SIZE - len)) {
7747 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
7748 PAGE_SIZE - len, 1);
7749 len = strlen(buf);
7750 if (PAGE_SIZE - len)
7751 buf[len++] = '\n';
7752
7753 ofs += 16;
7754 size -= min(size, 16U);
7755 }
7756
7757 return len;
7758}
7759
7760static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
7761
7762static ssize_t show_antenna(struct device *d,
7763 struct device_attribute *attr, char *buf)
7764{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007765 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007766
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007767 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007768 return -EAGAIN;
7769
7770 return sprintf(buf, "%d\n", priv->antenna);
7771}
7772
7773static ssize_t store_antenna(struct device *d,
7774 struct device_attribute *attr,
7775 const char *buf, size_t count)
7776{
7777 int ant;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007778 struct iwl3945_priv *priv = dev_get_drvdata(d);
Zhu Yib481de92007-09-25 17:54:57 -07007779
7780 if (count == 0)
7781 return 0;
7782
7783 if (sscanf(buf, "%1i", &ant) != 1) {
7784 IWL_DEBUG_INFO("not in hex or decimal form.\n");
7785 return count;
7786 }
7787
7788 if ((ant >= 0) && (ant <= 2)) {
7789 IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007790 priv->antenna = (enum iwl3945_antenna)ant;
Zhu Yib481de92007-09-25 17:54:57 -07007791 } else
7792 IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
7793
7794
7795 return count;
7796}
7797
7798static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
7799
7800static ssize_t show_status(struct device *d,
7801 struct device_attribute *attr, char *buf)
7802{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007803 struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7804 if (!iwl3945_is_alive(priv))
Zhu Yib481de92007-09-25 17:54:57 -07007805 return -EAGAIN;
7806 return sprintf(buf, "0x%08x\n", (int)priv->status);
7807}
7808
7809static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
7810
7811static ssize_t dump_error_log(struct device *d,
7812 struct device_attribute *attr,
7813 const char *buf, size_t count)
7814{
7815 char *p = (char *)buf;
7816
7817 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007818 iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007819
7820 return strnlen(buf, count);
7821}
7822
7823static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
7824
7825static ssize_t dump_event_log(struct device *d,
7826 struct device_attribute *attr,
7827 const char *buf, size_t count)
7828{
7829 char *p = (char *)buf;
7830
7831 if (p[0] == '1')
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007832 iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007833
7834 return strnlen(buf, count);
7835}
7836
7837static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
7838
7839/*****************************************************************************
7840 *
7841 * driver setup and teardown
7842 *
7843 *****************************************************************************/
7844
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007845static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007846{
7847 priv->workqueue = create_workqueue(DRV_NAME);
7848
7849 init_waitqueue_head(&priv->wait_command_queue);
7850
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007851 INIT_WORK(&priv->up, iwl3945_bg_up);
7852 INIT_WORK(&priv->restart, iwl3945_bg_restart);
7853 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
7854 INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
7855 INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
7856 INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
7857 INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
7858 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
7859 INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
7860 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
7861 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
7862 INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
Zhu Yib481de92007-09-25 17:54:57 -07007863
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007864 iwl3945_hw_setup_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007865
7866 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007867 iwl3945_irq_tasklet, (unsigned long)priv);
Zhu Yib481de92007-09-25 17:54:57 -07007868}
7869
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007870static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07007871{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007872 iwl3945_hw_cancel_deferred_work(priv);
Zhu Yib481de92007-09-25 17:54:57 -07007873
Joonwoo Parke47eb6a2007-11-29 10:42:49 +09007874 cancel_delayed_work_sync(&priv->init_alive_start);
Zhu Yib481de92007-09-25 17:54:57 -07007875 cancel_delayed_work(&priv->scan_check);
7876 cancel_delayed_work(&priv->alive_start);
7877 cancel_delayed_work(&priv->post_associate);
7878 cancel_work_sync(&priv->beacon_update);
7879}
7880
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007881static struct attribute *iwl3945_sysfs_entries[] = {
Zhu Yib481de92007-09-25 17:54:57 -07007882 &dev_attr_antenna.attr,
7883 &dev_attr_channels.attr,
7884 &dev_attr_dump_errors.attr,
7885 &dev_attr_dump_events.attr,
7886 &dev_attr_flags.attr,
7887 &dev_attr_filter_flags.attr,
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007888#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
Zhu Yib481de92007-09-25 17:54:57 -07007889 &dev_attr_measurement.attr,
7890#endif
7891 &dev_attr_power_level.attr,
Zhu Yib481de92007-09-25 17:54:57 -07007892 &dev_attr_retry_rate.attr,
7893 &dev_attr_rf_kill.attr,
7894 &dev_attr_rs_window.attr,
7895 &dev_attr_statistics.attr,
7896 &dev_attr_status.attr,
7897 &dev_attr_temperature.attr,
Zhu Yib481de92007-09-25 17:54:57 -07007898 &dev_attr_tx_power.attr,
7899
7900 NULL
7901};
7902
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007903static struct attribute_group iwl3945_attribute_group = {
Zhu Yib481de92007-09-25 17:54:57 -07007904 .name = NULL, /* put in device directory */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007905 .attrs = iwl3945_sysfs_entries,
Zhu Yib481de92007-09-25 17:54:57 -07007906};
7907
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007908static struct ieee80211_ops iwl3945_hw_ops = {
7909 .tx = iwl3945_mac_tx,
7910 .start = iwl3945_mac_start,
7911 .stop = iwl3945_mac_stop,
7912 .add_interface = iwl3945_mac_add_interface,
7913 .remove_interface = iwl3945_mac_remove_interface,
7914 .config = iwl3945_mac_config,
7915 .config_interface = iwl3945_mac_config_interface,
7916 .configure_filter = iwl3945_configure_filter,
7917 .set_key = iwl3945_mac_set_key,
7918 .get_stats = iwl3945_mac_get_stats,
7919 .get_tx_stats = iwl3945_mac_get_tx_stats,
7920 .conf_tx = iwl3945_mac_conf_tx,
7921 .get_tsf = iwl3945_mac_get_tsf,
7922 .reset_tsf = iwl3945_mac_reset_tsf,
7923 .beacon_update = iwl3945_mac_beacon_update,
7924 .hw_scan = iwl3945_mac_hw_scan
Zhu Yib481de92007-09-25 17:54:57 -07007925};
7926
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007927static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Zhu Yib481de92007-09-25 17:54:57 -07007928{
7929 int err = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007930 struct iwl3945_priv *priv;
Zhu Yib481de92007-09-25 17:54:57 -07007931 struct ieee80211_hw *hw;
Tomas Winkler82b9a122008-03-04 18:09:30 -08007932 struct iwl_3945_cfg *cfg = (struct iwl_3945_cfg *)(ent->driver_data);
Zhu Yib481de92007-09-25 17:54:57 -07007933 int i;
Zhu Yi5a669262008-01-14 17:46:18 -08007934 DECLARE_MAC_BUF(mac);
Zhu Yib481de92007-09-25 17:54:57 -07007935
Cahill, Ben M6440adb2007-11-29 11:09:55 +08007936 /* Disabling hardware scan means that mac80211 will perform scans
7937 * "the hard way", rather than using device's scan. */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007938 if (iwl3945_param_disable_hw_scan) {
Zhu Yib481de92007-09-25 17:54:57 -07007939 IWL_DEBUG_INFO("Disabling hw_scan\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007940 iwl3945_hw_ops.hw_scan = NULL;
Zhu Yib481de92007-09-25 17:54:57 -07007941 }
7942
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007943 if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
7944 (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
Zhu Yib481de92007-09-25 17:54:57 -07007945 IWL_ERROR("invalid queues_num, should be between %d and %d\n",
7946 IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
7947 err = -EINVAL;
7948 goto out;
7949 }
7950
7951 /* mac80211 allocates memory for this device instance, including
7952 * space for this driver's private structure */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007953 hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
Zhu Yib481de92007-09-25 17:54:57 -07007954 if (hw == NULL) {
7955 IWL_ERROR("Can not allocate network device\n");
7956 err = -ENOMEM;
7957 goto out;
7958 }
7959 SET_IEEE80211_DEV(hw, &pdev->dev);
7960
Johannes Bergf51359a2007-10-28 14:53:36 +01007961 hw->rate_control_algorithm = "iwl-3945-rs";
7962
Zhu Yib481de92007-09-25 17:54:57 -07007963 IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
7964 priv = hw->priv;
7965 priv->hw = hw;
7966
7967 priv->pci_dev = pdev;
Tomas Winkler82b9a122008-03-04 18:09:30 -08007968 priv->cfg = cfg;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08007969
7970 /* Select antenna (may be helpful if only one antenna is connected) */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007971 priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08007972#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08007973 iwl3945_debug_level = iwl3945_param_debug;
Zhu Yib481de92007-09-25 17:54:57 -07007974 atomic_set(&priv->restrict_refcnt, 0);
7975#endif
7976 priv->retry_rate = 1;
7977
7978 priv->ibss_beacon = NULL;
7979
7980 /* Tell mac80211 and its clients (e.g. Wireless Extensions)
7981 * the range of signal quality values that we'll provide.
7982 * Negative values for level/noise indicate that we'll provide dBm.
7983 * For WE, at least, non-0 values here *enable* display of values
7984 * in app (iwconfig). */
7985 hw->max_rssi = -20; /* signal level, negative indicates dBm */
7986 hw->max_noise = -20; /* noise level, negative indicates dBm */
7987 hw->max_signal = 100; /* link quality indication (%) */
7988
7989 /* Tell mac80211 our Tx characteristics */
7990 hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
7991
Cahill, Ben M6440adb2007-11-29 11:09:55 +08007992 /* 4 EDCA QOS priorities */
Zhu Yib481de92007-09-25 17:54:57 -07007993 hw->queues = 4;
7994
7995 spin_lock_init(&priv->lock);
7996 spin_lock_init(&priv->power_data.lock);
7997 spin_lock_init(&priv->sta_lock);
7998 spin_lock_init(&priv->hcmd_lock);
7999
8000 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
8001 INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
8002
8003 INIT_LIST_HEAD(&priv->free_frames);
8004
8005 mutex_init(&priv->mutex);
8006 if (pci_enable_device(pdev)) {
8007 err = -ENODEV;
8008 goto out_ieee80211_free_hw;
8009 }
8010
8011 pci_set_master(pdev);
8012
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008013 /* Clear the driver's (not device's) station table */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008014 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008015
8016 priv->data_retry_limit = -1;
8017 priv->ieee_channels = NULL;
8018 priv->ieee_rates = NULL;
Johannes Berg8318d782008-01-24 19:38:38 +01008019 priv->band = IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07008020
8021 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
8022 if (!err)
8023 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
8024 if (err) {
8025 printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
8026 goto out_pci_disable_device;
8027 }
8028
8029 pci_set_drvdata(pdev, priv);
8030 err = pci_request_regions(pdev, DRV_NAME);
8031 if (err)
8032 goto out_pci_disable_device;
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008033
Zhu Yib481de92007-09-25 17:54:57 -07008034 /* We disable the RETRY_TIMEOUT register (0x41) to keep
8035 * PCI Tx retries from interfering with C3 CPU state */
8036 pci_write_config_byte(pdev, 0x41, 0x00);
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008037
Zhu Yib481de92007-09-25 17:54:57 -07008038 priv->hw_base = pci_iomap(pdev, 0, 0);
8039 if (!priv->hw_base) {
8040 err = -ENODEV;
8041 goto out_pci_release_regions;
8042 }
8043
8044 IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
8045 (unsigned long long) pci_resource_len(pdev, 0));
8046 IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
8047
8048 /* Initialize module parameter values here */
8049
Cahill, Ben M6440adb2007-11-29 11:09:55 +08008050 /* Disable radio (SW RF KILL) via parameter when loading driver */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008051 if (iwl3945_param_disable) {
Zhu Yib481de92007-09-25 17:54:57 -07008052 set_bit(STATUS_RF_KILL_SW, &priv->status);
8053 IWL_DEBUG_INFO("Radio disabled.\n");
8054 }
8055
8056 priv->iw_mode = IEEE80211_IF_TYPE_STA;
8057
Zhu Yib481de92007-09-25 17:54:57 -07008058 printk(KERN_INFO DRV_NAME
Tomas Winkler82b9a122008-03-04 18:09:30 -08008059 ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
Zhu Yib481de92007-09-25 17:54:57 -07008060
8061 /* Device-specific setup */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008062 if (iwl3945_hw_set_hw_setting(priv)) {
Zhu Yib481de92007-09-25 17:54:57 -07008063 IWL_ERROR("failed to set hw settings\n");
Zhu Yib481de92007-09-25 17:54:57 -07008064 goto out_iounmap;
8065 }
8066
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008067 if (iwl3945_param_qos_enable)
Zhu Yib481de92007-09-25 17:54:57 -07008068 priv->qos_data.qos_enable = 1;
8069
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008070 iwl3945_reset_qos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008071
8072 priv->qos_data.qos_active = 0;
8073 priv->qos_data.qos_cap.val = 0;
Zhu Yib481de92007-09-25 17:54:57 -07008074
Johannes Berg8318d782008-01-24 19:38:38 +01008075 iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008076 iwl3945_setup_deferred_work(priv);
8077 iwl3945_setup_rx_handlers(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008078
8079 priv->rates_mask = IWL_RATES_MASK;
8080 /* If power management is turned on, default to AC mode */
8081 priv->power_mode = IWL_POWER_AC;
8082 priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
8083
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008084 iwl3945_disable_interrupts(priv);
Jes Sorensen49df2b32007-10-26 16:10:39 +02008085
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008086 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008087 if (err) {
8088 IWL_ERROR("failed to create sysfs device attributes\n");
Zhu Yib481de92007-09-25 17:54:57 -07008089 goto out_release_irq;
8090 }
8091
Zhu Yi5a669262008-01-14 17:46:18 -08008092 /* nic init */
8093 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8094 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8095
8096 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8097 err = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
8098 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8099 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8100 if (err < 0) {
8101 IWL_DEBUG_INFO("Failed to init the card\n");
8102 goto out_remove_sysfs;
8103 }
8104 /* Read the EEPROM */
8105 err = iwl3945_eeprom_init(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008106 if (err) {
Zhu Yi5a669262008-01-14 17:46:18 -08008107 IWL_ERROR("Unable to init EEPROM\n");
8108 goto out_remove_sysfs;
8109 }
8110 /* MAC Address location in EEPROM same for 3945/4965 */
8111 get_eeprom_mac(priv, priv->mac_addr);
8112 IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
8113 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
8114
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008115 err = iwl3945_init_channel_map(priv);
8116 if (err) {
8117 IWL_ERROR("initializing regulatory failed: %d\n", err);
8118 goto out_remove_sysfs;
8119 }
8120
8121 err = iwl3945_init_geos(priv);
8122 if (err) {
8123 IWL_ERROR("initializing geos failed: %d\n", err);
8124 goto out_free_channel_map;
8125 }
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008126
Zhu Yi5a669262008-01-14 17:46:18 -08008127 iwl3945_rate_control_register(priv->hw);
8128 err = ieee80211_register_hw(priv->hw);
8129 if (err) {
8130 IWL_ERROR("Failed to register network device (error %d)\n", err);
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008131 goto out_free_geos;
Zhu Yib481de92007-09-25 17:54:57 -07008132 }
8133
Zhu Yi5a669262008-01-14 17:46:18 -08008134 priv->hw->conf.beacon_int = 100;
8135 priv->mac80211_registered = 1;
8136 pci_save_state(pdev);
8137 pci_disable_device(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008138
8139 return 0;
8140
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008141 out_free_geos:
8142 iwl3945_free_geos(priv);
8143 out_free_channel_map:
8144 iwl3945_free_channel_map(priv);
Zhu Yi5a669262008-01-14 17:46:18 -08008145 out_remove_sysfs:
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008146 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008147
8148 out_release_irq:
Zhu Yib481de92007-09-25 17:54:57 -07008149 destroy_workqueue(priv->workqueue);
8150 priv->workqueue = NULL;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008151 iwl3945_unset_hw_setting(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008152
8153 out_iounmap:
8154 pci_iounmap(pdev, priv->hw_base);
8155 out_pci_release_regions:
8156 pci_release_regions(pdev);
8157 out_pci_disable_device:
8158 pci_disable_device(pdev);
8159 pci_set_drvdata(pdev, NULL);
8160 out_ieee80211_free_hw:
8161 ieee80211_free_hw(priv->hw);
8162 out:
8163 return err;
8164}
8165
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008166static void iwl3945_pci_remove(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008167{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008168 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008169 struct list_head *p, *q;
8170 int i;
8171
8172 if (!priv)
8173 return;
8174
8175 IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
8176
Zhu Yib481de92007-09-25 17:54:57 -07008177 set_bit(STATUS_EXIT_PENDING, &priv->status);
Zhu Yib24d22b2007-12-19 13:59:52 +08008178
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008179 iwl3945_down(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008180
8181 /* Free MAC hash list for ADHOC */
8182 for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
8183 list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
8184 list_del(p);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008185 kfree(list_entry(p, struct iwl3945_ibss_seq, list));
Zhu Yib481de92007-09-25 17:54:57 -07008186 }
8187 }
8188
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008189 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
Zhu Yib481de92007-09-25 17:54:57 -07008190
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008191 iwl3945_dealloc_ucode_pci(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008192
8193 if (priv->rxq.bd)
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008194 iwl3945_rx_queue_free(priv, &priv->rxq);
8195 iwl3945_hw_txq_ctx_free(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008196
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008197 iwl3945_unset_hw_setting(priv);
8198 iwl3945_clear_stations_table(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008199
8200 if (priv->mac80211_registered) {
8201 ieee80211_unregister_hw(priv->hw);
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008202 iwl3945_rate_control_unregister(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008203 }
8204
Mohamed Abbas6ef89d02007-10-25 17:15:47 +08008205 /*netif_stop_queue(dev); */
8206 flush_workqueue(priv->workqueue);
8207
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008208 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
Zhu Yib481de92007-09-25 17:54:57 -07008209 * priv->workqueue... so we can't take down the workqueue
8210 * until now... */
8211 destroy_workqueue(priv->workqueue);
8212 priv->workqueue = NULL;
8213
Zhu Yib481de92007-09-25 17:54:57 -07008214 pci_iounmap(pdev, priv->hw_base);
8215 pci_release_regions(pdev);
8216 pci_disable_device(pdev);
8217 pci_set_drvdata(pdev, NULL);
8218
Reinette Chatre849e0dc2008-01-23 10:15:18 -08008219 iwl3945_free_channel_map(priv);
8220 iwl3945_free_geos(priv);
Zhu Yib481de92007-09-25 17:54:57 -07008221
8222 if (priv->ibss_beacon)
8223 dev_kfree_skb(priv->ibss_beacon);
8224
8225 ieee80211_free_hw(priv->hw);
8226}
8227
8228#ifdef CONFIG_PM
8229
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008230static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
Zhu Yib481de92007-09-25 17:54:57 -07008231{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008232 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008233
Zhu Yie655b9f2008-01-24 02:19:38 -08008234 if (priv->is_open) {
8235 set_bit(STATUS_IN_SUSPEND, &priv->status);
8236 iwl3945_mac_stop(priv->hw);
8237 priv->is_open = 1;
8238 }
Zhu Yib481de92007-09-25 17:54:57 -07008239
Zhu Yib481de92007-09-25 17:54:57 -07008240 pci_set_power_state(pdev, PCI_D3hot);
8241
Zhu Yib481de92007-09-25 17:54:57 -07008242 return 0;
8243}
8244
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008245static int iwl3945_pci_resume(struct pci_dev *pdev)
Zhu Yib481de92007-09-25 17:54:57 -07008246{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008247 struct iwl3945_priv *priv = pci_get_drvdata(pdev);
Zhu Yib481de92007-09-25 17:54:57 -07008248
Zhu Yib481de92007-09-25 17:54:57 -07008249 pci_set_power_state(pdev, PCI_D0);
Zhu Yib481de92007-09-25 17:54:57 -07008250
Zhu Yie655b9f2008-01-24 02:19:38 -08008251 if (priv->is_open)
8252 iwl3945_mac_start(priv->hw);
Zhu Yib481de92007-09-25 17:54:57 -07008253
Zhu Yie655b9f2008-01-24 02:19:38 -08008254 clear_bit(STATUS_IN_SUSPEND, &priv->status);
Zhu Yib481de92007-09-25 17:54:57 -07008255 return 0;
8256}
8257
8258#endif /* CONFIG_PM */
8259
8260/*****************************************************************************
8261 *
8262 * driver and module entry point
8263 *
8264 *****************************************************************************/
8265
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008266static struct pci_driver iwl3945_driver = {
Zhu Yib481de92007-09-25 17:54:57 -07008267 .name = DRV_NAME,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008268 .id_table = iwl3945_hw_card_ids,
8269 .probe = iwl3945_pci_probe,
8270 .remove = __devexit_p(iwl3945_pci_remove),
Zhu Yib481de92007-09-25 17:54:57 -07008271#ifdef CONFIG_PM
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008272 .suspend = iwl3945_pci_suspend,
8273 .resume = iwl3945_pci_resume,
Zhu Yib481de92007-09-25 17:54:57 -07008274#endif
8275};
8276
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008277static int __init iwl3945_init(void)
Zhu Yib481de92007-09-25 17:54:57 -07008278{
8279
8280 int ret;
8281 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
8282 printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008283 ret = pci_register_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008284 if (ret) {
8285 IWL_ERROR("Unable to initialize PCI module\n");
8286 return ret;
8287 }
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008288#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008289 ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008290 if (ret) {
8291 IWL_ERROR("Unable to create driver sysfs file\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008292 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008293 return ret;
8294 }
8295#endif
8296
8297 return ret;
8298}
8299
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008300static void __exit iwl3945_exit(void)
Zhu Yib481de92007-09-25 17:54:57 -07008301{
Christoph Hellwigc8b0e6e2007-10-25 17:15:51 +08008302#ifdef CONFIG_IWL3945_DEBUG
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008303 driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
Zhu Yib481de92007-09-25 17:54:57 -07008304#endif
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008305 pci_unregister_driver(&iwl3945_driver);
Zhu Yib481de92007-09-25 17:54:57 -07008306}
8307
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008308module_param_named(antenna, iwl3945_param_antenna, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008309MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008310module_param_named(disable, iwl3945_param_disable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008311MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008312module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008313MODULE_PARM_DESC(hwcrypto,
8314 "using hardware crypto engine (default 0 [software])\n");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008315module_param_named(debug, iwl3945_param_debug, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008316MODULE_PARM_DESC(debug, "debug output mask");
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008317module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008318MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
8319
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008320module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008321MODULE_PARM_DESC(queues_num, "number of hw queues.");
8322
8323/* QoS */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008324module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
Zhu Yib481de92007-09-25 17:54:57 -07008325MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
8326
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08008327module_exit(iwl3945_exit);
8328module_init(iwl3945_init);