blob: 9168401401bcc089f86d1f57e8fea2260b68de53 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * File: msi.c
3 * Purpose: PCI Message Signaled Interrupt (MSI)
4 *
5 * Copyright (C) 2003-2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
Eric W. Biederman1ce03372006-10-04 02:16:41 -07009#include <linux/err.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/mm.h>
11#include <linux/irq.h>
12#include <linux/interrupt.h>
13#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/ioport.h>
15#include <linux/smp_lock.h>
16#include <linux/pci.h>
17#include <linux/proc_fs.h>
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070018#include <linux/msi.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019
20#include <asm/errno.h>
21#include <asm/io.h>
22#include <asm/smp.h>
23
24#include "pci.h"
25#include "msi.h"
26
27static DEFINE_SPINLOCK(msi_lock);
28static struct msi_desc* msi_desc[NR_IRQS] = { [0 ... NR_IRQS-1] = NULL };
Christoph Lametere18b8902006-12-06 20:33:20 -080029static struct kmem_cache* msi_cachep;
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
31static int pci_msi_enable = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
Linus Torvalds1da177e2005-04-16 15:20:36 -070033static int msi_cache_init(void)
34{
Pekka J Enberg57181782006-09-27 01:51:03 -070035 msi_cachep = kmem_cache_create("msi_cache", sizeof(struct msi_desc),
36 0, SLAB_HWCACHE_ALIGN, NULL, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -070037 if (!msi_cachep)
38 return -ENOMEM;
39
40 return 0;
41}
42
Eric W. Biederman1ce03372006-10-04 02:16:41 -070043static void msi_set_mask_bit(unsigned int irq, int flag)
Linus Torvalds1da177e2005-04-16 15:20:36 -070044{
45 struct msi_desc *entry;
46
Eric W. Biederman1ce03372006-10-04 02:16:41 -070047 entry = msi_desc[irq];
Eric W. Biederman277bc332006-10-04 02:16:57 -070048 BUG_ON(!entry || !entry->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070049 switch (entry->msi_attrib.type) {
50 case PCI_CAP_ID_MSI:
Eric W. Biederman277bc332006-10-04 02:16:57 -070051 if (entry->msi_attrib.maskbit) {
52 int pos;
53 u32 mask_bits;
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
Eric W. Biederman277bc332006-10-04 02:16:57 -070055 pos = (long)entry->mask_base;
56 pci_read_config_dword(entry->dev, pos, &mask_bits);
57 mask_bits &= ~(1);
58 mask_bits |= flag;
59 pci_write_config_dword(entry->dev, pos, mask_bits);
60 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -070062 case PCI_CAP_ID_MSIX:
63 {
64 int offset = entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
65 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET;
66 writel(flag, entry->mask_base + offset);
67 break;
68 }
69 default:
Eric W. Biederman277bc332006-10-04 02:16:57 -070070 BUG();
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 break;
72 }
73}
74
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070075void read_msi_msg(unsigned int irq, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -070076{
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070077 struct msi_desc *entry = get_irq_data(irq);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -070078 switch(entry->msi_attrib.type) {
79 case PCI_CAP_ID_MSI:
80 {
81 struct pci_dev *dev = entry->dev;
82 int pos = entry->msi_attrib.pos;
83 u16 data;
84
85 pci_read_config_dword(dev, msi_lower_address_reg(pos),
86 &msg->address_lo);
87 if (entry->msi_attrib.is_64) {
88 pci_read_config_dword(dev, msi_upper_address_reg(pos),
89 &msg->address_hi);
90 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
91 } else {
92 msg->address_hi = 0;
93 pci_read_config_word(dev, msi_data_reg(pos, 1), &data);
94 }
95 msg->data = data;
96 break;
97 }
98 case PCI_CAP_ID_MSIX:
99 {
100 void __iomem *base;
101 base = entry->mask_base +
102 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
103
104 msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
105 msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
106 msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
107 break;
108 }
109 default:
110 BUG();
111 }
112}
113
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700114void write_msi_msg(unsigned int irq, struct msi_msg *msg)
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700115{
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700116 struct msi_desc *entry = get_irq_data(irq);
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700117 switch (entry->msi_attrib.type) {
118 case PCI_CAP_ID_MSI:
119 {
120 struct pci_dev *dev = entry->dev;
121 int pos = entry->msi_attrib.pos;
122
123 pci_write_config_dword(dev, msi_lower_address_reg(pos),
124 msg->address_lo);
125 if (entry->msi_attrib.is_64) {
126 pci_write_config_dword(dev, msi_upper_address_reg(pos),
127 msg->address_hi);
128 pci_write_config_word(dev, msi_data_reg(pos, 1),
129 msg->data);
130 } else {
131 pci_write_config_word(dev, msi_data_reg(pos, 0),
132 msg->data);
133 }
134 break;
135 }
136 case PCI_CAP_ID_MSIX:
137 {
138 void __iomem *base;
139 base = entry->mask_base +
140 entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE;
141
142 writel(msg->address_lo,
143 base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
144 writel(msg->address_hi,
145 base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
146 writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
147 break;
148 }
149 default:
150 BUG();
151 }
152}
153
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700154void mask_msi_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155{
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700156 msi_set_mask_bit(irq, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157}
158
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700159void unmask_msi_irq(unsigned int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160{
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700161 msi_set_mask_bit(irq, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162}
163
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700164static int msi_free_irq(struct pci_dev* dev, int irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165static int msi_init(void)
166{
167 static int status = -ENOMEM;
168
169 if (!status)
170 return status;
171
172 if (pci_msi_quirk) {
173 pci_msi_enable = 0;
174 printk(KERN_WARNING "PCI: MSI quirk detected. MSI disabled.\n");
175 status = -EINVAL;
176 return status;
177 }
178
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700179 status = msi_cache_init();
180 if (status < 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 pci_msi_enable = 0;
182 printk(KERN_WARNING "PCI: MSI cache init failed\n");
183 return status;
184 }
Mark Maulefd58e552006-04-10 21:17:48 -0500185
Linus Torvalds1da177e2005-04-16 15:20:36 -0700186 return status;
187}
188
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189static struct msi_desc* alloc_msi_entry(void)
190{
191 struct msi_desc *entry;
192
Pekka J Enberg57181782006-09-27 01:51:03 -0700193 entry = kmem_cache_zalloc(msi_cachep, GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194 if (!entry)
195 return NULL;
196
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 entry->link.tail = entry->link.head = 0; /* single message */
198 entry->dev = NULL;
199
200 return entry;
201}
202
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700203static void attach_msi_entry(struct msi_desc *entry, int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204{
205 unsigned long flags;
206
207 spin_lock_irqsave(&msi_lock, flags);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700208 msi_desc[irq] = entry;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209 spin_unlock_irqrestore(&msi_lock, flags);
210}
211
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700212static int create_msi_irq(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213{
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700214 struct msi_desc *entry;
215 int irq;
Ingo Molnarf6bc2662006-01-26 01:42:11 +0100216
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700217 entry = alloc_msi_entry();
218 if (!entry)
219 return -ENOMEM;
220
221 irq = create_irq();
222 if (irq < 0) {
223 kmem_cache_free(msi_cachep, entry);
224 return -EBUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225 }
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700226
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700227 set_irq_data(irq, entry);
228
229 return irq;
230}
231
232static void destroy_msi_irq(unsigned int irq)
233{
234 struct msi_desc *entry;
235
236 entry = get_irq_data(irq);
237 set_irq_chip(irq, NULL);
238 set_irq_data(irq, NULL);
239 destroy_irq(irq);
240 kmem_cache_free(msi_cachep, entry);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241}
242
243static void enable_msi_mode(struct pci_dev *dev, int pos, int type)
244{
245 u16 control;
246
247 pci_read_config_word(dev, msi_control_reg(pos), &control);
248 if (type == PCI_CAP_ID_MSI) {
249 /* Set enabled bits to single MSI & enable MSI_enable bit */
250 msi_enable(control, 1);
251 pci_write_config_word(dev, msi_control_reg(pos), control);
Shaohua Li99dc8042006-05-26 10:58:27 +0800252 dev->msi_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253 } else {
254 msix_enable(control);
255 pci_write_config_word(dev, msi_control_reg(pos), control);
Shaohua Li99dc8042006-05-26 10:58:27 +0800256 dev->msix_enabled = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257 }
258 if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
259 /* PCI Express Endpoint device detected */
Brett M Russa04ce0f2005-08-15 15:23:41 -0400260 pci_intx(dev, 0); /* disable intx */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261 }
262}
263
Kristen Accardi4602b882005-08-16 15:15:58 -0700264void disable_msi_mode(struct pci_dev *dev, int pos, int type)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265{
266 u16 control;
267
268 pci_read_config_word(dev, msi_control_reg(pos), &control);
269 if (type == PCI_CAP_ID_MSI) {
270 /* Set enabled bits to single MSI & enable MSI_enable bit */
271 msi_disable(control);
272 pci_write_config_word(dev, msi_control_reg(pos), control);
Shaohua Li99dc8042006-05-26 10:58:27 +0800273 dev->msi_enabled = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 } else {
275 msix_disable(control);
276 pci_write_config_word(dev, msi_control_reg(pos), control);
Shaohua Li99dc8042006-05-26 10:58:27 +0800277 dev->msix_enabled = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278 }
279 if (pci_find_capability(dev, PCI_CAP_ID_EXP)) {
280 /* PCI Express Endpoint device detected */
Brett M Russa04ce0f2005-08-15 15:23:41 -0400281 pci_intx(dev, 1); /* enable intx */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282 }
283}
284
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700285static int msi_lookup_irq(struct pci_dev *dev, int type)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286{
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700287 int irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288 unsigned long flags;
289
290 spin_lock_irqsave(&msi_lock, flags);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700291 for (irq = 0; irq < NR_IRQS; irq++) {
292 if (!msi_desc[irq] || msi_desc[irq]->dev != dev ||
293 msi_desc[irq]->msi_attrib.type != type ||
294 msi_desc[irq]->msi_attrib.default_irq != dev->irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295 continue;
296 spin_unlock_irqrestore(&msi_lock, flags);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700297 /* This pre-assigned MSI irq for this device
298 already exits. Override dev->irq with this irq */
299 dev->irq = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300 return 0;
301 }
302 spin_unlock_irqrestore(&msi_lock, flags);
303
304 return -EACCES;
305}
306
307void pci_scan_msi_device(struct pci_dev *dev)
308{
309 if (!dev)
310 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311}
312
Shaohua Li41017f02006-02-08 17:11:38 +0800313#ifdef CONFIG_PM
314int pci_save_msi_state(struct pci_dev *dev)
315{
316 int pos, i = 0;
317 u16 control;
318 struct pci_cap_saved_state *save_state;
319 u32 *cap;
320
321 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
322 if (pos <= 0 || dev->no_msi)
323 return 0;
324
325 pci_read_config_word(dev, msi_control_reg(pos), &control);
326 if (!(control & PCI_MSI_FLAGS_ENABLE))
327 return 0;
328
329 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u32) * 5,
330 GFP_KERNEL);
331 if (!save_state) {
332 printk(KERN_ERR "Out of memory in pci_save_msi_state\n");
333 return -ENOMEM;
334 }
335 cap = &save_state->data[0];
336
337 pci_read_config_dword(dev, pos, &cap[i++]);
338 control = cap[0] >> 16;
339 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, &cap[i++]);
340 if (control & PCI_MSI_FLAGS_64BIT) {
341 pci_read_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, &cap[i++]);
342 pci_read_config_dword(dev, pos + PCI_MSI_DATA_64, &cap[i++]);
343 } else
344 pci_read_config_dword(dev, pos + PCI_MSI_DATA_32, &cap[i++]);
345 if (control & PCI_MSI_FLAGS_MASKBIT)
346 pci_read_config_dword(dev, pos + PCI_MSI_MASK_BIT, &cap[i++]);
Shaohua Li41017f02006-02-08 17:11:38 +0800347 save_state->cap_nr = PCI_CAP_ID_MSI;
348 pci_add_saved_cap(dev, save_state);
349 return 0;
350}
351
352void pci_restore_msi_state(struct pci_dev *dev)
353{
354 int i = 0, pos;
355 u16 control;
356 struct pci_cap_saved_state *save_state;
357 u32 *cap;
358
359 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSI);
360 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
361 if (!save_state || pos <= 0)
362 return;
363 cap = &save_state->data[0];
364
365 control = cap[i++] >> 16;
366 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, cap[i++]);
367 if (control & PCI_MSI_FLAGS_64BIT) {
368 pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_HI, cap[i++]);
369 pci_write_config_dword(dev, pos + PCI_MSI_DATA_64, cap[i++]);
370 } else
371 pci_write_config_dword(dev, pos + PCI_MSI_DATA_32, cap[i++]);
372 if (control & PCI_MSI_FLAGS_MASKBIT)
373 pci_write_config_dword(dev, pos + PCI_MSI_MASK_BIT, cap[i++]);
374 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
375 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
376 pci_remove_saved_cap(save_state);
377 kfree(save_state);
378}
379
380int pci_save_msix_state(struct pci_dev *dev)
381{
382 int pos;
Mark Maulefd58e552006-04-10 21:17:48 -0500383 int temp;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700384 int irq, head, tail = 0;
Shaohua Li41017f02006-02-08 17:11:38 +0800385 u16 control;
386 struct pci_cap_saved_state *save_state;
387
388 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
389 if (pos <= 0 || dev->no_msi)
390 return 0;
391
Mark Maulefd58e552006-04-10 21:17:48 -0500392 /* save the capability */
Shaohua Li41017f02006-02-08 17:11:38 +0800393 pci_read_config_word(dev, msi_control_reg(pos), &control);
394 if (!(control & PCI_MSIX_FLAGS_ENABLE))
395 return 0;
396 save_state = kzalloc(sizeof(struct pci_cap_saved_state) + sizeof(u16),
397 GFP_KERNEL);
398 if (!save_state) {
399 printk(KERN_ERR "Out of memory in pci_save_msix_state\n");
400 return -ENOMEM;
401 }
402 *((u16 *)&save_state->data[0]) = control;
403
Mark Maulefd58e552006-04-10 21:17:48 -0500404 /* save the table */
405 temp = dev->irq;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700406 if (msi_lookup_irq(dev, PCI_CAP_ID_MSIX)) {
Mark Maulefd58e552006-04-10 21:17:48 -0500407 kfree(save_state);
408 return -EINVAL;
409 }
410
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700411 irq = head = dev->irq;
Mark Maulefd58e552006-04-10 21:17:48 -0500412 while (head != tail) {
Mark Maulefd58e552006-04-10 21:17:48 -0500413 struct msi_desc *entry;
414
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700415 entry = msi_desc[irq];
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700416 read_msi_msg(irq, &entry->msg_save);
Mark Maulefd58e552006-04-10 21:17:48 -0500417
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700418 tail = msi_desc[irq]->link.tail;
419 irq = tail;
Mark Maulefd58e552006-04-10 21:17:48 -0500420 }
421 dev->irq = temp;
422
Shaohua Li41017f02006-02-08 17:11:38 +0800423 save_state->cap_nr = PCI_CAP_ID_MSIX;
424 pci_add_saved_cap(dev, save_state);
425 return 0;
426}
427
428void pci_restore_msix_state(struct pci_dev *dev)
429{
430 u16 save;
431 int pos;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700432 int irq, head, tail = 0;
Shaohua Li41017f02006-02-08 17:11:38 +0800433 struct msi_desc *entry;
434 int temp;
435 struct pci_cap_saved_state *save_state;
436
437 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_MSIX);
438 if (!save_state)
439 return;
440 save = *((u16 *)&save_state->data[0]);
441 pci_remove_saved_cap(save_state);
442 kfree(save_state);
443
444 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
445 if (pos <= 0)
446 return;
447
448 /* route the table */
449 temp = dev->irq;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700450 if (msi_lookup_irq(dev, PCI_CAP_ID_MSIX))
Shaohua Li41017f02006-02-08 17:11:38 +0800451 return;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700452 irq = head = dev->irq;
Shaohua Li41017f02006-02-08 17:11:38 +0800453 while (head != tail) {
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700454 entry = msi_desc[irq];
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700455 write_msi_msg(irq, &entry->msg_save);
Shaohua Li41017f02006-02-08 17:11:38 +0800456
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700457 tail = msi_desc[irq]->link.tail;
458 irq = tail;
Shaohua Li41017f02006-02-08 17:11:38 +0800459 }
460 dev->irq = temp;
461
462 pci_write_config_word(dev, msi_control_reg(pos), save);
463 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
464}
465#endif
466
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467/**
468 * msi_capability_init - configure device's MSI capability structure
469 * @dev: pointer to the pci_dev data structure of MSI device function
470 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600471 * Setup the MSI capability structure of device function with a single
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700472 * MSI irq, regardless of device function is capable of handling
Linus Torvalds1da177e2005-04-16 15:20:36 -0700473 * multiple messages. A return of zero indicates the successful setup
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700474 * of an entry zero with the new MSI irq or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475 **/
476static int msi_capability_init(struct pci_dev *dev)
477{
Mark Maulefd58e552006-04-10 21:17:48 -0500478 int status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479 struct msi_desc *entry;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700480 int pos, irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481 u16 control;
482
483 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
484 pci_read_config_word(dev, msi_control_reg(pos), &control);
485 /* MSI Entry Initialization */
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700486 irq = create_msi_irq();
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700487 if (irq < 0)
488 return irq;
489
490 entry = get_irq_data(irq);
491 entry->link.head = irq;
492 entry->link.tail = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493 entry->msi_attrib.type = PCI_CAP_ID_MSI;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700494 entry->msi_attrib.is_64 = is_64bit_address(control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495 entry->msi_attrib.entry_nr = 0;
496 entry->msi_attrib.maskbit = is_mask_bit_support(control);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700497 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700498 entry->msi_attrib.pos = pos;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499 if (is_mask_bit_support(control)) {
500 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
501 is_64bit_address(control));
502 }
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700503 entry->dev = dev;
504 if (entry->msi_attrib.maskbit) {
505 unsigned int maskbits, temp;
506 /* All MSIs are unmasked by default, Mask them all */
507 pci_read_config_dword(dev,
508 msi_mask_bits_reg(pos, is_64bit_address(control)),
509 &maskbits);
510 temp = (1 << multi_msi_capable(control));
511 temp = ((temp - 1) & ~temp);
512 maskbits |= temp;
513 pci_write_config_dword(dev,
514 msi_mask_bits_reg(pos, is_64bit_address(control)),
515 maskbits);
516 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517 /* Configure MSI capability structure */
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700518 status = arch_setup_msi_irq(irq, dev);
519 if (status < 0) {
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700520 destroy_msi_irq(irq);
Mark Maulefd58e552006-04-10 21:17:48 -0500521 return status;
522 }
Shaohua Li41017f02006-02-08 17:11:38 +0800523
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700524 attach_msi_entry(entry, irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 /* Set MSI enabled bits */
526 enable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
527
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700528 dev->irq = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529 return 0;
530}
531
532/**
533 * msix_capability_init - configure device's MSI-X capability
534 * @dev: pointer to the pci_dev data structure of MSI-X device function
Randy Dunlap8f7020d2005-10-23 11:57:38 -0700535 * @entries: pointer to an array of struct msix_entry entries
536 * @nvec: number of @entries
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600538 * Setup the MSI-X capability structure of device function with a
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700539 * single MSI-X irq. A return of zero indicates the successful setup of
540 * requested MSI-X entries with allocated irqs or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541 **/
542static int msix_capability_init(struct pci_dev *dev,
543 struct msix_entry *entries, int nvec)
544{
545 struct msi_desc *head = NULL, *tail = NULL, *entry = NULL;
Mark Maulefd58e552006-04-10 21:17:48 -0500546 int status;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700547 int irq, pos, i, j, nr_entries, temp = 0;
Grant Grundlera0454b42006-02-16 23:58:29 -0800548 unsigned long phys_addr;
549 u32 table_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700550 u16 control;
551 u8 bir;
552 void __iomem *base;
553
554 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
555 /* Request & Map MSI-X table region */
556 pci_read_config_word(dev, msi_control_reg(pos), &control);
557 nr_entries = multi_msix_capable(control);
Grant Grundlera0454b42006-02-16 23:58:29 -0800558
559 pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560 bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
Grant Grundlera0454b42006-02-16 23:58:29 -0800561 table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
562 phys_addr = pci_resource_start (dev, bir) + table_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700563 base = ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
564 if (base == NULL)
565 return -ENOMEM;
566
567 /* MSI-X Table Initialization */
568 for (i = 0; i < nvec; i++) {
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700569 irq = create_msi_irq();
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700570 if (irq < 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700573 entry = get_irq_data(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574 j = entries[i].entry;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700575 entries[i].vector = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576 entry->msi_attrib.type = PCI_CAP_ID_MSIX;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700577 entry->msi_attrib.is_64 = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700578 entry->msi_attrib.entry_nr = j;
579 entry->msi_attrib.maskbit = 1;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700580 entry->msi_attrib.default_irq = dev->irq;
Eric W. Biederman0366f8f2006-10-04 02:16:33 -0700581 entry->msi_attrib.pos = pos;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582 entry->dev = dev;
583 entry->mask_base = base;
584 if (!head) {
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700585 entry->link.head = irq;
586 entry->link.tail = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 head = entry;
588 } else {
589 entry->link.head = temp;
590 entry->link.tail = tail->link.tail;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700591 tail->link.tail = irq;
592 head->link.head = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593 }
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700594 temp = irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595 tail = entry;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596 /* Configure MSI-X capability structure */
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700597 status = arch_setup_msi_irq(irq, dev);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700598 if (status < 0) {
599 destroy_msi_irq(irq);
Mark Maulefd58e552006-04-10 21:17:48 -0500600 break;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700601 }
Mark Maulefd58e552006-04-10 21:17:48 -0500602
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700603 attach_msi_entry(entry, irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 }
605 if (i != nvec) {
Eric W. Biederman92db6d12006-10-04 02:16:35 -0700606 int avail = i - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607 i--;
608 for (; i >= 0; i--) {
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700609 irq = (entries + i)->vector;
610 msi_free_irq(dev, irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700611 (entries + i)->vector = 0;
612 }
Eric W. Biederman92db6d12006-10-04 02:16:35 -0700613 /* If we had some success report the number of irqs
614 * we succeeded in setting up.
615 */
616 if (avail <= 0)
617 avail = -EBUSY;
618 return avail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700619 }
620 /* Set MSI-X enabled bits */
621 enable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
622
623 return 0;
624}
625
626/**
Brice Goglin24334a12006-08-31 01:55:07 -0400627 * pci_msi_supported - check whether MSI may be enabled on device
628 * @dev: pointer to the pci_dev data structure of MSI device function
629 *
Brice Goglin0306ebf2006-10-05 10:24:31 +0200630 * Look at global flags, the device itself, and its parent busses
631 * to return 0 if MSI are supported for the device.
Brice Goglin24334a12006-08-31 01:55:07 -0400632 **/
633static
634int pci_msi_supported(struct pci_dev * dev)
635{
636 struct pci_bus *bus;
637
Brice Goglin0306ebf2006-10-05 10:24:31 +0200638 /* MSI must be globally enabled and supported by the device */
Brice Goglin24334a12006-08-31 01:55:07 -0400639 if (!pci_msi_enable || !dev || dev->no_msi)
640 return -EINVAL;
641
Brice Goglin0306ebf2006-10-05 10:24:31 +0200642 /* Any bridge which does NOT route MSI transactions from it's
643 * secondary bus to it's primary bus must set NO_MSI flag on
644 * the secondary pci_bus.
645 * We expect only arch-specific PCI host bus controller driver
646 * or quirks for specific PCI bridges to be setting NO_MSI.
647 */
Brice Goglin24334a12006-08-31 01:55:07 -0400648 for (bus = dev->bus; bus; bus = bus->parent)
649 if (bus->bus_flags & PCI_BUS_FLAGS_NO_MSI)
650 return -EINVAL;
651
652 return 0;
653}
654
655/**
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656 * pci_enable_msi - configure device's MSI capability structure
657 * @dev: pointer to the pci_dev data structure of MSI device function
658 *
659 * Setup the MSI capability structure of device function with
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700660 * a single MSI irq upon its software driver call to request for
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661 * MSI mode enabled on its hardware device function. A return of zero
662 * indicates the successful setup of an entry zero with the new MSI
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700663 * irq or non-zero for otherwise.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664 **/
665int pci_enable_msi(struct pci_dev* dev)
666{
Brice Goglin24334a12006-08-31 01:55:07 -0400667 int pos, temp, status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700668
Brice Goglin24334a12006-08-31 01:55:07 -0400669 if (pci_msi_supported(dev) < 0)
670 return -EINVAL;
Michael S. Tsirkin6e325a62006-02-14 18:52:22 +0200671
Linus Torvalds1da177e2005-04-16 15:20:36 -0700672 temp = dev->irq;
673
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700674 status = msi_init();
675 if (status < 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676 return status;
677
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700678 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
679 if (!pos)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700680 return -EINVAL;
681
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700682 WARN_ON(!msi_lookup_irq(dev, PCI_CAP_ID_MSI));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700683
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700684 /* Check whether driver already requested for MSI-X irqs */
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700685 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700686 if (pos > 0 && !msi_lookup_irq(dev, PCI_CAP_ID_MSIX)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687 printk(KERN_INFO "PCI: %s: Can't enable MSI. "
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700688 "Device already has MSI-X irq assigned\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689 pci_name(dev));
690 dev->irq = temp;
691 return -EINVAL;
692 }
693 status = msi_capability_init(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700694 return status;
695}
696
697void pci_disable_msi(struct pci_dev* dev)
698{
699 struct msi_desc *entry;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700700 int pos, default_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701 u16 control;
702 unsigned long flags;
703
Matthew Wilcox309e57d2006-03-05 22:33:34 -0700704 if (!pci_msi_enable)
705 return;
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700706 if (!dev)
707 return;
Matthew Wilcox309e57d2006-03-05 22:33:34 -0700708
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700709 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
710 if (!pos)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700711 return;
712
713 pci_read_config_word(dev, msi_control_reg(pos), &control);
714 if (!(control & PCI_MSI_FLAGS_ENABLE))
715 return;
716
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700717 disable_msi_mode(dev, pos, PCI_CAP_ID_MSI);
718
Linus Torvalds1da177e2005-04-16 15:20:36 -0700719 spin_lock_irqsave(&msi_lock, flags);
720 entry = msi_desc[dev->irq];
721 if (!entry || !entry->dev || entry->msi_attrib.type != PCI_CAP_ID_MSI) {
722 spin_unlock_irqrestore(&msi_lock, flags);
723 return;
724 }
Eric W. Biederman1f800252006-10-04 02:16:56 -0700725 if (irq_has_action(dev->irq)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700726 spin_unlock_irqrestore(&msi_lock, flags);
727 printk(KERN_WARNING "PCI: %s: pci_disable_msi() called without "
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700728 "free_irq() on MSI irq %d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700729 pci_name(dev), dev->irq);
Eric W. Biederman1f800252006-10-04 02:16:56 -0700730 BUG_ON(irq_has_action(dev->irq));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731 } else {
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700732 default_irq = entry->msi_attrib.default_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700733 spin_unlock_irqrestore(&msi_lock, flags);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700734 msi_free_irq(dev, dev->irq);
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700735
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700736 /* Restore dev->irq to its default pin-assertion irq */
737 dev->irq = default_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700738 }
739}
740
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700741static int msi_free_irq(struct pci_dev* dev, int irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700742{
743 struct msi_desc *entry;
744 int head, entry_nr, type;
745 void __iomem *base;
746 unsigned long flags;
747
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700748 arch_teardown_msi_irq(irq);
Mark Maulefd58e552006-04-10 21:17:48 -0500749
Linus Torvalds1da177e2005-04-16 15:20:36 -0700750 spin_lock_irqsave(&msi_lock, flags);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700751 entry = msi_desc[irq];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752 if (!entry || entry->dev != dev) {
753 spin_unlock_irqrestore(&msi_lock, flags);
754 return -EINVAL;
755 }
756 type = entry->msi_attrib.type;
757 entry_nr = entry->msi_attrib.entry_nr;
758 head = entry->link.head;
759 base = entry->mask_base;
760 msi_desc[entry->link.head]->link.tail = entry->link.tail;
761 msi_desc[entry->link.tail]->link.head = entry->link.head;
762 entry->dev = NULL;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700763 msi_desc[irq] = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764 spin_unlock_irqrestore(&msi_lock, flags);
765
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700766 destroy_msi_irq(irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700767
768 if (type == PCI_CAP_ID_MSIX) {
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700769 writel(1, base + entry_nr * PCI_MSIX_ENTRY_SIZE +
770 PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700771
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700772 if (head == irq)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700773 iounmap(base);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774 }
775
776 return 0;
777}
778
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779/**
780 * pci_enable_msix - configure device's MSI-X capability structure
781 * @dev: pointer to the pci_dev data structure of MSI-X device function
Greg Kroah-Hartman70549ad2005-06-06 23:07:46 -0700782 * @entries: pointer to an array of MSI-X entries
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700783 * @nvec: number of MSI-X irqs requested for allocation by device driver
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784 *
785 * Setup the MSI-X capability structure of device function with the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700786 * of requested irqs upon its software driver call to request for
Linus Torvalds1da177e2005-04-16 15:20:36 -0700787 * MSI-X mode enabled on its hardware device function. A return of zero
788 * indicates the successful configuration of MSI-X capability structure
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700789 * with new allocated MSI-X irqs. A return of < 0 indicates a failure.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700790 * Or a return of > 0 indicates that driver request is exceeding the number
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700791 * of irqs available. Driver should use the returned value to re-send
Linus Torvalds1da177e2005-04-16 15:20:36 -0700792 * its request.
793 **/
794int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec)
795{
Eric W. Biederman92db6d12006-10-04 02:16:35 -0700796 int status, pos, nr_entries;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700797 int i, j, temp;
798 u16 control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700799
Brice Goglin24334a12006-08-31 01:55:07 -0400800 if (!entries || pci_msi_supported(dev) < 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801 return -EINVAL;
802
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700803 status = msi_init();
804 if (status < 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700805 return status;
806
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700807 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
808 if (!pos)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700809 return -EINVAL;
810
811 pci_read_config_word(dev, msi_control_reg(pos), &control);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812 nr_entries = multi_msix_capable(control);
813 if (nvec > nr_entries)
814 return -EINVAL;
815
816 /* Check for any invalid entries */
817 for (i = 0; i < nvec; i++) {
818 if (entries[i].entry >= nr_entries)
819 return -EINVAL; /* invalid entry */
820 for (j = i + 1; j < nvec; j++) {
821 if (entries[i].entry == entries[j].entry)
822 return -EINVAL; /* duplicate entry */
823 }
824 }
825 temp = dev->irq;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700826 WARN_ON(!msi_lookup_irq(dev, PCI_CAP_ID_MSIX));
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700827
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700828 /* Check whether driver already requested for MSI irq */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700829 if (pci_find_capability(dev, PCI_CAP_ID_MSI) > 0 &&
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700830 !msi_lookup_irq(dev, PCI_CAP_ID_MSI)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831 printk(KERN_INFO "PCI: %s: Can't enable MSI-X. "
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700832 "Device already has an MSI irq assigned\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833 pci_name(dev));
834 dev->irq = temp;
835 return -EINVAL;
836 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837 status = msix_capability_init(dev, entries, nvec);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838 return status;
839}
840
841void pci_disable_msix(struct pci_dev* dev)
842{
843 int pos, temp;
844 u16 control;
845
Matthew Wilcox309e57d2006-03-05 22:33:34 -0700846 if (!pci_msi_enable)
847 return;
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700848 if (!dev)
849 return;
850
851 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
852 if (!pos)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700853 return;
854
855 pci_read_config_word(dev, msi_control_reg(pos), &control);
856 if (!(control & PCI_MSIX_FLAGS_ENABLE))
857 return;
858
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700859 disable_msi_mode(dev, pos, PCI_CAP_ID_MSIX);
860
Linus Torvalds1da177e2005-04-16 15:20:36 -0700861 temp = dev->irq;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700862 if (!msi_lookup_irq(dev, PCI_CAP_ID_MSIX)) {
Eric W. Biederman1f800252006-10-04 02:16:56 -0700863 int irq, head, tail = 0, warning = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700864 unsigned long flags;
865
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700866 irq = head = dev->irq;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700867 dev->irq = temp; /* Restore pin IRQ */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 while (head != tail) {
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700869 spin_lock_irqsave(&msi_lock, flags);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700870 tail = msi_desc[irq]->link.tail;
Eric W. Biederman7bd007e2006-10-04 02:16:31 -0700871 spin_unlock_irqrestore(&msi_lock, flags);
Eric W. Biederman1f800252006-10-04 02:16:56 -0700872 if (irq_has_action(irq))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873 warning = 1;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700874 else if (irq != head) /* Release MSI-X irq */
875 msi_free_irq(dev, irq);
876 irq = tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700877 }
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700878 msi_free_irq(dev, irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700879 if (warning) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700880 printk(KERN_WARNING "PCI: %s: pci_disable_msix() called without "
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700881 "free_irq() on all MSI-X irqs\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700882 pci_name(dev));
883 BUG_ON(warning > 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700884 }
885 }
886}
887
888/**
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700889 * msi_remove_pci_irq_vectors - reclaim MSI(X) irqs to unused state
Linus Torvalds1da177e2005-04-16 15:20:36 -0700890 * @dev: pointer to the pci_dev data structure of MSI(X) device function
891 *
Steven Coleeaae4b32005-05-03 18:38:30 -0600892 * Being called during hotplug remove, from which the device function
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700893 * is hot-removed. All previous assigned MSI/MSI-X irqs, if
Linus Torvalds1da177e2005-04-16 15:20:36 -0700894 * allocated for this device function, are reclaimed to unused state,
895 * which may be used later on.
896 **/
897void msi_remove_pci_irq_vectors(struct pci_dev* dev)
898{
Eric W. Biederman1f800252006-10-04 02:16:56 -0700899 int pos, temp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700900 unsigned long flags;
901
902 if (!pci_msi_enable || !dev)
903 return;
904
905 temp = dev->irq; /* Save IOAPIC IRQ */
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700906 pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700907 if (pos > 0 && !msi_lookup_irq(dev, PCI_CAP_ID_MSI)) {
Eric W. Biederman1f800252006-10-04 02:16:56 -0700908 if (irq_has_action(dev->irq)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700909 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700910 "called without free_irq() on MSI irq %d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911 pci_name(dev), dev->irq);
Eric W. Biederman1f800252006-10-04 02:16:56 -0700912 BUG_ON(irq_has_action(dev->irq));
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700913 } else /* Release MSI irq assigned to this device */
914 msi_free_irq(dev, dev->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700915 dev->irq = temp; /* Restore IOAPIC IRQ */
916 }
Grant Grundlerb64c05e2006-01-14 00:34:53 -0700917 pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700918 if (pos > 0 && !msi_lookup_irq(dev, PCI_CAP_ID_MSIX)) {
919 int irq, head, tail = 0, warning = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700920 void __iomem *base = NULL;
921
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700922 irq = head = dev->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700923 while (head != tail) {
924 spin_lock_irqsave(&msi_lock, flags);
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700925 tail = msi_desc[irq]->link.tail;
926 base = msi_desc[irq]->mask_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927 spin_unlock_irqrestore(&msi_lock, flags);
Eric W. Biederman1f800252006-10-04 02:16:56 -0700928 if (irq_has_action(irq))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700929 warning = 1;
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700930 else if (irq != head) /* Release MSI-X irq */
931 msi_free_irq(dev, irq);
932 irq = tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700933 }
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700934 msi_free_irq(dev, irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700935 if (warning) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700936 iounmap(base);
937 printk(KERN_WARNING "PCI: %s: msi_remove_pci_irq_vectors() "
Eric W. Biederman1ce03372006-10-04 02:16:41 -0700938 "called without free_irq() on all MSI-X irqs\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700939 pci_name(dev));
940 BUG_ON(warning > 0);
941 }
942 dev->irq = temp; /* Restore IOAPIC IRQ */
943 }
944}
945
Matthew Wilcox309e57d2006-03-05 22:33:34 -0700946void pci_no_msi(void)
947{
948 pci_msi_enable = 0;
949}
950
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951EXPORT_SYMBOL(pci_enable_msi);
952EXPORT_SYMBOL(pci_disable_msi);
953EXPORT_SYMBOL(pci_enable_msix);
954EXPORT_SYMBOL(pci_disable_msix);