blob: af8c64c4e75b2cbe6dc8dfc347ca0ecce9b46ecf [file] [log] [blame]
Kumar Gala2f3804e2008-07-02 01:36:15 -05001/*
2 * MPC8536 DS Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8536ds";
16 compatible = "fsl,mpc8536ds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
28 pci3 = &pci3;
29 };
30
31 cpus {
32 #cpus = <1>;
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8536@0 {
37 device_type = "cpu";
38 reg = <0>;
39 next-level-cache = <&L2>;
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <00000000 00000000>; // Filled by U-Boot
46 };
47
48 soc@ffe00000 {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 device_type = "soc";
Kim Phillipscf0d19f2008-07-29 15:29:24 -050052 compatible = "simple-bus";
Kumar Gala2f3804e2008-07-02 01:36:15 -050053 ranges = <0x0 0xffe00000 0x100000>;
54 reg = <0xffe00000 0x1000>;
55 bus-frequency = <0>; // Filled out by uboot.
56
57 memory-controller@2000 {
58 compatible = "fsl,mpc8536-memory-controller";
59 reg = <0x2000 0x1000>;
60 interrupt-parent = <&mpic>;
61 interrupts = <18 0x2>;
62 };
63
64 L2: l2-cache-controller@20000 {
65 compatible = "fsl,mpc8536-l2-cache-controller";
66 reg = <0x20000 0x1000>;
67 interrupt-parent = <&mpic>;
68 interrupts = <16 0x2>;
69 };
70
71 i2c@3000 {
72 #address-cells = <1>;
73 #size-cells = <0>;
74 cell-index = <0>;
75 compatible = "fsl-i2c";
76 reg = <0x3000 0x100>;
77 interrupts = <43 0x2>;
78 interrupt-parent = <&mpic>;
79 dfsrr;
80 };
81
82 i2c@3100 {
83 #address-cells = <1>;
84 #size-cells = <0>;
85 cell-index = <1>;
86 compatible = "fsl-i2c";
87 reg = <0x3100 0x100>;
88 interrupts = <43 0x2>;
89 interrupt-parent = <&mpic>;
90 dfsrr;
91 rtc@68 {
92 compatible = "dallas,ds3232";
93 reg = <0x68>;
Kumar Gala92ae9542008-10-02 03:58:08 -050094 interrupts = <0 0x1>;
95 interrupt-parent = <&mpic>;
Kumar Gala2f3804e2008-07-02 01:36:15 -050096 };
97 };
98
99 dma@21300 {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
103 reg = <0x21300 4>;
104 ranges = <0 0x21100 0x200>;
105 cell-index = <0>;
106 dma-channel@0 {
107 compatible = "fsl,mpc8536-dma-channel",
108 "fsl,eloplus-dma-channel";
109 reg = <0x0 0x80>;
110 cell-index = <0>;
111 interrupt-parent = <&mpic>;
Ed Swarthout136903322008-10-17 00:41:32 -0500112 interrupts = <20 2>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500113 };
114 dma-channel@80 {
115 compatible = "fsl,mpc8536-dma-channel",
116 "fsl,eloplus-dma-channel";
117 reg = <0x80 0x80>;
118 cell-index = <1>;
119 interrupt-parent = <&mpic>;
Ed Swarthout136903322008-10-17 00:41:32 -0500120 interrupts = <21 2>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500121 };
122 dma-channel@100 {
123 compatible = "fsl,mpc8536-dma-channel",
124 "fsl,eloplus-dma-channel";
125 reg = <0x100 0x80>;
126 cell-index = <2>;
127 interrupt-parent = <&mpic>;
Ed Swarthout136903322008-10-17 00:41:32 -0500128 interrupts = <22 2>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500129 };
130 dma-channel@180 {
131 compatible = "fsl,mpc8536-dma-channel",
132 "fsl,eloplus-dma-channel";
133 reg = <0x180 0x80>;
134 cell-index = <3>;
135 interrupt-parent = <&mpic>;
Ed Swarthout136903322008-10-17 00:41:32 -0500136 interrupts = <23 2>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500137 };
138 };
139
Kumar Gala2f3804e2008-07-02 01:36:15 -0500140 usb@22000 {
141 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
142 reg = <0x22000 0x1000>;
143 #address-cells = <1>;
144 #size-cells = <0>;
145 interrupt-parent = <&mpic>;
146 interrupts = <28 0x2>;
147 phy_type = "ulpi";
148 };
149
150 usb@23000 {
151 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
152 reg = <0x23000 0x1000>;
153 #address-cells = <1>;
154 #size-cells = <0>;
155 interrupt-parent = <&mpic>;
156 interrupts = <46 0x2>;
157 phy_type = "ulpi";
158 };
159
160 enet0: ethernet@24000 {
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300161 #address-cells = <1>;
162 #size-cells = <1>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500163 cell-index = <0>;
164 device_type = "network";
Jason Jinba556ed2008-10-16 17:31:32 +0800165 model = "eTSEC";
Kumar Gala2f3804e2008-07-02 01:36:15 -0500166 compatible = "gianfar";
167 reg = <0x24000 0x1000>;
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300168 ranges = <0x0 0x24000 0x1000>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500169 local-mac-address = [ 00 00 00 00 00 00 ];
170 interrupts = <29 2 30 2 34 2>;
171 interrupt-parent = <&mpic>;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800172 tbi-handle = <&tbi0>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500173 phy-handle = <&phy1>;
174 phy-connection-type = "rgmii-id";
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300175
176 mdio@520 {
177 #address-cells = <1>;
178 #size-cells = <0>;
179 compatible = "fsl,gianfar-mdio";
180 reg = <0x520 0x20>;
181
182 phy0: ethernet-phy@0 {
183 interrupt-parent = <&mpic>;
184 interrupts = <10 0x1>;
185 reg = <0>;
186 device_type = "ethernet-phy";
187 };
188 phy1: ethernet-phy@1 {
189 interrupt-parent = <&mpic>;
190 interrupts = <10 0x1>;
191 reg = <1>;
192 device_type = "ethernet-phy";
193 };
194 tbi0: tbi-phy@11 {
195 reg = <0x11>;
196 device_type = "tbi-phy";
197 };
198 };
Kumar Gala2f3804e2008-07-02 01:36:15 -0500199 };
200
201 enet1: ethernet@26000 {
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300202 #address-cells = <1>;
203 #size-cells = <1>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500204 cell-index = <1>;
205 device_type = "network";
Jason Jinba556ed2008-10-16 17:31:32 +0800206 model = "eTSEC";
Kumar Gala2f3804e2008-07-02 01:36:15 -0500207 compatible = "gianfar";
208 reg = <0x26000 0x1000>;
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300209 ranges = <0x0 0x26000 0x1000>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500210 local-mac-address = [ 00 00 00 00 00 00 ];
211 interrupts = <31 2 32 2 33 2>;
212 interrupt-parent = <&mpic>;
Andy Flemingb31a1d82008-12-16 15:29:15 -0800213 tbi-handle = <&tbi1>;
Kumar Gala2f3804e2008-07-02 01:36:15 -0500214 phy-handle = <&phy0>;
215 phy-connection-type = "rgmii-id";
Anton Vorontsov84ba4a52009-03-19 21:01:48 +0300216
217 mdio@520 {
218 #address-cells = <1>;
219 #size-cells = <0>;
220 compatible = "fsl,gianfar-tbi";
221 reg = <0x520 0x20>;
222
223 tbi1: tbi-phy@11 {
224 reg = <0x11>;
225 device_type = "tbi-phy";
226 };
227 };
Kumar Gala2f3804e2008-07-02 01:36:15 -0500228 };
229
230 usb@2b000 {
231 compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
232 reg = <0x2b000 0x1000>;
233 #address-cells = <1>;
234 #size-cells = <0>;
235 interrupt-parent = <&mpic>;
236 interrupts = <60 0x2>;
237 dr_mode = "peripheral";
238 phy_type = "ulpi";
239 };
240
241 serial0: serial@4500 {
242 cell-index = <0>;
243 device_type = "serial";
244 compatible = "ns16550";
245 reg = <0x4500 0x100>;
246 clock-frequency = <0>;
247 interrupts = <42 0x2>;
248 interrupt-parent = <&mpic>;
249 };
250
251 serial1: serial@4600 {
252 cell-index = <1>;
253 device_type = "serial";
254 compatible = "ns16550";
255 reg = <0x4600 0x100>;
256 clock-frequency = <0>;
257 interrupts = <42 0x2>;
258 interrupt-parent = <&mpic>;
259 };
260
Kim Phillips3fd44732008-07-08 19:13:33 -0500261 crypto@30000 {
262 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
263 "fsl,sec2.1", "fsl,sec2.0";
264 reg = <0x30000 0x10000>;
265 interrupts = <45 2 58 2>;
266 interrupt-parent = <&mpic>;
267 fsl,num-channels = <4>;
268 fsl,channel-fifo-len = <24>;
269 fsl,exec-units-mask = <0x9fe>;
270 fsl,descriptor-types-mask = <0x3ab0ebf>;
271 };
272
Kumar Gala2f3804e2008-07-02 01:36:15 -0500273 sata@18000 {
274 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
275 reg = <0x18000 0x1000>;
276 cell-index = <1>;
277 interrupts = <74 0x2>;
278 interrupt-parent = <&mpic>;
279 };
280
281 sata@19000 {
282 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
283 reg = <0x19000 0x1000>;
284 cell-index = <2>;
285 interrupts = <41 0x2>;
286 interrupt-parent = <&mpic>;
287 };
288
289 global-utilities@e0000 { //global utilities block
290 compatible = "fsl,mpc8548-guts";
291 reg = <0xe0000 0x1000>;
292 fsl,has-rstcr;
293 };
294
295 mpic: pic@40000 {
296 clock-frequency = <0>;
297 interrupt-controller;
298 #address-cells = <0>;
299 #interrupt-cells = <2>;
300 reg = <0x40000 0x40000>;
301 compatible = "chrp,open-pic";
302 device_type = "open-pic";
303 big-endian;
304 };
305
306 msi@41600 {
307 compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
308 reg = <0x41600 0x80>;
309 msi-available-ranges = <0 0x100>;
310 interrupts = <
311 0xe0 0
312 0xe1 0
313 0xe2 0
314 0xe3 0
315 0xe4 0
316 0xe5 0
317 0xe6 0
318 0xe7 0>;
319 interrupt-parent = <&mpic>;
320 };
321 };
322
323 pci0: pci@ffe08000 {
Kumar Gala2f3804e2008-07-02 01:36:15 -0500324 compatible = "fsl,mpc8540-pci";
325 device_type = "pci";
326 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
327 interrupt-map = <
328
329 /* IDSEL 0x11 J17 Slot 1 */
330 0x8800 0 0 1 &mpic 1 1
331 0x8800 0 0 2 &mpic 2 1
332 0x8800 0 0 3 &mpic 3 1
333 0x8800 0 0 4 &mpic 4 1>;
334
335 interrupt-parent = <&mpic>;
336 interrupts = <24 0x2>;
337 bus-range = <0 0xff>;
338 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
339 0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
340 clock-frequency = <66666666>;
341 #interrupt-cells = <1>;
342 #size-cells = <2>;
343 #address-cells = <3>;
344 reg = <0xffe08000 0x1000>;
345 };
346
347 pci1: pcie@ffe09000 {
Kumar Gala2f3804e2008-07-02 01:36:15 -0500348 compatible = "fsl,mpc8548-pcie";
349 device_type = "pci";
350 #interrupt-cells = <1>;
351 #size-cells = <2>;
352 #address-cells = <3>;
353 reg = <0xffe09000 0x1000>;
354 bus-range = <0 0xff>;
355 ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
356 0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
357 clock-frequency = <33333333>;
358 interrupt-parent = <&mpic>;
359 interrupts = <25 0x2>;
360 interrupt-map-mask = <0xf800 0 0 7>;
361 interrupt-map = <
362 /* IDSEL 0x0 */
363 0000 0 0 1 &mpic 4 1
364 0000 0 0 2 &mpic 5 1
365 0000 0 0 3 &mpic 6 1
366 0000 0 0 4 &mpic 7 1
367 >;
368 pcie@0 {
369 reg = <0 0 0 0 0>;
370 #size-cells = <2>;
371 #address-cells = <3>;
372 device_type = "pci";
373 ranges = <0x02000000 0 0x98000000
374 0x02000000 0 0x98000000
375 0 0x08000000
376
377 0x01000000 0 0x00000000
378 0x01000000 0 0x00000000
379 0 0x00010000>;
380 };
381 };
382
383 pci2: pcie@ffe0a000 {
Kumar Gala2f3804e2008-07-02 01:36:15 -0500384 compatible = "fsl,mpc8548-pcie";
385 device_type = "pci";
386 #interrupt-cells = <1>;
387 #size-cells = <2>;
388 #address-cells = <3>;
389 reg = <0xffe0a000 0x1000>;
390 bus-range = <0 0xff>;
391 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
392 0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
393 clock-frequency = <33333333>;
394 interrupt-parent = <&mpic>;
395 interrupts = <26 0x2>;
396 interrupt-map-mask = <0xf800 0 0 7>;
397 interrupt-map = <
398 /* IDSEL 0x0 */
399 0000 0 0 1 &mpic 0 1
400 0000 0 0 2 &mpic 1 1
401 0000 0 0 3 &mpic 2 1
402 0000 0 0 4 &mpic 3 1
403 >;
404 pcie@0 {
405 reg = <0 0 0 0 0>;
406 #size-cells = <2>;
407 #address-cells = <3>;
408 device_type = "pci";
409 ranges = <0x02000000 0 0x90000000
410 0x02000000 0 0x90000000
411 0 0x08000000
412
413 0x01000000 0 0x00000000
414 0x01000000 0 0x00000000
415 0 0x00010000>;
416 };
417 };
418
419 pci3: pcie@ffe0b000 {
Kumar Gala2f3804e2008-07-02 01:36:15 -0500420 compatible = "fsl,mpc8548-pcie";
421 device_type = "pci";
422 #interrupt-cells = <1>;
423 #size-cells = <2>;
424 #address-cells = <3>;
425 reg = <0xffe0b000 0x1000>;
426 bus-range = <0 0xff>;
427 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
428 0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
429 clock-frequency = <33333333>;
430 interrupt-parent = <&mpic>;
431 interrupts = <27 0x2>;
432 interrupt-map-mask = <0xf800 0 0 7>;
433 interrupt-map = <
434 /* IDSEL 0x0 */
435 0000 0 0 1 &mpic 8 1
436 0000 0 0 2 &mpic 9 1
437 0000 0 0 3 &mpic 10 1
438 0000 0 0 4 &mpic 11 1
439 >;
440
441 pcie@0 {
442 reg = <0 0 0 0 0>;
443 #size-cells = <2>;
444 #address-cells = <3>;
445 device_type = "pci";
446 ranges = <0x02000000 0 0xa0000000
447 0x02000000 0 0xa0000000
448 0 0x20000000
449
450 0x01000000 0 0x00000000
451 0x01000000 0 0x00000000
452 0 0x00100000>;
453 };
454 };
455};