blob: 8fa2d4be88dea9d90e7aa93bab89e60d1e30b7bf [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/pci/setup-bus.c
3 *
4 * Extruded from code written by
5 * Dave Rusling (david.rusling@reo.mts.dec.com)
6 * David Mosberger (davidm@cs.arizona.edu)
7 * David Miller (davem@redhat.com)
8 *
9 * Support routines for initializing a PCI subsystem.
10 */
11
12/*
13 * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
14 * PCI-PCI bridges cleanup, sorted resource allocation.
15 * Feb 2002, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
16 * Converted to allocation in 3 passes, which gives
17 * tighter packing. Prefetchable range support.
18 */
19
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/pci.h>
24#include <linux/errno.h>
25#include <linux/ioport.h>
26#include <linux/cache.h>
27#include <linux/slab.h>
Bjorn Helgaas47087702012-02-23 14:29:23 -070028#include <asm-generic/pci-bridge.h>
Chris Wright6faf17f2009-08-28 13:00:06 -070029#include "pci.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070030
Bjorn Helgaas844393f2012-02-23 20:18:59 -070031unsigned int pci_flags;
Bjorn Helgaas47087702012-02-23 14:29:23 -070032
Yinghai Lubdc4abe2012-01-21 02:08:27 -080033struct pci_dev_resource {
34 struct list_head list;
Yinghai Lu2934a0d2012-01-21 02:08:26 -080035 struct resource *res;
36 struct pci_dev *dev;
Yinghai Lu568ddef2010-01-22 01:02:21 -080037 resource_size_t start;
38 resource_size_t end;
Ram Paic8adf9a2011-02-14 17:43:20 -080039 resource_size_t add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070040 resource_size_t min_align;
Yinghai Lu568ddef2010-01-22 01:02:21 -080041 unsigned long flags;
42};
43
Yinghai Lubffc56d2012-01-21 02:08:30 -080044static void free_list(struct list_head *head)
45{
46 struct pci_dev_resource *dev_res, *tmp;
47
48 list_for_each_entry_safe(dev_res, tmp, head, list) {
49 list_del(&dev_res->list);
50 kfree(dev_res);
51 }
52}
Ram Pai094732a2011-02-14 17:43:18 -080053
Ram Paic8adf9a2011-02-14 17:43:20 -080054/**
55 * add_to_list() - add a new resource tracker to the list
56 * @head: Head of the list
57 * @dev: device corresponding to which the resource
58 * belongs
59 * @res: The resource to be tracked
60 * @add_size: additional size to be optionally added
61 * to the resource
62 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -080063static int add_to_list(struct list_head *head,
Ram Paic8adf9a2011-02-14 17:43:20 -080064 struct pci_dev *dev, struct resource *res,
Ram Pai2bbc6942011-07-25 13:08:39 -070065 resource_size_t add_size, resource_size_t min_align)
Yinghai Lu568ddef2010-01-22 01:02:21 -080066{
Yinghai Lu764242a2012-01-21 02:08:28 -080067 struct pci_dev_resource *tmp;
Yinghai Lu568ddef2010-01-22 01:02:21 -080068
Yinghai Lubdc4abe2012-01-21 02:08:27 -080069 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
Yinghai Lu568ddef2010-01-22 01:02:21 -080070 if (!tmp) {
Ram Paic8adf9a2011-02-14 17:43:20 -080071 pr_warning("add_to_list: kmalloc() failed!\n");
Yinghai Luef62dfe2012-01-21 02:08:18 -080072 return -ENOMEM;
Yinghai Lu568ddef2010-01-22 01:02:21 -080073 }
74
Yinghai Lu568ddef2010-01-22 01:02:21 -080075 tmp->res = res;
76 tmp->dev = dev;
77 tmp->start = res->start;
78 tmp->end = res->end;
79 tmp->flags = res->flags;
Ram Paic8adf9a2011-02-14 17:43:20 -080080 tmp->add_size = add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -070081 tmp->min_align = min_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -080082
83 list_add(&tmp->list, head);
Yinghai Luef62dfe2012-01-21 02:08:18 -080084
85 return 0;
Yinghai Lu568ddef2010-01-22 01:02:21 -080086}
87
Yinghai Lub9b0bba2012-01-21 02:08:29 -080088static void remove_from_list(struct list_head *head,
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080089 struct resource *res)
90{
Yinghai Lub9b0bba2012-01-21 02:08:29 -080091 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080092
Yinghai Lub9b0bba2012-01-21 02:08:29 -080093 list_for_each_entry_safe(dev_res, tmp, head, list) {
94 if (dev_res->res == res) {
95 list_del(&dev_res->list);
96 kfree(dev_res);
Yinghai Lubdc4abe2012-01-21 02:08:27 -080097 break;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080098 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -080099 }
100}
101
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800102static resource_size_t get_res_add_size(struct list_head *head,
Yinghai Lu1c372352012-01-21 02:08:19 -0800103 struct resource *res)
104{
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800105 struct pci_dev_resource *dev_res;
Yinghai Lu1c372352012-01-21 02:08:19 -0800106
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800107 list_for_each_entry(dev_res, head, list) {
108 if (dev_res->res == res) {
Yinghai Lub5924432012-01-21 02:08:31 -0800109 int idx = res - &dev_res->dev->resource[0];
110
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800111 dev_printk(KERN_DEBUG, &dev_res->dev->dev,
Yinghai Lub5924432012-01-21 02:08:31 -0800112 "res[%d]=%pR get_res_add_size add_size %llx\n",
113 idx, dev_res->res,
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800114 (unsigned long long)dev_res->add_size);
Yinghai Lub5924432012-01-21 02:08:31 -0800115
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800116 return dev_res->add_size;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800117 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800118 }
Yinghai Lu1c372352012-01-21 02:08:19 -0800119
120 return 0;
121}
122
Yinghai Lu78c3b322012-01-21 02:08:25 -0800123/* Sort resources by alignment */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800124static void pdev_sort_resources(struct pci_dev *dev, struct list_head *head)
Yinghai Lu78c3b322012-01-21 02:08:25 -0800125{
126 int i;
127
128 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
129 struct resource *r;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800130 struct pci_dev_resource *dev_res, *tmp;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800131 resource_size_t r_align;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800132 struct list_head *n;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800133
134 r = &dev->resource[i];
135
136 if (r->flags & IORESOURCE_PCI_FIXED)
137 continue;
138
139 if (!(r->flags) || r->parent)
140 continue;
141
142 r_align = pci_resource_alignment(dev, r);
143 if (!r_align) {
144 dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
145 i, r);
146 continue;
147 }
Yinghai Lu78c3b322012-01-21 02:08:25 -0800148
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800149 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
150 if (!tmp)
151 panic("pdev_sort_resources(): "
152 "kmalloc() failed!\n");
153 tmp->res = r;
154 tmp->dev = dev;
155
156 /* fallback is smallest one or list is empty*/
157 n = head;
158 list_for_each_entry(dev_res, head, list) {
159 resource_size_t align;
160
161 align = pci_resource_alignment(dev_res->dev,
162 dev_res->res);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800163
164 if (r_align > align) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800165 n = &dev_res->list;
Yinghai Lu78c3b322012-01-21 02:08:25 -0800166 break;
167 }
168 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800169 /* Insert it just before n*/
170 list_add_tail(&tmp->list, n);
Yinghai Lu78c3b322012-01-21 02:08:25 -0800171 }
172}
173
Yinghai Lu6841ec62010-01-22 01:02:25 -0800174static void __dev_sort_resources(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800175 struct list_head *head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176{
Yinghai Lu6841ec62010-01-22 01:02:25 -0800177 u16 class = dev->class >> 8;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178
Yinghai Lu6841ec62010-01-22 01:02:25 -0800179 /* Don't touch classless devices or host bridges or ioapics. */
180 if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST)
181 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182
Yinghai Lu6841ec62010-01-22 01:02:25 -0800183 /* Don't touch ioapic devices already enabled by firmware */
184 if (class == PCI_CLASS_SYSTEM_PIC) {
185 u16 command;
186 pci_read_config_word(dev, PCI_COMMAND, &command);
187 if (command & (PCI_COMMAND_IO | PCI_COMMAND_MEMORY))
188 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189 }
190
Yinghai Lu6841ec62010-01-22 01:02:25 -0800191 pdev_sort_resources(dev, head);
192}
193
Ram Paifc075e12011-02-14 17:43:19 -0800194static inline void reset_resource(struct resource *res)
195{
196 res->start = 0;
197 res->end = 0;
198 res->flags = 0;
199}
200
Ram Paic8adf9a2011-02-14 17:43:20 -0800201/**
Ram Pai9e8bf932011-07-25 13:08:42 -0700202 * reassign_resources_sorted() - satisfy any additional resource requests
Ram Paic8adf9a2011-02-14 17:43:20 -0800203 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700204 * @realloc_head : head of the list tracking requests requiring additional
Ram Paic8adf9a2011-02-14 17:43:20 -0800205 * resources
206 * @head : head of the list tracking requests with allocated
207 * resources
208 *
Ram Pai9e8bf932011-07-25 13:08:42 -0700209 * Walk through each element of the realloc_head and try to procure
Ram Paic8adf9a2011-02-14 17:43:20 -0800210 * additional resources for the element, provided the element
211 * is in the head list.
212 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800213static void reassign_resources_sorted(struct list_head *realloc_head,
214 struct list_head *head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800215{
216 struct resource *res;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800217 struct pci_dev_resource *add_res, *tmp;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800218 struct pci_dev_resource *dev_res;
Ram Paic8adf9a2011-02-14 17:43:20 -0800219 resource_size_t add_size;
220 int idx;
221
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800222 list_for_each_entry_safe(add_res, tmp, realloc_head, list) {
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800223 bool found_match = false;
224
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800225 res = add_res->res;
Ram Paic8adf9a2011-02-14 17:43:20 -0800226 /* skip resource that has been reset */
227 if (!res->flags)
228 goto out;
229
230 /* skip this resource if not found in head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800231 list_for_each_entry(dev_res, head, list) {
232 if (dev_res->res == res) {
233 found_match = true;
234 break;
235 }
Ram Paic8adf9a2011-02-14 17:43:20 -0800236 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800237 if (!found_match)/* just skip */
238 continue;
Ram Paic8adf9a2011-02-14 17:43:20 -0800239
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800240 idx = res - &add_res->dev->resource[0];
241 add_size = add_res->add_size;
Ram Pai2bbc6942011-07-25 13:08:39 -0700242 if (!resource_size(res)) {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800243 res->start = add_res->start;
Ram Pai2bbc6942011-07-25 13:08:39 -0700244 res->end = res->start + add_size - 1;
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800245 if (pci_assign_resource(add_res->dev, idx))
Ram Paic8adf9a2011-02-14 17:43:20 -0800246 reset_resource(res);
Ram Pai2bbc6942011-07-25 13:08:39 -0700247 } else {
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800248 resource_size_t align = add_res->min_align;
249 res->flags |= add_res->flags &
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800250 (IORESOURCE_STARTALIGN|IORESOURCE_SIZEALIGN);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800251 if (pci_reassign_resource(add_res->dev, idx,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800252 add_size, align))
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800253 dev_printk(KERN_DEBUG, &add_res->dev->dev,
Yinghai Lub5924432012-01-21 02:08:31 -0800254 "failed to add %llx res[%d]=%pR\n",
255 (unsigned long long)add_size,
256 idx, res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800257 }
258out:
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800259 list_del(&add_res->list);
260 kfree(add_res);
Ram Paic8adf9a2011-02-14 17:43:20 -0800261 }
262}
263
264/**
265 * assign_requested_resources_sorted() - satisfy resource requests
266 *
267 * @head : head of the list tracking requests for resources
268 * @failed_list : head of the list tracking requests that could
269 * not be allocated
270 *
271 * Satisfy resource requests of each element in the list. Add
272 * requests that could not satisfied to the failed_list.
273 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800274static void assign_requested_resources_sorted(struct list_head *head,
275 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800276{
277 struct resource *res;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800278 struct pci_dev_resource *dev_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -0800279 int idx;
280
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800281 list_for_each_entry(dev_res, head, list) {
282 res = dev_res->res;
283 idx = res - &dev_res->dev->resource[0];
284 if (resource_size(res) &&
285 pci_assign_resource(dev_res->dev, idx)) {
286 if (fail_head && !pci_is_root_bus(dev_res->dev->bus)) {
Yinghai Lu9a928662010-02-28 15:49:39 -0800287 /*
288 * if the failed res is for ROM BAR, and it will
289 * be enabled later, don't add it to the list
290 */
291 if (!((idx == PCI_ROM_RESOURCE) &&
292 (!(res->flags & IORESOURCE_ROM_ENABLE))))
Yinghai Lu67cc7e22012-01-21 02:08:32 -0800293 add_to_list(fail_head,
294 dev_res->dev, res,
295 0 /* dont care */,
296 0 /* dont care */);
Yinghai Lu9a928662010-02-28 15:49:39 -0800297 }
Ram Paifc075e12011-02-14 17:43:19 -0800298 reset_resource(res);
Rajesh Shah542df5d2005-04-28 00:25:50 -0700299 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700300 }
301}
302
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800303static void __assign_resources_sorted(struct list_head *head,
304 struct list_head *realloc_head,
305 struct list_head *fail_head)
Ram Paic8adf9a2011-02-14 17:43:20 -0800306{
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800307 /*
308 * Should not assign requested resources at first.
309 * they could be adjacent, so later reassign can not reallocate
310 * them one by one in parent resource window.
311 * Try to assign requested + add_size at begining
312 * if could do that, could get out early.
313 * if could not do that, we still try to assign requested at first,
314 * then try to reassign add_size for some resources.
315 */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800316 LIST_HEAD(save_head);
317 LIST_HEAD(local_fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800318 struct pci_dev_resource *save_res;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800319 struct pci_dev_resource *dev_res;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800320
321 /* Check if optional add_size is there */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800322 if (!realloc_head || list_empty(realloc_head))
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800323 goto requested_and_reassign;
324
325 /* Save original start, end, flags etc at first */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800326 list_for_each_entry(dev_res, head, list) {
327 if (add_to_list(&save_head, dev_res->dev, dev_res->res, 0, 0)) {
Yinghai Lubffc56d2012-01-21 02:08:30 -0800328 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800329 goto requested_and_reassign;
330 }
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800331 }
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800332
333 /* Update res in head list with add_size in realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800334 list_for_each_entry(dev_res, head, list)
335 dev_res->res->end += get_res_add_size(realloc_head,
336 dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800337
338 /* Try updated head list with add_size added */
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800339 assign_requested_resources_sorted(head, &local_fail_head);
340
341 /* all assigned with add_size ? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800342 if (list_empty(&local_fail_head)) {
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800343 /* Remove head list from realloc_head list */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800344 list_for_each_entry(dev_res, head, list)
345 remove_from_list(realloc_head, dev_res->res);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800346 free_list(&save_head);
347 free_list(head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800348 return;
349 }
350
Yinghai Lubffc56d2012-01-21 02:08:30 -0800351 free_list(&local_fail_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800352 /* Release assigned resource */
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800353 list_for_each_entry(dev_res, head, list)
354 if (dev_res->res->parent)
355 release_resource(dev_res->res);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800356 /* Restore start/end/flags from saved list */
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800357 list_for_each_entry(save_res, &save_head, list) {
358 struct resource *res = save_res->res;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800359
Yinghai Lub9b0bba2012-01-21 02:08:29 -0800360 res->start = save_res->start;
361 res->end = save_res->end;
362 res->flags = save_res->flags;
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800363 }
Yinghai Lubffc56d2012-01-21 02:08:30 -0800364 free_list(&save_head);
Yinghai Lu3e6e0d82012-01-21 02:08:20 -0800365
366requested_and_reassign:
Ram Paic8adf9a2011-02-14 17:43:20 -0800367 /* Satisfy the must-have resource requests */
368 assign_requested_resources_sorted(head, fail_head);
369
Ram Pai0a2daa12011-07-25 13:08:41 -0700370 /* Try to satisfy any additional optional resource
Ram Paic8adf9a2011-02-14 17:43:20 -0800371 requests */
Ram Pai9e8bf932011-07-25 13:08:42 -0700372 if (realloc_head)
373 reassign_resources_sorted(realloc_head, head);
Yinghai Lubffc56d2012-01-21 02:08:30 -0800374 free_list(head);
Ram Paic8adf9a2011-02-14 17:43:20 -0800375}
376
Yinghai Lu6841ec62010-01-22 01:02:25 -0800377static void pdev_assign_resources_sorted(struct pci_dev *dev,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800378 struct list_head *add_head,
379 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800380{
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800381 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800382
Yinghai Lu6841ec62010-01-22 01:02:25 -0800383 __dev_sort_resources(dev, &head);
Yinghai Lu8424d752012-01-21 02:08:21 -0800384 __assign_resources_sorted(&head, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800385
386}
387
388static void pbus_assign_resources_sorted(const struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800389 struct list_head *realloc_head,
390 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -0800391{
392 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800393 LIST_HEAD(head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800394
Yinghai Lu6841ec62010-01-22 01:02:25 -0800395 list_for_each_entry(dev, &bus->devices, bus_list)
396 __dev_sort_resources(dev, &head);
397
Ram Pai9e8bf932011-07-25 13:08:42 -0700398 __assign_resources_sorted(&head, realloc_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -0800399}
400
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700401void pci_setup_cardbus(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402{
403 struct pci_dev *bridge = bus->self;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600404 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405 struct pci_bus_region region;
406
Bjorn Helgaas865df572009-11-04 10:32:57 -0700407 dev_info(&bridge->dev, "CardBus bridge to [bus %02x-%02x]\n",
408 bus->secondary, bus->subordinate);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600410 res = bus->resource[0];
411 pcibios_resource_to_bus(bridge, &region, res);
412 if (res->flags & IORESOURCE_IO) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413 /*
414 * The IO resource is allocated a range twice as large as it
415 * would normally need. This allows us to set both IO regs.
416 */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600417 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
419 region.start);
420 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
421 region.end);
422 }
423
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600424 res = bus->resource[1];
425 pcibios_resource_to_bus(bridge, &region, res);
426 if (res->flags & IORESOURCE_IO) {
427 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
429 region.start);
430 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
431 region.end);
432 }
433
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600434 res = bus->resource[2];
435 pcibios_resource_to_bus(bridge, &region, res);
436 if (res->flags & IORESOURCE_MEM) {
437 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
439 region.start);
440 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
441 region.end);
442 }
443
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600444 res = bus->resource[3];
445 pcibios_resource_to_bus(bridge, &region, res);
446 if (res->flags & IORESOURCE_MEM) {
447 dev_info(&bridge->dev, " bridge window %pR\n", res);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
449 region.start);
450 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
451 region.end);
452 }
453}
Dominik Brodowskib3743fa2005-09-09 13:03:23 -0700454EXPORT_SYMBOL(pci_setup_cardbus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455
456/* Initialize bridges with base/limit values we have collected.
457 PCI-to-PCI Bridge Architecture Specification rev. 1.1 (1998)
458 requires that if there is no I/O ports or memory behind the
459 bridge, corresponding range must be turned off by writing base
460 value greater than limit to the bridge's base/limit registers.
461
462 Note: care must be taken when updating I/O base/limit registers
463 of bridges which support 32-bit I/O. This update requires two
464 config space writes, so it's quite possible that an I/O window of
465 the bridge will have some undesirable address (e.g. 0) after the
466 first write. Ditto 64-bit prefetchable MMIO. */
Yinghai Lu7cc59972009-12-22 15:02:21 -0800467static void pci_setup_bridge_io(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468{
469 struct pci_dev *bridge = bus->self;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600470 struct resource *res;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471 struct pci_bus_region region;
Yinghai Lu7cc59972009-12-22 15:02:21 -0800472 u32 l, io_upper16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700473
474 /* Set up the top and bottom of the PCI I/O segment for this bus. */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600475 res = bus->resource[0];
476 pcibios_resource_to_bus(bridge, &region, res);
477 if (res->flags & IORESOURCE_IO) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 pci_read_config_dword(bridge, PCI_IO_BASE, &l);
479 l &= 0xffff0000;
480 l |= (region.start >> 8) & 0x00f0;
481 l |= region.end & 0xf000;
482 /* Set up upper 16 bits of I/O base/limit. */
483 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600484 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800485 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700486 /* Clear upper 16 bits of I/O base/limit. */
487 io_upper16 = 0;
488 l = 0x00f0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 }
490 /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
491 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
492 /* Update lower 16 bits of I/O base/limit. */
493 pci_write_config_dword(bridge, PCI_IO_BASE, l);
494 /* Update upper 16 bits of I/O base/limit. */
495 pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, io_upper16);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800496}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700497
Yinghai Lu7cc59972009-12-22 15:02:21 -0800498static void pci_setup_bridge_mmio(struct pci_bus *bus)
499{
500 struct pci_dev *bridge = bus->self;
501 struct resource *res;
502 struct pci_bus_region region;
503 u32 l;
504
505 /* Set up the top and bottom of the PCI Memory segment for this bus. */
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600506 res = bus->resource[1];
507 pcibios_resource_to_bus(bridge, &region, res);
508 if (res->flags & IORESOURCE_MEM) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509 l = (region.start >> 16) & 0xfff0;
510 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600511 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800512 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514 }
515 pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800516}
517
518static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
519{
520 struct pci_dev *bridge = bus->self;
521 struct resource *res;
522 struct pci_bus_region region;
523 u32 l, bu, lu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524
525 /* Clear out the upper 32 bits of PREF limit.
526 If PCI_PREF_BASE_UPPER32 was non-zero, this temporarily
527 disables PREF range, which is ok. */
528 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
529
530 /* Set up PREF base/limit. */
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100531 bu = lu = 0;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600532 res = bus->resource[2];
533 pcibios_resource_to_bus(bridge, &region, res);
534 if (res->flags & IORESOURCE_PREFETCH) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 l = (region.start >> 16) & 0xfff0;
536 l |= region.end & 0xfff00000;
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600537 if (res->flags & IORESOURCE_MEM_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700538 bu = upper_32_bits(region.start);
539 lu = upper_32_bits(region.end);
Yinghai Lu1f82de12009-04-23 20:48:32 -0700540 }
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -0600541 dev_info(&bridge->dev, " bridge window %pR\n", res);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800542 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543 l = 0x0000fff0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700544 }
545 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
546
Alex Williamson59353ea2009-11-30 14:51:44 -0700547 /* Set the upper 32 bits of PREF base & limit. */
548 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
549 pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
Yinghai Lu7cc59972009-12-22 15:02:21 -0800550}
551
552static void __pci_setup_bridge(struct pci_bus *bus, unsigned long type)
553{
554 struct pci_dev *bridge = bus->self;
555
Yinghai Lu7cc59972009-12-22 15:02:21 -0800556 dev_info(&bridge->dev, "PCI bridge to [bus %02x-%02x]\n",
557 bus->secondary, bus->subordinate);
558
559 if (type & IORESOURCE_IO)
560 pci_setup_bridge_io(bus);
561
562 if (type & IORESOURCE_MEM)
563 pci_setup_bridge_mmio(bus);
564
565 if (type & IORESOURCE_PREFETCH)
566 pci_setup_bridge_mmio_pref(bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700567
568 pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
569}
570
Benjamin Herrenschmidte2444272011-09-11 14:08:38 -0300571void pci_setup_bridge(struct pci_bus *bus)
Yinghai Lu7cc59972009-12-22 15:02:21 -0800572{
573 unsigned long type = IORESOURCE_IO | IORESOURCE_MEM |
574 IORESOURCE_PREFETCH;
575
576 __pci_setup_bridge(bus, type);
577}
578
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579/* Check whether the bridge supports optional I/O and
580 prefetchable memory ranges. If not, the respective
581 base/limit registers must be read-only and read as 0. */
Sam Ravnborg96bde062007-03-26 21:53:30 -0800582static void pci_bridge_check_ranges(struct pci_bus *bus)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583{
584 u16 io;
585 u32 pmem;
586 struct pci_dev *bridge = bus->self;
587 struct resource *b_res;
588
589 b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
590 b_res[1].flags |= IORESOURCE_MEM;
591
592 pci_read_config_word(bridge, PCI_IO_BASE, &io);
593 if (!io) {
594 pci_write_config_word(bridge, PCI_IO_BASE, 0xf0f0);
595 pci_read_config_word(bridge, PCI_IO_BASE, &io);
596 pci_write_config_word(bridge, PCI_IO_BASE, 0x0);
597 }
598 if (io)
599 b_res[0].flags |= IORESOURCE_IO;
600 /* DECchip 21050 pass 2 errata: the bridge may miss an address
601 disconnect boundary by one PCI data phase.
602 Workaround: do not use prefetching on this device. */
603 if (bridge->vendor == PCI_VENDOR_ID_DEC && bridge->device == 0x0001)
604 return;
605 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
606 if (!pmem) {
607 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE,
608 0xfff0fff0);
609 pci_read_config_dword(bridge, PCI_PREF_MEMORY_BASE, &pmem);
610 pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, 0x0);
611 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700612 if (pmem) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu99586102010-01-22 01:02:28 -0800614 if ((pmem & PCI_PREF_RANGE_TYPE_MASK) ==
615 PCI_PREF_RANGE_TYPE_64) {
Yinghai Lu1f82de12009-04-23 20:48:32 -0700616 b_res[2].flags |= IORESOURCE_MEM_64;
Yinghai Lu99586102010-01-22 01:02:28 -0800617 b_res[2].flags |= PCI_PREF_RANGE_TYPE_64;
618 }
Yinghai Lu1f82de12009-04-23 20:48:32 -0700619 }
620
621 /* double check if bridge does support 64 bit pref */
622 if (b_res[2].flags & IORESOURCE_MEM_64) {
623 u32 mem_base_hi, tmp;
624 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32,
625 &mem_base_hi);
626 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
627 0xffffffff);
628 pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &tmp);
629 if (!tmp)
630 b_res[2].flags &= ~IORESOURCE_MEM_64;
631 pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32,
632 mem_base_hi);
633 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700634}
635
636/* Helper function for sizing routines: find first available
637 bus resource of a given type. Note: we intentionally skip
638 the bus resources which have already been assigned (that is,
639 have non-NULL parent resource). */
Sam Ravnborg96bde062007-03-26 21:53:30 -0800640static struct resource *find_free_bus_resource(struct pci_bus *bus, unsigned long type)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700641{
642 int i;
643 struct resource *r;
644 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
645 IORESOURCE_PREFETCH;
646
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -0700647 pci_bus_for_each_resource(bus, r, i) {
Ivan Kokshaysky299de032005-06-15 18:59:27 +0400648 if (r == &ioport_resource || r == &iomem_resource)
649 continue;
Jesse Barnes55a10982009-10-27 09:39:18 -0700650 if (r && (r->flags & type_mask) == type && !r->parent)
651 return r;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652 }
653 return NULL;
654}
655
Ram Pai13583b12011-02-14 17:43:17 -0800656static resource_size_t calculate_iosize(resource_size_t size,
657 resource_size_t min_size,
658 resource_size_t size1,
659 resource_size_t old_size,
660 resource_size_t align)
661{
662 if (size < min_size)
663 size = min_size;
664 if (old_size == 1 )
665 old_size = 0;
666 /* To be fixed in 2.5: we should have sort of HAVE_ISA
667 flag in the struct pci_bus. */
668#if defined(CONFIG_ISA) || defined(CONFIG_EISA)
669 size = (size & 0xff) + ((size & ~0xffUL) << 2);
670#endif
671 size = ALIGN(size + size1, align);
672 if (size < old_size)
673 size = old_size;
674 return size;
675}
676
677static resource_size_t calculate_memsize(resource_size_t size,
678 resource_size_t min_size,
679 resource_size_t size1,
680 resource_size_t old_size,
681 resource_size_t align)
682{
683 if (size < min_size)
684 size = min_size;
685 if (old_size == 1 )
686 old_size = 0;
687 if (size < old_size)
688 size = old_size;
689 size = ALIGN(size + size1, align);
690 return size;
691}
692
Ram Paic8adf9a2011-02-14 17:43:20 -0800693/**
694 * pbus_size_io() - size the io window of a given bus
695 *
696 * @bus : the bus
697 * @min_size : the minimum io window that must to be allocated
698 * @add_size : additional optional io window
Ram Pai9e8bf932011-07-25 13:08:42 -0700699 * @realloc_head : track the additional io window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800700 *
701 * Sizing the IO windows of the PCI-PCI bridge is trivial,
702 * since these windows have 4K granularity and the IO ranges
703 * of non-bridge PCI devices are limited to 256 bytes.
704 * We must be careful with the ISA aliasing though.
705 */
706static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800707 resource_size_t add_size, struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708{
709 struct pci_dev *dev;
710 struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
Ram Paic8adf9a2011-02-14 17:43:20 -0800711 unsigned long size = 0, size0 = 0, size1 = 0;
Yinghai Lube768912011-07-25 13:08:38 -0700712 resource_size_t children_add_size = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700713
714 if (!b_res)
715 return;
716
717 list_for_each_entry(dev, &bus->devices, bus_list) {
718 int i;
719
720 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
721 struct resource *r = &dev->resource[i];
722 unsigned long r_size;
723
724 if (r->parent || !(r->flags & IORESOURCE_IO))
725 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800726 r_size = resource_size(r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700727
728 if (r_size < 0x400)
729 /* Might be re-aligned for ISA */
730 size += r_size;
731 else
732 size1 += r_size;
Yinghai Lube768912011-07-25 13:08:38 -0700733
Ram Pai9e8bf932011-07-25 13:08:42 -0700734 if (realloc_head)
735 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736 }
737 }
Ram Paic8adf9a2011-02-14 17:43:20 -0800738 size0 = calculate_iosize(size, min_size, size1,
Ram Pai13583b12011-02-14 17:43:17 -0800739 resource_size(b_res), 4096);
Yinghai Lube768912011-07-25 13:08:38 -0700740 if (children_add_size > add_size)
741 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -0700742 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -0800743 calculate_iosize(size, min_size, add_size + size1,
Ram Paic8adf9a2011-02-14 17:43:20 -0800744 resource_size(b_res), 4096);
745 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700746 if (b_res->start || b_res->end)
747 dev_info(&bus->self->dev, "disabling bridge window "
748 "%pR to [bus %02x-%02x] (unused)\n", b_res,
749 bus->secondary, bus->subordinate);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700750 b_res->flags = 0;
751 return;
752 }
753 /* Alignment of the IO window is always 4K */
754 b_res->start = 4096;
Ram Paic8adf9a2011-02-14 17:43:20 -0800755 b_res->end = b_res->start + size0 - 1;
Ivan Kokshaysky88452562008-03-30 19:50:14 +0400756 b_res->flags |= IORESOURCE_STARTALIGN;
Yinghai Lub5924432012-01-21 02:08:31 -0800757 if (size1 > size0 && realloc_head) {
Ram Pai9e8bf932011-07-25 13:08:42 -0700758 add_to_list(realloc_head, bus->self, b_res, size1-size0, 4096);
Yinghai Lub5924432012-01-21 02:08:31 -0800759 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window "
760 "%pR to [bus %02x-%02x] add_size %lx\n", b_res,
761 bus->secondary, bus->subordinate, size1-size0);
762 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700763}
764
Ram Paic8adf9a2011-02-14 17:43:20 -0800765/**
766 * pbus_size_mem() - size the memory window of a given bus
767 *
768 * @bus : the bus
769 * @min_size : the minimum memory window that must to be allocated
770 * @add_size : additional optional memory window
Ram Pai9e8bf932011-07-25 13:08:42 -0700771 * @realloc_head : track the additional memory window on this list
Ram Paic8adf9a2011-02-14 17:43:20 -0800772 *
773 * Calculate the size of the bus and minimal alignment which
774 * guarantees that all child resources fit in this size.
775 */
Eric W. Biederman28760482009-09-09 14:09:24 -0700776static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
Ram Paic8adf9a2011-02-14 17:43:20 -0800777 unsigned long type, resource_size_t min_size,
778 resource_size_t add_size,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800779 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700780{
781 struct pci_dev *dev;
Ram Paic8adf9a2011-02-14 17:43:20 -0800782 resource_size_t min_align, align, size, size0, size1;
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100783 resource_size_t aligns[12]; /* Alignments from 1Mb to 2Gb */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784 int order, max_order;
785 struct resource *b_res = find_free_bus_resource(bus, type);
Yinghai Lu1f82de12009-04-23 20:48:32 -0700786 unsigned int mem64_mask = 0;
Yinghai Lube768912011-07-25 13:08:38 -0700787 resource_size_t children_add_size = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700788
789 if (!b_res)
790 return 0;
791
792 memset(aligns, 0, sizeof(aligns));
793 max_order = 0;
794 size = 0;
795
Yinghai Lu1f82de12009-04-23 20:48:32 -0700796 mem64_mask = b_res->flags & IORESOURCE_MEM_64;
797 b_res->flags &= ~IORESOURCE_MEM_64;
798
Linus Torvalds1da177e2005-04-16 15:20:36 -0700799 list_for_each_entry(dev, &bus->devices, bus_list) {
800 int i;
Yinghai Lu1f82de12009-04-23 20:48:32 -0700801
Linus Torvalds1da177e2005-04-16 15:20:36 -0700802 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
803 struct resource *r = &dev->resource[i];
Benjamin Herrenschmidtc40a22e2007-12-10 17:32:15 +1100804 resource_size_t r_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700805
806 if (r->parent || (r->flags & mask) != type)
807 continue;
Zhao, Yu022edd82008-10-13 19:24:28 +0800808 r_size = resource_size(r);
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700809#ifdef CONFIG_PCI_IOV
810 /* put SRIOV requested res to the optional list */
Ram Pai9e8bf932011-07-25 13:08:42 -0700811 if (realloc_head && i >= PCI_IOV_RESOURCES &&
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700812 i <= PCI_IOV_RESOURCE_END) {
813 r->end = r->start - 1;
Ram Pai9e8bf932011-07-25 13:08:42 -0700814 add_to_list(realloc_head, dev, r, r_size, 0/* dont' care */);
Yinghai Lu2aceefc2011-07-25 13:08:40 -0700815 children_add_size += r_size;
816 continue;
817 }
818#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700819 /* For bridges size != alignment */
Chris Wright6faf17f2009-08-28 13:00:06 -0700820 align = pci_resource_alignment(dev, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821 order = __ffs(align) - 20;
822 if (order > 11) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700823 dev_warn(&dev->dev, "disabling BAR %d: %pR "
824 "(bad alignment %#llx)\n", i, r,
825 (unsigned long long) align);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700826 r->flags = 0;
827 continue;
828 }
829 size += r_size;
830 if (order < 0)
831 order = 0;
832 /* Exclude ranges with size > align from
833 calculation of the alignment. */
834 if (r_size == align)
835 aligns[order] += align;
836 if (order > max_order)
837 max_order = order;
Yinghai Lu1f82de12009-04-23 20:48:32 -0700838 mem64_mask &= r->flags & IORESOURCE_MEM_64;
Yinghai Lube768912011-07-25 13:08:38 -0700839
Ram Pai9e8bf932011-07-25 13:08:42 -0700840 if (realloc_head)
841 children_add_size += get_res_add_size(realloc_head, r);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842 }
843 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844 align = 0;
845 min_align = 0;
846 for (order = 0; order <= max_order; order++) {
Jeremy Fitzhardinge8308c542008-09-11 01:31:50 -0700847 resource_size_t align1 = 1;
848
849 align1 <<= (order + 20);
850
Linus Torvalds1da177e2005-04-16 15:20:36 -0700851 if (!align)
852 min_align = align1;
Milind Arun Choudhary6f6f8c22007-07-09 11:55:51 -0700853 else if (ALIGN(align + min_align, min_align) < align1)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700854 min_align = align1 >> 1;
855 align += aligns[order];
856 }
Linus Torvaldsb42282e2011-04-11 10:53:11 -0700857 size0 = calculate_memsize(size, min_size, 0, resource_size(b_res), min_align);
Yinghai Lube768912011-07-25 13:08:38 -0700858 if (children_add_size > add_size)
859 add_size = children_add_size;
Ram Pai9e8bf932011-07-25 13:08:42 -0700860 size1 = (!realloc_head || (realloc_head && !add_size)) ? size0 :
Yinghai Lua4ac9fe2012-01-21 02:08:17 -0800861 calculate_memsize(size, min_size, add_size,
Linus Torvaldsb42282e2011-04-11 10:53:11 -0700862 resource_size(b_res), min_align);
Ram Paic8adf9a2011-02-14 17:43:20 -0800863 if (!size0 && !size1) {
Bjorn Helgaas865df572009-11-04 10:32:57 -0700864 if (b_res->start || b_res->end)
865 dev_info(&bus->self->dev, "disabling bridge window "
866 "%pR to [bus %02x-%02x] (unused)\n", b_res,
867 bus->secondary, bus->subordinate);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 b_res->flags = 0;
869 return 1;
870 }
871 b_res->start = min_align;
Ram Paic8adf9a2011-02-14 17:43:20 -0800872 b_res->end = size0 + min_align - 1;
873 b_res->flags |= IORESOURCE_STARTALIGN | mem64_mask;
Yinghai Lub5924432012-01-21 02:08:31 -0800874 if (size1 > size0 && realloc_head) {
Ram Pai9e8bf932011-07-25 13:08:42 -0700875 add_to_list(realloc_head, bus->self, b_res, size1-size0, min_align);
Yinghai Lub5924432012-01-21 02:08:31 -0800876 dev_printk(KERN_DEBUG, &bus->self->dev, "bridge window "
877 "%pR to [bus %02x-%02x] add_size %llx\n", b_res,
878 bus->secondary, bus->subordinate, (unsigned long long)size1-size0);
879 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700880 return 1;
881}
882
Ram Pai0a2daa12011-07-25 13:08:41 -0700883unsigned long pci_cardbus_resource_alignment(struct resource *res)
884{
885 if (res->flags & IORESOURCE_IO)
886 return pci_cardbus_io_size;
887 if (res->flags & IORESOURCE_MEM)
888 return pci_cardbus_mem_size;
889 return 0;
890}
891
892static void pci_bus_size_cardbus(struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800893 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700894{
895 struct pci_dev *bridge = bus->self;
896 struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
Yinghai Lu11848932012-02-10 15:33:47 -0800897 resource_size_t b_res_3_size = pci_cardbus_mem_size * 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700898 u16 ctrl;
899
Yinghai Lu3796f1e2012-02-10 15:33:48 -0800900 if (b_res[0].parent)
901 goto handle_b_res_1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700902 /*
903 * Reserve some resources for CardBus. We reserve
904 * a fixed amount of bus space for CardBus bridges.
905 */
Yinghai Lu11848932012-02-10 15:33:47 -0800906 b_res[0].start = pci_cardbus_io_size;
907 b_res[0].end = b_res[0].start + pci_cardbus_io_size - 1;
908 b_res[0].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
909 if (realloc_head) {
910 b_res[0].end -= pci_cardbus_io_size;
911 add_to_list(realloc_head, bridge, b_res, pci_cardbus_io_size,
912 pci_cardbus_io_size);
913 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914
Yinghai Lu3796f1e2012-02-10 15:33:48 -0800915handle_b_res_1:
916 if (b_res[1].parent)
917 goto handle_b_res_2;
Yinghai Lu11848932012-02-10 15:33:47 -0800918 b_res[1].start = pci_cardbus_io_size;
919 b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
920 b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
921 if (realloc_head) {
922 b_res[1].end -= pci_cardbus_io_size;
923 add_to_list(realloc_head, bridge, b_res+1, pci_cardbus_io_size,
924 pci_cardbus_io_size);
925 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926
Yinghai Lu3796f1e2012-02-10 15:33:48 -0800927handle_b_res_2:
Yinghai Ludcef0d02012-02-10 15:33:46 -0800928 /* MEM1 must not be pref mmio */
929 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
930 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
931 ctrl &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1;
932 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
933 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
934 }
935
Linus Torvalds1da177e2005-04-16 15:20:36 -0700936 /*
937 * Check whether prefetchable memory is supported
938 * by this bridge.
939 */
940 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
941 if (!(ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0)) {
942 ctrl |= PCI_CB_BRIDGE_CTL_PREFETCH_MEM0;
943 pci_write_config_word(bridge, PCI_CB_BRIDGE_CONTROL, ctrl);
944 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
945 }
946
Yinghai Lu3796f1e2012-02-10 15:33:48 -0800947 if (b_res[2].parent)
948 goto handle_b_res_3;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949 /*
950 * If we have prefetchable memory support, allocate
951 * two regions. Otherwise, allocate one region of
952 * twice the size.
953 */
954 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
Yinghai Lu11848932012-02-10 15:33:47 -0800955 b_res[2].start = pci_cardbus_mem_size;
956 b_res[2].end = b_res[2].start + pci_cardbus_mem_size - 1;
957 b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH |
958 IORESOURCE_STARTALIGN;
959 if (realloc_head) {
960 b_res[2].end -= pci_cardbus_mem_size;
961 add_to_list(realloc_head, bridge, b_res+2,
962 pci_cardbus_mem_size, pci_cardbus_mem_size);
963 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700964
Yinghai Lu11848932012-02-10 15:33:47 -0800965 /* reduce that to half */
966 b_res_3_size = pci_cardbus_mem_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700967 }
Ram Pai0a2daa12011-07-25 13:08:41 -0700968
Yinghai Lu3796f1e2012-02-10 15:33:48 -0800969handle_b_res_3:
970 if (b_res[3].parent)
971 goto handle_done;
Yinghai Lu11848932012-02-10 15:33:47 -0800972 b_res[3].start = pci_cardbus_mem_size;
973 b_res[3].end = b_res[3].start + b_res_3_size - 1;
974 b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;
975 if (realloc_head) {
976 b_res[3].end -= b_res_3_size;
977 add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,
978 pci_cardbus_mem_size);
979 }
Yinghai Lu3796f1e2012-02-10 15:33:48 -0800980
981handle_done:
982 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983}
984
Ram Paic8adf9a2011-02-14 17:43:20 -0800985void __ref __pci_bus_size_bridges(struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -0800986 struct list_head *realloc_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700987{
988 struct pci_dev *dev;
989 unsigned long mask, prefmask;
Ram Paic8adf9a2011-02-14 17:43:20 -0800990 resource_size_t additional_mem_size = 0, additional_io_size = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700991
992 list_for_each_entry(dev, &bus->devices, bus_list) {
993 struct pci_bus *b = dev->subordinate;
994 if (!b)
995 continue;
996
997 switch (dev->class >> 8) {
998 case PCI_CLASS_BRIDGE_CARDBUS:
Ram Pai9e8bf932011-07-25 13:08:42 -0700999 pci_bus_size_cardbus(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001000 break;
1001
1002 case PCI_CLASS_BRIDGE_PCI:
1003 default:
Ram Pai9e8bf932011-07-25 13:08:42 -07001004 __pci_bus_size_bridges(b, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001005 break;
1006 }
1007 }
1008
1009 /* The root bus? */
1010 if (!bus->self)
1011 return;
1012
1013 switch (bus->self->class >> 8) {
1014 case PCI_CLASS_BRIDGE_CARDBUS:
1015 /* don't size cardbuses yet. */
1016 break;
1017
1018 case PCI_CLASS_BRIDGE_PCI:
1019 pci_bridge_check_ranges(bus);
Eric W. Biederman28760482009-09-09 14:09:24 -07001020 if (bus->self->is_hotplug_bridge) {
Ram Paic8adf9a2011-02-14 17:43:20 -08001021 additional_io_size = pci_hotplug_io_size;
1022 additional_mem_size = pci_hotplug_mem_size;
Eric W. Biederman28760482009-09-09 14:09:24 -07001023 }
Ram Paic8adf9a2011-02-14 17:43:20 -08001024 /*
1025 * Follow thru
1026 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027 default:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001028 pbus_size_io(bus, realloc_head ? 0 : additional_io_size,
1029 additional_io_size, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030 /* If the bridge supports prefetchable range, size it
1031 separately. If it doesn't, or its prefetchable window
1032 has already been allocated by arch code, try
1033 non-prefetchable range for both types of PCI memory
1034 resources. */
1035 mask = IORESOURCE_MEM;
1036 prefmask = IORESOURCE_MEM | IORESOURCE_PREFETCH;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001037 if (pbus_size_mem(bus, prefmask, prefmask,
1038 realloc_head ? 0 : additional_mem_size,
1039 additional_mem_size, realloc_head))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040 mask = prefmask; /* Success, size non-prefetch only. */
Eric W. Biederman28760482009-09-09 14:09:24 -07001041 else
Ram Paic8adf9a2011-02-14 17:43:20 -08001042 additional_mem_size += additional_mem_size;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001043 pbus_size_mem(bus, mask, IORESOURCE_MEM,
1044 realloc_head ? 0 : additional_mem_size,
1045 additional_mem_size, realloc_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001046 break;
1047 }
1048}
Ram Paic8adf9a2011-02-14 17:43:20 -08001049
1050void __ref pci_bus_size_bridges(struct pci_bus *bus)
1051{
1052 __pci_bus_size_bridges(bus, NULL);
1053}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001054EXPORT_SYMBOL(pci_bus_size_bridges);
1055
Yinghai Lu568ddef2010-01-22 01:02:21 -08001056static void __ref __pci_bus_assign_resources(const struct pci_bus *bus,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001057 struct list_head *realloc_head,
1058 struct list_head *fail_head)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001059{
1060 struct pci_bus *b;
1061 struct pci_dev *dev;
1062
Ram Pai9e8bf932011-07-25 13:08:42 -07001063 pbus_assign_resources_sorted(bus, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001064
Linus Torvalds1da177e2005-04-16 15:20:36 -07001065 list_for_each_entry(dev, &bus->devices, bus_list) {
1066 b = dev->subordinate;
1067 if (!b)
1068 continue;
1069
Ram Pai9e8bf932011-07-25 13:08:42 -07001070 __pci_bus_assign_resources(b, realloc_head, fail_head);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001071
1072 switch (dev->class >> 8) {
1073 case PCI_CLASS_BRIDGE_PCI:
Yinghai Lu6841ec62010-01-22 01:02:25 -08001074 if (!pci_is_enabled(dev))
1075 pci_setup_bridge(b);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001076 break;
1077
1078 case PCI_CLASS_BRIDGE_CARDBUS:
1079 pci_setup_cardbus(b);
1080 break;
1081
1082 default:
Bjorn Helgaas80ccba12008-06-13 10:52:11 -06001083 dev_info(&dev->dev, "not setting up bridge for bus "
1084 "%04x:%02x\n", pci_domain_nr(b), b->number);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001085 break;
1086 }
1087 }
1088}
Yinghai Lu568ddef2010-01-22 01:02:21 -08001089
1090void __ref pci_bus_assign_resources(const struct pci_bus *bus)
1091{
Ram Paic8adf9a2011-02-14 17:43:20 -08001092 __pci_bus_assign_resources(bus, NULL, NULL);
Yinghai Lu568ddef2010-01-22 01:02:21 -08001093}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001094EXPORT_SYMBOL(pci_bus_assign_resources);
1095
Yinghai Lu6841ec62010-01-22 01:02:25 -08001096static void __ref __pci_bridge_assign_resources(const struct pci_dev *bridge,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001097 struct list_head *add_head,
1098 struct list_head *fail_head)
Yinghai Lu6841ec62010-01-22 01:02:25 -08001099{
1100 struct pci_bus *b;
1101
Yinghai Lu8424d752012-01-21 02:08:21 -08001102 pdev_assign_resources_sorted((struct pci_dev *)bridge,
1103 add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001104
1105 b = bridge->subordinate;
1106 if (!b)
1107 return;
1108
Yinghai Lu8424d752012-01-21 02:08:21 -08001109 __pci_bus_assign_resources(b, add_head, fail_head);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001110
1111 switch (bridge->class >> 8) {
1112 case PCI_CLASS_BRIDGE_PCI:
1113 pci_setup_bridge(b);
1114 break;
1115
1116 case PCI_CLASS_BRIDGE_CARDBUS:
1117 pci_setup_cardbus(b);
1118 break;
1119
1120 default:
1121 dev_info(&bridge->dev, "not setting up bridge for bus "
1122 "%04x:%02x\n", pci_domain_nr(b), b->number);
1123 break;
1124 }
1125}
Yinghai Lu5009b462010-01-22 01:02:20 -08001126static void pci_bridge_release_resources(struct pci_bus *bus,
1127 unsigned long type)
1128{
1129 int idx;
1130 bool changed = false;
1131 struct pci_dev *dev;
1132 struct resource *r;
1133 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
1134 IORESOURCE_PREFETCH;
1135
1136 dev = bus->self;
1137 for (idx = PCI_BRIDGE_RESOURCES; idx <= PCI_BRIDGE_RESOURCE_END;
1138 idx++) {
1139 r = &dev->resource[idx];
1140 if ((r->flags & type_mask) != type)
1141 continue;
1142 if (!r->parent)
1143 continue;
1144 /*
1145 * if there are children under that, we should release them
1146 * all
1147 */
1148 release_child_resources(r);
1149 if (!release_resource(r)) {
1150 dev_printk(KERN_DEBUG, &dev->dev,
1151 "resource %d %pR released\n", idx, r);
1152 /* keep the old size */
1153 r->end = resource_size(r) - 1;
1154 r->start = 0;
1155 r->flags = 0;
1156 changed = true;
1157 }
1158 }
1159
1160 if (changed) {
1161 /* avoiding touch the one without PREF */
1162 if (type & IORESOURCE_PREFETCH)
1163 type = IORESOURCE_PREFETCH;
1164 __pci_setup_bridge(bus, type);
1165 }
1166}
1167
1168enum release_type {
1169 leaf_only,
1170 whole_subtree,
1171};
1172/*
1173 * try to release pci bridge resources that is from leaf bridge,
1174 * so we can allocate big new one later
1175 */
1176static void __ref pci_bus_release_bridge_resources(struct pci_bus *bus,
1177 unsigned long type,
1178 enum release_type rel_type)
1179{
1180 struct pci_dev *dev;
1181 bool is_leaf_bridge = true;
1182
1183 list_for_each_entry(dev, &bus->devices, bus_list) {
1184 struct pci_bus *b = dev->subordinate;
1185 if (!b)
1186 continue;
1187
1188 is_leaf_bridge = false;
1189
1190 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1191 continue;
1192
1193 if (rel_type == whole_subtree)
1194 pci_bus_release_bridge_resources(b, type,
1195 whole_subtree);
1196 }
1197
1198 if (pci_is_root_bus(bus))
1199 return;
1200
1201 if ((bus->self->class >> 8) != PCI_CLASS_BRIDGE_PCI)
1202 return;
1203
1204 if ((rel_type == whole_subtree) || is_leaf_bridge)
1205 pci_bridge_release_resources(bus, type);
1206}
1207
Yinghai Lu76fbc262008-06-23 20:33:06 +02001208static void pci_bus_dump_res(struct pci_bus *bus)
1209{
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001210 struct resource *res;
1211 int i;
Yinghai Lu76fbc262008-06-23 20:33:06 +02001212
Bjorn Helgaas89a74ec2010-02-23 10:24:31 -07001213 pci_bus_for_each_resource(bus, res, i) {
Yinghai Lu7c9342b2009-12-22 15:02:24 -08001214 if (!res || !res->end || !res->flags)
Yinghai Lu76fbc262008-06-23 20:33:06 +02001215 continue;
1216
Bjorn Helgaasc7dabef2009-10-27 13:26:47 -06001217 dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
Yinghai Lu76fbc262008-06-23 20:33:06 +02001218 }
1219}
1220
1221static void pci_bus_dump_resources(struct pci_bus *bus)
1222{
1223 struct pci_bus *b;
1224 struct pci_dev *dev;
1225
1226
1227 pci_bus_dump_res(bus);
1228
1229 list_for_each_entry(dev, &bus->devices, bus_list) {
1230 b = dev->subordinate;
1231 if (!b)
1232 continue;
1233
1234 pci_bus_dump_resources(b);
1235 }
1236}
1237
Yinghai Luda7822e2011-05-12 17:11:37 -07001238static int __init pci_bus_get_depth(struct pci_bus *bus)
1239{
1240 int depth = 0;
1241 struct pci_dev *dev;
1242
1243 list_for_each_entry(dev, &bus->devices, bus_list) {
1244 int ret;
1245 struct pci_bus *b = dev->subordinate;
1246 if (!b)
1247 continue;
1248
1249 ret = pci_bus_get_depth(b);
1250 if (ret + 1 > depth)
1251 depth = ret + 1;
1252 }
1253
1254 return depth;
1255}
1256static int __init pci_get_max_depth(void)
1257{
1258 int depth = 0;
1259 struct pci_bus *bus;
1260
1261 list_for_each_entry(bus, &pci_root_buses, node) {
1262 int ret;
1263
1264 ret = pci_bus_get_depth(bus);
1265 if (ret > depth)
1266 depth = ret;
1267 }
1268
1269 return depth;
1270}
1271
Yinghai Lub55438f2012-02-23 19:23:30 -08001272/*
1273 * -1: undefined, will auto detect later
1274 * 0: disabled by user
1275 * 1: disabled by auto detect
1276 * 2: enabled by user
1277 * 3: enabled by auto detect
1278 */
1279enum enable_type {
1280 undefined = -1,
1281 user_disabled,
1282 auto_disabled,
1283 user_enabled,
1284 auto_enabled,
1285};
1286
1287static enum enable_type pci_realloc_enable __initdata = undefined;
1288void __init pci_realloc_get_opt(char *str)
1289{
1290 if (!strncmp(str, "off", 3))
1291 pci_realloc_enable = user_disabled;
1292 else if (!strncmp(str, "on", 2))
1293 pci_realloc_enable = user_enabled;
1294}
1295static bool __init pci_realloc_enabled(void)
1296{
1297 return pci_realloc_enable >= user_enabled;
1298}
Ram Paif483d392011-07-07 11:19:10 -07001299
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001300static void __init pci_realloc_detect(void)
1301{
1302#if defined(CONFIG_PCI_IOV) && defined(CONFIG_PCI_REALLOC_ENABLE_AUTO)
1303 struct pci_dev *dev = NULL;
1304
1305 if (pci_realloc_enable != undefined)
1306 return;
1307
1308 for_each_pci_dev(dev) {
1309 int i;
1310
1311 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++) {
1312 struct resource *r = &dev->resource[i];
1313
1314 /* Not assigned, or rejected by kernel ? */
1315 if (r->flags && !r->start) {
1316 pci_realloc_enable = auto_enabled;
1317
1318 return;
1319 }
1320 }
1321 }
1322#endif
1323}
1324
Yinghai Luda7822e2011-05-12 17:11:37 -07001325/*
1326 * first try will not touch pci bridge res
1327 * second and later try will clear small leaf bridge res
1328 * will stop till to the max deepth if can not find good one
1329 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001330void __init
1331pci_assign_unassigned_resources(void)
1332{
1333 struct pci_bus *bus;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001334 LIST_HEAD(realloc_head); /* list of resources that
Ram Paic8adf9a2011-02-14 17:43:20 -08001335 want additional resources */
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001336 struct list_head *add_list = NULL;
Yinghai Luda7822e2011-05-12 17:11:37 -07001337 int tried_times = 0;
1338 enum release_type rel_type = leaf_only;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001339 LIST_HEAD(fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001340 struct pci_dev_resource *fail_res;
Yinghai Luda7822e2011-05-12 17:11:37 -07001341 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
1342 IORESOURCE_PREFETCH;
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001343 int pci_try_num = 1;
Yinghai Luda7822e2011-05-12 17:11:37 -07001344
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001345 /* don't realloc if asked to do so */
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001346 pci_realloc_detect();
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001347 if (pci_realloc_enabled()) {
1348 int max_depth = pci_get_max_depth();
1349
1350 pci_try_num = max_depth + 1;
1351 printk(KERN_DEBUG "PCI: max bus depth: %d pci_try_num: %d\n",
1352 max_depth, pci_try_num);
1353 }
Yinghai Luda7822e2011-05-12 17:11:37 -07001354
1355again:
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001356 /*
1357 * last try will use add_list, otherwise will try good to have as
1358 * must have, so can realloc parent bridge resource
1359 */
1360 if (tried_times + 1 == pci_try_num)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001361 add_list = &realloc_head;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001362 /* Depth first, calculate sizes and alignments of all
1363 subordinate buses. */
Yinghai Luda7822e2011-05-12 17:11:37 -07001364 list_for_each_entry(bus, &pci_root_buses, node)
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001365 __pci_bus_size_bridges(bus, add_list);
Ram Paic8adf9a2011-02-14 17:43:20 -08001366
Linus Torvalds1da177e2005-04-16 15:20:36 -07001367 /* Depth last, allocate resources and update the hardware. */
Yinghai Luda7822e2011-05-12 17:11:37 -07001368 list_for_each_entry(bus, &pci_root_buses, node)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001369 __pci_bus_assign_resources(bus, add_list, &fail_head);
Yinghai Lu19aa7ee2012-01-21 02:08:24 -08001370 if (add_list)
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001371 BUG_ON(!list_empty(add_list));
Yinghai Luda7822e2011-05-12 17:11:37 -07001372 tried_times++;
1373
1374 /* any device complain? */
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001375 if (list_empty(&fail_head))
Yinghai Luda7822e2011-05-12 17:11:37 -07001376 goto enable_and_dump;
Ram Paif483d392011-07-07 11:19:10 -07001377
Yinghai Lu0c5be0c2012-02-23 19:23:29 -08001378 if (tried_times >= pci_try_num) {
Yinghai Lueb572e72012-02-23 19:23:31 -08001379 if (pci_realloc_enable == undefined)
1380 printk(KERN_INFO "Some PCI device resources are unassigned, try booting with pci=realloc\n");
Yinghai Lub07f2eb2012-02-23 19:23:32 -08001381 else if (pci_realloc_enable == auto_enabled)
1382 printk(KERN_INFO "Automatically enabled pci realloc, if you have problem, try booting with pci=realloc=off\n");
Yinghai Lueb572e72012-02-23 19:23:31 -08001383
Yinghai Lubffc56d2012-01-21 02:08:30 -08001384 free_list(&fail_head);
Yinghai Luda7822e2011-05-12 17:11:37 -07001385 goto enable_and_dump;
1386 }
1387
1388 printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
1389 tried_times + 1);
1390
1391 /* third times and later will not check if it is leaf */
1392 if ((tried_times + 1) > 2)
1393 rel_type = whole_subtree;
1394
1395 /*
1396 * Try to release leaf bridge's resources that doesn't fit resource of
1397 * child device under that bridge
1398 */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001399 list_for_each_entry(fail_res, &fail_head, list) {
1400 bus = fail_res->dev->bus;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001401 pci_bus_release_bridge_resources(bus,
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001402 fail_res->flags & type_mask,
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001403 rel_type);
Yinghai Luda7822e2011-05-12 17:11:37 -07001404 }
1405 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001406 list_for_each_entry(fail_res, &fail_head, list) {
1407 struct resource *res = fail_res->res;
Yinghai Luda7822e2011-05-12 17:11:37 -07001408
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001409 res->start = fail_res->start;
1410 res->end = fail_res->end;
1411 res->flags = fail_res->flags;
1412 if (fail_res->dev->subordinate)
Yinghai Luda7822e2011-05-12 17:11:37 -07001413 res->flags = 0;
Yinghai Luda7822e2011-05-12 17:11:37 -07001414 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001415 free_list(&fail_head);
Yinghai Luda7822e2011-05-12 17:11:37 -07001416
1417 goto again;
1418
1419enable_and_dump:
1420 /* Depth last, update the hardware. */
1421 list_for_each_entry(bus, &pci_root_buses, node)
1422 pci_enable_bridges(bus);
Yinghai Lu76fbc262008-06-23 20:33:06 +02001423
1424 /* dump the resource on buses */
Yinghai Luda7822e2011-05-12 17:11:37 -07001425 list_for_each_entry(bus, &pci_root_buses, node)
Yinghai Lu76fbc262008-06-23 20:33:06 +02001426 pci_bus_dump_resources(bus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001427}
Yinghai Lu6841ec62010-01-22 01:02:25 -08001428
1429void pci_assign_unassigned_bridge_resources(struct pci_dev *bridge)
1430{
1431 struct pci_bus *parent = bridge->subordinate;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001432 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu8424d752012-01-21 02:08:21 -08001433 want additional resources */
Yinghai Lu32180e42010-01-22 01:02:27 -08001434 int tried_times = 0;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001435 LIST_HEAD(fail_head);
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001436 struct pci_dev_resource *fail_res;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001437 int retval;
Yinghai Lu32180e42010-01-22 01:02:27 -08001438 unsigned long type_mask = IORESOURCE_IO | IORESOURCE_MEM |
1439 IORESOURCE_PREFETCH;
Yinghai Lu6841ec62010-01-22 01:02:25 -08001440
Yinghai Lu32180e42010-01-22 01:02:27 -08001441again:
Yinghai Lu8424d752012-01-21 02:08:21 -08001442 __pci_bus_size_bridges(parent, &add_list);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001443 __pci_bridge_assign_resources(bridge, &add_list, &fail_head);
1444 BUG_ON(!list_empty(&add_list));
Yinghai Lu32180e42010-01-22 01:02:27 -08001445 tried_times++;
1446
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001447 if (list_empty(&fail_head))
Yinghai Lu3f579c32010-05-21 14:35:06 -07001448 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001449
1450 if (tried_times >= 2) {
1451 /* still fail, don't need to try more */
Yinghai Lubffc56d2012-01-21 02:08:30 -08001452 free_list(&fail_head);
Yinghai Lu3f579c32010-05-21 14:35:06 -07001453 goto enable_all;
Yinghai Lu32180e42010-01-22 01:02:27 -08001454 }
1455
1456 printk(KERN_DEBUG "PCI: No. %d try to assign unassigned res\n",
1457 tried_times + 1);
1458
1459 /*
1460 * Try to release leaf bridge's resources that doesn't fit resource of
1461 * child device under that bridge
1462 */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001463 list_for_each_entry(fail_res, &fail_head, list) {
1464 struct pci_bus *bus = fail_res->dev->bus;
1465 unsigned long flags = fail_res->flags;
Yinghai Lu32180e42010-01-22 01:02:27 -08001466
1467 pci_bus_release_bridge_resources(bus, flags & type_mask,
1468 whole_subtree);
Yinghai Lu32180e42010-01-22 01:02:27 -08001469 }
1470 /* restore size and flags */
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001471 list_for_each_entry(fail_res, &fail_head, list) {
1472 struct resource *res = fail_res->res;
Yinghai Lu32180e42010-01-22 01:02:27 -08001473
Yinghai Lub9b0bba2012-01-21 02:08:29 -08001474 res->start = fail_res->start;
1475 res->end = fail_res->end;
1476 res->flags = fail_res->flags;
1477 if (fail_res->dev->subordinate)
Yinghai Lu32180e42010-01-22 01:02:27 -08001478 res->flags = 0;
Yinghai Lu32180e42010-01-22 01:02:27 -08001479 }
Yinghai Lubffc56d2012-01-21 02:08:30 -08001480 free_list(&fail_head);
Yinghai Lu32180e42010-01-22 01:02:27 -08001481
1482 goto again;
Yinghai Lu3f579c32010-05-21 14:35:06 -07001483
1484enable_all:
1485 retval = pci_reenable_device(bridge);
1486 pci_set_master(bridge);
1487 pci_enable_bridges(parent);
Yinghai Lu6841ec62010-01-22 01:02:25 -08001488}
1489EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_resources);
Yinghai Lu9b030882012-01-21 02:08:23 -08001490
1491#ifdef CONFIG_HOTPLUG
1492/**
1493 * pci_rescan_bus - scan a PCI bus for devices.
1494 * @bus: PCI bus to scan
1495 *
1496 * Scan a PCI bus and child buses for new devices, adds them,
1497 * and enables them.
1498 *
1499 * Returns the max number of subordinate bus discovered.
1500 */
1501unsigned int __ref pci_rescan_bus(struct pci_bus *bus)
1502{
1503 unsigned int max;
1504 struct pci_dev *dev;
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001505 LIST_HEAD(add_list); /* list of resources that
Yinghai Lu9b030882012-01-21 02:08:23 -08001506 want additional resources */
1507
1508 max = pci_scan_child_bus(bus);
1509
Yinghai Lu9b030882012-01-21 02:08:23 -08001510 down_read(&pci_bus_sem);
1511 list_for_each_entry(dev, &bus->devices, bus_list)
1512 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
1513 dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
1514 if (dev->subordinate)
1515 __pci_bus_size_bridges(dev->subordinate,
1516 &add_list);
1517 up_read(&pci_bus_sem);
1518 __pci_bus_assign_resources(bus, &add_list, NULL);
Yinghai Lubdc4abe2012-01-21 02:08:27 -08001519 BUG_ON(!list_empty(&add_list));
Yinghai Lu9b030882012-01-21 02:08:23 -08001520
1521 pci_enable_bridges(bus);
1522 pci_bus_add_devices(bus);
1523
1524 return max;
1525}
1526EXPORT_SYMBOL_GPL(pci_rescan_bus);
1527#endif