Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2007 David Airlie |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * David Airlie |
| 25 | */ |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 26 | #include <linux/module.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 27 | #include <linux/slab.h> |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 28 | #include <linux/fb.h> |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 29 | |
| 30 | #include "drmP.h" |
| 31 | #include "drm.h" |
| 32 | #include "drm_crtc.h" |
| 33 | #include "drm_crtc_helper.h" |
| 34 | #include "radeon_drm.h" |
| 35 | #include "radeon.h" |
| 36 | |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 37 | #include "drm_fb_helper.h" |
| 38 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 39 | #include <linux/vga_switcheroo.h> |
| 40 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 41 | /* object hierarchy - |
| 42 | this contains a helper + a radeon fb |
| 43 | the helper contains a pointer to radeon framebuffer baseclass. |
| 44 | */ |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 45 | struct radeon_fbdev { |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 46 | struct drm_fb_helper helper; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 47 | struct radeon_framebuffer rfb; |
| 48 | struct list_head fbdev_list; |
| 49 | struct radeon_device *rdev; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 50 | }; |
| 51 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 52 | static struct fb_ops radeonfb_ops = { |
| 53 | .owner = THIS_MODULE, |
Michel Dänzer | c88f9f0 | 2009-09-15 17:09:30 +0200 | [diff] [blame] | 54 | .fb_check_var = drm_fb_helper_check_var, |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 55 | .fb_set_par = drm_fb_helper_set_par, |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 56 | .fb_fillrect = cfb_fillrect, |
| 57 | .fb_copyarea = cfb_copyarea, |
| 58 | .fb_imageblit = cfb_imageblit, |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 59 | .fb_pan_display = drm_fb_helper_pan_display, |
| 60 | .fb_blank = drm_fb_helper_blank, |
Dave Airlie | 068143d | 2009-10-05 09:58:02 +1000 | [diff] [blame] | 61 | .fb_setcmap = drm_fb_helper_setcmap, |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 62 | }; |
| 63 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 64 | |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 65 | static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 66 | { |
| 67 | int aligned = width; |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 68 | int align_large = (ASIC_IS_AVIVO(rdev)) || tiled; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 69 | int pitch_mask = 0; |
| 70 | |
| 71 | switch (bpp / 8) { |
| 72 | case 1: |
| 73 | pitch_mask = align_large ? 255 : 127; |
| 74 | break; |
| 75 | case 2: |
| 76 | pitch_mask = align_large ? 127 : 31; |
| 77 | break; |
| 78 | case 3: |
| 79 | case 4: |
| 80 | pitch_mask = align_large ? 63 : 15; |
| 81 | break; |
| 82 | } |
| 83 | |
| 84 | aligned += pitch_mask; |
| 85 | aligned &= ~pitch_mask; |
| 86 | return aligned; |
| 87 | } |
| 88 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 89 | static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 90 | { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 91 | struct radeon_bo *rbo = gobj->driver_private; |
| 92 | int ret; |
| 93 | |
| 94 | ret = radeon_bo_reserve(rbo, false); |
| 95 | if (likely(ret == 0)) { |
| 96 | radeon_bo_kunmap(rbo); |
| 97 | radeon_bo_unreserve(rbo); |
| 98 | } |
| 99 | drm_gem_object_unreference_unlocked(gobj); |
| 100 | } |
| 101 | |
| 102 | static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, |
| 103 | struct drm_mode_fb_cmd *mode_cmd, |
| 104 | struct drm_gem_object **gobj_p) |
| 105 | { |
| 106 | struct radeon_device *rdev = rfbdev->rdev; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 107 | struct drm_gem_object *gobj = NULL; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 108 | struct radeon_bo *rbo = NULL; |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 109 | bool fb_tiled = false; /* useful for testing */ |
Michel Dänzer | c88f9f0 | 2009-09-15 17:09:30 +0200 | [diff] [blame] | 110 | u32 tiling_flags = 0; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 111 | int ret; |
| 112 | int aligned_size, size; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 113 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 114 | /* need to align pitch with crtc limits */ |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 115 | mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 116 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 117 | size = mode_cmd->pitch * mode_cmd->height; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 118 | aligned_size = ALIGN(size, PAGE_SIZE); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 119 | ret = radeon_gem_object_create(rdev, aligned_size, 0, |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 120 | RADEON_GEM_DOMAIN_VRAM, |
| 121 | false, ttm_bo_type_kernel, |
| 122 | &gobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 123 | if (ret) { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 124 | printk(KERN_ERR "failed to allocate framebuffer (%d)\n", |
| 125 | aligned_size); |
| 126 | return -ENOMEM; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 127 | } |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 128 | rbo = gobj->driver_private; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 129 | |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 130 | if (fb_tiled) |
Michel Dänzer | c88f9f0 | 2009-09-15 17:09:30 +0200 | [diff] [blame] | 131 | tiling_flags = RADEON_TILING_MACRO; |
| 132 | |
| 133 | #ifdef __BIG_ENDIAN |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 134 | switch (mode_cmd->bpp) { |
Michel Dänzer | c88f9f0 | 2009-09-15 17:09:30 +0200 | [diff] [blame] | 135 | case 32: |
| 136 | tiling_flags |= RADEON_TILING_SWAP_32BIT; |
| 137 | break; |
| 138 | case 16: |
| 139 | tiling_flags |= RADEON_TILING_SWAP_16BIT; |
| 140 | default: |
| 141 | break; |
| 142 | } |
| 143 | #endif |
| 144 | |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 145 | if (tiling_flags) { |
| 146 | ret = radeon_bo_set_tiling_flags(rbo, |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 147 | tiling_flags | RADEON_TILING_SURFACE, |
| 148 | mode_cmd->pitch); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 149 | if (ret) |
| 150 | dev_err(rdev->dev, "FB failed to set tiling flags\n"); |
| 151 | } |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 152 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 153 | |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 154 | ret = radeon_bo_reserve(rbo, false); |
| 155 | if (unlikely(ret != 0)) |
| 156 | goto out_unref; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 157 | ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, NULL); |
Jerome Glisse | f92e93e | 2009-06-22 18:15:58 +0200 | [diff] [blame] | 158 | if (ret) { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 159 | radeon_bo_unreserve(rbo); |
| 160 | goto out_unref; |
| 161 | } |
| 162 | if (fb_tiled) |
| 163 | radeon_bo_check_tiling(rbo, 0, 0); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 164 | ret = radeon_bo_kmap(rbo, NULL); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 165 | radeon_bo_unreserve(rbo); |
| 166 | if (ret) { |
Jerome Glisse | f92e93e | 2009-06-22 18:15:58 +0200 | [diff] [blame] | 167 | goto out_unref; |
| 168 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 169 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 170 | *gobj_p = gobj; |
| 171 | return 0; |
| 172 | out_unref: |
| 173 | radeonfb_destroy_pinned_object(gobj); |
| 174 | *gobj_p = NULL; |
| 175 | return ret; |
| 176 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 177 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 178 | static int radeonfb_create(struct radeon_fbdev *rfbdev, |
| 179 | struct drm_fb_helper_surface_size *sizes) |
| 180 | { |
| 181 | struct radeon_device *rdev = rfbdev->rdev; |
| 182 | struct fb_info *info; |
| 183 | struct drm_framebuffer *fb = NULL; |
| 184 | struct drm_mode_fb_cmd mode_cmd; |
| 185 | struct drm_gem_object *gobj = NULL; |
| 186 | struct radeon_bo *rbo = NULL; |
| 187 | struct device *device = &rdev->pdev->dev; |
| 188 | int ret; |
| 189 | unsigned long tmp; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 190 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 191 | mode_cmd.width = sizes->surface_width; |
| 192 | mode_cmd.height = sizes->surface_height; |
| 193 | |
| 194 | /* avivo can't scanout real 24bpp */ |
| 195 | if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) |
| 196 | sizes->surface_bpp = 32; |
| 197 | |
| 198 | mode_cmd.bpp = sizes->surface_bpp; |
| 199 | mode_cmd.depth = sizes->surface_depth; |
| 200 | |
| 201 | ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj); |
| 202 | rbo = gobj->driver_private; |
| 203 | |
| 204 | /* okay we have an object now allocate the framebuffer */ |
| 205 | info = framebuffer_alloc(0, device); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 206 | if (info == NULL) { |
| 207 | ret = -ENOMEM; |
| 208 | goto out_unref; |
| 209 | } |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 210 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 211 | info->par = rfbdev; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 212 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 213 | radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj); |
| 214 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 215 | fb = &rfbdev->rfb.base; |
| 216 | |
| 217 | /* setup helper */ |
| 218 | rfbdev->helper.fb = fb; |
| 219 | rfbdev->helper.fbdev = info; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 220 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 221 | memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo)); |
Dave Airlie | bf8e828 | 2009-08-17 10:20:47 +1000 | [diff] [blame] | 222 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 223 | strcpy(info->fix.id, "radeondrmfb"); |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 224 | |
Dave Airlie | 068143d | 2009-10-05 09:58:02 +1000 | [diff] [blame] | 225 | drm_fb_helper_fill_fix(info, fb->pitch, fb->depth); |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 226 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 227 | info->flags = FBINFO_DEFAULT; |
| 228 | info->fbops = &radeonfb_ops; |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 229 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 230 | tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; |
Jerome Glisse | f92e93e | 2009-06-22 18:15:58 +0200 | [diff] [blame] | 231 | info->fix.smem_start = rdev->mc.aper_base + tmp; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 232 | info->fix.smem_len = radeon_bo_size(rbo); |
| 233 | info->screen_base = rbo->kptr; |
| 234 | info->screen_size = radeon_bo_size(rbo); |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 235 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 236 | drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); |
Dave Airlie | ed8f0d9 | 2009-07-29 17:07:38 +1000 | [diff] [blame] | 237 | |
| 238 | /* setup aperture base/size for vesafb takeover */ |
Marcin Slusarz | 1471ca9 | 2010-05-16 17:27:03 +0200 | [diff] [blame] | 239 | info->apertures = alloc_apertures(1); |
| 240 | if (!info->apertures) { |
| 241 | ret = -ENOMEM; |
| 242 | goto out_unref; |
| 243 | } |
| 244 | info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base; |
| 245 | info->apertures->ranges[0].size = rdev->mc.real_vram_size; |
Dave Airlie | ed8f0d9 | 2009-07-29 17:07:38 +1000 | [diff] [blame] | 246 | |
Michel Dänzer | 696d4df | 2009-06-23 16:12:53 +0200 | [diff] [blame] | 247 | info->fix.mmio_start = 0; |
| 248 | info->fix.mmio_len = 0; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 249 | info->pixmap.size = 64*1024; |
| 250 | info->pixmap.buf_align = 8; |
| 251 | info->pixmap.access_align = 32; |
| 252 | info->pixmap.flags = FB_PIXMAP_SYSTEM; |
| 253 | info->pixmap.scan_align = 1; |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 254 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 255 | if (info->screen_base == NULL) { |
| 256 | ret = -ENOSPC; |
| 257 | goto out_unref; |
| 258 | } |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 259 | |
| 260 | ret = fb_alloc_cmap(&info->cmap, 256, 0); |
| 261 | if (ret) { |
| 262 | ret = -ENOMEM; |
| 263 | goto out_unref; |
| 264 | } |
| 265 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 266 | DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); |
| 267 | DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 268 | DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo)); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 269 | DRM_INFO("fb depth is %d\n", fb->depth); |
| 270 | DRM_INFO(" pitch is %d\n", fb->pitch); |
| 271 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 272 | vga_switcheroo_client_fb_set(rdev->ddev->pdev, info); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 273 | return 0; |
| 274 | |
| 275 | out_unref: |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 276 | if (rbo) { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 277 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 278 | } |
Jerome Glisse | f92e93e | 2009-06-22 18:15:58 +0200 | [diff] [blame] | 279 | if (fb && ret) { |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 280 | drm_gem_object_unreference(gobj); |
| 281 | drm_framebuffer_cleanup(fb); |
| 282 | kfree(fb); |
| 283 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 284 | return ret; |
| 285 | } |
| 286 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 287 | static int radeon_fb_find_or_create_single(struct drm_fb_helper *helper, |
| 288 | struct drm_fb_helper_surface_size *sizes) |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 289 | { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 290 | struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 291 | int new_fb = 0; |
| 292 | int ret; |
| 293 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 294 | if (!helper->fb) { |
| 295 | ret = radeonfb_create(rfbdev, sizes); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 296 | if (ret) |
| 297 | return ret; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 298 | new_fb = 1; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 299 | } |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 300 | return new_fb; |
| 301 | } |
| 302 | |
Dave Airlie | d50ba25 | 2009-09-23 14:44:08 +1000 | [diff] [blame] | 303 | static char *mode_option; |
| 304 | int radeon_parse_options(char *options) |
| 305 | { |
| 306 | char *this_opt; |
| 307 | |
| 308 | if (!options || !*options) |
| 309 | return 0; |
| 310 | |
| 311 | while ((this_opt = strsep(&options, ",")) != NULL) { |
| 312 | if (!*this_opt) |
| 313 | continue; |
| 314 | mode_option = this_opt; |
| 315 | } |
| 316 | return 0; |
| 317 | } |
| 318 | |
Dave Airlie | 5c4426a | 2010-03-30 05:34:17 +0000 | [diff] [blame] | 319 | void radeonfb_hotplug(struct drm_device *dev, bool polled) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 320 | { |
Dave Airlie | 4738115 | 2009-11-18 13:39:34 +1000 | [diff] [blame] | 321 | struct radeon_device *rdev = dev->dev_private; |
Dave Airlie | 4738115 | 2009-11-18 13:39:34 +1000 | [diff] [blame] | 322 | |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 323 | drm_helper_fb_hpd_irq_event(&rdev->mode_info.rfbdev->helper); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 324 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 325 | |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 326 | static void radeon_fb_output_status_changed(struct drm_fb_helper *fb_helper) |
Dave Airlie | 5c4426a | 2010-03-30 05:34:17 +0000 | [diff] [blame] | 327 | { |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 328 | drm_helper_fb_hotplug_event(fb_helper, true); |
Dave Airlie | 5c4426a | 2010-03-30 05:34:17 +0000 | [diff] [blame] | 329 | } |
| 330 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 331 | static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 332 | { |
| 333 | struct fb_info *info; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 334 | struct radeon_framebuffer *rfb = &rfbdev->rfb; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 335 | struct radeon_bo *rbo; |
| 336 | int r; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 337 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 338 | if (rfbdev->helper.fbdev) { |
| 339 | info = rfbdev->helper.fbdev; |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 340 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 341 | unregister_framebuffer(info); |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 342 | if (info->cmap.len) |
| 343 | fb_dealloc_cmap(&info->cmap); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 344 | framebuffer_release(info); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 345 | } |
| 346 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 347 | if (rfb->obj) { |
| 348 | rbo = rfb->obj->driver_private; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 349 | r = radeon_bo_reserve(rbo, false); |
| 350 | if (likely(r == 0)) { |
| 351 | radeon_bo_kunmap(rbo); |
| 352 | radeon_bo_unpin(rbo); |
| 353 | radeon_bo_unreserve(rbo); |
| 354 | } |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 355 | drm_gem_object_unreference_unlocked(rfb->obj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 356 | } |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 357 | drm_fb_helper_fini(&rfbdev->helper); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 358 | drm_framebuffer_cleanup(&rfb->base); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 359 | |
| 360 | return 0; |
| 361 | } |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 362 | |
| 363 | static struct drm_fb_helper_funcs radeon_fb_helper_funcs = { |
| 364 | .gamma_set = radeon_crtc_fb_gamma_set, |
| 365 | .gamma_get = radeon_crtc_fb_gamma_get, |
| 366 | .fb_probe = radeon_fb_find_or_create_single, |
| 367 | .fb_output_status_changed = radeon_fb_output_status_changed, |
| 368 | }; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 369 | |
| 370 | int radeon_fbdev_init(struct radeon_device *rdev) |
| 371 | { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 372 | struct radeon_fbdev *rfbdev; |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 373 | int bpp_sel = 32; |
| 374 | |
| 375 | /* select 8 bpp console on RN50 or 16MB cards */ |
| 376 | if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024)) |
| 377 | bpp_sel = 8; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 378 | |
| 379 | rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL); |
| 380 | if (!rfbdev) |
| 381 | return -ENOMEM; |
| 382 | |
| 383 | rfbdev->rdev = rdev; |
| 384 | rdev->mode_info.rfbdev = rfbdev; |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 385 | rfbdev->helper.funcs = &radeon_fb_helper_funcs; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 386 | |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 387 | drm_fb_helper_init(rdev->ddev, &rfbdev->helper, |
| 388 | rdev->num_crtc, |
| 389 | RADEONFB_CONN_LIMIT, true); |
Dave Airlie | 0b4c0f3 | 2010-03-30 05:34:15 +0000 | [diff] [blame] | 390 | drm_fb_helper_single_add_all_connectors(&rfbdev->helper); |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 391 | drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 392 | return 0; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 393 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 394 | } |
| 395 | |
| 396 | void radeon_fbdev_fini(struct radeon_device *rdev) |
| 397 | { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 398 | if (!rdev->mode_info.rfbdev) |
| 399 | return; |
| 400 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 401 | radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 402 | kfree(rdev->mode_info.rfbdev); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 403 | rdev->mode_info.rfbdev = NULL; |
| 404 | } |
| 405 | |
| 406 | void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state) |
| 407 | { |
| 408 | fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state); |
| 409 | } |
| 410 | |
| 411 | int radeon_fbdev_total_size(struct radeon_device *rdev) |
| 412 | { |
| 413 | struct radeon_bo *robj; |
| 414 | int size = 0; |
| 415 | |
| 416 | robj = rdev->mode_info.rfbdev->rfb.obj->driver_private; |
| 417 | size += radeon_bo_size(robj); |
| 418 | return size; |
| 419 | } |
| 420 | |
| 421 | bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj) |
| 422 | { |
| 423 | if (robj == rdev->mode_info.rfbdev->rfb.obj->driver_private) |
| 424 | return true; |
| 425 | return false; |
| 426 | } |