blob: 74943d685170ef7efe8d8945157a94fd6b66d8eb [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000, 2001, 04 Keith M Wesolowski
7 */
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/interrupt.h>
11#include <linux/pci.h>
12#include <linux/types.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070013#include <linux/delay.h>
14#include <asm/bootinfo.h>
15
16extern struct pci_ops nile4_pci_ops;
17extern struct pci_ops gt64120_pci_ops;
18static struct resource lasat_pci_mem_resource = {
19 .name = "LASAT PCI MEM",
20 .start = 0x18000000,
21 .end = 0x19FFFFFF,
22 .flags = IORESOURCE_MEM,
23};
24
25static struct resource lasat_pci_io_resource = {
26 .name = "LASAT PCI IO",
27 .start = 0x1a000000,
28 .end = 0x1bFFFFFF,
29 .flags = IORESOURCE_IO,
30};
31
32static struct pci_controller lasat_pci_controller = {
33 .mem_resource = &lasat_pci_mem_resource,
34 .io_resource = &lasat_pci_io_resource,
35};
36
37static int __init lasat_pci_setup(void)
38{
39 printk("PCI: starting\n");
40
41 switch (mips_machtype) {
42 case MACH_LASAT_100:
43 lasat_pci_controller.pci_ops = &gt64120_pci_ops;
44 break;
45 case MACH_LASAT_200:
46 lasat_pci_controller.pci_ops = &nile4_pci_ops;
47 break;
48 default:
49 panic("pcibios_init: mips_machtype incorrect");
50 }
51
52 register_pci_controller(&lasat_pci_controller);
Ralf Baechlec83cfc92005-06-21 13:56:30 +000053
54 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070055}
Ralf Baechlec83cfc92005-06-21 13:56:30 +000056
57arch_initcall(lasat_pci_setup);
Linus Torvalds1da177e2005-04-16 15:20:36 -070058
59#define LASATINT_ETH1 0
60#define LASATINT_ETH0 1
61#define LASATINT_HDC 2
62#define LASATINT_COMP 3
63#define LASATINT_HDLC 4
64#define LASATINT_PCIA 5
65#define LASATINT_PCIB 6
66#define LASATINT_PCIC 7
67#define LASATINT_PCID 8
68
69int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
70{
71 switch (slot) {
72 case 1:
73 return LASATINT_PCIA; /* Expansion Module 0 */
74 case 2:
75 return LASATINT_PCIB; /* Expansion Module 1 */
76 case 3:
77 return LASATINT_PCIC; /* Expansion Module 2 */
78 case 4:
79 return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
80 case 5:
81 return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
82 case 6:
83 return LASATINT_HDC; /* IDE controller */
84 default:
85 return 0xff; /* Illegal */
86 }
87
88 return -1;
89}
90
91/* Do platform specific device initialization at pci_enable_device() time */
92int pcibios_plat_dev_init(struct pci_dev *dev)
93{
94 return 0;
95}