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Sandeep Patil1d4bab02008-10-21 14:06:30 +01001/* linux/drivers/serial/s3c24a0.c
2 *
3 * Driver for Samsung S3C24A0 SoC onboard UARTs.
4 *
5 * Based on drivers/serial/s3c2410.c
6 *
7 * Author: Sandeep Patil <sandeep.patil@azingo.com>
8 *
9 * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics
10 * http://armlinux.simtec.co.uk/
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15*/
16
17#include <linux/module.h>
18#include <linux/ioport.h>
19#include <linux/platform_device.h>
20#include <linux/init.h>
21#include <linux/serial_core.h>
22#include <linux/serial.h>
23#include <linux/io.h>
24#include <linux/irq.h>
25
26#include <mach/hardware.h>
27
28#include <plat/regs-serial.h>
29#include <mach/regs-gpio.h>
30
31#include "samsung.h"
32
33static int s3c24a0_serial_setsource(struct uart_port *port,
34 struct s3c24xx_uart_clksrc *clk)
35{
36 unsigned long ucon = rd_regl(port, S3C2410_UCON);
37
38 if (strcmp(clk->name, "uclk") == 0)
39 ucon |= S3C2410_UCON_UCLK;
40 else
41 ucon &= ~S3C2410_UCON_UCLK;
42
43 wr_regl(port, S3C2410_UCON, ucon);
44 return 0;
45}
46
47static int s3c24a0_serial_getsource(struct uart_port *port,
48 struct s3c24xx_uart_clksrc *clk)
49{
50 unsigned long ucon = rd_regl(port, S3C2410_UCON);
51
52 clk->divisor = 1;
53 clk->name = (ucon & S3C2410_UCON_UCLK) ? "uclk" : "pclk";
54
55 return 0;
56}
57
58static int s3c24a0_serial_resetport(struct uart_port *port,
59 struct s3c2410_uartcfg *cfg)
60{
61 dbg("s3c24a0_serial_resetport: port=%p (%08lx), cfg=%p\n",
62 port, port->mapbase, cfg);
63
64 wr_regl(port, S3C2410_UCON, cfg->ucon);
65 wr_regl(port, S3C2410_ULCON, cfg->ulcon);
66
67 /* reset both fifos */
68
69 wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
70 wr_regl(port, S3C2410_UFCON, cfg->ufcon);
71
72 return 0;
73}
74
75static struct s3c24xx_uart_info s3c24a0_uart_inf = {
76 .name = "Samsung S3C24A0 UART",
77 .type = PORT_S3C2410,
78 .fifosize = 16,
79 .rx_fifomask = S3C24A0_UFSTAT_RXMASK,
80 .rx_fifoshift = S3C24A0_UFSTAT_RXSHIFT,
81 .rx_fifofull = S3C24A0_UFSTAT_RXFULL,
82 .tx_fifofull = S3C24A0_UFSTAT_TXFULL,
83 .tx_fifomask = S3C24A0_UFSTAT_TXMASK,
84 .tx_fifoshift = S3C24A0_UFSTAT_TXSHIFT,
85 .get_clksrc = s3c24a0_serial_getsource,
86 .set_clksrc = s3c24a0_serial_setsource,
87 .reset_port = s3c24a0_serial_resetport,
88};
89
90static int s3c24a0_serial_probe(struct platform_device *dev)
91{
92 return s3c24xx_serial_probe(dev, &s3c24a0_uart_inf);
93}
94
Ramax Lo8fe70a52009-07-09 16:28:33 +080095static struct platform_driver s3c24a0_serial_driver = {
Sandeep Patil1d4bab02008-10-21 14:06:30 +010096 .probe = s3c24a0_serial_probe,
Peter Korsgaard90ceb962009-06-22 18:42:49 +010097 .remove = __devexit_p(s3c24xx_serial_remove),
Sandeep Patil1d4bab02008-10-21 14:06:30 +010098 .driver = {
99 .name = "s3c24a0-uart",
100 .owner = THIS_MODULE,
101 },
102};
103
Ramax Lo8fe70a52009-07-09 16:28:33 +0800104s3c24xx_console_init(&s3c24a0_serial_driver, &s3c24a0_uart_inf);
Sandeep Patil1d4bab02008-10-21 14:06:30 +0100105
106static int __init s3c24a0_serial_init(void)
107{
Ramax Lo8fe70a52009-07-09 16:28:33 +0800108 return s3c24xx_serial_init(&s3c24a0_serial_driver, &s3c24a0_uart_inf);
Sandeep Patil1d4bab02008-10-21 14:06:30 +0100109}
110
111static void __exit s3c24a0_serial_exit(void)
112{
Ramax Lo8fe70a52009-07-09 16:28:33 +0800113 platform_driver_unregister(&s3c24a0_serial_driver);
Sandeep Patil1d4bab02008-10-21 14:06:30 +0100114}
115
116module_init(s3c24a0_serial_init);
117module_exit(s3c24a0_serial_exit);
118