Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * BRIEF MODULE DESCRIPTION |
| 4 | * Alchemy Pb1200/Db1200 board setup. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | * |
| 11 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 12 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 13 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 14 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 15 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 16 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 17 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 18 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 19 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 20 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License along |
| 23 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 24 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 25 | */ |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 26 | #include <linux/init.h> |
| 27 | #include <linux/sched.h> |
| 28 | #include <linux/ioport.h> |
| 29 | #include <linux/mm.h> |
| 30 | #include <linux/console.h> |
| 31 | #include <linux/mc146818rtc.h> |
| 32 | #include <linux/delay.h> |
| 33 | |
| 34 | #if defined(CONFIG_BLK_DEV_IDE_AU1XXX) |
| 35 | #include <linux/ide.h> |
| 36 | #endif |
| 37 | |
| 38 | #include <asm/cpu.h> |
| 39 | #include <asm/bootinfo.h> |
| 40 | #include <asm/irq.h> |
| 41 | #include <asm/mipsregs.h> |
| 42 | #include <asm/reboot.h> |
| 43 | #include <asm/pgtable.h> |
Yoichi Yuasa | 25b31cb | 2007-10-15 19:11:24 +0900 | [diff] [blame] | 44 | |
| 45 | #include <au1000.h> |
| 46 | #include <au1xxx_dbdma.h> |
| 47 | #include <prom.h> |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 48 | |
| 49 | #ifdef CONFIG_MIPS_PB1200 |
| 50 | #include <asm/mach-pb1x00/pb1200.h> |
| 51 | #endif |
| 52 | |
| 53 | #ifdef CONFIG_MIPS_DB1200 |
| 54 | #include <asm/mach-db1x00/db1200.h> |
| 55 | #define PB1200_ETH_INT DB1200_ETH_INT |
| 56 | #define PB1200_IDE_INT DB1200_IDE_INT |
| 57 | #endif |
| 58 | |
| 59 | extern void _board_init_irq(void); |
Yoichi Yuasa | 0d02f07 | 2006-11-01 18:40:15 +0900 | [diff] [blame] | 60 | extern void (*board_init_irq)(void); |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 61 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 62 | void board_reset(void) |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 63 | { |
| 64 | bcsr->resets = 0; |
Pete Popov | 64abf64 | 2005-09-14 16:17:59 +0000 | [diff] [blame] | 65 | bcsr->system = 0; |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 66 | } |
| 67 | |
| 68 | void __init board_setup(void) |
| 69 | { |
| 70 | char *argptr = NULL; |
| 71 | u32 pin_func; |
| 72 | |
| 73 | #if 0 |
| 74 | /* Enable PSC1 SYNC for AC97. Normaly done in audio driver, |
| 75 | * but it is board specific code, so put it here. |
| 76 | */ |
| 77 | pin_func = au_readl(SYS_PINFUNC); |
| 78 | au_sync(); |
| 79 | pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1; |
| 80 | au_writel(pin_func, SYS_PINFUNC); |
| 81 | |
| 82 | au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */ |
| 83 | au_sync(); |
| 84 | #endif |
| 85 | |
Pete Popov | 64abf64 | 2005-09-14 16:17:59 +0000 | [diff] [blame] | 86 | #if defined(CONFIG_I2C_AU1550) |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 87 | { |
| 88 | u32 freq0, clksrc; |
| 89 | |
| 90 | /* Select SMBUS in CPLD */ |
| 91 | bcsr->resets &= ~(BCSR_RESETS_PCS0MUX); |
| 92 | |
| 93 | pin_func = au_readl(SYS_PINFUNC); |
| 94 | au_sync(); |
| 95 | pin_func &= ~(3<<17 | 1<<4); |
| 96 | /* Set GPIOs correctly */ |
| 97 | pin_func |= 2<<17; |
| 98 | au_writel(pin_func, SYS_PINFUNC); |
| 99 | au_sync(); |
| 100 | |
| 101 | /* The i2c driver depends on 50Mhz clock */ |
| 102 | freq0 = au_readl(SYS_FREQCTRL0); |
| 103 | au_sync(); |
| 104 | freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1); |
| 105 | freq0 |= (3<<SYS_FC_FRDIV1_BIT); |
| 106 | /* 396Mhz / (3+1)*2 == 49.5Mhz */ |
| 107 | au_writel(freq0, SYS_FREQCTRL0); |
| 108 | au_sync(); |
| 109 | freq0 |= SYS_FC_FE1; |
| 110 | au_writel(freq0, SYS_FREQCTRL0); |
| 111 | au_sync(); |
| 112 | |
| 113 | clksrc = au_readl(SYS_CLKSRC); |
| 114 | au_sync(); |
| 115 | clksrc &= ~0x01f00000; |
| 116 | /* bit 22 is EXTCLK0 for PSC0 */ |
| 117 | clksrc |= (0x3 << 22); |
| 118 | au_writel(clksrc, SYS_CLKSRC); |
| 119 | au_sync(); |
| 120 | } |
| 121 | #endif |
| 122 | |
| 123 | #ifdef CONFIG_FB_AU1200 |
| 124 | argptr = prom_getcmdline(); |
| 125 | #ifdef CONFIG_MIPS_PB1200 |
Pete Popov | 64abf64 | 2005-09-14 16:17:59 +0000 | [diff] [blame] | 126 | strcat(argptr, " video=au1200fb:panel:bs"); |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 127 | #endif |
| 128 | #ifdef CONFIG_MIPS_DB1200 |
Pete Popov | 64abf64 | 2005-09-14 16:17:59 +0000 | [diff] [blame] | 129 | strcat(argptr, " video=au1200fb:panel:bs"); |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 130 | #endif |
| 131 | #endif |
| 132 | |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 133 | /* The Pb1200 development board uses external MUX for PSC0 to |
| 134 | support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI |
| 135 | */ |
Ralf Baechle | 6fec2e1 | 2007-07-13 06:33:09 +0100 | [diff] [blame] | 136 | #ifdef CONFIG_I2C_AU1550 |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 137 | bcsr->resets &= (~BCSR_RESETS_PCS0MUX); |
| 138 | #endif |
| 139 | au_sync(); |
| 140 | |
| 141 | #ifdef CONFIG_MIPS_PB1200 |
| 142 | printk("AMD Alchemy Pb1200 Board\n"); |
| 143 | #endif |
| 144 | #ifdef CONFIG_MIPS_DB1200 |
| 145 | printk("AMD Alchemy Db1200 Board\n"); |
| 146 | #endif |
Pete Popov | ebc7f12 | 2005-03-04 08:31:06 +0000 | [diff] [blame] | 147 | |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 148 | /* Setup Pb1200 External Interrupt Controller */ |
Yoichi Yuasa | 0d02f07 | 2006-11-01 18:40:15 +0900 | [diff] [blame] | 149 | board_init_irq = _board_init_irq; |
Pete Popov | e3ad1c2 | 2005-03-01 06:33:16 +0000 | [diff] [blame] | 150 | } |
Pete Popov | 64abf64 | 2005-09-14 16:17:59 +0000 | [diff] [blame] | 151 | |
| 152 | int |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 153 | board_au1200fb_panel(void) |
Pete Popov | 64abf64 | 2005-09-14 16:17:59 +0000 | [diff] [blame] | 154 | { |
| 155 | BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; |
| 156 | int p; |
| 157 | |
| 158 | p = bcsr->switches; |
| 159 | p >>= 8; |
| 160 | p &= 0x0F; |
| 161 | return p; |
| 162 | } |
| 163 | |
| 164 | int |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 165 | board_au1200fb_panel_init(void) |
Pete Popov | 64abf64 | 2005-09-14 16:17:59 +0000 | [diff] [blame] | 166 | { |
| 167 | /* Apply power */ |
| 168 | BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; |
| 169 | bcsr->board |= (BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); |
| 170 | /*printk("board_au1200fb_panel_init()\n"); */ |
| 171 | return 0; |
| 172 | } |
| 173 | |
| 174 | int |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 175 | board_au1200fb_panel_shutdown(void) |
Pete Popov | 64abf64 | 2005-09-14 16:17:59 +0000 | [diff] [blame] | 176 | { |
| 177 | /* Remove power */ |
| 178 | BCSR *bcsr = (BCSR *)BCSR_KSEG1_ADDR; |
| 179 | bcsr->board &= ~(BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD | BCSR_BOARD_LCDBL); |
| 180 | /*printk("board_au1200fb_panel_shutdown()\n"); */ |
| 181 | return 0; |
| 182 | } |
| 183 | |