Quick compiler: Single .so for all targets
With this CL, all targets can be built into a single .so (but
we're not yet doing so - the compiler driver needs to be reworked).
A new Codgen class is introduced (see compiler/codegen/codegen.h),
along with target-specific sub-classes ArmCodegen, MipsCodegens and
X86Codegen (see compiler/codegen/*/codegen_[Arm|Mips|X86].h).
Additional minor code, comment and format refactoring. Some source
files combined, temporary header files deleted and a few file
renames to better identify their function.
Next up is combining the Quick and Portable .so files.
Note: building all targets into libdvm-compiler.so increases its
size by 140K bytes. I'm inclined to not bother introducing conditional
compilation to limit code to the specific target - the added build and
testing complexity doesn't doesn't seem worth such a modest size savings.
Change-Id: Id9c5b4502ad6b77cdb31f71d3126f51a4f2e9dfe
diff --git a/src/compiler/compiler_enums.h b/src/compiler/compiler_enums.h
index 65c34d2..6d8b27e 100644
--- a/src/compiler/compiler_enums.h
+++ b/src/compiler/compiler_enums.h
@@ -28,8 +28,8 @@
};
enum SpecialTargetRegister {
- kSelf, // Thread
- kSuspend, // Used to reduce suspend checks
+ kSelf, // Thread pointer.
+ kSuspend, // Used to reduce suspend checks for some targets.
kLr,
kPc,
kSp,
@@ -70,15 +70,15 @@
enum ResourceEncodingPos {
kMustNotAlias = 63,
- kHeapRef = 62, // Default memory reference type
- kLiteral = 61, // Literal pool memory reference
- kDalvikReg = 60, // Dalvik v_reg memory reference
+ kHeapRef = 62, // Default memory reference type.
+ kLiteral = 61, // Literal pool memory reference.
+ kDalvikReg = 60, // Dalvik v_reg memory reference.
kFPStatus = 59,
kCCode = 58,
kLowestCommonResource = kCCode
};
-/* Shared pseudo opcodes - must be < 0 */
+// Shared pseudo opcodes - must be < 0.
enum LIRPseudoOpcode {
kPseudoExportedPC = -18,
kPseudoSafepointPC = -17,
@@ -122,15 +122,15 @@
kMIRNullCheckOnly,
kMIRIgnoreRangeCheck,
kMIRRangeCheckOnly,
- kMIRInlined, // Invoke is inlined (ie dead)
- kMIRInlinedPred, // Invoke is inlined via prediction
- kMIRCallee, // Instruction is inlined from callee
+ kMIRInlined, // Invoke is inlined (ie dead).
+ kMIRInlinedPred, // Invoke is inlined via prediction.
+ kMIRCallee, // Instruction is inlined from callee.
kMIRIgnoreSuspendCheck,
kMIRDup,
- kMIRMark, // Temporary node mark
+ kMIRMark, // Temporary node mark.
};
-/* For successor_block_list */
+// For successor_block_list.
enum BlockListType {
kNotUsed = 0,
kCatch,
@@ -328,17 +328,17 @@
/* Customized node traversal orders for different needs */
enum DataFlowAnalysisMode {
- kAllNodes = 0, // All nodes
- kReachableNodes, // All reachable nodes
- kPreOrderDFSTraversal, // Depth-First-Search / Pre-Order
- kPostOrderDFSTraversal, // Depth-First-Search / Post-Order
- kPostOrderDOMTraversal, // Dominator tree / Post-Order
- kReversePostOrderTraversal, // Depth-First-Search / reverse Post-Order
+ kAllNodes = 0, // All nodes.
+ kReachableNodes, // All reachable nodes.
+ kPreOrderDFSTraversal, // Depth-First-Search / Pre-Order.
+ kPostOrderDFSTraversal, // Depth-First-Search / Post-Order.
+ kPostOrderDOMTraversal, // Dominator tree / Post-Order.
+ kReversePostOrderTraversal, // Depth-First-Search / reverse Post-Order.
};
std::ostream& operator<<(std::ostream& os, const DataFlowAnalysisMode& mode);
-// Memory barrier types (see "The JSR-133 Cookbook for Compiler Writers")
+// Memory barrier types (see "The JSR-133 Cookbook for Compiler Writers").
enum MemBarrierKind {
kLoadStore,
kLoadLoad,
@@ -348,6 +348,51 @@
std::ostream& operator<<(std::ostream& os, const MemBarrierKind& kind);
+enum OpFeatureFlags {
+ kIsBranch = 0,
+ kNoOperand,
+ kIsUnaryOp,
+ kIsBinaryOp,
+ kIsTertiaryOp,
+ kIsQuadOp,
+ kIsQuinOp,
+ kIsSextupleOp,
+ kIsIT,
+ kMemLoad,
+ kMemStore,
+ kPCRelFixup, // x86 FIXME: add NEEDS_FIXUP to instruction attributes.
+ kRegDef0,
+ kRegDef1,
+ kRegDefA,
+ kRegDefD,
+ kRegDefFPCSList0,
+ kRegDefFPCSList2,
+ kRegDefList0,
+ kRegDefList1,
+ kRegDefList2,
+ kRegDefLR,
+ kRegDefSP,
+ kRegUse0,
+ kRegUse1,
+ kRegUse2,
+ kRegUse3,
+ kRegUse4,
+ kRegUseA,
+ kRegUseC,
+ kRegUseD,
+ kRegUseFPCSList0,
+ kRegUseFPCSList2,
+ kRegUseList0,
+ kRegUseList1,
+ kRegUseLR,
+ kRegUsePC,
+ kRegUseSP,
+ kSetsCCodes,
+ kUsesCCodes
+};
+
+std::ostream& operator<<(std::ostream& os, const OpFeatureFlags& flag);
+
} // namespace art
#endif // ART_SRC_COMPILER_COMPILERENUMS_H_