Loop detection, improved reg allocation
Detect loops and loop nesting depth, and use the latter to
weight register uses (which are then used to determine which
registers to promote).
Also:
o Fixed typo that prevented squashing of useless fp reg copies
o Rescheduled array access checks to hide latency of limit load.
o Add basic-block optimization pass to remove duplicate range
checks.
o Fixed bug that prevented recognition of redundant null
checks following iput-wide and aput-wide.
Change-Id: Icfbae39e89b1d14b8703ad6bbb0b29c0635fed1e
diff --git a/src/compiler/CompilerIR.h b/src/compiler/CompilerIR.h
index 5750913..54d9951 100644
--- a/src/compiler/CompilerIR.h
+++ b/src/compiler/CompilerIR.h
@@ -179,6 +179,7 @@
kMIRCallee, // Instruction is inlined from callee
kMIRIgnoreSuspendCheck,
kMIRDup,
+ kMIRMark, // Temporary node mark
};
#define MIR_IGNORE_NULL_CHECK (1 << kMIRIgnoreNullCheck)
@@ -190,6 +191,7 @@
#define MIR_CALLEE (1 << kMIRCallee)
#define MIR_IGNORE_SUSPEND_CHECK (1 << kMIRIgnoreSuspendCheck)
#define MIR_DUP (1 << kMIRDup)
+#define MIR_MARK (1 << kMIRMark)
struct CallsiteInfo {
const char* classDescriptor;
@@ -234,7 +236,8 @@
bool hidden;
bool catchEntry;
bool fallThroughTarget; // Reached via fallthrough
- unsigned int startOffset;
+ uint16_t startOffset;
+ uint16_t nestingDepth;
const Method* containingMethod; // For blocks from the callee
BBType blockType;
bool needFallThroughBranch; // For blocks ended due to length limit
@@ -335,6 +338,12 @@
int* phiAliasMap; // length == numSSAReg
MIR* phiList;
+ /* Use counts of ssa names */
+ GrowableList useCounts;
+
+ /* Optimization support */
+ GrowableList loopHeaders;
+
/* Map SSA names to location */
RegLocation* regLocation;
int sequenceNumber;