ARM: Combine multiply accumulate operations.
Try to combine integer multiply and add(sub) into a MAC operation.
For AArch64, also try to combine long type multiply and add(sub).
Change-Id: Ic85812e941eb5a66abc355cab81a4dd16de1b66e
diff --git a/compiler/dex/mir_graph.cc b/compiler/dex/mir_graph.cc
index d7ecb2c..71ad635 100644
--- a/compiler/dex/mir_graph.cc
+++ b/compiler/dex/mir_graph.cc
@@ -70,6 +70,10 @@
"MemBarrier",
"PackedArrayGet",
"PackedArrayPut",
+ "MaddInt",
+ "MsubInt",
+ "MaddLong",
+ "MsubLong",
};
MIRGraph::MIRGraph(CompilationUnit* cu, ArenaAllocator* arena)
@@ -1386,6 +1390,27 @@
}
FillTypeSizeString(mir->dalvikInsn.arg[0], decoded_mir);
break;
+ case kMirOpMaddInt:
+ case kMirOpMsubInt:
+ case kMirOpMaddLong:
+ case kMirOpMsubLong:
+ if (ssa_rep != nullptr) {
+ decoded_mir->append(" ");
+ decoded_mir->append(GetSSANameWithConst(ssa_rep->defs[0], false));
+ if (defs > 1) {
+ decoded_mir->append(", ");
+ decoded_mir->append(GetSSANameWithConst(ssa_rep->defs[1], false));
+ }
+ for (int i = 0; i < uses; i++) {
+ decoded_mir->append(", ");
+ decoded_mir->append(GetSSANameWithConst(ssa_rep->uses[i], false));
+ }
+ } else {
+ decoded_mir->append(StringPrintf(" v%d, v%d, v%d, v%d",
+ mir->dalvikInsn.vA, mir->dalvikInsn.vB,
+ mir->dalvikInsn.vC, mir->dalvikInsn.arg[0]));
+ }
+ break;
default:
break;
}
@@ -2459,6 +2484,11 @@
return Instruction::kContinue | Instruction::kThrow;
case kMirOpPackedArrayPut:
return Instruction::kContinue | Instruction::kThrow;
+ case kMirOpMaddInt:
+ case kMirOpMsubInt:
+ case kMirOpMaddLong:
+ case kMirOpMsubLong:
+ return Instruction::kContinue;
default:
LOG(WARNING) << "ExtendedFlagsOf: Unhandled case: " << static_cast<int> (opcode);
return 0;