commit bd17c3b46b035861ced434d6ed4d4fe183736e65
author Nicolas Geoffray <ngeoffray@google.com> Tue Feb 03 17:20:45 2015 +0000
committer Gerrit Code Review <noreply-gerritcodereview@google.com> Tue Feb 03 17:20:46 2015 +0000
tree 94e7672c19da5381f6fa3d3cb1f2b4b96dfd0f8c
parent bb2f65e64844bfca8d05d4c37991d858aa748648
parent 4c204bafbc8d596894f8cb8ec696f5be1c6f12d8

Merge "Use a different block order when not compiling baseline."

compiler/utils/arm/assembler_thumb2.cc

diff --git a/compiler/utils/arm/assembler_thumb2.cc b/compiler/utils/arm/assembler_thumb2.cc
index 0920a3f..5383c28 100644
--- a/compiler/utils/arm/assembler_thumb2.cc
+++ b/compiler/utils/arm/assembler_thumb2.cc
@@ -25,8 +25,8 @@
 namespace art {
 namespace arm {
 
-bool Thumb2Assembler::ShifterOperandCanHold(Register rd,
-                                            Register rn,
+bool Thumb2Assembler::ShifterOperandCanHold(Register rd ATTRIBUTE_UNUSED,
+                                            Register rn ATTRIBUTE_UNUSED,
                                             Opcode opcode,
                                             uint32_t immediate,
                                             ShifterOperand* shifter_op) {
@@ -37,13 +37,6 @@
   switch (opcode) {
     case ADD:
     case SUB:
-      if (rn == SP) {
-        if (rd == SP) {
-          return immediate < (1 << 9);    // 9 bits allowed.
-        } else {
-          return immediate < (1 << 12);   // 12 bits.
-        }
-      }
       if (immediate < (1 << 12)) {    // Less than (or equal to) 12 bits can always be done.
         return true;
       }