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Dragos Sbirlea0e260a32013-06-21 09:20:34 -07001/*
2 * Copyright (C) 2013 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17#include <llvm/Support/raw_ostream.h>
18#include "sea.h"
19#include "code_gen.h"
20
21namespace sea_ir {
22
23void CodeGenPrepassVisitor::Visit(PhiInstructionNode* phi) {
24 Region* r = phi->GetRegion();
25 const std::vector<Region*>* predecessors = r->GetPredecessors();
26 DCHECK(NULL != predecessors);
27 DCHECK_GT(predecessors->size(), 0u);
28 llvm::PHINode *llvm_phi = llvm_data_->builder_.CreatePHI(
29 llvm::Type::getInt32Ty(*llvm_data_->context_), predecessors->size(), phi->StringId());
30 llvm_data_->AddValue(phi, llvm_phi);
31}
32
33void CodeGenPassVisitor::Initialize(SeaGraph* graph) {
34 Region* root_region;
35 ordered_regions_.clear();
36 for (std::vector<Region*>::const_iterator cit = graph->GetRegions()->begin();
37 cit != graph->GetRegions()->end(); cit++ ) {
38 if ((*cit)->GetIDominator() == (*cit)) {
39 root_region = *cit;
40 }
41 }
42 ordered_regions_.push_back(root_region);
43 for (unsigned int id = 0; id < ordered_regions_.size(); id++) {
44 Region* current_region = ordered_regions_.at(id);
45 const std::set<Region*>* dominated_regions = current_region->GetIDominatedSet();
46 for (std::set<Region*>::const_iterator cit = dominated_regions->begin();
47 cit != dominated_regions->end(); cit++ ) {
48 ordered_regions_.push_back(*cit);
49 }
50 }
51}
52
53void CodeGenPostpassVisitor::Visit(SeaGraph* graph) {
54 std::vector<SignatureNode*>* parameters = graph->GetParameterNodes();
55 std::cout << "=== SeaGraph ===" << parameters->size() << std::endl;
56}
57void CodeGenVisitor::Visit(SeaGraph* graph) {
58 std::vector<SignatureNode*>* parameters = graph->GetParameterNodes();
59 std::cout << "=== SeaGraph ===" << parameters->size() << std::endl;
60}
61void CodeGenPrepassVisitor::Visit(SeaGraph* graph) {
62 std::vector<SignatureNode*>* parameters = graph->GetParameterNodes();
63 std::cout << "=== SeaGraph ===" << parameters->size() << std::endl;
64 // TODO: Extract correct types from dex for params and return value.
65 DCHECK(parameters != NULL);
66 std::vector<llvm::Type*> parameter_types(parameters->size(),
67 llvm::Type::getInt32Ty(*llvm_data_->context_));
68 // Build llvm function name.
Dragos Sbirlea81f79a62013-07-23 14:31:47 -070069 std::string function_name = art::StringPrintf("class=%d_method=%d", graph->class_def_idx_, graph->method_idx_);
Dragos Sbirlea0e260a32013-06-21 09:20:34 -070070
71 // Build llvm function type and parameters.
72 llvm::FunctionType *function_type = llvm::FunctionType::get(
73 llvm::Type::getInt32Ty(*llvm_data_->context_),
74 parameter_types, false);
75 llvm_data_->function_ = llvm::Function::Create(function_type,
76 llvm::Function::ExternalLinkage, function_name, &llvm_data_->module_);
77 unsigned param_id = 0;
78 for (llvm::Function::arg_iterator arg_it = llvm_data_->function_->arg_begin();
79 param_id != llvm_data_->function_->arg_size(); ++arg_it, ++param_id) {
80 DCHECK(parameters->size() > param_id) << "Insufficient parameters for function signature";
81 // Build parameter register name for LLVM IR clarity.
Dragos Sbirleadb063062013-07-23 16:29:09 -070082 std::string arg_name = art::StringPrintf("r%d", parameters->at(param_id)->GetResultRegister());
Dragos Sbirlea0e260a32013-06-21 09:20:34 -070083 arg_it->setName(arg_name);
84 SignatureNode* parameter = parameters->at(param_id);
85 llvm_data_->AddValue(parameter, arg_it);
86 }
87
88 std::vector<Region*>* regions = &ordered_regions_;
89 DCHECK_GT(regions->size(), 0u);
90 // Then create all other basic blocks.
91 for (std::vector<Region*>::const_iterator cit = regions->begin(); cit != regions->end(); cit++) {
92 llvm::BasicBlock* new_basic_block = llvm::BasicBlock::Create(*llvm_data_->context_,
93 (*cit)->StringId(), llvm_data_->function_);
94 llvm_data_->AddBlock((*cit), new_basic_block);
95 }
96}
97
98void CodeGenPrepassVisitor::Visit(Region* region) {
99 std::cout << " == Region " << region->StringId() << " ==" << std::endl;
100 llvm_data_->builder_.SetInsertPoint(llvm_data_->GetBlock(region));
101}
102void CodeGenPostpassVisitor::Visit(Region* region) {
103 std::cout << " == Region " << region->StringId() << " ==" << std::endl;
104 llvm_data_->builder_.SetInsertPoint(llvm_data_->GetBlock(region));
105}
106void CodeGenVisitor::Visit(Region* region) {
107 std::cout << " == Region " << region->StringId() << " ==" << std::endl;
108 llvm_data_->builder_.SetInsertPoint(llvm_data_->GetBlock(region));
109}
110
111
112void CodeGenVisitor::Visit(InstructionNode* instruction) {
113 std::string instr = instruction->GetInstruction()->DumpString(NULL);
114 DCHECK(0); // This whole function is useful only during development.
115}
116void CodeGenVisitor::Visit(ConstInstructionNode* instruction) {
117 std::string instr = instruction->GetInstruction()->DumpString(NULL);
118 std::cout << "1.Instruction: " << instr << std::endl;
119 llvm_data_->AddValue(instruction,
120 llvm::ConstantInt::get(*llvm_data_->context_, llvm::APInt(32, instruction->GetConstValue())));
121}
122void CodeGenVisitor::Visit(ReturnInstructionNode* instruction) {
123 std::string instr = instruction->GetInstruction()->DumpString(NULL);
124 std::cout << "2.Instruction: " << instr << std::endl;
125 DCHECK_GT(instruction->GetSSAUses().size(), 0u);
126 llvm::Value* return_value = llvm_data_->GetValue(instruction->GetSSAUses().at(0));
127 llvm_data_->builder_.CreateRet(return_value);
128}
129void CodeGenVisitor::Visit(IfNeInstructionNode* instruction) {
130 std::string instr = instruction->GetInstruction()->DumpString(NULL);
131 std::cout << "3.Instruction: " << instr << std::endl;
132 std::vector<InstructionNode*> ssa_uses = instruction->GetSSAUses();
133 DCHECK_GT(ssa_uses.size(), 1u);
134 InstructionNode* use_l = ssa_uses.at(0);
135 llvm::Value* left = llvm_data_->GetValue(use_l);
136
137 InstructionNode* use_r = ssa_uses.at(1);
138 llvm::Value* right = llvm_data_->GetValue(use_r);
139 llvm::Value* ifne = llvm_data_->builder_.CreateICmpNE(left, right, instruction->StringId());
140 DCHECK(instruction->GetRegion() != NULL);
141 std::vector<Region*>* successors = instruction->GetRegion()->GetSuccessors();
142 DCHECK_GT(successors->size(), 0u);
143 llvm::BasicBlock* then_block = llvm_data_->GetBlock(successors->at(0));
144 llvm::BasicBlock* else_block = llvm_data_->GetBlock(successors->at(1));
145
146 llvm_data_->builder_.CreateCondBr(ifne, then_block, else_block);
147}
148
149/*
150void CodeGenVisitor::Visit(AddIntLitInstructionNode* instruction) {
151 std::string instr = instruction->GetInstruction()->DumpString(NULL);
152 std::cout << "4.Instruction: " << instr << std::endl;
153 std::vector<InstructionNode*> ssa_uses = instruction->GetSSAUses();
154 InstructionNode* use_l = ssa_uses.at(0);
155 llvm::Value* left = llvm_data->GetValue(use_l);
156 llvm::Value* right = llvm::ConstantInt::get(*llvm_data->context_,
157 llvm::APInt(32, instruction->GetConstValue()));
158 llvm::Value* result = llvm_data->builder_.CreateAdd(left, right);
159 llvm_data->AddValue(instruction, result);
160}
161*/
162void CodeGenVisitor::Visit(MoveResultInstructionNode* instruction) {
163 std::string instr = instruction->GetInstruction()->DumpString(NULL);
164 std::cout << "5.Instruction: " << instr << std::endl;
165 // TODO: Currently, this "mov" instruction is simulated by "res = return_register + 0".
166 // This is inefficient, but should be optimized out by the coalescing phase of the reg alloc.
167 // The TODO is to either ensure that this happens, or to
168 // remove the move-result instructions completely from the IR
169 // by merging them with the invoke-* instructions,
170 // since their purpose of minimizing the number of opcodes in dex is
171 // not relevant for the IR. (Will need to have different
172 // instruction subclasses for functions and procedures.)
173 std::vector<InstructionNode*> ssa_uses = instruction->GetSSAUses();
174 InstructionNode* use_l = ssa_uses.at(0);
175 llvm::Value* left = llvm_data_->GetValue(use_l);
176 llvm::Value* right = llvm::ConstantInt::get(*llvm_data_->context_, llvm::APInt(32, 0));
177 llvm::Value* result = llvm_data_->builder_.CreateAdd(left, right);
178 llvm_data_->AddValue(instruction, result);
179}
180void CodeGenVisitor::Visit(InvokeStaticInstructionNode* invoke) {
181 std::string instr = invoke->GetInstruction()->DumpString(NULL);
182 std::cout << "6.Instruction: " << instr << std::endl;
183 // TODO: Build callee llvm function name.
Dragos Sbirlea81f79a62013-07-23 14:31:47 -0700184 std::string function_name = art::StringPrintf("class=%d_method=%d", 0, 1);
Dragos Sbirlea0e260a32013-06-21 09:20:34 -0700185 llvm::Function *callee = llvm_data_->module_.getFunction(function_name);
186 // TODO: Add proper checking of the matching between formal and actual signature.
187 DCHECK(NULL != callee);
188 std::vector<llvm::Value*> parameter_values;
189 std::vector<InstructionNode*> parameter_sources = invoke->GetSSAUses();
190 for (std::vector<InstructionNode*>::const_iterator cit = parameter_sources.begin();
191 cit != parameter_sources.end(); ++cit) {
192 llvm::Value* parameter_value = llvm_data_->GetValue((*cit));
193 DCHECK(NULL != parameter_value);
194 parameter_values.push_back(parameter_value);
195 }
196 llvm::Value* return_value = llvm_data_->builder_.CreateCall(callee,
197 parameter_values, invoke->StringId());
198 llvm_data_->AddValue(invoke, return_value);
199}
200void CodeGenVisitor::Visit(AddIntInstructionNode* instruction) {
201 std::string instr = instruction->GetInstruction()->DumpString(NULL);
202 std::cout << "7.Instruction: " << instr << std::endl;
203 std::vector<InstructionNode*> ssa_uses = instruction->GetSSAUses();
204 DCHECK_GT(ssa_uses.size(), 1u);
205 InstructionNode* use_l = ssa_uses.at(0);
206 InstructionNode* use_r = ssa_uses.at(1);
207 llvm::Value* left = llvm_data_->GetValue(use_l);
208 llvm::Value* right = llvm_data_->GetValue(use_r);
209 llvm::Value* result = llvm_data_->builder_.CreateAdd(left, right);
210 llvm_data_->AddValue(instruction, result);
211}
212void CodeGenVisitor::Visit(GotoInstructionNode* instruction) {
213 std::string instr = instruction->GetInstruction()->DumpString(NULL);
214 std::cout << "8.Instruction: " << instr << std::endl;
215 std::vector<sea_ir::Region*>* targets = instruction->GetRegion()->GetSuccessors();
216 DCHECK_EQ(targets->size(), 1u);
217 llvm::BasicBlock* target_block = llvm_data_->GetBlock(targets->at(0));
218 llvm_data_->builder_.CreateBr(target_block);
219}
220void CodeGenVisitor::Visit(IfEqzInstructionNode* instruction) {
221 std::string instr = instruction->GetInstruction()->DumpString(NULL);
222 std::cout << "9. Instruction: " << instr << "; Id: " <<instruction << std::endl;
223 std::vector<InstructionNode*> ssa_uses = instruction->GetSSAUses();
224 DCHECK_GT(ssa_uses.size(), 0u);
225 InstructionNode* use_l = ssa_uses.at(0);
226 llvm::Value* left = llvm_data_->GetValue(use_l);
227 llvm::Value* ifeqz = llvm_data_->builder_.CreateICmpEQ(left,
228 llvm::ConstantInt::get(*llvm_data_->context_, llvm::APInt::getNullValue(32)),
229 instruction->StringId());
230 DCHECK(instruction->GetRegion() != NULL);
231 std::vector<Region*>* successors = instruction->GetRegion()->GetSuccessors();
232 DCHECK_GT(successors->size(), 0u);
233 llvm::BasicBlock* then_block = llvm_data_->GetBlock(successors->at(0));
234 llvm::BasicBlock* else_block = llvm_data_->GetBlock(successors->at(1));
235 llvm_data_->builder_.CreateCondBr(ifeqz, then_block, else_block);
236}
237
238void CodeGenPostpassVisitor::Visit(PhiInstructionNode* phi) {
239 std::cout << "Phi node for: " << phi->GetRegisterNumber() << std::endl;
240 Region* r = phi->GetRegion();
241 const std::vector<Region*>* predecessors = r->GetPredecessors();
242 DCHECK(NULL != predecessors);
243 DCHECK_GT(predecessors->size(), 0u);
244 // Prepass (CodeGenPrepassVisitor) should create the phi function value.
245 llvm::PHINode* llvm_phi = (llvm::PHINode*) llvm_data_->GetValue(phi);
246 int predecessor_pos = 0;
247 for (std::vector<Region*>::const_iterator cit = predecessors->begin();
248 cit != predecessors->end(); ++cit) {
249 std::vector<InstructionNode*>* defining_instructions = phi->GetSSAUses(predecessor_pos++);
250 DCHECK_EQ(defining_instructions->size(), 1u);
251 InstructionNode* defining_instruction = defining_instructions->at(0);
252 DCHECK(NULL != defining_instruction);
253 Region* incoming_region = *cit;
254 llvm::BasicBlock* incoming_basic_block = llvm_data_->GetBlock(incoming_region);
255 llvm::Value* incoming_value = llvm_data_->GetValue(defining_instruction);
256 llvm_phi->addIncoming(incoming_value, incoming_basic_block);
257 }
258}
259
260void CodeGenVisitor::Visit(SignatureNode* signature) {
261 std::cout << "Signature: ;" << "Id:" << signature->StringId() << std::endl;
262 DCHECK_EQ(signature->GetDefinitions().size(), 1u) << "Signature nodes must correspond to a single parameter register.";
263}
264void CodeGenPrepassVisitor::Visit(SignatureNode* signature) {
265 std::cout << "Signature: ;" << "Id:" << signature->StringId() << std::endl;
266 DCHECK_EQ(signature->GetDefinitions().size(), 1u) << "Signature nodes must correspond to a single parameter register.";
267}
268void CodeGenPostpassVisitor::Visit(SignatureNode* signature) {
269 std::cout << "Signature: ;" << "Id:" << signature->StringId() << std::endl;
270 DCHECK_EQ(signature->GetDefinitions().size(), 1u) << "Signature nodes must correspond to a single parameter register.";
271}
272
273} // end namespace sea_ir