diff --git a/libc/arch-mips64/include/machine b/libc/arch-mips64/include/machine
new file mode 120000
index 0000000..36466ee
--- /dev/null
+++ b/libc/arch-mips64/include/machine
@@ -0,0 +1 @@
+../../arch-mips/include/machine
\ No newline at end of file
diff --git a/libc/arch-mips64/include/machine/asm.h b/libc/arch-mips64/include/machine/asm.h
deleted file mode 100644
index cdc7914..0000000
--- a/libc/arch-mips64/include/machine/asm.h
+++ /dev/null
@@ -1,206 +0,0 @@
-/*	$OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#ifndef _MIPS64_ASM_H
-#define _MIPS64_ASM_H
-
-#define __bionic_asm_align 4
-
-#undef __bionic_asm_custom_entry
-#undef __bionic_asm_custom_end
-#define __bionic_asm_custom_entry(f) .ent f
-#define __bionic_asm_custom_end(f) .end f
-
-#include <machine/regdef.h>
-
-#define	_MIPS_ISA_MIPS1	1	/* R2000/R3000 */
-#define	_MIPS_ISA_MIPS2	2	/* R4000/R6000 */
-#define	_MIPS_ISA_MIPS3	3	/* R4000 */
-#define	_MIPS_ISA_MIPS4	4	/* TFP (R1x000) */
-#define	_MIPS_ISA_MIPS5 5
-#define	_MIPS_ISA_MIPS32 6
-#define	_MIPS_ISA_MIPS64 7
-
-#if !defined(ABICALLS) && !defined(_NO_ABICALLS)
-#define	ABICALLS	.abicalls
-#endif
-
-#if defined(ABICALLS) && !defined(_KERNEL)
-	ABICALLS
-#endif
-
-#if !defined(__MIPSEL__) && !defined(__MIPSEB__)
-#error "__MIPSEL__ or __MIPSEB__ must be defined"
-#endif
-/*
- * Define how to access unaligned data word
- */
-#if defined(__MIPSEL__)
-#define LWLO    lwl
-#define LWHI    lwr
-#define	SWLO	swl
-#define	SWHI	swr
-#define LDLO    ldl
-#define LDHI    ldr
-#define	SDLO	sdl
-#define	SDHI	sdr
-#endif
-#if defined(__MIPSEB__)
-#define LWLO    lwr
-#define LWHI    lwl
-#define	SWLO	swr
-#define	SWHI	swl
-#define LDLO    ldr
-#define LDHI    ldl
-#define	SDLO	sdr
-#define	SDHI	sdl
-#endif
-
-/*
- *  Define programming environment for ABI.
- */
-#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
-
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
-#define NARGSAVE	4
-
-#define	SETUP_GP		\
-	.set	noreorder;	\
-	.cpload	t9;		\
-	.set	reorder;
-
-#define	SAVE_GP(x)		\
-	.cprestore x
-
-#define	SETUP_GP64(gpoff, name)
-#define	RESTORE_GP64
-#endif
-
-#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
-#define NARGSAVE	0
-
-#define	SETUP_GP
-#define	SAVE_GP(x)
-#define	SETUP_GP64(gpoff, name)	\
-	.cpsetup t9, gpoff, name
-#define	RESTORE_GP64		\
-	.cpreturn
-#endif
-
-#define	MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
-
-#else /* defined(ABICALLS) && !defined(_KERNEL) */
-
-#define	NARGSAVE	4
-#define	SETUP_GP
-#define	SAVE_GP(x)
-
-#define	ALIGNSZ		16	/* Stack layout alignment */
-#define	FRAMESZ(sz)	(((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1))
-
-#endif
-
-/*
- *  Basic register operations based on selected ISA
- */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32)
-#define REGSZ		4	/* 32 bit mode register size */
-#define LOGREGSZ	2	/* log rsize */
-#define	REG_S	sw
-#define	REG_L	lw
-#define	CF_SZ		24	/* Call frame size */
-#define	CF_ARGSZ	16	/* Call frame arg size */
-#define	CF_RA_OFFS	20	/* Call ra save offset */
-#endif
-
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64)
-#define REGSZ		8	/* 64 bit mode register size */
-#define LOGREGSZ	3	/* log rsize */
-#define	REG_S	sd
-#define	REG_L	ld
-#define	CF_SZ		48	/* Call frame size (multiple of ALIGNSZ) */
-#define	CF_ARGSZ	32	/* Call frame arg size */
-#define	CF_RA_OFFS	40	/* Call ra save offset */
-#endif
-
-#define REGSZ_FP	 8	/* 64 bit FP register size */
-
-#ifndef __LP64__
-#define	PTR_L		lw
-#define	PTR_S		sw
-#define	PTR_SUB		sub
-#define	PTR_ADD		add
-#define	PTR_SUBU	subu
-#define	PTR_ADDU	addu
-#define LI		li
-#define	LA		la
-#define	PTR_SLL		sll
-#define	PTR_SRL		srl
-#define	PTR_VAL		.word
-#else
-#define	PTR_L		ld
-#define	PTR_S		sd
-#define	PTR_ADD		dadd
-#define	PTR_SUB		dsub
-#define	PTR_SUBU	dsubu
-#define	PTR_ADDU	daddu
-#define LI		dli
-#define LA		dla
-#define	PTR_SLL		dsll
-#define	PTR_SRL		dsrl
-#define	PTR_VAL		.dword
-#endif
-
-/*
- * LEAF(x, fsize)
- *
- *	Declare a leaf routine.
- */
-#define LEAF(x, fsize)		\
-	.align	3;		\
-	.globl x;		\
-	.ent x, 0;		\
-x: ;				\
-	.cfi_startproc; \
-	.frame sp, fsize, ra;	\
-	SETUP_GP		\
-
-/*
- * NON_LEAF(x)
- *
- *	Declare a non-leaf routine (a routine that makes other C calls).
- */
-#define NON_LEAF(x, fsize, retpc) \
-	.align	3;		\
-	.globl x;		\
-	.ent x, 0;		\
-x: ;				\
-	.cfi_startproc; \
-	.frame sp, fsize, retpc; \
-	SETUP_GP		\
-
-#endif /* !_MIPS_ASM_H */
diff --git a/libc/arch-mips64/include/machine/elf_machdep.h b/libc/arch-mips64/include/machine/elf_machdep.h
deleted file mode 100644
index d27d431..0000000
--- a/libc/arch-mips64/include/machine/elf_machdep.h
+++ /dev/null
@@ -1,196 +0,0 @@
-/*	$NetBSD: elf_machdep.h,v 1.15 2011/03/15 07:39:22 matt Exp $	*/
-
-#ifndef _MIPS_ELF_MACHDEP_H_
-#define  _MIPS_ELF_MACHDEP_H_
-
-#ifdef _LP64
-#define ARCH_ELFSIZE		64	/* MD native binary size */
-#else
-#define ARCH_ELFSIZE		32	/* MD native binary size */
-#endif
-
-#if ELFSIZE == 32
-#define	ELF32_MACHDEP_ID_CASES						\
-		case EM_MIPS:						\
-			break;
-
-#define	ELF32_MACHDEP_ID	EM_MIPS
-#elif ELFSIZE == 64
-#define	ELF64_MACHDEP_ID_CASES						\
-		case EM_MIPS:						\
-			break;
-
-#define	ELF64_MACHDEP_ID	EM_MIPS
-#endif
-
-/* mips relocs.  */
-
-#define R_MIPS_NONE		0
-#define R_MIPS_16		1
-#define R_MIPS_32		2
-#define R_MIPS_REL32		3
-#define R_MIPS_REL		R_MIPS_REL32
-#define R_MIPS_26		4
-#define R_MIPS_HI16		5	/* high 16 bits of symbol value */
-#define R_MIPS_LO16		6	/* low 16 bits of symbol value */
-#define R_MIPS_GPREL16		7  	/* GP-relative reference  */
-#define R_MIPS_LITERAL		8 	/* Reference to literal section  */
-#define R_MIPS_GOT16		9	/* Reference to global offset table */
-#define R_MIPS_GOT		R_MIPS_GOT16
-#define R_MIPS_PC16		10  	/* 16 bit PC relative reference */
-#define R_MIPS_CALL16 		11  	/* 16 bit call thru glbl offset tbl */
-#define R_MIPS_CALL		R_MIPS_CALL16
-#define R_MIPS_GPREL32		12
-
-/* 13, 14, 15 are not defined at this point. */
-#define R_MIPS_UNUSED1		13
-#define R_MIPS_UNUSED2		14
-#define R_MIPS_UNUSED3		15
-
-/*
- * The remaining relocs are apparently part of the 64-bit Irix ELF ABI.
- */
-#define R_MIPS_SHIFT5		16
-#define R_MIPS_SHIFT6		17
-
-#define R_MIPS_64		18
-#define R_MIPS_GOT_DISP		19
-#define R_MIPS_GOT_PAGE		20
-#define R_MIPS_GOT_OFST		21
-#define R_MIPS_GOT_HI16		22
-#define R_MIPS_GOT_LO16		23
-#define R_MIPS_SUB 		24
-#define R_MIPS_INSERT_A		25
-#define R_MIPS_INSERT_B		26
-#define R_MIPS_DELETE		27
-#define R_MIPS_HIGHER		28
-#define R_MIPS_HIGHEST		29
-#define R_MIPS_CALL_HI16	30
-#define R_MIPS_CALL_LO16	31
-#define R_MIPS_SCN_DISP		32
-#define R_MIPS_REL16		33
-#define R_MIPS_ADD_IMMEDIATE	34
-#define R_MIPS_PJUMP		35
-#define R_MIPS_RELGOT		36
-#define	R_MIPS_JALR		37
-/* TLS relocations */
-
-#define R_MIPS_TLS_DTPMOD32	38	/* Module number 32 bit */
-#define R_MIPS_TLS_DTPREL32	39	/* Module-relative offset 32 bit */
-#define R_MIPS_TLS_DTPMOD64	40	/* Module number 64 bit */
-#define R_MIPS_TLS_DTPREL64	41	/* Module-relative offset 64 bit */
-#define R_MIPS_TLS_GD		42	/* 16 bit GOT offset for GD */
-#define R_MIPS_TLS_LDM		43	/* 16 bit GOT offset for LDM */
-#define R_MIPS_TLS_DTPREL_HI16	44	/* Module-relative offset, high 16 bits */
-#define R_MIPS_TLS_DTPREL_LO16	45	/* Module-relative offset, low 16 bits */
-#define R_MIPS_TLS_GOTTPREL	46	/* 16 bit GOT offset for IE */
-#define R_MIPS_TLS_TPREL32	47	/* TP-relative offset, 32 bit */
-#define R_MIPS_TLS_TPREL64	48	/* TP-relative offset, 64 bit */
-#define R_MIPS_TLS_TPREL_HI16	49	/* TP-relative offset, high 16 bits */
-#define R_MIPS_TLS_TPREL_LO16	50	/* TP-relative offset, low 16 bits */
-
-#define R_MIPS_max		51
-
-#define R_TYPE(name)		__CONCAT(R_MIPS_,name)
-
-#define	R_MIPS16_min		100
-#define	R_MIPS16_26		100
-#define	R_MIPS16_GPREL		101
-#define	R_MIPS16_GOT16		102
-#define	R_MIPS16_CALL16		103
-#define	R_MIPS16_HI16		104
-#define	R_MIPS16_LO16		105
-#define	R_MIPS16_max		106
-
-
-/* mips dynamic tags */
-
-#define DT_MIPS_RLD_VERSION	0x70000001
-#define DT_MIPS_TIME_STAMP	0x70000002
-#define DT_MIPS_ICHECKSUM	0x70000003
-#define DT_MIPS_IVERSION	0x70000004
-#define DT_MIPS_FLAGS		0x70000005
-#define DT_MIPS_BASE_ADDRESS	0x70000006
-#define DT_MIPS_CONFLICT	0x70000008
-#define DT_MIPS_LIBLIST		0x70000009
-#define DT_MIPS_CONFLICTNO	0x7000000b
-#define	DT_MIPS_LOCAL_GOTNO	0x7000000a	/* number of local got ents */
-#define DT_MIPS_LIBLISTNO	0x70000010
-#define	DT_MIPS_SYMTABNO	0x70000011	/* number of .dynsym entries */
-#define DT_MIPS_UNREFEXTNO	0x70000012
-#define	DT_MIPS_GOTSYM		0x70000013	/* first dynamic sym in got */
-#define DT_MIPS_HIPAGENO	0x70000014
-#define	DT_MIPS_RLD_MAP		0x70000016	/* address of loader map */
-
-/*
- * ELF Flags
- */
-#define	EF_MIPS_PIC		0x00000002	/* Contains PIC code */
-#define	EF_MIPS_CPIC		0x00000004	/* STD PIC calling sequence */
-#define	EF_MIPS_ABI2		0x00000020	/* N32 */
-
-#define	EF_MIPS_ARCH_ASE	0x0f000000	/* Architectural extensions */
-#define	EF_MIPS_ARCH_MDMX	0x08000000	/* MDMX multimedia extension */
-#define	EF_MIPS_ARCH_M16	0x04000000	/* MIPS-16 ISA extensions */
-
-#define	EF_MIPS_ARCH		0xf0000000	/* Architecture field */
-#define	EF_MIPS_ARCH_1		0x00000000	/* -mips1 code */
-#define	EF_MIPS_ARCH_2		0x10000000	/* -mips2 code */
-#define	EF_MIPS_ARCH_3		0x20000000	/* -mips3 code */
-#define	EF_MIPS_ARCH_4		0x30000000	/* -mips4 code */
-#define	EF_MIPS_ARCH_5		0x40000000	/* -mips5 code */
-#define	EF_MIPS_ARCH_32		0x50000000	/* -mips32 code */
-#define	EF_MIPS_ARCH_64		0x60000000	/* -mips64 code */
-#define	EF_MIPS_ARCH_32R2	0x70000000	/* -mips32r2 code */
-#define	EF_MIPS_ARCH_64R2	0x80000000	/* -mips64r2 code */
-
-#define	EF_MIPS_ABI		0x0000f000
-#define	EF_MIPS_ABI_O32		0x00001000
-#define	EF_MIPS_ABI_O64		0x00002000
-#define	EF_MIPS_ABI_EABI32	0x00003000
-#define	EF_MIPS_ABI_EABI64	0x00004000
-
-#if defined(__MIPSEB__)
-#define	ELF32_MACHDEP_ENDIANNESS	ELFDATA2MSB
-#define	ELF64_MACHDEP_ENDIANNESS	ELFDATA2MSB
-#elif defined(__MIPSEL__)
-#define	ELF32_MACHDEP_ENDIANNESS	ELFDATA2LSB
-#define	ELF64_MACHDEP_ENDIANNESS	ELFDATA2LSB
-#elif !defined(HAVE_NBTOOL_CONFIG_H)
-#error neither __MIPSEL__ nor __MIPSEB__ are defined.
-#endif
-
-#ifdef _KERNEL
-#ifdef _KERNEL_OPT
-#include "opt_compat_netbsd.h"
-#endif
-#ifdef COMPAT_16
-/*
- * Up to 1.6, the ELF dynamic loader (ld.elf_so) was not relocatable.
- * Tell the kernel ELF exec code not to try relocating the interpreter
- * for dynamically-linked ELF binaries.
- */
-#define ELF_INTERP_NON_RELOCATABLE
-#endif /* COMPAT_16 */
-
-/*
- * We need to be able to include the ELF header so we can pick out the
- * ABI being used.
- */
-#ifdef ELFSIZE
-#define	ELF_MD_PROBE_FUNC	ELFNAME2(mips_netbsd,probe)
-#define	ELF_MD_COREDUMP_SETUP	ELFNAME2(coredump,setup)
-#endif
-
-struct exec_package;
-
-int mips_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *,
-	vaddr_t *);
-void coredump_elf32_setup(struct lwp *, void *);
-
-int mips_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *,
-	vaddr_t *);
-void coredump_elf64_setup(struct lwp *, void *);
-#endif /* _KERNEL */
-
-#endif /* _MIPS_ELF_MACHDEP_H_ */
diff --git a/libc/arch-mips64/include/machine/endian.h b/libc/arch-mips64/include/machine/endian.h
deleted file mode 100644
index 9270e9d..0000000
--- a/libc/arch-mips64/include/machine/endian.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/*	$OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB  (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_ENDIAN_H_
-#define _MIPS64_ENDIAN_H_
-
-#ifdef __GNUC__
-
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-#define __swap16md(x) ({					\
-    register uint16_t _x = (x);					\
-    register uint16_t _r;					\
-    __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x));	\
-    _r;								\
-})
-
-#define __swap32md(x) ({					\
-    register uint32_t _x = (x);					\
-    register uint32_t _r;					\
-    __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
-    _r;								\
-})
-
-#define __swap64md(x) ({					\
-    uint64_t _swap64md_x = (x);					\
-    (uint64_t) __swap32md(_swap64md_x >> 32) |			\
-        (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32;	\
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros.  */
-#define MD_SWAP
-
-#endif  /* __mips32r2__ */
-#endif  /* __GNUC__ */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#define __STRICT_ALIGNMENT
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* _MIPS64_ENDIAN_H_ */
diff --git a/libc/arch-mips64/include/machine/regdef.h b/libc/arch-mips64/include/machine/regdef.h
deleted file mode 100644
index 3a7cd68..0000000
--- a/libc/arch-mips64/include/machine/regdef.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/*	$OpenBSD: regdef.h,v 1.3 2005/08/07 07:29:44 miod Exp $	*/
-
-/*
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell. This file is derived from the MIPS RISC
- * Architecture book by Gerry Kane.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)regdef.h	8.1 (Berkeley) 6/10/93
- */
-#ifndef _MIPS_REGDEF_H_
-#define _MIPS_REGDEF_H_
-
-#if (_MIPS_SIM == _ABI64) && !defined(__mips_n64)
-#define __mips_n64 1
-#endif
-#if (_MIPS_SIM == _ABIN32) &&  !defined(__mips_n32)
-#define __mips_n32 1
-#endif
-
-#define zero	$0	/* always zero */
-#define AT	$at	/* assembler temp */
-#define v0	$2	/* return value */
-#define v1	$3
-#define a0	$4	/* argument registers */
-#define a1	$5
-#define a2	$6
-#define a3	$7
-#if defined(__mips_n32) || defined(__mips_n64)
-#define a4	$8	/* expanded register arguments */
-#define a5	$9
-#define a6	$10
-#define a7	$11
-#define ta0	$8	/* alias */
-#define ta1	$9
-#define ta2	$10
-#define ta3	$11
-#define t0	$12	/* temp registers (not saved across subroutine calls) */
-#define t1	$13
-#define t2	$14
-#define t3	$15
-#else
-#define t0	$8	/* temp registers (not saved across subroutine calls) */
-#define t1	$9
-#define t2	$10
-#define t3	$11
-#define t4	$12
-#define t5	$13
-#define t6	$14
-#define t7	$15
-#define ta0	$12	/* alias */
-#define ta1	$13
-#define ta2	$14
-#define ta3	$15
-#endif
-#define s0	$16	/* saved across subroutine calls (callee saved) */
-#define s1	$17
-#define s2	$18
-#define s3	$19
-#define s4	$20
-#define s5	$21
-#define s6	$22
-#define s7	$23
-#define t8	$24	/* two more temp registers */
-#define t9	$25
-#define k0	$26	/* kernel temporary */
-#define k1	$27
-#define gp	$28	/* global pointer */
-#define sp	$29	/* stack pointer */
-#define s8	$30	/* one more callee saved */
-#define ra	$31	/* return address */
-
-#endif /* !_MIPS_REGDEF_H_ */
diff --git a/libc/arch-mips64/include/machine/setjmp.h b/libc/arch-mips64/include/machine/setjmp.h
deleted file mode 100644
index a9707dc..0000000
--- a/libc/arch-mips64/include/machine/setjmp.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/*	$OpenBSD: setjmp.h,v 1.2 2004/08/10 21:10:56 pefo Exp $	*/
-
-/* Public domain */
-
-#ifndef _MIPS_SETJMP_H_
-#define _MIPS_SETJMP_H_
-
-#ifdef __LP64__
-#define	_JBLEN	22		/* size, in 8-byte longs, of a mips64 jmp_buf */
-#else
-#define	_JBLEN	29		/* size, in 4-byte longs, of a mips32 jmp_buf */
-#endif
-
-#endif /* !_MIPS_SETJMP_H_ */
diff --git a/libc/arch-mips64/include/machine/signal.h b/libc/arch-mips64/include/machine/signal.h
deleted file mode 100644
index b9c1367..0000000
--- a/libc/arch-mips64/include/machine/signal.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/*	$OpenBSD: signal.h,v 1.8 2006/01/09 18:18:37 millert Exp $	*/
-
-/*
- * Copyright (c) 1992, 1993
- *	The Regents of the University of California.  All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	@(#)signal.h	8.1 (Berkeley) 6/10/93
- */
-
-#ifndef _MIPS_SIGNAL_H_
-#define _MIPS_SIGNAL_H_
-
-/* On Mips32, jmpbuf begins with optional 4-byte filler so that
- *  all saved FP regs are aligned on 8-byte boundary, despite this whole
- *  struct being mis-declared to users as an array of (4-byte) longs.
- *  All the following offsets are then from the rounded-up base addr
- */
-
-/* Fields of same size on all MIPS abis: */
-#define	SC_MAGIC        (0*4)		/* 4 bytes, identify jmpbuf */
-#define	SC_MASK		(1*4)		/* 4 bytes, saved signal mask */
-#define	SC_FPSR		(2*4)		/* 4 bytes, floating point control/status reg */
-/*     	filler2		(3*4)		   4 bytes, pad to 8-byte boundary */
-
-/* Registers that are 4-byte on mips32 o32, and 8-byte on mips64 n64 abi */
-#define	SC_REGS_SAVED	12		/* ra,gp,sp,s0-s8 */
-#define	SC_REGS		(4*4)		/* SC_REGS_SAVED*REGSZ bytes */
-
-/* Floating pt registers are 8-bytes on all abis,
- * but the number of saved fp regs varies for o32/n32 versus n64 abis:
- */
-
-#ifdef __LP64__
-#define	SC_FPREGS_SAVED	8  /* all  fp regs f24,f25,f26,f27,f28,f29,f30,f31 */
-#else
-#define	SC_FPREGS_SAVED	6  /* even fp regs f20,f22,f24,f26,f28,f30 */
-#endif
-
-#define	SC_FPREGS	(SC_REGS + SC_REGS_SAVED*REGSZ)  /* SC_FPREGS_SAVED*REGSZ_FP bytes */
-
-#define	SC_BYTES	(SC_FPREGS + SC_FPREGS_SAVED*REGSZ_FP)
-#define	SC_LONGS	(SC_BYTES/REGSZ)
-
-#ifdef __LP64__
-/* SC_LONGS is 22, so _JBLEN should be 22 or larger */
-#else
-/* SC_LONGS is 28, but must also allocate dynamic-roundup filler.
-   so _JBLEN should be 29 or larger */
-#endif
-
-#endif	/* !_MIPS_SIGNAL_H_ */