| commit | 3bfa0fd32f07fab81f178a58eee4d0738b6d0db6 | [log] [tgz] |
|---|---|---|
| author | Henrik Smiding <henrik.smiding@intel.com> | Wed Jan 08 16:57:55 2014 +0100 |
| committer | yijunx.zhu <yijunx.zhu@intel.com> | Tue Apr 01 14:41:08 2014 +0800 |
| tree | 33b967594a53edf95d7113cd45032f2680ed5651 | |
| parent | c19972a4ca24512e017ad501bf446a489d4236e7 [diff] |
Add Silvermont architecture cache sizes Adds Silvermont specific cache sizes for bionic optimizations. Change-Id: Ib992f530b8c485121b2874470fd6bed2212adb0f Signed-off-by: Henrik Smiding <henrik.smiding@intel.com>