Clean up linker architecture macros.
We don't need our own architecture macros; the standard ones will do.
This patch also fixes some __x86_64__ tests to be USE_RELA tests instead,
because they're not actually x86_64-specific.
I've cleaned up architecture-specific code slightly so where possible
all the code corresponding to a particular architecture is together.
This patch also fixes a bug in LP64 DT_PLTGOT handling, which should be
an error rather than falling through into DT_DEBUG! There was another #ifdef
bug where we'd only report unexpected DT_ entries on MIPS.
Change-Id: Id1d04e372611f641c1aa278a18e379f28af9eaf5
diff --git a/linker/linker_phdr.cpp b/linker/linker_phdr.cpp
index 5f2b2c1..4884364 100644
--- a/linker/linker_phdr.cpp
+++ b/linker/linker_phdr.cpp
@@ -202,13 +202,13 @@
}
if (header_.e_machine !=
-#ifdef ANDROID_ARM_LINKER
+#if defined(__arm__)
EM_ARM
-#elif defined(ANDROID_MIPS_LINKER)
- EM_MIPS
-#elif defined(ANDROID_X86_LINKER)
+#elif defined(__i386__)
EM_386
-#elif defined(ANDROID_X86_64_LINKER)
+#elif defined(__mips__)
+ EM_MIPS
+#elif defined(__x86_64__)
EM_X86_64
#endif
) {
@@ -321,10 +321,6 @@
return true;
}
-// Map all loadable segments in process' address space.
-// This assumes you already called phdr_table_reserve_memory to
-// reserve the address space range for the library.
-// TODO: assert assumption.
bool ElfReader::LoadSegments() {
for (size_t i = 0; i < phdr_num_; ++i) {
const Elf_Phdr* phdr = &phdr_table_[i];
@@ -513,7 +509,7 @@
return _phdr_table_set_gnu_relro_prot(phdr_table, phdr_count, load_bias, PROT_READ);
}
-#ifdef ANDROID_ARM_LINKER
+#if defined(__arm__)
# ifndef PT_ARM_EXIDX
# define PT_ARM_EXIDX 0x70000001 /* .ARM.exidx segment */
@@ -550,7 +546,7 @@
*arm_exidx_count = 0;
return -1;
}
-#endif /* ANDROID_ARM_LINKER */
+#endif
/* Return the address and size of the ELF file's .dynamic section in memory,
* or NULL if missing.