Various bug fixes for armv5 and loop/self-verification co-existence.
Fixed the out-of-bound problem for RegImm compares when imm cannot be encoded.
Renamed insertRegRegCheck to genRegRegCheck to be consistent with other code.
Fixed the loop formation code to break out of the tight loop in each iteration
when self-verification is enabled.
diff --git a/vm/compiler/codegen/arm/Codegen.c b/vm/compiler/codegen/arm/Codegen.c
index 2d2e533..a34a1b3 100644
--- a/vm/compiler/codegen/arm/Codegen.c
+++ b/vm/compiler/codegen/arm/Codegen.c
@@ -654,10 +654,10 @@
* Perform a "reg cmp reg" operation and jump to the PCR region if condition
* satisfies.
*/
-static inline ArmLIR *insertRegRegCheck(CompilationUnit *cUnit,
- ArmConditionCode cond,
- int reg1, int reg2, int dOffset,
- ArmLIR *pcrLabel)
+static inline ArmLIR *genRegRegCheck(CompilationUnit *cUnit,
+ ArmConditionCode cond,
+ int reg1, int reg2, int dOffset,
+ ArmLIR *pcrLabel)
{
ArmLIR *res;
res = opRegReg(cUnit, OP_CMP, reg1, reg2);
@@ -696,7 +696,7 @@
static ArmLIR *genBoundsCheck(CompilationUnit *cUnit, int rIndex,
int rBound, int dOffset, ArmLIR *pcrLabel)
{
- return insertRegRegCheck(cUnit, ARM_COND_CS, rIndex, rBound, dOffset,
+ return genRegRegCheck(cUnit, ARM_COND_CS, rIndex, rBound, dOffset,
pcrLabel);
}
@@ -3489,8 +3489,8 @@
opRegImm(cUnit, OP_ADD, regIdxEnd, delta, regIdxEnd);
}
/* Punt if "regIdxEnd < len(Array)" is false */
- insertRegRegCheck(cUnit, ARM_COND_GE, regIdxEnd, regLength, 0,
- (ArmLIR *) cUnit->loopAnalysis->branchToPCR);
+ genRegRegCheck(cUnit, ARM_COND_GE, regIdxEnd, regLength, 0,
+ (ArmLIR *) cUnit->loopAnalysis->branchToPCR);
}
/*
@@ -3525,8 +3525,8 @@
}
/* Punt if "regIdxInit < len(Array)" is false */
- insertRegRegCheck(cUnit, ARM_COND_GE, regIdxInit, regLength, 0,
- (ArmLIR *) cUnit->loopAnalysis->branchToPCR);
+ genRegRegCheck(cUnit, ARM_COND_GE, regIdxInit, regLength, 0,
+ (ArmLIR *) cUnit->loopAnalysis->branchToPCR);
}
/*
diff --git a/vm/compiler/codegen/arm/Thumb2Util.c b/vm/compiler/codegen/arm/Thumb2Util.c
index 8d3ce07..559cf0d 100644
--- a/vm/compiler/codegen/arm/Thumb2Util.c
+++ b/vm/compiler/codegen/arm/Thumb2Util.c
@@ -639,10 +639,11 @@
ArmLIR *branch;
int modImm;
/*
- * TODO: re-enable usage of THUMB2_CBZ & THUMB2_CBNZ once assembler is enhanced
- * to allow us to replace code patterns when instructions don't reach. Currently,
- * CB[N]Z is causing too many assembler aborts. What we want to do is emit
- * the short forms, and then replace them with longer versions when needed.
+ * TODO: re-enable usage of THUMB2_CBZ & THUMB2_CBNZ once assembler is
+ * enhanced to allow us to replace code patterns when instructions don't
+ * reach. Currently, CB[N]Z is causing too many assembler aborts.
+ * What we want to do is emit the short forms, and then replace them with
+ * longer versions when needed.
*/
if (0 && (LOWREG(reg)) && (checkValue == 0) &&
((cond == ARM_COND_EQ) || (cond == ARM_COND_NE))) {
diff --git a/vm/compiler/codegen/arm/ThumbUtil.c b/vm/compiler/codegen/arm/ThumbUtil.c
index fb25a56..0be1621 100644
--- a/vm/compiler/codegen/arm/ThumbUtil.c
+++ b/vm/compiler/codegen/arm/ThumbUtil.c
@@ -62,6 +62,10 @@
ArmConditionCode cond, int reg,
int checkValue, int dOffset,
ArmLIR *pcrLabel);
+static inline ArmLIR *genRegRegCheck(CompilationUnit *cUnit,
+ ArmConditionCode cond,
+ int reg1, int reg2, int dOffset,
+ ArmLIR *pcrLabel);
ArmLIR* dvmCompilerRegCopy(CompilationUnit *cUnit, int rDest, int rSrc);
static ArmLIR *loadMultiple(CompilationUnit *cUnit, int rBase, int rMask);
static ArmLIR *storeMultiple(CompilationUnit *cUnit, int rBase, int rMask);
@@ -443,7 +447,11 @@
int checkValue, int dOffset,
ArmLIR *pcrLabel)
{
- assert((checkValue & 0xff) == checkValue);
+ if ((checkValue & 0xff) != checkValue) {
+ /* NOTE: direct use of hot temp r7 here. Revisit. */
+ loadConstant(cUnit, r7, checkValue);
+ return genRegRegCheck(cUnit, cond, reg, r7, dOffset, pcrLabel);
+ }
newLIR2(cUnit, THUMB_CMP_RI8, reg, checkValue);
ArmLIR *branch = newLIR2(cUnit, THUMB_B_COND, 0, cond);
return genCheckCommon(cUnit, dOffset, branch, pcrLabel);