diff --git a/vm/compiler/CompilerIR.h b/vm/compiler/CompilerIR.h
index 389ac7c..948f3e7 100644
--- a/vm/compiler/CompilerIR.h
+++ b/vm/compiler/CompilerIR.h
@@ -14,11 +14,11 @@
  * limitations under the License.
  */
 
-#include "codegen/Optimizer.h"
-
 #ifndef _DALVIK_VM_COMPILER_IR
 #define _DALVIK_VM_COMPILER_IR
 
+#include "codegen/Optimizer.h"
+
 typedef enum BBType {
     /* For coding convenience reasons chaining cell types should appear first */
     CHAINING_CELL_NORMAL = 0,
@@ -27,7 +27,9 @@
     CHAINING_CELL_INVOKE_PREDICTED,
     CHAINING_CELL_BACKWARD_BRANCH,
     CHAINING_CELL_LAST,
+    ENTRY_BLOCK,
     DALVIK_BYTECODE,
+    EXIT_BLOCK,
     PC_RECONSTRUCTION,
     EXCEPTION_HANDLING,
 } BBType;
@@ -46,14 +48,42 @@
     struct LIR *target;
 } LIR;
 
+enum ExtendedMIROpcode {
+    MIR_OP_FIRST = 256,
+    MIR_OP_PHI = MIR_OP_FIRST,
+    MIR_OP_NULL_N_RANGE_UP_CHECK,
+    MIR_OP_NULL_N_RANGE_DOWN_CHECK,
+    MIR_OP_LOWER_BOUND_CHECK,
+    MIR_OP_PUNT,
+    MIR_OP_LAST,
+};
+
+struct SSARepresentation;
+
+typedef enum {
+    kMIRIgnoreNullCheck = 0,
+    kMIRNullCheckOnly,
+    kMIRIgnoreRangeCheck,
+    kMIRRangeCheckOnly,
+} MIROptimizationFlagPositons;
+
+#define MIR_IGNORE_NULL_CHECK           (1 << kMIRIgnoreNullCheck)
+#define MIR_NULL_CHECK_ONLY             (1 << kMIRNullCheckOnly)
+#define MIR_IGNORE_RANGE_CHECK          (1 << kMIRIgnoreRangeCheck)
+#define MIR_RANGE_CHECK_ONLY            (1 << kMIRRangeCheckOnly)
+
 typedef struct MIR {
     DecodedInstruction dalvikInsn;
     unsigned int width;
     unsigned int offset;
     struct MIR *prev;
     struct MIR *next;
+    struct SSARepresentation *ssaRep;
+    int OptimizationFlags;
 } MIR;
 
+struct BasicBlockDataFlow;
+
 typedef struct BasicBlock {
     int id;
     int visited;
@@ -66,8 +96,11 @@
     struct BasicBlock *fallThrough;
     struct BasicBlock *taken;
     struct BasicBlock *next;            // Serial link for book keeping purposes
+    struct BasicBlockDataFlow *dataFlowInfo;
 } BasicBlock;
 
+struct LoopAnalysis;
+
 typedef struct CompilationUnit {
     int numInsts;
     int numBlocks;
@@ -88,17 +121,33 @@
     bool allSingleStep;
     bool halveInstCount;
     bool executionCount;                // Add code to count trace executions
+    bool hasLoop;
     int numChainingCells[CHAINING_CELL_LAST];
     LIR *firstChainingLIR[CHAINING_CELL_LAST];
     RegisterScoreboard registerScoreboard;      // Track register dependency
     int optRound;                       // round number to tell an LIR's age
     JitInstructionSetType instructionSet;
+    /* Number of total regs used in the whole cUnit after SSA transformation */
+    int numSSARegs;
+    /* Map SSA reg i to the Dalvik[15..0]/Sub[31..16] pair. */
+    GrowableList *ssaToDalvikMap;
+
+    /* The following are new data structures to support SSA representations */
+    /* Map original Dalvik reg i to the SSA[15..0]/Sub[31..16] pair */
+    int *dalvikToSSAMap;                // length == method->registersSize
+    BitVector *isConstantV;             // length == numSSAReg
+    int *constantValues;                // length == numSSAReg
+
+    /* Data structure for loop analysis and optimizations */
+    struct LoopAnalysis *loopAnalysis;
 } CompilationUnit;
 
 BasicBlock *dvmCompilerNewBB(BBType blockType);
 
 void dvmCompilerAppendMIR(BasicBlock *bb, MIR *mir);
 
+void dvmCompilerPrependMIR(BasicBlock *bb, MIR *mir);
+
 void dvmCompilerAppendLIR(CompilationUnit *cUnit, LIR *lir);
 
 void dvmCompilerInsertLIRBefore(LIR *currentLIR, LIR *newLIR);