Restructure the codegen to make architectural depedency explicit.
The original Codegen.c is broken into three components:
- CodegenCommon.c (arch-independend)
- CodegenFactory.c (Thumb1/2 dependent)
- CodegenDriver.c (Dalvik dependent)
For the Thumb/Thumb2 directories, each contain the followin three files:
- Factory.c (low-level routines for instruction selections)
- Gen.c (invoke the ISA-specific instruction selection routines)
- Ralloc.c (arch-dependent register pools)
The FP directory contains FP-specific codegen routines depending on
Thumb/Thumb2/VFP/PortableFP:
- Thumb2VFP.c
- ThumbVFP.c
- ThumbPortableFP.c
Then the hierarchy is formed by stacking these files in the following top-down
order:
1 CodegenCommon.c
2 Thumb[2]/Factory.c
3 CodegenFactory.c
4 Thumb[2]/Gen.c
5 FP stuff
6 Thumb[2]/Ralloc.c
7 CodegenDriver.c
diff --git a/vm/compiler/codegen/arm/Codegen.h b/vm/compiler/codegen/arm/Codegen.h
index 414c343..b148bda 100644
--- a/vm/compiler/codegen/arm/Codegen.h
+++ b/vm/compiler/codegen/arm/Codegen.h
@@ -14,78 +14,59 @@
* limitations under the License.
*/
-#ifndef _DALVIK_VM_COMPILER_CODEGEN_ARM_CODEGEN_H
-#define _DALVIK_VM_COMPILER_CODEGEN_ARM_CODEGEN_H
-
/*
- * Forward declarations for common routines in Codegen.c used by ISA
- * variant code such as ThumbUtilty.c
+ * This file contains register alloction support and is intended to be
+ * included by:
+ *
+ * Codegen-$(TARGET_ARCH_VARIANT).c
+ *
*/
-static void annotateDalvikRegAccess(ArmLIR *lir, int regId, bool isLoad);
-static void setupResourceMasks(ArmLIR *lir);
-static ArmLIR *newLIR0(CompilationUnit *cUnit, ArmOpCode opCode);
-static ArmLIR *newLIR1(CompilationUnit *cUnit, ArmOpCode opCode,
- int dest);
-static ArmLIR *newLIR2(CompilationUnit *cUnit, ArmOpCode opCode,
- int dest, int src1);
-static ArmLIR *newLIR3(CompilationUnit *cUnit, ArmOpCode opCode,
- int dest, int src1, int src2);
-static ArmLIR *newLIR4(CompilationUnit *cUnit, ArmOpCode opCode,
- int dest, int src1, int src2, int info);
-static ArmLIR *scanLiteralPool(CompilationUnit *cUnit, int value,
- unsigned int delta);
-static ArmLIR *addWordData(CompilationUnit *cUnit, int value, bool inPlace);
-static inline ArmLIR *genCheckCommon(CompilationUnit *cUnit, int dOffset,
- ArmLIR *branch,
- ArmLIR *pcrLabel);
-static void genBarrier(CompilationUnit *cUnit);
-static RegLocation loadValue(CompilationUnit *cUnit, RegLocation rlSrc,
- RegisterClass opKind);
-static RegLocation loadValueWide(CompilationUnit *cUnit, RegLocation rlSrc,
- RegisterClass opKind);
-static ArmLIR *loadConstant(CompilationUnit *cUnit, int rDest, int value);
-static void storeValue(CompilationUnit *cUnit, RegLocation rlDst,
- RegLocation rlSrc);
-static void storeValueWide(CompilationUnit *cUnit, RegLocation rlDst,
- RegLocation rlSrc);
-static void loadValueDirectFixed(CompilationUnit *cUnit, RegLocation rlSrc,
- int reg1);
-static void loadValueDirectWide(CompilationUnit *cUnit, RegLocation rlSrc,
- int regLo, int regHi);
-static void loadValueDirectWideFixed(CompilationUnit *cUnit, RegLocation rlSrc,
- int regLo, int regHi);
-static ArmLIR *genNullCheck(CompilationUnit *cUnit, int sReg, int mReg,
- int dOffset, ArmLIR *pcrLabel);
-static ArmLIR *loadWordDisp(CompilationUnit *cUnit, int rBase,
- int displacement, int rDest);
-static ArmLIR *storeWordDisp(CompilationUnit *cUnit, int rBase,
- int displacement, int rDest);
-static RegLocation inlinedTarget(CompilationUnit *cUnit, MIR *mir, bool fpHint);
-static RegLocation inlinedTargetWide(CompilationUnit *cUnit, MIR *mir,
- bool fpHint);
-static ArmLIR *genBoundsCheck(CompilationUnit *cUnit, int rIndex,
- int rBound, int dOffset, ArmLIR *pcrLabel);
-static void handleMonitorPortable(CompilationUnit *cUnit, MIR *mir);
-static inline ArmLIR *genRegRegCheck(CompilationUnit *cUnit,
- ArmConditionCode cond,
- int reg1, int reg2, int dOffset,
- ArmLIR *pcrLabel);
+#include "compiler/CompilerIR.h"
-/* Routines which must be supplied by the variant-specific code */
-static void genDispatchToHandler(CompilationUnit *cUnit, TemplateOpCode opCode);
-static bool genInlineSqrt(CompilationUnit *cUnit, MIR *mir);
-static bool genInlineCos(CompilationUnit *cUnit, MIR *mir);
-static bool genInlineSin(CompilationUnit *cUnit, MIR *mir);
-static bool handleConversion(CompilationUnit *cUnit, MIR *mir);
-static bool compilerArchVariantInit();
-static bool handleArithOpFloat(CompilationUnit *cUnit, MIR *mir,
- RegLocation rlDest, RegLocation rlSrc1,
- RegLocation rlSrc2);
-static bool handleArithOpDouble(CompilationUnit *cUnit, MIR *mir,
- RegLocation rlDest, RegLocation rlSrc1,
- RegLocation rlSrc2);
-static bool handleCmpFP(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest,
- RegLocation rlSrc1, RegLocation rlSrc2);
+/*
+ * loadConstant() sometimes needs to add a small imm to a pre-existing constant
+ */
+static ArmLIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
+ int value);
+static ArmLIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1,
+ int rSrc2);
-#endif /* _DALVIK_VM_COMPILER_CODEGEN_ARM_CODEGEN_H */
+/* Forward decalraton the portable versions due to circular dependency */
+static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
+ RegLocation rlDest, RegLocation rlSrc1,
+ RegLocation rlSrc2);
+
+static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir,
+ RegLocation rlDest, RegLocation rlSrc1,
+ RegLocation rlSrc2);
+
+static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir);
+
+static void genMonitorPortable(CompilationUnit *cUnit, MIR *mir);
+
+
+/*
+ * Architecture-dependent register allocation routines implemented in
+ * Thumb[2]/Ralloc.c
+ */
+extern int dvmCompilerAllocTypedTempPair(CompilationUnit *cUnit,
+ bool fpHint, int regClass);
+
+extern int dvmCompilerAllocTypedTemp(CompilationUnit *cUnit, bool fpHint,
+ int regClass);
+
+extern ArmLIR* dvmCompilerRegCopyNoInsert(CompilationUnit *cUnit, int rDest,
+ int rSrc);
+
+extern ArmLIR* dvmCompilerRegCopy(CompilationUnit *cUnit, int rDest, int rSrc);
+
+extern void dvmCompilerRegCopyWide(CompilationUnit *cUnit, int destLo,
+ int destHi, int srcLo, int srcHi);
+
+extern void dvmCompilerFlushRegImpl(CompilationUnit *cUnit, int rBase,
+ int displacement, int rSrc, OpSize size);
+
+extern void dvmCompilerFlushRegWideImpl(CompilationUnit *cUnit, int rBase,
+ int displacement, int rSrcLo,
+ int rSrcHi);