commit 716f120d7f33ca18a5dcbef811399df0cbefe5d0
author Bill Buzbee <buzbee@google.com> Thu Jul 23 13:22:09 2009 -0700
committer Bill Buzbee <buzbee@google.com> Mon Jul 27 16:02:08 2009 -0700
tree a52972ebbedf379c144531655a7edc8c3cc0527d
parent 7605a84a9a0a1764c1fb290d9c93e8114eaf620a

First phase of restructuring to support THUMB2 & ARM traces
Store some useful info about traces in JitTable entry; some general cleanup

vm/compiler/Frontend.c

diff --git a/vm/compiler/Frontend.c b/vm/compiler/Frontend.c
index 77548d9..c717975 100644
--- a/vm/compiler/Frontend.c
+++ b/vm/compiler/Frontend.c
@@ -239,7 +239,8 @@
  * first and they will be passed to the codegen routines to convert Dalvik
  * bytecode into machine code.
  */
-void *dvmCompileTrace(JitTraceDescription *desc, int numMaxInsts)
+bool dvmCompileTrace(JitTraceDescription *desc, int numMaxInsts,
+                     JitTranslationInfo *info)
 {
     const DexCode *dexCode = dvmGetMethodCode(desc->method);
     const JitTraceRun* currRun = &desc->trace[0];
@@ -523,11 +524,14 @@
         dvmCompilerDumpCompilationUnit(&cUnit);
     }
 
+    /* Set the instruction set to use (NOTE: later components may change it) */
+    cUnit.instructionSet = dvmCompilerInstructionSet(&cUnit);
+
     /* Convert MIR to LIR, etc. */
     dvmCompilerMIR2LIR(&cUnit);
 
     /* Convert LIR into machine code. */
-    dvmCompilerAssembleLIR(&cUnit);
+    dvmCompilerAssembleLIR(&cUnit, info);
 
     if (cUnit.printMe) {
         if (cUnit.halveInstCount) {
@@ -546,17 +550,14 @@
     /* Free the bit vector tracking null-checked registers */
     dvmFreeBitVector(cUnit.registerScoreboard.nullCheckedRegs);
 
-    /*
-     * Things have gone smoothly - publish the starting address of
-     * translation's entry point.
-     */
     if (!cUnit.halveInstCount) {
+    /* Success */
         methodStats->nativeSize += cUnit.totalSize;
-        return cUnit.baseAddr + cUnit.headerSize;
+        return info->codeAddress != NULL;
 
     /* Halve the instruction count and retry again */
     } else {
-        return dvmCompileTrace(desc, cUnit.numInsts / 2);
+        return dvmCompileTrace(desc, cUnit.numInsts / 2, info);
     }
 }
 
@@ -567,7 +568,7 @@
  * TODO: implementation will be revisited when the trace builder can provide
  * whole-method traces.
  */
-void *dvmCompileMethod(const Method *method)
+bool dvmCompileMethod(const Method *method, JitTranslationInfo *info)
 {
     const DexCode *dexCode = dvmGetMethodCode(method);
     const u2 *codePtr = dexCode->insns;
@@ -732,13 +733,16 @@
         }
     }
 
+    /* Set the instruction set to use (NOTE: later components may change it) */
+    cUnit.instructionSet = dvmCompilerInstructionSet(&cUnit);
+
     dvmCompilerMIR2LIR(&cUnit);
 
-    dvmCompilerAssembleLIR(&cUnit);
+    dvmCompilerAssembleLIR(&cUnit, info);
 
     dvmCompilerDumpCompilationUnit(&cUnit);
 
     dvmCompilerArenaReset();
 
-    return cUnit.baseAddr + cUnit.headerSize;
+    return info->codeAddress != NULL;
 }