Fixed 2 floating point bugs; improved debug output; armv7-a thumb2 inline sqrt
diff --git a/vm/compiler/codegen/arm/Assemble.c b/vm/compiler/codegen/arm/Assemble.c
index 5a87014..fb85253 100644
--- a/vm/compiler/codegen/arm/Assemble.c
+++ b/vm/compiler/codegen/arm/Assemble.c
@@ -63,6 +63,8 @@
* u -> 1st half of bl[x] target
* v -> 2nd half ob bl[x] target
* R -> register list
+ * s -> single precision floating point register
+ * S -> double precision floating point register
*
* [!] escape. To insert "!", use "!!"
*/
@@ -364,75 +366,83 @@
ENCODING_MAP(THUMB2_VLDRS, 0xed900a00,
SFP, 22, 12, BITBLT, 19, 16, BITBLT, 7, 0,
IS_TERTIARY_OP,
- "vldr", "s!0d, [r!1d, #!2E]", 2),
+ "vldr", "!0s, [r!1d, #!2E]", 2),
ENCODING_MAP(THUMB2_VLDRD, 0xed900b00,
DFP, 22, 12, BITBLT, 19, 16, BITBLT, 7, 0,
IS_TERTIARY_OP,
- "vldr", "d!0d, [r!1d, #!2E]", 2),
+ "vldr", "!0S, [r!1d, #!2E]", 2),
ENCODING_MAP(THUMB2_VMULS, 0xee200a00,
SFP, 22, 12, SFP, 7, 16, SFP, 5, 0,
IS_TERTIARY_OP,
- "vmuls", "s!0d, s!1d, s!2d", 2),
+ "vmuls", "!0s, !1s, !2s", 2),
ENCODING_MAP(THUMB2_VMULD, 0xee200b00,
DFP, 22, 12, DFP, 7, 16, DFP, 5, 0,
IS_TERTIARY_OP,
- "vmuld", "d!0d, d!1d, d!2d", 2),
+ "vmuld", "!0S, !1S, !2S", 2),
ENCODING_MAP(THUMB2_VSTRS, 0xed800a00,
SFP, 22, 12, BITBLT, 19, 16, BITBLT, 7, 0,
IS_TERTIARY_OP,
- "vstr", "s!0d, [r!1d, #!2E]", 2),
+ "vstr", "!0s, [r!1d, #!2E]", 2),
ENCODING_MAP(THUMB2_VSTRD, 0xed800b00,
DFP, 22, 12, BITBLT, 19, 16, BITBLT, 7, 0,
IS_TERTIARY_OP,
- "vstr", "d!0d, [r!1d, #!2E]", 2),
+ "vstr", "!0S, [r!1d, #!2E]", 2),
ENCODING_MAP(THUMB2_VSUBS, 0xee300a40,
SFP, 22, 12, SFP, 7, 16, SFP, 5, 0,
IS_TERTIARY_OP,
- "vsub", "s!0d, s!1d, s!2d", 2),
+ "vsub", "!0s, !1s, !2s", 2),
ENCODING_MAP(THUMB2_VSUBD, 0xee300b40,
DFP, 22, 12, DFP, 7, 16, DFP, 5, 0,
IS_TERTIARY_OP,
- "vsub", "d!0d, s!1d, s!2d", 2),
+ "vsub", "!0S, !1S, !2S", 2),
ENCODING_MAP(THUMB2_VADDS, 0xee300a00,
SFP, 22, 12, SFP, 7, 16, SFP, 5, 0,
IS_TERTIARY_OP,
- "vadd", "s!0d, s!1d, s!2d", 2),
+ "vadd", "!0s, !1s, !2s", 2),
ENCODING_MAP(THUMB2_VADDD, 0xee300b00,
DFP, 22, 12, DFP, 7, 16, DFP, 5, 0,
IS_TERTIARY_OP,
- "vadd", "d!0d, s!1d, s!2d", 2),
+ "vadd", "!0S, !1S, !2S", 2),
ENCODING_MAP(THUMB2_VDIVS, 0xee800a00,
SFP, 22, 12, SFP, 7, 16, SFP, 5, 0,
IS_TERTIARY_OP,
- "vdivs", "s!0d, s!1d, s!2d", 2),
+ "vdivs", "!0s, !1s, !2s", 2),
ENCODING_MAP(THUMB2_VDIVD, 0xee800b00,
DFP, 22, 12, DFP, 7, 16, DFP, 5, 0,
IS_TERTIARY_OP,
- "vdivs", "s!0d, s!1d, s!2d", 2),
+ "vdivs", "!0S, !1S, !2S", 2),
ENCODING_MAP(THUMB2_VCVTIF, 0xeeb80ac0,
SFP, 22, 12, SFP, 5, 0, UNUSED, -1, -1,
IS_BINARY_OP,
- "vcvf.f32", "s!0d, s!1d", 2),
+ "vcvt.f32", "!0s, !1s", 2),
ENCODING_MAP(THUMB2_VCVTID, 0xeeb80bc0,
DFP, 22, 12, SFP, 5, 0, UNUSED, -1, -1,
IS_BINARY_OP,
- "vcvf.f64", "s!0d, s!1d", 2),
+ "vcvt.f64", "!0S, !1s", 2),
ENCODING_MAP(THUMB2_VCVTFI, 0xeebd0ac0,
SFP, 22, 12, SFP, 5, 0, UNUSED, -1, -1,
IS_BINARY_OP,
- "vcvf.s32.f32", "s!0d, s!1d", 2),
+ "vcvt.s32.f32 ", "!0s, !1s", 2),
ENCODING_MAP(THUMB2_VCVTDI, 0xeebd0bc0,
SFP, 22, 12, DFP, 5, 0, UNUSED, -1, -1,
IS_BINARY_OP,
- "vcvf.s32.f64", "s!0d, s!1d", 2),
+ "vcvt.s32.f64 ", "!0s, !1S", 2),
ENCODING_MAP(THUMB2_VCVTFD, 0xeeb70ac0,
DFP, 22, 12, SFP, 5, 0, UNUSED, -1, -1,
IS_BINARY_OP,
- "vcvf.f64.f32", "s!0d, s!1d", 2),
+ "vcvt.f64.f32 ", "!0S, !1s", 2),
ENCODING_MAP(THUMB2_VCVTDF, 0xeeb70bc0,
SFP, 22, 12, DFP, 5, 0, UNUSED, -1, -1,
IS_BINARY_OP,
- "vcvf.f32.f64", "s!0d, s!1d", 2),
+ "vcvt.f32.f64 ", "!0s, !1S", 2),
+ ENCODING_MAP(THUMB2_VSQRTS, 0xeeb10ac0,
+ SFP, 22, 12, SFP, 5, 0, UNUSED, -1, -1,
+ IS_BINARY_OP,
+ "vsqrt.f32 ", "!0s, !1s", 2),
+ ENCODING_MAP(THUMB2_VSQRTD, 0xeeb10bc0,
+ DFP, 22, 12, DFP, 5, 0, UNUSED, -1, -1,
+ IS_BINARY_OP,
+ "vsqrt.f64 ", "!0S, !1S", 2),
};
#define PADDING_MOV_R0_R0 0x1C00