Interpreter restructuring
This is a restructuring of the Dalvik ARM and x86 interpreters:
o Combine the old portstd and portdbg interpreters into a single
portable interpreter.
o Add debug/profiling support to the fast (mterp) interpreters.
o Delete old mechansim of switching between interpreters. Now, once
you choose an interpreter at startup, you stick with it.
o Allow JIT to co-exist with profiling & debugging (necessary for
first-class support of debugging with the JIT active).
o Adds single-step capability to the fast assembly interpreters without
slowing them down (and, in fact, measurably improves their performance).
o Remove old "polling for safe point" mechanism. Breakouts now achieved
via modifying base of interpreter handler table.
o Simplify interpeter control mechanism.
o Allow thread-granularity control for profiling & debugging
The primary motivation behind this change was to improve the responsiveness
of debugging and profiling and to make it easier to add new debugging and
profiling capabilities in the future. Instead of always bailing out to the
slow debug portable interpreter, we can now stay in the fast interpreter.
A nice side effect of the change is that the fast interpreters
got a healthy speed boost because we were able to replace the
polling safepoint check that involved a dozen or so instructions
with a single table-base reload. When combined with the two earlier CLs
related to this restructuring, we show a 5.6% performance improvement
using libdvm_interp.so on the Checkers benchmark relative to Honeycomb.
Change-Id: I8d37e866b3618def4e582fc73f1cf69ffe428f3c
diff --git a/vm/Debugger.c b/vm/Debugger.c
index 9570b5c..0f34ff6 100644
--- a/vm/Debugger.c
+++ b/vm/Debugger.c
@@ -392,12 +392,13 @@
*/
void dvmDbgActive(void)
{
- if (DEBUGGER_ACTIVE)
+ if (gDvm.debuggerActive)
return;
LOGI("Debugger is active\n");
dvmInitBreakpoints();
- dvmUpdateInterpBreak(kSubModeDebuggerActive, true);
+ gDvm.debuggerActive = true;
+ dvmUpdateAllInterpBreak(kInterpDebugBreak, kSubModeDebuggerActive, true);
}
/*
@@ -412,7 +413,8 @@
{
assert(gDvm.debuggerConnected);
- dvmUpdateInterpBreak(kSubModeDebuggerActive, false);
+ gDvm.debuggerActive = false;
+ dvmUpdateAllInterpBreak(kInterpDebugBreak, kSubModeDebuggerActive, false);
dvmHashTableLock(gDvm.dbgRegistry);
gDvm.debuggerConnected = false;
@@ -434,7 +436,7 @@
*/
bool dvmDbgIsDebuggerConnected(void)
{
- return DEBUGGER_ACTIVE;
+ return gDvm.debuggerActive;
}
/*
@@ -1781,7 +1783,7 @@
if (thread == NULL)
goto bail;
- result = thread->suspendCount;
+ result = thread->interpBreak.ctl.suspendCount;
bail:
dvmUnlockThreadList();
@@ -2543,7 +2545,7 @@
*/
void dvmDbgPostThreadStart(Thread* thread)
{
- if (DEBUGGER_ACTIVE) {
+ if (gDvm.debuggerActive) {
dvmJdwpPostThreadChange(gDvm.jdwpState,
objectToObjectId(thread->threadObj), true);
}
@@ -2556,7 +2558,7 @@
*/
void dvmDbgPostThreadDeath(Thread* thread)
{
- if (DEBUGGER_ACTIVE) {
+ if (gDvm.debuggerActive) {
dvmJdwpPostThreadChange(gDvm.jdwpState,
objectToObjectId(thread->threadObj), false);
}
@@ -2704,11 +2706,11 @@
* by rejecting the method invocation request. Without this, we will
* be stuck waiting on a suspended thread.
*/
- if (targetThread->suspendCount > 1) {
+ if (targetThread->interpBreak.ctl.suspendCount > 1) {
LOGW("threadid=%d: suspend count on threadid=%d is %d, too deep "
"for method exec\n",
dvmThreadSelf()->threadId, targetThread->threadId,
- targetThread->suspendCount);
+ targetThread->interpBreak.ctl.suspendCount);
err = ERR_THREAD_SUSPENDED; /* probably not expected here */
dvmUnlockThreadList();
goto bail;
diff --git a/vm/Debugger.h b/vm/Debugger.h
index 262e110..9a45b39 100644
--- a/vm/Debugger.h
+++ b/vm/Debugger.h
@@ -32,8 +32,6 @@
struct Method;
struct Thread;
-#define DEBUGGER_ACTIVE (gDvm.interpBreak & kSubModeDebuggerActive)
-
/*
* Used by StepControl to track a set of addresses associated with
* a single line.
diff --git a/vm/Dvm.mk b/vm/Dvm.mk
index 3b9dd50..c9b0e27 100644
--- a/vm/Dvm.mk
+++ b/vm/Dvm.mk
@@ -149,8 +149,7 @@
jdwp/JdwpMain.c \
jdwp/JdwpSocket.c \
mterp/Mterp.c.arm \
- mterp/out/InterpC-portstd.c.arm \
- mterp/out/InterpC-portdbg.c.arm \
+ mterp/out/InterpC-portable.c.arm \
native/InternalNative.c \
native/dalvik_bytecode_OpcodeInfo.c \
native/dalvik_system_DexFile.c \
diff --git a/vm/Globals.h b/vm/Globals.h
index 502926d..7ea4e8a 100644
--- a/vm/Globals.h
+++ b/vm/Globals.h
@@ -51,33 +51,6 @@
} AssertionControl;
/*
- * Execution mode, e.g. interpreter vs. JIT.
- */
-typedef enum ExecutionMode {
- kExecutionModeUnknown = 0,
- kExecutionModeInterpPortable,
- kExecutionModeInterpFast,
-#if defined(WITH_JIT)
- kExecutionModeJit,
-#endif
-} ExecutionMode;
-
-/*
- * Execution sub modes, e.g. debugging, profiling, etc.
- * Treated as bit flags for fast access. These values are used directly
- * by assembly code in the mterp interpeter and may also be used by
- * code generated by the JIT. Take care when changing.
- */
-typedef enum ExecutionSubModes {
- kSubModeNormal = 0x00,
- kSubModeMethodTrace = 0x01,
- kSubModeEmulatorTrace = 0x02,
- kSubModeInstCounting = 0x04,
- kSubModeDebuggerActive = 0x08,
- kSubModeSuspendRequest = 0x10, /* Set if any suspend request active */
-} ExecutionSubModes;
-
-/*
* Register map generation mode. Only applicable when generateRegisterMaps
* is enabled. (The "disabled" state is not folded into this because
* there are callers like dexopt that want to enable/disable without
@@ -452,9 +425,9 @@
pthread_mutex_t _threadSuspendLock;
/*
- * Guards Thread->suspendCount for all threads, and provides the lock
- * for the condition variable that all suspended threads sleep on
- * (threadSuspendCountCond).
+ * Guards Thread->interpBreak.ctl.suspendCount for all threads, and
+ * provides the lock for the condition variable that all suspended threads
+ * sleep on (threadSuspendCountCond).
*
* This has to be separate from threadListLock because of the way
* threads put themselves to sleep.
@@ -610,8 +583,13 @@
/*
* JDWP debugger support.
+ *
+ * Note: Each thread will normally determine whether the debugger is active
+ * for it by referring to its subMode flags. "debuggerActive" here should be
+ * seen as "debugger is making requests of 1 or more threads".
*/
bool debuggerConnected; /* debugger or DDMS is connected */
+ bool debuggerActive; /* debugger is making requests */
JdwpState* jdwpState;
/*
@@ -652,12 +630,15 @@
int allocRecordCount; /* #of valid entries */
/*
- * When normal control flow needs to be interrupted because
- * of an attached debugger, profiler, thread stop request, etc.,
- * a bit is set here. We collapse all stop reasons into
- * a single location for performance reasons.
+ * When a profiler is enabled, this is incremented. Distinct profilers
+ * include "dmtrace" method tracing, emulator method tracing, and
+ * possibly instruction counting.
+ *
+ * The purpose of this is to have a single value that shows whether any
+ * profiling is going on. Individual thread will normally check their
+ * thread-private subMode flags to take any profiling action.
*/
- volatile int interpBreak;
+ volatile int activeProfilers;
/*
* State for method-trace profiling.
diff --git a/vm/InlineNative.c b/vm/InlineNative.c
index 6b78878..f230c12 100644
--- a/vm/InlineNative.c
+++ b/vm/InlineNative.c
@@ -872,7 +872,7 @@
* Currently assuming that we're only inlining stuff loaded by the
* bootstrap class loader. This is a safe assumption for many reasons.
*/
-static Method* resolveInlineNative(int opIndex)
+Method* dvmResolveInlineNative(int opIndex)
{
assert(opIndex >= 0 && opIndex < NELEM(gDvmInlineOpsTable));
Method* method = gDvm.inlinedMethods[opIndex];
@@ -908,7 +908,7 @@
bool dvmPerformInlineOp4Dbg(u4 arg0, u4 arg1, u4 arg2, u4 arg3,
JValue* pResult, int opIndex)
{
- Method* method = resolveInlineNative(opIndex);
+ Method* method = dvmResolveInlineNative(opIndex);
if (method == NULL) {
return (*gDvmInlineOpsTable[opIndex].func)(arg0, arg1, arg2, arg3,
pResult);
diff --git a/vm/InlineNative.h b/vm/InlineNative.h
index 280f6af..4ca90e2 100644
--- a/vm/InlineNative.h
+++ b/vm/InlineNative.h
@@ -116,4 +116,9 @@
bool dvmPerformInlineOp4Dbg(u4 arg0, u4 arg1, u4 arg2, u4 arg3,
JValue* pResult, int opIndex);
+/*
+ * Return method & populate the table on first use.
+ */
+Method* dvmResolveInlineNative(int opIndex);
+
#endif /*_DALVIK_INLINENATIVE*/
diff --git a/vm/Profile.c b/vm/Profile.c
index d0d24b8..1635d79 100644
--- a/vm/Profile.c
+++ b/vm/Profile.c
@@ -201,10 +201,26 @@
/*
* Update the set of active profilers
*/
-static void updateActiveProfilers(ExecutionSubModes newMode, bool enable)
+static void updateActiveProfilers(InterpBreakFlags newBreak,
+ ExecutionSubModes newMode, bool enable)
{
- dvmUpdateInterpBreak(newMode, enable);
- LOGD("+++ active profiler set now %d\n", gDvm.interpBreak);
+ int oldValue, newValue;
+
+ // Update global count
+ do {
+ oldValue = gDvm.activeProfilers;
+ newValue = oldValue + (enable ? 1 : -1);
+ if (newValue < 0) {
+ LOGE("Can't have %d active profilers\n", newValue);
+ dvmAbort();
+ }
+ } while (android_atomic_release_cas(oldValue, newValue,
+ &gDvm.activeProfilers) != 0);
+
+ // Tell the threads
+ dvmUpdateAllInterpBreak(newBreak, newMode, enable);
+
+ LOGD("+++ active profiler count now %d\n", newValue);
}
@@ -319,9 +335,12 @@
dvmMethodTraceStop();
dvmLockMutex(&state->startStopLock);
}
- /* Should only have a single trace going at once */
- assert((gDvm.interpBreak & kSubModeMethodTrace) == 0);
- updateActiveProfilers(kSubModeMethodTrace, true);
+ /*
+ * ENHANCEMENT: To trace just a single thread, modify the
+ * following to take a Thread* argument, and set the appropriate
+ * interpBreak flags only on the target thread.
+ */
+ updateActiveProfilers(kInterpNoBreak, kSubModeMethodTrace, true);
LOGI("TRACE STARTED: '%s' %dKB\n", traceFileName, bufferSize / 1024);
/*
@@ -389,7 +408,7 @@
return;
fail:
- updateActiveProfilers(kSubModeMethodTrace, false);
+ updateActiveProfilers(kInterpNoBreak, kSubModeMethodTrace, false);
if (state->traceFile != NULL) {
fclose(state->traceFile);
state->traceFile = NULL;
@@ -481,7 +500,7 @@
dvmUnlockMutex(&state->startStopLock);
return;
} else {
- updateActiveProfilers(kSubModeMethodTrace, false);
+ updateActiveProfilers(kInterpNoBreak, kSubModeMethodTrace, false);
}
/* compute elapsed time */
@@ -547,7 +566,7 @@
LOGI("TRACE STOPPED%s: writing %d records\n",
state->overflow ? " (NOTE: overflowed buffer)" : "",
(finalCurOffset - TRACE_HEADER_LEN) / TRACE_REC_SIZE);
- if (DEBUGGER_ACTIVE) {
+ if (gDvm.debuggerActive) {
LOGW("WARNING: a debugger is active; method-tracing results "
"will be skewed\n");
}
@@ -708,19 +727,19 @@
*/
void dvmFastMethodTraceEnter(const Method* method, Thread* self)
{
- if (gDvm.interpBreak & kSubModeMethodTrace) {
+ if (self->interpBreak.ctl.subMode & kSubModeMethodTrace) {
dvmMethodTraceAdd(self, method, METHOD_TRACE_ENTER);
}
}
/*
* Register the METHOD_TRACE_EXIT action for the fast interpreter and
- * JIT'ed code for Java methods. The about-to-return callee method can be
+ * JIT'ed code for methods. The about-to-return callee method can be
* retrieved from self->interpSave.method.
*/
-void dvmFastJavaMethodTraceExit(Thread* self)
+void dvmFastMethodTraceExit(Thread* self)
{
- if (gDvm.interpBreak & kSubModeMethodTrace) {
+ if (self->interpBreak.ctl.subMode & kSubModeMethodTrace) {
dvmMethodTraceAdd(self, self->interpSave.method,
METHOD_TRACE_EXIT);
}
@@ -733,7 +752,7 @@
*/
void dvmFastNativeMethodTraceExit(const Method* method, Thread* self)
{
- if (gDvm.interpBreak & kSubModeMethodTrace) {
+ if (self->interpBreak.ctl.subMode & kSubModeMethodTrace) {
dvmMethodTraceAdd(self, method, METHOD_TRACE_EXIT);
}
}
@@ -747,7 +766,7 @@
#ifdef UPDATE_MAGIC_PAGE
/*
* We store the address of the Dalvik bytecodes to the memory-mapped
- * trace page for normal Java methods. We also trace calls to native
+ * trace page for normal methods. We also trace calls to native
* functions by storing the address of the native function to the
* trace page.
* Abstract methods don't have any bytecodes, so we don't trace them.
@@ -768,7 +787,7 @@
* 1 = EXIT
* 2 = UNROLL
* To help the trace tools reconstruct the runtime stack containing
- * a mix of Java plus native methods, we add 4 to the action if this
+ * a mix of normal plus native methods, we add 4 to the action if this
* is a native method.
*/
action += 4;
@@ -843,7 +862,8 @@
gDvm.emulatorTraceEnableCount++;
if (gDvm.emulatorTraceEnableCount == 1)
LOGD("--- emulator method traces enabled\n");
- updateActiveProfilers(kSubModeEmulatorTrace, true);
+ updateActiveProfilers(kInterpEmulatorTraceBreak, kSubModeEmulatorTrace,
+ true);
}
/*
@@ -859,7 +879,7 @@
gDvm.emulatorTraceEnableCount--;
if (gDvm.emulatorTraceEnableCount == 0)
LOGD("--- emulator method traces disabled\n");
- updateActiveProfilers(kSubModeEmulatorTrace,
+ updateActiveProfilers(kInterpEmulatorTraceBreak, kSubModeEmulatorTrace,
(gDvm.emulatorTraceEnableCount != 0));
}
@@ -871,7 +891,7 @@
{
/* in theory we should make this an atomic inc; in practice not important */
gDvm.instructionCountEnableCount++;
- updateActiveProfilers(kSubModeInstCounting, true);
+ updateActiveProfilers(kInterpInstCountBreak, kSubModeInstCounting, true);
}
/*
@@ -884,7 +904,7 @@
dvmAbort();
}
gDvm.instructionCountEnableCount--;
- updateActiveProfilers(kSubModeInstCounting,
+ updateActiveProfilers(kInterpInstCountBreak, kSubModeInstCounting,
(gDvm.instructionCountEnableCount != 0));
}
diff --git a/vm/Profile.h b/vm/Profile.h
index 0cd6495..b821394 100644
--- a/vm/Profile.h
+++ b/vm/Profile.h
@@ -107,25 +107,25 @@
/*
* Call these when a method enters or exits.
*/
-#define TRACE_METHOD_ENTER(_self, _method) \
+#define TRACE_METHOD_ENTER(_self, _method) \
do { \
- if (gDvm.interpBreak & kSubModeMethodTrace) \
+ if (_self->interpBreak.ctl.subMode & kSubModeMethodTrace) \
dvmMethodTraceAdd(_self, _method, METHOD_TRACE_ENTER); \
- if (gDvm.interpBreak & kSubModeEmulatorTrace) \
+ if (_self->interpBreak.ctl.subMode & kSubModeEmulatorTrace) \
dvmEmitEmulatorTrace(_method, METHOD_TRACE_ENTER); \
} while(0);
-#define TRACE_METHOD_EXIT(_self, _method) \
+#define TRACE_METHOD_EXIT(_self, _method) \
do { \
- if (gDvm.interpBreak & kSubModeMethodTrace) \
+ if (_self->interpBreak.ctl.subMode & kSubModeMethodTrace) \
dvmMethodTraceAdd(_self, _method, METHOD_TRACE_EXIT); \
- if (gDvm.interpBreak & kSubModeEmulatorTrace) \
+ if (_self->interpBreak.ctl.subMode & kSubModeEmulatorTrace) \
dvmEmitEmulatorTrace(_method, METHOD_TRACE_EXIT); \
} while(0);
-#define TRACE_METHOD_UNROLL(_self, _method) \
+#define TRACE_METHOD_UNROLL(_self, _method) \
do { \
- if (gDvm.interpBreak & kSubModeMethodTrace) \
+ if (_self->interpBreak.ctl.subMode & kSubModeMethodTrace) \
dvmMethodTraceAdd(_self, _method, METHOD_TRACE_UNROLL); \
- if (gDvm.interpBreak & kSubModeEmulatorTrace) \
+ if (_self->interpBreak.ctl.subMode & kSubModeEmulatorTrace) \
dvmEmitEmulatorTrace(_method, METHOD_TRACE_UNROLL); \
} while(0);
@@ -138,7 +138,7 @@
void dvmMethodTraceClassPrepEnd(void);
void dvmFastMethodTraceEnter(const Method* method, struct Thread* self);
-void dvmFastJavaMethodTraceExit(struct Thread* self);
+void dvmFastMethodTraceExit(struct Thread* self);
void dvmFastNativeMethodTraceExit(const Method* method, struct Thread* self);
/*
diff --git a/vm/Thread.c b/vm/Thread.c
index 33d6599..b347834 100644
--- a/vm/Thread.c
+++ b/vm/Thread.c
@@ -243,21 +243,6 @@
static int getThreadPriorityFromSystem(void);
/*
- * If there is any thread suspend request outstanding,
- * we need to mark it in interpState to signal the interpreter that
- * something is pending. We do this by maintaining a global sum of
- * all threads' suspend counts. All suspendCount updates should go
- * through this after aquiring threadSuspendCountLock.
- */
-static void dvmAddToThreadSuspendCount(int *pSuspendCount, int delta)
-{
- *pSuspendCount += delta;
- gDvm.sumThreadSuspendCount += delta;
- dvmUpdateInterpBreak(kSubModeSuspendRequest,
- (gDvm.sumThreadSuspendCount != 0));
-}
-
-/*
* Initialize thread list and main thread's environment. We need to set
* up some basic stuff so that dvmThreadSelf() will work when we start
* loading classes (e.g. to check for exceptions).
@@ -578,7 +563,7 @@
/* mark as suspended */
lockThreadSuspendCount();
- dvmAddToThreadSuspendCount(&target->suspendCount, 1);
+ dvmAddToSuspendCounts(target, 1, 0);
unlockThreadSuspendCount();
doWait = true;
@@ -832,6 +817,11 @@
if (thread == NULL)
return NULL;
+ /* Check sizes and alignment */
+ assert((((uintptr_t)&thread->interpBreak.all) & 0x7) == 0);
+ assert(sizeof(thread->interpBreak) == sizeof(thread->interpBreak.all));
+
+
#if defined(WITH_SELF_VERIFICATION)
if (dvmSelfVerificationShadowSpaceAlloc(thread) == NULL)
return NULL;
@@ -840,7 +830,6 @@
assert(interpStackSize >= kMinStackSize && interpStackSize <=kMaxStackSize);
thread->status = THREAD_INITIALIZING;
- thread->suspendCount = 0;
/*
* Allocate and initialize the interpreted code stack. We essentially
@@ -879,7 +868,7 @@
#ifndef DVM_NO_ASM_INTERP
thread->mainHandlerTable = dvmAsmInstructionStart;
thread->altHandlerTable = dvmAsmAltInstructionStart;
- thread->curHandlerTable = thread->mainHandlerTable;
+ thread->interpBreak.ctl.curHandlerTable = thread->mainHandlerTable;
#endif
/* give the thread code a chance to set things up */
@@ -1682,7 +1671,7 @@
bail:
/* Remove this thread's suspendCount from global suspendCount sum */
lockThreadSuspendCount();
- dvmAddToThreadSuspendCount(&self->suspendCount, -self->suspendCount);
+ dvmAddToSuspendCounts(self, -self->interpBreak.ctl.suspendCount, 0);
unlockThreadSuspendCount();
dvmReleaseTrackedAlloc(exception, self);
}
@@ -2247,11 +2236,10 @@
//assert(thread->handle != dvmJdwpGetDebugThread(gDvm.jdwpState));
lockThreadSuspendCount();
- dvmAddToThreadSuspendCount(&thread->suspendCount, 1);
- thread->dbgSuspendCount++;
+ dvmAddToSuspendCounts(thread, 1, 1);
LOG_THREAD("threadid=%d: suspend++, now=%d\n",
- thread->threadId, thread->suspendCount);
+ thread->threadId, thread->interpBreak.ctl.suspendCount);
unlockThreadSuspendCount();
waitForThreadSuspend(dvmThreadSelf(), thread);
@@ -2275,18 +2263,17 @@
//assert(thread->handle != dvmJdwpGetDebugThread(gDvm.jdwpState));
lockThreadSuspendCount();
- if (thread->suspendCount > 0) {
- dvmAddToThreadSuspendCount(&thread->suspendCount, -1);
- thread->dbgSuspendCount--;
+ if (thread->interpBreak.ctl.suspendCount > 0) {
+ dvmAddToSuspendCounts(thread, -1, -1);
} else {
LOG_THREAD("threadid=%d: suspendCount already zero\n",
thread->threadId);
}
LOG_THREAD("threadid=%d: suspend--, now=%d\n",
- thread->threadId, thread->suspendCount);
+ thread->threadId, thread->interpBreak.ctl.suspendCount);
- if (thread->suspendCount == 0) {
+ if (thread->interpBreak.ctl.suspendCount == 0) {
dvmBroadcastCond(&gDvm.threadSuspendCountCond);
}
@@ -2313,13 +2300,12 @@
* though.
*/
lockThreadSuspendCount();
- dvmAddToThreadSuspendCount(&self->suspendCount, 1);
- self->dbgSuspendCount++;
+ dvmAddToSuspendCounts(self, 1, 1);
/*
* Suspend ourselves.
*/
- assert(self->suspendCount > 0);
+ assert(self->interpBreak.ctl.suspendCount > 0);
self->status = THREAD_SUSPENDED;
LOG_THREAD("threadid=%d: self-suspending (dbg)\n", self->threadId);
@@ -2336,10 +2322,10 @@
dvmJdwpClearWaitForEventThread(gDvm.jdwpState);
}
- while (self->suspendCount != 0) {
+ while (self->interpBreak.ctl.suspendCount != 0) {
dvmWaitCond(&gDvm.threadSuspendCountCond,
&gDvm.threadSuspendCountLock);
- if (self->suspendCount != 0) {
+ if (self->interpBreak.ctl.suspendCount != 0) {
/*
* The condition was signaled but we're still suspended. This
* can happen if the debugger lets go while a SIGQUIT thread
@@ -2347,10 +2333,12 @@
* just long enough to try to grab the thread-suspend lock).
*/
LOGD("threadid=%d: still suspended after undo (sc=%d dc=%d)\n",
- self->threadId, self->suspendCount, self->dbgSuspendCount);
+ self->threadId, self->interpBreak.ctl.suspendCount,
+ self->interpBreak.ctl.dbgSuspendCount);
}
}
- assert(self->suspendCount == 0 && self->dbgSuspendCount == 0);
+ assert(self->interpBreak.ctl.suspendCount == 0 &&
+ self->interpBreak.ctl.dbgSuspendCount == 0);
self->status = THREAD_RUNNING;
LOG_THREAD("threadid=%d: self-reviving (dbg), status=%d\n",
self->threadId, self->status);
@@ -2656,7 +2644,7 @@
* This can happen when a couple of threads have simultaneous events
* of interest to the debugger.
*/
- //assert(self->suspendCount == 0);
+ //assert(self->interpBreak.ctl.suspendCount == 0);
/*
* Increment everybody's suspend count (except our own).
@@ -2673,9 +2661,10 @@
thread->handle == dvmJdwpGetDebugThread(gDvm.jdwpState))
continue;
- dvmAddToThreadSuspendCount(&thread->suspendCount, 1);
- if (why == SUSPEND_FOR_DEBUG || why == SUSPEND_FOR_DEBUG_EVENT)
- thread->dbgSuspendCount++;
+ dvmAddToSuspendCounts(thread, 1,
+ (why == SUSPEND_FOR_DEBUG ||
+ why == SUSPEND_FOR_DEBUG_EVENT)
+ ? 1 : 0);
}
unlockThreadSuspendCount();
@@ -2707,8 +2696,9 @@
LOG_THREAD("threadid=%d: threadid=%d status=%d sc=%d dc=%d\n",
self->threadId,
- thread->threadId, thread->status, thread->suspendCount,
- thread->dbgSuspendCount);
+ thread->threadId, thread->status,
+ thread->interpBreak.ctl.suspendCount,
+ thread->interpBreak.ctl.dbgSuspendCount);
}
dvmUnlockThreadList();
@@ -2749,10 +2739,11 @@
continue;
}
- if (thread->suspendCount > 0) {
- dvmAddToThreadSuspendCount(&thread->suspendCount, -1);
- if (why == SUSPEND_FOR_DEBUG || why == SUSPEND_FOR_DEBUG_EVENT)
- thread->dbgSuspendCount--;
+ if (thread->interpBreak.ctl.suspendCount > 0) {
+ dvmAddToSuspendCounts(thread, -1,
+ (why == SUSPEND_FOR_DEBUG ||
+ why == SUSPEND_FOR_DEBUG_EVENT)
+ ? -1 : 0);
} else {
LOG_THREAD("threadid=%d: suspendCount already zero\n",
thread->threadId);
@@ -2836,14 +2827,15 @@
/* debugger events don't suspend JDWP thread */
if (thread->handle == dvmJdwpGetDebugThread(gDvm.jdwpState)) {
- assert(thread->dbgSuspendCount == 0);
+ assert(thread->interpBreak.ctl.dbgSuspendCount == 0);
continue;
}
- assert(thread->suspendCount >= thread->dbgSuspendCount);
- dvmAddToThreadSuspendCount(&thread->suspendCount,
- -thread->dbgSuspendCount);
- thread->dbgSuspendCount = 0;
+ assert(thread->interpBreak.ctl.suspendCount >=
+ thread->interpBreak.ctl.dbgSuspendCount);
+ dvmAddToSuspendCounts(thread,
+ -thread->interpBreak.ctl.dbgSuspendCount,
+ -thread->interpBreak.ctl.dbgSuspendCount);
}
unlockThreadSuspendCount();
dvmUnlockThreadList();
@@ -2888,7 +2880,8 @@
* we hold suspendCountLock).
*/
- return (thread->suspendCount != 0 && thread->status != THREAD_RUNNING);
+ return (thread->interpBreak.ctl.suspendCount != 0 &&
+ thread->status != THREAD_RUNNING);
}
/*
@@ -2932,21 +2925,21 @@
static bool fullSuspendCheck(Thread* self)
{
assert(self != NULL);
- assert(self->suspendCount >= 0);
+ assert(self->interpBreak.ctl.suspendCount >= 0);
/*
* Grab gDvm.threadSuspendCountLock. This gives us exclusive write
- * access to self->suspendCount.
+ * access to self->interpBreak.ctl.suspendCount.
*/
lockThreadSuspendCount(); /* grab gDvm.threadSuspendCountLock */
- bool needSuspend = (self->suspendCount != 0);
+ bool needSuspend = (self->interpBreak.ctl.suspendCount != 0);
if (needSuspend) {
LOG_THREAD("threadid=%d: self-suspending\n", self->threadId);
ThreadStatus oldStatus = self->status; /* should be RUNNING */
self->status = THREAD_SUSPENDED;
- while (self->suspendCount != 0) {
+ while (self->interpBreak.ctl.suspendCount != 0) {
/*
* Wait for wakeup signal, releasing lock. The act of releasing
* and re-acquiring the lock provides the memory barriers we
@@ -2955,7 +2948,8 @@
dvmWaitCond(&gDvm.threadSuspendCountCond,
&gDvm.threadSuspendCountLock);
}
- assert(self->suspendCount == 0 && self->dbgSuspendCount == 0);
+ assert(self->interpBreak.ctl.suspendCount == 0 &&
+ self->interpBreak.ctl.dbgSuspendCount == 0);
self->status = oldStatus;
LOG_THREAD("threadid=%d: self-reviving, status=%d\n",
self->threadId, self->status);
@@ -2973,7 +2967,7 @@
bool dvmCheckSuspendPending(Thread* self)
{
assert(self != NULL);
- if (self->suspendCount == 0) {
+ if (self->interpBreak.ctl.suspendCount == 0) {
return false;
} else {
return fullSuspendCheck(self);
@@ -3053,7 +3047,7 @@
* on SMP and slightly more correct, but less convenient.
*/
android_atomic_acquire_store(newStatus, &self->status);
- if (self->suspendCount != 0) {
+ if (self->interpBreak.ctl.suspendCount != 0) {
fullSuspendCheck(self);
}
} else {
@@ -3467,8 +3461,8 @@
);
dvmPrintDebugMessage(target,
" | group=\"%s\" sCount=%d dsCount=%d obj=%p self=%p\n",
- groupName, thread->suspendCount, thread->dbgSuspendCount,
- thread->threadObj, thread);
+ groupName, thread->interpBreak.ctl.suspendCount,
+ thread->interpBreak.ctl.dbgSuspendCount, thread->threadObj, thread);
dvmPrintDebugMessage(target,
" | sysTid=%d nice=%d sched=%d/%d cgrp=%s handle=%d\n",
thread->systemTid, getpriority(PRIO_PROCESS, thread->systemTid),
diff --git a/vm/Thread.h b/vm/Thread.h
index 8b2b442..d59aafb 100644
--- a/vm/Thread.h
+++ b/vm/Thread.h
@@ -81,6 +81,25 @@
#define kMaxStackSize (256*1024 + STACK_OVERFLOW_RESERVE)
/*
+ * Interpreter control struction. Packed into a long long to enable
+ * atomic updates.
+ */
+typedef union InterpBreak {
+ volatile int64_t all;
+ struct {
+ uint8_t breakFlags;
+ uint8_t subMode;
+ int8_t suspendCount;
+ int8_t dbgSuspendCount;
+#ifndef DVM_NO_ASM_INTERP
+ void* curHandlerTable;
+#else
+ void* unused;
+#endif
+ } ctl;
+} InterpBreak;
+
+/*
* Our per-thread data.
*
* These are allocated on the system heap.
@@ -92,34 +111,16 @@
* element in Thread.
*/
InterpSaveState interpSave;
+
+ /* small unique integer; useful for "thin" locks and debug messages */
+ u4 threadId;
+
/*
* Begin interpreter state which does not need to be preserved, but should
* be located towards the beginning of the Thread structure for
* efficiency.
*/
JValue retval;
- /*
- * This is the number of times the thread has been suspended. When the
- * count drops to zero, the thread resumes.
- *
- * "dbgSuspendCount" is the portion of the suspend count that the
- * debugger is responsible for. This has to be tracked separately so
- * that we can recover correctly if the debugger abruptly disconnects
- * (suspendCount -= dbgSuspendCount). The debugger should not be able
- * to resume GC-suspended threads, because we ignore the debugger while
- * a GC is in progress.
- *
- * Both of these are guarded by gDvm.threadSuspendCountLock.
- *
- * (We could store both of these in the same 32-bit, using 16-bit
- * halves, to make atomic ops possible. In practice, you only need
- * to read suspendCount, and we need to hold a mutex when making
- * changes, so there's no need to merge them. Note the non-debug
- * component will rarely be other than 1 or 0 -- not sure it's even
- * possible with the way mutexes are currently used.)
- */
- int suspendCount;
- int dbgSuspendCount;
u1* cardTable;
@@ -131,27 +132,54 @@
/* current exception, or NULL if nothing pending */
Object* exception;
- /* small unique integer; useful for "thin" locks and debug messages */
- u4 threadId;
-
bool debugIsMethodEntry;
/* interpreter stack size; our stacks are fixed-length */
int interpStackSize;
bool stackOverflowed;
- InterpEntry entryPoint; // What to do when we start the interpreter
+ /* thread handle, as reported by pthread_self() */
+ pthread_t handle;
+
+ /*
+ * interpBreak contains info about the interpreter mode, as well as
+ * a count of the number of times the thread has been suspended. When
+ * the count drops to zero, the thread resumes.
+ *
+ * "dbgSuspendCount" is the portion of the suspend count that the
+ * debugger is responsible for. This has to be tracked separately so
+ * that we can recover correctly if the debugger abruptly disconnects
+ * (suspendCount -= dbgSuspendCount). The debugger should not be able
+ * to resume GC-suspended threads, because we ignore the debugger while
+ * a GC is in progress.
+ *
+ * Both of these are guarded by gDvm.threadSuspendCountLock.
+ *
+ * Note the non-debug component will rarely be other than 1 or 0 -- (not
+ * sure it's even possible with the way mutexes are currently used.)
+ */
+ InterpBreak interpBreak;
+
/* Assembly interpreter handler tables */
#ifndef DVM_NO_ASM_INTERP
- void* curHandlerTable; // Either main or alt table
void* mainHandlerTable; // Table of actual instruction handler
void* altHandlerTable; // Table of breakout handlers
#else
void* unused0; // Consume space to keep offsets
void* unused1; // the same between builds with
- void* unused2; // and without assembly interpreters
#endif
+ /*
+ * singleStepCount is a countdown timer used with the breakFlag
+ * kInterpSingleStep. If kInterpSingleStep is set in breakFlags,
+ * singleStepCount will decremented each instruction execution.
+ * Once it reaches zero, the kInterpSingleStep flag in breakFlags
+ * will be cleared. This can be used to temporarily prevent
+ * execution from re-entering JIT'd code or force inter-instruction
+ * checks by delaying the reset of curHandlerTable to mainHandlerTable.
+ */
+ int singleStepCount;
+
#ifdef WITH_JIT
struct JitToInterpEntries jitToInterpEntries;
/*
@@ -162,13 +190,15 @@
*/
void* inJitCodeCache;
unsigned char* pJitProfTable;
- unsigned char** ppJitProfTable; // Used to refresh pJitProfTable
int jitThreshold;
- const void* jitResumeNPC;
- const u2* jitResumeDPC;
+ const void* jitResumeNPC; // Translation return point
+ const u4* jitResumeNSP; // Native SP at return point
+ const u2* jitResumeDPC; // Dalvik inst following single-step
JitState jitState;
int icRechainCount;
const void* pProfileCountdown;
+ const ClassObject* callsiteClass;
+ const Method* methodToCall;
#endif
/* JNI local reference tracking */
@@ -185,6 +215,7 @@
const u2* currRunHead; // Start of run we're building
int currRunLen; // Length of run in 16-bit words
const u2* lastPC; // Stage the PC for the threaded interpreter
+ const Method* traceMethod; // Starting method of current trace
intptr_t threshFilter[JIT_TRACE_THRESH_FILTER_SIZE];
JitTraceRun trace[MAX_JIT_RUN_LEN];
#endif
@@ -195,9 +226,6 @@
*/
volatile ThreadStatus status;
- /* thread handle, as reported by pthread_self() */
- pthread_t handle;
-
/* thread ID, only useful under Linux */
pid_t systemTid;
@@ -254,9 +282,6 @@
/* JDWP invoke-during-breakpoint support */
DebugInvokeReq invokeReq;
- /* Interpreter switching */
- int nextMode;
-
/* base time for per-thread CPU timing (used by method profiling) */
bool cpuClockBaseSet;
u8 cpuClockBase;
@@ -358,7 +383,7 @@
* count is nonzero.
*/
INLINE bool dvmCheckSuspendQuick(Thread* self) {
- return (self->suspendCount != 0);
+ return (self->interpBreak.ctl.breakFlags & kInterpSuspendBreak);
}
/*
diff --git a/vm/alloc/HeapWorker.c b/vm/alloc/HeapWorker.c
index 945142d..6017381 100644
--- a/vm/alloc/HeapWorker.c
+++ b/vm/alloc/HeapWorker.c
@@ -129,7 +129,7 @@
u8 delta = now - heapWorkerInterpStartTime;
if (delta > HEAP_WORKER_WATCHDOG_TIMEOUT &&
- (DEBUGGER_ACTIVE || gDvm.nativeDebuggerActive))
+ (gDvm.debuggerActive || gDvm.nativeDebuggerActive))
{
/*
* Debugger suspension can block the thread indefinitely. For
diff --git a/vm/arch/x86/Call386ABI.S b/vm/arch/x86/Call386ABI.S
index 3722bfa..39a0e93 100644
--- a/vm/arch/x86/Call386ABI.S
+++ b/vm/arch/x86/Call386ABI.S
@@ -97,7 +97,8 @@
movl 16(%ebp),%ebx
testl %ebx,%ebx
js dvmAbort
-/* Get the size of the variable region, add two more slots for the first
+/*
+ * Get the size of the variable region, add two more slots for the first
* two arguments and grow (preserving alignment)
*/
movl %ebx,%ecx
diff --git a/vm/compiler/Compiler.c b/vm/compiler/Compiler.c
index 817b7e6..a485ca5 100644
--- a/vm/compiler/Compiler.c
+++ b/vm/compiler/Compiler.c
@@ -146,7 +146,7 @@
dvmLockMutex(&gDvmJit.compilerLock);
while (workQueueLength() != 0 && !gDvmJit.haltCompilerThread &&
- self->suspendCount == 0) {
+ self->interpBreak.ctl.suspendCount == 0) {
/*
* Use timed wait here - more than one mutator threads may be blocked
* but the compiler thread will only signal once when the queue is
@@ -420,7 +420,7 @@
* NOTE: the profile table must only be allocated once, globally.
* Profiling is turned on and off by nulling out gDvm.pJitProfTable
* and then restoring its original value. However, this action
- * is not syncronized for speed so threads may continue to hold
+ * is not synchronized for speed so threads may continue to hold
* and update the profile table after profiling has been turned
* off by null'ng the global pointer. Be aware.
*/
@@ -458,6 +458,7 @@
gDvmJit.pProfTable = dvmDebuggerOrProfilerActive() ? NULL : pJitProfTable;
gDvmJit.pProfTableCopy = pJitProfTable;
gDvmJit.pJitTraceProfCounters = pJitTraceProfCounters;
+ dvmJitUpdateState();
dvmUnlockMutex(&gDvmJit.tableLock);
/* Signal running threads to refresh their cached pJitTable pointers */
@@ -738,6 +739,7 @@
/* Disable new translation requests */
gDvmJit.pProfTable = NULL;
gDvmJit.pProfTableCopy = NULL;
+ dvmJitUpdateState();
if (gDvm.verboseShutdown ||
gDvmJit.profileMode == kTraceProfilingContinuous) {
@@ -796,7 +798,7 @@
* may be executed before the compiler thread has finished
* initialization.
*/
- if ((gDvm.interpBreak & kSubModeMethodTrace) &&
+ if ((gDvm.activeProfilers != 0) &&
!gDvmJit.methodTraceSupport) {
bool resetRequired;
/*
@@ -828,4 +830,6 @@
dvmUnlockMutex(&gDvmJit.tableLock);
if (needUnchain)
dvmJitUnchainAll();
+ // Make sure all threads have current values
+ dvmJitUpdateState();
}
diff --git a/vm/compiler/codegen/arm/CodegenDriver.c b/vm/compiler/codegen/arm/CodegenDriver.c
index 2937cf2..1272f9b 100644
--- a/vm/compiler/codegen/arm/CodegenDriver.c
+++ b/vm/compiler/codegen/arm/CodegenDriver.c
@@ -1422,15 +1422,16 @@
#endif
/*
- * Fetch *self->suspendCount. If the suspend count is non-zero,
+ * Fetch *self->info.breakFlags. If the breakFlags are non-zero,
* punt to the interpreter.
*/
static void genSuspendPoll(CompilationUnit *cUnit, MIR *mir)
{
int rTemp = dvmCompilerAllocTemp(cUnit);
ArmLIR *ld;
- ld = loadWordDisp(cUnit, r6SELF, offsetof(Thread, suspendCount),
- rTemp);
+ ld = loadBaseDisp(cUnit, NULL, r6SELF,
+ offsetof(Thread, interpBreak.ctl.breakFlags),
+ rTemp, kUnsignedByte, INVALID_SREG);
setMemRefType(ld, true /* isLoad */, kMustNotAlias);
genRegImmCheck(cUnit, kArmCondNe, rTemp, 0, mir->offset, NULL);
}
diff --git a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c
index 076f5f1..c1792ed 100644
--- a/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv5te-vfp/ArchVariant.c
@@ -83,6 +83,9 @@
/* No method JIT for Thumb backend */
gDvmJit.disableOpt |= (1 << kMethodJit);
+ // Make sure all threads have current values
+ dvmJitUpdateState();
+
return true;
}
diff --git a/vm/compiler/codegen/arm/armv5te/ArchVariant.c b/vm/compiler/codegen/arm/armv5te/ArchVariant.c
index 73d27f9..817b68a 100644
--- a/vm/compiler/codegen/arm/armv5te/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv5te/ArchVariant.c
@@ -83,6 +83,9 @@
/* No method JIT for Thumb backend */
gDvmJit.disableOpt |= (1 << kMethodJit);
+ // Make sure all threads have current values
+ dvmJitUpdateState();
+
return true;
}
diff --git a/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.c b/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.c
index bcd6a46..ff80662 100644
--- a/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv7-a-neon/ArchVariant.c
@@ -78,6 +78,9 @@
/* FIXME - comment out the following to enable method-based JIT */
gDvmJit.disableOpt |= (1 << kMethodJit);
+ // Make sure all threads have current values
+ dvmJitUpdateState();
+
return true;
}
diff --git a/vm/compiler/codegen/arm/armv7-a/ArchVariant.c b/vm/compiler/codegen/arm/armv7-a/ArchVariant.c
index bcd6a46..ff80662 100644
--- a/vm/compiler/codegen/arm/armv7-a/ArchVariant.c
+++ b/vm/compiler/codegen/arm/armv7-a/ArchVariant.c
@@ -78,6 +78,9 @@
/* FIXME - comment out the following to enable method-based JIT */
gDvmJit.disableOpt |= (1 << kMethodJit);
+ // Make sure all threads have current values
+ dvmJitUpdateState();
+
return true;
}
diff --git a/vm/compiler/codegen/x86/ia32/ArchVariant.c b/vm/compiler/codegen/x86/ia32/ArchVariant.c
index 4ccd56f..2abac88 100644
--- a/vm/compiler/codegen/x86/ia32/ArchVariant.c
+++ b/vm/compiler/codegen/x86/ia32/ArchVariant.c
@@ -76,6 +76,9 @@
*/
assert((offsetof(Thread, jitToInterpEntries) +
sizeof(struct JitToInterpEntries)) <= 128);
+
+ // Make sure all threads have current values
+ dvmJitUpdateState();
return true;
}
diff --git a/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_CHAIN.S b/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_CHAIN.S
index 503d190..e76b766 100644
--- a/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_CHAIN.S
+++ b/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_CHAIN.S
@@ -9,7 +9,7 @@
@ methodToCall is guaranteed to be non-native
$chaintgt:
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -27,7 +27,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne r12 @ bail to the interpreter
ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex
diff --git a/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_NATIVE.S b/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_NATIVE.S
index 8681532..38ade41 100644
--- a/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_NATIVE.S
+++ b/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_NATIVE.S
@@ -1,7 +1,7 @@
@ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite
@ r7 = methodToCall->registersSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -16,7 +16,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc
#if !defined(WITH_SELF_VERIFICATION)
bxne lr @ bail to the interpreter
diff --git a/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_NO_OPT.S b/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_NO_OPT.S
index 12b5e61..c88e1f2 100644
--- a/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_NO_OPT.S
+++ b/vm/compiler/template/armv5te/TEMPLATE_INVOKE_METHOD_NO_OPT.S
@@ -7,7 +7,7 @@
ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -27,7 +27,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne lr @ bail to the interpreter
tst r10, #ACC_NATIVE
#if !defined(WITH_SELF_VERIFICATION)
diff --git a/vm/compiler/template/armv5te/TEMPLATE_MONITOR_ENTER.S b/vm/compiler/template/armv5te/TEMPLATE_MONITOR_ENTER.S
index 344a0da..1ed3fb1 100644
--- a/vm/compiler/template/armv5te/TEMPLATE_MONITOR_ENTER.S
+++ b/vm/compiler/template/armv5te/TEMPLATE_MONITOR_ENTER.S
@@ -13,11 +13,7 @@
mov r3, #0 @ Record that we're not returning
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
- @ refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r2, .LdvmJitToInterpNoChain
- str r3, [rSELF, #offThread_pJitProfTable]
@ Bail to interpreter - no chain [note - r4 still contains rPC]
#if defined(WITH_JIT_TUNING)
mov r0, #kHeavyweightMonitor
diff --git a/vm/compiler/template/armv5te/TEMPLATE_MONITOR_ENTER_DEBUG.S b/vm/compiler/template/armv5te/TEMPLATE_MONITOR_ENTER_DEBUG.S
index cc57e2b..56027fd 100644
--- a/vm/compiler/template/armv5te/TEMPLATE_MONITOR_ENTER_DEBUG.S
+++ b/vm/compiler/template/armv5te/TEMPLATE_MONITOR_ENTER_DEBUG.S
@@ -14,10 +14,7 @@
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
@ refresh Jit's on/off status & test for exception
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r1, [rSELF, #offThread_exception]
- str r3, [rSELF, #offThread_pJitProfTable]
cmp r1, #0
beq 1f
ldr r2, .LhandleException
diff --git a/vm/compiler/template/armv5te/TEMPLATE_RETURN.S b/vm/compiler/template/armv5te/TEMPLATE_RETURN.S
index c2926a3..e87f335 100644
--- a/vm/compiler/template/armv5te/TEMPLATE_RETURN.S
+++ b/vm/compiler/template/armv5te/TEMPLATE_RETURN.S
@@ -10,12 +10,12 @@
mov r0, r6
@ r0=rSELF
mov lr, pc
- ldr pc, .LdvmFastJavaMethodTraceExit
+ ldr pc, .LdvmFastMethodTraceExit
ldmfd sp!, {r0-r2,lr} @ restore live registers
#endif
SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old)
ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
#if !defined(WITH_SELF_VERIFICATION)
ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret
@@ -39,7 +39,7 @@
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
str r0, [rSELF, #offThread_methodClassDex]
- cmp r8, #0 @ check the suspendCount
+ cmp r8, #0 @ check the break flags
movne r9, #0 @ clear the chaining cell address
str r9, [rSELF, #offThread_inJitCodeCache] @ in code cache or not
cmp r9, #0 @ chaining cell exists?
@@ -51,6 +51,5 @@
1:
stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
ldr r2, .LdvmMterpStdBail @ defined in footer.S
- mov r1, #0 @ changeInterp = false
mov r0, rSELF @ Expecting rSELF in r0
blx r2 @ exit the interpreter
diff --git a/vm/compiler/template/armv5te/footer.S b/vm/compiler/template/armv5te/footer.S
index 4164d4e..5195d0b 100644
--- a/vm/compiler/template/armv5te/footer.S
+++ b/vm/compiler/template/armv5te/footer.S
@@ -15,11 +15,10 @@
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r1, #(offStackSaveArea_localRefCookie - sizeofStackSaveArea)]
@ newFp->localRefCookie=top
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r10, r1) @ r10<- new stack save area
mov r2, r0 @ r2<- methodToCall
- ldr lr, [lr] @ lr<- set of active profilers
mov r0, r1 @ r0<- newFP
add r1, rSELF, #offThread_retval @ r1<- &retval
mov r3, rSELF @ arg3<- self
@@ -45,19 +44,15 @@
mov lr, pc
ldr pc, [r2, #offMethod_nativeFunc]
212:
- @ Refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r2, [r10, #offStackSaveArea_returnAddr] @ r2 = chaining cell ret
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved->top
ldr r1, [rSELF, #offThread_exception] @ check for exception
- ldr r3, [r3] @ r1 <- pointer to Jit profile table
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
- str r3, [rSELF, #offThread_pJitProfTable] @ cache current JitProfTable
ldr r0, [r10, #offStackSaveArea_savedPc] @ reload rPC
@ r0 = dalvikCallsitePC
@@ -121,8 +116,8 @@
.word dvmFastMethodTraceEnter
.LdvmFastNativeMethodTraceExit:
.word dvmFastNativeMethodTraceExit
-.LdvmFastJavaMethodTraceExit:
- .word dvmFastJavaMethodTraceExit
+.LdvmFastMethodTraceExit:
+ .word dvmFastMethodTraceExit
.L__aeabi_cdcmple:
.word __aeabi_cdcmple
.L__aeabi_cfcmple:
diff --git a/vm/compiler/template/out/CompilerTemplateAsm-armv5te-vfp.S b/vm/compiler/template/out/CompilerTemplateAsm-armv5te-vfp.S
index 2e941e5..44accab 100644
--- a/vm/compiler/template/out/CompilerTemplateAsm-armv5te-vfp.S
+++ b/vm/compiler/template/out/CompilerTemplateAsm-armv5te-vfp.S
@@ -171,12 +171,12 @@
mov r0, r6
@ r0=rSELF
mov lr, pc
- ldr pc, .LdvmFastJavaMethodTraceExit
+ ldr pc, .LdvmFastMethodTraceExit
ldmfd sp!, {r0-r2,lr} @ restore live registers
#endif
SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old)
ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
#if !defined(WITH_SELF_VERIFICATION)
ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret
@@ -200,7 +200,7 @@
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
str r0, [rSELF, #offThread_methodClassDex]
- cmp r8, #0 @ check the suspendCount
+ cmp r8, #0 @ check the break flags
movne r9, #0 @ clear the chaining cell address
str r9, [rSELF, #offThread_inJitCodeCache] @ in code cache or not
cmp r9, #0 @ chaining cell exists?
@@ -212,7 +212,6 @@
1:
stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
ldr r2, .LdvmMterpStdBail @ defined in footer.S
- mov r1, #0 @ changeInterp = false
mov r0, rSELF @ Expecting rSELF in r0
blx r2 @ exit the interpreter
@@ -230,7 +229,7 @@
ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -250,7 +249,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne lr @ bail to the interpreter
tst r10, #ACC_NATIVE
#if !defined(WITH_SELF_VERIFICATION)
@@ -297,7 +296,7 @@
@ methodToCall is guaranteed to be non-native
.LinvokeChain:
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -315,7 +314,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne r12 @ bail to the interpreter
ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex
@@ -409,7 +408,7 @@
@ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite
@ r7 = methodToCall->registersSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -424,7 +423,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc
#if !defined(WITH_SELF_VERIFICATION)
bxne lr @ bail to the interpreter
@@ -1416,11 +1415,7 @@
mov r3, #0 @ Record that we're not returning
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
- @ refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r2, .LdvmJitToInterpNoChain
- str r3, [rSELF, #offThread_pJitProfTable]
@ Bail to interpreter - no chain [note - r4 still contains rPC]
#if defined(WITH_JIT_TUNING)
mov r0, #kHeavyweightMonitor
@@ -1448,10 +1443,7 @@
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
@ refresh Jit's on/off status & test for exception
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r1, [rSELF, #offThread_exception]
- str r3, [rSELF, #offThread_pJitProfTable]
cmp r1, #0
beq 1f
ldr r2, .LhandleException
@@ -1515,12 +1507,12 @@
mov r0, r6
@ r0=rSELF
mov lr, pc
- ldr pc, .LdvmFastJavaMethodTraceExit
+ ldr pc, .LdvmFastMethodTraceExit
ldmfd sp!, {r0-r2,lr} @ restore live registers
#endif
SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old)
ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
#if !defined(WITH_SELF_VERIFICATION)
ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret
@@ -1544,7 +1536,7 @@
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
str r0, [rSELF, #offThread_methodClassDex]
- cmp r8, #0 @ check the suspendCount
+ cmp r8, #0 @ check the break flags
movne r9, #0 @ clear the chaining cell address
str r9, [rSELF, #offThread_inJitCodeCache] @ in code cache or not
cmp r9, #0 @ chaining cell exists?
@@ -1556,7 +1548,6 @@
1:
stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
ldr r2, .LdvmMterpStdBail @ defined in footer.S
- mov r1, #0 @ changeInterp = false
mov r0, rSELF @ Expecting rSELF in r0
blx r2 @ exit the interpreter
@@ -1578,7 +1569,7 @@
ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1598,7 +1589,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne lr @ bail to the interpreter
tst r10, #ACC_NATIVE
#if !defined(WITH_SELF_VERIFICATION)
@@ -1649,7 +1640,7 @@
@ methodToCall is guaranteed to be non-native
.LinvokeChainProf:
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1667,7 +1658,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne r12 @ bail to the interpreter
ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex
@@ -1769,7 +1760,7 @@
@ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite
@ r7 = methodToCall->registersSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1784,7 +1775,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc
#if !defined(WITH_SELF_VERIFICATION)
bxne lr @ bail to the interpreter
@@ -1871,11 +1862,10 @@
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r1, #(offStackSaveArea_localRefCookie - sizeofStackSaveArea)]
@ newFp->localRefCookie=top
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r10, r1) @ r10<- new stack save area
mov r2, r0 @ r2<- methodToCall
- ldr lr, [lr] @ lr<- set of active profilers
mov r0, r1 @ r0<- newFP
add r1, rSELF, #offThread_retval @ r1<- &retval
mov r3, rSELF @ arg3<- self
@@ -1901,19 +1891,15 @@
mov lr, pc
ldr pc, [r2, #offMethod_nativeFunc]
212:
- @ Refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r2, [r10, #offStackSaveArea_returnAddr] @ r2 = chaining cell ret
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved->top
ldr r1, [rSELF, #offThread_exception] @ check for exception
- ldr r3, [r3] @ r1 <- pointer to Jit profile table
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
- str r3, [rSELF, #offThread_pJitProfTable] @ cache current JitProfTable
ldr r0, [r10, #offStackSaveArea_savedPc] @ reload rPC
@ r0 = dalvikCallsitePC
@@ -1977,8 +1963,8 @@
.word dvmFastMethodTraceEnter
.LdvmFastNativeMethodTraceExit:
.word dvmFastNativeMethodTraceExit
-.LdvmFastJavaMethodTraceExit:
- .word dvmFastJavaMethodTraceExit
+.LdvmFastMethodTraceExit:
+ .word dvmFastMethodTraceExit
.L__aeabi_cdcmple:
.word __aeabi_cdcmple
.L__aeabi_cfcmple:
diff --git a/vm/compiler/template/out/CompilerTemplateAsm-armv5te.S b/vm/compiler/template/out/CompilerTemplateAsm-armv5te.S
index aebad92..3b5c857 100644
--- a/vm/compiler/template/out/CompilerTemplateAsm-armv5te.S
+++ b/vm/compiler/template/out/CompilerTemplateAsm-armv5te.S
@@ -171,12 +171,12 @@
mov r0, r6
@ r0=rSELF
mov lr, pc
- ldr pc, .LdvmFastJavaMethodTraceExit
+ ldr pc, .LdvmFastMethodTraceExit
ldmfd sp!, {r0-r2,lr} @ restore live registers
#endif
SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old)
ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
#if !defined(WITH_SELF_VERIFICATION)
ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret
@@ -200,7 +200,7 @@
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
str r0, [rSELF, #offThread_methodClassDex]
- cmp r8, #0 @ check the suspendCount
+ cmp r8, #0 @ check the break flags
movne r9, #0 @ clear the chaining cell address
str r9, [rSELF, #offThread_inJitCodeCache] @ in code cache or not
cmp r9, #0 @ chaining cell exists?
@@ -212,7 +212,6 @@
1:
stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
ldr r2, .LdvmMterpStdBail @ defined in footer.S
- mov r1, #0 @ changeInterp = false
mov r0, rSELF @ Expecting rSELF in r0
blx r2 @ exit the interpreter
@@ -230,7 +229,7 @@
ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -250,7 +249,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne lr @ bail to the interpreter
tst r10, #ACC_NATIVE
#if !defined(WITH_SELF_VERIFICATION)
@@ -297,7 +296,7 @@
@ methodToCall is guaranteed to be non-native
.LinvokeChain:
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -315,7 +314,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne r12 @ bail to the interpreter
ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex
@@ -409,7 +408,7 @@
@ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite
@ r7 = methodToCall->registersSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -424,7 +423,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc
#if !defined(WITH_SELF_VERIFICATION)
bxne lr @ bail to the interpreter
@@ -1147,11 +1146,7 @@
mov r3, #0 @ Record that we're not returning
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
- @ refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r2, .LdvmJitToInterpNoChain
- str r3, [rSELF, #offThread_pJitProfTable]
@ Bail to interpreter - no chain [note - r4 still contains rPC]
#if defined(WITH_JIT_TUNING)
mov r0, #kHeavyweightMonitor
@@ -1179,10 +1174,7 @@
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
@ refresh Jit's on/off status & test for exception
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r1, [rSELF, #offThread_exception]
- str r3, [rSELF, #offThread_pJitProfTable]
cmp r1, #0
beq 1f
ldr r2, .LhandleException
@@ -1246,12 +1238,12 @@
mov r0, r6
@ r0=rSELF
mov lr, pc
- ldr pc, .LdvmFastJavaMethodTraceExit
+ ldr pc, .LdvmFastMethodTraceExit
ldmfd sp!, {r0-r2,lr} @ restore live registers
#endif
SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old)
ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
#if !defined(WITH_SELF_VERIFICATION)
ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret
@@ -1275,7 +1267,7 @@
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
str r0, [rSELF, #offThread_methodClassDex]
- cmp r8, #0 @ check the suspendCount
+ cmp r8, #0 @ check the break flags
movne r9, #0 @ clear the chaining cell address
str r9, [rSELF, #offThread_inJitCodeCache] @ in code cache or not
cmp r9, #0 @ chaining cell exists?
@@ -1287,7 +1279,6 @@
1:
stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
ldr r2, .LdvmMterpStdBail @ defined in footer.S
- mov r1, #0 @ changeInterp = false
mov r0, rSELF @ Expecting rSELF in r0
blx r2 @ exit the interpreter
@@ -1309,7 +1300,7 @@
ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1329,7 +1320,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne lr @ bail to the interpreter
tst r10, #ACC_NATIVE
#if !defined(WITH_SELF_VERIFICATION)
@@ -1380,7 +1371,7 @@
@ methodToCall is guaranteed to be non-native
.LinvokeChainProf:
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1398,7 +1389,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne r12 @ bail to the interpreter
ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex
@@ -1500,7 +1491,7 @@
@ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite
@ r7 = methodToCall->registersSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1515,7 +1506,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc
#if !defined(WITH_SELF_VERIFICATION)
bxne lr @ bail to the interpreter
@@ -1602,11 +1593,10 @@
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r1, #(offStackSaveArea_localRefCookie - sizeofStackSaveArea)]
@ newFp->localRefCookie=top
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r10, r1) @ r10<- new stack save area
mov r2, r0 @ r2<- methodToCall
- ldr lr, [lr] @ lr<- set of active profilers
mov r0, r1 @ r0<- newFP
add r1, rSELF, #offThread_retval @ r1<- &retval
mov r3, rSELF @ arg3<- self
@@ -1632,19 +1622,15 @@
mov lr, pc
ldr pc, [r2, #offMethod_nativeFunc]
212:
- @ Refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r2, [r10, #offStackSaveArea_returnAddr] @ r2 = chaining cell ret
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved->top
ldr r1, [rSELF, #offThread_exception] @ check for exception
- ldr r3, [r3] @ r1 <- pointer to Jit profile table
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
- str r3, [rSELF, #offThread_pJitProfTable] @ cache current JitProfTable
ldr r0, [r10, #offStackSaveArea_savedPc] @ reload rPC
@ r0 = dalvikCallsitePC
@@ -1708,8 +1694,8 @@
.word dvmFastMethodTraceEnter
.LdvmFastNativeMethodTraceExit:
.word dvmFastNativeMethodTraceExit
-.LdvmFastJavaMethodTraceExit:
- .word dvmFastJavaMethodTraceExit
+.LdvmFastMethodTraceExit:
+ .word dvmFastMethodTraceExit
.L__aeabi_cdcmple:
.word __aeabi_cdcmple
.L__aeabi_cfcmple:
diff --git a/vm/compiler/template/out/CompilerTemplateAsm-armv7-a-neon.S b/vm/compiler/template/out/CompilerTemplateAsm-armv7-a-neon.S
index fb1e048..3905ec8 100644
--- a/vm/compiler/template/out/CompilerTemplateAsm-armv7-a-neon.S
+++ b/vm/compiler/template/out/CompilerTemplateAsm-armv7-a-neon.S
@@ -171,12 +171,12 @@
mov r0, r6
@ r0=rSELF
mov lr, pc
- ldr pc, .LdvmFastJavaMethodTraceExit
+ ldr pc, .LdvmFastMethodTraceExit
ldmfd sp!, {r0-r2,lr} @ restore live registers
#endif
SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old)
ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
#if !defined(WITH_SELF_VERIFICATION)
ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret
@@ -200,7 +200,7 @@
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
str r0, [rSELF, #offThread_methodClassDex]
- cmp r8, #0 @ check the suspendCount
+ cmp r8, #0 @ check the break flags
movne r9, #0 @ clear the chaining cell address
str r9, [rSELF, #offThread_inJitCodeCache] @ in code cache or not
cmp r9, #0 @ chaining cell exists?
@@ -212,7 +212,6 @@
1:
stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
ldr r2, .LdvmMterpStdBail @ defined in footer.S
- mov r1, #0 @ changeInterp = false
mov r0, rSELF @ Expecting rSELF in r0
blx r2 @ exit the interpreter
@@ -230,7 +229,7 @@
ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -250,7 +249,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne lr @ bail to the interpreter
tst r10, #ACC_NATIVE
#if !defined(WITH_SELF_VERIFICATION)
@@ -297,7 +296,7 @@
@ methodToCall is guaranteed to be non-native
.LinvokeChain:
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -315,7 +314,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne r12 @ bail to the interpreter
ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex
@@ -409,7 +408,7 @@
@ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite
@ r7 = methodToCall->registersSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -424,7 +423,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc
#if !defined(WITH_SELF_VERIFICATION)
bxne lr @ bail to the interpreter
@@ -1416,11 +1415,7 @@
mov r3, #0 @ Record that we're not returning
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
- @ refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r2, .LdvmJitToInterpNoChain
- str r3, [rSELF, #offThread_pJitProfTable]
@ Bail to interpreter - no chain [note - r4 still contains rPC]
#if defined(WITH_JIT_TUNING)
mov r0, #kHeavyweightMonitor
@@ -1448,10 +1443,7 @@
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
@ refresh Jit's on/off status & test for exception
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r1, [rSELF, #offThread_exception]
- str r3, [rSELF, #offThread_pJitProfTable]
cmp r1, #0
beq 1f
ldr r2, .LhandleException
@@ -1515,12 +1507,12 @@
mov r0, r6
@ r0=rSELF
mov lr, pc
- ldr pc, .LdvmFastJavaMethodTraceExit
+ ldr pc, .LdvmFastMethodTraceExit
ldmfd sp!, {r0-r2,lr} @ restore live registers
#endif
SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old)
ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
#if !defined(WITH_SELF_VERIFICATION)
ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret
@@ -1544,7 +1536,7 @@
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
str r0, [rSELF, #offThread_methodClassDex]
- cmp r8, #0 @ check the suspendCount
+ cmp r8, #0 @ check the break flags
movne r9, #0 @ clear the chaining cell address
str r9, [rSELF, #offThread_inJitCodeCache] @ in code cache or not
cmp r9, #0 @ chaining cell exists?
@@ -1556,7 +1548,6 @@
1:
stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
ldr r2, .LdvmMterpStdBail @ defined in footer.S
- mov r1, #0 @ changeInterp = false
mov r0, rSELF @ Expecting rSELF in r0
blx r2 @ exit the interpreter
@@ -1578,7 +1569,7 @@
ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1598,7 +1589,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne lr @ bail to the interpreter
tst r10, #ACC_NATIVE
#if !defined(WITH_SELF_VERIFICATION)
@@ -1649,7 +1640,7 @@
@ methodToCall is guaranteed to be non-native
.LinvokeChainProf:
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1667,7 +1658,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne r12 @ bail to the interpreter
ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex
@@ -1769,7 +1760,7 @@
@ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite
@ r7 = methodToCall->registersSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1784,7 +1775,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc
#if !defined(WITH_SELF_VERIFICATION)
bxne lr @ bail to the interpreter
@@ -1871,11 +1862,10 @@
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r1, #(offStackSaveArea_localRefCookie - sizeofStackSaveArea)]
@ newFp->localRefCookie=top
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r10, r1) @ r10<- new stack save area
mov r2, r0 @ r2<- methodToCall
- ldr lr, [lr] @ lr<- set of active profilers
mov r0, r1 @ r0<- newFP
add r1, rSELF, #offThread_retval @ r1<- &retval
mov r3, rSELF @ arg3<- self
@@ -1901,19 +1891,15 @@
mov lr, pc
ldr pc, [r2, #offMethod_nativeFunc]
212:
- @ Refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r2, [r10, #offStackSaveArea_returnAddr] @ r2 = chaining cell ret
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved->top
ldr r1, [rSELF, #offThread_exception] @ check for exception
- ldr r3, [r3] @ r1 <- pointer to Jit profile table
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
- str r3, [rSELF, #offThread_pJitProfTable] @ cache current JitProfTable
ldr r0, [r10, #offStackSaveArea_savedPc] @ reload rPC
@ r0 = dalvikCallsitePC
@@ -1977,8 +1963,8 @@
.word dvmFastMethodTraceEnter
.LdvmFastNativeMethodTraceExit:
.word dvmFastNativeMethodTraceExit
-.LdvmFastJavaMethodTraceExit:
- .word dvmFastJavaMethodTraceExit
+.LdvmFastMethodTraceExit:
+ .word dvmFastMethodTraceExit
.L__aeabi_cdcmple:
.word __aeabi_cdcmple
.L__aeabi_cfcmple:
diff --git a/vm/compiler/template/out/CompilerTemplateAsm-armv7-a.S b/vm/compiler/template/out/CompilerTemplateAsm-armv7-a.S
index 7ea4647..b09bc30 100644
--- a/vm/compiler/template/out/CompilerTemplateAsm-armv7-a.S
+++ b/vm/compiler/template/out/CompilerTemplateAsm-armv7-a.S
@@ -171,12 +171,12 @@
mov r0, r6
@ r0=rSELF
mov lr, pc
- ldr pc, .LdvmFastJavaMethodTraceExit
+ ldr pc, .LdvmFastMethodTraceExit
ldmfd sp!, {r0-r2,lr} @ restore live registers
#endif
SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old)
ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
#if !defined(WITH_SELF_VERIFICATION)
ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret
@@ -200,7 +200,7 @@
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
str r0, [rSELF, #offThread_methodClassDex]
- cmp r8, #0 @ check the suspendCount
+ cmp r8, #0 @ check the break flags
movne r9, #0 @ clear the chaining cell address
str r9, [rSELF, #offThread_inJitCodeCache] @ in code cache or not
cmp r9, #0 @ chaining cell exists?
@@ -212,7 +212,6 @@
1:
stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
ldr r2, .LdvmMterpStdBail @ defined in footer.S
- mov r1, #0 @ changeInterp = false
mov r0, rSELF @ Expecting rSELF in r0
blx r2 @ exit the interpreter
@@ -230,7 +229,7 @@
ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -250,7 +249,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne lr @ bail to the interpreter
tst r10, #ACC_NATIVE
#if !defined(WITH_SELF_VERIFICATION)
@@ -297,7 +296,7 @@
@ methodToCall is guaranteed to be non-native
.LinvokeChain:
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -315,7 +314,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne r12 @ bail to the interpreter
ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex
@@ -409,7 +408,7 @@
@ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite
@ r7 = methodToCall->registersSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -424,7 +423,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc
#if !defined(WITH_SELF_VERIFICATION)
bxne lr @ bail to the interpreter
@@ -1416,11 +1415,7 @@
mov r3, #0 @ Record that we're not returning
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
- @ refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r2, .LdvmJitToInterpNoChain
- str r3, [rSELF, #offThread_pJitProfTable]
@ Bail to interpreter - no chain [note - r4 still contains rPC]
#if defined(WITH_JIT_TUNING)
mov r0, #kHeavyweightMonitor
@@ -1448,10 +1443,7 @@
str r3, [r0, #offThread_inJitCodeCache]
blx r2 @ dvmLockObject(self, obj)
@ refresh Jit's on/off status & test for exception
- ldr r3, [rSELF, #offThread_ppJitProfTable]
- ldr r3, [r3]
ldr r1, [rSELF, #offThread_exception]
- str r3, [rSELF, #offThread_pJitProfTable]
cmp r1, #0
beq 1f
ldr r2, .LhandleException
@@ -1515,12 +1507,12 @@
mov r0, r6
@ r0=rSELF
mov lr, pc
- ldr pc, .LdvmFastJavaMethodTraceExit
+ ldr pc, .LdvmFastMethodTraceExit
ldmfd sp!, {r0-r2,lr} @ restore live registers
#endif
SAVEAREA_FROM_FP(r0, rFP) @ r0<- saveArea (old)
ldr r10, [r0, #offStackSaveArea_prevFrame] @ r10<- saveArea->prevFrame
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
ldr rPC, [r0, #offStackSaveArea_savedPc] @ rPC<- saveArea->savedPc
#if !defined(WITH_SELF_VERIFICATION)
ldr r9, [r0, #offStackSaveArea_returnAddr] @ r9<- chaining cell ret
@@ -1544,7 +1536,7 @@
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
add rPC, rPC, #6 @ publish new rPC (advance 6 bytes)
str r0, [rSELF, #offThread_methodClassDex]
- cmp r8, #0 @ check the suspendCount
+ cmp r8, #0 @ check the break flags
movne r9, #0 @ clear the chaining cell address
str r9, [rSELF, #offThread_inJitCodeCache] @ in code cache or not
cmp r9, #0 @ chaining cell exists?
@@ -1556,7 +1548,6 @@
1:
stmia rSELF, {rPC, rFP} @ SAVE_PC_FP_TO_SELF()
ldr r2, .LdvmMterpStdBail @ defined in footer.S
- mov r1, #0 @ changeInterp = false
mov r0, rSELF @ Expecting rSELF in r0
blx r2 @ exit the interpreter
@@ -1578,7 +1569,7 @@
ldrh r7, [r0, #offMethod_registersSize] @ r7<- methodToCall->regsSize
ldrh r2, [r0, #offMethod_outsSize] @ r2<- methodToCall->outsSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1598,7 +1589,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne lr @ bail to the interpreter
tst r10, #ACC_NATIVE
#if !defined(WITH_SELF_VERIFICATION)
@@ -1649,7 +1640,7 @@
@ methodToCall is guaranteed to be non-native
.LinvokeChainProf:
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1667,7 +1658,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
bxne r12 @ bail to the interpreter
ldr r3, [r9, #offClassObject_pDvmDex] @ r3<- method->clazz->pDvmDex
@@ -1769,7 +1760,7 @@
@ r0 = methodToCall, r1 = returnCell, rPC = dalvikCallsite
@ r7 = methodToCall->registersSize
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
- ldr r8, [rSELF, #offThread_suspendCount] @ r8<- suspendCount
+ ldrb r8, [rSELF, #offThread_breakFlags] @ r8<- breakFlags
add r3, r1, #1 @ Thumb addr is odd
SAVEAREA_FROM_FP(r1, rFP) @ r1<- stack save area
sub r1, r1, r7, lsl #2 @ r1<- newFp (old savearea - regsSize)
@@ -1784,7 +1775,7 @@
str rFP, [r1, #(offStackSaveArea_prevFrame - sizeofStackSaveArea)]
str r3, [r1, #(offStackSaveArea_returnAddr - sizeofStackSaveArea)]
str r0, [r1, #(offStackSaveArea_method - sizeofStackSaveArea)]
- cmp r8, #0 @ suspendCount != 0
+ cmp r8, #0 @ breakFlags != 0
ldr r8, [r0, #offMethod_nativeFunc] @ r8<- method->nativeFunc
#if !defined(WITH_SELF_VERIFICATION)
bxne lr @ bail to the interpreter
@@ -1871,11 +1862,10 @@
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r1, #(offStackSaveArea_localRefCookie - sizeofStackSaveArea)]
@ newFp->localRefCookie=top
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r10, r1) @ r10<- new stack save area
mov r2, r0 @ r2<- methodToCall
- ldr lr, [lr] @ lr<- set of active profilers
mov r0, r1 @ r0<- newFP
add r1, rSELF, #offThread_retval @ r1<- &retval
mov r3, rSELF @ arg3<- self
@@ -1901,19 +1891,15 @@
mov lr, pc
ldr pc, [r2, #offMethod_nativeFunc]
212:
- @ Refresh Jit's on/off status
- ldr r3, [rSELF, #offThread_ppJitProfTable]
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r2, [r10, #offStackSaveArea_returnAddr] @ r2 = chaining cell ret
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved->top
ldr r1, [rSELF, #offThread_exception] @ check for exception
- ldr r3, [r3] @ r1 <- pointer to Jit profile table
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
- str r3, [rSELF, #offThread_pJitProfTable] @ cache current JitProfTable
ldr r0, [r10, #offStackSaveArea_savedPc] @ reload rPC
@ r0 = dalvikCallsitePC
@@ -1977,8 +1963,8 @@
.word dvmFastMethodTraceEnter
.LdvmFastNativeMethodTraceExit:
.word dvmFastNativeMethodTraceExit
-.LdvmFastJavaMethodTraceExit:
- .word dvmFastJavaMethodTraceExit
+.LdvmFastMethodTraceExit:
+ .word dvmFastMethodTraceExit
.L__aeabi_cdcmple:
.word __aeabi_cdcmple
.L__aeabi_cfcmple:
diff --git a/vm/interp/Interp.c b/vm/interp/Interp.c
index c671624..6622874 100644
--- a/vm/interp/Interp.c
+++ b/vm/interp/Interp.c
@@ -25,6 +25,9 @@
*/
#include "Dalvik.h"
#include "interp/InterpDefs.h"
+#if defined(WITH_JIT)
+#include "interp/Jit.h"
+#endif
/*
@@ -198,7 +201,7 @@
static bool instructionIsMagicNop(const u2* addr)
{
u2 curVal = *addr;
- return ((curVal & 0xff) == OP_NOP && (curVal >> 8) != 0);
+ return ((GET_OPCODE(curVal)) == OP_NOP && (curVal >> 8) != 0);
}
/*
@@ -591,6 +594,267 @@
gDvm.stepControl.active = false;
}
+/*
+ * The interpreter just threw. Handle any special subMode requirements.
+ */
+void dvmReportExceptionThrow(Thread* self, const Method* curMethod,
+ const u2* pc, void* fp)
+{
+#if defined(WITH_JIT)
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) {
+ dvmJitEndTraceSelect(self, pc);
+ }
+ if (self->interpBreak.ctl.breakFlags & kInterpSingleStep) {
+ /* Discard any single-step native returns to translation */
+ self->jitResumeNPC = NULL;
+ }
+#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ void *catchFrame;
+ int offset = pc - curMethod->insns;
+ int catchRelPc = dvmFindCatchBlock(self, offset, self->exception,
+ true, &catchFrame);
+ dvmDbgPostException(fp, offset, catchFrame, catchRelPc,
+ self->exception);
+ }
+}
+
+/*
+ * The interpreter is preparing to do an invoke (both native & normal).
+ * Handle any special subMode requirements.
+ */
+void dvmReportInvoke(Thread* self, const Method* methodToCall)
+{
+ TRACE_METHOD_ENTER(self, methodToCall);
+}
+
+/*
+ * The interpreter is preparing to do a native invoke. Handle any
+ * special subMode requirements. NOTE: for a native invoke,
+ * dvmReportInvoke() and dvmReportPreNativeInvoke() will both
+ * be called prior to the invoke.
+ */
+void dvmReportPreNativeInvoke(const u2* pc, Thread* self,
+ const Method* methodToCall)
+{
+#if defined(WITH_JIT)
+ /*
+ * Actively building a trace? If so, end it now. The trace
+ * builder can't follow into or through a native method.
+ */
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) {
+ dvmCheckJit(pc, self);
+ }
+#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ Object* thisPtr = dvmGetThisPtr(self->interpSave.method,
+ self->interpSave.fp);
+ assert(thisPtr != NULL && !dvmIsValidObject(thisPtr));
+ dvmDbgPostLocationEvent(methodToCall, -1, thisPtr, DBG_METHOD_ENTRY);
+ }
+}
+
+/*
+ * The interpreter has returned from a native invoke. Handle any
+ * special subMode requirements.
+ */
+void dvmReportPostNativeInvoke(const u2* pc, Thread* self,
+ const Method* methodToCall)
+{
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ Object* thisPtr = dvmGetThisPtr(self->interpSave.method,
+ self->interpSave.fp);
+ assert(thisPtr != NULL && !dvmIsValidObject(thisPtr));
+ dvmDbgPostLocationEvent(methodToCall, -1, thisPtr, DBG_METHOD_EXIT);
+ }
+ if (self->interpBreak.ctl.subMode & kSubModeMethodTrace) {
+ dvmFastNativeMethodTraceExit(methodToCall, self);
+ }
+}
+
+/*
+ * The interpreter has returned from a normal method. Handle any special
+ * subMode requirements.
+ */
+void dvmReportReturn(Thread* self, const u2* pc, const u4* prevFP)
+{
+ TRACE_METHOD_EXIT(self, self->interpSave.method);
+#if defined(WITH_JIT)
+ if (dvmIsBreakFrame(prevFP) &&
+ (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild)) {
+ dvmCheckJit(pc, self);
+ }
+#endif
+}
+
+/*
+ * Update the debugger on interesting events, such as hitting a breakpoint
+ * or a single-step point. This is called from the top of the interpreter
+ * loop, before the current instruction is processed.
+ *
+ * Set "methodEntry" if we've just entered the method. This detects
+ * method exit by checking to see if the next instruction is "return".
+ *
+ * This can't catch native method entry/exit, so we have to handle that
+ * at the point of invocation. We also need to catch it in dvmCallMethod
+ * if we want to capture native->native calls made through JNI.
+ *
+ * Notes to self:
+ * - Don't want to switch to VMWAIT while posting events to the debugger.
+ * Let the debugger code decide if we need to change state.
+ * - We may want to check for debugger-induced thread suspensions on
+ * every instruction. That would make a "suspend all" more responsive
+ * and reduce the chances of multiple simultaneous events occurring.
+ * However, it could change the behavior some.
+ *
+ * TODO: method entry/exit events are probably less common than location
+ * breakpoints. We may be able to speed things up a bit if we don't query
+ * the event list unless we know there's at least one lurking within.
+ */
+void dvmUpdateDebugger(const Method* method, const u2* pc, const u4* fp,
+ bool methodEntry, Thread* self)
+{
+ int eventFlags = 0;
+
+ /*
+ * Update xtra.currentPc on every instruction. We need to do this if
+ * there's a chance that we could get suspended. This can happen if
+ * eventFlags != 0 here, or somebody manually requests a suspend
+ * (which gets handled at PERIOD_CHECKS time). One place where this
+ * needs to be correct is in dvmAddSingleStep().
+ */
+ dvmExportPC(pc, fp);
+
+ if (methodEntry)
+ eventFlags |= DBG_METHOD_ENTRY;
+
+ /*
+ * See if we have a breakpoint here.
+ *
+ * Depending on the "mods" associated with event(s) on this address,
+ * we may or may not actually send a message to the debugger.
+ */
+ if (GET_OPCODE(*pc) == OP_BREAKPOINT) {
+ LOGV("+++ breakpoint hit at %p\n", pc);
+ eventFlags |= DBG_BREAKPOINT;
+ }
+
+ /*
+ * If the debugger is single-stepping one of our threads, check to
+ * see if we're that thread and we've reached a step point.
+ */
+ const StepControl* pCtrl = &gDvm.stepControl;
+ if (pCtrl->active && pCtrl->thread == self) {
+ int frameDepth;
+ bool doStop = false;
+ const char* msg = NULL;
+
+ assert(!dvmIsNativeMethod(method));
+
+ if (pCtrl->depth == SD_INTO) {
+ /*
+ * Step into method calls. We break when the line number
+ * or method pointer changes. If we're in SS_MIN mode, we
+ * always stop.
+ */
+ if (pCtrl->method != method) {
+ doStop = true;
+ msg = "new method";
+ } else if (pCtrl->size == SS_MIN) {
+ doStop = true;
+ msg = "new instruction";
+ } else if (!dvmAddressSetGet(
+ pCtrl->pAddressSet, pc - method->insns)) {
+ doStop = true;
+ msg = "new line";
+ }
+ } else if (pCtrl->depth == SD_OVER) {
+ /*
+ * Step over method calls. We break when the line number is
+ * different and the frame depth is <= the original frame
+ * depth. (We can't just compare on the method, because we
+ * might get unrolled past it by an exception, and it's tricky
+ * to identify recursion.)
+ */
+ frameDepth = dvmComputeVagueFrameDepth(self, fp);
+ if (frameDepth < pCtrl->frameDepth) {
+ /* popped up one or more frames, always trigger */
+ doStop = true;
+ msg = "method pop";
+ } else if (frameDepth == pCtrl->frameDepth) {
+ /* same depth, see if we moved */
+ if (pCtrl->size == SS_MIN) {
+ doStop = true;
+ msg = "new instruction";
+ } else if (!dvmAddressSetGet(pCtrl->pAddressSet,
+ pc - method->insns)) {
+ doStop = true;
+ msg = "new line";
+ }
+ }
+ } else {
+ assert(pCtrl->depth == SD_OUT);
+ /*
+ * Return from the current method. We break when the frame
+ * depth pops up.
+ *
+ * This differs from the "method exit" break in that it stops
+ * with the PC at the next instruction in the returned-to
+ * function, rather than the end of the returning function.
+ */
+ frameDepth = dvmComputeVagueFrameDepth(self, fp);
+ if (frameDepth < pCtrl->frameDepth) {
+ doStop = true;
+ msg = "method pop";
+ }
+ }
+
+ if (doStop) {
+ LOGV("#####S %s\n", msg);
+ eventFlags |= DBG_SINGLE_STEP;
+ }
+ }
+
+ /*
+ * Check to see if this is a "return" instruction. JDWP says we should
+ * send the event *after* the code has been executed, but it also says
+ * the location we provide is the last instruction. Since the "return"
+ * instruction has no interesting side effects, we should be safe.
+ * (We can't just move this down to the returnFromMethod label because
+ * we potentially need to combine it with other events.)
+ *
+ * We're also not supposed to generate a method exit event if the method
+ * terminates "with a thrown exception".
+ */
+ u2 opcode = GET_OPCODE(*pc);
+ if (opcode == OP_RETURN_VOID || opcode == OP_RETURN ||
+ opcode == OP_RETURN_WIDE ||opcode == OP_RETURN_OBJECT)
+ {
+ eventFlags |= DBG_METHOD_EXIT;
+ }
+
+ /*
+ * If there's something interesting going on, see if it matches one
+ * of the debugger filters.
+ */
+ if (eventFlags != 0) {
+ Object* thisPtr = dvmGetThisPtr(method, fp);
+ if (thisPtr != NULL && !dvmIsValidObject(thisPtr)) {
+ /*
+ * TODO: remove this check if we're confident that the "this"
+ * pointer is where it should be -- slows us down, especially
+ * during single-step.
+ */
+ char* desc = dexProtoCopyMethodDescriptor(&method->prototype);
+ LOGE("HEY: invalid 'this' ptr %p (%s.%s %s)\n", thisPtr,
+ method->clazz->descriptor, method->name, desc);
+ free(desc);
+ dvmAbort();
+ }
+ dvmDbgPostLocationEvent(method, pc - method->insns, thisPtr,
+ eventFlags);
+ }
+}
/*
* Recover the "this" pointer from the current interpreted method. "this"
@@ -1211,20 +1475,80 @@
}
/*
- * Update interpBreak
+ * Update interpBreak. If there is an active break when
+ * we're done, set altHandlerTable. Otherwise, revert to
+ * the non-breaking table base.
*/
-void dvmUpdateInterpBreak(int newMode, bool enable)
+void dvmUpdateInterpBreak(Thread* thread, int newBreak, int newMode,
+ bool enable)
{
- ExecutionSubModes oldValue, newValue;
+ InterpBreak oldValue, newValue;
+
+ // Do not use this routine for suspend updates. See below.
+ assert((newBreak & kInterpSuspendBreak) == 0);
do {
- oldValue = gDvm.interpBreak;
- newValue = enable ? oldValue | newMode : oldValue & ~newMode;
- } while (android_atomic_release_cas(oldValue, newValue,
- &gDvm.interpBreak) != 0);
-#if defined(WITH_JIT)
- dvmCompilerStateRefresh();
-#endif
+ oldValue = newValue = thread->interpBreak;
+ if (enable) {
+ newValue.ctl.breakFlags |= newBreak;
+ newValue.ctl.subMode |= newMode;
+ } else {
+ newValue.ctl.breakFlags &= ~newBreak;
+ newValue.ctl.subMode &= ~newMode;
+ }
+ newValue.ctl.curHandlerTable = (newValue.ctl.breakFlags) ?
+ thread->altHandlerTable : thread->mainHandlerTable;
+ } while (dvmQuasiAtomicCas64(oldValue.all, newValue.all,
+ &thread->interpBreak.all) != 0);
+}
+
+/*
+ * Update the normal and debugger suspend counts for a thread.
+ * threadSuspendCount must be acquired before calling this to
+ * ensure a clean update of suspendCount, dbgSuspendCount and
+ * sumThreadSuspendCount. suspendCount & dbgSuspendCount must
+ * use the atomic update to avoid conflict with writes to the
+ * other fields in interpBreak.
+ *
+ * CLEANUP TODO: Currently only the JIT is using sumThreadSuspendCount.
+ * Move under WITH_JIT ifdefs.
+*/
+void dvmAddToSuspendCounts(Thread* thread, int delta, int dbgDelta)
+{
+ InterpBreak oldValue, newValue;
+
+ do {
+ oldValue = newValue = thread->interpBreak;
+ newValue.ctl.suspendCount += delta;
+ newValue.ctl.dbgSuspendCount += dbgDelta;
+ assert(newValue.ctl.suspendCount >= newValue.ctl.dbgSuspendCount);
+ if (newValue.ctl.suspendCount > 0) {
+ newValue.ctl.breakFlags |= kInterpSuspendBreak;
+ } else {
+ newValue.ctl.breakFlags &= ~kInterpSuspendBreak;
+ }
+ newValue.ctl.curHandlerTable = (newValue.ctl.breakFlags) ?
+ thread->altHandlerTable : thread->mainHandlerTable;
+ } while (dvmQuasiAtomicCas64(oldValue.all, newValue.all,
+ &thread->interpBreak.all) != 0);
+
+ // Update the global suspend count total
+ gDvm.sumThreadSuspendCount += delta;
+}
+
+/*
+ * Update interpBreak for all threads.
+ */
+void dvmUpdateAllInterpBreak(int newBreak, int newMode, bool enable)
+{
+ Thread* self = dvmThreadSelf();
+ Thread* thread;
+
+ dvmLockThreadList(self);
+ for (thread = gDvm.threadList; thread != NULL; thread = thread->next) {
+ dvmUpdateInterpBreak(thread, newBreak, newMode, enable);
+ }
+ dvmUnlockThreadList();
}
/*
@@ -1263,14 +1587,13 @@
// Begin initialization
self->cardTable = gDvm.biasedCardTableBase;
- self->interpSave.pInterpBreak = &gDvm.interpBreak;
#if defined(WITH_JIT)
+ // One-time initializations
self->jitToInterpEntries = jitToInterpEntries;
self->icRechainCount = PREDICTED_CHAIN_COUNTER_RECHAIN;
- self->pJitProfTable = gDvmJit.pProfTable;
- self->ppJitProfTable = &gDvmJit.pProfTable;
- self->jitThreshold = gDvmJit.threshold;
self->pProfileCountdown = &gDvmJit.profileCountdown;
+ // Jit state that can change
+ dvmJitUpdateState();
#endif
}
@@ -1278,16 +1601,149 @@
/*
* Inter-instruction handler invoked in between instruction interpretations
* to handle exceptional events such as debugging housekeeping, instruction
- * count profiling, JIT trace building, etc.
+ * count profiling, JIT trace building, etc. Dalvik PC has been exported
+ * prior to call, but Thread copy of dPC & fp are not current.
*/
-void dvmCheckInst(u2 *dPC, Thread* self)
+void dvmCheckBefore(const u2 *pc, const u4 *fp, Thread* self)
{
- //TODO add debugger, profiler, JIT, etc. checks here
+ const Method* method = self->interpSave.method;
+ assert(self->interpBreak.ctl.breakFlags != 0);
+ assert(pc >= method->insns && pc <
+ method->insns + dvmGetMethodInsnsSize(method));
+
+#if 0
+ /*
+ * When we hit a specific method, enable verbose instruction logging.
+ * Sometimes it's helpful to use the debugger attach as a trigger too.
+ */
+ if (*pIsMethodEntry) {
+ static const char* cd = "Landroid/test/Arithmetic;";
+ static const char* mn = "shiftTest2";
+ static const char* sg = "()V";
+
+ if (/*self->interpBreak.ctl.subMode & kSubModeDebuggerActive &&*/
+ strcmp(method->clazz->descriptor, cd) == 0 &&
+ strcmp(method->name, mn) == 0 &&
+ strcmp(method->shorty, sg) == 0)
+ {
+ LOGW("Reached %s.%s, enabling verbose mode\n",
+ method->clazz->descriptor, method->name);
+ android_setMinPriority(LOG_TAG"i", ANDROID_LOG_VERBOSE);
+ dumpRegs(method, fp, true);
+ }
+
+ if (!gDvm.debuggerActive)
+ *pIsMethodEntry = false;
+ }
+#endif
+
+ /* Suspend pending? */
+ if (self->interpBreak.ctl.suspendCount) {
+ // Neeeded for precise GC
+ dvmExportPC(pc, fp);
+ dvmCheckSuspendPending(self);
+ }
+
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ dvmUpdateDebugger(method, pc, fp,
+ self->debugIsMethodEntry, self);
+ }
+ if (gDvm.instructionCountEnableCount != 0) {
+ /*
+ * Count up the #of executed instructions. This isn't synchronized
+ * for thread-safety; if we need that we should make this
+ * thread-local and merge counts into the global area when threads
+ * exit (perhaps suspending all other threads GC-style and pulling
+ * the data out of them).
+ */
+ gDvm.executedInstrCounts[GET_OPCODE(*pc)]++;
+ }
+
+
+#if defined(WITH_TRACKREF_CHECKS)
+ dvmInterpCheckTrackedRefs(self, method,
+ self->interpSave.debugTrackedRefStart);
+#endif
+
+#if defined(WITH_JIT)
+ // Does the JIT need anything done now?
+ if (self->interpBreak.ctl.breakFlags & kInterpJitBreak) {
+ // Are we building a trace?
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) {
+ dvmCheckJit(pc, self);
+ }
+
+#if defined(WITH_SELF_VERIFICATION)
+ // Are we replaying a trace?
+ if (self->interpBreak.ctl.subMode & kSubModeJitSV) {
+ dvmCheckSelfVerification(pc, self);
+ }
+#endif
+ }
+#endif
+
+ /*
+ * SingleStep processing. NOTE: must be the last here to allow
+ * preceeding special case handler to manipulate single-step count.
+ */
+ if (self->interpBreak.ctl.breakFlags & kInterpSingleStep) {
+ if (self->singleStepCount == 0) {
+ // We've exhausted our single step count
+ dvmUpdateInterpBreak(self, kInterpSingleStep, kSubModeNormal,
+ false /* remove */);
+#if defined(WITH_JIT)
+#if 0
+ /*
+ * For debugging. If jitResumeDPC is non-zero, then
+ * we expect to return to a trace in progress. There
+ * are valid reasons why we wouldn't (such as an exception
+ * throw), but here we can keep track.
+ */
+ if (self->jitResumeDPC != NULL) {
+ if (self->jitResumeDPC == pc) {
+ if (self->jitResumeNPC != NULL) {
+ LOGD("SS return to trace - pc:0x%x to 0x:%x",
+ (int)pc, (int)self->jitResumeNPC);
+ } else {
+ LOGD("SS return to interp - pc:0x%x",(int)pc);
+ }
+ } else {
+ LOGD("SS failed to return. Expected 0x%x, now at 0x%x",
+ (int)self->jitResumeDPC, (int)pc);
+ }
+ }
+#endif
+ // If we've got a native return and no other reasons to
+ // remain in singlestep/break mode, do a long jump
+ if (self->jitResumeNPC != NULL &&
+ self->interpBreak.ctl.breakFlags == 0) {
+ assert(self->jitResumeDPC == pc);
+ self->jitResumeDPC = NULL;
+ dvmJitResumeTranslation(self, pc, fp);
+ // Doesn't return
+ dvmAbort();
+ }
+ self->jitResumeDPC = NULL;
+#endif
+ } else {
+ self->singleStepCount--;
+#if defined(WITH_JIT)
+ if ((self->singleStepCount > 0) && (self->jitResumeNPC != NULL)) {
+ /*
+ * Direct return to an existing translation following a
+ * single step is valid only if we step once. If we're
+ * here, an additional step was added so we need to invalidate
+ * the return to translation.
+ */
+ self->jitResumeNPC = NULL;
+ }
+#endif
+ }
+ }
}
/*
- * Main interpreter loop entry point. Select "standard" or "debug"
- * interpreter and switch between them as required.
+ * Main interpreter loop entry point.
*
* This begins executing code at the start of "method". On exit, "pResult"
* holds the return value of the method (or, if "method" returns NULL, it
@@ -1298,8 +1754,10 @@
*/
void dvmInterpret(Thread* self, const Method* method, JValue* pResult)
{
- bool change;
InterpSaveState interpSaveState;
+ int savedBreakFlags;
+ int savedSubModes;
+
#if defined(WITH_JIT)
/* Target-specific save/restore */
extern void dvmJitCalleeSave(double *saveArea);
@@ -1320,6 +1778,16 @@
*/
interpSaveState = self->interpSave;
self->interpSave.prev = &interpSaveState;
+ /*
+ * Strip out and save any flags that should not be inherited by
+ * nested interpreter activation.
+ */
+ savedBreakFlags = self->interpBreak.ctl.breakFlags & LOCAL_BREAKFLAGS;
+ savedSubModes = self->interpBreak.ctl.subMode & LOCAL_SUBMODE;
+ if (savedBreakFlags | savedSubModes) {
+ dvmUpdateInterpBreak(self, savedBreakFlags, savedSubModes,
+ false /*disable*/);
+ }
#if defined(WITH_JIT)
dvmJitCalleeSave(calleeSave);
#endif
@@ -1344,12 +1812,6 @@
self->interpSave.method = method;
self->interpSave.fp = (u4*) self->curFrame;
self->interpSave.pc = method->insns;
- self->entryPoint = kInterpEntryInstr;
-
- if (dvmDebuggerOrProfilerActive())
- self->nextMode = INTERP_DBG;
- else
- self->nextMode = INTERP_STD;
assert(!dvmIsNativeMethod(method));
@@ -1366,36 +1828,19 @@
dvmAbort();
}
- typedef bool (*Interpreter)(Thread*);
+ typedef void (*Interpreter)(Thread*);
Interpreter stdInterp;
if (gDvm.executionMode == kExecutionModeInterpFast)
stdInterp = dvmMterpStd;
#if defined(WITH_JIT)
else if (gDvm.executionMode == kExecutionModeJit)
-/* If profiling overhead can be kept low enough, we can use a profiling
- * mterp fast for both Jit and "fast" modes. If overhead is too high,
- * create a specialized profiling interpreter.
- */
stdInterp = dvmMterpStd;
#endif
else
- stdInterp = dvmInterpretStd;
+ stdInterp = dvmInterpretPortable;
- change = true;
- while (change) {
- switch (self->nextMode) {
- case INTERP_STD:
- LOGVV("threadid=%d: interp STD\n", self->threadId);
- change = (*stdInterp)(self);
- break;
- case INTERP_DBG:
- LOGVV("threadid=%d: interp DBG\n", self->threadId);
- change = dvmInterpretDbg(self);
- break;
- default:
- dvmAbort();
- }
- }
+ // Call the interpreter
+ (*stdInterp)(self);
*pResult = self->retval;
@@ -1404,4 +1849,8 @@
#if defined(WITH_JIT)
dvmJitCalleeRestore(calleeSave);
#endif
+ if (savedBreakFlags | savedSubModes) {
+ dvmUpdateInterpBreak(self, savedBreakFlags, savedSubModes,
+ true /*enable*/);
+ }
}
diff --git a/vm/interp/Interp.h b/vm/interp/Interp.h
index 098429c..9e059f9 100644
--- a/vm/interp/Interp.h
+++ b/vm/interp/Interp.h
@@ -21,6 +21,20 @@
#define _DALVIK_INTERP_INTERP
/*
+ * Stash the dalvik PC in the frame. Called during interpretation.
+ */
+INLINE void dvmExportPC(const u2* pc, const u4* fp)
+{
+ SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc;
+}
+
+/*
+ * Extract the Dalvik opcode
+ */
+#define GET_OPCODE(_inst) (((_inst & 0xff) == OP_DISPATCH_FF) ? \
+ (0x100 + ((_inst >> 8) & 0xff)) : (_inst & 0xff))
+
+/*
* Interpreter entry point. Call here after setting up the interpreted
* stack (most code will want to get here via dvmCallMethod().)
*/
@@ -61,9 +75,31 @@
void dvmFlushBreakpoints(ClassObject* clazz);
/*
+ * Debugger support
+ */
+void dvmUpdateDebugger(const Method* method, const u2* pc, const u4* fp,
+ bool methodEntry, Thread* self);
+void dvmCheckBefore(const u2 *dPC, const u4 *fp, Thread* self);
+void dvmReportExceptionThrow(Thread* self, const Method* curMethod,
+ const u2* pc, void* fp);
+void dvmReportPreNativeInvoke(const u2* pc, Thread* self,
+ const Method* methodToCall);
+void dvmReportPostNativeInvoke(const u2* pc, Thread* self,
+ const Method* methodToCall);
+void dvmReportInvoke(Thread* self, const Method* methodToCall);
+void dvmReportReturn(Thread* self, const u2* pc, const u4* prevFP);
+
+/*
* Update interpBreak
*/
-void dvmUpdateInterpBreak(int newMode, bool enable);
+void dvmUpdateInterpBreak(Thread* thread, int newBreak, int newMode,
+ bool enable);
+void dvmAddToSuspendCounts(Thread* thread, int delta, int dbgDelta);
+
+/*
+ * Update interpBreak for all threads
+ */
+void dvmUpdateAllInterpBreak(int newBreak, int newMode, bool enable);
#ifndef DVM_NO_ASM_INTERP
extern void* dvmAsmInstructionStart[];
diff --git a/vm/interp/InterpDefs.h b/vm/interp/InterpDefs.h
index 10a77a2..d39a6b8 100644
--- a/vm/interp/InterpDefs.h
+++ b/vm/interp/InterpDefs.h
@@ -38,15 +38,12 @@
/*
* Portable interpreter.
*/
-extern bool dvmInterpretDbg(Thread* self);
-extern bool dvmInterpretStd(Thread* self);
-#define INTERP_STD 0
-#define INTERP_DBG 1
+extern void dvmInterpretPortable(Thread* self);
/*
* "mterp" interpreter.
*/
-extern bool dvmMterpStd(Thread* self);
+extern void dvmMterpStd(Thread* self);
/*
* Get the "this" pointer from the current frame.
@@ -78,14 +75,11 @@
const Method* method, DvmDex* methodClassDex);
/*
- * Determine if the debugger or profiler is currently active. Used when
- * selecting which interpreter to start or switch to.
+ * Determine if the debugger or profiler is currently active.
*/
-static inline bool dvmDebuggerOrProfilerActive(void)
+static inline bool dvmDebuggerOrProfilerActive()
{
- return gDvm.interpBreak & (kSubModeDebuggerActive |
- kSubModeEmulatorTrace |
- kSubModeInstCounting);
+ return gDvm.debuggerActive || gDvm.activeProfilers != 0;
}
#if defined(WITH_JIT)
@@ -109,20 +103,6 @@
(gDvmJit.pProfTable == NULL);
}
-/*
- * The fast and debug interpreter may be doing ping-pong without making forward
- * progress if the same trace building request sent upon entering the fast
- * interpreter is rejected immediately by the debug interpreter. Use the
- * following function to poll the rejection reasons and stay in the debug
- * interpreter until they are cleared. This will guarantee forward progress
- * in the extreme corner cases (eg set compiler threashold to 1).
- */
-static inline bool dvmJitStayInPortableInterpreter()
-{
- return dvmJitHideTranslation() ||
- (gDvmJit.compilerQueueLength >= gDvmJit.compilerHighWater);
-}
-
#endif
#endif /*_DALVIK_INTERP_DEFS*/
diff --git a/vm/interp/InterpState.h b/vm/interp/InterpState.h
index 1642594..2294a81 100644
--- a/vm/interp/InterpState.h
+++ b/vm/interp/InterpState.h
@@ -25,6 +25,71 @@
#define _DALVIK_INTERP_STATE
/*
+ * Execution mode, e.g. interpreter vs. JIT.
+ */
+typedef enum ExecutionMode {
+ kExecutionModeUnknown = 0,
+ kExecutionModeInterpPortable,
+ kExecutionModeInterpFast,
+#if defined(WITH_JIT)
+ kExecutionModeJit,
+#endif
+} ExecutionMode;
+
+/*
+ * Execution sub modes, e.g. debugging, profiling, etc.
+ * Treated as bit flags for fast access. These values are used directly
+ * by assembly code in the mterp interpeter and may also be used by
+ * code generated by the JIT. Take care when changing.
+ */
+typedef enum ExecutionSubModes {
+ kSubModeNormal = 0x00,
+ kSubModeMethodTrace = 0x01,
+ kSubModeEmulatorTrace = 0x02,
+ kSubModeInstCounting = 0x04,
+ kSubModeDebuggerActive = 0x08,
+#if defined(WITH_JIT)
+ kSubModeJitTraceBuild = 0x10,
+ kSubModeJitSV = 0x20,
+#endif
+ kSubModeDebugProfile = (kSubModeMethodTrace |
+ kSubModeEmulatorTrace |
+ kSubModeInstCounting |
+ kSubModeDebuggerActive)
+} ExecutionSubModes;
+
+/*
+ * Interpreter break flags. When set, causes the interpreter to
+ * break from normal execution and invoke the associated callback
+ * handler.
+ */
+
+typedef enum InterpBreakFlags {
+ kInterpNoBreak = 0x00,
+ kInterpSuspendBreak = 0x01,
+ kInterpInstCountBreak = 0x02,
+ kInterpDebugBreak = 0x04,
+ kInterpEmulatorTraceBreak = 0x08,
+ kInterpSingleStep = 0x10,
+#if defined(WITH_JIT)
+ kInterpJitBreak = 0x20,
+#endif
+} InterpBreakFlags;
+
+/*
+ * Identify which break and submode flags should be local
+ * to an interpreter activation.
+ */
+#if defined(WITH_JIT)
+#define LOCAL_SUBMODE (kSubModeJitTraceBuild)
+#define LOCAL_BREAKFLAGS (kInterpJitBreak | kInterpSingleStep)
+#else
+#define LOCAL_SUBMODE (0)
+#define LOCAL_BREAKFLAGS (0)
+#endif
+
+
+/*
* Specify the starting point when switching between interpreters.
*/
typedef enum InterpEntry {
@@ -42,7 +107,6 @@
const Method *method; // Method being executed
DvmDex* methodClassDex;
void* bailPtr;
- volatile int* pInterpBreak; // FIXME - use directly
#if defined(WITH_TRACKREF_CHECKS)
int debugTrackedRefStart;
#else
@@ -90,7 +154,7 @@
#endif
};
-/* States of the dbg interpreter when serving a JIT-related request */
+/* States of the interpreter when serving a JIT-related request */
typedef enum JitState {
/* Entering states in the debug interpreter */
kJitNot = 0, // Non-JIT related reasons */
@@ -101,9 +165,7 @@
/* Operational states in the debug interpreter */
kJitTSelect = 4, // Actively selecting a trace
kJitTSelectEnd = 5, // Done with the trace - wrap it up
- kJitSingleStep = 6, // Single step interpretation
- kJitSingleStepEnd = 7, // Done with single step, ready return to mterp
- kJitDone = 8, // Ready to leave the debug interpreter
+ kJitDone = 6, // No further JIT actions for interpBreak
} JitState;
#if defined(WITH_SELF_VERIFICATION)
diff --git a/vm/interp/Jit.c b/vm/interp/Jit.c
index 6a4615d..0274a24 100644
--- a/vm/interp/Jit.c
+++ b/vm/interp/Jit.c
@@ -22,7 +22,6 @@
#include "Dalvik.h"
#include "Jit.h"
-
#include "libdex/DexOpcodes.h"
#include <unistd.h>
#include <pthread.h>
@@ -86,20 +85,6 @@
}
shadowSpace->selfVerificationState = kSVSStart;
- if (self->entryPoint == kInterpEntryResume) {
- self->entryPoint = kInterpEntryInstr;
-#if 0
- /* Tracking the success rate of resume after single-stepping */
- if (self->jitResumeDPC == pc) {
- LOGD("SV single step resumed at %p", pc);
- }
- else {
- LOGD("real %p DPC %p NPC %p", pc, self->jitResumeDPC,
- self->jitResumeNPC);
- }
-#endif
- }
-
// Dynamically grow shadow register space if necessary
if (preBytes + postBytes > shadowSpace->registerSpaceSize * sizeof(u4)) {
free(shadowSpace->registerSpace);
@@ -286,8 +271,19 @@
while(gDvmJit.selfVerificationSpin) sleep(10);
}
-/* Manage self verification while in the debug interpreter */
-static bool selfVerificationDebugInterp(const u2* pc, Thread* self)
+/*
+ * If here, we're re-interpreting an instruction that was included
+ * in a trace that was just executed. This routine is called for
+ * each instruction in the original trace, and compares state
+ * when it reaches the end point.
+ *
+ * TUNING: the interpretation mechanism now supports a counted
+ * single-step mechanism. If we were to associate an instruction
+ * count with each trace exit, we could just single-step the right
+ * number of cycles and then compare. This would improve detection
+ * of control divergences, as well as (slightly) simplify this code.
+ */
+void dvmCheckSelfVerification(const u2* pc, Thread* self)
{
ShadowSpace *shadowSpace = self->shadowSpace;
SelfVerificationState state = shadowSpace->selfVerificationState;
@@ -385,14 +381,28 @@
}
if (memDiff) selfVerificationSpinLoop(shadowSpace);
+
/*
- * Switch to JIT single step mode to stay in the debug interpreter for
- * one more instruction
+ * Success. If this shadowed trace included a single-stepped
+ * instruction, we need to stay in the interpreter for one
+ * more interpretation before resuming.
*/
if (state == kSVSSingleStep) {
- self->jitState = kJitSingleStepEnd;
+ assert(self->jitResumeNPC != NULL);
+ assert(self->singleStepCount == 0);
+ self->singleStepCount = 1;
+ dvmUpdateInterpBreak(self, kInterpSingleStep, kSubModeNormal,
+ true /* enable */);
}
- return true;
+
+ /*
+ * Switch off shadow replay mode. The next shadowed trace
+ * execution will turn it back on.
+ */
+ dvmUpdateInterpBreak(self, kInterpJitBreak, kSubModeJitSV,
+ false /* disable */);
+ self->jitState = kJitDone;
+ return;
/* If end not been reached, make sure max length not exceeded */
} else if (shadowSpace->traceLength >= JIT_MAX_TRACE_LEN) {
@@ -403,14 +413,12 @@
selfVerificationDumpTrace(pc, self);
selfVerificationSpinLoop(shadowSpace);
- return true;
+ return;
}
/* Log the instruction address and decoded instruction for debug */
shadowSpace->trace[shadowSpace->traceLength].addr = (int)pc;
shadowSpace->trace[shadowSpace->traceLength].decInsn = decInsn;
shadowSpace->traceLength++;
-
- return false;
}
#endif
@@ -432,6 +440,7 @@
* free it because some thread may be holding a reference.
*/
gDvmJit.pProfTable = NULL;
+ dvmJitUpdateState();
}
#if defined(WITH_JIT_TUNING)
@@ -531,11 +540,16 @@
}
-/* End current trace after last successful instruction */
-void dvmJitEndTraceSelect(Thread* self)
+/* End current trace now & don't include current instruction */
+void dvmJitEndTraceSelect(Thread* self, const u2* dPC)
{
- if (self->jitState == kJitTSelect)
+ if (self->jitState == kJitTSelect) {
self->jitState = kJitTSelectEnd;
+ }
+ if (self->jitState == kJitTSelectEnd) {
+ // Clean up and finish now.
+ dvmCheckJit(dPC, self);
+ }
}
/*
@@ -648,7 +662,7 @@
const u2* dpcBase;
int curFrag = 0;
LOGD("===========================================");
- LOGD("Trace dump 0x%x, Method %s starting offset 0x%x",(int)trace,
+ LOGD("Trace dump 0x%x, Method %s off 0x%x",(int)trace,
trace->method->name,trace->trace[curFrag].info.frag.startOffset);
dpcBase = trace->method->insns;
while (!done) {
@@ -662,8 +676,8 @@
dpc = dpcBase + trace->trace[curFrag].info.frag.startOffset;
for (i=0; i<trace->trace[curFrag].info.frag.numInsts; i++) {
dexDecodeInstruction(dpc, &decInsn);
- LOGD(" 0x%04x - %s",(dpc-dpcBase),
- dexGetOpcodeName(decInsn.opcode));
+ LOGD(" 0x%04x - %s 0x%x",(dpc-dpcBase),
+ dexGetOpcodeName(decInsn.opcode),(int)dpc);
dpc += dexGetWidthFromOpcode(decInsn.opcode);
}
if (trace->trace[curFrag].info.frag.runEnd) {
@@ -758,25 +772,18 @@
* because returns cannot throw in a way that causes problems for the
* translated code.
*/
-int dvmCheckJit(const u2* pc, Thread* self, const ClassObject* thisClass,
- const Method* curMethod)
+void dvmCheckJit(const u2* pc, Thread* self)
{
+ const ClassObject *thisClass = self->callsiteClass;
+ const Method* curMethod = self->methodToCall;
int flags, len;
- int switchInterp = false;
- bool debugOrProfile = dvmDebuggerOrProfilerActive();
- /* Stay in the dbg interpreter for the next instruction */
+ int allDone = false;
+ /* Stay in break/single-stop mode for the next instruction */
bool stayOneMoreInst = false;
- /*
- * Bug 2710533 - dalvik crash when disconnecting debugger
- *
- * Reset the entry point to the default value. If needed it will be set to a
- * specific value in the corresponding case statement (eg kJitSingleStepEnd)
- */
- self->entryPoint = kInterpEntryInstr;
-
- /* Prepare to handle last PC and stage the current PC */
+ /* Prepare to handle last PC and stage the current PC & method*/
const u2 *lastPC = self->lastPC;
+
self->lastPC = pc;
switch (self->jitState) {
@@ -800,15 +807,15 @@
break;
}
-
#if defined(SHOW_TRACE)
- LOGD("TraceGen: adding %s", dexGetOpcodeName(decInsn.opcode));
+ LOGD("TraceGen: adding %s. lpc:0x%x, pc:0x%x",
+ dexGetOpcodeName(decInsn.opcode), (int)lastPC, (int)pc);
#endif
flags = dexGetFlagsFromOpcode(decInsn.opcode);
len = dexGetWidthFromInstruction(lastPC);
- offset = lastPC - self->interpSave.method->insns;
+ offset = lastPC - self->traceMethod->insns;
assert((unsigned) offset <
- dvmGetMethodInsnsSize(self->interpSave.method));
+ dvmGetMethodInsnsSize(self->traceMethod));
if (lastPC != self->currRunHead + self->currRunLen) {
int currTraceRun;
/* We need to start a new trace run */
@@ -867,11 +874,6 @@
if (self->totalTraceLen >= JIT_MAX_TRACE_LEN) {
self->jitState = kJitTSelectEnd;
}
- /* Abandon the trace request if debugger/profiler is attached */
- if (debugOrProfile) {
- self->jitState = kJitDone;
- break;
- }
if ((flags & kInstrCanReturn) != kInstrCanReturn) {
break;
}
@@ -897,7 +899,7 @@
dvmCompilerGetInterpretTemplateSet(),
false /* Not method entry */, 0);
self->jitState = kJitDone;
- switchInterp = true;
+ allDone = true;
break;
}
@@ -923,23 +925,21 @@
LOGE("Out of memory in trace selection");
dvmJitStopTranslationRequests();
self->jitState = kJitDone;
- switchInterp = true;
+ allDone = true;
break;
}
- desc->method = self->interpSave.method;
+ desc->method = self->traceMethod;
memcpy((char*)&(desc->trace[0]),
(char*)&(self->trace[0]),
sizeof(JitTraceRun) * (self->currTraceRun+1));
#if defined(SHOW_TRACE)
LOGD("TraceGen: trace done, adding to queue");
+ dvmJitDumpTraceDesc(desc);
#endif
if (dvmCompilerWorkEnqueue(
self->currTraceHead,kWorkOrderTrace,desc)) {
/* Work order successfully enqueued */
-#if defined(SHOW_TRACE)
- dvmJitDumpTraceDesc(desc);
-#endif
if (gDvmJit.blockingMode) {
dvmCompilerDrainQueue();
}
@@ -951,63 +951,36 @@
free(desc);
}
self->jitState = kJitDone;
- switchInterp = true;
+ allDone = true;
}
break;
- case kJitSingleStep:
- self->jitState = kJitSingleStepEnd;
- break;
- case kJitSingleStepEnd:
- /*
- * Clear the inJitCodeCache flag and abandon the resume attempt if
- * we cannot switch back to the translation due to corner-case
- * conditions. If the flag is not cleared and the code cache is full
- * we will be stuck in the debug interpreter as the code cache
- * cannot be reset.
- */
- if (dvmJitStayInPortableInterpreter()) {
- self->entryPoint = kInterpEntryInstr;
- self->inJitCodeCache = 0;
- } else {
- self->entryPoint = kInterpEntryResume;
- }
- self->jitState = kJitDone;
- switchInterp = true;
- break;
case kJitDone:
- switchInterp = true;
+ allDone = true;
break;
-#if defined(WITH_SELF_VERIFICATION)
- case kJitSelfVerification:
- if (selfVerificationDebugInterp(pc, self)) {
- /*
- * If the next state is not single-step end, we can switch
- * interpreter now.
- */
- if (self->jitState != kJitSingleStepEnd) {
- self->jitState = kJitDone;
- switchInterp = true;
- }
- }
- break;
-#endif
case kJitNot:
- switchInterp = !debugOrProfile;
+ allDone = true;
break;
default:
- LOGE("Unexpected JIT state: %d entry point: %d",
- self->jitState, self->entryPoint);
+ LOGE("Unexpected JIT state: %d", self->jitState);
dvmAbort();
break;
}
+
/*
- * Final check to see if we can really switch the interpreter. Make sure
- * the jitState is kJitDone or kJitNot when switchInterp is set to true.
+ * If we're done with trace selection, switch off the control flags.
*/
- assert(switchInterp == false || self->jitState == kJitDone ||
- self->jitState == kJitNot);
- return switchInterp && !debugOrProfile && !stayOneMoreInst &&
- !dvmJitStayInPortableInterpreter();
+ if (allDone) {
+ dvmUpdateInterpBreak(self, kInterpJitBreak,
+ kSubModeJitTraceBuild, false);
+ if (stayOneMoreInst) {
+ // Keep going in single-step mode for at least one more inst
+ assert(self->jitResumeNPC == NULL);
+ self->singleStepCount = MIN(1, self->singleStepCount);
+ dvmUpdateInterpBreak(self, kInterpSingleStep, kSubModeNormal,
+ true /* enable */);
+ }
+ }
+ return;
}
JitEntry *dvmJitFindEntry(const u2* pc, bool isMethodEntry)
@@ -1098,6 +1071,26 @@
}
/*
+ * Similar to dvmJitGetTraceAddr, but returns null if the calling
+ * thread is in a single-step mode.
+ */
+void* dvmJitGetTraceAddrThread(const u2* dPC, Thread* self)
+{
+ return (self->interpBreak.ctl.breakFlags != 0) ? NULL :
+ getCodeAddrCommon(dPC, false /* method entry */);
+}
+
+/*
+ * Similar to dvmJitGetMethodAddr, but returns null if the calling
+ * thread is in a single-step mode.
+ */
+void* dvmJitGetMethodAddrThread(const u2* dPC, Thread* self)
+{
+ return (self->interpBreak.ctl.breakFlags != 0) ? NULL :
+ getCodeAddrCommon(dPC, true /* method entry */);
+}
+
+/*
* Register the translated code pointer into the JitTable.
* NOTE: Once a codeAddress field transitions from initial state to
* JIT'd code, it must not be altered without first halting all
@@ -1136,13 +1129,12 @@
}
/*
- * Determine if valid trace-bulding request is active. Return true
- * if we need to abort and switch back to the fast interpreter, false
- * otherwise.
+ * Determine if valid trace-bulding request is active. If so, set
+ * the proper flags in interpBreak and return. Trace selection will
+ * then begin normally via dvmCheckBefore.
*/
-bool dvmJitCheckTraceRequest(Thread* self)
+void dvmJitCheckTraceRequest(Thread* self)
{
- bool switchInterp = false; /* Assume success */
int i;
/*
* A note on trace "hotness" filtering:
@@ -1197,10 +1189,13 @@
u4 pcKey = ((u4)self->interpSave.pc >> 1) &
((1 << JIT_TRACE_THRESH_FILTER_PC_BITS) - 1);
intptr_t filterKey = (intptr_t)(methodKey | pcKey);
- bool debugOrProfile = dvmDebuggerOrProfilerActive();
+
+ // Shouldn't be here if already building a trace.
+ assert((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild)==0);
/* Check if the JIT request can be handled now */
- if (gDvmJit.pJitEntryTable != NULL && debugOrProfile == false) {
+ if ((gDvmJit.pJitEntryTable != NULL) &&
+ ((self->interpBreak.ctl.breakFlags & kInterpSingleStep) == 0)){
/* Bypass the filter for hot trace requests or during stress mode */
if (self->jitState == kJitTSelectRequest &&
gDvmJit.threshold > 6) {
@@ -1259,6 +1254,7 @@
case kJitTSelectRequest:
case kJitTSelectRequestHot:
self->jitState = kJitTSelect;
+ self->traceMethod = self->interpSave.method;
self->currTraceHead = self->interpSave.pc;
self->currTraceRun = 0;
self->totalTraceLen = 0;
@@ -1271,34 +1267,24 @@
self->trace[0].info.frag.hint = kJitHintNone;
self->trace[0].isCode = true;
self->lastPC = 0;
+ /* Turn on trace selection mode */
+ dvmUpdateInterpBreak(self, kInterpJitBreak,
+ kSubModeJitTraceBuild, true);
+#if defined(SHOW_TRACE)
+ LOGD("Starting trace for %s at 0x%x",
+ self->interpSave.method->name, (int)self->interpSave.pc);
+#endif
break;
- /*
- * For JIT's perspective there is no need to stay in the debug
- * interpreter unless debugger/profiler is attached.
- */
case kJitDone:
- switchInterp = true;
break;
default:
- LOGE("Unexpected JIT state: %d entry point: %d",
- self->jitState, self->entryPoint);
+ LOGE("Unexpected JIT state: %d", self->jitState);
dvmAbort();
}
} else {
- /*
- * Cannot build trace this time - ready to leave the dbg interpreter
- */
+ /* Cannot build trace this time */
self->jitState = kJitDone;
- switchInterp = true;
}
-
- /*
- * Final check to see if we can really switch the interpreter. Make sure
- * the jitState is kJitDone when switchInterp is set to true.
- */
- assert(switchInterp == false || self->jitState == kJitDone);
- return switchInterp && !debugOrProfile &&
- !dvmJitStayInPortableInterpreter();
}
/*
@@ -1492,4 +1478,21 @@
(void*) kTraceProfilingDisabled);
}
+/*
+ * Walk through the thread list and refresh all local copies of
+ * JIT global state (which was placed there for fast access).
+ */
+void dvmJitUpdateState()
+{
+ Thread* self = dvmThreadSelf();
+ Thread* thread;
+
+ dvmLockThreadList(self);
+ for (thread = gDvm.threadList; thread != NULL; thread = thread->next) {
+ thread->pJitProfTable = gDvmJit.pProfTable;
+ thread->jitThreshold = gDvmJit.threshold;
+ }
+ dvmUnlockThreadList();
+
+}
#endif /* WITH_JIT */
diff --git a/vm/interp/Jit.h b/vm/interp/Jit.h
index 6d5d971..b7e0f4a 100644
--- a/vm/interp/Jit.h
+++ b/vm/interp/Jit.h
@@ -70,6 +70,7 @@
void* dvmSelfVerificationRestoreState(const u2* pc, u4* fp,
SelfVerificationState exitPoint,
Thread *self);
+void dvmCheckSelfVerification(const u2* pc, Thread* self);
#endif
/*
@@ -142,11 +143,10 @@
void* codeAddress; /* Code address of native translation */
} JitEntry;
-int dvmCheckJit(const u2* pc, Thread* self, const ClassObject *callsiteClass,
- const Method* curMethod);
+void dvmCheckJit(const u2* pc, Thread* self);
void* dvmJitGetTraceAddr(const u2* dPC);
void* dvmJitGetMethodAddr(const u2* dPC);
-bool dvmJitCheckTraceRequest(Thread* self);
+void dvmJitCheckTraceRequest(Thread* self);
void dvmJitStopTranslationRequests(void);
void dvmJitStats(void);
bool dvmJitResizeJitTable(unsigned int size);
@@ -156,11 +156,13 @@
s8 dvmJitf2l(float f);
void dvmJitSetCodeAddr(const u2* dPC, void *nPC, JitInstructionSetType set,
bool isMethodEntry, int profilePrefixSize);
-void dvmJitEndTraceSelect(Thread* self);
+void dvmJitEndTraceSelect(Thread* self, const u2* dPC);
JitTraceCounter_t *dvmJitNextTraceCounter(void);
void dvmJitTraceProfilingOff(void);
void dvmJitTraceProfilingOn(void);
void dvmJitChangeProfileMode(TraceProfilingModes newState);
void dvmJitDumpTraceDesc(JitTraceDescription *trace);
+void dvmJitUpdateState(void);
+void dvmJitResumeTranslation(Thread* self, const u2* pc, const u4* fp);
#endif /*_DALVIK_INTERP_JIT*/
diff --git a/vm/jdwp/JdwpMain.c b/vm/jdwp/JdwpMain.c
index b4471da..24e5c6c 100644
--- a/vm/jdwp/JdwpMain.c
+++ b/vm/jdwp/JdwpMain.c
@@ -393,7 +393,7 @@
*/
s8 dvmJdwpLastDebuggerActivity(JdwpState* state)
{
- if (!DEBUGGER_ACTIVE) {
+ if (!gDvm.debuggerActive) {
LOGD("dvmJdwpLastDebuggerActivity: no active debugger\n");
return -1;
}
diff --git a/vm/mterp/Mterp.c b/vm/mterp/Mterp.c
index f6e329f..4bcf822 100644
--- a/vm/mterp/Mterp.c
+++ b/vm/mterp/Mterp.c
@@ -31,8 +31,10 @@
#ifndef DVM_NO_ASM_INTERP
+#ifndef DVM_JMP_TABLE_MTERP
extern void* dvmAsmInstructionStart[];
extern void* dvmAsmInstructionEnd[];
+#endif
#define ASM_DEF_VERIFY
#include "mterp/common/asm-constants.h"
@@ -66,39 +68,20 @@
/*
- * "Standard" mterp entry point.
- * (There is presently no "debug" entry point.)
+ * "Mterp entry point.
*/
-bool dvmMterpStd(Thread* self)
+void dvmMterpStd(Thread* self)
{
- int changeInterp;
-
/* configure mterp items */
self->interpSave.methodClassDex = self->interpSave.method->clazz->pDvmDex;
-#if defined(WITH_JIT)
- /*
- * FIXME: temporary workaround. When we have the ability to
- * walk through the thread list to initialize mterp & JIT state,
- * elminate this line.
- */
- self->jitThreshold = gDvmJit.threshold;
-#endif
-
- /* Handle method entry bookkeeping */
- if (self->debugIsMethodEntry) {
- self->debugIsMethodEntry = false;
- TRACE_METHOD_ENTER(self, self->interpSave.method);
- }
-
IF_LOGVV() {
char* desc = dexProtoCopyMethodDescriptor(
&self->interpSave.method->prototype);
- LOGVV("mterp threadid=%d entry %d: %s.%s %s\n",
+ LOGVV("mterp threadid=%d : %s.%s %s\n",
dvmThreadSelf()->threadId,
- self->entryPoint,
- self->method->clazz->descriptor,
- self->method->name,
+ self->interpSave.method->clazz->descriptor,
+ self->interpSave.method->name,
desc);
free(desc);
}
@@ -106,24 +89,9 @@
// self->interpSave.fp);
//LOGI("first instruction is 0x%04x\n", self->interpSave.pc[0]);
- changeInterp = dvmMterpStdRun(self);
+ dvmMterpStdRun(self);
-#if defined(WITH_JIT)
- if (self->jitState != kJitSingleStep) {
- self->inJitCodeCache = NULL;
- }
-#endif
-
- if (!changeInterp) {
- /* this is a "normal" exit; we're not coming back */
#ifdef LOG_INSTR
- LOGD("|-- Leaving interpreter loop");
+ LOGD("|-- Leaving interpreter loop");
#endif
- return false;
- } else {
- /* we're "standard", so switch to "debug" */
- LOGVV(" mterp returned, changeInterp=%d\n", changeInterp);
- self->nextMode = INTERP_DBG;
- return true;
- }
}
diff --git a/vm/mterp/README.txt b/vm/mterp/README.txt
index e628fb5..ed7e003 100644
--- a/vm/mterp/README.txt
+++ b/vm/mterp/README.txt
@@ -13,9 +13,7 @@
The original all-in-one-function C version still exists as the "portable"
interpreter, and is generated using the same sources and tools that
-generate the platform-specific versions. One form of the portable
-interpreter includes support for profiling and debugging features, and
-is included even if we have a platform-optimized implementation.
+generate the platform-specific versions.
Every configuration has a "config-*" file that controls how the sources
are generated. The sources are written into the "out" directory, where
@@ -250,3 +248,21 @@
The ultimate goal is to have the build system generate the necessary
output files without requiring this separate step, but we're not yet
ready to require Python in the build.
+
+==== Interpreter Control ====
+
+To handle thread suspension, debugging, profiling, JIT compilation, etc.,
+there needs to be a way to break out of interpreter execution. To support
+this, there is an "interpBreak" record in each thread's private storage.
+If interpBreak.ctl.breakFlags is non-zero, the interpreter main loop must
+be interrupted and control sent to dvmCheckBefore(), which will figure out
+what actions are needed and carry them out.
+
+In the portable interpreter, this requirement is implemented as a simple
+polling test in the main loop. breakFlags is checked before the interpretation
+of each instruction. Though simple, this is costly. For mterp interpreters,
+we use a mechanism that swaps out the handler base register with a pointer
+to an alternate, or break-out, set of handlers. Note that interpretation
+interruption may be slightly delayed. Each thread has its own copy of the
+handler base (register rIBASE), which it will refresh on taken backards
+branches, exception throws and returns.
diff --git a/vm/mterp/armv5te/OP_BREAKPOINT.S b/vm/mterp/armv5te/OP_BREAKPOINT.S
index faa7246..662227c 100644
--- a/vm/mterp/armv5te/OP_BREAKPOINT.S
+++ b/vm/mterp/armv5te/OP_BREAKPOINT.S
@@ -1 +1,14 @@
-%include "armv5te/unused.S"
+%verify "executed"
+ /*
+ * Breakpoint handler.
+ *
+ * Restart this instruction with the original opcode. By
+ * the time we get here, the breakpoint will have already been
+ * handled.
+ */
+ mov r0, rPC
+ bl dvmGetOriginalOpcode @ (rPC)
+ FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst
+ and rINST, #0xff00
+ orr rINST, rINST, r0
+ GOTO_OPCODE(r0)
diff --git a/vm/mterp/armv5te/OP_EXECUTE_INLINE.S b/vm/mterp/armv5te/OP_EXECUTE_INLINE.S
index e97ff36..8cd5f78 100644
--- a/vm/mterp/armv5te/OP_EXECUTE_INLINE.S
+++ b/vm/mterp/armv5te/OP_EXECUTE_INLINE.S
@@ -9,11 +9,18 @@
* The first four args are in r0-r3, pointer to return value storage
* is on the stack. The function's return value is a flag that tells
* us if an exception was thrown.
+ *
+ * TUNING: could maintain two tables, pointer in Thread and
+ * swap if profiler/debuggger active.
*/
/* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .L${opcode}_debugmode @ yes - take slow path
+.L${opcode}_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #12 @ r0<- B
str r1, [sp] @ push &self->retval
@@ -56,5 +63,35 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.L${opcode}_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .L${opcode}_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .L${opcode}_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.L${opcode}_table:
.word gDvmInlineOpsTable
diff --git a/vm/mterp/armv5te/OP_EXECUTE_INLINE_RANGE.S b/vm/mterp/armv5te/OP_EXECUTE_INLINE_RANGE.S
index 7ef2400..ba19ca5 100644
--- a/vm/mterp/armv5te/OP_EXECUTE_INLINE_RANGE.S
+++ b/vm/mterp/armv5te/OP_EXECUTE_INLINE_RANGE.S
@@ -12,9 +12,13 @@
* us if an exception was thrown.
*/
/* [opt] execute-inline/range {vCCCC..v(CCCC+AA-1)}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .L${opcode}_debugmode @ yes - take slow path
+.L${opcode}_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #8 @ r0<- AA
str r1, [sp] @ push &self->retval
@@ -51,5 +55,37 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.L${opcode}_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .L${opcode}_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .L${opcode}_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.L${opcode}_table:
.word gDvmInlineOpsTable
+
diff --git a/vm/mterp/armv5te/OP_FILLED_NEW_ARRAY.S b/vm/mterp/armv5te/OP_FILLED_NEW_ARRAY.S
index 8c79cc1..f580d1c 100644
--- a/vm/mterp/armv5te/OP_FILLED_NEW_ARRAY.S
+++ b/vm/mterp/armv5te/OP_FILLED_NEW_ARRAY.S
@@ -95,11 +95,14 @@
* mode of filled-new-array.
*/
.L${opcode}_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_${opcode}
bl dvmThrowInternalError
b common_exceptionThrown
- .if (!$isrange) @ define in one or the other, not both
-.L_strFilledNewArrayNotImpl:
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_${opcode}:
.word .LstrFilledNewArrayNotImpl
- .endif
diff --git a/vm/mterp/armv5te/OP_FILLED_NEW_ARRAY_JUMBO.S b/vm/mterp/armv5te/OP_FILLED_NEW_ARRAY_JUMBO.S
index a3f1695..32364f4 100644
--- a/vm/mterp/armv5te/OP_FILLED_NEW_ARRAY_JUMBO.S
+++ b/vm/mterp/armv5te/OP_FILLED_NEW_ARRAY_JUMBO.S
@@ -72,6 +72,14 @@
* mode of filled-new-array.
*/
.L${opcode}_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_${opcode}
bl dvmThrowInternalError
b common_exceptionThrown
+
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_${opcode}:
+ .word .LstrFilledNewArrayNotImpl
diff --git a/vm/mterp/armv5te/OP_GOTO.S b/vm/mterp/armv5te/OP_GOTO.S
index 26f0c8f..7feca7b 100644
--- a/vm/mterp/armv5te/OP_GOTO.S
+++ b/vm/mterp/armv5te/OP_GOTO.S
@@ -7,19 +7,16 @@
* double to get a byte offset.
*/
/* goto +AA */
+ /* tuning: use sbfx for 6t2+ targets */
mov r0, rINST, lsl #16 @ r0<- AAxx0000
- movs r9, r0, asr #24 @ r9<- ssssssAA (sign-extended)
- mov r9, r9, lsl #1 @ r9<- byte offset
- bmi common_backwardBranch @ backward branch, do periodic checks
+ movs r1, r0, asr #24 @ r1<- ssssssAA (sign-extended)
+ add r2, r1, r1 @ r2<- byte offset, set flags
+ @ If backwards branch refresh rIBASE
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) check for trace hotness
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_GOTO_16.S b/vm/mterp/armv5te/OP_GOTO_16.S
index 5a8edee..8b1f1bd 100644
--- a/vm/mterp/armv5te/OP_GOTO_16.S
+++ b/vm/mterp/armv5te/OP_GOTO_16.S
@@ -8,17 +8,12 @@
*/
/* goto/16 +AAAA */
FETCH_S(r0, 1) @ r0<- ssssAAAA (sign-extended)
- movs r9, r0, asl #1 @ r9<- byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
+ adds r1, r0, r0 @ r1<- byte offset, flags set
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) hot trace head?
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/OP_GOTO_32.S b/vm/mterp/armv5te/OP_GOTO_32.S
index 17780b9..6202d7e 100644
--- a/vm/mterp/armv5te/OP_GOTO_32.S
+++ b/vm/mterp/armv5te/OP_GOTO_32.S
@@ -7,26 +7,23 @@
* double to get a byte offset.
*
* Unlike most opcodes, this one is allowed to branch to itself, so
- * our "backward branch" test must be "<=0" instead of "<0". The ORRS
- * instruction doesn't affect the V flag, so we need to clear it
- * explicitly.
+ * our "backward branch" test must be "<=0" instead of "<0". Because
+ * we need the V bit set, we'll use an adds to convert from Dalvik
+ * offset to byte offset.
*/
/* goto/32 +AAAAAAAA */
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- cmp ip, ip @ (clear V flag during stall)
- orrs r0, r0, r1, lsl #16 @ r0<- AAAAaaaa, check sign
- mov r9, r0, asl #1 @ r9<- byte offset
- ble common_backwardBranch @ backward branch, do periodic checks
+ orr r0, r0, r1, lsl #16 @ r0<- AAAAaaaa
+ adds r1, r0, r0 @ r1<- byte offset
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ble common_testUpdateProfile @ (r0) hot trace head?
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
diff --git a/vm/mterp/armv5te/OP_INVOKE_DIRECT.S b/vm/mterp/armv5te/OP_INVOKE_DIRECT.S
index 15b173f..7167a2b 100644
--- a/vm/mterp/armv5te/OP_INVOKE_DIRECT.S
+++ b/vm/mterp/armv5te/OP_INVOKE_DIRECT.S
@@ -23,11 +23,11 @@
.endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .L${opcode}_resolve @ not resolved, do it now
.L${opcode}_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethod${routine} @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethod${routine} @ r0=method, r9="this"
b common_errNullObject @ yes, throw exception
%break
@@ -42,6 +42,5 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .L${opcode}_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
diff --git a/vm/mterp/armv5te/OP_INVOKE_DIRECT_JUMBO.S b/vm/mterp/armv5te/OP_INVOKE_DIRECT_JUMBO.S
index 5613fbb..7f6c435 100644
--- a/vm/mterp/armv5te/OP_INVOKE_DIRECT_JUMBO.S
+++ b/vm/mterp/armv5te/OP_INVOKE_DIRECT_JUMBO.S
@@ -19,11 +19,11 @@
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .L${opcode}_resolve @ not resolved, do it now
.L${opcode}_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodJumbo @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodJumbo @ (r0=method, r9="this")
b common_errNullObject @ yes, throw exception
%break
@@ -38,6 +38,5 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .L${opcode}_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
diff --git a/vm/mterp/armv5te/OP_INVOKE_INTERFACE.S b/vm/mterp/armv5te/OP_INVOKE_INTERFACE.S
index 3149775..5ed35a8 100644
--- a/vm/mterp/armv5te/OP_INVOKE_INTERFACE.S
+++ b/vm/mterp/armv5te/OP_INVOKE_INTERFACE.S
@@ -15,13 +15,13 @@
and r2, r2, #15 @ r2<- C (or stays CCCC)
.endif
EXPORT_PC() @ must export for invoke
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethod${routine} @ jump to common handler
+ b common_invokeMethod${routine} @ (r0=method, r9="this")
diff --git a/vm/mterp/armv5te/OP_INVOKE_INTERFACE_JUMBO.S b/vm/mterp/armv5te/OP_INVOKE_INTERFACE_JUMBO.S
index 930d7d5..34ccf86 100644
--- a/vm/mterp/armv5te/OP_INVOKE_INTERFACE_JUMBO.S
+++ b/vm/mterp/armv5te/OP_INVOKE_INTERFACE_JUMBO.S
@@ -10,13 +10,13 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
EXPORT_PC() @ must export for invoke
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodJumbo @ jump to common handler
+ b common_invokeMethodJumbo @ (r0=method, r9="this")
diff --git a/vm/mterp/armv5te/OP_INVOKE_OBJECT_INIT_JUMBO.S b/vm/mterp/armv5te/OP_INVOKE_OBJECT_INIT_JUMBO.S
index 47e3a4a..c0d7320 100644
--- a/vm/mterp/armv5te/OP_INVOKE_OBJECT_INIT_JUMBO.S
+++ b/vm/mterp/armv5te/OP_INVOKE_OBJECT_INIT_JUMBO.S
@@ -1,2 +1,2 @@
%verify "executed"
-%include "armv5te/OP_INVOKE_OBJECT_INIT_RANGE.S" {"cccc":"4"}
+%include "armv5te/OP_INVOKE_OBJECT_INIT_RANGE.S" {"jumbo":"1", "cccc":"4"}
diff --git a/vm/mterp/armv5te/OP_INVOKE_OBJECT_INIT_RANGE.S b/vm/mterp/armv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
index 89d4a26..cdb98df 100644
--- a/vm/mterp/armv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
+++ b/vm/mterp/armv5te/OP_INVOKE_OBJECT_INIT_RANGE.S
@@ -1,10 +1,10 @@
-%default { "cccc":"2" }
+%default { "jumbo":"0", "cccc":"2" }
%verify "executed"
%verify "finalizable class"
/*
* Invoke Object.<init> on an object. In practice we know that
* Object's nullary constructor doesn't do anything, so we just
- * skip it (we know a debugger isn't active).
+ * skip it unless a debugger is active.
*/
FETCH(r1, ${cccc}) @ r1<- CCCC
GET_VREG(r0, r1) @ r0<- "this" ptr
@@ -13,12 +13,36 @@
ldr r1, [r0, #offObject_clazz] @ r1<- obj->clazz
ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
- beq 1f @ nope, done
+ bne .L${opcode}_setFinal @ yes, go
+.L${opcode}_finish:
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeDebuggerActive @ debugger active?
+ bne .L${opcode}_debugger @ Yes - skip optimization
+ FETCH_ADVANCE_INST(${cccc}+1) @ advance to next instr, load rINST
+ GET_INST_OPCODE(ip) @ ip<- opcode from rINST
+ GOTO_OPCODE(ip) @ execute it
+%break
+
+.L${opcode}_setFinal:
EXPORT_PC() @ can throw
bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
cmp r0, #0 @ exception pending?
bne common_exceptionThrown @ yes, handle it
-1: FETCH_ADVANCE_INST(${cccc}+1) @ advance to next instr, load rINST
- GET_INST_OPCODE(ip) @ ip<- opcode from rINST
- GOTO_OPCODE(ip) @ execute it
+ b .L${opcode}_finish
+
+ /*
+ * A debugger is attached, so we need to go ahead and do
+ * this. For simplicity, we'll just jump directly to the
+ * corresponding handler. Note that we can't use
+ * rIBASE here because it may be in single-step mode.
+ * Load the primary table base directly.
+ */
+.L${opcode}_debugger:
+ ldr r1, [rSELF, #offThread_mainHandlerTable]
+ .if $jumbo
+ mov ip, #OP_INVOKE_DIRECT_JUMBO
+ .else
+ mov ip, #OP_INVOKE_DIRECT_RANGE
+ .endif
+ GOTO_OPCODE_BASE(r1,ip) @ execute it
diff --git a/vm/mterp/armv5te/OP_INVOKE_STATIC.S b/vm/mterp/armv5te/OP_INVOKE_STATIC.S
index 47718c6..66a5be3 100644
--- a/vm/mterp/armv5te/OP_INVOKE_STATIC.S
+++ b/vm/mterp/armv5te/OP_INVOKE_STATIC.S
@@ -11,14 +11,44 @@
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- pDvmDex
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
+ mov r9, #0 @ null "this" in delay slot
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
bne common_invokeMethod${routine} @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ b .L${opcode}_resolve
+%break
+
+
+.L${opcode}_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
mov r2, #METHOD_STATIC @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- bne common_invokeMethod${routine} @ no, continue
- b common_exceptionThrown @ yes, handle exception
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethod${routine} @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethod${routine} @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethod${routine} @ whew, finally!
+#else
+ bne common_invokeMethod${routine} @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
diff --git a/vm/mterp/armv5te/OP_INVOKE_STATIC_JUMBO.S b/vm/mterp/armv5te/OP_INVOKE_STATIC_JUMBO.S
index 3d04534..1ff4152 100644
--- a/vm/mterp/armv5te/OP_INVOKE_STATIC_JUMBO.S
+++ b/vm/mterp/armv5te/OP_INVOKE_STATIC_JUMBO.S
@@ -10,13 +10,42 @@
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- bne common_invokeMethodJumbo @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ bne common_invokeMethodJumboNoThis @ (r0=method)
+ b .L${opcode}_resolve
+%break
+
+
+.L${opcode}_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
mov r2, #METHOD_STATIC @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- bne common_invokeMethodJumbo @ no, continue
- b common_exceptionThrown @ yes, handle exception
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodJumboNoThis @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodJumboNoThis @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodJumboNoThis @ whew, finally!
+#else
+ bne common_invokeMethodJumboNoThis @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
diff --git a/vm/mterp/armv5te/OP_INVOKE_SUPER.S b/vm/mterp/armv5te/OP_INVOKE_SUPER.S
index bf3458c..b1d1411 100644
--- a/vm/mterp/armv5te/OP_INVOKE_SUPER.S
+++ b/vm/mterp/armv5te/OP_INVOKE_SUPER.S
@@ -15,13 +15,13 @@
.endif
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .L${opcode}_continue @ resolved, continue on
b .L${opcode}_resolve @ do resolve now
@@ -30,10 +30,10 @@
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.L${opcode}_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -44,7 +44,7 @@
bl common_invokeMethod${routine} @ continue on
.L${opcode}_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
diff --git a/vm/mterp/armv5te/OP_INVOKE_SUPER_JUMBO.S b/vm/mterp/armv5te/OP_INVOKE_SUPER_JUMBO.S
index 85327cc..26ea063 100644
--- a/vm/mterp/armv5te/OP_INVOKE_SUPER_JUMBO.S
+++ b/vm/mterp/armv5te/OP_INVOKE_SUPER_JUMBO.S
@@ -10,13 +10,13 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .L${opcode}_continue @ resolved, continue on
b .L${opcode}_resolve @ do resolve now
@@ -25,10 +25,10 @@
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.L${opcode}_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -36,10 +36,10 @@
bcs .L${opcode}_nsm @ method not present in superclass
ldr r1, [r1, #offClassObject_vtable] @ r1<- ...clazz->super->vtable
ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
.L${opcode}_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
diff --git a/vm/mterp/armv5te/OP_INVOKE_SUPER_QUICK.S b/vm/mterp/armv5te/OP_INVOKE_SUPER_QUICK.S
index e967b46..4848b7e 100644
--- a/vm/mterp/armv5te/OP_INVOKE_SUPER_QUICK.S
+++ b/vm/mterp/armv5te/OP_INVOKE_SUPER_QUICK.S
@@ -17,9 +17,9 @@
ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
EXPORT_PC() @ must export for invoke
ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
- GET_VREG(r3, r10) @ r3<- "this"
+ GET_VREG(r9, r10) @ r9<- "this"
ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
- cmp r3, #0 @ null "this" ref?
+ cmp r9, #0 @ null "this" ref?
ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
beq common_errNullObject @ "this" is null, throw exception
- bl common_invokeMethod${routine} @ continue on
+ bl common_invokeMethod${routine} @ (r0=method, r9="this")
diff --git a/vm/mterp/armv5te/OP_INVOKE_VIRTUAL.S b/vm/mterp/armv5te/OP_INVOKE_VIRTUAL.S
index 371006b..58b0a42 100644
--- a/vm/mterp/armv5te/OP_INVOKE_VIRTUAL.S
+++ b/vm/mterp/armv5te/OP_INVOKE_VIRTUAL.S
@@ -35,11 +35,11 @@
* r10 = C or CCCC (index of first arg, which is the "this" ptr)
*/
.L${opcode}_continue:
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethod${routine} @ continue on
+ bl common_invokeMethod${routine} @ (r0=method, r9="this")
diff --git a/vm/mterp/armv5te/OP_INVOKE_VIRTUAL_JUMBO.S b/vm/mterp/armv5te/OP_INVOKE_VIRTUAL_JUMBO.S
index 3d77072..ba0184e 100644
--- a/vm/mterp/armv5te/OP_INVOKE_VIRTUAL_JUMBO.S
+++ b/vm/mterp/armv5te/OP_INVOKE_VIRTUAL_JUMBO.S
@@ -29,11 +29,11 @@
*/
.L${opcode}_continue:
FETCH(r10, 4) @ r10<- CCCC
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
diff --git a/vm/mterp/armv5te/OP_INVOKE_VIRTUAL_QUICK.S b/vm/mterp/armv5te/OP_INVOKE_VIRTUAL_QUICK.S
index bc34023..4b425da 100644
--- a/vm/mterp/armv5te/OP_INVOKE_VIRTUAL_QUICK.S
+++ b/vm/mterp/armv5te/OP_INVOKE_VIRTUAL_QUICK.S
@@ -13,11 +13,11 @@
.if (!$isrange)
and r3, r3, #15 @ r3<- C (or stays CCCC)
.endif
- GET_VREG(r2, r3) @ r2<- vC ("this" ptr)
- cmp r2, #0 @ is "this" null?
+ GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r2, [r2, #offObject_clazz] @ r2<- thisPtr->clazz
+ ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
EXPORT_PC() @ invoke must export
ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
- bl common_invokeMethod${routine} @ continue on
+ bl common_invokeMethod${routine} @ (r0=method, r9="this")
diff --git a/vm/mterp/armv5te/OP_NEW_INSTANCE.S b/vm/mterp/armv5te/OP_NEW_INSTANCE.S
index ce1f0c8..eadd438 100644
--- a/vm/mterp/armv5te/OP_NEW_INSTANCE.S
+++ b/vm/mterp/armv5te/OP_NEW_INSTANCE.S
@@ -14,6 +14,9 @@
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .L${opcode}_resolve @ no, resolve it now
@@ -31,12 +34,45 @@
.L${opcode}_finish: @ r0=new object
mov r3, rINST, lsr #8 @ r3<- AA
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .L${opcode}_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.L${opcode}_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.L${opcode}_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .L${opcode}_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
diff --git a/vm/mterp/armv5te/OP_NEW_INSTANCE_JUMBO.S b/vm/mterp/armv5te/OP_NEW_INSTANCE_JUMBO.S
index fad14a8..c5f7bdb 100644
--- a/vm/mterp/armv5te/OP_NEW_INSTANCE_JUMBO.S
+++ b/vm/mterp/armv5te/OP_NEW_INSTANCE_JUMBO.S
@@ -16,6 +16,9 @@
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .L${opcode}_resolve @ no, resolve it now
@@ -33,12 +36,45 @@
.L${opcode}_finish: @ r0=new object
FETCH(r3, 3) @ r3<- BBBB
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .L${opcode}_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.L${opcode}_end:
FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vBBBB<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.L${opcode}_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .L${opcode}_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
diff --git a/vm/mterp/armv5te/OP_PACKED_SWITCH.S b/vm/mterp/armv5te/OP_PACKED_SWITCH.S
index 941b232..6fa03c1 100644
--- a/vm/mterp/armv5te/OP_PACKED_SWITCH.S
+++ b/vm/mterp/armv5te/OP_PACKED_SWITCH.S
@@ -7,6 +7,9 @@
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them here.
*
+ * When the JIT is present, all targets are considered treated as
+ * a potential trace heads regardless of branch direction.
+ *
* for: packed-switch, sparse-switch
*/
/* op vAA, +BBBB */
@@ -17,18 +20,16 @@
GET_VREG(r1, r3) @ r1<- vAA
add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2
bl $func @ r0<- code-unit branch offset
- movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
- beq common_backwardBranch @ (want to use BLE but V is unknown)
+ adds r1, r0, r0 @ r1<- byte offset; clear V
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ cmp r0, #0
bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
diff --git a/vm/mterp/armv5te/OP_SGET.S b/vm/mterp/armv5te/OP_SGET.S
index 14fc63a..2e2453a 100644
--- a/vm/mterp/armv5te/OP_SGET.S
+++ b/vm/mterp/armv5te/OP_SGET.S
@@ -11,8 +11,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .L${opcode}_resolve @ yes, do resolve
.L${opcode}_finish: @ field ptr in r0
@@ -27,13 +27,24 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.L${opcode}_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .L${opcode}_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .L${opcode}_finish
diff --git a/vm/mterp/armv5te/OP_SGET_JUMBO.S b/vm/mterp/armv5te/OP_SGET_JUMBO.S
index 374b34c..90f3c68 100644
--- a/vm/mterp/armv5te/OP_SGET_JUMBO.S
+++ b/vm/mterp/armv5te/OP_SGET_JUMBO.S
@@ -13,9 +13,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .L${opcode}_resolve @ yes, do resolve
.L${opcode}_finish: @ field ptr in r0
@@ -30,13 +30,24 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.L${opcode}_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .L${opcode}_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .L${opcode}_finish @ resume
diff --git a/vm/mterp/armv5te/OP_SGET_WIDE.S b/vm/mterp/armv5te/OP_SGET_WIDE.S
index 73105c6..f79ec30 100644
--- a/vm/mterp/armv5te/OP_SGET_WIDE.S
+++ b/vm/mterp/armv5te/OP_SGET_WIDE.S
@@ -9,8 +9,8 @@
/* sget-wide vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .L${opcode}_resolve @ yes, do resolve
.L${opcode}_finish:
@@ -30,15 +30,26 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r0.
*/
.L${opcode}_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r1<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .L${opcode}_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .L${opcode}_finish @ resume
diff --git a/vm/mterp/armv5te/OP_SPUT.S b/vm/mterp/armv5te/OP_SPUT.S
index 0208ccc..52e6ee9 100644
--- a/vm/mterp/armv5te/OP_SPUT.S
+++ b/vm/mterp/armv5te/OP_SPUT.S
@@ -11,8 +11,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .L${opcode}_resolve @ yes, do resolve
.L${opcode}_finish: @ field ptr in r0
@@ -27,13 +27,24 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.L${opcode}_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .L${opcode}_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .L${opcode}_finish @ resume
diff --git a/vm/mterp/armv5te/OP_SPUT_JUMBO.S b/vm/mterp/armv5te/OP_SPUT_JUMBO.S
index 7011b67..2367138 100644
--- a/vm/mterp/armv5te/OP_SPUT_JUMBO.S
+++ b/vm/mterp/armv5te/OP_SPUT_JUMBO.S
@@ -13,9 +13,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .L${opcode}_resolve @ yes, do resolve
.L${opcode}_finish: @ field ptr in r0
@@ -30,13 +30,24 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.L${opcode}_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .L${opcode}_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .L${opcode}_finish @ resume
diff --git a/vm/mterp/armv5te/OP_SPUT_OBJECT.S b/vm/mterp/armv5te/OP_SPUT_OBJECT.S
index 8e0c16d..79ca04a 100644
--- a/vm/mterp/armv5te/OP_SPUT_OBJECT.S
+++ b/vm/mterp/armv5te/OP_SPUT_OBJECT.S
@@ -11,19 +11,10 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .L${opcode}_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .L${opcode}_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-
-%break
+ beq .L${opcode}_resolve @ yes, do resolve
.L${opcode}_finish: @ field ptr in r0
mov r2, rINST, lsr #8 @ r2<- AA
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
@@ -32,7 +23,36 @@
ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
GET_INST_OPCODE(ip) @ extract opcode from rINST
$barrier @ releasing store
+ b .L${opcode}_end
+%break
+
+
+.L${opcode}_end:
str r1, [r0, #offStaticField_value] @ field<- vAA
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+
+ /* Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
+ */
+.L${opcode}_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .L${opcode}_finish @ resume
+
diff --git a/vm/mterp/armv5te/OP_SPUT_OBJECT_JUMBO.S b/vm/mterp/armv5te/OP_SPUT_OBJECT_JUMBO.S
index e10c793..623c892 100644
--- a/vm/mterp/armv5te/OP_SPUT_OBJECT_JUMBO.S
+++ b/vm/mterp/armv5te/OP_SPUT_OBJECT_JUMBO.S
@@ -10,20 +10,11 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .L${opcode}_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .L${opcode}_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-%break
-
+ beq .L${opcode}_resolve @ yes, do resolve
.L${opcode}_finish: @ field ptr in r0
FETCH(r2, 3) @ r2<- BBBB
FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
@@ -32,7 +23,36 @@
ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
GET_INST_OPCODE(ip) @ extract opcode from rINST
$barrier @ releasing store
+ b .L${opcode}_end
+%break
+
+
+.L${opcode}_end:
str r1, [r0, #offStaticField_value] @ field<- vBBBB
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+
+ /* Continuation if the field has not yet been resolved.
+ * r1: AAAAaaaa field ref
+ * r10: dvmDex->pResFields
+ */
+.L${opcode}_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r9<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .L${opcode}_finish @ resume
+
diff --git a/vm/mterp/armv5te/OP_SPUT_WIDE.S b/vm/mterp/armv5te/OP_SPUT_WIDE.S
index 1f650f2..bbe5906 100644
--- a/vm/mterp/armv5te/OP_SPUT_WIDE.S
+++ b/vm/mterp/armv5te/OP_SPUT_WIDE.S
@@ -9,9 +9,9 @@
/* sput-wide vAA, field@BBBB */
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
mov r9, rINST, lsr #8 @ r9<- AA
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
cmp r2, #0 @ is resolved entry null?
beq .L${opcode}_resolve @ yes, do resolve
@@ -30,17 +30,28 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
- * r9: &fp[AA]
+ * r1: BBBB field ref
+ * r9: &fp[AA]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.L${opcode}_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .L${opcode}_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .L${opcode}_finish @ resume
diff --git a/vm/mterp/armv5te/OP_SPUT_WIDE_JUMBO.S b/vm/mterp/armv5te/OP_SPUT_WIDE_JUMBO.S
index 2bfeae1..5e93b52 100644
--- a/vm/mterp/armv5te/OP_SPUT_WIDE_JUMBO.S
+++ b/vm/mterp/armv5te/OP_SPUT_WIDE_JUMBO.S
@@ -10,10 +10,10 @@
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- aaaa (lo)
FETCH(r2, 2) @ r2<- AAAA (hi)
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r1, r2, lsl #16 @ r1<- AAAAaaaa
FETCH(r9, 3) @ r9<- BBBB
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
cmp r2, #0 @ is resolved entry null?
beq .L${opcode}_resolve @ yes, do resolve
@@ -32,17 +32,28 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
- * r9: &fp[BBBB]
+ * r1: AAAAAAAA field ref
+ * r9: &fp[BBBB]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.L${opcode}_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .L${opcode}_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .L${opcode}_finish @ resume
diff --git a/vm/mterp/armv5te/alt_stub.S b/vm/mterp/armv5te/alt_stub.S
index fe92076..4ab5f9f 100644
--- a/vm/mterp/armv5te/alt_stub.S
+++ b/vm/mterp/armv5te/alt_stub.S
@@ -1,9 +1,18 @@
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (${opnum} * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
diff --git a/vm/mterp/armv5te/bincmp.S b/vm/mterp/armv5te/bincmp.S
index 58f9079..12a2c8c 100644
--- a/vm/mterp/armv5te/bincmp.S
+++ b/vm/mterp/armv5te/bincmp.S
@@ -13,19 +13,18 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- b${revcmp} 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ mov${revcmp} r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
diff --git a/vm/mterp/armv5te/entry.S b/vm/mterp/armv5te/entry.S
index c472e15..19b6d4b 100644
--- a/vm/mterp/armv5te/entry.S
+++ b/vm/mterp/armv5te/entry.S
@@ -40,8 +40,7 @@
* On entry:
* r0 Thread* self
*
- * This function returns a boolean "changeInterp" value. The return comes
- * via a call to dvmMterpStdBail().
+ * The return comes via a call to dvmMterpStdBail().
*/
dvmMterpStdRun:
#define MTERP_ENTRY1 \
@@ -60,16 +59,13 @@
/* set up "named" registers, figure out entry point */
mov rSELF, r0 @ set rSELF
- ldr r1, [r0, #offThread_entryPoint] @ enum is 4 bytes in aapcs-EABI
LOAD_PC_FP_FROM_SELF() @ load rPC and rFP from "thread"
ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ set rIBASE
- cmp r1, #kInterpEntryInstr @ usual case?
- bne .Lnot_instr @ no, handle it
#if defined(WITH_JIT)
.LentryInstr:
/* Entry is always a possible trace start */
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
mov r1, #0 @ prepare the value for the new state
str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land
@@ -97,33 +93,6 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
-.Lnot_instr:
- cmp r1, #kInterpEntryReturn @ were we returning from a method?
- beq common_returnFromMethod
-
-.Lnot_return:
- cmp r1, #kInterpEntryThrow @ were we throwing an exception?
- beq common_exceptionThrown
-
-#if defined(WITH_JIT)
-.Lnot_throw:
- ldr r10,[rSELF, #offThread_jitResumeNPC]
- ldr r2,[rSELF, #offThread_jitResumeDPC]
- cmp r1, #kInterpEntryResume @ resuming after Jit single-step?
- bne .Lbad_arg
- cmp rPC,r2
- bne .LentryInstr @ must have branched, don't resume
-#if defined(WITH_SELF_VERIFICATION)
- @ self->entryPoint will be set in dvmSelfVerificationSaveState
- b jitSVShadowRunStart @ re-enter the translation after the
- @ single-stepped instruction
- @noreturn
-#endif
- mov r1, #kInterpEntryInstr
- str r1, [rSELF, #offThread_entryPoint]
- bx r10 @ re-enter the translation
-#endif
-
.Lbad_arg:
ldr r0, strBadEntryPoint
@ r1 holds value of entryPoint
@@ -147,11 +116,9 @@
*
* On entry:
* r0 Thread* self
- * r1 bool changeInterp
*/
dvmMterpStdBail:
- ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
- mov r0, r1 @ return the changeInterp value
+ ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
add sp, sp, #4 @ un-align 64
ldmfd sp!, {r4-r10,fp,pc} @ restore 9 regs and return
diff --git a/vm/mterp/armv5te/footer.S b/vm/mterp/armv5te/footer.S
index 5c5c5ce..5d35fde 100644
--- a/vm/mterp/armv5te/footer.S
+++ b/vm/mterp/armv5te/footer.S
@@ -1,17 +1,31 @@
-
/*
* ===========================================================================
* Common subroutines and data
* ===========================================================================
*/
-
-
.text
.align 2
#if defined(WITH_JIT)
+
#if defined(WITH_SELF_VERIFICATION)
+/*
+ * "longjmp" to a translation after single-stepping. Before returning
+ * to translation, must save state for self-verification.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r10, [rSELF,#offThread_jitResumeNPC] @ resume address
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ b jitSVShadowRunStart @ resume as if cache hit
+ @ expects resume addr in r10
+
.global dvmJitToInterpPunt
dvmJitToInterpPunt:
mov r2,#kSVSPunt @ r2<- interpreter entry point
@@ -21,11 +35,15 @@
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
+ mov rPC, r0 @ set up dalvik pc
+ EXPORT_PC()
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
mov r2,#kSVSSingleStep @ r2<- interpreter entry point
b jitSVShadowRunEnd @ doesn't return
+
.global dvmJitToInterpNoChainNoProfile
dvmJitToInterpNoChainNoProfile:
mov r0,rPC @ pass our target PC
@@ -74,6 +92,21 @@
str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land
b jitSVShadowRunEnd @ doesn't return
#else
+
+/*
+ * "longjmp" to a translation after single-stepping.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r0, [rSELF,#offThread_jitResumeNPC]
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ bx r0 @ resume translation
+
/*
* Return from the translation cache to the interpreter when the compiler is
* having issues translating/executing a Dalvik instruction. We have to skip
@@ -98,26 +131,33 @@
/*
* Return to the interpreter to handle a single instruction.
+ * We'll use the normal single-stepping mechanism via interpBreak,
+ * but also save the native pc of the resume point in the translation
+ * and the native sp so that we can later do the equivalent of a
+ * longjmp() to resume.
* On entry:
- * r0 <= PC
- * r1 <= PC of resume instruction
+ * dPC <= Dalvik PC of instrucion to interpret
* lr <= resume point in translation
+ * r1 <= Dalvik PC of next instruction
*/
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
- mov r1,#kInterpEntryInstr
- @ enum is 4 byte in aapcs-EABI
- str r1, [rSELF, #offThread_entryPoint]
- mov rPC,r0
+ mov rPC, r0 @ set up dalvik pc
EXPORT_PC()
-
- ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- mov r2,#kJitSingleStep @ Ask for single step and then revert
- str r2,[rSELF,#offThread_jitState]
- mov r1,#1 @ set changeInterp to bail to debug interp
- b common_gotoBail
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
+ mov r1, #1
+ str r1, [rSELF,#offThread_singleStepCount] @ just step once
+ mov r0, rSELF
+ mov r1, #kInterpSingleStep
+ mov r2, #kSubModeNormal
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
+ ldr rIBASE, [rSELF,#offThread_curHandlerTable]
+ FETCH_INST()
+ GET_INST_OPCODE(ip)
+ GOTO_OPCODE(ip)
/*
* Return from the translation cache and immediately request
@@ -129,7 +169,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -148,7 +189,8 @@
add rINST,lr,#-5 @ save start of chain branch
add rINST, #-4 @ .. which is 9 bytes back
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq 2f
@@ -163,7 +205,7 @@
/* No translation, so request one if profiling isn't disabled*/
2:
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
cmp r0, #0
movne r2,#kJitTSelectRequestHot @ ask for trace selection
@@ -194,7 +236,8 @@
bl dvmBumpNormal
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq toInterpreter @ go if not, otherwise do chain
@@ -216,7 +259,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -238,7 +282,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -256,21 +301,27 @@
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
FETCH_INST()
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@ NOTE: intended fallthrough
/*
- * Common code to update potential trace start counter, and initiate
- * a trace-build if appropriate. On entry, rPC should point to the
- * next instruction to execute, and rINST should be already loaded with
- * the next opcode word, and r0 holds a pointer to the jit profile
- * table (pJitProfTable).
+ * Similar to common_updateProfile, but tests for null pJitProfTable
+ * r0 holds pJifProfTAble, rINST is loaded, rPC is current and
+ * rIBASE has been recently refreshed.
*/
common_testUpdateProfile:
- cmp r0,#0
- GET_INST_OPCODE(ip)
- GOTO_OPCODE_IFEQ(ip) @ if not profiling, fallthrough otherwise */
+ cmp r0, #0 @ JIT switched off?
+ beq 4f @ return to interp if so
+/*
+ * Common code to update potential trace start counter, and initiate
+ * a trace-build if appropriate.
+ * On entry here:
+ * r0 <= pJitProfTable (verified non-NULL)
+ * rPC <= Dalvik PC
+ * rINST <= next instruction
+ */
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
@@ -280,18 +331,13 @@
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
-/*
- * Here, we switch to the debug interpreter to request
- * trace selection. First, though, check to see if there
- * is already a native translation in place (and, if so,
- * jump to it now).
- */
-
- GET_JIT_THRESHOLD(r1)
+ /* Looks good, reset the counter */
+ ldr r1, [rSELF, #offThread_jitThreshold]
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
- bl dvmJitGetTraceAddr @ r0<- dvmJitGetTraceAddr(rPC)
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -322,15 +368,30 @@
/*
* On entry:
- * r2 is jit state, e.g. kJitTSelectRequest or kJitTSelectRequestHot
+ * r2 is jit state.
*/
common_selectTrace:
-
+ ldrb r0,[rSELF,#offThread_breakFlags]
+ ands r0,#kInterpJitBreak
+ bne 3f @ already doing JIT work, continue
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
+ mov r0, rSELF
+/*
+ * Call out to validate trace-building request. If successful,
+ * rIBASE will be swapped to to send us into single-stepping trace
+ * building mode, so we need to refresh before we continue.
+ */
+ EXPORT_PC()
+ SAVE_PC_FP_TO_SELF() @ copy of pc/fp to Thread
+ bl dvmJitCheckTraceRequest
+3:
+ FETCH_INST()
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+4:
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip)
+ /* no return */
+#endif
#if defined(WITH_SELF_VERIFICATION)
/*
@@ -352,23 +413,27 @@
/*
* Restore PC, registers, and interpreter state to original values
* before jumping back to the interpreter.
+ * On entry:
+ * r0: dPC
+ * r2: self verification state
*/
jitSVShadowRunEnd:
mov r1,rFP @ pass ending fp
mov r3,rSELF @ pass self ptr for convenience
bl dvmSelfVerificationRestoreState @ restore pc and fp values
- ldr rPC,[rSELF,#offThread_pc] @ restore PC
- ldr rFP,[rSELF,#offThread_fp] @ restore FP
+ LOAD_PC_FP_FROM_SELF() @ restore pc, fp
ldr r1,[r0,#offShadowSpace_svState] @ get self verification state
cmp r1,#0 @ check for punt condition
beq 1f
+ @ Set up SV single-stepping
+ mov r0, rSELF
+ mov r1, #kInterpJitBreak
+ mov r2, #kSubModeJitSV
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
mov r2,#kJitSelfVerification @ ask for self verification
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
-
+ @ intentional fallthrough
1: @ exit to interpreter without check
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@@ -377,133 +442,32 @@
GOTO_OPCODE(ip)
#endif
-#endif
-
-/*
- * Common code when a backward branch is taken.
- *
- * TODO: we could avoid a branch by just setting r0 and falling through
- * into the common_periodicChecks code, and having a test on r0 at the
- * end determine if we should return to the caller or update & branch to
- * the next instr.
- *
- * On entry:
- * r9 is PC adjustment *in bytes*
- */
-common_backwardBranch:
- mov r0, #kInterpEntryInstr
- bl common_periodicChecks
-#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip)
- GOTO_OPCODE(ip)
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#endif
-
-
-/*
- * Need to see if the thread needs to be suspended or debugger/profiler
- * activity has begun. If so, we suspend the thread or side-exit to
- * the debug interpreter as appropriate.
- *
- * The common case is no activity on any of these, so we want to figure
- * that out quickly. If something is up, we can then sort out what.
- *
- * We want to be fast if the VM was built without debugger or profiler
- * support, but we also need to recognize that the system is usually
- * shipped with both of these enabled.
- *
- * TODO: reduce this so we're just checking a single location.
- *
- * On entry:
- * r0 is reentry type, e.g. kInterpEntryInstr (for debugger/profiling)
- * r9 is trampoline PC adjustment *in bytes*
- */
-common_periodicChecks:
-/* TUNING - make this a direct load when interpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r3<- &interpBreak
- /* speculatively thread-specific suspend count */
- ldr ip, [rSELF, #offThread_suspendCount]
- ldr r1, [r1] @ r1<- interpBreak
- cmp r1, #0 @ anything unusual?
- bxeq lr @ return if not
- /*
- * One or more interesting events have happened. Figure out what.
- *
- * r0 still holds the reentry type.
- */
- cmp ip, #0 @ want suspend?
- beq 3f @ no, must be something else
-
- stmfd sp!, {r0, lr} @ preserve r0 and lr
-#if defined(WITH_JIT)
- /*
- * Refresh the Jit's cached copy of profile table pointer. This pointer
- * doubles as the Jit's on/off switch.
- */
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ r3<-&gDvmJit.pJitProfTable
- mov r0, rSELF @ r0<- self
- ldr r3, [r3] @ r3 <- pJitProfTable
- EXPORT_PC() @ need for precise GC
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh Jit's on/off switch
-#else
- mov r0, rSELF @ r0<- self
- EXPORT_PC() @ need for precise GC
-#endif
- bl dvmCheckSuspendPending @ do full check, suspend if necessary
- ldmfd sp!, {r0, lr} @ restore r0 and lr
-
- /*
- * Reload the interpBreak flags - they may have changed while we
- * were suspended.
- */
-/* TUNING - direct load when InterpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r1<- &interpBreak
- ldr r1, [r1] @ r1<- interpBreak
-3:
- /*
- * TODO: this code is too fragile. Need a general mechanism
- * to identify what actions to take by submode. Some profiling modes
- * (instruction count) need to single-step, while method tracing
- * may not. Debugging with breakpoints can run unfettered, but
- * source-level single-stepping requires Dalvik singlestepping.
- * GC may require a one-shot action and then full-speed resumption.
- */
- ands r1, #(kSubModeDebuggerActive | kSubModeEmulatorTrace | kSubModeInstCounting)
- bxeq lr @ nothing to do, return
-
- @ debugger/profiler enabled, bail out; self->entryPoint was set above
- str r0, [rSELF, #offThread_entryPoint] @ store r0, need for debug/prof
- add rPC, rPC, r9 @ update rPC
- mov r1, #1 @ "want switch" = true
- b common_gotoBail @ side exit
-
-
/*
* The equivalent of "goto bail", this calls through the "bail handler".
+ * It will end this interpreter activation, and return to the caller
+ * of dvmMterpStdRun.
*
- * State registers will be saved to the "thread" area before bailing.
- *
- * On entry:
- * r1 is "bool changeInterp", indicating if we want to switch to the
- * other interpreter or just bail all the way out
+ * State registers will be saved to the "thread" area before bailing
+ * debugging purposes
*/
common_gotoBail:
SAVE_PC_FP_TO_SELF() @ export state to "thread"
mov r0, rSELF @ r0<- self ptr
b dvmMterpStdBail @ call(self, changeInterp)
- @add r1, r1, #1 @ using (boolean+1)
- @add r0, rSELF, #offThread_jmpBuf @ r0<- &self->jmpBuf
- @bl _longjmp @ does not return
- @bl common_abort
-
+/*
+ * The JIT's invoke method needs to remember the callsite class and
+ * target pair. Save them here so that they are available to
+ * dvmCheckJit following the interpretation of this invoke.
+ */
+#if defined(WITH_JIT)
+save_callsiteinfo:
+ cmp r9, #0
+ ldrne r9, [r9, #offObject_clazz]
+ str r0, [rSELF, #offThread_methodToCall]
+ str r9, [rSELF, #offThread_callsiteClass]
+ bx lr
+#endif
/*
* Common code for jumbo method invocation.
@@ -511,12 +475,20 @@
* As a result, the savedPc in the stack frame will not be wholly accurate. So
* long as that is only used for source file line number calculations, we're
* okay.
- *
- * On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
*/
+common_invokeMethodJumboNoThis:
+#if defined(WITH_JIT)
+ /* On entry: r0 is "Method* methodToCall */
+ mov r9, #0 @ clear "this"
+#endif
common_invokeMethodJumbo:
+ /* On entry: r0 is "Method* methodToCall, r9 is "this" */
.LinvokeNewJumbo:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
add rPC, rPC, #4 @ adjust pc to make return consistent
FETCH(r2, 1) @ r2<- BBBB (arg count)
@@ -530,10 +502,15 @@
* Common code for method invocation with range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodRange:
.LinvokeNewRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #8 @ r2<- AA (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -555,10 +532,15 @@
* Common code for method invocation without range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodNoRange:
.LinvokeNewNoRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #12 @ r2<- B (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -605,12 +587,11 @@
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
sub r3, r10, r3, lsl #2 @ r3<- bottom (newsave - outsSize)
cmp r3, r9 @ bottom < interpStackEnd?
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r3, [r0, #offMethod_accessFlags] @ r3<- methodToCall->accessFlags
blo .LstackOverflow @ yes, this frame will overflow stack
@ set up newSaveArea
- ldr lr, [lr] @ lr<- active submodes
#ifdef EASY_GDB
SAVEAREA_FROM_FP(ip, rFP) @ ip<- stack save area
str ip, [r10, #offStackSaveArea_prevSave]
@@ -621,15 +602,12 @@
mov r9, #0
str r9, [r10, #offStackSaveArea_returnAddr]
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 1f @ skip if not
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r1, rSELF
- @ r0=methodToCall, r1=rSELF
- bl dvmFastMethodTraceEnter
- ldmfd sp!, {r0-r3} @ restore r0-r3
-1:
str r0, [r10, #offStackSaveArea_method]
+
+ @ Profiling?
+ cmp lr, #0 @ any special modes happening?
+ bne 2f @ go if so
+1:
tst r3, #ACC_NATIVE
bne .LinvokeNative
@@ -656,8 +634,10 @@
@ r0=methodToCall, r1=newFp, r3=newMethodClass, r9=newINST
str r0, [rSELF, #offThread_method] @ self->method = methodToCall
str r3, [rSELF, #offThread_methodClassDex] @ self->methodClassDex = ...
+ mov r2, #1
+ str r2, [rSELF, #offThread_debugIsMethodEntry]
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
mov rFP, r1 @ fp = newFp
GET_PREFETCHED_OPCODE(ip, r9) @ extract prefetched opcode from r9
mov rINST, r9 @ publish new rINST
@@ -673,15 +653,22 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+2:
+ @ Profiling - record method entry. r0: methodToCall
+ stmfd sp!, {r0-r3} @ preserve r0-r3
+ mov r1, r0
+ mov r0, rSELF
+ bl dvmReportInvoke @ (self, method)
+ ldmfd sp!, {r0-r3} @ restore r0-r3
+ b 1b
+
.LinvokeNative:
@ Prep for the native call
@ r0=methodToCall, r1=newFp, r10=newSaveArea
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r9, [rSELF, #offThread_jniLocal_topCookie]@r9<-thread->localRef->...
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r10, #offStackSaveArea_localRefCookie] @newFp->localRefCookie=top
- ldr lr, [lr] @ lr<- active submodes
-
mov r2, r0 @ r2<- methodToCall
mov r0, r1 @ r0<- newFp (points to args)
add r1, rSELF, #offThread_retval @ r1<- &retval
@@ -698,45 +685,45 @@
.Lskip:
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- bne 330f @ hop if so
+ cmp lr, #0 @ any special SubModes active?
+ bne 11f @ go handle them if so
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
-220:
-#if defined(WITH_JIT)
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ Refresh Jit's on/off status
-#endif
+7:
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved top
ldr r1, [rSELF, #offThread_exception] @ check for exception
-#if defined(WITH_JIT)
- ldr r3, [r3] @ r3 <- gDvmJit.pProfTable
-#endif
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
-#if defined(WITH_JIT)
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh cached on/off switch
-#endif
bne common_exceptionThrown @ no, handle exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-330:
- @ r2=JNIMethod, r6=rSELF
- stmfd sp!, {r2,r6}
+11:
+ @ r0=newFp, r1=&retval, r2=methodToCall, r3=self, lr=subModes
+ stmfd sp!, {r0-r3} @ save all but subModes
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPreNativeInvoke @ (pc, self, methodToCall)
+ ldmfd sp, {r0-r3} @ refresh. NOTE: no sp autoincrement
+ @ Call the native method
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
- @ r0=JNIMethod, r1=rSELF
- ldmfd sp!, {r0-r1}
- bl dvmFastNativeMethodTraceExit
- b 220b
+ @ Restore the pre-call arguments
+ ldmfd sp!, {r0-r3} @ r2<- methodToCall (others unneeded)
+
+ @ Finish up any post-invoke subMode requirements
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPostNativeInvoke @ (pc, self, methodToCall)
+ b 7b @ resume
.LstackOverflow: @ r0=methodToCall
mov r1, r0 @ r1<- methodToCall
@@ -784,37 +771,27 @@
*/
common_returnFromMethod:
.LreturnNew:
- mov r0, #kInterpEntryReturn
- mov r9, #0
- bl common_periodicChecks
-
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r0, rFP)
- ldr lr, [lr] @ lr<- active submodes
ldr r9, [r0, #offStackSaveArea_savedPc] @ r9 = saveArea->savedPc
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 333f
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r0, rSELF
- @ r0=rSELF
- bl dvmFastJavaMethodTraceExit
- ldmfd sp!, {r0-r3} @ restore r0-r3
-333:
+ cmp lr, #0 @ any special subMode handling needed?
+ bne 19f
+14:
ldr rFP, [r0, #offStackSaveArea_prevFrame] @ fp = saveArea->prevFrame
ldr r2, [rFP, #(offStackSaveArea_method - sizeofStackSaveArea)]
@ r2<- method we're returning to
cmp r2, #0 @ is this a break frame?
#if defined(WORKAROUND_CORTEX_A9_745320)
/* Don't use conditional loads if the HW defect exists */
- beq 101f
+ beq 15f
ldr r10, [r2, #offMethod_clazz] @ r10<- method->clazz
-101:
+15:
#else
ldrne r10, [r2, #offMethod_clazz] @ r10<- method->clazz
#endif
- mov r1, #0 @ "want switch" = false
beq common_gotoBail @ break frame, bail out completely
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
PREFETCH_ADVANCE_INST(rINST, r9, 3) @ advance r9, update new rINST
str r2, [rSELF, #offThread_method]@ self->method = newSave->method
ldr r1, [r10, #offClassObject_pDvmDex] @ r1<- method->clazz->pDvmDex
@@ -835,6 +812,16 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+19:
+ @ Handle special actions
+ @ On entry, r0: StackSaveArea
+ ldr r2, [r0, #offStackSaveArea_prevFrame] @ r2<- prevFP
+ mov r1, rPC
+ mov r0, rSELF
+ bl dvmReportReturn @ (self, pc, prevFP)
+ SAVEAREA_FROM_FP(r0, rFP) @ restore StackSaveArea
+ b 14b @ continue
+
/*
* Return handling, calls through "glue code".
*/
@@ -860,17 +847,24 @@
dvmMterpCommonExceptionThrown:
common_exceptionThrown:
.LexceptionNew:
- mov r0, #kInterpEntryThrow
- mov r9, #0
- bl common_periodicChecks
+
+ EXPORT_PC()
+
+ mov r0, rSELF
+ bl dvmCheckSuspendPending
ldr r9, [rSELF, #offThread_exception] @ r9<- self->exception
mov r1, rSELF @ r1<- self
mov r0, r9 @ r0<- exception
bl dvmAddTrackedAlloc @ don't let the exception be GCed
+ ldrb r2, [rSELF, #offThread_subMode] @ get subMode flags
mov r3, #0 @ r3<- NULL
str r3, [rSELF, #offThread_exception] @ self->exception = NULL
+ @ Special subMode?
+ cmp r2, #0 @ any special subMode handling needed?
+ bne 7f @ go if so
+8:
/* set up args and a local for "&fp" */
/* (str sp, [sp, #-4]! would be perfect here, but is discouraged) */
str rFP, [sp, #-4]! @ *--sp = fp
@@ -880,6 +874,7 @@
ldr r1, [rSELF, #offThread_method] @ r1<- self->method
mov r0, rSELF @ r0<- self
ldr r1, [r1, #offMethod_insns] @ r1<- method->insns
+ ldrb lr, [rSELF, #offThread_subMode] @ lr<- subMode flags
mov r2, r9 @ r2<- exception
sub r1, rPC, r1 @ r1<- pc - method->insns
mov r1, r1, asr #1 @ r1<- offset in code units
@@ -920,12 +915,22 @@
bl dvmReleaseTrackedAlloc @ release the exception
/* restore the exception if the handler wants it */
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp ip, #OP_MOVE_EXCEPTION @ is it "move-exception"?
streq r9, [rSELF, #offThread_exception] @ yes, restore the exception
GOTO_OPCODE(ip) @ jump to next instruction
+ @ Manage debugger bookkeeping
+7:
+ mov r0, rSELF @ arg0<- self
+ ldr r1, [rSELF, #offThread_method] @ arg1<- curMethod
+ mov r2, rPC @ arg2<- pc
+ mov r3, rFP @ arg3<- fp
+ bl dvmReportExceptionThrow @ (self, method, pc, fp)
+ b 8b @ resume with normal handling
+
.LnotCaughtLocally: @ r9=exception
/* fix stack overflow if necessary */
ldrb r1, [rSELF, #offThread_stackOverflowed]
@@ -962,7 +967,6 @@
mov r0, r9 @ r0<- exception
mov r1, rSELF @ r1<- self
bl dvmReleaseTrackedAlloc @ release the exception
- mov r1, #0 @ "want switch" = false
b common_gotoBail @ bail out
@@ -977,6 +981,30 @@
b common_resumeAfterGlueCall
.endif
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including the current
+ * instruction.
+ *
+ * On entry:
+ * r10: &dvmDex->pResFields[field]
+ * r0: field pointer (must preserve)
+ */
+common_verifyField:
+ ldrb r3, [rSELF, #offThread_subMode] @ r3 <- submode byte
+ ands r3, #kSubModeJitTraceBuild
+ bxeq lr @ Not building trace, continue
+ ldr r1, [r10] @ r1<- reload resolved StaticField ptr
+ cmp r1, #0 @ resolution complete?
+ bxne lr @ yes, continue
+ stmfd sp!, {r0-r2,lr} @ save regs
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self,pc) end trace before this inst
+ ldmfd sp!, {r0-r2, lr}
+ bx lr @ return
+#endif
/*
* After returning from a "glued" function, pull out the updated
@@ -984,6 +1012,7 @@
*/
common_resumeAfterGlueCall:
LOAD_PC_FP_FROM_SELF() @ pull rPC and rFP out of thread
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/armv5te/header.S b/vm/mterp/armv5te/header.S
index 9d379d9..ad45eb7 100644
--- a/vm/mterp/armv5te/header.S
+++ b/vm/mterp/armv5te/header.S
@@ -131,7 +131,7 @@
* rPC to point to the next instruction. "_reg" must specify the distance
* in bytes, *not* 16-bit code units, and may be a signed value.
*
- * We want to write "ldrh rINST, [rPC, _reg, lsl #2]!", but some of the
+ * We want to write "ldrh rINST, [rPC, _reg, lsl #1]!", but some of the
* bits that hold the shift distance are used for the half/byte/sign flags.
* In some cases we can pre-double _reg for free, so we require a byte offset
* here.
@@ -169,6 +169,7 @@
* interpreter, we don't have to worry about pre-ARMv5 THUMB interwork.
*/
#define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #${handler_size_bits}
+#define GOTO_OPCODE_BASE(_base,_reg) add pc, _base, _reg, lsl #${handler_size_bits}
#define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #${handler_size_bits}
#define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #${handler_size_bits}
@@ -178,11 +179,6 @@
#define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2]
#define SET_VREG(_reg, _vreg) str _reg, [rFP, _vreg, lsl #2]
-#if defined(WITH_JIT)
-#define GET_JIT_PROF_TABLE(_reg) ldr _reg,[rSELF,#offThread_pJitProfTable]
-#define GET_JIT_THRESHOLD(_reg) ldr _reg,[rSELF,#offThread_jitThreshold]
-#endif
-
/*
* Convert a virtual register index into an address.
*/
diff --git a/vm/mterp/armv5te/zcmp.S b/vm/mterp/armv5te/zcmp.S
index d79e7c4..bd63fe4 100644
--- a/vm/mterp/armv5te/zcmp.S
+++ b/vm/mterp/armv5te/zcmp.S
@@ -10,22 +10,18 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- b${revcmp} 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ mov${revcmp} r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
diff --git a/vm/mterp/armv6t2/bincmp.S b/vm/mterp/armv6t2/bincmp.S
index 002eeed..8d8c48d 100644
--- a/vm/mterp/armv6t2/bincmp.S
+++ b/vm/mterp/armv6t2/bincmp.S
@@ -12,19 +12,18 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- b${revcmp} 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ mov${revcmp} r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
diff --git a/vm/mterp/c/OP_BREAKPOINT.c b/vm/mterp/c/OP_BREAKPOINT.c
index 64c0502..0c0cbc8 100644
--- a/vm/mterp/c/OP_BREAKPOINT.c
+++ b/vm/mterp/c/OP_BREAKPOINT.c
@@ -1,5 +1,4 @@
HANDLE_OPCODE(OP_BREAKPOINT)
-#if (INTERP_TYPE == INTERP_DBG)
{
/*
* Restart this instruction with the original opcode. We do
@@ -9,7 +8,7 @@
* for the sake of anything that needs to do disambiguation in a
* common handler with INST_INST.
*
- * The breakpoint itself is handled over in updateDebugger(),
+ * The breakpoint itself is handled over in dvmUpdateDebugger(),
* because we need to detect other events (method entry, single
* step) and report them in the same event packet, and we're not
* yet handling those through breakpoint instructions. By the
@@ -22,8 +21,4 @@
inst = INST_REPLACE_OP(inst, originalOpcode);
FINISH_BKPT(originalOpcode);
}
-#else
- LOGE("Breakpoint hit in non-debug interpreter\n");
- dvmAbort();
-#endif
OP_END
diff --git a/vm/mterp/c/OP_EXECUTE_INLINE.c b/vm/mterp/c/OP_EXECUTE_INLINE.c
index bc10f1a..8d20764 100644
--- a/vm/mterp/c/OP_EXECUTE_INLINE.c
+++ b/vm/mterp/c/OP_EXECUTE_INLINE.c
@@ -47,13 +47,13 @@
;
}
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ } else {
+ if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ }
}
FINISH(3);
OP_END
diff --git a/vm/mterp/c/OP_EXECUTE_INLINE_RANGE.c b/vm/mterp/c/OP_EXECUTE_INLINE_RANGE.c
index a767106..664ada4 100644
--- a/vm/mterp/c/OP_EXECUTE_INLINE_RANGE.c
+++ b/vm/mterp/c/OP_EXECUTE_INLINE_RANGE.c
@@ -31,13 +31,13 @@
;
}
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ } else {
+ if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ }
}
FINISH(3);
OP_END
diff --git a/vm/mterp/c/OP_GOTO.c b/vm/mterp/c/OP_GOTO.c
index eed7b9f..0e10384 100644
--- a/vm/mterp/c/OP_GOTO.c
+++ b/vm/mterp/c/OP_GOTO.c
@@ -6,6 +6,6 @@
ILOGV("|goto +0x%02x", ((s1)vdst));
ILOGV("> branch taken");
if ((s1)vdst < 0)
- PERIODIC_CHECKS(kInterpEntryInstr, (s1)vdst);
+ PERIODIC_CHECKS((s1)vdst);
FINISH((s1)vdst);
OP_END
diff --git a/vm/mterp/c/OP_GOTO_16.c b/vm/mterp/c/OP_GOTO_16.c
index afdccb3..f0541fd 100644
--- a/vm/mterp/c/OP_GOTO_16.c
+++ b/vm/mterp/c/OP_GOTO_16.c
@@ -8,7 +8,7 @@
ILOGV("|goto/16 +0x%04x", offset);
ILOGV("> branch taken");
if (offset < 0)
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
diff --git a/vm/mterp/c/OP_GOTO_32.c b/vm/mterp/c/OP_GOTO_32.c
index d1cee32..1b1815c 100644
--- a/vm/mterp/c/OP_GOTO_32.c
+++ b/vm/mterp/c/OP_GOTO_32.c
@@ -9,7 +9,7 @@
ILOGV("|goto/32 +0x%08x", offset);
ILOGV("> branch taken");
if (offset <= 0) /* allowed to branch to self */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
diff --git a/vm/mterp/c/OP_INVOKE_OBJECT_INIT_JUMBO.c b/vm/mterp/c/OP_INVOKE_OBJECT_INIT_JUMBO.c
index ade99d4..324e462 100644
--- a/vm/mterp/c/OP_INVOKE_OBJECT_INIT_JUMBO.c
+++ b/vm/mterp/c/OP_INVOKE_OBJECT_INIT_JUMBO.c
@@ -20,12 +20,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, true);
}
-#endif
FINISH(5);
}
OP_END
diff --git a/vm/mterp/c/OP_INVOKE_OBJECT_INIT_RANGE.c b/vm/mterp/c/OP_INVOKE_OBJECT_INIT_RANGE.c
index b1e9a42..20f0573 100644
--- a/vm/mterp/c/OP_INVOKE_OBJECT_INIT_RANGE.c
+++ b/vm/mterp/c/OP_INVOKE_OBJECT_INIT_RANGE.c
@@ -20,12 +20,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, false);
}
-#endif
FINISH(3);
}
OP_END
diff --git a/vm/mterp/c/OP_NEW_INSTANCE.c b/vm/mterp/c/OP_NEW_INSTANCE.c
index 155434f..b0b9c18 100644
--- a/vm/mterp/c/OP_NEW_INSTANCE.c
+++ b/vm/mterp/c/OP_NEW_INSTANCE.c
@@ -18,15 +18,18 @@
if (!dvmIsClassInitialized(clazz) && !dvmInitClass(clazz))
GOTO_exceptionThrown();
+#if defined(WITH_JIT)
/*
* The JIT needs dvmDexGetResolvedClass() to return non-null.
* Since we use the portable interpreter to build the trace, this extra
* check is not needed for mterp.
*/
- if (!dvmDexGetResolvedClass(methodClassDex, ref)) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (!dvmDexGetResolvedClass(methodClassDex, ref))) {
/* Class initialization is still ongoing - end the trace */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
/*
* Verifier now tests for interface/abstract class.
diff --git a/vm/mterp/c/OP_NEW_INSTANCE_JUMBO.c b/vm/mterp/c/OP_NEW_INSTANCE_JUMBO.c
index 2464b69..aeffff4 100644
--- a/vm/mterp/c/OP_NEW_INSTANCE_JUMBO.c
+++ b/vm/mterp/c/OP_NEW_INSTANCE_JUMBO.c
@@ -18,15 +18,18 @@
if (!dvmIsClassInitialized(clazz) && !dvmInitClass(clazz))
GOTO_exceptionThrown();
+#if defined(WITH_JIT)
/*
* The JIT needs dvmDexGetResolvedClass() to return non-null.
* Since we use the portable interpreter to build the trace, this extra
* check is not needed for mterp.
*/
- if (!dvmDexGetResolvedClass(methodClassDex, ref)) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (!dvmDexGetResolvedClass(methodClassDex, ref))) {
/* Class initialization is still ongoing - end the trace */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
/*
* Verifier now tests for interface/abstract class.
diff --git a/vm/mterp/c/OP_PACKED_SWITCH.c b/vm/mterp/c/OP_PACKED_SWITCH.c
index cca9a7c..bf8cbf2 100644
--- a/vm/mterp/c/OP_PACKED_SWITCH.c
+++ b/vm/mterp/c/OP_PACKED_SWITCH.c
@@ -23,7 +23,7 @@
offset = dvmInterpHandlePackedSwitch(switchData, testVal);
ILOGV("> branch taken (0x%04x)\n", offset);
if (offset <= 0) /* uncommon */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
diff --git a/vm/mterp/c/OP_SPARSE_SWITCH.c b/vm/mterp/c/OP_SPARSE_SWITCH.c
index e4e04ba..a863ef2 100644
--- a/vm/mterp/c/OP_SPARSE_SWITCH.c
+++ b/vm/mterp/c/OP_SPARSE_SWITCH.c
@@ -23,7 +23,7 @@
offset = dvmInterpHandleSparseSwitch(switchData, testVal);
ILOGV("> branch taken (0x%04x)\n", offset);
if (offset <= 0) /* uncommon */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
diff --git a/vm/mterp/c/gotoTargets.c b/vm/mterp/c/gotoTargets.c
index fda13eb..d3190c1 100644
--- a/vm/mterp/c/gotoTargets.c
+++ b/vm/mterp/c/gotoTargets.c
@@ -176,8 +176,9 @@
assert(baseMethod->methodIndex < thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[baseMethod->methodIndex];
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->methodToCall = methodToCall;
+ self->callsiteClass = thisPtr->clazz;
#endif
#if 0
@@ -290,6 +291,7 @@
GOTO_exceptionThrown();
}
methodToCall = curMethod->clazz->super->vtable[baseMethod->methodIndex];
+
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
dvmThrowAbstractMethodError("abstract method not implemented");
@@ -350,9 +352,6 @@
thisClass = thisPtr->clazz;
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisClass;
-#endif
/*
* Given a class and a method index, find the Method* with the
@@ -360,6 +359,10 @@
*/
methodToCall = dvmFindInterfaceMethodInCache(thisClass, ref, curMethod,
methodClassDex);
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisClass;
+ self->methodToCall = methodToCall;
+#endif
if (methodToCall == NULL) {
assert(dvmCheckException(self));
GOTO_exceptionThrown();
@@ -446,15 +449,18 @@
GOTO_exceptionThrown();
}
+#if defined(WITH_JIT) && defined(MTERP_STUB)
/*
* The JIT needs dvmDexGetResolvedMethod() to return non-null.
- * Since we use the portable interpreter to build the trace, this extra
- * check is not needed for mterp.
+ * Include the check if this code is being used as a stub
+ * called from the assembly interpreter.
*/
- if (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL)) {
/* Class initialization is still ongoing */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
}
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
GOTO_TARGET_END
@@ -488,9 +494,6 @@
if (!checkForNull(thisPtr))
GOTO_exceptionThrown();
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
-#endif
/*
* Combine the object we found with the vtable offset in the
@@ -498,6 +501,10 @@
*/
assert(ref < (unsigned int) thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[ref];
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisPtr->clazz;
+ self->methodToCall = methodToCall;
+#endif
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
@@ -572,7 +579,6 @@
LOGVV("+++ super-virtual[%d]=%s.%s\n",
ref, methodToCall->clazz->descriptor, methodToCall->name);
assert(methodToCall != NULL);
-
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
}
GOTO_TARGET_END
@@ -593,7 +599,7 @@
* Since this is now an interpreter switch point, we must do it before
* we do anything at all.
*/
- PERIODIC_CHECKS(kInterpEntryReturn, 0);
+ PERIODIC_CHECKS(0);
ILOGV("> retval=0x%llx (leaving %s.%s %s)",
retval.j, curMethod->clazz->descriptor, curMethod->name,
@@ -605,20 +611,19 @@
#ifdef EASY_GDB
debugSaveArea = saveArea;
#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, curMethod);
-#endif
/* back up to previous frame and see if we hit a break */
fp = (u4*)saveArea->prevFrame;
assert(fp != NULL);
+
+ /* Handle any special subMode requirements */
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportReturn(self, pc, fp);
+ }
+
if (dvmIsBreakFrame(fp)) {
/* bail without popping the method frame from stack */
LOGVV("+++ returned into break frame\n");
-#if defined(WITH_JIT)
- /* Let the Jit know the return is terminating normally */
- CHECK_JIT_VOID();
-#endif
GOTO_bail();
}
@@ -657,16 +662,8 @@
Object* exception;
int catchRelPc;
- /*
- * Since this is now an interpreter switch point, we must do it before
- * we do anything at all.
- */
- PERIODIC_CHECKS(kInterpEntryThrow, 0);
+ PERIODIC_CHECKS(0);
-#if defined(WITH_JIT)
- // Something threw during trace selection - end the current trace
- END_JIT_TSELECT();
-#endif
/*
* We save off the exception and clear the exception status. While
* processing the exception we might need to load some Throwable
@@ -682,9 +679,8 @@
exception->clazz->descriptor, curMethod->name,
dvmLineNumFromPC(curMethod, pc - curMethod->insns));
-#if (INTERP_TYPE == INTERP_DBG)
/*
- * Tell the debugger about it.
+ * Report the exception throw to any "subMode" watchers.
*
* TODO: if the exception was thrown by interpreted code, control
* fell through native, and then back to us, we will report the
@@ -697,14 +693,9 @@
* here, and have the JNI exception code do the reporting to the
* debugger.
*/
- if (DEBUGGER_ACTIVE) {
- void* catchFrame;
- catchRelPc = dvmFindCatchBlock(self, pc - curMethod->insns,
- exception, true, &catchFrame);
- dvmDbgPostException(fp, pc - curMethod->insns, catchFrame,
- catchRelPc, exception);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportExceptionThrow(self, curMethod, pc, fp);
}
-#endif
/*
* We need to unroll to the catch block or the nearest "break"
@@ -942,11 +933,20 @@
#endif
newSaveArea->prevFrame = fp;
newSaveArea->savedPc = pc;
-#if defined(WITH_JIT)
+#if defined(WITH_JIT) && defined(MTERP_STUB)
newSaveArea->returnAddr = 0;
#endif
newSaveArea->method = methodToCall;
+ if (self->interpBreak.ctl.subMode != 0) {
+ /*
+ * We mark ENTER here for both native and non-native
+ * calls. For native calls, we'll mark EXIT on return.
+ * For non-native calls, EXIT is marked in the RETURN op.
+ */
+ dvmReportInvoke(self, methodToCall);
+ }
+
if (!dvmIsNativeMethod(methodToCall)) {
/*
* "Call" interpreted code. Reposition the PC, update the
@@ -959,9 +959,7 @@
#ifdef EASY_GDB
debugSaveArea = SAVEAREA_FROM_FP(newFp);
#endif
-#if INTERP_TYPE == INTERP_DBG
- debugIsMethodEntry = true; // profiling, debugging
-#endif
+ self->debugIsMethodEntry = true; // profiling, debugging
ILOGD("> pc <-- %s.%s %s", curMethod->clazz->descriptor,
curMethod->name, curMethod->shorty);
DUMP_REGS(curMethod, fp, true); // show input args
@@ -974,25 +972,12 @@
DUMP_REGS(methodToCall, newFp, true); // show input args
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_ENTRY);
- }
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_ENTER(self, methodToCall);
-#endif
-
- {
- ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
- methodToCall->name, methodToCall->shorty);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPreNativeInvoke(pc, self, methodToCall);
}
-#if defined(WITH_JIT)
- /* Allow the Jit to end any pending trace building */
- CHECK_JIT_VOID();
-#endif
+ ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
+ methodToCall->name, methodToCall->shorty);
/*
* Jump through native call bridge. Because we leave no
@@ -1001,15 +986,9 @@
*/
(*methodToCall->nativeFunc)(newFp, &retval, methodToCall, self);
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_EXIT);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPostNativeInvoke(pc, self, methodToCall);
}
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, methodToCall);
-#endif
/* pop frame off */
dvmPopJniLocals(self, newSaveArea);
diff --git a/vm/mterp/c/header.c b/vm/mterp/c/header.c
index 4f2cabe..06291e2 100644
--- a/vm/mterp/c/header.c
+++ b/vm/mterp/c/header.c
@@ -30,20 +30,7 @@
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
*/
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
# define CHECK_BRANCH_OFFSETS
@@ -322,24 +309,6 @@
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
diff --git a/vm/mterp/c/opcommon.c b/vm/mterp/c/opcommon.c
index 0cb3547..1957a7f 100644
--- a/vm/mterp/c/opcommon.c
+++ b/vm/mterp/c/opcommon.c
@@ -104,7 +104,7 @@
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
@@ -119,7 +119,7 @@
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
@@ -652,9 +652,12 @@
/*
* The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
+ * Because the portable interpreter is not involved with the JIT
+ * and trace building, we only need the extra check here when this
+ * code is massaged into a stub called from an assembly interpreter.
+ * This is controlled by the JIT_STUB_HACK maco.
*/
+
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
@@ -669,7 +672,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -693,7 +696,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -717,7 +720,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -741,7 +744,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
diff --git a/vm/mterp/common/asm-constants.h b/vm/mterp/common/asm-constants.h
index e699f20..ee0dfe7 100644
--- a/vm/mterp/common/asm-constants.h
+++ b/vm/mterp/common/asm-constants.h
@@ -154,12 +154,12 @@
MTERP_OFFSET(offInlineOperation_func, InlineOperation, func, 0)
/* Thread fields */
-MTERP_OFFSET(offThread_pc, InterpSaveState, pc, 0)
-MTERP_OFFSET(offThread_fp, InterpSaveState, fp, 4)
-MTERP_OFFSET(offThread_method, InterpSaveState, method, 8)
-MTERP_OFFSET(offThread_methodClassDex, InterpSaveState, methodClassDex, 12)
-MTERP_OFFSET(offThread_bailPtr, InterpSaveState, bailPtr, 16)
-MTERP_OFFSET(offThread_pInterpBreak, InterpSaveState, pInterpBreak, 20)
+MTERP_OFFSET(offThread_pc, Thread, interpSave.pc, 0)
+MTERP_OFFSET(offThread_fp, Thread, interpSave.fp, 4)
+MTERP_OFFSET(offThread_method, Thread, interpSave.method, 8)
+MTERP_OFFSET(offThread_methodClassDex, Thread, interpSave.methodClassDex, 12)
+MTERP_OFFSET(offThread_bailPtr, Thread, interpSave.bailPtr, 16)
+MTERP_OFFSET(offThread_threadId, Thread, threadId, 28)
/* make sure all JValue union members are stored at the same offset */
MTERP_OFFSET(offThread_retval, Thread, retval, 32)
@@ -167,38 +167,49 @@
MTERP_OFFSET(offThread_retval_i, Thread, retval.i, 32)
MTERP_OFFSET(offThread_retval_j, Thread, retval.j, 32)
MTERP_OFFSET(offThread_retval_l, Thread, retval.l, 32)
-MTERP_OFFSET(offThread_suspendCount, Thread, suspendCount, 40)
-MTERP_OFFSET(offThread_dbgSuspendCount, Thread, dbgSuspendCount, 44)
-MTERP_OFFSET(offThread_cardTable, Thread, cardTable, 48)
-MTERP_OFFSET(offThread_interpStackEnd, Thread, interpStackEnd, 52)
-MTERP_OFFSET(offThread_curFrame, Thread, curFrame, 56)
-MTERP_OFFSET(offThread_exception, Thread, exception, 60)
-MTERP_OFFSET(offThread_threadId, Thread, threadId, 64)
-MTERP_OFFSET(offThread_debugIsMethodEntry, Thread, debugIsMethodEntry, 68)
-MTERP_OFFSET(offThread_interpStackSize, Thread, interpStackSize, 72)
-MTERP_OFFSET(offThread_stackOverflowed, Thread, stackOverflowed, 76)
-MTERP_OFFSET(offThread_entryPoint, Thread, entryPoint, 80)
-MTERP_OFFSET(offThread_curHandlerTable, Thread, curHandlerTable, 84)
+//40
+MTERP_OFFSET(offThread_cardTable, Thread, cardTable, 40)
+MTERP_OFFSET(offThread_interpStackEnd, Thread, interpStackEnd, 44)
+MTERP_OFFSET(offThread_curFrame, Thread, curFrame, 48)
+MTERP_OFFSET(offThread_exception, Thread, exception, 52)
+MTERP_OFFSET(offThread_debugIsMethodEntry, Thread, debugIsMethodEntry, 56)
+MTERP_OFFSET(offThread_interpStackSize, Thread, interpStackSize, 60)
+MTERP_OFFSET(offThread_stackOverflowed, Thread, stackOverflowed, 64)
+MTERP_OFFSET(offThread_breakFlags, \
+ Thread, interpBreak.ctl.breakFlags, 72)
+MTERP_OFFSET(offThread_subMode, \
+ Thread, interpBreak.ctl.subMode, 73)
+MTERP_OFFSET(offThread_suspendCount, \
+ Thread, interpBreak.ctl.suspendCount, 74)
+MTERP_OFFSET(offThread_dbgSuspendCount, \
+ Thread, interpBreak.ctl.dbgSuspendCount, 75)
+MTERP_OFFSET(offThread_curHandlerTable, \
+ Thread, interpBreak.ctl.curHandlerTable, 76)
+MTERP_OFFSET(offThread_mainHandlerTable, Thread, mainHandlerTable, 80)
+
+MTERP_OFFSET(offThread_singleStepCount, Thread, singleStepCount, 88)
#ifdef WITH_JIT
-MTERP_OFFSET(offThread_jitToInterpEntries,Thread, jitToInterpEntries, 96)
-MTERP_OFFSET(offThread_inJitCodeCache, Thread, inJitCodeCache, 120)
-MTERP_OFFSET(offThread_pJitProfTable, Thread, pJitProfTable, 124)
-MTERP_OFFSET(offThread_ppJitProfTable, Thread, ppJitProfTable, 128)
-MTERP_OFFSET(offThread_jitThreshold, Thread, jitThreshold, 132)
-MTERP_OFFSET(offThread_jitResumeNPC, Thread, jitResumeNPC, 136)
-MTERP_OFFSET(offThread_jitResumeDPC, Thread, jitResumeDPC, 140)
-MTERP_OFFSET(offThread_jitState, Thread, jitState, 144)
-MTERP_OFFSET(offThread_icRechainCount, Thread, icRechainCount, 148)
-MTERP_OFFSET(offThread_pProfileCountdown, Thread, pProfileCountdown, 152)
+MTERP_OFFSET(offThread_jitToInterpEntries,Thread, jitToInterpEntries, 92)
+MTERP_OFFSET(offThread_inJitCodeCache, Thread, inJitCodeCache, 116)
+MTERP_OFFSET(offThread_pJitProfTable, Thread, pJitProfTable, 120)
+MTERP_OFFSET(offThread_jitThreshold, Thread, jitThreshold, 124)
+MTERP_OFFSET(offThread_jitResumeNPC, Thread, jitResumeNPC, 128)
+MTERP_OFFSET(offThread_jitResumeNSP, Thread, jitResumeNSP, 132)
+MTERP_OFFSET(offThread_jitResumeDPC, Thread, jitResumeDPC, 136)
+MTERP_OFFSET(offThread_jitState, Thread, jitState, 140)
+MTERP_OFFSET(offThread_icRechainCount, Thread, icRechainCount, 144)
+MTERP_OFFSET(offThread_pProfileCountdown, Thread, pProfileCountdown, 148)
+MTERP_OFFSET(offThread_callsiteClass, Thread, callsiteClass, 152)
+MTERP_OFFSET(offThread_methodToCall, Thread, methodToCall, 156)
MTERP_OFFSET(offThread_jniLocal_topCookie, \
- Thread, jniLocalRefTable.segmentState.all, 156)
+ Thread, jniLocalRefTable.segmentState.all, 160)
#if defined(WITH_SELF_VERIFICATION)
-MTERP_OFFSET(offThread_shadowSpace, Thread, shadowSpace, 172)
+MTERP_OFFSET(offThread_shadowSpace, Thread, shadowSpace, 184)
#endif
#else
MTERP_OFFSET(offThread_jniLocal_topCookie, \
- Thread, jniLocalRefTable.segmentState.all, 96)
+ Thread, jniLocalRefTable.segmentState.all, 92)
#endif
/* Object fields */
@@ -262,9 +273,7 @@
MTERP_CONSTANT(kJitSelfVerification, 3)
MTERP_CONSTANT(kJitTSelect, 4)
MTERP_CONSTANT(kJitTSelectEnd, 5)
-MTERP_CONSTANT(kJitSingleStep, 6)
-MTERP_CONSTANT(kJitSingleStepEnd, 7)
-MTERP_CONSTANT(kJitDone, 8)
+MTERP_CONSTANT(kJitDone, 6)
#if defined(WITH_SELF_VERIFICATION)
MTERP_CONSTANT(kSVSIdle, 0)
@@ -307,11 +316,30 @@
/* opcode number */
MTERP_CONSTANT(OP_MOVE_EXCEPTION, 0x0d)
+MTERP_CONSTANT(OP_INVOKE_DIRECT_RANGE, 0x76)
+MTERP_CONSTANT(OP_INVOKE_DIRECT_JUMBO, 0x124)
/* flags for interpBreak */
-MTERP_CONSTANT(kSubModeNormal, 0x0000)
-MTERP_CONSTANT(kSubModeMethodTrace, 0x0001)
-MTERP_CONSTANT(kSubModeEmulatorTrace, 0x0002)
-MTERP_CONSTANT(kSubModeInstCounting, 0x0004)
-MTERP_CONSTANT(kSubModeDebuggerActive, 0x0008)
-MTERP_CONSTANT(kSubModeSuspendRequest, 0x0010)
+MTERP_CONSTANT(kSubModeNormal, 0x00)
+MTERP_CONSTANT(kSubModeMethodTrace, 0x01)
+MTERP_CONSTANT(kSubModeEmulatorTrace, 0x02)
+MTERP_CONSTANT(kSubModeInstCounting, 0x04)
+MTERP_CONSTANT(kSubModeDebuggerActive, 0x08)
+#if defined(WITH_JIT)
+MTERP_CONSTANT(kSubModeJitTraceBuild, 0x10)
+MTERP_CONSTANT(kSubModeJitSV, 0x20)
+#endif
+
+MTERP_CONSTANT(kInterpNoBreak, 0x00)
+MTERP_CONSTANT(kInterpSuspendBreak, 0x01)
+MTERP_CONSTANT(kInterpInstCountBreak, 0x02)
+MTERP_CONSTANT(kInterpDebugBreak, 0x04)
+MTERP_CONSTANT(kInterpEmulatorTraceBreak, 0x08)
+MTERP_CONSTANT(kInterpSingleStep, 0x10)
+#if defined(WITH_JIT)
+MTERP_CONSTANT(kInterpJitBreak, 0x20)
+#endif
+MTERP_CONSTANT(kSubModeDebugProfile, 0x0f)
+
+MTERP_CONSTANT(DBG_METHOD_ENTRY, 0x04)
+MTERP_CONSTANT(DBG_METHOD_EXIT, 0x08)
diff --git a/vm/mterp/config-portdbg b/vm/mterp/config-portable
similarity index 83%
rename from vm/mterp/config-portdbg
rename to vm/mterp/config-portable
index feab06d..d766fee 100644
--- a/vm/mterp/config-portdbg
+++ b/vm/mterp/config-portable
@@ -13,8 +13,7 @@
# limitations under the License.
#
-# Configuration for "portdbg" target, a/k/a the portable interpreter with
-# debugging enabled.
+# Configuration for the portable interpreter.
#
handler-style all-c
@@ -22,18 +21,12 @@
# C file header and basic definitions
import c/header.c
-# simple def to specify the "debug" interp
-import portable/portdbg.c
-
# C pre-processor defines for stub C instructions
import portable/stubdefs.c
# common defs for the C opcodes
import c/opcommon.c
-# debug-only code
-import portable/debug.c
-
# entry point
import portable/entry.c
diff --git a/vm/mterp/config-portstd b/vm/mterp/config-portstd
deleted file mode 100644
index d0f609e..0000000
--- a/vm/mterp/config-portstd
+++ /dev/null
@@ -1,48 +0,0 @@
-# Copyright (C) 2008 The Android Open Source Project
-#
-# Licensed under the Apache License, Version 2.0 (the "License");
-# you may not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# http://www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an "AS IS" BASIS,
-# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-
-#
-# Configuration for "portstd" target, a/k/a the portable interpreter. This
-# differs from other "mterp" targets in that it doesn't use the usual
-# stub/glue mechanism, and defines different entry points. We generate it
-# here because it's convenient.
-#
-
-handler-style all-c
-
-# C file header and basic definitions
-import c/header.c
-
-# simple def to specify the "standard" interp
-import portable/portstd.c
-
-# C pre-processor defines for stub C instructions
-import portable/stubdefs.c
-
-# common defs for the C opcodes
-import c/opcommon.c
-
-# entry point
-import portable/entry.c
-
-# opcode list; argument to op-start is default directory
-op-start c
- # concatenate all C implementations
-op-end
-
-# "helper" code
-import c/gotoTargets.c
-
-# finish
-import portable/enddefs.c
diff --git a/vm/mterp/cstubs/entry.c b/vm/mterp/cstubs/entry.c
index 58add85..3123e6d 100644
--- a/vm/mterp/cstubs/entry.c
+++ b/vm/mterp/cstubs/entry.c
@@ -17,51 +17,32 @@
*
* This is only used for the "allstubs" variant.
*/
-bool dvmMterpStdRun(Thread* self)
+void dvmMterpStdRun(Thread* self)
{
jmp_buf jmpBuf;
- int changeInterp;
self->bailPtr = &jmpBuf;
- /*
- * We want to return "changeInterp" as a boolean, but we can't return
- * zero through longjmp, so we return (boolean+1).
- */
- changeInterp = setjmp(jmpBuf) -1;
- if (changeInterp >= 0) {
- LOGVV("mterp threadid=%d returning %d\n",
- dvmThreadSelf()->threadId, changeInterp);
- return changeInterp;
- }
-
- /*
- * We may not be starting at a point where we're executing instructions.
- * We need to pick up where the other interpreter left off.
- *
- * In some cases we need to call into a throw/return handler which
- * will do some processing and then either return to us (updating "self")
- * or longjmp back out.
- */
- switch (self->entryPoint) {
- case kInterpEntryInstr:
- /* just start at the start */
- break;
- case kInterpEntryReturn:
- dvmMterp_returnFromMethod(self);
- break;
- case kInterpEntryThrow:
- dvmMterp_exceptionThrown(self);
- break;
- default:
- dvmAbort();
+ /* We exit via a longjmp */
+ if (setjmp(jmpBuf)) {
+ LOGVV("mterp threadid=%d returning\n", dvmThreadSelf()->threadId);
+ return
}
/* run until somebody longjmp()s out */
while (true) {
typedef void (*Handler)(Thread* self);
- u2 inst = /*self->*/pc[0];
+ u2 inst = /*self->interpSave.*/pc[0];
+ /*
+ * In mterp, dvmCheckBefore is handled via the altHandlerTable,
+ * while in the portable interpreter it is part of the handler
+ * FINISH code. For allstubs, we must do an explicit check
+ * in the interpretation loop.
+ */
+ if (self-interpBreak.ctl.subMode) {
+ dvmCheckBefore(pc, fp, self, curMethod);
+ }
Handler handler = (Handler) gDvmMterpHandlers[inst & 0xff];
(void) gDvmMterpHandlerNames; /* avoid gcc "defined but not used" */
LOGVV("handler %p %s\n",
@@ -73,8 +54,8 @@
/*
* C mterp exit point. Call here to bail out of the interpreter.
*/
-void dvmMterpStdBail(Thread* self, bool changeInterp)
+void dvmMterpStdBail(Thread* self)
{
jmp_buf* pJmpBuf = self->bailPtr;
- longjmp(*pJmpBuf, ((int)changeInterp)+1);
+ longjmp(*pJmpBuf, 1);
}
diff --git a/vm/mterp/cstubs/stubdefs.c b/vm/mterp/cstubs/stubdefs.c
index 1c98029..00fb8b6 100644
--- a/vm/mterp/cstubs/stubdefs.c
+++ b/vm/mterp/cstubs/stubdefs.c
@@ -1,11 +1,3 @@
-/* this is a standard (no debug support) interpreter */
-#define INTERP_TYPE INTERP_STD
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-# define CHECK_TRACKED_REFS() ((void)0)
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
-
/*
* In the C mterp stubs, "goto" is a function call followed immediately
* by a return.
@@ -39,6 +31,11 @@
/* ugh */
#define STUB_HACK(x) x
+#if defined(WITH_JIT)
+#define JIT_STUB_HACK(x) x
+#else
+#define JIT_STUB_HACK(x)
+#endif
/*
@@ -58,14 +55,23 @@
/*
* Like the "portable" FINISH, but don't reload "inst", and return to caller
- * when done.
+ * when done. Further, debugger/profiler checks are handled
+ * before handler execution in mterp, so we don't do them here either.
*/
+#if defined(WITH_JIT)
#define FINISH(_offset) { \
ADJUST_PC(_offset); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
+ dvmCheckJit(pc, self); \
+ } \
return; \
}
+#else
+#define FINISH(_offset) { \
+ ADJUST_PC(_offset); \
+ return; \
+ }
+#endif
/*
@@ -100,30 +106,20 @@
} while(false)
/*
- * As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
- * if we need to switch to the other interpreter upon our return.
+ * As a special case, "goto bail" turns into a longjmp.
*/
#define GOTO_bail() \
dvmMterpStdBail(self, false);
-#define GOTO_bail_switch() \
- dvmMterpStdBail(self, true);
/*
* Periodically check for thread suspension.
*
* While we're at it, see if a debugger has attached or the profiler has
- * started. If so, switch to a different "goto" table.
+ * started.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
- self->threadId, (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
diff --git a/vm/mterp/gen-mterp.py b/vm/mterp/gen-mterp.py
index f8043bb..cf1e4e0 100755
--- a/vm/mterp/gen-mterp.py
+++ b/vm/mterp/gen-mterp.py
@@ -166,7 +166,7 @@
except ValueError:
raise DataParseError("unknown opcode %s" % tokens[1])
if alt_opcode_locations.has_key(tokens[1]):
- print "Warning: alt overrides earlier %s (%s -> %s)" \
+ print "Note: alt overrides earlier %s (%s -> %s)" \
% (tokens[1], alt_opcode_locations[tokens[1]], tokens[2])
alt_opcode_locations[tokens[1]] = tokens[2]
generate_alt_table = True
@@ -186,7 +186,7 @@
except ValueError:
raise DataParseError("unknown opcode %s" % tokens[1])
if opcode_locations.has_key(tokens[1]):
- print "Warning: op overrides earlier %s (%s -> %s)" \
+ print "Note: op overrides earlier %s (%s -> %s)" \
% (tokens[1], opcode_locations[tokens[1]], tokens[2])
opcode_locations[tokens[1]] = tokens[2]
@@ -340,8 +340,8 @@
# point dvmAsmInstructionStart at the first handler or stub
asm_fp.write("\n .global %s\n" % start_label)
asm_fp.write(" .type %s, %%function\n" % start_label)
- asm_fp.write("%s:\n" % start_label)
asm_fp.write(" .text\n\n")
+ asm_fp.write("%s = " % start_label + label_prefix + "_ALT_OP_NOP\n")
for i in xrange(kNumPackedOpcodes):
op = opcodes[i]
diff --git a/vm/mterp/out/InterpAsm-armv5te-vfp.S b/vm/mterp/out/InterpAsm-armv5te-vfp.S
index 5bf734f..1824d07 100644
--- a/vm/mterp/out/InterpAsm-armv5te-vfp.S
+++ b/vm/mterp/out/InterpAsm-armv5te-vfp.S
@@ -138,7 +138,7 @@
* rPC to point to the next instruction. "_reg" must specify the distance
* in bytes, *not* 16-bit code units, and may be a signed value.
*
- * We want to write "ldrh rINST, [rPC, _reg, lsl #2]!", but some of the
+ * We want to write "ldrh rINST, [rPC, _reg, lsl #1]!", but some of the
* bits that hold the shift distance are used for the half/byte/sign flags.
* In some cases we can pre-double _reg for free, so we require a byte offset
* here.
@@ -176,6 +176,7 @@
* interpreter, we don't have to worry about pre-ARMv5 THUMB interwork.
*/
#define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6
+#define GOTO_OPCODE_BASE(_base,_reg) add pc, _base, _reg, lsl #6
#define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6
#define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6
@@ -185,11 +186,6 @@
#define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2]
#define SET_VREG(_reg, _vreg) str _reg, [rFP, _vreg, lsl #2]
-#if defined(WITH_JIT)
-#define GET_JIT_PROF_TABLE(_reg) ldr _reg,[rSELF,#offThread_pJitProfTable]
-#define GET_JIT_THRESHOLD(_reg) ldr _reg,[rSELF,#offThread_jitThreshold]
-#endif
-
/*
* Convert a virtual register index into an address.
*/
@@ -268,8 +264,7 @@
* On entry:
* r0 Thread* self
*
- * This function returns a boolean "changeInterp" value. The return comes
- * via a call to dvmMterpStdBail().
+ * The return comes via a call to dvmMterpStdBail().
*/
dvmMterpStdRun:
#define MTERP_ENTRY1 \
@@ -288,16 +283,13 @@
/* set up "named" registers, figure out entry point */
mov rSELF, r0 @ set rSELF
- ldr r1, [r0, #offThread_entryPoint] @ enum is 4 bytes in aapcs-EABI
LOAD_PC_FP_FROM_SELF() @ load rPC and rFP from "thread"
ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ set rIBASE
- cmp r1, #kInterpEntryInstr @ usual case?
- bne .Lnot_instr @ no, handle it
#if defined(WITH_JIT)
.LentryInstr:
/* Entry is always a possible trace start */
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
mov r1, #0 @ prepare the value for the new state
str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land
@@ -325,33 +317,6 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
-.Lnot_instr:
- cmp r1, #kInterpEntryReturn @ were we returning from a method?
- beq common_returnFromMethod
-
-.Lnot_return:
- cmp r1, #kInterpEntryThrow @ were we throwing an exception?
- beq common_exceptionThrown
-
-#if defined(WITH_JIT)
-.Lnot_throw:
- ldr r10,[rSELF, #offThread_jitResumeNPC]
- ldr r2,[rSELF, #offThread_jitResumeDPC]
- cmp r1, #kInterpEntryResume @ resuming after Jit single-step?
- bne .Lbad_arg
- cmp rPC,r2
- bne .LentryInstr @ must have branched, don't resume
-#if defined(WITH_SELF_VERIFICATION)
- @ self->entryPoint will be set in dvmSelfVerificationSaveState
- b jitSVShadowRunStart @ re-enter the translation after the
- @ single-stepped instruction
- @noreturn
-#endif
- mov r1, #kInterpEntryInstr
- str r1, [rSELF, #offThread_entryPoint]
- bx r10 @ re-enter the translation
-#endif
-
.Lbad_arg:
ldr r0, strBadEntryPoint
@ r1 holds value of entryPoint
@@ -375,11 +340,9 @@
*
* On entry:
* r0 Thread* self
- * r1 bool changeInterp
*/
dvmMterpStdBail:
- ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
- mov r0, r1 @ return the changeInterp value
+ ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
add sp, sp, #4 @ un-align 64
ldmfd sp!, {r4-r10,fp,pc} @ restore 9 regs and return
@@ -970,6 +933,9 @@
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .LOP_NEW_INSTANCE_resolve @ no, resolve it now
@@ -1110,22 +1076,19 @@
* double to get a byte offset.
*/
/* goto +AA */
+ /* tuning: use sbfx for 6t2+ targets */
mov r0, rINST, lsl #16 @ r0<- AAxx0000
- movs r9, r0, asr #24 @ r9<- ssssssAA (sign-extended)
- mov r9, r9, lsl #1 @ r9<- byte offset
- bmi common_backwardBranch @ backward branch, do periodic checks
+ movs r1, r0, asr #24 @ r1<- ssssssAA (sign-extended)
+ add r2, r1, r1 @ r2<- byte offset, set flags
+ @ If backwards branch refresh rIBASE
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) check for trace hotness
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
.balign 64
@@ -1139,20 +1102,15 @@
*/
/* goto/16 +AAAA */
FETCH_S(r0, 1) @ r0<- ssssAAAA (sign-extended)
- movs r9, r0, asl #1 @ r9<- byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
+ adds r1, r0, r0 @ r1<- byte offset, flags set
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) hot trace head?
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
.balign 64
@@ -1165,29 +1123,26 @@
* double to get a byte offset.
*
* Unlike most opcodes, this one is allowed to branch to itself, so
- * our "backward branch" test must be "<=0" instead of "<0". The ORRS
- * instruction doesn't affect the V flag, so we need to clear it
- * explicitly.
+ * our "backward branch" test must be "<=0" instead of "<0". Because
+ * we need the V bit set, we'll use an adds to convert from Dalvik
+ * offset to byte offset.
*/
/* goto/32 +AAAAAAAA */
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- cmp ip, ip @ (clear V flag during stall)
- orrs r0, r0, r1, lsl #16 @ r0<- AAAAaaaa, check sign
- mov r9, r0, asl #1 @ r9<- byte offset
- ble common_backwardBranch @ backward branch, do periodic checks
+ orr r0, r0, r1, lsl #16 @ r0<- AAAAaaaa
+ adds r1, r0, r0 @ r1<- byte offset
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ble common_testUpdateProfile @ (r0) hot trace head?
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
.balign 64
@@ -1200,6 +1155,9 @@
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them here.
*
+ * When the JIT is present, all targets are considered treated as
+ * a potential trace heads regardless of branch direction.
+ *
* for: packed-switch, sparse-switch
*/
/* op vAA, +BBBB */
@@ -1210,21 +1168,19 @@
GET_VREG(r1, r3) @ r1<- vAA
add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2
bl dvmInterpHandlePackedSwitch @ r0<- code-unit branch offset
- movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
- beq common_backwardBranch @ (want to use BLE but V is unknown)
+ adds r1, r0, r0 @ r1<- byte offset; clear V
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ cmp r0, #0
bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
.balign 64
@@ -1238,6 +1194,9 @@
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them here.
*
+ * When the JIT is present, all targets are considered treated as
+ * a potential trace heads regardless of branch direction.
+ *
* for: packed-switch, sparse-switch
*/
/* op vAA, +BBBB */
@@ -1248,21 +1207,19 @@
GET_VREG(r1, r3) @ r1<- vAA
add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2
bl dvmInterpHandleSparseSwitch @ r0<- code-unit branch offset
- movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
- beq common_backwardBranch @ (want to use BLE but V is unknown)
+ adds r1, r0, r0 @ r1<- byte offset; clear V
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ cmp r0, #0
bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1480,22 +1437,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bne 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movne r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1516,22 +1472,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- beq 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ moveq r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1552,22 +1507,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bge 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movge r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1588,22 +1542,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- blt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movlt r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1624,22 +1577,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- ble 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movle r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1660,22 +1612,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bgt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movgt r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1693,25 +1644,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bne 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movne r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1729,25 +1676,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- beq 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ moveq r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1765,25 +1708,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bge 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movge r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1801,25 +1740,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- blt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movlt r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1837,25 +1772,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- ble 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movle r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1873,25 +1804,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bgt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movgt r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -2764,8 +2691,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_resolve @ yes, do resolve
.LOP_SGET_finish: @ field ptr in r0
@@ -2787,8 +2714,8 @@
/* sget-wide vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_WIDE_resolve @ yes, do resolve
.LOP_SGET_WIDE_finish:
@@ -2818,8 +2745,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_resolve @ yes, do resolve
.LOP_SGET_OBJECT_finish: @ field ptr in r0
@@ -2845,8 +2772,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BOOLEAN_resolve @ yes, do resolve
.LOP_SGET_BOOLEAN_finish: @ field ptr in r0
@@ -2872,8 +2799,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BYTE_resolve @ yes, do resolve
.LOP_SGET_BYTE_finish: @ field ptr in r0
@@ -2899,8 +2826,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_CHAR_resolve @ yes, do resolve
.LOP_SGET_CHAR_finish: @ field ptr in r0
@@ -2926,8 +2853,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_SHORT_resolve @ yes, do resolve
.LOP_SGET_SHORT_finish: @ field ptr in r0
@@ -2952,8 +2879,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_resolve @ yes, do resolve
.LOP_SPUT_finish: @ field ptr in r0
@@ -2975,9 +2902,9 @@
/* sput-wide vAA, field@BBBB */
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
mov r9, rINST, lsr #8 @ r9<- AA
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_resolve @ yes, do resolve
@@ -3005,18 +2932,19 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-
+ beq .LOP_SPUT_OBJECT_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_finish: @ field ptr in r0
+ mov r2, rINST, lsr #8 @ r2<- AA
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[AA]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ @ no-op @ releasing store
+ b .LOP_SPUT_OBJECT_end
/* ------------------------------ */
.balign 64
@@ -3031,8 +2959,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BOOLEAN_resolve @ yes, do resolve
.LOP_SPUT_BOOLEAN_finish: @ field ptr in r0
@@ -3058,8 +2986,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BYTE_resolve @ yes, do resolve
.LOP_SPUT_BYTE_finish: @ field ptr in r0
@@ -3085,8 +3013,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_CHAR_resolve @ yes, do resolve
.LOP_SPUT_CHAR_finish: @ field ptr in r0
@@ -3112,8 +3040,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_SHORT_resolve @ yes, do resolve
.LOP_SPUT_SHORT_finish: @ field ptr in r0
@@ -3174,13 +3102,13 @@
.endif
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_resolve @ do resolve now
@@ -3211,11 +3139,11 @@
.endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodNoRange @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodNoRange @ r0=method, r9="this"
b common_errNullObject @ yes, throw exception
/* ------------------------------ */
@@ -3232,17 +3160,15 @@
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- pDvmDex
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
+ mov r9, #0 @ null "this" in delay slot
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
bne common_invokeMethodNoRange @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodNoRange @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ b .LOP_INVOKE_STATIC_resolve
/* ------------------------------ */
.balign 64
@@ -3261,16 +3187,16 @@
and r2, r2, #15 @ r2<- C (or stays CCCC)
.endif
EXPORT_PC() @ must export for invoke
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodNoRange @ jump to common handler
+ b common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -3331,13 +3257,13 @@
.endif
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_RANGE_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_RANGE_resolve @ do resolve now
@@ -3370,11 +3296,11 @@
.endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_RANGE_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_RANGE_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodRange @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodRange @ r0=method, r9="this"
b common_errNullObject @ yes, throw exception
@@ -3393,17 +3319,15 @@
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- pDvmDex
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
+ mov r9, #0 @ null "this" in delay slot
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
bne common_invokeMethodRange @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodRange @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ b .LOP_INVOKE_STATIC_RANGE_resolve
/* ------------------------------ */
@@ -3424,16 +3348,16 @@
and r2, r2, #15 @ r2<- C (or stays CCCC)
.endif
EXPORT_PC() @ must export for invoke
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodRange @ jump to common handler
+ b common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7142,8 +7066,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_VOLATILE_finish: @ field ptr in r0
@@ -7169,8 +7093,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_VOLATILE_resolve @ yes, do resolve
.LOP_SPUT_VOLATILE_finish: @ field ptr in r0
@@ -7271,8 +7195,8 @@
/* sget-wide vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_WIDE_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_WIDE_VOLATILE_finish:
@@ -7301,9 +7225,9 @@
/* sput-wide vAA, field@BBBB */
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
mov r9, rINST, lsr #8 @ r9<- AA
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_VOLATILE_resolve @ yes, do resolve
@@ -7324,9 +7248,19 @@
.balign 64
.L_OP_BREAKPOINT: /* 0xec */
/* File: armv5te/OP_BREAKPOINT.S */
-/* File: armv5te/unused.S */
- bl common_abort
-
+ /*
+ * Breakpoint handler.
+ *
+ * Restart this instruction with the original opcode. By
+ * the time we get here, the breakpoint will have already been
+ * handled.
+ */
+ mov r0, rPC
+ bl dvmGetOriginalOpcode @ (rPC)
+ FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst
+ and rINST, #0xff00
+ orr rINST, rINST, r0
+ GOTO_OPCODE(r0)
/* ------------------------------ */
.balign 64
@@ -7358,11 +7292,18 @@
* The first four args are in r0-r3, pointer to return value storage
* is on the stack. The function's return value is a flag that tells
* us if an exception was thrown.
+ *
+ * TUNING: could maintain two tables, pointer in Thread and
+ * swap if profiler/debuggger active.
*/
/* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .LOP_EXECUTE_INLINE_debugmode @ yes - take slow path
+.LOP_EXECUTE_INLINE_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #12 @ r0<- B
str r1, [sp] @ push &self->retval
@@ -7390,9 +7331,13 @@
* us if an exception was thrown.
*/
/* [opt] execute-inline/range {vCCCC..v(CCCC+AA-1)}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .LOP_EXECUTE_INLINE_RANGE_debugmode @ yes - take slow path
+.LOP_EXECUTE_INLINE_RANGE_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #8 @ r0<- AA
str r1, [sp] @ push &self->retval
@@ -7411,7 +7356,7 @@
/*
* Invoke Object.<init> on an object. In practice we know that
* Object's nullary constructor doesn't do anything, so we just
- * skip it (we know a debugger isn't active).
+ * skip it unless a debugger is active.
*/
FETCH(r1, 2) @ r1<- CCCC
GET_VREG(r0, r1) @ r0<- "this" ptr
@@ -7420,13 +7365,12 @@
ldr r1, [r0, #offObject_clazz] @ r1<- obj->clazz
ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
- beq 1f @ nope, done
- EXPORT_PC() @ can throw
- bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
- ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
- cmp r0, #0 @ exception pending?
- bne common_exceptionThrown @ yes, handle it
-1: FETCH_ADVANCE_INST(2+1) @ advance to next instr, load rINST
+ bne .LOP_INVOKE_OBJECT_INIT_RANGE_setFinal @ yes, go
+.LOP_INVOKE_OBJECT_INIT_RANGE_finish:
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeDebuggerActive @ debugger active?
+ bne .LOP_INVOKE_OBJECT_INIT_RANGE_debugger @ Yes - skip optimization
+ FETCH_ADVANCE_INST(2+1) @ advance to next instr, load rINST
GET_INST_OPCODE(ip) @ ip<- opcode from rINST
GOTO_OPCODE(ip) @ execute it
@@ -7572,14 +7516,14 @@
.if (!0)
and r3, r3, #15 @ r3<- C (or stays CCCC)
.endif
- GET_VREG(r2, r3) @ r2<- vC ("this" ptr)
- cmp r2, #0 @ is "this" null?
+ GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r2, [r2, #offObject_clazz] @ r2<- thisPtr->clazz
+ ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
EXPORT_PC() @ invoke must export
ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -7598,14 +7542,14 @@
.if (!1)
and r3, r3, #15 @ r3<- C (or stays CCCC)
.endif
- GET_VREG(r2, r3) @ r2<- vC ("this" ptr)
- cmp r2, #0 @ is "this" null?
+ GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r2, [r2, #offObject_clazz] @ r2<- thisPtr->clazz
+ ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
EXPORT_PC() @ invoke must export
ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7628,12 +7572,12 @@
ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
EXPORT_PC() @ must export for invoke
ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
- GET_VREG(r3, r10) @ r3<- "this"
+ GET_VREG(r9, r10) @ r9<- "this"
ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
- cmp r3, #0 @ null "this" ref?
+ cmp r9, #0 @ null "this" ref?
ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
beq common_errNullObject @ "this" is null, throw exception
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -7656,12 +7600,12 @@
ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
EXPORT_PC() @ must export for invoke
ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
- GET_VREG(r3, r10) @ r3<- "this"
+ GET_VREG(r9, r10) @ r9<- "this"
ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
- cmp r3, #0 @ null "this" ref?
+ cmp r9, #0 @ null "this" ref?
ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
beq common_errNullObject @ "this" is null, throw exception
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7705,8 +7649,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_OBJECT_VOLATILE_finish: @ field ptr in r0
@@ -7732,18 +7676,19 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_VOLATILE_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-
+ beq .LOP_SPUT_OBJECT_VOLATILE_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_VOLATILE_finish: @ field ptr in r0
+ mov r2, rINST, lsr #8 @ r2<- AA
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[AA]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SMP_DMB @ releasing store
+ b .LOP_SPUT_OBJECT_VOLATILE_end
/* ------------------------------ */
@@ -7844,6 +7789,9 @@
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .LOP_NEW_INSTANCE_JUMBO_resolve @ no, resolve it now
@@ -8317,9 +8265,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_JUMBO_resolve @ yes, do resolve
.LOP_SGET_JUMBO_finish: @ field ptr in r0
@@ -8376,9 +8324,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_JUMBO_resolve @ yes, do resolve
.LOP_SGET_OBJECT_JUMBO_finish: @ field ptr in r0
@@ -8406,9 +8354,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BOOLEAN_JUMBO_resolve @ yes, do resolve
.LOP_SGET_BOOLEAN_JUMBO_finish: @ field ptr in r0
@@ -8436,9 +8384,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BYTE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_BYTE_JUMBO_finish: @ field ptr in r0
@@ -8466,9 +8414,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_CHAR_JUMBO_resolve @ yes, do resolve
.LOP_SGET_CHAR_JUMBO_finish: @ field ptr in r0
@@ -8496,9 +8444,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_SHORT_JUMBO_resolve @ yes, do resolve
.LOP_SGET_SHORT_JUMBO_finish: @ field ptr in r0
@@ -8525,9 +8473,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_JUMBO_finish: @ field ptr in r0
@@ -8550,10 +8498,10 @@
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- aaaa (lo)
FETCH(r2, 2) @ r2<- AAAA (hi)
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r1, r2, lsl #16 @ r1<- AAAAaaaa
FETCH(r9, 3) @ r9<- BBBB
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_JUMBO_resolve @ yes, do resolve
@@ -8580,18 +8528,20 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_JUMBO_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq .LOP_SPUT_OBJECT_JUMBO_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_JUMBO_finish: @ field ptr in r0
+ FETCH(r2, 3) @ r2<- BBBB
+ FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[BBBB]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ @ no-op @ releasing store
+ b .LOP_SPUT_OBJECT_JUMBO_end
/* ------------------------------ */
.balign 64
@@ -8608,9 +8558,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BOOLEAN_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_BOOLEAN_JUMBO_finish: @ field ptr in r0
@@ -8638,9 +8588,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BYTE_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_BYTE_JUMBO_finish: @ field ptr in r0
@@ -8668,9 +8618,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_CHAR_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_CHAR_JUMBO_finish: @ field ptr in r0
@@ -8698,9 +8648,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_SHORT_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_SHORT_JUMBO_finish: @ field ptr in r0
@@ -8752,13 +8702,13 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_JUMBO_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_JUMBO_resolve @ do resolve now
@@ -8786,11 +8736,11 @@
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_JUMBO_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_JUMBO_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodJumbo @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodJumbo @ (r0=method, r9="this")
b common_errNullObject @ yes, throw exception
/* ------------------------------ */
@@ -8807,16 +8757,13 @@
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- bne common_invokeMethodJumbo @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodJumbo @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ bne common_invokeMethodJumboNoThis @ (r0=method)
+ b .LOP_INVOKE_STATIC_JUMBO_resolve
/* ------------------------------ */
.balign 64
@@ -8831,16 +8778,16 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
EXPORT_PC() @ must export for invoke
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodJumbo @ jump to common handler
+ b common_invokeMethodJumbo @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -10474,7 +10421,7 @@
/*
* Invoke Object.<init> on an object. In practice we know that
* Object's nullary constructor doesn't do anything, so we just
- * skip it (we know a debugger isn't active).
+ * skip it unless a debugger is active.
*/
FETCH(r1, 4) @ r1<- CCCC
GET_VREG(r0, r1) @ r0<- "this" ptr
@@ -10483,13 +10430,12 @@
ldr r1, [r0, #offObject_clazz] @ r1<- obj->clazz
ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
- beq 1f @ nope, done
- EXPORT_PC() @ can throw
- bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
- ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
- cmp r0, #0 @ exception pending?
- bne common_exceptionThrown @ yes, handle it
-1: FETCH_ADVANCE_INST(4+1) @ advance to next instr, load rINST
+ bne .LOP_INVOKE_OBJECT_INIT_JUMBO_setFinal @ yes, go
+.LOP_INVOKE_OBJECT_INIT_JUMBO_finish:
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeDebuggerActive @ debugger active?
+ bne .LOP_INVOKE_OBJECT_INIT_JUMBO_debugger @ Yes - skip optimization
+ FETCH_ADVANCE_INST(4+1) @ advance to next instr, load rINST
GET_INST_OPCODE(ip) @ ip<- opcode from rINST
GOTO_OPCODE(ip) @ execute it
@@ -10673,9 +10619,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -10736,9 +10682,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -10767,9 +10713,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -10794,10 +10740,10 @@
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- aaaa (lo)
FETCH(r2, 2) @ r2<- AAAA (hi)
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r1, r2, lsl #16 @ r1<- AAAAaaaa
FETCH(r9, 3) @ r9<- BBBB
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve @ yes, do resolve
@@ -10826,18 +10772,20 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq .LOP_SPUT_OBJECT_VOLATILE_JUMBO_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
+ FETCH(r2, 3) @ r2<- BBBB
+ FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[BBBB]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SMP_DMB @ releasing store
+ b .LOP_SPUT_OBJECT_VOLATILE_JUMBO_end
/* ------------------------------ */
@@ -11034,12 +10982,45 @@
.LOP_NEW_INSTANCE_finish: @ r0=new object
mov r3, rINST, lsr #8 @ r3<- AA
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .LOP_NEW_INSTANCE_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.LOP_NEW_INSTANCE_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.LOP_NEW_INSTANCE_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .LOP_NEW_INSTANCE_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
@@ -11178,14 +11159,17 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY
bl dvmThrowInternalError
b common_exceptionThrown
- .if (!0) @ define in one or the other, not both
-.L_strFilledNewArrayNotImpl:
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY:
.word .LstrFilledNewArrayNotImpl
- .endif
/* continuation for OP_FILLED_NEW_ARRAY_RANGE */
@@ -11259,14 +11243,17 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_RANGE_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_RANGE
bl dvmThrowInternalError
b common_exceptionThrown
- .if (!1) @ define in one or the other, not both
-.L_strFilledNewArrayNotImpl:
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_RANGE:
.word .LstrFilledNewArrayNotImpl
- .endif
/* continuation for OP_CMPL_FLOAT */
.LOP_CMPL_FLOAT_finish:
@@ -11673,216 +11660,378 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_finish
/* continuation for OP_SGET_WIDE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r0.
*/
.LOP_SGET_WIDE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r1<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_WIDE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_WIDE_finish @ resume
/* continuation for OP_SGET_OBJECT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_finish
/* continuation for OP_SGET_BOOLEAN */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BOOLEAN_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BOOLEAN_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BOOLEAN_finish
/* continuation for OP_SGET_BYTE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BYTE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BYTE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BYTE_finish
/* continuation for OP_SGET_CHAR */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_CHAR_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_CHAR_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_CHAR_finish
/* continuation for OP_SGET_SHORT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_SHORT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_SHORT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_SHORT_finish
/* continuation for OP_SPUT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_finish @ resume
/* continuation for OP_SPUT_WIDE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
- * r9: &fp[AA]
+ * r1: BBBB field ref
+ * r9: &fp[AA]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_finish @ resume
/* continuation for OP_SPUT_OBJECT */
-.LOP_SPUT_OBJECT_finish: @ field ptr in r0
- mov r2, rINST, lsr #8 @ r2<- AA
- FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[AA]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- @ no-op @ releasing store
+
+
+.LOP_SPUT_OBJECT_end:
str r1, [r0, #offStaticField_value] @ field<- vAA
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
-/* continuation for OP_SPUT_BOOLEAN */
-
- /*
- * Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ /* Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
-.LOP_SPUT_BOOLEAN_resolve:
+.LOP_SPUT_OBJECT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BOOLEAN_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_finish @ resume
+
+
+/* continuation for OP_SPUT_BOOLEAN */
+
+ /*
+ * Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_BOOLEAN_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BOOLEAN_finish @ resume
/* continuation for OP_SPUT_BYTE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_BYTE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BYTE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BYTE_finish @ resume
/* continuation for OP_SPUT_CHAR */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_CHAR_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_CHAR_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_CHAR_finish @ resume
/* continuation for OP_SPUT_SHORT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_SHORT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_SHORT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_SHORT_finish @ resume
/* continuation for OP_INVOKE_VIRTUAL */
@@ -11892,24 +12041,24 @@
* r10 = C or CCCC (index of first arg, which is the "this" ptr)
*/
.LOP_INVOKE_VIRTUAL_continue:
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -11920,7 +12069,7 @@
bl common_invokeMethodNoRange @ continue on
.LOP_INVOKE_SUPER_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -11948,10 +12097,42 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC */
+
+
+.LOP_INVOKE_STATIC_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodNoRange @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodNoRange @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodNoRange @ whew, finally!
+#else
+ bne common_invokeMethodNoRange @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
/* continuation for OP_INVOKE_VIRTUAL_RANGE */
/*
@@ -11960,24 +12141,24 @@
* r10 = C or CCCC (index of first arg, which is the "this" ptr)
*/
.LOP_INVOKE_VIRTUAL_RANGE_continue:
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER_RANGE */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_RANGE_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -11988,7 +12169,7 @@
bl common_invokeMethodRange @ continue on
.LOP_INVOKE_SUPER_RANGE_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -12016,10 +12197,42 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_RANGE_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC_RANGE */
+
+
+.LOP_INVOKE_STATIC_RANGE_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodRange @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodRange @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodRange @ whew, finally!
+#else
+ bne common_invokeMethodRange @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
/* continuation for OP_FLOAT_TO_LONG */
/*
* Convert the float in r0 to a long in r0/r1.
@@ -12205,31 +12418,53 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_VOLATILE_finish
/* continuation for OP_SPUT_VOLATILE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_VOLATILE_finish @ resume
/* continuation for OP_IGET_OBJECT_VOLATILE */
@@ -12306,37 +12541,59 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r0.
*/
.LOP_SGET_WIDE_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r1<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_WIDE_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_WIDE_VOLATILE_finish @ resume
/* continuation for OP_SPUT_WIDE_VOLATILE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
- * r9: &fp[AA]
+ * r1: BBBB field ref
+ * r9: &fp[AA]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_VOLATILE_finish @ resume
/* continuation for OP_EXECUTE_INLINE */
@@ -12370,6 +12627,36 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.LOP_EXECUTE_INLINE_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .LOP_EXECUTE_INLINE_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .LOP_EXECUTE_INLINE_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.LOP_EXECUTE_INLINE_table:
.word gDvmInlineOpsTable
@@ -12399,9 +12686,67 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.LOP_EXECUTE_INLINE_RANGE_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .LOP_EXECUTE_INLINE_RANGE_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .LOP_EXECUTE_INLINE_RANGE_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.LOP_EXECUTE_INLINE_RANGE_table:
.word gDvmInlineOpsTable
+
+/* continuation for OP_INVOKE_OBJECT_INIT_RANGE */
+
+.LOP_INVOKE_OBJECT_INIT_RANGE_setFinal:
+ EXPORT_PC() @ can throw
+ bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
+ ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
+ cmp r0, #0 @ exception pending?
+ bne common_exceptionThrown @ yes, handle it
+ b .LOP_INVOKE_OBJECT_INIT_RANGE_finish
+
+ /*
+ * A debugger is attached, so we need to go ahead and do
+ * this. For simplicity, we'll just jump directly to the
+ * corresponding handler. Note that we can't use
+ * rIBASE here because it may be in single-step mode.
+ * Load the primary table base directly.
+ */
+.LOP_INVOKE_OBJECT_INIT_RANGE_debugger:
+ ldr r1, [rSELF, #offThread_mainHandlerTable]
+ .if 0
+ mov ip, #OP_INVOKE_DIRECT_JUMBO
+ .else
+ mov ip, #OP_INVOKE_DIRECT_RANGE
+ .endif
+ GOTO_OPCODE_BASE(r1,ip) @ execute it
+
/* continuation for OP_IPUT_OBJECT_VOLATILE */
/*
@@ -12430,31 +12775,61 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_VOLATILE_finish
/* continuation for OP_SPUT_OBJECT_VOLATILE */
-.LOP_SPUT_OBJECT_VOLATILE_finish: @ field ptr in r0
- mov r2, rINST, lsr #8 @ r2<- AA
- FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[AA]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- SMP_DMB @ releasing store
+
+
+.LOP_SPUT_OBJECT_VOLATILE_end:
str r1, [r0, #offStaticField_value] @ field<- vAA
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+ /* Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_OBJECT_VOLATILE_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_VOLATILE_finish @ resume
+
+
/* continuation for OP_CONST_CLASS_JUMBO */
/*
@@ -12596,12 +12971,45 @@
.LOP_NEW_INSTANCE_JUMBO_finish: @ r0=new object
FETCH(r3, 3) @ r3<- BBBB
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .LOP_NEW_INSTANCE_JUMBO_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.LOP_NEW_INSTANCE_JUMBO_end:
FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vBBBB<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.LOP_NEW_INSTANCE_JUMBO_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .LOP_NEW_INSTANCE_JUMBO_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
@@ -12716,10 +13124,18 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_JUMBO_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_JUMBO
bl dvmThrowInternalError
b common_exceptionThrown
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_JUMBO:
+ .word .LstrFilledNewArrayNotImpl
+
/* continuation for OP_IGET_JUMBO */
/*
@@ -13155,16 +13571,27 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_JUMBO_finish @ resume
/* continuation for OP_SGET_WIDE_JUMBO */
@@ -13187,185 +13614,324 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_JUMBO_finish @ resume
/* continuation for OP_SGET_BOOLEAN_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BOOLEAN_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BOOLEAN_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BOOLEAN_JUMBO_finish @ resume
/* continuation for OP_SGET_BYTE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BYTE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BYTE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BYTE_JUMBO_finish @ resume
/* continuation for OP_SGET_CHAR_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_CHAR_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_CHAR_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_CHAR_JUMBO_finish @ resume
/* continuation for OP_SGET_SHORT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_SHORT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_SHORT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_SHORT_JUMBO_finish @ resume
/* continuation for OP_SPUT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_JUMBO_finish @ resume
/* continuation for OP_SPUT_WIDE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
- * r9: &fp[BBBB]
+ * r1: AAAAAAAA field ref
+ * r9: &fp[BBBB]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_JUMBO_finish @ resume
/* continuation for OP_SPUT_OBJECT_JUMBO */
-.LOP_SPUT_OBJECT_JUMBO_finish: @ field ptr in r0
- FETCH(r2, 3) @ r2<- BBBB
- FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[BBBB]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- @ no-op @ releasing store
+
+.LOP_SPUT_OBJECT_JUMBO_end:
str r1, [r0, #offStaticField_value] @ field<- vBBBB
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
-/* continuation for OP_SPUT_BOOLEAN_JUMBO */
-
- /*
- * Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ /* Continuation if the field has not yet been resolved.
+ * r1: AAAAaaaa field ref
+ * r10: dvmDex->pResFields
*/
-.LOP_SPUT_BOOLEAN_JUMBO_resolve:
- ldr r2, [rSELF, #offThread_method] @ r2<- current method
+.LOP_SPUT_OBJECT_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r9<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BOOLEAN_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_JUMBO_finish @ resume
+
+
+/* continuation for OP_SPUT_BOOLEAN_JUMBO */
+
+ /*
+ * Continuation if the field has not yet been resolved.
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_BOOLEAN_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BOOLEAN_JUMBO_finish @ resume
/* continuation for OP_SPUT_BYTE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_BYTE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BYTE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BYTE_JUMBO_finish @ resume
/* continuation for OP_SPUT_CHAR_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_CHAR_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_CHAR_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_CHAR_JUMBO_finish @ resume
/* continuation for OP_SPUT_SHORT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_SHORT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_SHORT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_SHORT_JUMBO_finish @ resume
/* continuation for OP_INVOKE_VIRTUAL_JUMBO */
@@ -13375,24 +13941,24 @@
*/
.LOP_INVOKE_VIRTUAL_JUMBO_continue:
FETCH(r10, 4) @ r10<- CCCC
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER_JUMBO */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_JUMBO_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -13400,10 +13966,10 @@
bcs .LOP_INVOKE_SUPER_JUMBO_nsm @ method not present in superclass
ldr r1, [r1, #offClassObject_vtable] @ r1<- ...clazz->super->vtable
ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
.LOP_INVOKE_SUPER_JUMBO_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -13431,10 +13997,68 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_JUMBO_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC_JUMBO */
+
+
+.LOP_INVOKE_STATIC_JUMBO_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodJumboNoThis @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodJumboNoThis @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodJumboNoThis @ whew, finally!
+#else
+ bne common_invokeMethodJumboNoThis @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
+/* continuation for OP_INVOKE_OBJECT_INIT_JUMBO */
+
+.LOP_INVOKE_OBJECT_INIT_JUMBO_setFinal:
+ EXPORT_PC() @ can throw
+ bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
+ ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
+ cmp r0, #0 @ exception pending?
+ bne common_exceptionThrown @ yes, handle it
+ b .LOP_INVOKE_OBJECT_INIT_JUMBO_finish
+
+ /*
+ * A debugger is attached, so we need to go ahead and do
+ * this. For simplicity, we'll just jump directly to the
+ * corresponding handler. Note that we can't use
+ * rIBASE here because it may be in single-step mode.
+ * Load the primary table base directly.
+ */
+.LOP_INVOKE_OBJECT_INIT_JUMBO_debugger:
+ ldr r1, [rSELF, #offThread_mainHandlerTable]
+ .if 1
+ mov ip, #OP_INVOKE_DIRECT_JUMBO
+ .else
+ mov ip, #OP_INVOKE_DIRECT_RANGE
+ .endif
+ GOTO_OPCODE_BASE(r1,ip) @ execute it
+
/* continuation for OP_IGET_VOLATILE_JUMBO */
/*
@@ -13630,16 +14254,27 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SGET_WIDE_VOLATILE_JUMBO */
@@ -13662,66 +14297,117 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_VOLATILE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_WIDE_VOLATILE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
- * r9: &fp[BBBB]
+ * r1: AAAAAAAA field ref
+ * r9: &fp[BBBB]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_OBJECT_VOLATILE_JUMBO */
-.LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
- FETCH(r2, 3) @ r2<- BBBB
- FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[BBBB]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- SMP_DMB @ releasing store
+
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_end:
str r1, [r0, #offStaticField_value] @ field<- vBBBB
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+ /* Continuation if the field has not yet been resolved.
+ * r1: AAAAaaaa field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r9<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ resume
+
+
.size dvmAsmSisterStart, .-dvmAsmSisterStart
.global dvmAsmSisterEnd
dvmAsmSisterEnd:
@@ -13729,7196 +14415,11818 @@
.global dvmAsmAltInstructionStart
.type dvmAsmAltInstructionStart, %function
-dvmAsmAltInstructionStart:
.text
+dvmAsmAltInstructionStart = .L_ALT_OP_NOP
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOP: /* 0x00 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (0 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE: /* 0x01 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (1 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_FROM16: /* 0x02 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (2 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_16: /* 0x03 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (3 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE: /* 0x04 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (4 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE_FROM16: /* 0x05 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (5 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE_16: /* 0x06 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (6 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT: /* 0x07 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (7 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT_FROM16: /* 0x08 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (8 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT_16: /* 0x09 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (9 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT: /* 0x0a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (10 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT_WIDE: /* 0x0b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (11 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT_OBJECT: /* 0x0c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (12 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_EXCEPTION: /* 0x0d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (13 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_VOID: /* 0x0e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (14 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN: /* 0x0f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (15 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_WIDE: /* 0x10 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (16 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_OBJECT: /* 0x11 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (17 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_4: /* 0x12 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (18 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_16: /* 0x13 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (19 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST: /* 0x14 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (20 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_HIGH16: /* 0x15 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (21 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_16: /* 0x16 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (22 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_32: /* 0x17 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (23 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE: /* 0x18 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (24 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_HIGH16: /* 0x19 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (25 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_STRING: /* 0x1a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (26 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_STRING_JUMBO: /* 0x1b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (27 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_CLASS: /* 0x1c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (28 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MONITOR_ENTER: /* 0x1d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (29 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MONITOR_EXIT: /* 0x1e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (30 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CHECK_CAST: /* 0x1f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (31 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INSTANCE_OF: /* 0x20 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (32 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ARRAY_LENGTH: /* 0x21 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (33 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_INSTANCE: /* 0x22 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (34 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_ARRAY: /* 0x23 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (35 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY: /* 0x24 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (36 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY_RANGE: /* 0x25 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (37 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILL_ARRAY_DATA: /* 0x26 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (38 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW: /* 0x27 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (39 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO: /* 0x28 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (40 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO_16: /* 0x29 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (41 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO_32: /* 0x2a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (42 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_PACKED_SWITCH: /* 0x2b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (43 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPARSE_SWITCH: /* 0x2c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (44 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPL_FLOAT: /* 0x2d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (45 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPG_FLOAT: /* 0x2e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (46 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPL_DOUBLE: /* 0x2f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (47 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPG_DOUBLE: /* 0x30 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (48 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMP_LONG: /* 0x31 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (49 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_EQ: /* 0x32 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (50 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_NE: /* 0x33 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (51 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LT: /* 0x34 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (52 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GE: /* 0x35 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (53 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GT: /* 0x36 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (54 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LE: /* 0x37 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (55 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_EQZ: /* 0x38 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (56 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_NEZ: /* 0x39 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (57 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LTZ: /* 0x3a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (58 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GEZ: /* 0x3b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (59 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GTZ: /* 0x3c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (60 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LEZ: /* 0x3d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (61 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3E: /* 0x3e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (62 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3F: /* 0x3f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (63 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_40: /* 0x40 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (64 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_41: /* 0x41 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (65 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_42: /* 0x42 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (66 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_43: /* 0x43 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (67 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET: /* 0x44 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (68 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_WIDE: /* 0x45 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (69 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_OBJECT: /* 0x46 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (70 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_BOOLEAN: /* 0x47 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (71 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_BYTE: /* 0x48 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (72 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_CHAR: /* 0x49 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (73 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_SHORT: /* 0x4a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (74 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT: /* 0x4b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (75 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_WIDE: /* 0x4c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (76 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_OBJECT: /* 0x4d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (77 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_BOOLEAN: /* 0x4e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (78 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_BYTE: /* 0x4f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (79 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_CHAR: /* 0x50 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (80 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_SHORT: /* 0x51 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (81 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET: /* 0x52 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (82 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE: /* 0x53 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (83 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT: /* 0x54 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (84 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BOOLEAN: /* 0x55 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (85 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BYTE: /* 0x56 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (86 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_CHAR: /* 0x57 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (87 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_SHORT: /* 0x58 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (88 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT: /* 0x59 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (89 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE: /* 0x5a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (90 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT: /* 0x5b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (91 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BOOLEAN: /* 0x5c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (92 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BYTE: /* 0x5d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (93 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_CHAR: /* 0x5e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (94 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_SHORT: /* 0x5f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (95 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET: /* 0x60 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (96 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE: /* 0x61 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (97 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT: /* 0x62 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (98 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BOOLEAN: /* 0x63 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (99 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BYTE: /* 0x64 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (100 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_CHAR: /* 0x65 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (101 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_SHORT: /* 0x66 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (102 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT: /* 0x67 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (103 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE: /* 0x68 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (104 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT: /* 0x69 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (105 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BOOLEAN: /* 0x6a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (106 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BYTE: /* 0x6b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (107 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_CHAR: /* 0x6c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (108 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_SHORT: /* 0x6d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (109 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL: /* 0x6e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (110 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER: /* 0x6f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (111 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT: /* 0x70 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (112 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC: /* 0x71 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (113 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE: /* 0x72 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (114 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_73: /* 0x73 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (115 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_RANGE: /* 0x74 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (116 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_RANGE: /* 0x75 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (117 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT_RANGE: /* 0x76 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (118 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC_RANGE: /* 0x77 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (119 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE_RANGE: /* 0x78 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (120 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_79: /* 0x79 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (121 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7A: /* 0x7a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (122 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_INT: /* 0x7b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (123 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOT_INT: /* 0x7c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (124 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_LONG: /* 0x7d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (125 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOT_LONG: /* 0x7e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (126 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_FLOAT: /* 0x7f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (127 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_DOUBLE: /* 0x80 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (128 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_LONG: /* 0x81 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (129 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_FLOAT: /* 0x82 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (130 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_DOUBLE: /* 0x83 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (131 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_INT: /* 0x84 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (132 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_FLOAT: /* 0x85 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (133 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_DOUBLE: /* 0x86 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (134 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_INT: /* 0x87 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (135 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_LONG: /* 0x88 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (136 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_DOUBLE: /* 0x89 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (137 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_INT: /* 0x8a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (138 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_LONG: /* 0x8b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (139 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_FLOAT: /* 0x8c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (140 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_BYTE: /* 0x8d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (141 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_CHAR: /* 0x8e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (142 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_SHORT: /* 0x8f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (143 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT: /* 0x90 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (144 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_INT: /* 0x91 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (145 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT: /* 0x92 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (146 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT: /* 0x93 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (147 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT: /* 0x94 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (148 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT: /* 0x95 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (149 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT: /* 0x96 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (150 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT: /* 0x97 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (151 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT: /* 0x98 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (152 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT: /* 0x99 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (153 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT: /* 0x9a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (154 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_LONG: /* 0x9b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (155 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_LONG: /* 0x9c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (156 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_LONG: /* 0x9d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (157 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_LONG: /* 0x9e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (158 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_LONG: /* 0x9f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (159 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_LONG: /* 0xa0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (160 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_LONG: /* 0xa1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (161 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_LONG: /* 0xa2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (162 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_LONG: /* 0xa3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (163 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_LONG: /* 0xa4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (164 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_LONG: /* 0xa5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (165 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_FLOAT: /* 0xa6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (166 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_FLOAT: /* 0xa7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (167 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_FLOAT: /* 0xa8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (168 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_FLOAT: /* 0xa9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (169 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_FLOAT: /* 0xaa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (170 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_DOUBLE: /* 0xab */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (171 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_DOUBLE: /* 0xac */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (172 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_DOUBLE: /* 0xad */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (173 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_DOUBLE: /* 0xae */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (174 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_DOUBLE: /* 0xaf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (175 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_2ADDR: /* 0xb0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (176 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_INT_2ADDR: /* 0xb1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (177 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_2ADDR: /* 0xb2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (178 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_2ADDR: /* 0xb3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (179 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_2ADDR: /* 0xb4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (180 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_2ADDR: /* 0xb5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (181 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_2ADDR: /* 0xb6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (182 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_2ADDR: /* 0xb7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (183 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT_2ADDR: /* 0xb8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (184 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT_2ADDR: /* 0xb9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (185 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT_2ADDR: /* 0xba */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (186 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_LONG_2ADDR: /* 0xbb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (187 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_LONG_2ADDR: /* 0xbc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (188 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_LONG_2ADDR: /* 0xbd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (189 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_LONG_2ADDR: /* 0xbe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (190 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_LONG_2ADDR: /* 0xbf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (191 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_LONG_2ADDR: /* 0xc0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (192 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_LONG_2ADDR: /* 0xc1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (193 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_LONG_2ADDR: /* 0xc2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (194 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_LONG_2ADDR: /* 0xc3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (195 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_LONG_2ADDR: /* 0xc4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (196 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_LONG_2ADDR: /* 0xc5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (197 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_FLOAT_2ADDR: /* 0xc6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (198 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_FLOAT_2ADDR: /* 0xc7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (199 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_FLOAT_2ADDR: /* 0xc8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (200 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_FLOAT_2ADDR: /* 0xc9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (201 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_FLOAT_2ADDR: /* 0xca */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (202 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_DOUBLE_2ADDR: /* 0xcb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (203 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_DOUBLE_2ADDR: /* 0xcc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (204 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_DOUBLE_2ADDR: /* 0xcd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (205 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_DOUBLE_2ADDR: /* 0xce */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (206 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_DOUBLE_2ADDR: /* 0xcf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (207 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_LIT16: /* 0xd0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (208 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RSUB_INT: /* 0xd1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (209 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_LIT16: /* 0xd2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (210 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_LIT16: /* 0xd3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (211 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_LIT16: /* 0xd4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (212 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_LIT16: /* 0xd5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (213 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_LIT16: /* 0xd6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (214 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_LIT16: /* 0xd7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (215 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_LIT8: /* 0xd8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (216 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RSUB_INT_LIT8: /* 0xd9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (217 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_LIT8: /* 0xda */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (218 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_LIT8: /* 0xdb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (219 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_LIT8: /* 0xdc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (220 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_LIT8: /* 0xdd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (221 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_LIT8: /* 0xde */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (222 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_LIT8: /* 0xdf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (223 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT_LIT8: /* 0xe0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (224 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT_LIT8: /* 0xe1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (225 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT_LIT8: /* 0xe2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (226 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_VOLATILE: /* 0xe3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (227 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_VOLATILE: /* 0xe4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (228 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_VOLATILE: /* 0xe5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (229 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_VOLATILE: /* 0xe6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (230 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_VOLATILE: /* 0xe7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (231 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_VOLATILE: /* 0xe8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (232 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_VOLATILE: /* 0xe9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (233 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_VOLATILE: /* 0xea */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (234 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_VOLATILE: /* 0xeb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (235 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_BREAKPOINT: /* 0xec */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (236 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW_VERIFICATION_ERROR: /* 0xed */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (237 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_EXECUTE_INLINE: /* 0xee */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (238 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_EXECUTE_INLINE_RANGE: /* 0xef */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (239 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_OBJECT_INIT_RANGE: /* 0xf0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (240 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_VOID_BARRIER: /* 0xf1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (241 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_QUICK: /* 0xf2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (242 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_QUICK: /* 0xf3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (243 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_QUICK: /* 0xf4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (244 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_QUICK: /* 0xf5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (245 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_QUICK: /* 0xf6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (246 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_QUICK: /* 0xf7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (247 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_QUICK: /* 0xf8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (248 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_QUICK_RANGE: /* 0xf9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (249 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_QUICK: /* 0xfa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (250 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_QUICK_RANGE: /* 0xfb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (251 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_VOLATILE: /* 0xfc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (252 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_VOLATILE: /* 0xfd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (253 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_VOLATILE: /* 0xfe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (254 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DISPATCH_FF: /* 0xff */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (255 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_CLASS_JUMBO: /* 0x100 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (256 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CHECK_CAST_JUMBO: /* 0x101 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (257 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INSTANCE_OF_JUMBO: /* 0x102 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (258 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_INSTANCE_JUMBO: /* 0x103 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (259 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_ARRAY_JUMBO: /* 0x104 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (260 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY_JUMBO: /* 0x105 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (261 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_JUMBO: /* 0x106 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (262 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_JUMBO: /* 0x107 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (263 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_JUMBO: /* 0x108 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (264 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BOOLEAN_JUMBO: /* 0x109 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (265 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BYTE_JUMBO: /* 0x10a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (266 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_CHAR_JUMBO: /* 0x10b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (267 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_SHORT_JUMBO: /* 0x10c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (268 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_JUMBO: /* 0x10d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (269 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_JUMBO: /* 0x10e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (270 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_JUMBO: /* 0x10f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (271 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BOOLEAN_JUMBO: /* 0x110 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (272 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BYTE_JUMBO: /* 0x111 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (273 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_CHAR_JUMBO: /* 0x112 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (274 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_SHORT_JUMBO: /* 0x113 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (275 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_JUMBO: /* 0x114 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (276 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_JUMBO: /* 0x115 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (277 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_JUMBO: /* 0x116 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (278 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BOOLEAN_JUMBO: /* 0x117 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (279 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BYTE_JUMBO: /* 0x118 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (280 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_CHAR_JUMBO: /* 0x119 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (281 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_SHORT_JUMBO: /* 0x11a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (282 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_JUMBO: /* 0x11b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (283 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_JUMBO: /* 0x11c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (284 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_JUMBO: /* 0x11d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (285 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BOOLEAN_JUMBO: /* 0x11e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (286 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BYTE_JUMBO: /* 0x11f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (287 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_CHAR_JUMBO: /* 0x120 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (288 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_SHORT_JUMBO: /* 0x121 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (289 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_JUMBO: /* 0x122 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (290 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_JUMBO: /* 0x123 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (291 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT_JUMBO: /* 0x124 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (292 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC_JUMBO: /* 0x125 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (293 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE_JUMBO: /* 0x126 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (294 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_27FF: /* 0x127 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (295 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_28FF: /* 0x128 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (296 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_29FF: /* 0x129 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (297 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2AFF: /* 0x12a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (298 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2BFF: /* 0x12b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (299 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2CFF: /* 0x12c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (300 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2DFF: /* 0x12d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (301 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2EFF: /* 0x12e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (302 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2FFF: /* 0x12f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (303 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_30FF: /* 0x130 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (304 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_31FF: /* 0x131 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (305 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_32FF: /* 0x132 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (306 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_33FF: /* 0x133 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (307 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_34FF: /* 0x134 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (308 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_35FF: /* 0x135 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (309 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_36FF: /* 0x136 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (310 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_37FF: /* 0x137 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (311 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_38FF: /* 0x138 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (312 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_39FF: /* 0x139 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (313 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3AFF: /* 0x13a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (314 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3BFF: /* 0x13b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (315 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3CFF: /* 0x13c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (316 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3DFF: /* 0x13d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (317 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3EFF: /* 0x13e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (318 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3FFF: /* 0x13f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (319 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_40FF: /* 0x140 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (320 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_41FF: /* 0x141 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (321 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_42FF: /* 0x142 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (322 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_43FF: /* 0x143 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (323 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_44FF: /* 0x144 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (324 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_45FF: /* 0x145 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (325 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_46FF: /* 0x146 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (326 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_47FF: /* 0x147 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (327 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_48FF: /* 0x148 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (328 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_49FF: /* 0x149 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (329 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4AFF: /* 0x14a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (330 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4BFF: /* 0x14b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (331 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4CFF: /* 0x14c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (332 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4DFF: /* 0x14d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (333 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4EFF: /* 0x14e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (334 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4FFF: /* 0x14f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (335 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_50FF: /* 0x150 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (336 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_51FF: /* 0x151 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (337 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_52FF: /* 0x152 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (338 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_53FF: /* 0x153 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (339 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_54FF: /* 0x154 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (340 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_55FF: /* 0x155 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (341 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_56FF: /* 0x156 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (342 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_57FF: /* 0x157 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (343 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_58FF: /* 0x158 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (344 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_59FF: /* 0x159 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (345 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5AFF: /* 0x15a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (346 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5BFF: /* 0x15b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (347 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5CFF: /* 0x15c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (348 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5DFF: /* 0x15d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (349 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5EFF: /* 0x15e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (350 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5FFF: /* 0x15f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (351 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_60FF: /* 0x160 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (352 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_61FF: /* 0x161 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (353 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_62FF: /* 0x162 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (354 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_63FF: /* 0x163 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (355 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_64FF: /* 0x164 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (356 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_65FF: /* 0x165 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (357 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_66FF: /* 0x166 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (358 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_67FF: /* 0x167 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (359 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_68FF: /* 0x168 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (360 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_69FF: /* 0x169 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (361 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6AFF: /* 0x16a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (362 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6BFF: /* 0x16b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (363 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6CFF: /* 0x16c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (364 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6DFF: /* 0x16d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (365 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6EFF: /* 0x16e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (366 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6FFF: /* 0x16f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (367 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_70FF: /* 0x170 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (368 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_71FF: /* 0x171 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (369 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_72FF: /* 0x172 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (370 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_73FF: /* 0x173 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (371 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_74FF: /* 0x174 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (372 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_75FF: /* 0x175 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (373 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_76FF: /* 0x176 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (374 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_77FF: /* 0x177 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (375 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_78FF: /* 0x178 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (376 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_79FF: /* 0x179 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (377 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7AFF: /* 0x17a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (378 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7BFF: /* 0x17b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (379 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7CFF: /* 0x17c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (380 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7DFF: /* 0x17d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (381 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7EFF: /* 0x17e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (382 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7FFF: /* 0x17f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (383 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_80FF: /* 0x180 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (384 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_81FF: /* 0x181 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (385 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_82FF: /* 0x182 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (386 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_83FF: /* 0x183 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (387 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_84FF: /* 0x184 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (388 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_85FF: /* 0x185 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (389 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_86FF: /* 0x186 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (390 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_87FF: /* 0x187 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (391 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_88FF: /* 0x188 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (392 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_89FF: /* 0x189 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (393 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8AFF: /* 0x18a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (394 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8BFF: /* 0x18b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (395 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8CFF: /* 0x18c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (396 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8DFF: /* 0x18d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (397 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8EFF: /* 0x18e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (398 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8FFF: /* 0x18f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (399 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_90FF: /* 0x190 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (400 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_91FF: /* 0x191 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (401 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_92FF: /* 0x192 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (402 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_93FF: /* 0x193 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (403 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_94FF: /* 0x194 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (404 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_95FF: /* 0x195 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (405 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_96FF: /* 0x196 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (406 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_97FF: /* 0x197 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (407 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_98FF: /* 0x198 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (408 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_99FF: /* 0x199 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (409 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9AFF: /* 0x19a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (410 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9BFF: /* 0x19b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (411 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9CFF: /* 0x19c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (412 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9DFF: /* 0x19d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (413 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9EFF: /* 0x19e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (414 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9FFF: /* 0x19f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (415 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A0FF: /* 0x1a0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (416 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A1FF: /* 0x1a1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (417 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A2FF: /* 0x1a2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (418 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A3FF: /* 0x1a3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (419 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A4FF: /* 0x1a4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (420 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A5FF: /* 0x1a5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (421 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A6FF: /* 0x1a6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (422 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A7FF: /* 0x1a7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (423 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A8FF: /* 0x1a8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (424 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A9FF: /* 0x1a9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (425 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AAFF: /* 0x1aa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (426 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ABFF: /* 0x1ab */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (427 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ACFF: /* 0x1ac */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (428 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ADFF: /* 0x1ad */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (429 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AEFF: /* 0x1ae */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (430 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AFFF: /* 0x1af */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (431 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B0FF: /* 0x1b0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (432 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B1FF: /* 0x1b1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (433 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B2FF: /* 0x1b2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (434 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B3FF: /* 0x1b3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (435 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B4FF: /* 0x1b4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (436 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B5FF: /* 0x1b5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (437 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B6FF: /* 0x1b6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (438 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B7FF: /* 0x1b7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (439 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B8FF: /* 0x1b8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (440 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B9FF: /* 0x1b9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (441 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BAFF: /* 0x1ba */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (442 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BBFF: /* 0x1bb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (443 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BCFF: /* 0x1bc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (444 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BDFF: /* 0x1bd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (445 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BEFF: /* 0x1be */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (446 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BFFF: /* 0x1bf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (447 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C0FF: /* 0x1c0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (448 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C1FF: /* 0x1c1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (449 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C2FF: /* 0x1c2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (450 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C3FF: /* 0x1c3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (451 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C4FF: /* 0x1c4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (452 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C5FF: /* 0x1c5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (453 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C6FF: /* 0x1c6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (454 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C7FF: /* 0x1c7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (455 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C8FF: /* 0x1c8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (456 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C9FF: /* 0x1c9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (457 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CAFF: /* 0x1ca */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (458 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CBFF: /* 0x1cb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (459 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CCFF: /* 0x1cc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (460 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CDFF: /* 0x1cd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (461 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CEFF: /* 0x1ce */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (462 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CFFF: /* 0x1cf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (463 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D0FF: /* 0x1d0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (464 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D1FF: /* 0x1d1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (465 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D2FF: /* 0x1d2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (466 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D3FF: /* 0x1d3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (467 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D4FF: /* 0x1d4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (468 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D5FF: /* 0x1d5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (469 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D6FF: /* 0x1d6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (470 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D7FF: /* 0x1d7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (471 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D8FF: /* 0x1d8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (472 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D9FF: /* 0x1d9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (473 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DAFF: /* 0x1da */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (474 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DBFF: /* 0x1db */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (475 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DCFF: /* 0x1dc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (476 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DDFF: /* 0x1dd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (477 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DEFF: /* 0x1de */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (478 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DFFF: /* 0x1df */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (479 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E0FF: /* 0x1e0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (480 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E1FF: /* 0x1e1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (481 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E2FF: /* 0x1e2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (482 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E3FF: /* 0x1e3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (483 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E4FF: /* 0x1e4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (484 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E5FF: /* 0x1e5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (485 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E6FF: /* 0x1e6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (486 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E7FF: /* 0x1e7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (487 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E8FF: /* 0x1e8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (488 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E9FF: /* 0x1e9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (489 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EAFF: /* 0x1ea */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (490 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EBFF: /* 0x1eb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (491 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ECFF: /* 0x1ec */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (492 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EDFF: /* 0x1ed */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (493 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EEFF: /* 0x1ee */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (494 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EFFF: /* 0x1ef */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (495 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_F0FF: /* 0x1f0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (496 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_F1FF: /* 0x1f1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (497 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_OBJECT_INIT_JUMBO: /* 0x1f2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (498 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_VOLATILE_JUMBO: /* 0x1f3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (499 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_VOLATILE_JUMBO: /* 0x1f4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (500 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_VOLATILE_JUMBO: /* 0x1f5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (501 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_VOLATILE_JUMBO: /* 0x1f6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (502 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_VOLATILE_JUMBO: /* 0x1f7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (503 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_VOLATILE_JUMBO: /* 0x1f8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (504 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_VOLATILE_JUMBO: /* 0x1f9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (505 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_VOLATILE_JUMBO: /* 0x1fa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (506 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_VOLATILE_JUMBO: /* 0x1fb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (507 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_VOLATILE_JUMBO: /* 0x1fc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (508 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_VOLATILE_JUMBO: /* 0x1fd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (509 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_VOLATILE_JUMBO: /* 0x1fe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (510 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW_VERIFICATION_ERROR_JUMBO: /* 0x1ff */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (511 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
.balign 64
.size dvmAsmAltInstructionStart, .-dvmAsmAltInstructionStart
.global dvmAsmAltInstructionEnd
dvmAsmAltInstructionEnd:
/* File: armv5te/footer.S */
-
/*
* ===========================================================================
* Common subroutines and data
* ===========================================================================
*/
-
-
.text
.align 2
#if defined(WITH_JIT)
+
#if defined(WITH_SELF_VERIFICATION)
+/*
+ * "longjmp" to a translation after single-stepping. Before returning
+ * to translation, must save state for self-verification.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r10, [rSELF,#offThread_jitResumeNPC] @ resume address
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ b jitSVShadowRunStart @ resume as if cache hit
+ @ expects resume addr in r10
+
.global dvmJitToInterpPunt
dvmJitToInterpPunt:
mov r2,#kSVSPunt @ r2<- interpreter entry point
@@ -20928,11 +26236,15 @@
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
+ mov rPC, r0 @ set up dalvik pc
+ EXPORT_PC()
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
mov r2,#kSVSSingleStep @ r2<- interpreter entry point
b jitSVShadowRunEnd @ doesn't return
+
.global dvmJitToInterpNoChainNoProfile
dvmJitToInterpNoChainNoProfile:
mov r0,rPC @ pass our target PC
@@ -20981,6 +26293,21 @@
str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land
b jitSVShadowRunEnd @ doesn't return
#else
+
+/*
+ * "longjmp" to a translation after single-stepping.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r0, [rSELF,#offThread_jitResumeNPC]
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ bx r0 @ resume translation
+
/*
* Return from the translation cache to the interpreter when the compiler is
* having issues translating/executing a Dalvik instruction. We have to skip
@@ -21005,26 +26332,33 @@
/*
* Return to the interpreter to handle a single instruction.
+ * We'll use the normal single-stepping mechanism via interpBreak,
+ * but also save the native pc of the resume point in the translation
+ * and the native sp so that we can later do the equivalent of a
+ * longjmp() to resume.
* On entry:
- * r0 <= PC
- * r1 <= PC of resume instruction
+ * dPC <= Dalvik PC of instrucion to interpret
* lr <= resume point in translation
+ * r1 <= Dalvik PC of next instruction
*/
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
- mov r1,#kInterpEntryInstr
- @ enum is 4 byte in aapcs-EABI
- str r1, [rSELF, #offThread_entryPoint]
- mov rPC,r0
+ mov rPC, r0 @ set up dalvik pc
EXPORT_PC()
-
- ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- mov r2,#kJitSingleStep @ Ask for single step and then revert
- str r2,[rSELF,#offThread_jitState]
- mov r1,#1 @ set changeInterp to bail to debug interp
- b common_gotoBail
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
+ mov r1, #1
+ str r1, [rSELF,#offThread_singleStepCount] @ just step once
+ mov r0, rSELF
+ mov r1, #kInterpSingleStep
+ mov r2, #kSubModeNormal
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
+ ldr rIBASE, [rSELF,#offThread_curHandlerTable]
+ FETCH_INST()
+ GET_INST_OPCODE(ip)
+ GOTO_OPCODE(ip)
/*
* Return from the translation cache and immediately request
@@ -21036,7 +26370,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21055,7 +26390,8 @@
add rINST,lr,#-5 @ save start of chain branch
add rINST, #-4 @ .. which is 9 bytes back
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq 2f
@@ -21070,7 +26406,7 @@
/* No translation, so request one if profiling isn't disabled*/
2:
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
cmp r0, #0
movne r2,#kJitTSelectRequestHot @ ask for trace selection
@@ -21101,7 +26437,8 @@
bl dvmBumpNormal
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq toInterpreter @ go if not, otherwise do chain
@@ -21123,7 +26460,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21145,7 +26483,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21163,21 +26502,27 @@
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
FETCH_INST()
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@ NOTE: intended fallthrough
/*
- * Common code to update potential trace start counter, and initiate
- * a trace-build if appropriate. On entry, rPC should point to the
- * next instruction to execute, and rINST should be already loaded with
- * the next opcode word, and r0 holds a pointer to the jit profile
- * table (pJitProfTable).
+ * Similar to common_updateProfile, but tests for null pJitProfTable
+ * r0 holds pJifProfTAble, rINST is loaded, rPC is current and
+ * rIBASE has been recently refreshed.
*/
common_testUpdateProfile:
- cmp r0,#0
- GET_INST_OPCODE(ip)
- GOTO_OPCODE_IFEQ(ip) @ if not profiling, fallthrough otherwise */
+ cmp r0, #0 @ JIT switched off?
+ beq 4f @ return to interp if so
+/*
+ * Common code to update potential trace start counter, and initiate
+ * a trace-build if appropriate.
+ * On entry here:
+ * r0 <= pJitProfTable (verified non-NULL)
+ * rPC <= Dalvik PC
+ * rINST <= next instruction
+ */
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
@@ -21187,18 +26532,13 @@
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
-/*
- * Here, we switch to the debug interpreter to request
- * trace selection. First, though, check to see if there
- * is already a native translation in place (and, if so,
- * jump to it now).
- */
-
- GET_JIT_THRESHOLD(r1)
+ /* Looks good, reset the counter */
+ ldr r1, [rSELF, #offThread_jitThreshold]
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
- bl dvmJitGetTraceAddr @ r0<- dvmJitGetTraceAddr(rPC)
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21229,15 +26569,30 @@
/*
* On entry:
- * r2 is jit state, e.g. kJitTSelectRequest or kJitTSelectRequestHot
+ * r2 is jit state.
*/
common_selectTrace:
-
+ ldrb r0,[rSELF,#offThread_breakFlags]
+ ands r0,#kInterpJitBreak
+ bne 3f @ already doing JIT work, continue
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
+ mov r0, rSELF
+/*
+ * Call out to validate trace-building request. If successful,
+ * rIBASE will be swapped to to send us into single-stepping trace
+ * building mode, so we need to refresh before we continue.
+ */
+ EXPORT_PC()
+ SAVE_PC_FP_TO_SELF() @ copy of pc/fp to Thread
+ bl dvmJitCheckTraceRequest
+3:
+ FETCH_INST()
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+4:
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip)
+ /* no return */
+#endif
#if defined(WITH_SELF_VERIFICATION)
/*
@@ -21259,23 +26614,27 @@
/*
* Restore PC, registers, and interpreter state to original values
* before jumping back to the interpreter.
+ * On entry:
+ * r0: dPC
+ * r2: self verification state
*/
jitSVShadowRunEnd:
mov r1,rFP @ pass ending fp
mov r3,rSELF @ pass self ptr for convenience
bl dvmSelfVerificationRestoreState @ restore pc and fp values
- ldr rPC,[rSELF,#offThread_pc] @ restore PC
- ldr rFP,[rSELF,#offThread_fp] @ restore FP
+ LOAD_PC_FP_FROM_SELF() @ restore pc, fp
ldr r1,[r0,#offShadowSpace_svState] @ get self verification state
cmp r1,#0 @ check for punt condition
beq 1f
+ @ Set up SV single-stepping
+ mov r0, rSELF
+ mov r1, #kInterpJitBreak
+ mov r2, #kSubModeJitSV
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
mov r2,#kJitSelfVerification @ ask for self verification
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
-
+ @ intentional fallthrough
1: @ exit to interpreter without check
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@@ -21284,133 +26643,32 @@
GOTO_OPCODE(ip)
#endif
-#endif
-
-/*
- * Common code when a backward branch is taken.
- *
- * TODO: we could avoid a branch by just setting r0 and falling through
- * into the common_periodicChecks code, and having a test on r0 at the
- * end determine if we should return to the caller or update & branch to
- * the next instr.
- *
- * On entry:
- * r9 is PC adjustment *in bytes*
- */
-common_backwardBranch:
- mov r0, #kInterpEntryInstr
- bl common_periodicChecks
-#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip)
- GOTO_OPCODE(ip)
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#endif
-
-
-/*
- * Need to see if the thread needs to be suspended or debugger/profiler
- * activity has begun. If so, we suspend the thread or side-exit to
- * the debug interpreter as appropriate.
- *
- * The common case is no activity on any of these, so we want to figure
- * that out quickly. If something is up, we can then sort out what.
- *
- * We want to be fast if the VM was built without debugger or profiler
- * support, but we also need to recognize that the system is usually
- * shipped with both of these enabled.
- *
- * TODO: reduce this so we're just checking a single location.
- *
- * On entry:
- * r0 is reentry type, e.g. kInterpEntryInstr (for debugger/profiling)
- * r9 is trampoline PC adjustment *in bytes*
- */
-common_periodicChecks:
-/* TUNING - make this a direct load when interpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r3<- &interpBreak
- /* speculatively thread-specific suspend count */
- ldr ip, [rSELF, #offThread_suspendCount]
- ldr r1, [r1] @ r1<- interpBreak
- cmp r1, #0 @ anything unusual?
- bxeq lr @ return if not
- /*
- * One or more interesting events have happened. Figure out what.
- *
- * r0 still holds the reentry type.
- */
- cmp ip, #0 @ want suspend?
- beq 3f @ no, must be something else
-
- stmfd sp!, {r0, lr} @ preserve r0 and lr
-#if defined(WITH_JIT)
- /*
- * Refresh the Jit's cached copy of profile table pointer. This pointer
- * doubles as the Jit's on/off switch.
- */
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ r3<-&gDvmJit.pJitProfTable
- mov r0, rSELF @ r0<- self
- ldr r3, [r3] @ r3 <- pJitProfTable
- EXPORT_PC() @ need for precise GC
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh Jit's on/off switch
-#else
- mov r0, rSELF @ r0<- self
- EXPORT_PC() @ need for precise GC
-#endif
- bl dvmCheckSuspendPending @ do full check, suspend if necessary
- ldmfd sp!, {r0, lr} @ restore r0 and lr
-
- /*
- * Reload the interpBreak flags - they may have changed while we
- * were suspended.
- */
-/* TUNING - direct load when InterpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r1<- &interpBreak
- ldr r1, [r1] @ r1<- interpBreak
-3:
- /*
- * TODO: this code is too fragile. Need a general mechanism
- * to identify what actions to take by submode. Some profiling modes
- * (instruction count) need to single-step, while method tracing
- * may not. Debugging with breakpoints can run unfettered, but
- * source-level single-stepping requires Dalvik singlestepping.
- * GC may require a one-shot action and then full-speed resumption.
- */
- ands r1, #(kSubModeDebuggerActive | kSubModeEmulatorTrace | kSubModeInstCounting)
- bxeq lr @ nothing to do, return
-
- @ debugger/profiler enabled, bail out; self->entryPoint was set above
- str r0, [rSELF, #offThread_entryPoint] @ store r0, need for debug/prof
- add rPC, rPC, r9 @ update rPC
- mov r1, #1 @ "want switch" = true
- b common_gotoBail @ side exit
-
-
/*
* The equivalent of "goto bail", this calls through the "bail handler".
+ * It will end this interpreter activation, and return to the caller
+ * of dvmMterpStdRun.
*
- * State registers will be saved to the "thread" area before bailing.
- *
- * On entry:
- * r1 is "bool changeInterp", indicating if we want to switch to the
- * other interpreter or just bail all the way out
+ * State registers will be saved to the "thread" area before bailing
+ * debugging purposes
*/
common_gotoBail:
SAVE_PC_FP_TO_SELF() @ export state to "thread"
mov r0, rSELF @ r0<- self ptr
b dvmMterpStdBail @ call(self, changeInterp)
- @add r1, r1, #1 @ using (boolean+1)
- @add r0, rSELF, #offThread_jmpBuf @ r0<- &self->jmpBuf
- @bl _longjmp @ does not return
- @bl common_abort
-
+/*
+ * The JIT's invoke method needs to remember the callsite class and
+ * target pair. Save them here so that they are available to
+ * dvmCheckJit following the interpretation of this invoke.
+ */
+#if defined(WITH_JIT)
+save_callsiteinfo:
+ cmp r9, #0
+ ldrne r9, [r9, #offObject_clazz]
+ str r0, [rSELF, #offThread_methodToCall]
+ str r9, [rSELF, #offThread_callsiteClass]
+ bx lr
+#endif
/*
* Common code for jumbo method invocation.
@@ -21418,12 +26676,20 @@
* As a result, the savedPc in the stack frame will not be wholly accurate. So
* long as that is only used for source file line number calculations, we're
* okay.
- *
- * On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
*/
+common_invokeMethodJumboNoThis:
+#if defined(WITH_JIT)
+ /* On entry: r0 is "Method* methodToCall */
+ mov r9, #0 @ clear "this"
+#endif
common_invokeMethodJumbo:
+ /* On entry: r0 is "Method* methodToCall, r9 is "this" */
.LinvokeNewJumbo:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
add rPC, rPC, #4 @ adjust pc to make return consistent
FETCH(r2, 1) @ r2<- BBBB (arg count)
@@ -21437,10 +26703,15 @@
* Common code for method invocation with range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodRange:
.LinvokeNewRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #8 @ r2<- AA (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -21462,10 +26733,15 @@
* Common code for method invocation without range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodNoRange:
.LinvokeNewNoRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #12 @ r2<- B (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -21512,12 +26788,11 @@
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
sub r3, r10, r3, lsl #2 @ r3<- bottom (newsave - outsSize)
cmp r3, r9 @ bottom < interpStackEnd?
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r3, [r0, #offMethod_accessFlags] @ r3<- methodToCall->accessFlags
blo .LstackOverflow @ yes, this frame will overflow stack
@ set up newSaveArea
- ldr lr, [lr] @ lr<- active submodes
#ifdef EASY_GDB
SAVEAREA_FROM_FP(ip, rFP) @ ip<- stack save area
str ip, [r10, #offStackSaveArea_prevSave]
@@ -21528,15 +26803,12 @@
mov r9, #0
str r9, [r10, #offStackSaveArea_returnAddr]
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 1f @ skip if not
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r1, rSELF
- @ r0=methodToCall, r1=rSELF
- bl dvmFastMethodTraceEnter
- ldmfd sp!, {r0-r3} @ restore r0-r3
-1:
str r0, [r10, #offStackSaveArea_method]
+
+ @ Profiling?
+ cmp lr, #0 @ any special modes happening?
+ bne 2f @ go if so
+1:
tst r3, #ACC_NATIVE
bne .LinvokeNative
@@ -21563,8 +26835,10 @@
@ r0=methodToCall, r1=newFp, r3=newMethodClass, r9=newINST
str r0, [rSELF, #offThread_method] @ self->method = methodToCall
str r3, [rSELF, #offThread_methodClassDex] @ self->methodClassDex = ...
+ mov r2, #1
+ str r2, [rSELF, #offThread_debugIsMethodEntry]
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
mov rFP, r1 @ fp = newFp
GET_PREFETCHED_OPCODE(ip, r9) @ extract prefetched opcode from r9
mov rINST, r9 @ publish new rINST
@@ -21580,15 +26854,22 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+2:
+ @ Profiling - record method entry. r0: methodToCall
+ stmfd sp!, {r0-r3} @ preserve r0-r3
+ mov r1, r0
+ mov r0, rSELF
+ bl dvmReportInvoke @ (self, method)
+ ldmfd sp!, {r0-r3} @ restore r0-r3
+ b 1b
+
.LinvokeNative:
@ Prep for the native call
@ r0=methodToCall, r1=newFp, r10=newSaveArea
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r9, [rSELF, #offThread_jniLocal_topCookie]@r9<-thread->localRef->...
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r10, #offStackSaveArea_localRefCookie] @newFp->localRefCookie=top
- ldr lr, [lr] @ lr<- active submodes
-
mov r2, r0 @ r2<- methodToCall
mov r0, r1 @ r0<- newFp (points to args)
add r1, rSELF, #offThread_retval @ r1<- &retval
@@ -21605,45 +26886,45 @@
.Lskip:
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- bne 330f @ hop if so
+ cmp lr, #0 @ any special SubModes active?
+ bne 11f @ go handle them if so
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
-220:
-#if defined(WITH_JIT)
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ Refresh Jit's on/off status
-#endif
+7:
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved top
ldr r1, [rSELF, #offThread_exception] @ check for exception
-#if defined(WITH_JIT)
- ldr r3, [r3] @ r3 <- gDvmJit.pProfTable
-#endif
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
-#if defined(WITH_JIT)
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh cached on/off switch
-#endif
bne common_exceptionThrown @ no, handle exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-330:
- @ r2=JNIMethod, r6=rSELF
- stmfd sp!, {r2,r6}
+11:
+ @ r0=newFp, r1=&retval, r2=methodToCall, r3=self, lr=subModes
+ stmfd sp!, {r0-r3} @ save all but subModes
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPreNativeInvoke @ (pc, self, methodToCall)
+ ldmfd sp, {r0-r3} @ refresh. NOTE: no sp autoincrement
+ @ Call the native method
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
- @ r0=JNIMethod, r1=rSELF
- ldmfd sp!, {r0-r1}
- bl dvmFastNativeMethodTraceExit
- b 220b
+ @ Restore the pre-call arguments
+ ldmfd sp!, {r0-r3} @ r2<- methodToCall (others unneeded)
+
+ @ Finish up any post-invoke subMode requirements
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPostNativeInvoke @ (pc, self, methodToCall)
+ b 7b @ resume
.LstackOverflow: @ r0=methodToCall
mov r1, r0 @ r1<- methodToCall
@@ -21691,37 +26972,27 @@
*/
common_returnFromMethod:
.LreturnNew:
- mov r0, #kInterpEntryReturn
- mov r9, #0
- bl common_periodicChecks
-
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r0, rFP)
- ldr lr, [lr] @ lr<- active submodes
ldr r9, [r0, #offStackSaveArea_savedPc] @ r9 = saveArea->savedPc
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 333f
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r0, rSELF
- @ r0=rSELF
- bl dvmFastJavaMethodTraceExit
- ldmfd sp!, {r0-r3} @ restore r0-r3
-333:
+ cmp lr, #0 @ any special subMode handling needed?
+ bne 19f
+14:
ldr rFP, [r0, #offStackSaveArea_prevFrame] @ fp = saveArea->prevFrame
ldr r2, [rFP, #(offStackSaveArea_method - sizeofStackSaveArea)]
@ r2<- method we're returning to
cmp r2, #0 @ is this a break frame?
#if defined(WORKAROUND_CORTEX_A9_745320)
/* Don't use conditional loads if the HW defect exists */
- beq 101f
+ beq 15f
ldr r10, [r2, #offMethod_clazz] @ r10<- method->clazz
-101:
+15:
#else
ldrne r10, [r2, #offMethod_clazz] @ r10<- method->clazz
#endif
- mov r1, #0 @ "want switch" = false
beq common_gotoBail @ break frame, bail out completely
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
PREFETCH_ADVANCE_INST(rINST, r9, 3) @ advance r9, update new rINST
str r2, [rSELF, #offThread_method]@ self->method = newSave->method
ldr r1, [r10, #offClassObject_pDvmDex] @ r1<- method->clazz->pDvmDex
@@ -21742,6 +27013,16 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+19:
+ @ Handle special actions
+ @ On entry, r0: StackSaveArea
+ ldr r2, [r0, #offStackSaveArea_prevFrame] @ r2<- prevFP
+ mov r1, rPC
+ mov r0, rSELF
+ bl dvmReportReturn @ (self, pc, prevFP)
+ SAVEAREA_FROM_FP(r0, rFP) @ restore StackSaveArea
+ b 14b @ continue
+
/*
* Return handling, calls through "glue code".
*/
@@ -21767,17 +27048,24 @@
dvmMterpCommonExceptionThrown:
common_exceptionThrown:
.LexceptionNew:
- mov r0, #kInterpEntryThrow
- mov r9, #0
- bl common_periodicChecks
+
+ EXPORT_PC()
+
+ mov r0, rSELF
+ bl dvmCheckSuspendPending
ldr r9, [rSELF, #offThread_exception] @ r9<- self->exception
mov r1, rSELF @ r1<- self
mov r0, r9 @ r0<- exception
bl dvmAddTrackedAlloc @ don't let the exception be GCed
+ ldrb r2, [rSELF, #offThread_subMode] @ get subMode flags
mov r3, #0 @ r3<- NULL
str r3, [rSELF, #offThread_exception] @ self->exception = NULL
+ @ Special subMode?
+ cmp r2, #0 @ any special subMode handling needed?
+ bne 7f @ go if so
+8:
/* set up args and a local for "&fp" */
/* (str sp, [sp, #-4]! would be perfect here, but is discouraged) */
str rFP, [sp, #-4]! @ *--sp = fp
@@ -21787,6 +27075,7 @@
ldr r1, [rSELF, #offThread_method] @ r1<- self->method
mov r0, rSELF @ r0<- self
ldr r1, [r1, #offMethod_insns] @ r1<- method->insns
+ ldrb lr, [rSELF, #offThread_subMode] @ lr<- subMode flags
mov r2, r9 @ r2<- exception
sub r1, rPC, r1 @ r1<- pc - method->insns
mov r1, r1, asr #1 @ r1<- offset in code units
@@ -21827,12 +27116,22 @@
bl dvmReleaseTrackedAlloc @ release the exception
/* restore the exception if the handler wants it */
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp ip, #OP_MOVE_EXCEPTION @ is it "move-exception"?
streq r9, [rSELF, #offThread_exception] @ yes, restore the exception
GOTO_OPCODE(ip) @ jump to next instruction
+ @ Manage debugger bookkeeping
+7:
+ mov r0, rSELF @ arg0<- self
+ ldr r1, [rSELF, #offThread_method] @ arg1<- curMethod
+ mov r2, rPC @ arg2<- pc
+ mov r3, rFP @ arg3<- fp
+ bl dvmReportExceptionThrow @ (self, method, pc, fp)
+ b 8b @ resume with normal handling
+
.LnotCaughtLocally: @ r9=exception
/* fix stack overflow if necessary */
ldrb r1, [rSELF, #offThread_stackOverflowed]
@@ -21869,7 +27168,6 @@
mov r0, r9 @ r0<- exception
mov r1, rSELF @ r1<- self
bl dvmReleaseTrackedAlloc @ release the exception
- mov r1, #0 @ "want switch" = false
b common_gotoBail @ bail out
@@ -21884,6 +27182,30 @@
b common_resumeAfterGlueCall
.endif
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including the current
+ * instruction.
+ *
+ * On entry:
+ * r10: &dvmDex->pResFields[field]
+ * r0: field pointer (must preserve)
+ */
+common_verifyField:
+ ldrb r3, [rSELF, #offThread_subMode] @ r3 <- submode byte
+ ands r3, #kSubModeJitTraceBuild
+ bxeq lr @ Not building trace, continue
+ ldr r1, [r10] @ r1<- reload resolved StaticField ptr
+ cmp r1, #0 @ resolution complete?
+ bxne lr @ yes, continue
+ stmfd sp!, {r0-r2,lr} @ save regs
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self,pc) end trace before this inst
+ ldmfd sp!, {r0-r2, lr}
+ bx lr @ return
+#endif
/*
* After returning from a "glued" function, pull out the updated
@@ -21891,6 +27213,7 @@
*/
common_resumeAfterGlueCall:
LOAD_PC_FP_FROM_SELF() @ pull rPC and rFP out of thread
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/out/InterpAsm-armv5te.S b/vm/mterp/out/InterpAsm-armv5te.S
index 3f58760..fc4b638 100644
--- a/vm/mterp/out/InterpAsm-armv5te.S
+++ b/vm/mterp/out/InterpAsm-armv5te.S
@@ -138,7 +138,7 @@
* rPC to point to the next instruction. "_reg" must specify the distance
* in bytes, *not* 16-bit code units, and may be a signed value.
*
- * We want to write "ldrh rINST, [rPC, _reg, lsl #2]!", but some of the
+ * We want to write "ldrh rINST, [rPC, _reg, lsl #1]!", but some of the
* bits that hold the shift distance are used for the half/byte/sign flags.
* In some cases we can pre-double _reg for free, so we require a byte offset
* here.
@@ -176,6 +176,7 @@
* interpreter, we don't have to worry about pre-ARMv5 THUMB interwork.
*/
#define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6
+#define GOTO_OPCODE_BASE(_base,_reg) add pc, _base, _reg, lsl #6
#define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6
#define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6
@@ -185,11 +186,6 @@
#define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2]
#define SET_VREG(_reg, _vreg) str _reg, [rFP, _vreg, lsl #2]
-#if defined(WITH_JIT)
-#define GET_JIT_PROF_TABLE(_reg) ldr _reg,[rSELF,#offThread_pJitProfTable]
-#define GET_JIT_THRESHOLD(_reg) ldr _reg,[rSELF,#offThread_jitThreshold]
-#endif
-
/*
* Convert a virtual register index into an address.
*/
@@ -268,8 +264,7 @@
* On entry:
* r0 Thread* self
*
- * This function returns a boolean "changeInterp" value. The return comes
- * via a call to dvmMterpStdBail().
+ * The return comes via a call to dvmMterpStdBail().
*/
dvmMterpStdRun:
#define MTERP_ENTRY1 \
@@ -288,16 +283,13 @@
/* set up "named" registers, figure out entry point */
mov rSELF, r0 @ set rSELF
- ldr r1, [r0, #offThread_entryPoint] @ enum is 4 bytes in aapcs-EABI
LOAD_PC_FP_FROM_SELF() @ load rPC and rFP from "thread"
ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ set rIBASE
- cmp r1, #kInterpEntryInstr @ usual case?
- bne .Lnot_instr @ no, handle it
#if defined(WITH_JIT)
.LentryInstr:
/* Entry is always a possible trace start */
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
mov r1, #0 @ prepare the value for the new state
str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land
@@ -325,33 +317,6 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
-.Lnot_instr:
- cmp r1, #kInterpEntryReturn @ were we returning from a method?
- beq common_returnFromMethod
-
-.Lnot_return:
- cmp r1, #kInterpEntryThrow @ were we throwing an exception?
- beq common_exceptionThrown
-
-#if defined(WITH_JIT)
-.Lnot_throw:
- ldr r10,[rSELF, #offThread_jitResumeNPC]
- ldr r2,[rSELF, #offThread_jitResumeDPC]
- cmp r1, #kInterpEntryResume @ resuming after Jit single-step?
- bne .Lbad_arg
- cmp rPC,r2
- bne .LentryInstr @ must have branched, don't resume
-#if defined(WITH_SELF_VERIFICATION)
- @ self->entryPoint will be set in dvmSelfVerificationSaveState
- b jitSVShadowRunStart @ re-enter the translation after the
- @ single-stepped instruction
- @noreturn
-#endif
- mov r1, #kInterpEntryInstr
- str r1, [rSELF, #offThread_entryPoint]
- bx r10 @ re-enter the translation
-#endif
-
.Lbad_arg:
ldr r0, strBadEntryPoint
@ r1 holds value of entryPoint
@@ -375,11 +340,9 @@
*
* On entry:
* r0 Thread* self
- * r1 bool changeInterp
*/
dvmMterpStdBail:
- ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
- mov r0, r1 @ return the changeInterp value
+ ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
add sp, sp, #4 @ un-align 64
ldmfd sp!, {r4-r10,fp,pc} @ restore 9 regs and return
@@ -970,6 +933,9 @@
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .LOP_NEW_INSTANCE_resolve @ no, resolve it now
@@ -1110,22 +1076,19 @@
* double to get a byte offset.
*/
/* goto +AA */
+ /* tuning: use sbfx for 6t2+ targets */
mov r0, rINST, lsl #16 @ r0<- AAxx0000
- movs r9, r0, asr #24 @ r9<- ssssssAA (sign-extended)
- mov r9, r9, lsl #1 @ r9<- byte offset
- bmi common_backwardBranch @ backward branch, do periodic checks
+ movs r1, r0, asr #24 @ r1<- ssssssAA (sign-extended)
+ add r2, r1, r1 @ r2<- byte offset, set flags
+ @ If backwards branch refresh rIBASE
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) check for trace hotness
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
.balign 64
@@ -1139,20 +1102,15 @@
*/
/* goto/16 +AAAA */
FETCH_S(r0, 1) @ r0<- ssssAAAA (sign-extended)
- movs r9, r0, asl #1 @ r9<- byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
+ adds r1, r0, r0 @ r1<- byte offset, flags set
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) hot trace head?
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
.balign 64
@@ -1165,29 +1123,26 @@
* double to get a byte offset.
*
* Unlike most opcodes, this one is allowed to branch to itself, so
- * our "backward branch" test must be "<=0" instead of "<0". The ORRS
- * instruction doesn't affect the V flag, so we need to clear it
- * explicitly.
+ * our "backward branch" test must be "<=0" instead of "<0". Because
+ * we need the V bit set, we'll use an adds to convert from Dalvik
+ * offset to byte offset.
*/
/* goto/32 +AAAAAAAA */
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- cmp ip, ip @ (clear V flag during stall)
- orrs r0, r0, r1, lsl #16 @ r0<- AAAAaaaa, check sign
- mov r9, r0, asl #1 @ r9<- byte offset
- ble common_backwardBranch @ backward branch, do periodic checks
+ orr r0, r0, r1, lsl #16 @ r0<- AAAAaaaa
+ adds r1, r0, r0 @ r1<- byte offset
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ble common_testUpdateProfile @ (r0) hot trace head?
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
.balign 64
@@ -1200,6 +1155,9 @@
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them here.
*
+ * When the JIT is present, all targets are considered treated as
+ * a potential trace heads regardless of branch direction.
+ *
* for: packed-switch, sparse-switch
*/
/* op vAA, +BBBB */
@@ -1210,21 +1168,19 @@
GET_VREG(r1, r3) @ r1<- vAA
add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2
bl dvmInterpHandlePackedSwitch @ r0<- code-unit branch offset
- movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
- beq common_backwardBranch @ (want to use BLE but V is unknown)
+ adds r1, r0, r0 @ r1<- byte offset; clear V
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ cmp r0, #0
bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
.balign 64
@@ -1238,6 +1194,9 @@
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them here.
*
+ * When the JIT is present, all targets are considered treated as
+ * a potential trace heads regardless of branch direction.
+ *
* for: packed-switch, sparse-switch
*/
/* op vAA, +BBBB */
@@ -1248,21 +1207,19 @@
GET_VREG(r1, r3) @ r1<- vAA
add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2
bl dvmInterpHandleSparseSwitch @ r0<- code-unit branch offset
- movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
- beq common_backwardBranch @ (want to use BLE but V is unknown)
+ adds r1, r0, r0 @ r1<- byte offset; clear V
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ cmp r0, #0
bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1502,22 +1459,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bne 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movne r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1538,22 +1494,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- beq 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ moveq r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1574,22 +1529,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bge 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movge r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1610,22 +1564,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- blt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movlt r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1646,22 +1599,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- ble 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movle r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1682,22 +1634,21 @@
and r0, r0, #15
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bgt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movgt r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0,#0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1715,25 +1666,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bne 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movne r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1751,25 +1698,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- beq 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ moveq r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1787,25 +1730,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bge 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movge r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1823,25 +1762,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- blt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movlt r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1859,25 +1794,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- ble 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movle r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1895,25 +1826,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bgt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movgt r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -2786,8 +2713,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_resolve @ yes, do resolve
.LOP_SGET_finish: @ field ptr in r0
@@ -2809,8 +2736,8 @@
/* sget-wide vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_WIDE_resolve @ yes, do resolve
.LOP_SGET_WIDE_finish:
@@ -2840,8 +2767,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_resolve @ yes, do resolve
.LOP_SGET_OBJECT_finish: @ field ptr in r0
@@ -2867,8 +2794,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BOOLEAN_resolve @ yes, do resolve
.LOP_SGET_BOOLEAN_finish: @ field ptr in r0
@@ -2894,8 +2821,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BYTE_resolve @ yes, do resolve
.LOP_SGET_BYTE_finish: @ field ptr in r0
@@ -2921,8 +2848,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_CHAR_resolve @ yes, do resolve
.LOP_SGET_CHAR_finish: @ field ptr in r0
@@ -2948,8 +2875,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_SHORT_resolve @ yes, do resolve
.LOP_SGET_SHORT_finish: @ field ptr in r0
@@ -2974,8 +2901,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_resolve @ yes, do resolve
.LOP_SPUT_finish: @ field ptr in r0
@@ -2997,9 +2924,9 @@
/* sput-wide vAA, field@BBBB */
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
mov r9, rINST, lsr #8 @ r9<- AA
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_resolve @ yes, do resolve
@@ -3027,18 +2954,19 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-
+ beq .LOP_SPUT_OBJECT_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_finish: @ field ptr in r0
+ mov r2, rINST, lsr #8 @ r2<- AA
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[AA]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ @ no-op @ releasing store
+ b .LOP_SPUT_OBJECT_end
/* ------------------------------ */
.balign 64
@@ -3053,8 +2981,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BOOLEAN_resolve @ yes, do resolve
.LOP_SPUT_BOOLEAN_finish: @ field ptr in r0
@@ -3080,8 +3008,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BYTE_resolve @ yes, do resolve
.LOP_SPUT_BYTE_finish: @ field ptr in r0
@@ -3107,8 +3035,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_CHAR_resolve @ yes, do resolve
.LOP_SPUT_CHAR_finish: @ field ptr in r0
@@ -3134,8 +3062,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_SHORT_resolve @ yes, do resolve
.LOP_SPUT_SHORT_finish: @ field ptr in r0
@@ -3196,13 +3124,13 @@
.endif
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_resolve @ do resolve now
@@ -3233,11 +3161,11 @@
.endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodNoRange @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodNoRange @ r0=method, r9="this"
b common_errNullObject @ yes, throw exception
/* ------------------------------ */
@@ -3254,17 +3182,15 @@
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- pDvmDex
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
+ mov r9, #0 @ null "this" in delay slot
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
bne common_invokeMethodNoRange @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodNoRange @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ b .LOP_INVOKE_STATIC_resolve
/* ------------------------------ */
.balign 64
@@ -3283,16 +3209,16 @@
and r2, r2, #15 @ r2<- C (or stays CCCC)
.endif
EXPORT_PC() @ must export for invoke
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodNoRange @ jump to common handler
+ b common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -3353,13 +3279,13 @@
.endif
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_RANGE_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_RANGE_resolve @ do resolve now
@@ -3392,11 +3318,11 @@
.endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_RANGE_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_RANGE_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodRange @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodRange @ r0=method, r9="this"
b common_errNullObject @ yes, throw exception
@@ -3415,17 +3341,15 @@
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- pDvmDex
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
+ mov r9, #0 @ null "this" in delay slot
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
bne common_invokeMethodRange @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodRange @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ b .LOP_INVOKE_STATIC_RANGE_resolve
/* ------------------------------ */
@@ -3446,16 +3370,16 @@
and r2, r2, #15 @ r2<- C (or stays CCCC)
.endif
EXPORT_PC() @ must export for invoke
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodRange @ jump to common handler
+ b common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7464,8 +7388,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_VOLATILE_finish: @ field ptr in r0
@@ -7491,8 +7415,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_VOLATILE_resolve @ yes, do resolve
.LOP_SPUT_VOLATILE_finish: @ field ptr in r0
@@ -7593,8 +7517,8 @@
/* sget-wide vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_WIDE_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_WIDE_VOLATILE_finish:
@@ -7623,9 +7547,9 @@
/* sput-wide vAA, field@BBBB */
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
mov r9, rINST, lsr #8 @ r9<- AA
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_VOLATILE_resolve @ yes, do resolve
@@ -7646,9 +7570,19 @@
.balign 64
.L_OP_BREAKPOINT: /* 0xec */
/* File: armv5te/OP_BREAKPOINT.S */
-/* File: armv5te/unused.S */
- bl common_abort
-
+ /*
+ * Breakpoint handler.
+ *
+ * Restart this instruction with the original opcode. By
+ * the time we get here, the breakpoint will have already been
+ * handled.
+ */
+ mov r0, rPC
+ bl dvmGetOriginalOpcode @ (rPC)
+ FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst
+ and rINST, #0xff00
+ orr rINST, rINST, r0
+ GOTO_OPCODE(r0)
/* ------------------------------ */
.balign 64
@@ -7680,11 +7614,18 @@
* The first four args are in r0-r3, pointer to return value storage
* is on the stack. The function's return value is a flag that tells
* us if an exception was thrown.
+ *
+ * TUNING: could maintain two tables, pointer in Thread and
+ * swap if profiler/debuggger active.
*/
/* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .LOP_EXECUTE_INLINE_debugmode @ yes - take slow path
+.LOP_EXECUTE_INLINE_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #12 @ r0<- B
str r1, [sp] @ push &self->retval
@@ -7712,9 +7653,13 @@
* us if an exception was thrown.
*/
/* [opt] execute-inline/range {vCCCC..v(CCCC+AA-1)}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .LOP_EXECUTE_INLINE_RANGE_debugmode @ yes - take slow path
+.LOP_EXECUTE_INLINE_RANGE_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #8 @ r0<- AA
str r1, [sp] @ push &self->retval
@@ -7733,7 +7678,7 @@
/*
* Invoke Object.<init> on an object. In practice we know that
* Object's nullary constructor doesn't do anything, so we just
- * skip it (we know a debugger isn't active).
+ * skip it unless a debugger is active.
*/
FETCH(r1, 2) @ r1<- CCCC
GET_VREG(r0, r1) @ r0<- "this" ptr
@@ -7742,13 +7687,12 @@
ldr r1, [r0, #offObject_clazz] @ r1<- obj->clazz
ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
- beq 1f @ nope, done
- EXPORT_PC() @ can throw
- bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
- ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
- cmp r0, #0 @ exception pending?
- bne common_exceptionThrown @ yes, handle it
-1: FETCH_ADVANCE_INST(2+1) @ advance to next instr, load rINST
+ bne .LOP_INVOKE_OBJECT_INIT_RANGE_setFinal @ yes, go
+.LOP_INVOKE_OBJECT_INIT_RANGE_finish:
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeDebuggerActive @ debugger active?
+ bne .LOP_INVOKE_OBJECT_INIT_RANGE_debugger @ Yes - skip optimization
+ FETCH_ADVANCE_INST(2+1) @ advance to next instr, load rINST
GET_INST_OPCODE(ip) @ ip<- opcode from rINST
GOTO_OPCODE(ip) @ execute it
@@ -7894,14 +7838,14 @@
.if (!0)
and r3, r3, #15 @ r3<- C (or stays CCCC)
.endif
- GET_VREG(r2, r3) @ r2<- vC ("this" ptr)
- cmp r2, #0 @ is "this" null?
+ GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r2, [r2, #offObject_clazz] @ r2<- thisPtr->clazz
+ ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
EXPORT_PC() @ invoke must export
ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -7920,14 +7864,14 @@
.if (!1)
and r3, r3, #15 @ r3<- C (or stays CCCC)
.endif
- GET_VREG(r2, r3) @ r2<- vC ("this" ptr)
- cmp r2, #0 @ is "this" null?
+ GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r2, [r2, #offObject_clazz] @ r2<- thisPtr->clazz
+ ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
EXPORT_PC() @ invoke must export
ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7950,12 +7894,12 @@
ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
EXPORT_PC() @ must export for invoke
ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
- GET_VREG(r3, r10) @ r3<- "this"
+ GET_VREG(r9, r10) @ r9<- "this"
ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
- cmp r3, #0 @ null "this" ref?
+ cmp r9, #0 @ null "this" ref?
ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
beq common_errNullObject @ "this" is null, throw exception
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -7978,12 +7922,12 @@
ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
EXPORT_PC() @ must export for invoke
ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
- GET_VREG(r3, r10) @ r3<- "this"
+ GET_VREG(r9, r10) @ r9<- "this"
ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
- cmp r3, #0 @ null "this" ref?
+ cmp r9, #0 @ null "this" ref?
ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
beq common_errNullObject @ "this" is null, throw exception
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -8027,8 +7971,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_OBJECT_VOLATILE_finish: @ field ptr in r0
@@ -8054,18 +7998,19 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_VOLATILE_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-
+ beq .LOP_SPUT_OBJECT_VOLATILE_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_VOLATILE_finish: @ field ptr in r0
+ mov r2, rINST, lsr #8 @ r2<- AA
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[AA]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SMP_DMB @ releasing store
+ b .LOP_SPUT_OBJECT_VOLATILE_end
/* ------------------------------ */
@@ -8166,6 +8111,9 @@
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .LOP_NEW_INSTANCE_JUMBO_resolve @ no, resolve it now
@@ -8639,9 +8587,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_JUMBO_resolve @ yes, do resolve
.LOP_SGET_JUMBO_finish: @ field ptr in r0
@@ -8698,9 +8646,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_JUMBO_resolve @ yes, do resolve
.LOP_SGET_OBJECT_JUMBO_finish: @ field ptr in r0
@@ -8728,9 +8676,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BOOLEAN_JUMBO_resolve @ yes, do resolve
.LOP_SGET_BOOLEAN_JUMBO_finish: @ field ptr in r0
@@ -8758,9 +8706,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BYTE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_BYTE_JUMBO_finish: @ field ptr in r0
@@ -8788,9 +8736,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_CHAR_JUMBO_resolve @ yes, do resolve
.LOP_SGET_CHAR_JUMBO_finish: @ field ptr in r0
@@ -8818,9 +8766,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_SHORT_JUMBO_resolve @ yes, do resolve
.LOP_SGET_SHORT_JUMBO_finish: @ field ptr in r0
@@ -8847,9 +8795,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_JUMBO_finish: @ field ptr in r0
@@ -8872,10 +8820,10 @@
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- aaaa (lo)
FETCH(r2, 2) @ r2<- AAAA (hi)
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r1, r2, lsl #16 @ r1<- AAAAaaaa
FETCH(r9, 3) @ r9<- BBBB
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_JUMBO_resolve @ yes, do resolve
@@ -8902,18 +8850,20 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_JUMBO_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq .LOP_SPUT_OBJECT_JUMBO_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_JUMBO_finish: @ field ptr in r0
+ FETCH(r2, 3) @ r2<- BBBB
+ FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[BBBB]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ @ no-op @ releasing store
+ b .LOP_SPUT_OBJECT_JUMBO_end
/* ------------------------------ */
.balign 64
@@ -8930,9 +8880,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BOOLEAN_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_BOOLEAN_JUMBO_finish: @ field ptr in r0
@@ -8960,9 +8910,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BYTE_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_BYTE_JUMBO_finish: @ field ptr in r0
@@ -8990,9 +8940,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_CHAR_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_CHAR_JUMBO_finish: @ field ptr in r0
@@ -9020,9 +8970,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_SHORT_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_SHORT_JUMBO_finish: @ field ptr in r0
@@ -9074,13 +9024,13 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_JUMBO_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_JUMBO_resolve @ do resolve now
@@ -9108,11 +9058,11 @@
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_JUMBO_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_JUMBO_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodJumbo @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodJumbo @ (r0=method, r9="this")
b common_errNullObject @ yes, throw exception
/* ------------------------------ */
@@ -9129,16 +9079,13 @@
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- bne common_invokeMethodJumbo @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodJumbo @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ bne common_invokeMethodJumboNoThis @ (r0=method)
+ b .LOP_INVOKE_STATIC_JUMBO_resolve
/* ------------------------------ */
.balign 64
@@ -9153,16 +9100,16 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
EXPORT_PC() @ must export for invoke
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodJumbo @ jump to common handler
+ b common_invokeMethodJumbo @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -10796,7 +10743,7 @@
/*
* Invoke Object.<init> on an object. In practice we know that
* Object's nullary constructor doesn't do anything, so we just
- * skip it (we know a debugger isn't active).
+ * skip it unless a debugger is active.
*/
FETCH(r1, 4) @ r1<- CCCC
GET_VREG(r0, r1) @ r0<- "this" ptr
@@ -10805,13 +10752,12 @@
ldr r1, [r0, #offObject_clazz] @ r1<- obj->clazz
ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
- beq 1f @ nope, done
- EXPORT_PC() @ can throw
- bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
- ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
- cmp r0, #0 @ exception pending?
- bne common_exceptionThrown @ yes, handle it
-1: FETCH_ADVANCE_INST(4+1) @ advance to next instr, load rINST
+ bne .LOP_INVOKE_OBJECT_INIT_JUMBO_setFinal @ yes, go
+.LOP_INVOKE_OBJECT_INIT_JUMBO_finish:
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeDebuggerActive @ debugger active?
+ bne .LOP_INVOKE_OBJECT_INIT_JUMBO_debugger @ Yes - skip optimization
+ FETCH_ADVANCE_INST(4+1) @ advance to next instr, load rINST
GET_INST_OPCODE(ip) @ ip<- opcode from rINST
GOTO_OPCODE(ip) @ execute it
@@ -10995,9 +10941,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -11058,9 +11004,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -11089,9 +11035,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -11116,10 +11062,10 @@
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- aaaa (lo)
FETCH(r2, 2) @ r2<- AAAA (hi)
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r1, r2, lsl #16 @ r1<- AAAAaaaa
FETCH(r9, 3) @ r9<- BBBB
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve @ yes, do resolve
@@ -11148,18 +11094,20 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq .LOP_SPUT_OBJECT_VOLATILE_JUMBO_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
+ FETCH(r2, 3) @ r2<- BBBB
+ FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[BBBB]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SMP_DMB @ releasing store
+ b .LOP_SPUT_OBJECT_VOLATILE_JUMBO_end
/* ------------------------------ */
@@ -11356,12 +11304,45 @@
.LOP_NEW_INSTANCE_finish: @ r0=new object
mov r3, rINST, lsr #8 @ r3<- AA
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .LOP_NEW_INSTANCE_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.LOP_NEW_INSTANCE_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.LOP_NEW_INSTANCE_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .LOP_NEW_INSTANCE_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
@@ -11500,14 +11481,17 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY
bl dvmThrowInternalError
b common_exceptionThrown
- .if (!0) @ define in one or the other, not both
-.L_strFilledNewArrayNotImpl:
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY:
.word .LstrFilledNewArrayNotImpl
- .endif
/* continuation for OP_FILLED_NEW_ARRAY_RANGE */
@@ -11581,14 +11565,17 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_RANGE_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_RANGE
bl dvmThrowInternalError
b common_exceptionThrown
- .if (!1) @ define in one or the other, not both
-.L_strFilledNewArrayNotImpl:
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_RANGE:
.word .LstrFilledNewArrayNotImpl
- .endif
/* continuation for OP_CMPL_FLOAT */
@@ -12131,216 +12118,378 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_finish
/* continuation for OP_SGET_WIDE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r0.
*/
.LOP_SGET_WIDE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r1<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_WIDE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_WIDE_finish @ resume
/* continuation for OP_SGET_OBJECT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_finish
/* continuation for OP_SGET_BOOLEAN */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BOOLEAN_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BOOLEAN_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BOOLEAN_finish
/* continuation for OP_SGET_BYTE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BYTE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BYTE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BYTE_finish
/* continuation for OP_SGET_CHAR */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_CHAR_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_CHAR_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_CHAR_finish
/* continuation for OP_SGET_SHORT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_SHORT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_SHORT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_SHORT_finish
/* continuation for OP_SPUT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_finish @ resume
/* continuation for OP_SPUT_WIDE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
- * r9: &fp[AA]
+ * r1: BBBB field ref
+ * r9: &fp[AA]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_finish @ resume
/* continuation for OP_SPUT_OBJECT */
-.LOP_SPUT_OBJECT_finish: @ field ptr in r0
- mov r2, rINST, lsr #8 @ r2<- AA
- FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[AA]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- @ no-op @ releasing store
+
+
+.LOP_SPUT_OBJECT_end:
str r1, [r0, #offStaticField_value] @ field<- vAA
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
-/* continuation for OP_SPUT_BOOLEAN */
-
- /*
- * Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ /* Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
-.LOP_SPUT_BOOLEAN_resolve:
+.LOP_SPUT_OBJECT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BOOLEAN_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_finish @ resume
+
+
+/* continuation for OP_SPUT_BOOLEAN */
+
+ /*
+ * Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_BOOLEAN_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BOOLEAN_finish @ resume
/* continuation for OP_SPUT_BYTE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_BYTE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BYTE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BYTE_finish @ resume
/* continuation for OP_SPUT_CHAR */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_CHAR_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_CHAR_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_CHAR_finish @ resume
/* continuation for OP_SPUT_SHORT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_SHORT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_SHORT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_SHORT_finish @ resume
/* continuation for OP_INVOKE_VIRTUAL */
@@ -12350,24 +12499,24 @@
* r10 = C or CCCC (index of first arg, which is the "this" ptr)
*/
.LOP_INVOKE_VIRTUAL_continue:
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -12378,7 +12527,7 @@
bl common_invokeMethodNoRange @ continue on
.LOP_INVOKE_SUPER_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -12406,10 +12555,42 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC */
+
+
+.LOP_INVOKE_STATIC_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodNoRange @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodNoRange @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodNoRange @ whew, finally!
+#else
+ bne common_invokeMethodNoRange @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
/* continuation for OP_INVOKE_VIRTUAL_RANGE */
/*
@@ -12418,24 +12599,24 @@
* r10 = C or CCCC (index of first arg, which is the "this" ptr)
*/
.LOP_INVOKE_VIRTUAL_RANGE_continue:
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER_RANGE */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_RANGE_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -12446,7 +12627,7 @@
bl common_invokeMethodRange @ continue on
.LOP_INVOKE_SUPER_RANGE_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -12474,10 +12655,42 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_RANGE_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC_RANGE */
+
+
+.LOP_INVOKE_STATIC_RANGE_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodRange @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodRange @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodRange @ whew, finally!
+#else
+ bne common_invokeMethodRange @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
/* continuation for OP_FLOAT_TO_LONG */
/*
* Convert the float in r0 to a long in r0/r1.
@@ -12663,31 +12876,53 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_VOLATILE_finish
/* continuation for OP_SPUT_VOLATILE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_VOLATILE_finish @ resume
/* continuation for OP_IGET_OBJECT_VOLATILE */
@@ -12764,37 +12999,59 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r0.
*/
.LOP_SGET_WIDE_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r1<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_WIDE_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_WIDE_VOLATILE_finish @ resume
/* continuation for OP_SPUT_WIDE_VOLATILE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
- * r9: &fp[AA]
+ * r1: BBBB field ref
+ * r9: &fp[AA]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_VOLATILE_finish @ resume
/* continuation for OP_EXECUTE_INLINE */
@@ -12828,6 +13085,36 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.LOP_EXECUTE_INLINE_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .LOP_EXECUTE_INLINE_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .LOP_EXECUTE_INLINE_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.LOP_EXECUTE_INLINE_table:
.word gDvmInlineOpsTable
@@ -12857,9 +13144,67 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.LOP_EXECUTE_INLINE_RANGE_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .LOP_EXECUTE_INLINE_RANGE_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .LOP_EXECUTE_INLINE_RANGE_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.LOP_EXECUTE_INLINE_RANGE_table:
.word gDvmInlineOpsTable
+
+/* continuation for OP_INVOKE_OBJECT_INIT_RANGE */
+
+.LOP_INVOKE_OBJECT_INIT_RANGE_setFinal:
+ EXPORT_PC() @ can throw
+ bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
+ ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
+ cmp r0, #0 @ exception pending?
+ bne common_exceptionThrown @ yes, handle it
+ b .LOP_INVOKE_OBJECT_INIT_RANGE_finish
+
+ /*
+ * A debugger is attached, so we need to go ahead and do
+ * this. For simplicity, we'll just jump directly to the
+ * corresponding handler. Note that we can't use
+ * rIBASE here because it may be in single-step mode.
+ * Load the primary table base directly.
+ */
+.LOP_INVOKE_OBJECT_INIT_RANGE_debugger:
+ ldr r1, [rSELF, #offThread_mainHandlerTable]
+ .if 0
+ mov ip, #OP_INVOKE_DIRECT_JUMBO
+ .else
+ mov ip, #OP_INVOKE_DIRECT_RANGE
+ .endif
+ GOTO_OPCODE_BASE(r1,ip) @ execute it
+
/* continuation for OP_IPUT_OBJECT_VOLATILE */
/*
@@ -12888,31 +13233,61 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_VOLATILE_finish
/* continuation for OP_SPUT_OBJECT_VOLATILE */
-.LOP_SPUT_OBJECT_VOLATILE_finish: @ field ptr in r0
- mov r2, rINST, lsr #8 @ r2<- AA
- FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[AA]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- SMP_DMB @ releasing store
+
+
+.LOP_SPUT_OBJECT_VOLATILE_end:
str r1, [r0, #offStaticField_value] @ field<- vAA
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+ /* Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_OBJECT_VOLATILE_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_VOLATILE_finish @ resume
+
+
/* continuation for OP_CONST_CLASS_JUMBO */
/*
@@ -13054,12 +13429,45 @@
.LOP_NEW_INSTANCE_JUMBO_finish: @ r0=new object
FETCH(r3, 3) @ r3<- BBBB
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .LOP_NEW_INSTANCE_JUMBO_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.LOP_NEW_INSTANCE_JUMBO_end:
FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vBBBB<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.LOP_NEW_INSTANCE_JUMBO_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .LOP_NEW_INSTANCE_JUMBO_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
@@ -13174,10 +13582,18 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_JUMBO_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_JUMBO
bl dvmThrowInternalError
b common_exceptionThrown
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_JUMBO:
+ .word .LstrFilledNewArrayNotImpl
+
/* continuation for OP_IGET_JUMBO */
/*
@@ -13613,16 +14029,27 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_JUMBO_finish @ resume
/* continuation for OP_SGET_WIDE_JUMBO */
@@ -13645,185 +14072,324 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_JUMBO_finish @ resume
/* continuation for OP_SGET_BOOLEAN_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BOOLEAN_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BOOLEAN_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BOOLEAN_JUMBO_finish @ resume
/* continuation for OP_SGET_BYTE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BYTE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BYTE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BYTE_JUMBO_finish @ resume
/* continuation for OP_SGET_CHAR_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_CHAR_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_CHAR_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_CHAR_JUMBO_finish @ resume
/* continuation for OP_SGET_SHORT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_SHORT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_SHORT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_SHORT_JUMBO_finish @ resume
/* continuation for OP_SPUT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_JUMBO_finish @ resume
/* continuation for OP_SPUT_WIDE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
- * r9: &fp[BBBB]
+ * r1: AAAAAAAA field ref
+ * r9: &fp[BBBB]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_JUMBO_finish @ resume
/* continuation for OP_SPUT_OBJECT_JUMBO */
-.LOP_SPUT_OBJECT_JUMBO_finish: @ field ptr in r0
- FETCH(r2, 3) @ r2<- BBBB
- FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[BBBB]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- @ no-op @ releasing store
+
+.LOP_SPUT_OBJECT_JUMBO_end:
str r1, [r0, #offStaticField_value] @ field<- vBBBB
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
-/* continuation for OP_SPUT_BOOLEAN_JUMBO */
-
- /*
- * Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ /* Continuation if the field has not yet been resolved.
+ * r1: AAAAaaaa field ref
+ * r10: dvmDex->pResFields
*/
-.LOP_SPUT_BOOLEAN_JUMBO_resolve:
- ldr r2, [rSELF, #offThread_method] @ r2<- current method
+.LOP_SPUT_OBJECT_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r9<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BOOLEAN_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_JUMBO_finish @ resume
+
+
+/* continuation for OP_SPUT_BOOLEAN_JUMBO */
+
+ /*
+ * Continuation if the field has not yet been resolved.
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_BOOLEAN_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BOOLEAN_JUMBO_finish @ resume
/* continuation for OP_SPUT_BYTE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_BYTE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BYTE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BYTE_JUMBO_finish @ resume
/* continuation for OP_SPUT_CHAR_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_CHAR_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_CHAR_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_CHAR_JUMBO_finish @ resume
/* continuation for OP_SPUT_SHORT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_SHORT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_SHORT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_SHORT_JUMBO_finish @ resume
/* continuation for OP_INVOKE_VIRTUAL_JUMBO */
@@ -13833,24 +14399,24 @@
*/
.LOP_INVOKE_VIRTUAL_JUMBO_continue:
FETCH(r10, 4) @ r10<- CCCC
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER_JUMBO */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_JUMBO_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -13858,10 +14424,10 @@
bcs .LOP_INVOKE_SUPER_JUMBO_nsm @ method not present in superclass
ldr r1, [r1, #offClassObject_vtable] @ r1<- ...clazz->super->vtable
ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
.LOP_INVOKE_SUPER_JUMBO_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -13889,10 +14455,68 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_JUMBO_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC_JUMBO */
+
+
+.LOP_INVOKE_STATIC_JUMBO_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodJumboNoThis @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodJumboNoThis @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodJumboNoThis @ whew, finally!
+#else
+ bne common_invokeMethodJumboNoThis @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
+/* continuation for OP_INVOKE_OBJECT_INIT_JUMBO */
+
+.LOP_INVOKE_OBJECT_INIT_JUMBO_setFinal:
+ EXPORT_PC() @ can throw
+ bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
+ ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
+ cmp r0, #0 @ exception pending?
+ bne common_exceptionThrown @ yes, handle it
+ b .LOP_INVOKE_OBJECT_INIT_JUMBO_finish
+
+ /*
+ * A debugger is attached, so we need to go ahead and do
+ * this. For simplicity, we'll just jump directly to the
+ * corresponding handler. Note that we can't use
+ * rIBASE here because it may be in single-step mode.
+ * Load the primary table base directly.
+ */
+.LOP_INVOKE_OBJECT_INIT_JUMBO_debugger:
+ ldr r1, [rSELF, #offThread_mainHandlerTable]
+ .if 1
+ mov ip, #OP_INVOKE_DIRECT_JUMBO
+ .else
+ mov ip, #OP_INVOKE_DIRECT_RANGE
+ .endif
+ GOTO_OPCODE_BASE(r1,ip) @ execute it
+
/* continuation for OP_IGET_VOLATILE_JUMBO */
/*
@@ -14088,16 +14712,27 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SGET_WIDE_VOLATILE_JUMBO */
@@ -14120,66 +14755,117 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_VOLATILE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_WIDE_VOLATILE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
- * r9: &fp[BBBB]
+ * r1: AAAAAAAA field ref
+ * r9: &fp[BBBB]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_OBJECT_VOLATILE_JUMBO */
-.LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
- FETCH(r2, 3) @ r2<- BBBB
- FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[BBBB]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- SMP_DMB @ releasing store
+
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_end:
str r1, [r0, #offStaticField_value] @ field<- vBBBB
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+ /* Continuation if the field has not yet been resolved.
+ * r1: AAAAaaaa field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r9<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ resume
+
+
.size dvmAsmSisterStart, .-dvmAsmSisterStart
.global dvmAsmSisterEnd
dvmAsmSisterEnd:
@@ -14187,7196 +14873,11818 @@
.global dvmAsmAltInstructionStart
.type dvmAsmAltInstructionStart, %function
-dvmAsmAltInstructionStart:
.text
+dvmAsmAltInstructionStart = .L_ALT_OP_NOP
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOP: /* 0x00 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (0 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE: /* 0x01 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (1 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_FROM16: /* 0x02 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (2 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_16: /* 0x03 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (3 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE: /* 0x04 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (4 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE_FROM16: /* 0x05 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (5 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE_16: /* 0x06 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (6 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT: /* 0x07 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (7 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT_FROM16: /* 0x08 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (8 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT_16: /* 0x09 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (9 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT: /* 0x0a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (10 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT_WIDE: /* 0x0b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (11 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT_OBJECT: /* 0x0c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (12 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_EXCEPTION: /* 0x0d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (13 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_VOID: /* 0x0e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (14 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN: /* 0x0f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (15 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_WIDE: /* 0x10 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (16 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_OBJECT: /* 0x11 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (17 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_4: /* 0x12 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (18 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_16: /* 0x13 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (19 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST: /* 0x14 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (20 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_HIGH16: /* 0x15 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (21 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_16: /* 0x16 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (22 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_32: /* 0x17 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (23 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE: /* 0x18 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (24 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_HIGH16: /* 0x19 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (25 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_STRING: /* 0x1a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (26 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_STRING_JUMBO: /* 0x1b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (27 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_CLASS: /* 0x1c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (28 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MONITOR_ENTER: /* 0x1d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (29 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MONITOR_EXIT: /* 0x1e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (30 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CHECK_CAST: /* 0x1f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (31 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INSTANCE_OF: /* 0x20 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (32 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ARRAY_LENGTH: /* 0x21 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (33 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_INSTANCE: /* 0x22 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (34 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_ARRAY: /* 0x23 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (35 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY: /* 0x24 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (36 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY_RANGE: /* 0x25 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (37 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILL_ARRAY_DATA: /* 0x26 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (38 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW: /* 0x27 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (39 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO: /* 0x28 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (40 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO_16: /* 0x29 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (41 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO_32: /* 0x2a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (42 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_PACKED_SWITCH: /* 0x2b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (43 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPARSE_SWITCH: /* 0x2c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (44 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPL_FLOAT: /* 0x2d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (45 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPG_FLOAT: /* 0x2e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (46 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPL_DOUBLE: /* 0x2f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (47 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPG_DOUBLE: /* 0x30 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (48 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMP_LONG: /* 0x31 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (49 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_EQ: /* 0x32 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (50 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_NE: /* 0x33 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (51 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LT: /* 0x34 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (52 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GE: /* 0x35 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (53 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GT: /* 0x36 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (54 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LE: /* 0x37 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (55 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_EQZ: /* 0x38 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (56 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_NEZ: /* 0x39 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (57 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LTZ: /* 0x3a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (58 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GEZ: /* 0x3b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (59 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GTZ: /* 0x3c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (60 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LEZ: /* 0x3d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (61 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3E: /* 0x3e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (62 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3F: /* 0x3f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (63 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_40: /* 0x40 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (64 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_41: /* 0x41 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (65 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_42: /* 0x42 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (66 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_43: /* 0x43 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (67 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET: /* 0x44 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (68 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_WIDE: /* 0x45 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (69 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_OBJECT: /* 0x46 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (70 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_BOOLEAN: /* 0x47 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (71 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_BYTE: /* 0x48 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (72 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_CHAR: /* 0x49 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (73 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_SHORT: /* 0x4a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (74 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT: /* 0x4b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (75 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_WIDE: /* 0x4c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (76 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_OBJECT: /* 0x4d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (77 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_BOOLEAN: /* 0x4e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (78 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_BYTE: /* 0x4f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (79 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_CHAR: /* 0x50 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (80 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_SHORT: /* 0x51 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (81 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET: /* 0x52 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (82 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE: /* 0x53 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (83 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT: /* 0x54 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (84 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BOOLEAN: /* 0x55 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (85 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BYTE: /* 0x56 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (86 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_CHAR: /* 0x57 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (87 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_SHORT: /* 0x58 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (88 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT: /* 0x59 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (89 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE: /* 0x5a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (90 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT: /* 0x5b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (91 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BOOLEAN: /* 0x5c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (92 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BYTE: /* 0x5d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (93 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_CHAR: /* 0x5e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (94 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_SHORT: /* 0x5f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (95 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET: /* 0x60 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (96 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE: /* 0x61 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (97 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT: /* 0x62 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (98 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BOOLEAN: /* 0x63 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (99 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BYTE: /* 0x64 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (100 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_CHAR: /* 0x65 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (101 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_SHORT: /* 0x66 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (102 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT: /* 0x67 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (103 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE: /* 0x68 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (104 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT: /* 0x69 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (105 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BOOLEAN: /* 0x6a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (106 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BYTE: /* 0x6b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (107 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_CHAR: /* 0x6c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (108 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_SHORT: /* 0x6d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (109 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL: /* 0x6e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (110 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER: /* 0x6f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (111 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT: /* 0x70 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (112 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC: /* 0x71 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (113 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE: /* 0x72 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (114 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_73: /* 0x73 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (115 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_RANGE: /* 0x74 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (116 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_RANGE: /* 0x75 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (117 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT_RANGE: /* 0x76 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (118 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC_RANGE: /* 0x77 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (119 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE_RANGE: /* 0x78 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (120 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_79: /* 0x79 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (121 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7A: /* 0x7a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (122 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_INT: /* 0x7b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (123 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOT_INT: /* 0x7c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (124 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_LONG: /* 0x7d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (125 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOT_LONG: /* 0x7e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (126 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_FLOAT: /* 0x7f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (127 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_DOUBLE: /* 0x80 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (128 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_LONG: /* 0x81 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (129 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_FLOAT: /* 0x82 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (130 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_DOUBLE: /* 0x83 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (131 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_INT: /* 0x84 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (132 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_FLOAT: /* 0x85 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (133 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_DOUBLE: /* 0x86 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (134 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_INT: /* 0x87 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (135 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_LONG: /* 0x88 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (136 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_DOUBLE: /* 0x89 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (137 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_INT: /* 0x8a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (138 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_LONG: /* 0x8b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (139 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_FLOAT: /* 0x8c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (140 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_BYTE: /* 0x8d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (141 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_CHAR: /* 0x8e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (142 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_SHORT: /* 0x8f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (143 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT: /* 0x90 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (144 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_INT: /* 0x91 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (145 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT: /* 0x92 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (146 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT: /* 0x93 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (147 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT: /* 0x94 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (148 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT: /* 0x95 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (149 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT: /* 0x96 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (150 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT: /* 0x97 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (151 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT: /* 0x98 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (152 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT: /* 0x99 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (153 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT: /* 0x9a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (154 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_LONG: /* 0x9b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (155 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_LONG: /* 0x9c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (156 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_LONG: /* 0x9d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (157 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_LONG: /* 0x9e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (158 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_LONG: /* 0x9f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (159 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_LONG: /* 0xa0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (160 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_LONG: /* 0xa1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (161 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_LONG: /* 0xa2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (162 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_LONG: /* 0xa3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (163 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_LONG: /* 0xa4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (164 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_LONG: /* 0xa5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (165 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_FLOAT: /* 0xa6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (166 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_FLOAT: /* 0xa7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (167 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_FLOAT: /* 0xa8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (168 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_FLOAT: /* 0xa9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (169 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_FLOAT: /* 0xaa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (170 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_DOUBLE: /* 0xab */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (171 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_DOUBLE: /* 0xac */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (172 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_DOUBLE: /* 0xad */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (173 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_DOUBLE: /* 0xae */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (174 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_DOUBLE: /* 0xaf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (175 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_2ADDR: /* 0xb0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (176 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_INT_2ADDR: /* 0xb1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (177 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_2ADDR: /* 0xb2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (178 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_2ADDR: /* 0xb3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (179 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_2ADDR: /* 0xb4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (180 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_2ADDR: /* 0xb5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (181 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_2ADDR: /* 0xb6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (182 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_2ADDR: /* 0xb7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (183 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT_2ADDR: /* 0xb8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (184 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT_2ADDR: /* 0xb9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (185 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT_2ADDR: /* 0xba */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (186 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_LONG_2ADDR: /* 0xbb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (187 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_LONG_2ADDR: /* 0xbc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (188 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_LONG_2ADDR: /* 0xbd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (189 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_LONG_2ADDR: /* 0xbe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (190 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_LONG_2ADDR: /* 0xbf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (191 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_LONG_2ADDR: /* 0xc0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (192 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_LONG_2ADDR: /* 0xc1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (193 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_LONG_2ADDR: /* 0xc2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (194 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_LONG_2ADDR: /* 0xc3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (195 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_LONG_2ADDR: /* 0xc4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (196 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_LONG_2ADDR: /* 0xc5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (197 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_FLOAT_2ADDR: /* 0xc6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (198 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_FLOAT_2ADDR: /* 0xc7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (199 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_FLOAT_2ADDR: /* 0xc8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (200 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_FLOAT_2ADDR: /* 0xc9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (201 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_FLOAT_2ADDR: /* 0xca */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (202 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_DOUBLE_2ADDR: /* 0xcb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (203 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_DOUBLE_2ADDR: /* 0xcc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (204 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_DOUBLE_2ADDR: /* 0xcd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (205 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_DOUBLE_2ADDR: /* 0xce */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (206 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_DOUBLE_2ADDR: /* 0xcf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (207 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_LIT16: /* 0xd0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (208 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RSUB_INT: /* 0xd1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (209 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_LIT16: /* 0xd2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (210 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_LIT16: /* 0xd3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (211 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_LIT16: /* 0xd4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (212 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_LIT16: /* 0xd5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (213 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_LIT16: /* 0xd6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (214 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_LIT16: /* 0xd7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (215 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_LIT8: /* 0xd8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (216 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RSUB_INT_LIT8: /* 0xd9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (217 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_LIT8: /* 0xda */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (218 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_LIT8: /* 0xdb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (219 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_LIT8: /* 0xdc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (220 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_LIT8: /* 0xdd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (221 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_LIT8: /* 0xde */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (222 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_LIT8: /* 0xdf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (223 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT_LIT8: /* 0xe0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (224 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT_LIT8: /* 0xe1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (225 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT_LIT8: /* 0xe2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (226 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_VOLATILE: /* 0xe3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (227 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_VOLATILE: /* 0xe4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (228 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_VOLATILE: /* 0xe5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (229 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_VOLATILE: /* 0xe6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (230 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_VOLATILE: /* 0xe7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (231 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_VOLATILE: /* 0xe8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (232 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_VOLATILE: /* 0xe9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (233 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_VOLATILE: /* 0xea */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (234 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_VOLATILE: /* 0xeb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (235 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_BREAKPOINT: /* 0xec */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (236 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW_VERIFICATION_ERROR: /* 0xed */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (237 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_EXECUTE_INLINE: /* 0xee */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (238 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_EXECUTE_INLINE_RANGE: /* 0xef */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (239 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_OBJECT_INIT_RANGE: /* 0xf0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (240 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_VOID_BARRIER: /* 0xf1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (241 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_QUICK: /* 0xf2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (242 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_QUICK: /* 0xf3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (243 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_QUICK: /* 0xf4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (244 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_QUICK: /* 0xf5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (245 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_QUICK: /* 0xf6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (246 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_QUICK: /* 0xf7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (247 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_QUICK: /* 0xf8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (248 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_QUICK_RANGE: /* 0xf9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (249 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_QUICK: /* 0xfa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (250 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_QUICK_RANGE: /* 0xfb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (251 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_VOLATILE: /* 0xfc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (252 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_VOLATILE: /* 0xfd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (253 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_VOLATILE: /* 0xfe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (254 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DISPATCH_FF: /* 0xff */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (255 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_CLASS_JUMBO: /* 0x100 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (256 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CHECK_CAST_JUMBO: /* 0x101 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (257 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INSTANCE_OF_JUMBO: /* 0x102 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (258 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_INSTANCE_JUMBO: /* 0x103 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (259 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_ARRAY_JUMBO: /* 0x104 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (260 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY_JUMBO: /* 0x105 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (261 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_JUMBO: /* 0x106 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (262 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_JUMBO: /* 0x107 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (263 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_JUMBO: /* 0x108 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (264 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BOOLEAN_JUMBO: /* 0x109 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (265 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BYTE_JUMBO: /* 0x10a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (266 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_CHAR_JUMBO: /* 0x10b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (267 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_SHORT_JUMBO: /* 0x10c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (268 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_JUMBO: /* 0x10d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (269 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_JUMBO: /* 0x10e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (270 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_JUMBO: /* 0x10f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (271 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BOOLEAN_JUMBO: /* 0x110 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (272 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BYTE_JUMBO: /* 0x111 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (273 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_CHAR_JUMBO: /* 0x112 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (274 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_SHORT_JUMBO: /* 0x113 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (275 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_JUMBO: /* 0x114 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (276 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_JUMBO: /* 0x115 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (277 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_JUMBO: /* 0x116 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (278 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BOOLEAN_JUMBO: /* 0x117 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (279 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BYTE_JUMBO: /* 0x118 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (280 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_CHAR_JUMBO: /* 0x119 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (281 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_SHORT_JUMBO: /* 0x11a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (282 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_JUMBO: /* 0x11b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (283 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_JUMBO: /* 0x11c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (284 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_JUMBO: /* 0x11d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (285 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BOOLEAN_JUMBO: /* 0x11e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (286 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BYTE_JUMBO: /* 0x11f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (287 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_CHAR_JUMBO: /* 0x120 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (288 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_SHORT_JUMBO: /* 0x121 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (289 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_JUMBO: /* 0x122 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (290 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_JUMBO: /* 0x123 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (291 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT_JUMBO: /* 0x124 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (292 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC_JUMBO: /* 0x125 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (293 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE_JUMBO: /* 0x126 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (294 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_27FF: /* 0x127 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (295 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_28FF: /* 0x128 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (296 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_29FF: /* 0x129 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (297 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2AFF: /* 0x12a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (298 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2BFF: /* 0x12b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (299 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2CFF: /* 0x12c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (300 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2DFF: /* 0x12d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (301 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2EFF: /* 0x12e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (302 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2FFF: /* 0x12f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (303 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_30FF: /* 0x130 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (304 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_31FF: /* 0x131 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (305 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_32FF: /* 0x132 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (306 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_33FF: /* 0x133 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (307 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_34FF: /* 0x134 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (308 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_35FF: /* 0x135 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (309 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_36FF: /* 0x136 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (310 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_37FF: /* 0x137 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (311 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_38FF: /* 0x138 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (312 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_39FF: /* 0x139 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (313 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3AFF: /* 0x13a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (314 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3BFF: /* 0x13b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (315 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3CFF: /* 0x13c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (316 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3DFF: /* 0x13d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (317 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3EFF: /* 0x13e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (318 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3FFF: /* 0x13f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (319 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_40FF: /* 0x140 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (320 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_41FF: /* 0x141 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (321 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_42FF: /* 0x142 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (322 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_43FF: /* 0x143 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (323 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_44FF: /* 0x144 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (324 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_45FF: /* 0x145 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (325 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_46FF: /* 0x146 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (326 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_47FF: /* 0x147 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (327 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_48FF: /* 0x148 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (328 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_49FF: /* 0x149 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (329 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4AFF: /* 0x14a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (330 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4BFF: /* 0x14b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (331 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4CFF: /* 0x14c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (332 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4DFF: /* 0x14d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (333 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4EFF: /* 0x14e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (334 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4FFF: /* 0x14f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (335 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_50FF: /* 0x150 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (336 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_51FF: /* 0x151 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (337 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_52FF: /* 0x152 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (338 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_53FF: /* 0x153 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (339 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_54FF: /* 0x154 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (340 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_55FF: /* 0x155 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (341 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_56FF: /* 0x156 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (342 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_57FF: /* 0x157 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (343 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_58FF: /* 0x158 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (344 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_59FF: /* 0x159 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (345 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5AFF: /* 0x15a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (346 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5BFF: /* 0x15b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (347 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5CFF: /* 0x15c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (348 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5DFF: /* 0x15d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (349 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5EFF: /* 0x15e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (350 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5FFF: /* 0x15f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (351 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_60FF: /* 0x160 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (352 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_61FF: /* 0x161 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (353 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_62FF: /* 0x162 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (354 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_63FF: /* 0x163 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (355 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_64FF: /* 0x164 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (356 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_65FF: /* 0x165 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (357 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_66FF: /* 0x166 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (358 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_67FF: /* 0x167 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (359 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_68FF: /* 0x168 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (360 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_69FF: /* 0x169 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (361 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6AFF: /* 0x16a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (362 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6BFF: /* 0x16b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (363 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6CFF: /* 0x16c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (364 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6DFF: /* 0x16d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (365 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6EFF: /* 0x16e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (366 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6FFF: /* 0x16f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (367 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_70FF: /* 0x170 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (368 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_71FF: /* 0x171 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (369 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_72FF: /* 0x172 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (370 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_73FF: /* 0x173 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (371 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_74FF: /* 0x174 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (372 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_75FF: /* 0x175 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (373 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_76FF: /* 0x176 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (374 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_77FF: /* 0x177 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (375 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_78FF: /* 0x178 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (376 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_79FF: /* 0x179 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (377 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7AFF: /* 0x17a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (378 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7BFF: /* 0x17b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (379 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7CFF: /* 0x17c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (380 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7DFF: /* 0x17d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (381 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7EFF: /* 0x17e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (382 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7FFF: /* 0x17f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (383 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_80FF: /* 0x180 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (384 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_81FF: /* 0x181 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (385 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_82FF: /* 0x182 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (386 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_83FF: /* 0x183 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (387 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_84FF: /* 0x184 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (388 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_85FF: /* 0x185 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (389 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_86FF: /* 0x186 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (390 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_87FF: /* 0x187 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (391 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_88FF: /* 0x188 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (392 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_89FF: /* 0x189 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (393 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8AFF: /* 0x18a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (394 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8BFF: /* 0x18b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (395 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8CFF: /* 0x18c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (396 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8DFF: /* 0x18d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (397 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8EFF: /* 0x18e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (398 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8FFF: /* 0x18f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (399 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_90FF: /* 0x190 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (400 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_91FF: /* 0x191 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (401 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_92FF: /* 0x192 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (402 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_93FF: /* 0x193 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (403 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_94FF: /* 0x194 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (404 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_95FF: /* 0x195 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (405 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_96FF: /* 0x196 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (406 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_97FF: /* 0x197 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (407 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_98FF: /* 0x198 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (408 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_99FF: /* 0x199 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (409 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9AFF: /* 0x19a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (410 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9BFF: /* 0x19b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (411 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9CFF: /* 0x19c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (412 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9DFF: /* 0x19d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (413 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9EFF: /* 0x19e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (414 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9FFF: /* 0x19f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (415 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A0FF: /* 0x1a0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (416 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A1FF: /* 0x1a1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (417 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A2FF: /* 0x1a2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (418 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A3FF: /* 0x1a3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (419 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A4FF: /* 0x1a4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (420 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A5FF: /* 0x1a5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (421 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A6FF: /* 0x1a6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (422 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A7FF: /* 0x1a7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (423 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A8FF: /* 0x1a8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (424 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A9FF: /* 0x1a9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (425 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AAFF: /* 0x1aa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (426 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ABFF: /* 0x1ab */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (427 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ACFF: /* 0x1ac */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (428 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ADFF: /* 0x1ad */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (429 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AEFF: /* 0x1ae */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (430 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AFFF: /* 0x1af */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (431 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B0FF: /* 0x1b0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (432 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B1FF: /* 0x1b1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (433 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B2FF: /* 0x1b2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (434 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B3FF: /* 0x1b3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (435 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B4FF: /* 0x1b4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (436 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B5FF: /* 0x1b5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (437 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B6FF: /* 0x1b6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (438 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B7FF: /* 0x1b7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (439 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B8FF: /* 0x1b8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (440 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B9FF: /* 0x1b9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (441 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BAFF: /* 0x1ba */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (442 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BBFF: /* 0x1bb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (443 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BCFF: /* 0x1bc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (444 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BDFF: /* 0x1bd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (445 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BEFF: /* 0x1be */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (446 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BFFF: /* 0x1bf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (447 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C0FF: /* 0x1c0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (448 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C1FF: /* 0x1c1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (449 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C2FF: /* 0x1c2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (450 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C3FF: /* 0x1c3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (451 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C4FF: /* 0x1c4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (452 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C5FF: /* 0x1c5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (453 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C6FF: /* 0x1c6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (454 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C7FF: /* 0x1c7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (455 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C8FF: /* 0x1c8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (456 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C9FF: /* 0x1c9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (457 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CAFF: /* 0x1ca */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (458 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CBFF: /* 0x1cb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (459 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CCFF: /* 0x1cc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (460 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CDFF: /* 0x1cd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (461 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CEFF: /* 0x1ce */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (462 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CFFF: /* 0x1cf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (463 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D0FF: /* 0x1d0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (464 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D1FF: /* 0x1d1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (465 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D2FF: /* 0x1d2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (466 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D3FF: /* 0x1d3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (467 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D4FF: /* 0x1d4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (468 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D5FF: /* 0x1d5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (469 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D6FF: /* 0x1d6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (470 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D7FF: /* 0x1d7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (471 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D8FF: /* 0x1d8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (472 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D9FF: /* 0x1d9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (473 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DAFF: /* 0x1da */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (474 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DBFF: /* 0x1db */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (475 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DCFF: /* 0x1dc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (476 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DDFF: /* 0x1dd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (477 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DEFF: /* 0x1de */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (478 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DFFF: /* 0x1df */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (479 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E0FF: /* 0x1e0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (480 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E1FF: /* 0x1e1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (481 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E2FF: /* 0x1e2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (482 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E3FF: /* 0x1e3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (483 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E4FF: /* 0x1e4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (484 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E5FF: /* 0x1e5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (485 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E6FF: /* 0x1e6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (486 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E7FF: /* 0x1e7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (487 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E8FF: /* 0x1e8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (488 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E9FF: /* 0x1e9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (489 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EAFF: /* 0x1ea */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (490 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EBFF: /* 0x1eb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (491 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ECFF: /* 0x1ec */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (492 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EDFF: /* 0x1ed */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (493 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EEFF: /* 0x1ee */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (494 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EFFF: /* 0x1ef */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (495 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_F0FF: /* 0x1f0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (496 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_F1FF: /* 0x1f1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (497 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_OBJECT_INIT_JUMBO: /* 0x1f2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (498 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_VOLATILE_JUMBO: /* 0x1f3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (499 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_VOLATILE_JUMBO: /* 0x1f4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (500 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_VOLATILE_JUMBO: /* 0x1f5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (501 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_VOLATILE_JUMBO: /* 0x1f6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (502 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_VOLATILE_JUMBO: /* 0x1f7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (503 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_VOLATILE_JUMBO: /* 0x1f8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (504 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_VOLATILE_JUMBO: /* 0x1f9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (505 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_VOLATILE_JUMBO: /* 0x1fa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (506 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_VOLATILE_JUMBO: /* 0x1fb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (507 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_VOLATILE_JUMBO: /* 0x1fc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (508 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_VOLATILE_JUMBO: /* 0x1fd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (509 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_VOLATILE_JUMBO: /* 0x1fe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (510 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW_VERIFICATION_ERROR_JUMBO: /* 0x1ff */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (511 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
.balign 64
.size dvmAsmAltInstructionStart, .-dvmAsmAltInstructionStart
.global dvmAsmAltInstructionEnd
dvmAsmAltInstructionEnd:
/* File: armv5te/footer.S */
-
/*
* ===========================================================================
* Common subroutines and data
* ===========================================================================
*/
-
-
.text
.align 2
#if defined(WITH_JIT)
+
#if defined(WITH_SELF_VERIFICATION)
+/*
+ * "longjmp" to a translation after single-stepping. Before returning
+ * to translation, must save state for self-verification.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r10, [rSELF,#offThread_jitResumeNPC] @ resume address
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ b jitSVShadowRunStart @ resume as if cache hit
+ @ expects resume addr in r10
+
.global dvmJitToInterpPunt
dvmJitToInterpPunt:
mov r2,#kSVSPunt @ r2<- interpreter entry point
@@ -21386,11 +26694,15 @@
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
+ mov rPC, r0 @ set up dalvik pc
+ EXPORT_PC()
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
mov r2,#kSVSSingleStep @ r2<- interpreter entry point
b jitSVShadowRunEnd @ doesn't return
+
.global dvmJitToInterpNoChainNoProfile
dvmJitToInterpNoChainNoProfile:
mov r0,rPC @ pass our target PC
@@ -21439,6 +26751,21 @@
str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land
b jitSVShadowRunEnd @ doesn't return
#else
+
+/*
+ * "longjmp" to a translation after single-stepping.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r0, [rSELF,#offThread_jitResumeNPC]
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ bx r0 @ resume translation
+
/*
* Return from the translation cache to the interpreter when the compiler is
* having issues translating/executing a Dalvik instruction. We have to skip
@@ -21463,26 +26790,33 @@
/*
* Return to the interpreter to handle a single instruction.
+ * We'll use the normal single-stepping mechanism via interpBreak,
+ * but also save the native pc of the resume point in the translation
+ * and the native sp so that we can later do the equivalent of a
+ * longjmp() to resume.
* On entry:
- * r0 <= PC
- * r1 <= PC of resume instruction
+ * dPC <= Dalvik PC of instrucion to interpret
* lr <= resume point in translation
+ * r1 <= Dalvik PC of next instruction
*/
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
- mov r1,#kInterpEntryInstr
- @ enum is 4 byte in aapcs-EABI
- str r1, [rSELF, #offThread_entryPoint]
- mov rPC,r0
+ mov rPC, r0 @ set up dalvik pc
EXPORT_PC()
-
- ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- mov r2,#kJitSingleStep @ Ask for single step and then revert
- str r2,[rSELF,#offThread_jitState]
- mov r1,#1 @ set changeInterp to bail to debug interp
- b common_gotoBail
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
+ mov r1, #1
+ str r1, [rSELF,#offThread_singleStepCount] @ just step once
+ mov r0, rSELF
+ mov r1, #kInterpSingleStep
+ mov r2, #kSubModeNormal
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
+ ldr rIBASE, [rSELF,#offThread_curHandlerTable]
+ FETCH_INST()
+ GET_INST_OPCODE(ip)
+ GOTO_OPCODE(ip)
/*
* Return from the translation cache and immediately request
@@ -21494,7 +26828,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21513,7 +26848,8 @@
add rINST,lr,#-5 @ save start of chain branch
add rINST, #-4 @ .. which is 9 bytes back
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq 2f
@@ -21528,7 +26864,7 @@
/* No translation, so request one if profiling isn't disabled*/
2:
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
cmp r0, #0
movne r2,#kJitTSelectRequestHot @ ask for trace selection
@@ -21559,7 +26895,8 @@
bl dvmBumpNormal
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq toInterpreter @ go if not, otherwise do chain
@@ -21581,7 +26918,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21603,7 +26941,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21621,21 +26960,27 @@
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
FETCH_INST()
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@ NOTE: intended fallthrough
/*
- * Common code to update potential trace start counter, and initiate
- * a trace-build if appropriate. On entry, rPC should point to the
- * next instruction to execute, and rINST should be already loaded with
- * the next opcode word, and r0 holds a pointer to the jit profile
- * table (pJitProfTable).
+ * Similar to common_updateProfile, but tests for null pJitProfTable
+ * r0 holds pJifProfTAble, rINST is loaded, rPC is current and
+ * rIBASE has been recently refreshed.
*/
common_testUpdateProfile:
- cmp r0,#0
- GET_INST_OPCODE(ip)
- GOTO_OPCODE_IFEQ(ip) @ if not profiling, fallthrough otherwise */
+ cmp r0, #0 @ JIT switched off?
+ beq 4f @ return to interp if so
+/*
+ * Common code to update potential trace start counter, and initiate
+ * a trace-build if appropriate.
+ * On entry here:
+ * r0 <= pJitProfTable (verified non-NULL)
+ * rPC <= Dalvik PC
+ * rINST <= next instruction
+ */
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
@@ -21645,18 +26990,13 @@
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
-/*
- * Here, we switch to the debug interpreter to request
- * trace selection. First, though, check to see if there
- * is already a native translation in place (and, if so,
- * jump to it now).
- */
-
- GET_JIT_THRESHOLD(r1)
+ /* Looks good, reset the counter */
+ ldr r1, [rSELF, #offThread_jitThreshold]
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
- bl dvmJitGetTraceAddr @ r0<- dvmJitGetTraceAddr(rPC)
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21687,15 +27027,30 @@
/*
* On entry:
- * r2 is jit state, e.g. kJitTSelectRequest or kJitTSelectRequestHot
+ * r2 is jit state.
*/
common_selectTrace:
-
+ ldrb r0,[rSELF,#offThread_breakFlags]
+ ands r0,#kInterpJitBreak
+ bne 3f @ already doing JIT work, continue
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
+ mov r0, rSELF
+/*
+ * Call out to validate trace-building request. If successful,
+ * rIBASE will be swapped to to send us into single-stepping trace
+ * building mode, so we need to refresh before we continue.
+ */
+ EXPORT_PC()
+ SAVE_PC_FP_TO_SELF() @ copy of pc/fp to Thread
+ bl dvmJitCheckTraceRequest
+3:
+ FETCH_INST()
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+4:
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip)
+ /* no return */
+#endif
#if defined(WITH_SELF_VERIFICATION)
/*
@@ -21717,23 +27072,27 @@
/*
* Restore PC, registers, and interpreter state to original values
* before jumping back to the interpreter.
+ * On entry:
+ * r0: dPC
+ * r2: self verification state
*/
jitSVShadowRunEnd:
mov r1,rFP @ pass ending fp
mov r3,rSELF @ pass self ptr for convenience
bl dvmSelfVerificationRestoreState @ restore pc and fp values
- ldr rPC,[rSELF,#offThread_pc] @ restore PC
- ldr rFP,[rSELF,#offThread_fp] @ restore FP
+ LOAD_PC_FP_FROM_SELF() @ restore pc, fp
ldr r1,[r0,#offShadowSpace_svState] @ get self verification state
cmp r1,#0 @ check for punt condition
beq 1f
+ @ Set up SV single-stepping
+ mov r0, rSELF
+ mov r1, #kInterpJitBreak
+ mov r2, #kSubModeJitSV
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
mov r2,#kJitSelfVerification @ ask for self verification
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
-
+ @ intentional fallthrough
1: @ exit to interpreter without check
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@@ -21742,133 +27101,32 @@
GOTO_OPCODE(ip)
#endif
-#endif
-
-/*
- * Common code when a backward branch is taken.
- *
- * TODO: we could avoid a branch by just setting r0 and falling through
- * into the common_periodicChecks code, and having a test on r0 at the
- * end determine if we should return to the caller or update & branch to
- * the next instr.
- *
- * On entry:
- * r9 is PC adjustment *in bytes*
- */
-common_backwardBranch:
- mov r0, #kInterpEntryInstr
- bl common_periodicChecks
-#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip)
- GOTO_OPCODE(ip)
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#endif
-
-
-/*
- * Need to see if the thread needs to be suspended or debugger/profiler
- * activity has begun. If so, we suspend the thread or side-exit to
- * the debug interpreter as appropriate.
- *
- * The common case is no activity on any of these, so we want to figure
- * that out quickly. If something is up, we can then sort out what.
- *
- * We want to be fast if the VM was built without debugger or profiler
- * support, but we also need to recognize that the system is usually
- * shipped with both of these enabled.
- *
- * TODO: reduce this so we're just checking a single location.
- *
- * On entry:
- * r0 is reentry type, e.g. kInterpEntryInstr (for debugger/profiling)
- * r9 is trampoline PC adjustment *in bytes*
- */
-common_periodicChecks:
-/* TUNING - make this a direct load when interpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r3<- &interpBreak
- /* speculatively thread-specific suspend count */
- ldr ip, [rSELF, #offThread_suspendCount]
- ldr r1, [r1] @ r1<- interpBreak
- cmp r1, #0 @ anything unusual?
- bxeq lr @ return if not
- /*
- * One or more interesting events have happened. Figure out what.
- *
- * r0 still holds the reentry type.
- */
- cmp ip, #0 @ want suspend?
- beq 3f @ no, must be something else
-
- stmfd sp!, {r0, lr} @ preserve r0 and lr
-#if defined(WITH_JIT)
- /*
- * Refresh the Jit's cached copy of profile table pointer. This pointer
- * doubles as the Jit's on/off switch.
- */
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ r3<-&gDvmJit.pJitProfTable
- mov r0, rSELF @ r0<- self
- ldr r3, [r3] @ r3 <- pJitProfTable
- EXPORT_PC() @ need for precise GC
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh Jit's on/off switch
-#else
- mov r0, rSELF @ r0<- self
- EXPORT_PC() @ need for precise GC
-#endif
- bl dvmCheckSuspendPending @ do full check, suspend if necessary
- ldmfd sp!, {r0, lr} @ restore r0 and lr
-
- /*
- * Reload the interpBreak flags - they may have changed while we
- * were suspended.
- */
-/* TUNING - direct load when InterpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r1<- &interpBreak
- ldr r1, [r1] @ r1<- interpBreak
-3:
- /*
- * TODO: this code is too fragile. Need a general mechanism
- * to identify what actions to take by submode. Some profiling modes
- * (instruction count) need to single-step, while method tracing
- * may not. Debugging with breakpoints can run unfettered, but
- * source-level single-stepping requires Dalvik singlestepping.
- * GC may require a one-shot action and then full-speed resumption.
- */
- ands r1, #(kSubModeDebuggerActive | kSubModeEmulatorTrace | kSubModeInstCounting)
- bxeq lr @ nothing to do, return
-
- @ debugger/profiler enabled, bail out; self->entryPoint was set above
- str r0, [rSELF, #offThread_entryPoint] @ store r0, need for debug/prof
- add rPC, rPC, r9 @ update rPC
- mov r1, #1 @ "want switch" = true
- b common_gotoBail @ side exit
-
-
/*
* The equivalent of "goto bail", this calls through the "bail handler".
+ * It will end this interpreter activation, and return to the caller
+ * of dvmMterpStdRun.
*
- * State registers will be saved to the "thread" area before bailing.
- *
- * On entry:
- * r1 is "bool changeInterp", indicating if we want to switch to the
- * other interpreter or just bail all the way out
+ * State registers will be saved to the "thread" area before bailing
+ * debugging purposes
*/
common_gotoBail:
SAVE_PC_FP_TO_SELF() @ export state to "thread"
mov r0, rSELF @ r0<- self ptr
b dvmMterpStdBail @ call(self, changeInterp)
- @add r1, r1, #1 @ using (boolean+1)
- @add r0, rSELF, #offThread_jmpBuf @ r0<- &self->jmpBuf
- @bl _longjmp @ does not return
- @bl common_abort
-
+/*
+ * The JIT's invoke method needs to remember the callsite class and
+ * target pair. Save them here so that they are available to
+ * dvmCheckJit following the interpretation of this invoke.
+ */
+#if defined(WITH_JIT)
+save_callsiteinfo:
+ cmp r9, #0
+ ldrne r9, [r9, #offObject_clazz]
+ str r0, [rSELF, #offThread_methodToCall]
+ str r9, [rSELF, #offThread_callsiteClass]
+ bx lr
+#endif
/*
* Common code for jumbo method invocation.
@@ -21876,12 +27134,20 @@
* As a result, the savedPc in the stack frame will not be wholly accurate. So
* long as that is only used for source file line number calculations, we're
* okay.
- *
- * On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
*/
+common_invokeMethodJumboNoThis:
+#if defined(WITH_JIT)
+ /* On entry: r0 is "Method* methodToCall */
+ mov r9, #0 @ clear "this"
+#endif
common_invokeMethodJumbo:
+ /* On entry: r0 is "Method* methodToCall, r9 is "this" */
.LinvokeNewJumbo:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
add rPC, rPC, #4 @ adjust pc to make return consistent
FETCH(r2, 1) @ r2<- BBBB (arg count)
@@ -21895,10 +27161,15 @@
* Common code for method invocation with range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodRange:
.LinvokeNewRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #8 @ r2<- AA (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -21920,10 +27191,15 @@
* Common code for method invocation without range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodNoRange:
.LinvokeNewNoRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #12 @ r2<- B (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -21970,12 +27246,11 @@
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
sub r3, r10, r3, lsl #2 @ r3<- bottom (newsave - outsSize)
cmp r3, r9 @ bottom < interpStackEnd?
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r3, [r0, #offMethod_accessFlags] @ r3<- methodToCall->accessFlags
blo .LstackOverflow @ yes, this frame will overflow stack
@ set up newSaveArea
- ldr lr, [lr] @ lr<- active submodes
#ifdef EASY_GDB
SAVEAREA_FROM_FP(ip, rFP) @ ip<- stack save area
str ip, [r10, #offStackSaveArea_prevSave]
@@ -21986,15 +27261,12 @@
mov r9, #0
str r9, [r10, #offStackSaveArea_returnAddr]
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 1f @ skip if not
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r1, rSELF
- @ r0=methodToCall, r1=rSELF
- bl dvmFastMethodTraceEnter
- ldmfd sp!, {r0-r3} @ restore r0-r3
-1:
str r0, [r10, #offStackSaveArea_method]
+
+ @ Profiling?
+ cmp lr, #0 @ any special modes happening?
+ bne 2f @ go if so
+1:
tst r3, #ACC_NATIVE
bne .LinvokeNative
@@ -22021,8 +27293,10 @@
@ r0=methodToCall, r1=newFp, r3=newMethodClass, r9=newINST
str r0, [rSELF, #offThread_method] @ self->method = methodToCall
str r3, [rSELF, #offThread_methodClassDex] @ self->methodClassDex = ...
+ mov r2, #1
+ str r2, [rSELF, #offThread_debugIsMethodEntry]
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
mov rFP, r1 @ fp = newFp
GET_PREFETCHED_OPCODE(ip, r9) @ extract prefetched opcode from r9
mov rINST, r9 @ publish new rINST
@@ -22038,15 +27312,22 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+2:
+ @ Profiling - record method entry. r0: methodToCall
+ stmfd sp!, {r0-r3} @ preserve r0-r3
+ mov r1, r0
+ mov r0, rSELF
+ bl dvmReportInvoke @ (self, method)
+ ldmfd sp!, {r0-r3} @ restore r0-r3
+ b 1b
+
.LinvokeNative:
@ Prep for the native call
@ r0=methodToCall, r1=newFp, r10=newSaveArea
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r9, [rSELF, #offThread_jniLocal_topCookie]@r9<-thread->localRef->...
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r10, #offStackSaveArea_localRefCookie] @newFp->localRefCookie=top
- ldr lr, [lr] @ lr<- active submodes
-
mov r2, r0 @ r2<- methodToCall
mov r0, r1 @ r0<- newFp (points to args)
add r1, rSELF, #offThread_retval @ r1<- &retval
@@ -22063,45 +27344,45 @@
.Lskip:
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- bne 330f @ hop if so
+ cmp lr, #0 @ any special SubModes active?
+ bne 11f @ go handle them if so
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
-220:
-#if defined(WITH_JIT)
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ Refresh Jit's on/off status
-#endif
+7:
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved top
ldr r1, [rSELF, #offThread_exception] @ check for exception
-#if defined(WITH_JIT)
- ldr r3, [r3] @ r3 <- gDvmJit.pProfTable
-#endif
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
-#if defined(WITH_JIT)
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh cached on/off switch
-#endif
bne common_exceptionThrown @ no, handle exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-330:
- @ r2=JNIMethod, r6=rSELF
- stmfd sp!, {r2,r6}
+11:
+ @ r0=newFp, r1=&retval, r2=methodToCall, r3=self, lr=subModes
+ stmfd sp!, {r0-r3} @ save all but subModes
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPreNativeInvoke @ (pc, self, methodToCall)
+ ldmfd sp, {r0-r3} @ refresh. NOTE: no sp autoincrement
+ @ Call the native method
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
- @ r0=JNIMethod, r1=rSELF
- ldmfd sp!, {r0-r1}
- bl dvmFastNativeMethodTraceExit
- b 220b
+ @ Restore the pre-call arguments
+ ldmfd sp!, {r0-r3} @ r2<- methodToCall (others unneeded)
+
+ @ Finish up any post-invoke subMode requirements
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPostNativeInvoke @ (pc, self, methodToCall)
+ b 7b @ resume
.LstackOverflow: @ r0=methodToCall
mov r1, r0 @ r1<- methodToCall
@@ -22149,37 +27430,27 @@
*/
common_returnFromMethod:
.LreturnNew:
- mov r0, #kInterpEntryReturn
- mov r9, #0
- bl common_periodicChecks
-
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r0, rFP)
- ldr lr, [lr] @ lr<- active submodes
ldr r9, [r0, #offStackSaveArea_savedPc] @ r9 = saveArea->savedPc
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 333f
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r0, rSELF
- @ r0=rSELF
- bl dvmFastJavaMethodTraceExit
- ldmfd sp!, {r0-r3} @ restore r0-r3
-333:
+ cmp lr, #0 @ any special subMode handling needed?
+ bne 19f
+14:
ldr rFP, [r0, #offStackSaveArea_prevFrame] @ fp = saveArea->prevFrame
ldr r2, [rFP, #(offStackSaveArea_method - sizeofStackSaveArea)]
@ r2<- method we're returning to
cmp r2, #0 @ is this a break frame?
#if defined(WORKAROUND_CORTEX_A9_745320)
/* Don't use conditional loads if the HW defect exists */
- beq 101f
+ beq 15f
ldr r10, [r2, #offMethod_clazz] @ r10<- method->clazz
-101:
+15:
#else
ldrne r10, [r2, #offMethod_clazz] @ r10<- method->clazz
#endif
- mov r1, #0 @ "want switch" = false
beq common_gotoBail @ break frame, bail out completely
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
PREFETCH_ADVANCE_INST(rINST, r9, 3) @ advance r9, update new rINST
str r2, [rSELF, #offThread_method]@ self->method = newSave->method
ldr r1, [r10, #offClassObject_pDvmDex] @ r1<- method->clazz->pDvmDex
@@ -22200,6 +27471,16 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+19:
+ @ Handle special actions
+ @ On entry, r0: StackSaveArea
+ ldr r2, [r0, #offStackSaveArea_prevFrame] @ r2<- prevFP
+ mov r1, rPC
+ mov r0, rSELF
+ bl dvmReportReturn @ (self, pc, prevFP)
+ SAVEAREA_FROM_FP(r0, rFP) @ restore StackSaveArea
+ b 14b @ continue
+
/*
* Return handling, calls through "glue code".
*/
@@ -22225,17 +27506,24 @@
dvmMterpCommonExceptionThrown:
common_exceptionThrown:
.LexceptionNew:
- mov r0, #kInterpEntryThrow
- mov r9, #0
- bl common_periodicChecks
+
+ EXPORT_PC()
+
+ mov r0, rSELF
+ bl dvmCheckSuspendPending
ldr r9, [rSELF, #offThread_exception] @ r9<- self->exception
mov r1, rSELF @ r1<- self
mov r0, r9 @ r0<- exception
bl dvmAddTrackedAlloc @ don't let the exception be GCed
+ ldrb r2, [rSELF, #offThread_subMode] @ get subMode flags
mov r3, #0 @ r3<- NULL
str r3, [rSELF, #offThread_exception] @ self->exception = NULL
+ @ Special subMode?
+ cmp r2, #0 @ any special subMode handling needed?
+ bne 7f @ go if so
+8:
/* set up args and a local for "&fp" */
/* (str sp, [sp, #-4]! would be perfect here, but is discouraged) */
str rFP, [sp, #-4]! @ *--sp = fp
@@ -22245,6 +27533,7 @@
ldr r1, [rSELF, #offThread_method] @ r1<- self->method
mov r0, rSELF @ r0<- self
ldr r1, [r1, #offMethod_insns] @ r1<- method->insns
+ ldrb lr, [rSELF, #offThread_subMode] @ lr<- subMode flags
mov r2, r9 @ r2<- exception
sub r1, rPC, r1 @ r1<- pc - method->insns
mov r1, r1, asr #1 @ r1<- offset in code units
@@ -22285,12 +27574,22 @@
bl dvmReleaseTrackedAlloc @ release the exception
/* restore the exception if the handler wants it */
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp ip, #OP_MOVE_EXCEPTION @ is it "move-exception"?
streq r9, [rSELF, #offThread_exception] @ yes, restore the exception
GOTO_OPCODE(ip) @ jump to next instruction
+ @ Manage debugger bookkeeping
+7:
+ mov r0, rSELF @ arg0<- self
+ ldr r1, [rSELF, #offThread_method] @ arg1<- curMethod
+ mov r2, rPC @ arg2<- pc
+ mov r3, rFP @ arg3<- fp
+ bl dvmReportExceptionThrow @ (self, method, pc, fp)
+ b 8b @ resume with normal handling
+
.LnotCaughtLocally: @ r9=exception
/* fix stack overflow if necessary */
ldrb r1, [rSELF, #offThread_stackOverflowed]
@@ -22327,7 +27626,6 @@
mov r0, r9 @ r0<- exception
mov r1, rSELF @ r1<- self
bl dvmReleaseTrackedAlloc @ release the exception
- mov r1, #0 @ "want switch" = false
b common_gotoBail @ bail out
@@ -22342,6 +27640,30 @@
b common_resumeAfterGlueCall
.endif
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including the current
+ * instruction.
+ *
+ * On entry:
+ * r10: &dvmDex->pResFields[field]
+ * r0: field pointer (must preserve)
+ */
+common_verifyField:
+ ldrb r3, [rSELF, #offThread_subMode] @ r3 <- submode byte
+ ands r3, #kSubModeJitTraceBuild
+ bxeq lr @ Not building trace, continue
+ ldr r1, [r10] @ r1<- reload resolved StaticField ptr
+ cmp r1, #0 @ resolution complete?
+ bxne lr @ yes, continue
+ stmfd sp!, {r0-r2,lr} @ save regs
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self,pc) end trace before this inst
+ ldmfd sp!, {r0-r2, lr}
+ bx lr @ return
+#endif
/*
* After returning from a "glued" function, pull out the updated
@@ -22349,6 +27671,7 @@
*/
common_resumeAfterGlueCall:
LOAD_PC_FP_FROM_SELF() @ pull rPC and rFP out of thread
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/out/InterpAsm-armv7-a-neon.S b/vm/mterp/out/InterpAsm-armv7-a-neon.S
index 8bd992b..7132faf 100644
--- a/vm/mterp/out/InterpAsm-armv7-a-neon.S
+++ b/vm/mterp/out/InterpAsm-armv7-a-neon.S
@@ -138,7 +138,7 @@
* rPC to point to the next instruction. "_reg" must specify the distance
* in bytes, *not* 16-bit code units, and may be a signed value.
*
- * We want to write "ldrh rINST, [rPC, _reg, lsl #2]!", but some of the
+ * We want to write "ldrh rINST, [rPC, _reg, lsl #1]!", but some of the
* bits that hold the shift distance are used for the half/byte/sign flags.
* In some cases we can pre-double _reg for free, so we require a byte offset
* here.
@@ -176,6 +176,7 @@
* interpreter, we don't have to worry about pre-ARMv5 THUMB interwork.
*/
#define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6
+#define GOTO_OPCODE_BASE(_base,_reg) add pc, _base, _reg, lsl #6
#define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6
#define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6
@@ -185,11 +186,6 @@
#define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2]
#define SET_VREG(_reg, _vreg) str _reg, [rFP, _vreg, lsl #2]
-#if defined(WITH_JIT)
-#define GET_JIT_PROF_TABLE(_reg) ldr _reg,[rSELF,#offThread_pJitProfTable]
-#define GET_JIT_THRESHOLD(_reg) ldr _reg,[rSELF,#offThread_jitThreshold]
-#endif
-
/*
* Convert a virtual register index into an address.
*/
@@ -282,8 +278,7 @@
* On entry:
* r0 Thread* self
*
- * This function returns a boolean "changeInterp" value. The return comes
- * via a call to dvmMterpStdBail().
+ * The return comes via a call to dvmMterpStdBail().
*/
dvmMterpStdRun:
#define MTERP_ENTRY1 \
@@ -302,16 +297,13 @@
/* set up "named" registers, figure out entry point */
mov rSELF, r0 @ set rSELF
- ldr r1, [r0, #offThread_entryPoint] @ enum is 4 bytes in aapcs-EABI
LOAD_PC_FP_FROM_SELF() @ load rPC and rFP from "thread"
ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ set rIBASE
- cmp r1, #kInterpEntryInstr @ usual case?
- bne .Lnot_instr @ no, handle it
#if defined(WITH_JIT)
.LentryInstr:
/* Entry is always a possible trace start */
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
mov r1, #0 @ prepare the value for the new state
str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land
@@ -339,33 +331,6 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
-.Lnot_instr:
- cmp r1, #kInterpEntryReturn @ were we returning from a method?
- beq common_returnFromMethod
-
-.Lnot_return:
- cmp r1, #kInterpEntryThrow @ were we throwing an exception?
- beq common_exceptionThrown
-
-#if defined(WITH_JIT)
-.Lnot_throw:
- ldr r10,[rSELF, #offThread_jitResumeNPC]
- ldr r2,[rSELF, #offThread_jitResumeDPC]
- cmp r1, #kInterpEntryResume @ resuming after Jit single-step?
- bne .Lbad_arg
- cmp rPC,r2
- bne .LentryInstr @ must have branched, don't resume
-#if defined(WITH_SELF_VERIFICATION)
- @ self->entryPoint will be set in dvmSelfVerificationSaveState
- b jitSVShadowRunStart @ re-enter the translation after the
- @ single-stepped instruction
- @noreturn
-#endif
- mov r1, #kInterpEntryInstr
- str r1, [rSELF, #offThread_entryPoint]
- bx r10 @ re-enter the translation
-#endif
-
.Lbad_arg:
ldr r0, strBadEntryPoint
@ r1 holds value of entryPoint
@@ -389,11 +354,9 @@
*
* On entry:
* r0 Thread* self
- * r1 bool changeInterp
*/
dvmMterpStdBail:
- ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
- mov r0, r1 @ return the changeInterp value
+ ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
add sp, sp, #4 @ un-align 64
ldmfd sp!, {r4-r10,fp,pc} @ restore 9 regs and return
@@ -980,6 +943,9 @@
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .LOP_NEW_INSTANCE_resolve @ no, resolve it now
@@ -1120,22 +1086,19 @@
* double to get a byte offset.
*/
/* goto +AA */
+ /* tuning: use sbfx for 6t2+ targets */
mov r0, rINST, lsl #16 @ r0<- AAxx0000
- movs r9, r0, asr #24 @ r9<- ssssssAA (sign-extended)
- mov r9, r9, lsl #1 @ r9<- byte offset
- bmi common_backwardBranch @ backward branch, do periodic checks
+ movs r1, r0, asr #24 @ r1<- ssssssAA (sign-extended)
+ add r2, r1, r1 @ r2<- byte offset, set flags
+ @ If backwards branch refresh rIBASE
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) check for trace hotness
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
.balign 64
@@ -1149,20 +1112,15 @@
*/
/* goto/16 +AAAA */
FETCH_S(r0, 1) @ r0<- ssssAAAA (sign-extended)
- movs r9, r0, asl #1 @ r9<- byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
+ adds r1, r0, r0 @ r1<- byte offset, flags set
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) hot trace head?
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
.balign 64
@@ -1175,29 +1133,26 @@
* double to get a byte offset.
*
* Unlike most opcodes, this one is allowed to branch to itself, so
- * our "backward branch" test must be "<=0" instead of "<0". The ORRS
- * instruction doesn't affect the V flag, so we need to clear it
- * explicitly.
+ * our "backward branch" test must be "<=0" instead of "<0". Because
+ * we need the V bit set, we'll use an adds to convert from Dalvik
+ * offset to byte offset.
*/
/* goto/32 +AAAAAAAA */
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- cmp ip, ip @ (clear V flag during stall)
- orrs r0, r0, r1, lsl #16 @ r0<- AAAAaaaa, check sign
- mov r9, r0, asl #1 @ r9<- byte offset
- ble common_backwardBranch @ backward branch, do periodic checks
+ orr r0, r0, r1, lsl #16 @ r0<- AAAAaaaa
+ adds r1, r0, r0 @ r1<- byte offset
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ble common_testUpdateProfile @ (r0) hot trace head?
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
.balign 64
@@ -1210,6 +1165,9 @@
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them here.
*
+ * When the JIT is present, all targets are considered treated as
+ * a potential trace heads regardless of branch direction.
+ *
* for: packed-switch, sparse-switch
*/
/* op vAA, +BBBB */
@@ -1220,21 +1178,19 @@
GET_VREG(r1, r3) @ r1<- vAA
add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2
bl dvmInterpHandlePackedSwitch @ r0<- code-unit branch offset
- movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
- beq common_backwardBranch @ (want to use BLE but V is unknown)
+ adds r1, r0, r0 @ r1<- byte offset; clear V
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ cmp r0, #0
bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
.balign 64
@@ -1248,6 +1204,9 @@
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them here.
*
+ * When the JIT is present, all targets are considered treated as
+ * a potential trace heads regardless of branch direction.
+ *
* for: packed-switch, sparse-switch
*/
/* op vAA, +BBBB */
@@ -1258,21 +1217,19 @@
GET_VREG(r1, r3) @ r1<- vAA
add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2
bl dvmInterpHandleSparseSwitch @ r0<- code-unit branch offset
- movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
- beq common_backwardBranch @ (want to use BLE but V is unknown)
+ adds r1, r0, r0 @ r1<- byte offset; clear V
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ cmp r0, #0
bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1489,22 +1446,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bne 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movne r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1524,22 +1480,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- beq 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ moveq r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1559,22 +1514,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bge 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movge r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1594,22 +1548,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- blt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movlt r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1629,22 +1582,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- ble 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movle r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1664,22 +1616,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bgt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movgt r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1697,25 +1648,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bne 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movne r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1733,25 +1680,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- beq 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ moveq r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1769,25 +1712,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bge 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movge r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1805,25 +1744,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- blt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movlt r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1841,25 +1776,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- ble 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movle r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1877,25 +1808,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bgt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movgt r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -2768,8 +2695,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_resolve @ yes, do resolve
.LOP_SGET_finish: @ field ptr in r0
@@ -2791,8 +2718,8 @@
/* sget-wide vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_WIDE_resolve @ yes, do resolve
.LOP_SGET_WIDE_finish:
@@ -2822,8 +2749,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_resolve @ yes, do resolve
.LOP_SGET_OBJECT_finish: @ field ptr in r0
@@ -2849,8 +2776,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BOOLEAN_resolve @ yes, do resolve
.LOP_SGET_BOOLEAN_finish: @ field ptr in r0
@@ -2876,8 +2803,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BYTE_resolve @ yes, do resolve
.LOP_SGET_BYTE_finish: @ field ptr in r0
@@ -2903,8 +2830,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_CHAR_resolve @ yes, do resolve
.LOP_SGET_CHAR_finish: @ field ptr in r0
@@ -2930,8 +2857,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_SHORT_resolve @ yes, do resolve
.LOP_SGET_SHORT_finish: @ field ptr in r0
@@ -2956,8 +2883,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_resolve @ yes, do resolve
.LOP_SPUT_finish: @ field ptr in r0
@@ -2979,9 +2906,9 @@
/* sput-wide vAA, field@BBBB */
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
mov r9, rINST, lsr #8 @ r9<- AA
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_resolve @ yes, do resolve
@@ -3009,18 +2936,19 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-
+ beq .LOP_SPUT_OBJECT_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_finish: @ field ptr in r0
+ mov r2, rINST, lsr #8 @ r2<- AA
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[AA]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ @ no-op @ releasing store
+ b .LOP_SPUT_OBJECT_end
/* ------------------------------ */
.balign 64
@@ -3035,8 +2963,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BOOLEAN_resolve @ yes, do resolve
.LOP_SPUT_BOOLEAN_finish: @ field ptr in r0
@@ -3062,8 +2990,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BYTE_resolve @ yes, do resolve
.LOP_SPUT_BYTE_finish: @ field ptr in r0
@@ -3089,8 +3017,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_CHAR_resolve @ yes, do resolve
.LOP_SPUT_CHAR_finish: @ field ptr in r0
@@ -3116,8 +3044,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_SHORT_resolve @ yes, do resolve
.LOP_SPUT_SHORT_finish: @ field ptr in r0
@@ -3178,13 +3106,13 @@
.endif
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_resolve @ do resolve now
@@ -3215,11 +3143,11 @@
.endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodNoRange @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodNoRange @ r0=method, r9="this"
b common_errNullObject @ yes, throw exception
/* ------------------------------ */
@@ -3236,17 +3164,15 @@
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- pDvmDex
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
+ mov r9, #0 @ null "this" in delay slot
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
bne common_invokeMethodNoRange @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodNoRange @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ b .LOP_INVOKE_STATIC_resolve
/* ------------------------------ */
.balign 64
@@ -3265,16 +3191,16 @@
and r2, r2, #15 @ r2<- C (or stays CCCC)
.endif
EXPORT_PC() @ must export for invoke
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodNoRange @ jump to common handler
+ b common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -3335,13 +3261,13 @@
.endif
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_RANGE_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_RANGE_resolve @ do resolve now
@@ -3374,11 +3300,11 @@
.endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_RANGE_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_RANGE_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodRange @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodRange @ r0=method, r9="this"
b common_errNullObject @ yes, throw exception
@@ -3397,17 +3323,15 @@
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- pDvmDex
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
+ mov r9, #0 @ null "this" in delay slot
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
bne common_invokeMethodRange @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodRange @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ b .LOP_INVOKE_STATIC_RANGE_resolve
/* ------------------------------ */
@@ -3428,16 +3352,16 @@
and r2, r2, #15 @ r2<- C (or stays CCCC)
.endif
EXPORT_PC() @ must export for invoke
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodRange @ jump to common handler
+ b common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7100,8 +7024,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_VOLATILE_finish: @ field ptr in r0
@@ -7127,8 +7051,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_VOLATILE_resolve @ yes, do resolve
.LOP_SPUT_VOLATILE_finish: @ field ptr in r0
@@ -7229,8 +7153,8 @@
/* sget-wide vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_WIDE_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_WIDE_VOLATILE_finish:
@@ -7259,9 +7183,9 @@
/* sput-wide vAA, field@BBBB */
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
mov r9, rINST, lsr #8 @ r9<- AA
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_VOLATILE_resolve @ yes, do resolve
@@ -7282,9 +7206,19 @@
.balign 64
.L_OP_BREAKPOINT: /* 0xec */
/* File: armv5te/OP_BREAKPOINT.S */
-/* File: armv5te/unused.S */
- bl common_abort
-
+ /*
+ * Breakpoint handler.
+ *
+ * Restart this instruction with the original opcode. By
+ * the time we get here, the breakpoint will have already been
+ * handled.
+ */
+ mov r0, rPC
+ bl dvmGetOriginalOpcode @ (rPC)
+ FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst
+ and rINST, #0xff00
+ orr rINST, rINST, r0
+ GOTO_OPCODE(r0)
/* ------------------------------ */
.balign 64
@@ -7316,11 +7250,18 @@
* The first four args are in r0-r3, pointer to return value storage
* is on the stack. The function's return value is a flag that tells
* us if an exception was thrown.
+ *
+ * TUNING: could maintain two tables, pointer in Thread and
+ * swap if profiler/debuggger active.
*/
/* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .LOP_EXECUTE_INLINE_debugmode @ yes - take slow path
+.LOP_EXECUTE_INLINE_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #12 @ r0<- B
str r1, [sp] @ push &self->retval
@@ -7348,9 +7289,13 @@
* us if an exception was thrown.
*/
/* [opt] execute-inline/range {vCCCC..v(CCCC+AA-1)}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .LOP_EXECUTE_INLINE_RANGE_debugmode @ yes - take slow path
+.LOP_EXECUTE_INLINE_RANGE_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #8 @ r0<- AA
str r1, [sp] @ push &self->retval
@@ -7369,7 +7314,7 @@
/*
* Invoke Object.<init> on an object. In practice we know that
* Object's nullary constructor doesn't do anything, so we just
- * skip it (we know a debugger isn't active).
+ * skip it unless a debugger is active.
*/
FETCH(r1, 2) @ r1<- CCCC
GET_VREG(r0, r1) @ r0<- "this" ptr
@@ -7378,13 +7323,12 @@
ldr r1, [r0, #offObject_clazz] @ r1<- obj->clazz
ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
- beq 1f @ nope, done
- EXPORT_PC() @ can throw
- bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
- ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
- cmp r0, #0 @ exception pending?
- bne common_exceptionThrown @ yes, handle it
-1: FETCH_ADVANCE_INST(2+1) @ advance to next instr, load rINST
+ bne .LOP_INVOKE_OBJECT_INIT_RANGE_setFinal @ yes, go
+.LOP_INVOKE_OBJECT_INIT_RANGE_finish:
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeDebuggerActive @ debugger active?
+ bne .LOP_INVOKE_OBJECT_INIT_RANGE_debugger @ Yes - skip optimization
+ FETCH_ADVANCE_INST(2+1) @ advance to next instr, load rINST
GET_INST_OPCODE(ip) @ ip<- opcode from rINST
GOTO_OPCODE(ip) @ execute it
@@ -7526,14 +7470,14 @@
.if (!0)
and r3, r3, #15 @ r3<- C (or stays CCCC)
.endif
- GET_VREG(r2, r3) @ r2<- vC ("this" ptr)
- cmp r2, #0 @ is "this" null?
+ GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r2, [r2, #offObject_clazz] @ r2<- thisPtr->clazz
+ ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
EXPORT_PC() @ invoke must export
ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -7552,14 +7496,14 @@
.if (!1)
and r3, r3, #15 @ r3<- C (or stays CCCC)
.endif
- GET_VREG(r2, r3) @ r2<- vC ("this" ptr)
- cmp r2, #0 @ is "this" null?
+ GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r2, [r2, #offObject_clazz] @ r2<- thisPtr->clazz
+ ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
EXPORT_PC() @ invoke must export
ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7582,12 +7526,12 @@
ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
EXPORT_PC() @ must export for invoke
ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
- GET_VREG(r3, r10) @ r3<- "this"
+ GET_VREG(r9, r10) @ r9<- "this"
ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
- cmp r3, #0 @ null "this" ref?
+ cmp r9, #0 @ null "this" ref?
ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
beq common_errNullObject @ "this" is null, throw exception
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -7610,12 +7554,12 @@
ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
EXPORT_PC() @ must export for invoke
ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
- GET_VREG(r3, r10) @ r3<- "this"
+ GET_VREG(r9, r10) @ r9<- "this"
ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
- cmp r3, #0 @ null "this" ref?
+ cmp r9, #0 @ null "this" ref?
ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
beq common_errNullObject @ "this" is null, throw exception
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7659,8 +7603,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_OBJECT_VOLATILE_finish: @ field ptr in r0
@@ -7686,18 +7630,19 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_VOLATILE_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-
+ beq .LOP_SPUT_OBJECT_VOLATILE_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_VOLATILE_finish: @ field ptr in r0
+ mov r2, rINST, lsr #8 @ r2<- AA
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[AA]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SMP_DMB @ releasing store
+ b .LOP_SPUT_OBJECT_VOLATILE_end
/* ------------------------------ */
@@ -7798,6 +7743,9 @@
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .LOP_NEW_INSTANCE_JUMBO_resolve @ no, resolve it now
@@ -8271,9 +8219,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_JUMBO_resolve @ yes, do resolve
.LOP_SGET_JUMBO_finish: @ field ptr in r0
@@ -8330,9 +8278,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_JUMBO_resolve @ yes, do resolve
.LOP_SGET_OBJECT_JUMBO_finish: @ field ptr in r0
@@ -8360,9 +8308,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BOOLEAN_JUMBO_resolve @ yes, do resolve
.LOP_SGET_BOOLEAN_JUMBO_finish: @ field ptr in r0
@@ -8390,9 +8338,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BYTE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_BYTE_JUMBO_finish: @ field ptr in r0
@@ -8420,9 +8368,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_CHAR_JUMBO_resolve @ yes, do resolve
.LOP_SGET_CHAR_JUMBO_finish: @ field ptr in r0
@@ -8450,9 +8398,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_SHORT_JUMBO_resolve @ yes, do resolve
.LOP_SGET_SHORT_JUMBO_finish: @ field ptr in r0
@@ -8479,9 +8427,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_JUMBO_finish: @ field ptr in r0
@@ -8504,10 +8452,10 @@
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- aaaa (lo)
FETCH(r2, 2) @ r2<- AAAA (hi)
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r1, r2, lsl #16 @ r1<- AAAAaaaa
FETCH(r9, 3) @ r9<- BBBB
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_JUMBO_resolve @ yes, do resolve
@@ -8534,18 +8482,20 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_JUMBO_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq .LOP_SPUT_OBJECT_JUMBO_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_JUMBO_finish: @ field ptr in r0
+ FETCH(r2, 3) @ r2<- BBBB
+ FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[BBBB]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ @ no-op @ releasing store
+ b .LOP_SPUT_OBJECT_JUMBO_end
/* ------------------------------ */
.balign 64
@@ -8562,9 +8512,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BOOLEAN_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_BOOLEAN_JUMBO_finish: @ field ptr in r0
@@ -8592,9 +8542,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BYTE_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_BYTE_JUMBO_finish: @ field ptr in r0
@@ -8622,9 +8572,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_CHAR_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_CHAR_JUMBO_finish: @ field ptr in r0
@@ -8652,9 +8602,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_SHORT_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_SHORT_JUMBO_finish: @ field ptr in r0
@@ -8706,13 +8656,13 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_JUMBO_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_JUMBO_resolve @ do resolve now
@@ -8740,11 +8690,11 @@
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_JUMBO_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_JUMBO_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodJumbo @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodJumbo @ (r0=method, r9="this")
b common_errNullObject @ yes, throw exception
/* ------------------------------ */
@@ -8761,16 +8711,13 @@
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- bne common_invokeMethodJumbo @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodJumbo @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ bne common_invokeMethodJumboNoThis @ (r0=method)
+ b .LOP_INVOKE_STATIC_JUMBO_resolve
/* ------------------------------ */
.balign 64
@@ -8785,16 +8732,16 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
EXPORT_PC() @ must export for invoke
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodJumbo @ jump to common handler
+ b common_invokeMethodJumbo @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -10428,7 +10375,7 @@
/*
* Invoke Object.<init> on an object. In practice we know that
* Object's nullary constructor doesn't do anything, so we just
- * skip it (we know a debugger isn't active).
+ * skip it unless a debugger is active.
*/
FETCH(r1, 4) @ r1<- CCCC
GET_VREG(r0, r1) @ r0<- "this" ptr
@@ -10437,13 +10384,12 @@
ldr r1, [r0, #offObject_clazz] @ r1<- obj->clazz
ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
- beq 1f @ nope, done
- EXPORT_PC() @ can throw
- bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
- ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
- cmp r0, #0 @ exception pending?
- bne common_exceptionThrown @ yes, handle it
-1: FETCH_ADVANCE_INST(4+1) @ advance to next instr, load rINST
+ bne .LOP_INVOKE_OBJECT_INIT_JUMBO_setFinal @ yes, go
+.LOP_INVOKE_OBJECT_INIT_JUMBO_finish:
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeDebuggerActive @ debugger active?
+ bne .LOP_INVOKE_OBJECT_INIT_JUMBO_debugger @ Yes - skip optimization
+ FETCH_ADVANCE_INST(4+1) @ advance to next instr, load rINST
GET_INST_OPCODE(ip) @ ip<- opcode from rINST
GOTO_OPCODE(ip) @ execute it
@@ -10627,9 +10573,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -10690,9 +10636,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -10721,9 +10667,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -10748,10 +10694,10 @@
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- aaaa (lo)
FETCH(r2, 2) @ r2<- AAAA (hi)
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r1, r2, lsl #16 @ r1<- AAAAaaaa
FETCH(r9, 3) @ r9<- BBBB
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve @ yes, do resolve
@@ -10780,18 +10726,20 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq .LOP_SPUT_OBJECT_VOLATILE_JUMBO_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
+ FETCH(r2, 3) @ r2<- BBBB
+ FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[BBBB]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SMP_DMB @ releasing store
+ b .LOP_SPUT_OBJECT_VOLATILE_JUMBO_end
/* ------------------------------ */
@@ -10988,12 +10936,45 @@
.LOP_NEW_INSTANCE_finish: @ r0=new object
mov r3, rINST, lsr #8 @ r3<- AA
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .LOP_NEW_INSTANCE_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.LOP_NEW_INSTANCE_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.LOP_NEW_INSTANCE_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .LOP_NEW_INSTANCE_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
@@ -11132,14 +11113,17 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY
bl dvmThrowInternalError
b common_exceptionThrown
- .if (!0) @ define in one or the other, not both
-.L_strFilledNewArrayNotImpl:
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY:
.word .LstrFilledNewArrayNotImpl
- .endif
/* continuation for OP_FILLED_NEW_ARRAY_RANGE */
@@ -11213,14 +11197,17 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_RANGE_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_RANGE
bl dvmThrowInternalError
b common_exceptionThrown
- .if (!1) @ define in one or the other, not both
-.L_strFilledNewArrayNotImpl:
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_RANGE:
.word .LstrFilledNewArrayNotImpl
- .endif
/* continuation for OP_CMPL_FLOAT */
.LOP_CMPL_FLOAT_finish:
@@ -11611,216 +11598,378 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_finish
/* continuation for OP_SGET_WIDE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r0.
*/
.LOP_SGET_WIDE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r1<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_WIDE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_WIDE_finish @ resume
/* continuation for OP_SGET_OBJECT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_finish
/* continuation for OP_SGET_BOOLEAN */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BOOLEAN_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BOOLEAN_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BOOLEAN_finish
/* continuation for OP_SGET_BYTE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BYTE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BYTE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BYTE_finish
/* continuation for OP_SGET_CHAR */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_CHAR_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_CHAR_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_CHAR_finish
/* continuation for OP_SGET_SHORT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_SHORT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_SHORT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_SHORT_finish
/* continuation for OP_SPUT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_finish @ resume
/* continuation for OP_SPUT_WIDE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
- * r9: &fp[AA]
+ * r1: BBBB field ref
+ * r9: &fp[AA]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_finish @ resume
/* continuation for OP_SPUT_OBJECT */
-.LOP_SPUT_OBJECT_finish: @ field ptr in r0
- mov r2, rINST, lsr #8 @ r2<- AA
- FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[AA]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- @ no-op @ releasing store
+
+
+.LOP_SPUT_OBJECT_end:
str r1, [r0, #offStaticField_value] @ field<- vAA
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
-/* continuation for OP_SPUT_BOOLEAN */
-
- /*
- * Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ /* Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
-.LOP_SPUT_BOOLEAN_resolve:
+.LOP_SPUT_OBJECT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BOOLEAN_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_finish @ resume
+
+
+/* continuation for OP_SPUT_BOOLEAN */
+
+ /*
+ * Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_BOOLEAN_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BOOLEAN_finish @ resume
/* continuation for OP_SPUT_BYTE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_BYTE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BYTE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BYTE_finish @ resume
/* continuation for OP_SPUT_CHAR */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_CHAR_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_CHAR_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_CHAR_finish @ resume
/* continuation for OP_SPUT_SHORT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_SHORT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_SHORT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_SHORT_finish @ resume
/* continuation for OP_INVOKE_VIRTUAL */
@@ -11830,24 +11979,24 @@
* r10 = C or CCCC (index of first arg, which is the "this" ptr)
*/
.LOP_INVOKE_VIRTUAL_continue:
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -11858,7 +12007,7 @@
bl common_invokeMethodNoRange @ continue on
.LOP_INVOKE_SUPER_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -11886,10 +12035,42 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC */
+
+
+.LOP_INVOKE_STATIC_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodNoRange @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodNoRange @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodNoRange @ whew, finally!
+#else
+ bne common_invokeMethodNoRange @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
/* continuation for OP_INVOKE_VIRTUAL_RANGE */
/*
@@ -11898,24 +12079,24 @@
* r10 = C or CCCC (index of first arg, which is the "this" ptr)
*/
.LOP_INVOKE_VIRTUAL_RANGE_continue:
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER_RANGE */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_RANGE_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -11926,7 +12107,7 @@
bl common_invokeMethodRange @ continue on
.LOP_INVOKE_SUPER_RANGE_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -11954,10 +12135,42 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_RANGE_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC_RANGE */
+
+
+.LOP_INVOKE_STATIC_RANGE_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodRange @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodRange @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodRange @ whew, finally!
+#else
+ bne common_invokeMethodRange @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
/* continuation for OP_FLOAT_TO_LONG */
/*
* Convert the float in r0 to a long in r0/r1.
@@ -12143,31 +12356,53 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_VOLATILE_finish
/* continuation for OP_SPUT_VOLATILE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_VOLATILE_finish @ resume
/* continuation for OP_IGET_OBJECT_VOLATILE */
@@ -12244,37 +12479,59 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r0.
*/
.LOP_SGET_WIDE_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r1<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_WIDE_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_WIDE_VOLATILE_finish @ resume
/* continuation for OP_SPUT_WIDE_VOLATILE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
- * r9: &fp[AA]
+ * r1: BBBB field ref
+ * r9: &fp[AA]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_VOLATILE_finish @ resume
/* continuation for OP_EXECUTE_INLINE */
@@ -12308,6 +12565,36 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.LOP_EXECUTE_INLINE_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .LOP_EXECUTE_INLINE_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .LOP_EXECUTE_INLINE_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.LOP_EXECUTE_INLINE_table:
.word gDvmInlineOpsTable
@@ -12337,9 +12624,67 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.LOP_EXECUTE_INLINE_RANGE_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .LOP_EXECUTE_INLINE_RANGE_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .LOP_EXECUTE_INLINE_RANGE_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.LOP_EXECUTE_INLINE_RANGE_table:
.word gDvmInlineOpsTable
+
+/* continuation for OP_INVOKE_OBJECT_INIT_RANGE */
+
+.LOP_INVOKE_OBJECT_INIT_RANGE_setFinal:
+ EXPORT_PC() @ can throw
+ bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
+ ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
+ cmp r0, #0 @ exception pending?
+ bne common_exceptionThrown @ yes, handle it
+ b .LOP_INVOKE_OBJECT_INIT_RANGE_finish
+
+ /*
+ * A debugger is attached, so we need to go ahead and do
+ * this. For simplicity, we'll just jump directly to the
+ * corresponding handler. Note that we can't use
+ * rIBASE here because it may be in single-step mode.
+ * Load the primary table base directly.
+ */
+.LOP_INVOKE_OBJECT_INIT_RANGE_debugger:
+ ldr r1, [rSELF, #offThread_mainHandlerTable]
+ .if 0
+ mov ip, #OP_INVOKE_DIRECT_JUMBO
+ .else
+ mov ip, #OP_INVOKE_DIRECT_RANGE
+ .endif
+ GOTO_OPCODE_BASE(r1,ip) @ execute it
+
/* continuation for OP_IPUT_OBJECT_VOLATILE */
/*
@@ -12368,31 +12713,61 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_VOLATILE_finish
/* continuation for OP_SPUT_OBJECT_VOLATILE */
-.LOP_SPUT_OBJECT_VOLATILE_finish: @ field ptr in r0
- mov r2, rINST, lsr #8 @ r2<- AA
- FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[AA]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- SMP_DMB @ releasing store
+
+
+.LOP_SPUT_OBJECT_VOLATILE_end:
str r1, [r0, #offStaticField_value] @ field<- vAA
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+ /* Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_OBJECT_VOLATILE_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_VOLATILE_finish @ resume
+
+
/* continuation for OP_CONST_CLASS_JUMBO */
/*
@@ -12534,12 +12909,45 @@
.LOP_NEW_INSTANCE_JUMBO_finish: @ r0=new object
FETCH(r3, 3) @ r3<- BBBB
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .LOP_NEW_INSTANCE_JUMBO_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.LOP_NEW_INSTANCE_JUMBO_end:
FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vBBBB<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.LOP_NEW_INSTANCE_JUMBO_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .LOP_NEW_INSTANCE_JUMBO_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
@@ -12654,10 +13062,18 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_JUMBO_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_JUMBO
bl dvmThrowInternalError
b common_exceptionThrown
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_JUMBO:
+ .word .LstrFilledNewArrayNotImpl
+
/* continuation for OP_IGET_JUMBO */
/*
@@ -13093,16 +13509,27 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_JUMBO_finish @ resume
/* continuation for OP_SGET_WIDE_JUMBO */
@@ -13125,185 +13552,324 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_JUMBO_finish @ resume
/* continuation for OP_SGET_BOOLEAN_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BOOLEAN_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BOOLEAN_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BOOLEAN_JUMBO_finish @ resume
/* continuation for OP_SGET_BYTE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BYTE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BYTE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BYTE_JUMBO_finish @ resume
/* continuation for OP_SGET_CHAR_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_CHAR_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_CHAR_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_CHAR_JUMBO_finish @ resume
/* continuation for OP_SGET_SHORT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_SHORT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_SHORT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_SHORT_JUMBO_finish @ resume
/* continuation for OP_SPUT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_JUMBO_finish @ resume
/* continuation for OP_SPUT_WIDE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
- * r9: &fp[BBBB]
+ * r1: AAAAAAAA field ref
+ * r9: &fp[BBBB]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_JUMBO_finish @ resume
/* continuation for OP_SPUT_OBJECT_JUMBO */
-.LOP_SPUT_OBJECT_JUMBO_finish: @ field ptr in r0
- FETCH(r2, 3) @ r2<- BBBB
- FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[BBBB]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- @ no-op @ releasing store
+
+.LOP_SPUT_OBJECT_JUMBO_end:
str r1, [r0, #offStaticField_value] @ field<- vBBBB
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
-/* continuation for OP_SPUT_BOOLEAN_JUMBO */
-
- /*
- * Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ /* Continuation if the field has not yet been resolved.
+ * r1: AAAAaaaa field ref
+ * r10: dvmDex->pResFields
*/
-.LOP_SPUT_BOOLEAN_JUMBO_resolve:
- ldr r2, [rSELF, #offThread_method] @ r2<- current method
+.LOP_SPUT_OBJECT_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r9<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BOOLEAN_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_JUMBO_finish @ resume
+
+
+/* continuation for OP_SPUT_BOOLEAN_JUMBO */
+
+ /*
+ * Continuation if the field has not yet been resolved.
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_BOOLEAN_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BOOLEAN_JUMBO_finish @ resume
/* continuation for OP_SPUT_BYTE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_BYTE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BYTE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BYTE_JUMBO_finish @ resume
/* continuation for OP_SPUT_CHAR_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_CHAR_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_CHAR_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_CHAR_JUMBO_finish @ resume
/* continuation for OP_SPUT_SHORT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_SHORT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_SHORT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_SHORT_JUMBO_finish @ resume
/* continuation for OP_INVOKE_VIRTUAL_JUMBO */
@@ -13313,24 +13879,24 @@
*/
.LOP_INVOKE_VIRTUAL_JUMBO_continue:
FETCH(r10, 4) @ r10<- CCCC
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER_JUMBO */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_JUMBO_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -13338,10 +13904,10 @@
bcs .LOP_INVOKE_SUPER_JUMBO_nsm @ method not present in superclass
ldr r1, [r1, #offClassObject_vtable] @ r1<- ...clazz->super->vtable
ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
.LOP_INVOKE_SUPER_JUMBO_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -13369,10 +13935,68 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_JUMBO_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC_JUMBO */
+
+
+.LOP_INVOKE_STATIC_JUMBO_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodJumboNoThis @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodJumboNoThis @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodJumboNoThis @ whew, finally!
+#else
+ bne common_invokeMethodJumboNoThis @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
+/* continuation for OP_INVOKE_OBJECT_INIT_JUMBO */
+
+.LOP_INVOKE_OBJECT_INIT_JUMBO_setFinal:
+ EXPORT_PC() @ can throw
+ bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
+ ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
+ cmp r0, #0 @ exception pending?
+ bne common_exceptionThrown @ yes, handle it
+ b .LOP_INVOKE_OBJECT_INIT_JUMBO_finish
+
+ /*
+ * A debugger is attached, so we need to go ahead and do
+ * this. For simplicity, we'll just jump directly to the
+ * corresponding handler. Note that we can't use
+ * rIBASE here because it may be in single-step mode.
+ * Load the primary table base directly.
+ */
+.LOP_INVOKE_OBJECT_INIT_JUMBO_debugger:
+ ldr r1, [rSELF, #offThread_mainHandlerTable]
+ .if 1
+ mov ip, #OP_INVOKE_DIRECT_JUMBO
+ .else
+ mov ip, #OP_INVOKE_DIRECT_RANGE
+ .endif
+ GOTO_OPCODE_BASE(r1,ip) @ execute it
+
/* continuation for OP_IGET_VOLATILE_JUMBO */
/*
@@ -13568,16 +14192,27 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SGET_WIDE_VOLATILE_JUMBO */
@@ -13600,66 +14235,117 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_VOLATILE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_WIDE_VOLATILE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
- * r9: &fp[BBBB]
+ * r1: AAAAAAAA field ref
+ * r9: &fp[BBBB]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_OBJECT_VOLATILE_JUMBO */
-.LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
- FETCH(r2, 3) @ r2<- BBBB
- FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[BBBB]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- SMP_DMB @ releasing store
+
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_end:
str r1, [r0, #offStaticField_value] @ field<- vBBBB
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+ /* Continuation if the field has not yet been resolved.
+ * r1: AAAAaaaa field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r9<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ resume
+
+
.size dvmAsmSisterStart, .-dvmAsmSisterStart
.global dvmAsmSisterEnd
dvmAsmSisterEnd:
@@ -13667,7196 +14353,11818 @@
.global dvmAsmAltInstructionStart
.type dvmAsmAltInstructionStart, %function
-dvmAsmAltInstructionStart:
.text
+dvmAsmAltInstructionStart = .L_ALT_OP_NOP
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOP: /* 0x00 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (0 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE: /* 0x01 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (1 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_FROM16: /* 0x02 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (2 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_16: /* 0x03 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (3 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE: /* 0x04 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (4 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE_FROM16: /* 0x05 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (5 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE_16: /* 0x06 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (6 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT: /* 0x07 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (7 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT_FROM16: /* 0x08 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (8 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT_16: /* 0x09 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (9 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT: /* 0x0a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (10 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT_WIDE: /* 0x0b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (11 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT_OBJECT: /* 0x0c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (12 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_EXCEPTION: /* 0x0d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (13 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_VOID: /* 0x0e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (14 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN: /* 0x0f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (15 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_WIDE: /* 0x10 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (16 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_OBJECT: /* 0x11 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (17 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_4: /* 0x12 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (18 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_16: /* 0x13 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (19 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST: /* 0x14 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (20 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_HIGH16: /* 0x15 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (21 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_16: /* 0x16 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (22 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_32: /* 0x17 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (23 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE: /* 0x18 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (24 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_HIGH16: /* 0x19 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (25 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_STRING: /* 0x1a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (26 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_STRING_JUMBO: /* 0x1b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (27 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_CLASS: /* 0x1c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (28 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MONITOR_ENTER: /* 0x1d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (29 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MONITOR_EXIT: /* 0x1e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (30 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CHECK_CAST: /* 0x1f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (31 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INSTANCE_OF: /* 0x20 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (32 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ARRAY_LENGTH: /* 0x21 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (33 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_INSTANCE: /* 0x22 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (34 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_ARRAY: /* 0x23 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (35 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY: /* 0x24 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (36 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY_RANGE: /* 0x25 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (37 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILL_ARRAY_DATA: /* 0x26 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (38 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW: /* 0x27 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (39 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO: /* 0x28 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (40 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO_16: /* 0x29 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (41 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO_32: /* 0x2a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (42 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_PACKED_SWITCH: /* 0x2b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (43 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPARSE_SWITCH: /* 0x2c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (44 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPL_FLOAT: /* 0x2d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (45 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPG_FLOAT: /* 0x2e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (46 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPL_DOUBLE: /* 0x2f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (47 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPG_DOUBLE: /* 0x30 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (48 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMP_LONG: /* 0x31 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (49 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_EQ: /* 0x32 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (50 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_NE: /* 0x33 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (51 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LT: /* 0x34 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (52 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GE: /* 0x35 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (53 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GT: /* 0x36 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (54 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LE: /* 0x37 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (55 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_EQZ: /* 0x38 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (56 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_NEZ: /* 0x39 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (57 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LTZ: /* 0x3a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (58 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GEZ: /* 0x3b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (59 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GTZ: /* 0x3c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (60 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LEZ: /* 0x3d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (61 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3E: /* 0x3e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (62 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3F: /* 0x3f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (63 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_40: /* 0x40 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (64 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_41: /* 0x41 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (65 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_42: /* 0x42 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (66 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_43: /* 0x43 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (67 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET: /* 0x44 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (68 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_WIDE: /* 0x45 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (69 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_OBJECT: /* 0x46 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (70 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_BOOLEAN: /* 0x47 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (71 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_BYTE: /* 0x48 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (72 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_CHAR: /* 0x49 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (73 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_SHORT: /* 0x4a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (74 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT: /* 0x4b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (75 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_WIDE: /* 0x4c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (76 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_OBJECT: /* 0x4d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (77 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_BOOLEAN: /* 0x4e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (78 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_BYTE: /* 0x4f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (79 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_CHAR: /* 0x50 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (80 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_SHORT: /* 0x51 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (81 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET: /* 0x52 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (82 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE: /* 0x53 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (83 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT: /* 0x54 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (84 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BOOLEAN: /* 0x55 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (85 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BYTE: /* 0x56 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (86 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_CHAR: /* 0x57 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (87 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_SHORT: /* 0x58 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (88 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT: /* 0x59 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (89 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE: /* 0x5a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (90 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT: /* 0x5b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (91 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BOOLEAN: /* 0x5c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (92 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BYTE: /* 0x5d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (93 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_CHAR: /* 0x5e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (94 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_SHORT: /* 0x5f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (95 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET: /* 0x60 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (96 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE: /* 0x61 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (97 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT: /* 0x62 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (98 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BOOLEAN: /* 0x63 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (99 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BYTE: /* 0x64 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (100 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_CHAR: /* 0x65 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (101 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_SHORT: /* 0x66 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (102 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT: /* 0x67 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (103 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE: /* 0x68 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (104 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT: /* 0x69 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (105 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BOOLEAN: /* 0x6a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (106 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BYTE: /* 0x6b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (107 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_CHAR: /* 0x6c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (108 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_SHORT: /* 0x6d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (109 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL: /* 0x6e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (110 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER: /* 0x6f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (111 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT: /* 0x70 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (112 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC: /* 0x71 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (113 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE: /* 0x72 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (114 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_73: /* 0x73 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (115 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_RANGE: /* 0x74 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (116 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_RANGE: /* 0x75 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (117 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT_RANGE: /* 0x76 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (118 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC_RANGE: /* 0x77 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (119 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE_RANGE: /* 0x78 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (120 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_79: /* 0x79 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (121 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7A: /* 0x7a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (122 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_INT: /* 0x7b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (123 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOT_INT: /* 0x7c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (124 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_LONG: /* 0x7d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (125 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOT_LONG: /* 0x7e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (126 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_FLOAT: /* 0x7f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (127 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_DOUBLE: /* 0x80 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (128 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_LONG: /* 0x81 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (129 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_FLOAT: /* 0x82 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (130 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_DOUBLE: /* 0x83 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (131 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_INT: /* 0x84 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (132 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_FLOAT: /* 0x85 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (133 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_DOUBLE: /* 0x86 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (134 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_INT: /* 0x87 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (135 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_LONG: /* 0x88 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (136 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_DOUBLE: /* 0x89 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (137 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_INT: /* 0x8a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (138 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_LONG: /* 0x8b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (139 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_FLOAT: /* 0x8c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (140 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_BYTE: /* 0x8d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (141 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_CHAR: /* 0x8e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (142 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_SHORT: /* 0x8f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (143 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT: /* 0x90 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (144 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_INT: /* 0x91 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (145 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT: /* 0x92 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (146 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT: /* 0x93 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (147 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT: /* 0x94 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (148 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT: /* 0x95 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (149 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT: /* 0x96 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (150 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT: /* 0x97 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (151 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT: /* 0x98 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (152 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT: /* 0x99 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (153 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT: /* 0x9a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (154 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_LONG: /* 0x9b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (155 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_LONG: /* 0x9c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (156 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_LONG: /* 0x9d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (157 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_LONG: /* 0x9e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (158 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_LONG: /* 0x9f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (159 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_LONG: /* 0xa0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (160 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_LONG: /* 0xa1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (161 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_LONG: /* 0xa2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (162 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_LONG: /* 0xa3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (163 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_LONG: /* 0xa4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (164 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_LONG: /* 0xa5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (165 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_FLOAT: /* 0xa6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (166 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_FLOAT: /* 0xa7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (167 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_FLOAT: /* 0xa8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (168 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_FLOAT: /* 0xa9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (169 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_FLOAT: /* 0xaa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (170 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_DOUBLE: /* 0xab */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (171 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_DOUBLE: /* 0xac */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (172 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_DOUBLE: /* 0xad */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (173 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_DOUBLE: /* 0xae */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (174 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_DOUBLE: /* 0xaf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (175 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_2ADDR: /* 0xb0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (176 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_INT_2ADDR: /* 0xb1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (177 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_2ADDR: /* 0xb2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (178 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_2ADDR: /* 0xb3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (179 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_2ADDR: /* 0xb4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (180 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_2ADDR: /* 0xb5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (181 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_2ADDR: /* 0xb6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (182 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_2ADDR: /* 0xb7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (183 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT_2ADDR: /* 0xb8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (184 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT_2ADDR: /* 0xb9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (185 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT_2ADDR: /* 0xba */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (186 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_LONG_2ADDR: /* 0xbb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (187 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_LONG_2ADDR: /* 0xbc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (188 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_LONG_2ADDR: /* 0xbd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (189 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_LONG_2ADDR: /* 0xbe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (190 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_LONG_2ADDR: /* 0xbf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (191 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_LONG_2ADDR: /* 0xc0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (192 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_LONG_2ADDR: /* 0xc1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (193 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_LONG_2ADDR: /* 0xc2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (194 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_LONG_2ADDR: /* 0xc3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (195 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_LONG_2ADDR: /* 0xc4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (196 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_LONG_2ADDR: /* 0xc5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (197 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_FLOAT_2ADDR: /* 0xc6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (198 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_FLOAT_2ADDR: /* 0xc7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (199 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_FLOAT_2ADDR: /* 0xc8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (200 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_FLOAT_2ADDR: /* 0xc9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (201 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_FLOAT_2ADDR: /* 0xca */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (202 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_DOUBLE_2ADDR: /* 0xcb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (203 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_DOUBLE_2ADDR: /* 0xcc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (204 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_DOUBLE_2ADDR: /* 0xcd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (205 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_DOUBLE_2ADDR: /* 0xce */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (206 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_DOUBLE_2ADDR: /* 0xcf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (207 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_LIT16: /* 0xd0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (208 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RSUB_INT: /* 0xd1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (209 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_LIT16: /* 0xd2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (210 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_LIT16: /* 0xd3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (211 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_LIT16: /* 0xd4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (212 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_LIT16: /* 0xd5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (213 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_LIT16: /* 0xd6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (214 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_LIT16: /* 0xd7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (215 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_LIT8: /* 0xd8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (216 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RSUB_INT_LIT8: /* 0xd9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (217 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_LIT8: /* 0xda */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (218 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_LIT8: /* 0xdb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (219 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_LIT8: /* 0xdc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (220 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_LIT8: /* 0xdd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (221 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_LIT8: /* 0xde */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (222 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_LIT8: /* 0xdf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (223 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT_LIT8: /* 0xe0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (224 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT_LIT8: /* 0xe1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (225 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT_LIT8: /* 0xe2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (226 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_VOLATILE: /* 0xe3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (227 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_VOLATILE: /* 0xe4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (228 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_VOLATILE: /* 0xe5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (229 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_VOLATILE: /* 0xe6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (230 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_VOLATILE: /* 0xe7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (231 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_VOLATILE: /* 0xe8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (232 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_VOLATILE: /* 0xe9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (233 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_VOLATILE: /* 0xea */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (234 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_VOLATILE: /* 0xeb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (235 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_BREAKPOINT: /* 0xec */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (236 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW_VERIFICATION_ERROR: /* 0xed */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (237 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_EXECUTE_INLINE: /* 0xee */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (238 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_EXECUTE_INLINE_RANGE: /* 0xef */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (239 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_OBJECT_INIT_RANGE: /* 0xf0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (240 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_VOID_BARRIER: /* 0xf1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (241 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_QUICK: /* 0xf2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (242 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_QUICK: /* 0xf3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (243 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_QUICK: /* 0xf4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (244 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_QUICK: /* 0xf5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (245 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_QUICK: /* 0xf6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (246 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_QUICK: /* 0xf7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (247 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_QUICK: /* 0xf8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (248 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_QUICK_RANGE: /* 0xf9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (249 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_QUICK: /* 0xfa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (250 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_QUICK_RANGE: /* 0xfb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (251 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_VOLATILE: /* 0xfc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (252 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_VOLATILE: /* 0xfd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (253 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_VOLATILE: /* 0xfe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (254 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DISPATCH_FF: /* 0xff */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (255 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_CLASS_JUMBO: /* 0x100 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (256 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CHECK_CAST_JUMBO: /* 0x101 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (257 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INSTANCE_OF_JUMBO: /* 0x102 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (258 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_INSTANCE_JUMBO: /* 0x103 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (259 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_ARRAY_JUMBO: /* 0x104 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (260 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY_JUMBO: /* 0x105 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (261 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_JUMBO: /* 0x106 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (262 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_JUMBO: /* 0x107 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (263 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_JUMBO: /* 0x108 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (264 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BOOLEAN_JUMBO: /* 0x109 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (265 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BYTE_JUMBO: /* 0x10a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (266 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_CHAR_JUMBO: /* 0x10b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (267 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_SHORT_JUMBO: /* 0x10c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (268 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_JUMBO: /* 0x10d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (269 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_JUMBO: /* 0x10e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (270 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_JUMBO: /* 0x10f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (271 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BOOLEAN_JUMBO: /* 0x110 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (272 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BYTE_JUMBO: /* 0x111 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (273 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_CHAR_JUMBO: /* 0x112 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (274 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_SHORT_JUMBO: /* 0x113 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (275 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_JUMBO: /* 0x114 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (276 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_JUMBO: /* 0x115 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (277 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_JUMBO: /* 0x116 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (278 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BOOLEAN_JUMBO: /* 0x117 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (279 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BYTE_JUMBO: /* 0x118 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (280 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_CHAR_JUMBO: /* 0x119 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (281 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_SHORT_JUMBO: /* 0x11a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (282 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_JUMBO: /* 0x11b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (283 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_JUMBO: /* 0x11c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (284 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_JUMBO: /* 0x11d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (285 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BOOLEAN_JUMBO: /* 0x11e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (286 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BYTE_JUMBO: /* 0x11f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (287 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_CHAR_JUMBO: /* 0x120 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (288 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_SHORT_JUMBO: /* 0x121 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (289 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_JUMBO: /* 0x122 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (290 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_JUMBO: /* 0x123 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (291 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT_JUMBO: /* 0x124 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (292 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC_JUMBO: /* 0x125 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (293 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE_JUMBO: /* 0x126 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (294 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_27FF: /* 0x127 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (295 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_28FF: /* 0x128 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (296 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_29FF: /* 0x129 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (297 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2AFF: /* 0x12a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (298 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2BFF: /* 0x12b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (299 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2CFF: /* 0x12c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (300 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2DFF: /* 0x12d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (301 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2EFF: /* 0x12e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (302 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2FFF: /* 0x12f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (303 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_30FF: /* 0x130 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (304 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_31FF: /* 0x131 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (305 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_32FF: /* 0x132 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (306 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_33FF: /* 0x133 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (307 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_34FF: /* 0x134 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (308 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_35FF: /* 0x135 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (309 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_36FF: /* 0x136 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (310 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_37FF: /* 0x137 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (311 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_38FF: /* 0x138 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (312 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_39FF: /* 0x139 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (313 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3AFF: /* 0x13a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (314 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3BFF: /* 0x13b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (315 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3CFF: /* 0x13c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (316 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3DFF: /* 0x13d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (317 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3EFF: /* 0x13e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (318 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3FFF: /* 0x13f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (319 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_40FF: /* 0x140 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (320 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_41FF: /* 0x141 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (321 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_42FF: /* 0x142 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (322 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_43FF: /* 0x143 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (323 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_44FF: /* 0x144 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (324 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_45FF: /* 0x145 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (325 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_46FF: /* 0x146 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (326 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_47FF: /* 0x147 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (327 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_48FF: /* 0x148 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (328 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_49FF: /* 0x149 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (329 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4AFF: /* 0x14a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (330 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4BFF: /* 0x14b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (331 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4CFF: /* 0x14c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (332 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4DFF: /* 0x14d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (333 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4EFF: /* 0x14e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (334 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4FFF: /* 0x14f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (335 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_50FF: /* 0x150 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (336 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_51FF: /* 0x151 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (337 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_52FF: /* 0x152 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (338 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_53FF: /* 0x153 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (339 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_54FF: /* 0x154 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (340 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_55FF: /* 0x155 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (341 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_56FF: /* 0x156 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (342 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_57FF: /* 0x157 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (343 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_58FF: /* 0x158 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (344 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_59FF: /* 0x159 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (345 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5AFF: /* 0x15a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (346 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5BFF: /* 0x15b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (347 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5CFF: /* 0x15c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (348 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5DFF: /* 0x15d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (349 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5EFF: /* 0x15e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (350 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5FFF: /* 0x15f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (351 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_60FF: /* 0x160 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (352 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_61FF: /* 0x161 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (353 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_62FF: /* 0x162 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (354 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_63FF: /* 0x163 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (355 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_64FF: /* 0x164 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (356 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_65FF: /* 0x165 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (357 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_66FF: /* 0x166 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (358 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_67FF: /* 0x167 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (359 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_68FF: /* 0x168 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (360 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_69FF: /* 0x169 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (361 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6AFF: /* 0x16a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (362 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6BFF: /* 0x16b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (363 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6CFF: /* 0x16c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (364 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6DFF: /* 0x16d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (365 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6EFF: /* 0x16e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (366 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6FFF: /* 0x16f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (367 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_70FF: /* 0x170 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (368 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_71FF: /* 0x171 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (369 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_72FF: /* 0x172 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (370 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_73FF: /* 0x173 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (371 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_74FF: /* 0x174 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (372 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_75FF: /* 0x175 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (373 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_76FF: /* 0x176 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (374 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_77FF: /* 0x177 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (375 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_78FF: /* 0x178 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (376 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_79FF: /* 0x179 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (377 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7AFF: /* 0x17a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (378 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7BFF: /* 0x17b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (379 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7CFF: /* 0x17c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (380 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7DFF: /* 0x17d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (381 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7EFF: /* 0x17e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (382 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7FFF: /* 0x17f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (383 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_80FF: /* 0x180 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (384 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_81FF: /* 0x181 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (385 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_82FF: /* 0x182 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (386 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_83FF: /* 0x183 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (387 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_84FF: /* 0x184 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (388 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_85FF: /* 0x185 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (389 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_86FF: /* 0x186 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (390 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_87FF: /* 0x187 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (391 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_88FF: /* 0x188 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (392 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_89FF: /* 0x189 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (393 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8AFF: /* 0x18a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (394 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8BFF: /* 0x18b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (395 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8CFF: /* 0x18c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (396 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8DFF: /* 0x18d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (397 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8EFF: /* 0x18e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (398 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8FFF: /* 0x18f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (399 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_90FF: /* 0x190 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (400 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_91FF: /* 0x191 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (401 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_92FF: /* 0x192 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (402 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_93FF: /* 0x193 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (403 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_94FF: /* 0x194 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (404 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_95FF: /* 0x195 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (405 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_96FF: /* 0x196 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (406 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_97FF: /* 0x197 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (407 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_98FF: /* 0x198 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (408 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_99FF: /* 0x199 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (409 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9AFF: /* 0x19a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (410 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9BFF: /* 0x19b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (411 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9CFF: /* 0x19c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (412 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9DFF: /* 0x19d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (413 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9EFF: /* 0x19e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (414 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9FFF: /* 0x19f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (415 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A0FF: /* 0x1a0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (416 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A1FF: /* 0x1a1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (417 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A2FF: /* 0x1a2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (418 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A3FF: /* 0x1a3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (419 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A4FF: /* 0x1a4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (420 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A5FF: /* 0x1a5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (421 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A6FF: /* 0x1a6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (422 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A7FF: /* 0x1a7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (423 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A8FF: /* 0x1a8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (424 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A9FF: /* 0x1a9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (425 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AAFF: /* 0x1aa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (426 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ABFF: /* 0x1ab */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (427 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ACFF: /* 0x1ac */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (428 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ADFF: /* 0x1ad */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (429 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AEFF: /* 0x1ae */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (430 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AFFF: /* 0x1af */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (431 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B0FF: /* 0x1b0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (432 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B1FF: /* 0x1b1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (433 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B2FF: /* 0x1b2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (434 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B3FF: /* 0x1b3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (435 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B4FF: /* 0x1b4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (436 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B5FF: /* 0x1b5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (437 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B6FF: /* 0x1b6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (438 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B7FF: /* 0x1b7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (439 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B8FF: /* 0x1b8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (440 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B9FF: /* 0x1b9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (441 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BAFF: /* 0x1ba */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (442 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BBFF: /* 0x1bb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (443 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BCFF: /* 0x1bc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (444 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BDFF: /* 0x1bd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (445 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BEFF: /* 0x1be */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (446 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BFFF: /* 0x1bf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (447 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C0FF: /* 0x1c0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (448 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C1FF: /* 0x1c1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (449 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C2FF: /* 0x1c2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (450 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C3FF: /* 0x1c3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (451 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C4FF: /* 0x1c4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (452 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C5FF: /* 0x1c5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (453 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C6FF: /* 0x1c6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (454 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C7FF: /* 0x1c7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (455 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C8FF: /* 0x1c8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (456 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C9FF: /* 0x1c9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (457 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CAFF: /* 0x1ca */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (458 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CBFF: /* 0x1cb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (459 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CCFF: /* 0x1cc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (460 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CDFF: /* 0x1cd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (461 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CEFF: /* 0x1ce */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (462 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CFFF: /* 0x1cf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (463 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D0FF: /* 0x1d0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (464 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D1FF: /* 0x1d1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (465 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D2FF: /* 0x1d2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (466 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D3FF: /* 0x1d3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (467 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D4FF: /* 0x1d4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (468 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D5FF: /* 0x1d5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (469 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D6FF: /* 0x1d6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (470 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D7FF: /* 0x1d7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (471 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D8FF: /* 0x1d8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (472 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D9FF: /* 0x1d9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (473 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DAFF: /* 0x1da */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (474 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DBFF: /* 0x1db */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (475 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DCFF: /* 0x1dc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (476 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DDFF: /* 0x1dd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (477 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DEFF: /* 0x1de */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (478 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DFFF: /* 0x1df */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (479 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E0FF: /* 0x1e0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (480 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E1FF: /* 0x1e1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (481 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E2FF: /* 0x1e2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (482 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E3FF: /* 0x1e3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (483 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E4FF: /* 0x1e4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (484 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E5FF: /* 0x1e5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (485 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E6FF: /* 0x1e6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (486 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E7FF: /* 0x1e7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (487 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E8FF: /* 0x1e8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (488 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E9FF: /* 0x1e9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (489 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EAFF: /* 0x1ea */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (490 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EBFF: /* 0x1eb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (491 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ECFF: /* 0x1ec */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (492 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EDFF: /* 0x1ed */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (493 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EEFF: /* 0x1ee */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (494 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EFFF: /* 0x1ef */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (495 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_F0FF: /* 0x1f0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (496 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_F1FF: /* 0x1f1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (497 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_OBJECT_INIT_JUMBO: /* 0x1f2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (498 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_VOLATILE_JUMBO: /* 0x1f3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (499 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_VOLATILE_JUMBO: /* 0x1f4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (500 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_VOLATILE_JUMBO: /* 0x1f5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (501 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_VOLATILE_JUMBO: /* 0x1f6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (502 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_VOLATILE_JUMBO: /* 0x1f7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (503 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_VOLATILE_JUMBO: /* 0x1f8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (504 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_VOLATILE_JUMBO: /* 0x1f9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (505 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_VOLATILE_JUMBO: /* 0x1fa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (506 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_VOLATILE_JUMBO: /* 0x1fb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (507 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_VOLATILE_JUMBO: /* 0x1fc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (508 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_VOLATILE_JUMBO: /* 0x1fd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (509 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_VOLATILE_JUMBO: /* 0x1fe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (510 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW_VERIFICATION_ERROR_JUMBO: /* 0x1ff */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (511 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
.balign 64
.size dvmAsmAltInstructionStart, .-dvmAsmAltInstructionStart
.global dvmAsmAltInstructionEnd
dvmAsmAltInstructionEnd:
/* File: armv5te/footer.S */
-
/*
* ===========================================================================
* Common subroutines and data
* ===========================================================================
*/
-
-
.text
.align 2
#if defined(WITH_JIT)
+
#if defined(WITH_SELF_VERIFICATION)
+/*
+ * "longjmp" to a translation after single-stepping. Before returning
+ * to translation, must save state for self-verification.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r10, [rSELF,#offThread_jitResumeNPC] @ resume address
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ b jitSVShadowRunStart @ resume as if cache hit
+ @ expects resume addr in r10
+
.global dvmJitToInterpPunt
dvmJitToInterpPunt:
mov r2,#kSVSPunt @ r2<- interpreter entry point
@@ -20866,11 +26174,15 @@
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
+ mov rPC, r0 @ set up dalvik pc
+ EXPORT_PC()
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
mov r2,#kSVSSingleStep @ r2<- interpreter entry point
b jitSVShadowRunEnd @ doesn't return
+
.global dvmJitToInterpNoChainNoProfile
dvmJitToInterpNoChainNoProfile:
mov r0,rPC @ pass our target PC
@@ -20919,6 +26231,21 @@
str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land
b jitSVShadowRunEnd @ doesn't return
#else
+
+/*
+ * "longjmp" to a translation after single-stepping.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r0, [rSELF,#offThread_jitResumeNPC]
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ bx r0 @ resume translation
+
/*
* Return from the translation cache to the interpreter when the compiler is
* having issues translating/executing a Dalvik instruction. We have to skip
@@ -20943,26 +26270,33 @@
/*
* Return to the interpreter to handle a single instruction.
+ * We'll use the normal single-stepping mechanism via interpBreak,
+ * but also save the native pc of the resume point in the translation
+ * and the native sp so that we can later do the equivalent of a
+ * longjmp() to resume.
* On entry:
- * r0 <= PC
- * r1 <= PC of resume instruction
+ * dPC <= Dalvik PC of instrucion to interpret
* lr <= resume point in translation
+ * r1 <= Dalvik PC of next instruction
*/
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
- mov r1,#kInterpEntryInstr
- @ enum is 4 byte in aapcs-EABI
- str r1, [rSELF, #offThread_entryPoint]
- mov rPC,r0
+ mov rPC, r0 @ set up dalvik pc
EXPORT_PC()
-
- ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- mov r2,#kJitSingleStep @ Ask for single step and then revert
- str r2,[rSELF,#offThread_jitState]
- mov r1,#1 @ set changeInterp to bail to debug interp
- b common_gotoBail
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
+ mov r1, #1
+ str r1, [rSELF,#offThread_singleStepCount] @ just step once
+ mov r0, rSELF
+ mov r1, #kInterpSingleStep
+ mov r2, #kSubModeNormal
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
+ ldr rIBASE, [rSELF,#offThread_curHandlerTable]
+ FETCH_INST()
+ GET_INST_OPCODE(ip)
+ GOTO_OPCODE(ip)
/*
* Return from the translation cache and immediately request
@@ -20974,7 +26308,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -20993,7 +26328,8 @@
add rINST,lr,#-5 @ save start of chain branch
add rINST, #-4 @ .. which is 9 bytes back
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq 2f
@@ -21008,7 +26344,7 @@
/* No translation, so request one if profiling isn't disabled*/
2:
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
cmp r0, #0
movne r2,#kJitTSelectRequestHot @ ask for trace selection
@@ -21039,7 +26375,8 @@
bl dvmBumpNormal
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq toInterpreter @ go if not, otherwise do chain
@@ -21061,7 +26398,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21083,7 +26421,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21101,21 +26440,27 @@
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
FETCH_INST()
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@ NOTE: intended fallthrough
/*
- * Common code to update potential trace start counter, and initiate
- * a trace-build if appropriate. On entry, rPC should point to the
- * next instruction to execute, and rINST should be already loaded with
- * the next opcode word, and r0 holds a pointer to the jit profile
- * table (pJitProfTable).
+ * Similar to common_updateProfile, but tests for null pJitProfTable
+ * r0 holds pJifProfTAble, rINST is loaded, rPC is current and
+ * rIBASE has been recently refreshed.
*/
common_testUpdateProfile:
- cmp r0,#0
- GET_INST_OPCODE(ip)
- GOTO_OPCODE_IFEQ(ip) @ if not profiling, fallthrough otherwise */
+ cmp r0, #0 @ JIT switched off?
+ beq 4f @ return to interp if so
+/*
+ * Common code to update potential trace start counter, and initiate
+ * a trace-build if appropriate.
+ * On entry here:
+ * r0 <= pJitProfTable (verified non-NULL)
+ * rPC <= Dalvik PC
+ * rINST <= next instruction
+ */
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
@@ -21125,18 +26470,13 @@
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
-/*
- * Here, we switch to the debug interpreter to request
- * trace selection. First, though, check to see if there
- * is already a native translation in place (and, if so,
- * jump to it now).
- */
-
- GET_JIT_THRESHOLD(r1)
+ /* Looks good, reset the counter */
+ ldr r1, [rSELF, #offThread_jitThreshold]
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
- bl dvmJitGetTraceAddr @ r0<- dvmJitGetTraceAddr(rPC)
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21167,15 +26507,30 @@
/*
* On entry:
- * r2 is jit state, e.g. kJitTSelectRequest or kJitTSelectRequestHot
+ * r2 is jit state.
*/
common_selectTrace:
-
+ ldrb r0,[rSELF,#offThread_breakFlags]
+ ands r0,#kInterpJitBreak
+ bne 3f @ already doing JIT work, continue
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
+ mov r0, rSELF
+/*
+ * Call out to validate trace-building request. If successful,
+ * rIBASE will be swapped to to send us into single-stepping trace
+ * building mode, so we need to refresh before we continue.
+ */
+ EXPORT_PC()
+ SAVE_PC_FP_TO_SELF() @ copy of pc/fp to Thread
+ bl dvmJitCheckTraceRequest
+3:
+ FETCH_INST()
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+4:
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip)
+ /* no return */
+#endif
#if defined(WITH_SELF_VERIFICATION)
/*
@@ -21197,23 +26552,27 @@
/*
* Restore PC, registers, and interpreter state to original values
* before jumping back to the interpreter.
+ * On entry:
+ * r0: dPC
+ * r2: self verification state
*/
jitSVShadowRunEnd:
mov r1,rFP @ pass ending fp
mov r3,rSELF @ pass self ptr for convenience
bl dvmSelfVerificationRestoreState @ restore pc and fp values
- ldr rPC,[rSELF,#offThread_pc] @ restore PC
- ldr rFP,[rSELF,#offThread_fp] @ restore FP
+ LOAD_PC_FP_FROM_SELF() @ restore pc, fp
ldr r1,[r0,#offShadowSpace_svState] @ get self verification state
cmp r1,#0 @ check for punt condition
beq 1f
+ @ Set up SV single-stepping
+ mov r0, rSELF
+ mov r1, #kInterpJitBreak
+ mov r2, #kSubModeJitSV
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
mov r2,#kJitSelfVerification @ ask for self verification
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
-
+ @ intentional fallthrough
1: @ exit to interpreter without check
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@@ -21222,133 +26581,32 @@
GOTO_OPCODE(ip)
#endif
-#endif
-
-/*
- * Common code when a backward branch is taken.
- *
- * TODO: we could avoid a branch by just setting r0 and falling through
- * into the common_periodicChecks code, and having a test on r0 at the
- * end determine if we should return to the caller or update & branch to
- * the next instr.
- *
- * On entry:
- * r9 is PC adjustment *in bytes*
- */
-common_backwardBranch:
- mov r0, #kInterpEntryInstr
- bl common_periodicChecks
-#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip)
- GOTO_OPCODE(ip)
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#endif
-
-
-/*
- * Need to see if the thread needs to be suspended or debugger/profiler
- * activity has begun. If so, we suspend the thread or side-exit to
- * the debug interpreter as appropriate.
- *
- * The common case is no activity on any of these, so we want to figure
- * that out quickly. If something is up, we can then sort out what.
- *
- * We want to be fast if the VM was built without debugger or profiler
- * support, but we also need to recognize that the system is usually
- * shipped with both of these enabled.
- *
- * TODO: reduce this so we're just checking a single location.
- *
- * On entry:
- * r0 is reentry type, e.g. kInterpEntryInstr (for debugger/profiling)
- * r9 is trampoline PC adjustment *in bytes*
- */
-common_periodicChecks:
-/* TUNING - make this a direct load when interpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r3<- &interpBreak
- /* speculatively thread-specific suspend count */
- ldr ip, [rSELF, #offThread_suspendCount]
- ldr r1, [r1] @ r1<- interpBreak
- cmp r1, #0 @ anything unusual?
- bxeq lr @ return if not
- /*
- * One or more interesting events have happened. Figure out what.
- *
- * r0 still holds the reentry type.
- */
- cmp ip, #0 @ want suspend?
- beq 3f @ no, must be something else
-
- stmfd sp!, {r0, lr} @ preserve r0 and lr
-#if defined(WITH_JIT)
- /*
- * Refresh the Jit's cached copy of profile table pointer. This pointer
- * doubles as the Jit's on/off switch.
- */
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ r3<-&gDvmJit.pJitProfTable
- mov r0, rSELF @ r0<- self
- ldr r3, [r3] @ r3 <- pJitProfTable
- EXPORT_PC() @ need for precise GC
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh Jit's on/off switch
-#else
- mov r0, rSELF @ r0<- self
- EXPORT_PC() @ need for precise GC
-#endif
- bl dvmCheckSuspendPending @ do full check, suspend if necessary
- ldmfd sp!, {r0, lr} @ restore r0 and lr
-
- /*
- * Reload the interpBreak flags - they may have changed while we
- * were suspended.
- */
-/* TUNING - direct load when InterpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r1<- &interpBreak
- ldr r1, [r1] @ r1<- interpBreak
-3:
- /*
- * TODO: this code is too fragile. Need a general mechanism
- * to identify what actions to take by submode. Some profiling modes
- * (instruction count) need to single-step, while method tracing
- * may not. Debugging with breakpoints can run unfettered, but
- * source-level single-stepping requires Dalvik singlestepping.
- * GC may require a one-shot action and then full-speed resumption.
- */
- ands r1, #(kSubModeDebuggerActive | kSubModeEmulatorTrace | kSubModeInstCounting)
- bxeq lr @ nothing to do, return
-
- @ debugger/profiler enabled, bail out; self->entryPoint was set above
- str r0, [rSELF, #offThread_entryPoint] @ store r0, need for debug/prof
- add rPC, rPC, r9 @ update rPC
- mov r1, #1 @ "want switch" = true
- b common_gotoBail @ side exit
-
-
/*
* The equivalent of "goto bail", this calls through the "bail handler".
+ * It will end this interpreter activation, and return to the caller
+ * of dvmMterpStdRun.
*
- * State registers will be saved to the "thread" area before bailing.
- *
- * On entry:
- * r1 is "bool changeInterp", indicating if we want to switch to the
- * other interpreter or just bail all the way out
+ * State registers will be saved to the "thread" area before bailing
+ * debugging purposes
*/
common_gotoBail:
SAVE_PC_FP_TO_SELF() @ export state to "thread"
mov r0, rSELF @ r0<- self ptr
b dvmMterpStdBail @ call(self, changeInterp)
- @add r1, r1, #1 @ using (boolean+1)
- @add r0, rSELF, #offThread_jmpBuf @ r0<- &self->jmpBuf
- @bl _longjmp @ does not return
- @bl common_abort
-
+/*
+ * The JIT's invoke method needs to remember the callsite class and
+ * target pair. Save them here so that they are available to
+ * dvmCheckJit following the interpretation of this invoke.
+ */
+#if defined(WITH_JIT)
+save_callsiteinfo:
+ cmp r9, #0
+ ldrne r9, [r9, #offObject_clazz]
+ str r0, [rSELF, #offThread_methodToCall]
+ str r9, [rSELF, #offThread_callsiteClass]
+ bx lr
+#endif
/*
* Common code for jumbo method invocation.
@@ -21356,12 +26614,20 @@
* As a result, the savedPc in the stack frame will not be wholly accurate. So
* long as that is only used for source file line number calculations, we're
* okay.
- *
- * On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
*/
+common_invokeMethodJumboNoThis:
+#if defined(WITH_JIT)
+ /* On entry: r0 is "Method* methodToCall */
+ mov r9, #0 @ clear "this"
+#endif
common_invokeMethodJumbo:
+ /* On entry: r0 is "Method* methodToCall, r9 is "this" */
.LinvokeNewJumbo:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
add rPC, rPC, #4 @ adjust pc to make return consistent
FETCH(r2, 1) @ r2<- BBBB (arg count)
@@ -21375,10 +26641,15 @@
* Common code for method invocation with range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodRange:
.LinvokeNewRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #8 @ r2<- AA (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -21400,10 +26671,15 @@
* Common code for method invocation without range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodNoRange:
.LinvokeNewNoRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #12 @ r2<- B (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -21450,12 +26726,11 @@
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
sub r3, r10, r3, lsl #2 @ r3<- bottom (newsave - outsSize)
cmp r3, r9 @ bottom < interpStackEnd?
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r3, [r0, #offMethod_accessFlags] @ r3<- methodToCall->accessFlags
blo .LstackOverflow @ yes, this frame will overflow stack
@ set up newSaveArea
- ldr lr, [lr] @ lr<- active submodes
#ifdef EASY_GDB
SAVEAREA_FROM_FP(ip, rFP) @ ip<- stack save area
str ip, [r10, #offStackSaveArea_prevSave]
@@ -21466,15 +26741,12 @@
mov r9, #0
str r9, [r10, #offStackSaveArea_returnAddr]
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 1f @ skip if not
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r1, rSELF
- @ r0=methodToCall, r1=rSELF
- bl dvmFastMethodTraceEnter
- ldmfd sp!, {r0-r3} @ restore r0-r3
-1:
str r0, [r10, #offStackSaveArea_method]
+
+ @ Profiling?
+ cmp lr, #0 @ any special modes happening?
+ bne 2f @ go if so
+1:
tst r3, #ACC_NATIVE
bne .LinvokeNative
@@ -21501,8 +26773,10 @@
@ r0=methodToCall, r1=newFp, r3=newMethodClass, r9=newINST
str r0, [rSELF, #offThread_method] @ self->method = methodToCall
str r3, [rSELF, #offThread_methodClassDex] @ self->methodClassDex = ...
+ mov r2, #1
+ str r2, [rSELF, #offThread_debugIsMethodEntry]
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
mov rFP, r1 @ fp = newFp
GET_PREFETCHED_OPCODE(ip, r9) @ extract prefetched opcode from r9
mov rINST, r9 @ publish new rINST
@@ -21518,15 +26792,22 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+2:
+ @ Profiling - record method entry. r0: methodToCall
+ stmfd sp!, {r0-r3} @ preserve r0-r3
+ mov r1, r0
+ mov r0, rSELF
+ bl dvmReportInvoke @ (self, method)
+ ldmfd sp!, {r0-r3} @ restore r0-r3
+ b 1b
+
.LinvokeNative:
@ Prep for the native call
@ r0=methodToCall, r1=newFp, r10=newSaveArea
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r9, [rSELF, #offThread_jniLocal_topCookie]@r9<-thread->localRef->...
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r10, #offStackSaveArea_localRefCookie] @newFp->localRefCookie=top
- ldr lr, [lr] @ lr<- active submodes
-
mov r2, r0 @ r2<- methodToCall
mov r0, r1 @ r0<- newFp (points to args)
add r1, rSELF, #offThread_retval @ r1<- &retval
@@ -21543,45 +26824,45 @@
.Lskip:
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- bne 330f @ hop if so
+ cmp lr, #0 @ any special SubModes active?
+ bne 11f @ go handle them if so
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
-220:
-#if defined(WITH_JIT)
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ Refresh Jit's on/off status
-#endif
+7:
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved top
ldr r1, [rSELF, #offThread_exception] @ check for exception
-#if defined(WITH_JIT)
- ldr r3, [r3] @ r3 <- gDvmJit.pProfTable
-#endif
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
-#if defined(WITH_JIT)
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh cached on/off switch
-#endif
bne common_exceptionThrown @ no, handle exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-330:
- @ r2=JNIMethod, r6=rSELF
- stmfd sp!, {r2,r6}
+11:
+ @ r0=newFp, r1=&retval, r2=methodToCall, r3=self, lr=subModes
+ stmfd sp!, {r0-r3} @ save all but subModes
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPreNativeInvoke @ (pc, self, methodToCall)
+ ldmfd sp, {r0-r3} @ refresh. NOTE: no sp autoincrement
+ @ Call the native method
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
- @ r0=JNIMethod, r1=rSELF
- ldmfd sp!, {r0-r1}
- bl dvmFastNativeMethodTraceExit
- b 220b
+ @ Restore the pre-call arguments
+ ldmfd sp!, {r0-r3} @ r2<- methodToCall (others unneeded)
+
+ @ Finish up any post-invoke subMode requirements
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPostNativeInvoke @ (pc, self, methodToCall)
+ b 7b @ resume
.LstackOverflow: @ r0=methodToCall
mov r1, r0 @ r1<- methodToCall
@@ -21629,37 +26910,27 @@
*/
common_returnFromMethod:
.LreturnNew:
- mov r0, #kInterpEntryReturn
- mov r9, #0
- bl common_periodicChecks
-
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r0, rFP)
- ldr lr, [lr] @ lr<- active submodes
ldr r9, [r0, #offStackSaveArea_savedPc] @ r9 = saveArea->savedPc
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 333f
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r0, rSELF
- @ r0=rSELF
- bl dvmFastJavaMethodTraceExit
- ldmfd sp!, {r0-r3} @ restore r0-r3
-333:
+ cmp lr, #0 @ any special subMode handling needed?
+ bne 19f
+14:
ldr rFP, [r0, #offStackSaveArea_prevFrame] @ fp = saveArea->prevFrame
ldr r2, [rFP, #(offStackSaveArea_method - sizeofStackSaveArea)]
@ r2<- method we're returning to
cmp r2, #0 @ is this a break frame?
#if defined(WORKAROUND_CORTEX_A9_745320)
/* Don't use conditional loads if the HW defect exists */
- beq 101f
+ beq 15f
ldr r10, [r2, #offMethod_clazz] @ r10<- method->clazz
-101:
+15:
#else
ldrne r10, [r2, #offMethod_clazz] @ r10<- method->clazz
#endif
- mov r1, #0 @ "want switch" = false
beq common_gotoBail @ break frame, bail out completely
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
PREFETCH_ADVANCE_INST(rINST, r9, 3) @ advance r9, update new rINST
str r2, [rSELF, #offThread_method]@ self->method = newSave->method
ldr r1, [r10, #offClassObject_pDvmDex] @ r1<- method->clazz->pDvmDex
@@ -21680,6 +26951,16 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+19:
+ @ Handle special actions
+ @ On entry, r0: StackSaveArea
+ ldr r2, [r0, #offStackSaveArea_prevFrame] @ r2<- prevFP
+ mov r1, rPC
+ mov r0, rSELF
+ bl dvmReportReturn @ (self, pc, prevFP)
+ SAVEAREA_FROM_FP(r0, rFP) @ restore StackSaveArea
+ b 14b @ continue
+
/*
* Return handling, calls through "glue code".
*/
@@ -21705,17 +26986,24 @@
dvmMterpCommonExceptionThrown:
common_exceptionThrown:
.LexceptionNew:
- mov r0, #kInterpEntryThrow
- mov r9, #0
- bl common_periodicChecks
+
+ EXPORT_PC()
+
+ mov r0, rSELF
+ bl dvmCheckSuspendPending
ldr r9, [rSELF, #offThread_exception] @ r9<- self->exception
mov r1, rSELF @ r1<- self
mov r0, r9 @ r0<- exception
bl dvmAddTrackedAlloc @ don't let the exception be GCed
+ ldrb r2, [rSELF, #offThread_subMode] @ get subMode flags
mov r3, #0 @ r3<- NULL
str r3, [rSELF, #offThread_exception] @ self->exception = NULL
+ @ Special subMode?
+ cmp r2, #0 @ any special subMode handling needed?
+ bne 7f @ go if so
+8:
/* set up args and a local for "&fp" */
/* (str sp, [sp, #-4]! would be perfect here, but is discouraged) */
str rFP, [sp, #-4]! @ *--sp = fp
@@ -21725,6 +27013,7 @@
ldr r1, [rSELF, #offThread_method] @ r1<- self->method
mov r0, rSELF @ r0<- self
ldr r1, [r1, #offMethod_insns] @ r1<- method->insns
+ ldrb lr, [rSELF, #offThread_subMode] @ lr<- subMode flags
mov r2, r9 @ r2<- exception
sub r1, rPC, r1 @ r1<- pc - method->insns
mov r1, r1, asr #1 @ r1<- offset in code units
@@ -21765,12 +27054,22 @@
bl dvmReleaseTrackedAlloc @ release the exception
/* restore the exception if the handler wants it */
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp ip, #OP_MOVE_EXCEPTION @ is it "move-exception"?
streq r9, [rSELF, #offThread_exception] @ yes, restore the exception
GOTO_OPCODE(ip) @ jump to next instruction
+ @ Manage debugger bookkeeping
+7:
+ mov r0, rSELF @ arg0<- self
+ ldr r1, [rSELF, #offThread_method] @ arg1<- curMethod
+ mov r2, rPC @ arg2<- pc
+ mov r3, rFP @ arg3<- fp
+ bl dvmReportExceptionThrow @ (self, method, pc, fp)
+ b 8b @ resume with normal handling
+
.LnotCaughtLocally: @ r9=exception
/* fix stack overflow if necessary */
ldrb r1, [rSELF, #offThread_stackOverflowed]
@@ -21807,7 +27106,6 @@
mov r0, r9 @ r0<- exception
mov r1, rSELF @ r1<- self
bl dvmReleaseTrackedAlloc @ release the exception
- mov r1, #0 @ "want switch" = false
b common_gotoBail @ bail out
@@ -21822,6 +27120,30 @@
b common_resumeAfterGlueCall
.endif
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including the current
+ * instruction.
+ *
+ * On entry:
+ * r10: &dvmDex->pResFields[field]
+ * r0: field pointer (must preserve)
+ */
+common_verifyField:
+ ldrb r3, [rSELF, #offThread_subMode] @ r3 <- submode byte
+ ands r3, #kSubModeJitTraceBuild
+ bxeq lr @ Not building trace, continue
+ ldr r1, [r10] @ r1<- reload resolved StaticField ptr
+ cmp r1, #0 @ resolution complete?
+ bxne lr @ yes, continue
+ stmfd sp!, {r0-r2,lr} @ save regs
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self,pc) end trace before this inst
+ ldmfd sp!, {r0-r2, lr}
+ bx lr @ return
+#endif
/*
* After returning from a "glued" function, pull out the updated
@@ -21829,6 +27151,7 @@
*/
common_resumeAfterGlueCall:
LOAD_PC_FP_FROM_SELF() @ pull rPC and rFP out of thread
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/out/InterpAsm-armv7-a.S b/vm/mterp/out/InterpAsm-armv7-a.S
index 2ef5bea..450c537 100644
--- a/vm/mterp/out/InterpAsm-armv7-a.S
+++ b/vm/mterp/out/InterpAsm-armv7-a.S
@@ -138,7 +138,7 @@
* rPC to point to the next instruction. "_reg" must specify the distance
* in bytes, *not* 16-bit code units, and may be a signed value.
*
- * We want to write "ldrh rINST, [rPC, _reg, lsl #2]!", but some of the
+ * We want to write "ldrh rINST, [rPC, _reg, lsl #1]!", but some of the
* bits that hold the shift distance are used for the half/byte/sign flags.
* In some cases we can pre-double _reg for free, so we require a byte offset
* here.
@@ -176,6 +176,7 @@
* interpreter, we don't have to worry about pre-ARMv5 THUMB interwork.
*/
#define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6
+#define GOTO_OPCODE_BASE(_base,_reg) add pc, _base, _reg, lsl #6
#define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6
#define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6
@@ -185,11 +186,6 @@
#define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2]
#define SET_VREG(_reg, _vreg) str _reg, [rFP, _vreg, lsl #2]
-#if defined(WITH_JIT)
-#define GET_JIT_PROF_TABLE(_reg) ldr _reg,[rSELF,#offThread_pJitProfTable]
-#define GET_JIT_THRESHOLD(_reg) ldr _reg,[rSELF,#offThread_jitThreshold]
-#endif
-
/*
* Convert a virtual register index into an address.
*/
@@ -282,8 +278,7 @@
* On entry:
* r0 Thread* self
*
- * This function returns a boolean "changeInterp" value. The return comes
- * via a call to dvmMterpStdBail().
+ * The return comes via a call to dvmMterpStdBail().
*/
dvmMterpStdRun:
#define MTERP_ENTRY1 \
@@ -302,16 +297,13 @@
/* set up "named" registers, figure out entry point */
mov rSELF, r0 @ set rSELF
- ldr r1, [r0, #offThread_entryPoint] @ enum is 4 bytes in aapcs-EABI
LOAD_PC_FP_FROM_SELF() @ load rPC and rFP from "thread"
ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ set rIBASE
- cmp r1, #kInterpEntryInstr @ usual case?
- bne .Lnot_instr @ no, handle it
#if defined(WITH_JIT)
.LentryInstr:
/* Entry is always a possible trace start */
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
mov r1, #0 @ prepare the value for the new state
str r1, [rSELF, #offThread_inJitCodeCache] @ back to the interp land
@@ -339,33 +331,6 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
-.Lnot_instr:
- cmp r1, #kInterpEntryReturn @ were we returning from a method?
- beq common_returnFromMethod
-
-.Lnot_return:
- cmp r1, #kInterpEntryThrow @ were we throwing an exception?
- beq common_exceptionThrown
-
-#if defined(WITH_JIT)
-.Lnot_throw:
- ldr r10,[rSELF, #offThread_jitResumeNPC]
- ldr r2,[rSELF, #offThread_jitResumeDPC]
- cmp r1, #kInterpEntryResume @ resuming after Jit single-step?
- bne .Lbad_arg
- cmp rPC,r2
- bne .LentryInstr @ must have branched, don't resume
-#if defined(WITH_SELF_VERIFICATION)
- @ self->entryPoint will be set in dvmSelfVerificationSaveState
- b jitSVShadowRunStart @ re-enter the translation after the
- @ single-stepped instruction
- @noreturn
-#endif
- mov r1, #kInterpEntryInstr
- str r1, [rSELF, #offThread_entryPoint]
- bx r10 @ re-enter the translation
-#endif
-
.Lbad_arg:
ldr r0, strBadEntryPoint
@ r1 holds value of entryPoint
@@ -389,11 +354,9 @@
*
* On entry:
* r0 Thread* self
- * r1 bool changeInterp
*/
dvmMterpStdBail:
- ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
- mov r0, r1 @ return the changeInterp value
+ ldr sp, [r0, #offThread_bailPtr] @ sp<- saved SP
add sp, sp, #4 @ un-align 64
ldmfd sp!, {r4-r10,fp,pc} @ restore 9 regs and return
@@ -980,6 +943,9 @@
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .LOP_NEW_INSTANCE_resolve @ no, resolve it now
@@ -1120,22 +1086,19 @@
* double to get a byte offset.
*/
/* goto +AA */
+ /* tuning: use sbfx for 6t2+ targets */
mov r0, rINST, lsl #16 @ r0<- AAxx0000
- movs r9, r0, asr #24 @ r9<- ssssssAA (sign-extended)
- mov r9, r9, lsl #1 @ r9<- byte offset
- bmi common_backwardBranch @ backward branch, do periodic checks
+ movs r1, r0, asr #24 @ r1<- ssssssAA (sign-extended)
+ add r2, r1, r1 @ r2<- byte offset, set flags
+ @ If backwards branch refresh rIBASE
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) check for trace hotness
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
.balign 64
@@ -1149,20 +1112,15 @@
*/
/* goto/16 +AAAA */
FETCH_S(r0, 1) @ r0<- ssssAAAA (sign-extended)
- movs r9, r0, asl #1 @ r9<- byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
+ adds r1, r0, r0 @ r1<- byte offset, flags set
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ bmi common_testUpdateProfile @ (r0) hot trace head?
#endif
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
/* ------------------------------ */
.balign 64
@@ -1175,29 +1133,26 @@
* double to get a byte offset.
*
* Unlike most opcodes, this one is allowed to branch to itself, so
- * our "backward branch" test must be "<=0" instead of "<0". The ORRS
- * instruction doesn't affect the V flag, so we need to clear it
- * explicitly.
+ * our "backward branch" test must be "<=0" instead of "<0". Because
+ * we need the V bit set, we'll use an adds to convert from Dalvik
+ * offset to byte offset.
*/
/* goto/32 +AAAAAAAA */
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- cmp ip, ip @ (clear V flag during stall)
- orrs r0, r0, r1, lsl #16 @ r0<- AAAAaaaa, check sign
- mov r9, r0, asl #1 @ r9<- byte offset
- ble common_backwardBranch @ backward branch, do periodic checks
+ orr r0, r0, r1, lsl #16 @ r0<- AAAAaaaa
+ adds r1, r0, r0 @ r1<- byte offset
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ble common_testUpdateProfile @ (r0) hot trace head?
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
.balign 64
@@ -1210,6 +1165,9 @@
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them here.
*
+ * When the JIT is present, all targets are considered treated as
+ * a potential trace heads regardless of branch direction.
+ *
* for: packed-switch, sparse-switch
*/
/* op vAA, +BBBB */
@@ -1220,21 +1178,19 @@
GET_VREG(r1, r3) @ r1<- vAA
add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2
bl dvmInterpHandlePackedSwitch @ r0<- code-unit branch offset
- movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
- beq common_backwardBranch @ (want to use BLE but V is unknown)
+ adds r1, r0, r0 @ r1<- byte offset; clear V
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ cmp r0, #0
bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
.balign 64
@@ -1248,6 +1204,9 @@
* We don't really expect backward branches in a switch statement, but
* they're perfectly legal, so we check for them here.
*
+ * When the JIT is present, all targets are considered treated as
+ * a potential trace heads regardless of branch direction.
+ *
* for: packed-switch, sparse-switch
*/
/* op vAA, +BBBB */
@@ -1258,21 +1217,19 @@
GET_VREG(r1, r3) @ r1<- vAA
add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2
bl dvmInterpHandleSparseSwitch @ r0<- code-unit branch offset
- movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
- beq common_backwardBranch @ (want to use BLE but V is unknown)
+ adds r1, r0, r0 @ r1<- byte offset; clear V
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+ cmp r0, #0
bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrle rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh handler base
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1489,22 +1446,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bne 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movne r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1524,22 +1480,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- beq 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ moveq r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1559,22 +1514,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bge 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movge r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1594,22 +1548,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- blt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movlt r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1629,22 +1582,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- ble 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movle r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1664,22 +1616,21 @@
ubfx r0, rINST, #8, #4 @ r0<- A
GET_VREG(r3, r1) @ r3<- vB
GET_VREG(r2, r0) @ r2<- vA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, r3 @ compare (vA, vB)
- bgt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ yes, do periodic checks
-1:
+ movgt r1, #2 @ r1<- BYTE branch dist for not-taken
+ adds r2, r1, r1 @ convert to bytes, check sign
+ FETCH_ADVANCE_INST_RB(r2) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- b common_testUpdateProfile
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+ cmp r0, #0
+ bne common_updateProfile
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1697,25 +1648,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bne 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movne r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1733,25 +1680,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- beq 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ moveq r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1769,25 +1712,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bge 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movge r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1805,25 +1744,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- blt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movlt r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1841,25 +1776,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- ble 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movle r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -1877,25 +1808,21 @@
/* if-cmp vAA, +BBBB */
mov r0, rINST, lsr #8 @ r0<- AA
GET_VREG(r2, r0) @ r2<- vAA
- mov r9, #4 @ r0<- BYTE branch dist for not-taken
+ FETCH_S(r1, 1) @ r1<- branch offset, in code units
cmp r2, #0 @ compare (vA, 0)
- bgt 1f @ branch to 1 if comparison failed
- FETCH_S(r9, 1) @ r9<- branch offset, in code units
- movs r9, r9, asl #1 @ convert to bytes, check sign
- bmi common_backwardBranch @ backward branch, do periodic checks
-1:
+ movgt r1, #2 @ r1<- inst branch dist for not-taken
+ adds r1, r1, r1 @ convert to bytes & set flags
+ FETCH_ADVANCE_INST_RB(r1) @ update rPC, load rINST
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
+ bne common_updateProfile @ test for JIT off at target
#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
+ ldrmi rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh table base
+#endif
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-#endif
/* ------------------------------ */
@@ -2768,8 +2695,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_resolve @ yes, do resolve
.LOP_SGET_finish: @ field ptr in r0
@@ -2791,8 +2718,8 @@
/* sget-wide vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_WIDE_resolve @ yes, do resolve
.LOP_SGET_WIDE_finish:
@@ -2822,8 +2749,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_resolve @ yes, do resolve
.LOP_SGET_OBJECT_finish: @ field ptr in r0
@@ -2849,8 +2776,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BOOLEAN_resolve @ yes, do resolve
.LOP_SGET_BOOLEAN_finish: @ field ptr in r0
@@ -2876,8 +2803,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BYTE_resolve @ yes, do resolve
.LOP_SGET_BYTE_finish: @ field ptr in r0
@@ -2903,8 +2830,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_CHAR_resolve @ yes, do resolve
.LOP_SGET_CHAR_finish: @ field ptr in r0
@@ -2930,8 +2857,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_SHORT_resolve @ yes, do resolve
.LOP_SGET_SHORT_finish: @ field ptr in r0
@@ -2956,8 +2883,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_resolve @ yes, do resolve
.LOP_SPUT_finish: @ field ptr in r0
@@ -2979,9 +2906,9 @@
/* sput-wide vAA, field@BBBB */
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
mov r9, rINST, lsr #8 @ r9<- AA
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_resolve @ yes, do resolve
@@ -3009,18 +2936,19 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-
+ beq .LOP_SPUT_OBJECT_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_finish: @ field ptr in r0
+ mov r2, rINST, lsr #8 @ r2<- AA
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[AA]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ @ no-op @ releasing store
+ b .LOP_SPUT_OBJECT_end
/* ------------------------------ */
.balign 64
@@ -3035,8 +2963,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BOOLEAN_resolve @ yes, do resolve
.LOP_SPUT_BOOLEAN_finish: @ field ptr in r0
@@ -3062,8 +2990,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BYTE_resolve @ yes, do resolve
.LOP_SPUT_BYTE_finish: @ field ptr in r0
@@ -3089,8 +3017,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_CHAR_resolve @ yes, do resolve
.LOP_SPUT_CHAR_finish: @ field ptr in r0
@@ -3116,8 +3044,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_SHORT_resolve @ yes, do resolve
.LOP_SPUT_SHORT_finish: @ field ptr in r0
@@ -3178,13 +3106,13 @@
.endif
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_resolve @ do resolve now
@@ -3215,11 +3143,11 @@
.endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodNoRange @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodNoRange @ r0=method, r9="this"
b common_errNullObject @ yes, throw exception
/* ------------------------------ */
@@ -3236,17 +3164,15 @@
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- pDvmDex
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
+ mov r9, #0 @ null "this" in delay slot
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
bne common_invokeMethodNoRange @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodNoRange @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ b .LOP_INVOKE_STATIC_resolve
/* ------------------------------ */
.balign 64
@@ -3265,16 +3191,16 @@
and r2, r2, #15 @ r2<- C (or stays CCCC)
.endif
EXPORT_PC() @ must export for invoke
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodNoRange @ jump to common handler
+ b common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -3335,13 +3261,13 @@
.endif
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_RANGE_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_RANGE_resolve @ do resolve now
@@ -3374,11 +3300,11 @@
.endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_RANGE_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_RANGE_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodRange @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodRange @ r0=method, r9="this"
b common_errNullObject @ yes, throw exception
@@ -3397,17 +3323,15 @@
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- pDvmDex
FETCH(r1, 1) @ r1<- BBBB
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
+ mov r9, #0 @ null "this" in delay slot
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
bne common_invokeMethodRange @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodRange @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ b .LOP_INVOKE_STATIC_RANGE_resolve
/* ------------------------------ */
@@ -3428,16 +3352,16 @@
and r2, r2, #15 @ r2<- C (or stays CCCC)
.endif
EXPORT_PC() @ must export for invoke
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodRange @ jump to common handler
+ b common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7100,8 +7024,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_VOLATILE_finish: @ field ptr in r0
@@ -7127,8 +7051,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_VOLATILE_resolve @ yes, do resolve
.LOP_SPUT_VOLATILE_finish: @ field ptr in r0
@@ -7229,8 +7153,8 @@
/* sget-wide vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_WIDE_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_WIDE_VOLATILE_finish:
@@ -7259,9 +7183,9 @@
/* sput-wide vAA, field@BBBB */
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
mov r9, rINST, lsr #8 @ r9<- AA
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_VOLATILE_resolve @ yes, do resolve
@@ -7282,9 +7206,19 @@
.balign 64
.L_OP_BREAKPOINT: /* 0xec */
/* File: armv5te/OP_BREAKPOINT.S */
-/* File: armv5te/unused.S */
- bl common_abort
-
+ /*
+ * Breakpoint handler.
+ *
+ * Restart this instruction with the original opcode. By
+ * the time we get here, the breakpoint will have already been
+ * handled.
+ */
+ mov r0, rPC
+ bl dvmGetOriginalOpcode @ (rPC)
+ FETCH(rINST, 0) @ reload OP_BREAKPOINT + rest of inst
+ and rINST, #0xff00
+ orr rINST, rINST, r0
+ GOTO_OPCODE(r0)
/* ------------------------------ */
.balign 64
@@ -7316,11 +7250,18 @@
* The first four args are in r0-r3, pointer to return value storage
* is on the stack. The function's return value is a flag that tells
* us if an exception was thrown.
+ *
+ * TUNING: could maintain two tables, pointer in Thread and
+ * swap if profiler/debuggger active.
*/
/* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .LOP_EXECUTE_INLINE_debugmode @ yes - take slow path
+.LOP_EXECUTE_INLINE_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #12 @ r0<- B
str r1, [sp] @ push &self->retval
@@ -7348,9 +7289,13 @@
* us if an exception was thrown.
*/
/* [opt] execute-inline/range {vCCCC..v(CCCC+AA-1)}, inline@BBBB */
+ ldrb r2, [rSELF, #offThread_subMode]
FETCH(r10, 1) @ r10<- BBBB
- add r1, rSELF, #offThread_retval @ r1<- &self->retval
EXPORT_PC() @ can throw
+ ands r2, #kSubModeDebugProfile @ Any going on?
+ bne .LOP_EXECUTE_INLINE_RANGE_debugmode @ yes - take slow path
+.LOP_EXECUTE_INLINE_RANGE_resume:
+ add r1, rSELF, #offThread_retval @ r1<- &self->retval
sub sp, sp, #8 @ make room for arg, +64 bit align
mov r0, rINST, lsr #8 @ r0<- AA
str r1, [sp] @ push &self->retval
@@ -7369,7 +7314,7 @@
/*
* Invoke Object.<init> on an object. In practice we know that
* Object's nullary constructor doesn't do anything, so we just
- * skip it (we know a debugger isn't active).
+ * skip it unless a debugger is active.
*/
FETCH(r1, 2) @ r1<- CCCC
GET_VREG(r0, r1) @ r0<- "this" ptr
@@ -7378,13 +7323,12 @@
ldr r1, [r0, #offObject_clazz] @ r1<- obj->clazz
ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
- beq 1f @ nope, done
- EXPORT_PC() @ can throw
- bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
- ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
- cmp r0, #0 @ exception pending?
- bne common_exceptionThrown @ yes, handle it
-1: FETCH_ADVANCE_INST(2+1) @ advance to next instr, load rINST
+ bne .LOP_INVOKE_OBJECT_INIT_RANGE_setFinal @ yes, go
+.LOP_INVOKE_OBJECT_INIT_RANGE_finish:
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeDebuggerActive @ debugger active?
+ bne .LOP_INVOKE_OBJECT_INIT_RANGE_debugger @ Yes - skip optimization
+ FETCH_ADVANCE_INST(2+1) @ advance to next instr, load rINST
GET_INST_OPCODE(ip) @ ip<- opcode from rINST
GOTO_OPCODE(ip) @ execute it
@@ -7526,14 +7470,14 @@
.if (!0)
and r3, r3, #15 @ r3<- C (or stays CCCC)
.endif
- GET_VREG(r2, r3) @ r2<- vC ("this" ptr)
- cmp r2, #0 @ is "this" null?
+ GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r2, [r2, #offObject_clazz] @ r2<- thisPtr->clazz
+ ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
EXPORT_PC() @ invoke must export
ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -7552,14 +7496,14 @@
.if (!1)
and r3, r3, #15 @ r3<- C (or stays CCCC)
.endif
- GET_VREG(r2, r3) @ r2<- vC ("this" ptr)
- cmp r2, #0 @ is "this" null?
+ GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r2, [r2, #offObject_clazz] @ r2<- thisPtr->clazz
+ ldr r2, [r9, #offObject_clazz] @ r2<- thisPtr->clazz
ldr r2, [r2, #offClassObject_vtable] @ r2<- thisPtr->clazz->vtable
EXPORT_PC() @ invoke must export
ldr r0, [r2, r1, lsl #2] @ r3<- vtable[BBBB]
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7582,12 +7526,12 @@
ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
EXPORT_PC() @ must export for invoke
ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
- GET_VREG(r3, r10) @ r3<- "this"
+ GET_VREG(r9, r10) @ r9<- "this"
ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
- cmp r3, #0 @ null "this" ref?
+ cmp r9, #0 @ null "this" ref?
ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
beq common_errNullObject @ "this" is null, throw exception
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -7610,12 +7554,12 @@
ldr r2, [r2, #offMethod_clazz] @ r2<- method->clazz
EXPORT_PC() @ must export for invoke
ldr r2, [r2, #offClassObject_super] @ r2<- method->clazz->super
- GET_VREG(r3, r10) @ r3<- "this"
+ GET_VREG(r9, r10) @ r9<- "this"
ldr r2, [r2, #offClassObject_vtable] @ r2<- ...clazz->super->vtable
- cmp r3, #0 @ null "this" ref?
+ cmp r9, #0 @ null "this" ref?
ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
beq common_errNullObject @ "this" is null, throw exception
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* ------------------------------ */
@@ -7659,8 +7603,8 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_VOLATILE_resolve @ yes, do resolve
.LOP_SGET_OBJECT_VOLATILE_finish: @ field ptr in r0
@@ -7686,18 +7630,19 @@
/* op vAA, field@BBBB */
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r1, 1) @ r1<- field ref BBBB
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_VOLATILE_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
-
+ beq .LOP_SPUT_OBJECT_VOLATILE_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_VOLATILE_finish: @ field ptr in r0
+ mov r2, rINST, lsr #8 @ r2<- AA
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[AA]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SMP_DMB @ releasing store
+ b .LOP_SPUT_OBJECT_VOLATILE_end
/* ------------------------------ */
@@ -7798,6 +7743,9 @@
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r3, [r3, #offDvmDex_pResClasses] @ r3<- pDvmDex->pResClasses
ldr r0, [r3, r1, lsl #2] @ r0<- resolved class
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_class
+#endif
EXPORT_PC() @ req'd for init, resolve, alloc
cmp r0, #0 @ already resolved?
beq .LOP_NEW_INSTANCE_JUMBO_resolve @ no, resolve it now
@@ -8271,9 +8219,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_JUMBO_resolve @ yes, do resolve
.LOP_SGET_JUMBO_finish: @ field ptr in r0
@@ -8330,9 +8278,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_JUMBO_resolve @ yes, do resolve
.LOP_SGET_OBJECT_JUMBO_finish: @ field ptr in r0
@@ -8360,9 +8308,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BOOLEAN_JUMBO_resolve @ yes, do resolve
.LOP_SGET_BOOLEAN_JUMBO_finish: @ field ptr in r0
@@ -8390,9 +8338,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_BYTE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_BYTE_JUMBO_finish: @ field ptr in r0
@@ -8420,9 +8368,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_CHAR_JUMBO_resolve @ yes, do resolve
.LOP_SGET_CHAR_JUMBO_finish: @ field ptr in r0
@@ -8450,9 +8398,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_SHORT_JUMBO_resolve @ yes, do resolve
.LOP_SGET_SHORT_JUMBO_finish: @ field ptr in r0
@@ -8479,9 +8427,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_JUMBO_finish: @ field ptr in r0
@@ -8504,10 +8452,10 @@
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- aaaa (lo)
FETCH(r2, 2) @ r2<- AAAA (hi)
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r1, r2, lsl #16 @ r1<- AAAAaaaa
FETCH(r9, 3) @ r9<- BBBB
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_JUMBO_resolve @ yes, do resolve
@@ -8534,18 +8482,20 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_JUMBO_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq .LOP_SPUT_OBJECT_JUMBO_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_JUMBO_finish: @ field ptr in r0
+ FETCH(r2, 3) @ r2<- BBBB
+ FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[BBBB]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ @ no-op @ releasing store
+ b .LOP_SPUT_OBJECT_JUMBO_end
/* ------------------------------ */
.balign 64
@@ -8562,9 +8512,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BOOLEAN_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_BOOLEAN_JUMBO_finish: @ field ptr in r0
@@ -8592,9 +8542,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_BYTE_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_BYTE_JUMBO_finish: @ field ptr in r0
@@ -8622,9 +8572,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_CHAR_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_CHAR_JUMBO_finish: @ field ptr in r0
@@ -8652,9 +8602,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_SHORT_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_SHORT_JUMBO_finish: @ field ptr in r0
@@ -8706,13 +8656,13 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldr r0, [r3, r1, lsl #2] @ r0<- resolved baseMethod
- cmp r2, #0 @ null "this"?
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
+ cmp r9, #0 @ null "this"?
+ ldr r10, [rSELF, #offThread_method] @ r10<- current method
beq common_errNullObject @ null "this", throw exception
cmp r0, #0 @ already resolved?
- ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
+ ldr r10, [r10, #offMethod_clazz] @ r10<- method->clazz
EXPORT_PC() @ must export for invoke
bne .LOP_INVOKE_SUPER_JUMBO_continue @ resolved, continue on
b .LOP_INVOKE_SUPER_JUMBO_resolve @ do resolve now
@@ -8740,11 +8690,11 @@
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- GET_VREG(r2, r10) @ r2<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
beq .LOP_INVOKE_DIRECT_JUMBO_resolve @ not resolved, do it now
.LOP_INVOKE_DIRECT_JUMBO_finish:
- cmp r2, #0 @ null "this" ref?
- bne common_invokeMethodJumbo @ no, continue on
+ cmp r9, #0 @ null "this" ref?
+ bne common_invokeMethodJumbo @ (r0=method, r9="this")
b common_errNullObject @ yes, throw exception
/* ------------------------------ */
@@ -8761,16 +8711,13 @@
ldr r3, [r3, #offDvmDex_pResMethods] @ r3<- pDvmDex->pResMethods
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
ldr r0, [r3, r1, lsl #2] @ r0<- resolved methodToCall
+#if defined(WITH_JIT)
+ add r10, r3, r1, lsl #2 @ r10<- &resolved_methodToCall
+#endif
cmp r0, #0 @ already resolved?
EXPORT_PC() @ must export for invoke
- bne common_invokeMethodJumbo @ yes, continue on
-0: ldr r3, [rSELF, #offThread_method] @ r3<- self->method
- ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
- mov r2, #METHOD_STATIC @ resolver method type
- bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
- cmp r0, #0 @ got null?
- bne common_invokeMethodJumbo @ no, continue
- b common_exceptionThrown @ yes, handle exception
+ bne common_invokeMethodJumboNoThis @ (r0=method)
+ b .LOP_INVOKE_STATIC_JUMBO_resolve
/* ------------------------------ */
.balign 64
@@ -8785,16 +8732,16 @@
FETCH(r1, 2) @ r1<- AAAA (hi)
EXPORT_PC() @ must export for invoke
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- GET_VREG(r0, r2) @ r0<- first arg ("this")
+ GET_VREG(r9, r2) @ r9<- first arg ("this")
ldr r3, [rSELF, #offThread_methodClassDex] @ r3<- methodClassDex
- cmp r0, #0 @ null obj?
+ cmp r9, #0 @ null obj?
ldr r2, [rSELF, #offThread_method] @ r2<- method
beq common_errNullObject @ yes, fail
- ldr r0, [r0, #offObject_clazz] @ r0<- thisPtr->clazz
+ ldr r0, [r9, #offObject_clazz] @ r0<- thisPtr->clazz
bl dvmFindInterfaceMethodInCache @ r0<- call(class, ref, method, dex)
cmp r0, #0 @ failed?
beq common_exceptionThrown @ yes, handle exception
- b common_invokeMethodJumbo @ jump to common handler
+ b common_invokeMethodJumbo @ (r0=method, r9="this")
/* ------------------------------ */
.balign 64
@@ -10428,7 +10375,7 @@
/*
* Invoke Object.<init> on an object. In practice we know that
* Object's nullary constructor doesn't do anything, so we just
- * skip it (we know a debugger isn't active).
+ * skip it unless a debugger is active.
*/
FETCH(r1, 4) @ r1<- CCCC
GET_VREG(r0, r1) @ r0<- "this" ptr
@@ -10437,13 +10384,12 @@
ldr r1, [r0, #offObject_clazz] @ r1<- obj->clazz
ldr r2, [r1, #offClassObject_accessFlags] @ r2<- clazz->accessFlags
tst r2, #CLASS_ISFINALIZABLE @ is this class finalizable?
- beq 1f @ nope, done
- EXPORT_PC() @ can throw
- bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
- ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
- cmp r0, #0 @ exception pending?
- bne common_exceptionThrown @ yes, handle it
-1: FETCH_ADVANCE_INST(4+1) @ advance to next instr, load rINST
+ bne .LOP_INVOKE_OBJECT_INIT_JUMBO_setFinal @ yes, go
+.LOP_INVOKE_OBJECT_INIT_JUMBO_finish:
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeDebuggerActive @ debugger active?
+ bne .LOP_INVOKE_OBJECT_INIT_JUMBO_debugger @ Yes - skip optimization
+ FETCH_ADVANCE_INST(4+1) @ advance to next instr, load rINST
GET_INST_OPCODE(ip) @ ip<- opcode from rINST
GOTO_OPCODE(ip) @ execute it
@@ -10627,9 +10573,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -10690,9 +10636,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SGET_OBJECT_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SGET_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -10721,9 +10667,9 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
beq .LOP_SPUT_VOLATILE_JUMBO_resolve @ yes, do resolve
.LOP_SPUT_VOLATILE_JUMBO_finish: @ field ptr in r0
@@ -10748,10 +10694,10 @@
ldr r0, [rSELF, #offThread_methodClassDex] @ r0<- DvmDex
FETCH(r1, 1) @ r1<- aaaa (lo)
FETCH(r2, 2) @ r2<- AAAA (hi)
- ldr r0, [r0, #offDvmDex_pResFields] @ r0<- dvmDex->pResFields
+ ldr r10, [r0, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r1, r2, lsl #16 @ r1<- AAAAaaaa
FETCH(r9, 3) @ r9<- BBBB
- ldr r2, [r0, r1, lsl #2] @ r2<- resolved StaticField ptr
+ ldr r2, [r10, r1, lsl #2] @ r2<- resolved StaticField ptr
add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
cmp r2, #0 @ is resolved entry null?
beq .LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve @ yes, do resolve
@@ -10780,18 +10726,20 @@
ldr r2, [rSELF, #offThread_methodClassDex] @ r2<- DvmDex
FETCH(r0, 1) @ r0<- aaaa (lo)
FETCH(r1, 2) @ r1<- AAAA (hi)
- ldr r2, [r2, #offDvmDex_pResFields] @ r2<- dvmDex->pResFields
+ ldr r10, [r2, #offDvmDex_pResFields] @ r10<- dvmDex->pResFields
orr r1, r0, r1, lsl #16 @ r1<- AAAAaaaa
- ldr r0, [r2, r1, lsl #2] @ r0<- resolved StaticField ptr
+ ldr r0, [r10, r1, lsl #2] @ r0<- resolved StaticField ptr
cmp r0, #0 @ is resolved entry null?
- bne .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ no, continue
- ldr r9, [rSELF, #offThread_method] @ r9<- current method
- EXPORT_PC() @ resolve() could throw, so export now
- ldr r0, [r9, #offMethod_clazz] @ r0<- method->clazz
- bl dvmResolveStaticField @ r0<- resolved StaticField ptr
- cmp r0, #0 @ success?
- bne .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq .LOP_SPUT_OBJECT_VOLATILE_JUMBO_resolve @ yes, do resolve
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
+ FETCH(r2, 3) @ r2<- BBBB
+ FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
+ GET_VREG(r1, r2) @ r1<- fp[BBBB]
+ ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
+ ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SMP_DMB @ releasing store
+ b .LOP_SPUT_OBJECT_VOLATILE_JUMBO_end
/* ------------------------------ */
@@ -10988,12 +10936,45 @@
.LOP_NEW_INSTANCE_finish: @ r0=new object
mov r3, rINST, lsr #8 @ r3<- AA
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .LOP_NEW_INSTANCE_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.LOP_NEW_INSTANCE_end:
FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vAA<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.LOP_NEW_INSTANCE_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .LOP_NEW_INSTANCE_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
@@ -11132,14 +11113,17 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY
bl dvmThrowInternalError
b common_exceptionThrown
- .if (!0) @ define in one or the other, not both
-.L_strFilledNewArrayNotImpl:
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY:
.word .LstrFilledNewArrayNotImpl
- .endif
/* continuation for OP_FILLED_NEW_ARRAY_RANGE */
@@ -11213,14 +11197,17 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_RANGE_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_RANGE
bl dvmThrowInternalError
b common_exceptionThrown
- .if (!1) @ define in one or the other, not both
-.L_strFilledNewArrayNotImpl:
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_RANGE:
.word .LstrFilledNewArrayNotImpl
- .endif
/* continuation for OP_CMPL_FLOAT */
.LOP_CMPL_FLOAT_finish:
@@ -11611,216 +11598,378 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_finish
/* continuation for OP_SGET_WIDE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r0.
*/
.LOP_SGET_WIDE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r1<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_WIDE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_WIDE_finish @ resume
/* continuation for OP_SGET_OBJECT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_finish
/* continuation for OP_SGET_BOOLEAN */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BOOLEAN_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BOOLEAN_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BOOLEAN_finish
/* continuation for OP_SGET_BYTE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BYTE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BYTE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BYTE_finish
/* continuation for OP_SGET_CHAR */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_CHAR_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_CHAR_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_CHAR_finish
/* continuation for OP_SGET_SHORT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_SHORT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_SHORT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_SHORT_finish
/* continuation for OP_SPUT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_finish @ resume
/* continuation for OP_SPUT_WIDE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
- * r9: &fp[AA]
+ * r1: BBBB field ref
+ * r9: &fp[AA]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_finish @ resume
/* continuation for OP_SPUT_OBJECT */
-.LOP_SPUT_OBJECT_finish: @ field ptr in r0
- mov r2, rINST, lsr #8 @ r2<- AA
- FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[AA]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- @ no-op @ releasing store
+
+
+.LOP_SPUT_OBJECT_end:
str r1, [r0, #offStaticField_value] @ field<- vAA
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
-/* continuation for OP_SPUT_BOOLEAN */
-
- /*
- * Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ /* Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
-.LOP_SPUT_BOOLEAN_resolve:
+.LOP_SPUT_OBJECT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BOOLEAN_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_finish @ resume
+
+
+/* continuation for OP_SPUT_BOOLEAN */
+
+ /*
+ * Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_BOOLEAN_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BOOLEAN_finish @ resume
/* continuation for OP_SPUT_BYTE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_BYTE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BYTE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BYTE_finish @ resume
/* continuation for OP_SPUT_CHAR */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_CHAR_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_CHAR_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_CHAR_finish @ resume
/* continuation for OP_SPUT_SHORT */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_SHORT_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_SHORT_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_SHORT_finish @ resume
/* continuation for OP_INVOKE_VIRTUAL */
@@ -11830,24 +11979,24 @@
* r10 = C or CCCC (index of first arg, which is the "this" ptr)
*/
.LOP_INVOKE_VIRTUAL_continue:
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodNoRange @ continue on
+ bl common_invokeMethodNoRange @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -11858,7 +12007,7 @@
bl common_invokeMethodNoRange @ continue on
.LOP_INVOKE_SUPER_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -11886,10 +12035,42 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC */
+
+
+.LOP_INVOKE_STATIC_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodNoRange @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodNoRange @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodNoRange @ whew, finally!
+#else
+ bne common_invokeMethodNoRange @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
/* continuation for OP_INVOKE_VIRTUAL_RANGE */
/*
@@ -11898,24 +12079,24 @@
* r10 = C or CCCC (index of first arg, which is the "this" ptr)
*/
.LOP_INVOKE_VIRTUAL_RANGE_continue:
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodRange @ continue on
+ bl common_invokeMethodRange @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER_RANGE */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_RANGE_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -11926,7 +12107,7 @@
bl common_invokeMethodRange @ continue on
.LOP_INVOKE_SUPER_RANGE_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -11954,10 +12135,42 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_RANGE_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC_RANGE */
+
+
+.LOP_INVOKE_STATIC_RANGE_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodRange @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodRange @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodRange @ whew, finally!
+#else
+ bne common_invokeMethodRange @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
/* continuation for OP_FLOAT_TO_LONG */
/*
* Convert the float in r0 to a long in r0/r1.
@@ -12143,31 +12356,53 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_VOLATILE_finish
/* continuation for OP_SPUT_VOLATILE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_VOLATILE_finish @ resume
/* continuation for OP_IGET_OBJECT_VOLATILE */
@@ -12244,37 +12479,59 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r0.
*/
.LOP_SGET_WIDE_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r1<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_WIDE_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_WIDE_VOLATILE_finish @ resume
/* continuation for OP_SPUT_WIDE_VOLATILE */
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
- * r9: &fp[AA]
+ * r1: BBBB field ref
+ * r9: &fp[AA]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_VOLATILE_finish @ resume
/* continuation for OP_EXECUTE_INLINE */
@@ -12308,6 +12565,36 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.LOP_EXECUTE_INLINE_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .LOP_EXECUTE_INLINE_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .LOP_EXECUTE_INLINE_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.LOP_EXECUTE_INLINE_table:
.word gDvmInlineOpsTable
@@ -12337,9 +12624,67 @@
ldr pc, [r9, r10, lsl #4] @ sizeof=16, "func" is first entry
@ (not reached)
+
+ /*
+ * We're debugging or profiling.
+ * r10: opIndex
+ */
+.LOP_EXECUTE_INLINE_RANGE_debugmode:
+ mov r0, r10
+ bl dvmResolveInlineNative
+ cmp r0, #0 @ did it resolve?
+ beq .LOP_EXECUTE_INLINE_RANGE_resume @ no, just move on
+ mov r1, rSELF
+ bl dvmFastMethodTraceEnter @ (method, self)
+ add r1, rSELF, #offThread_retval@ r1<- &self->retval
+ sub sp, sp, #8 @ make room for arg, +64 bit align
+ mov r0, rINST, lsr #12 @ r0<- B
+ str r1, [sp] @ push &self->retval
+ bl .LOP_EXECUTE_INLINE_RANGE_continue @ make call; will return after
+ add sp, sp, #8 @ pop stack
+ cmp r0, #0 @ test boolean result of inline
+ beq common_exceptionThrown @ returned false, handle exception
+ mov r0, r10
+ bl dvmResolveInlineNative @ reload method
+ mov r1, rSELF
+ bl dvmFastMethodTraceExit @ (method, self)
+ FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip) @ jump to next instruction
+
+
+
+
.LOP_EXECUTE_INLINE_RANGE_table:
.word gDvmInlineOpsTable
+
+/* continuation for OP_INVOKE_OBJECT_INIT_RANGE */
+
+.LOP_INVOKE_OBJECT_INIT_RANGE_setFinal:
+ EXPORT_PC() @ can throw
+ bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
+ ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
+ cmp r0, #0 @ exception pending?
+ bne common_exceptionThrown @ yes, handle it
+ b .LOP_INVOKE_OBJECT_INIT_RANGE_finish
+
+ /*
+ * A debugger is attached, so we need to go ahead and do
+ * this. For simplicity, we'll just jump directly to the
+ * corresponding handler. Note that we can't use
+ * rIBASE here because it may be in single-step mode.
+ * Load the primary table base directly.
+ */
+.LOP_INVOKE_OBJECT_INIT_RANGE_debugger:
+ ldr r1, [rSELF, #offThread_mainHandlerTable]
+ .if 0
+ mov ip, #OP_INVOKE_DIRECT_JUMBO
+ .else
+ mov ip, #OP_INVOKE_DIRECT_RANGE
+ .endif
+ GOTO_OPCODE_BASE(r1,ip) @ execute it
+
/* continuation for OP_IPUT_OBJECT_VOLATILE */
/*
@@ -12368,31 +12713,61 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: BBBB field ref
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_VOLATILE_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_VOLATILE_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_VOLATILE_finish
/* continuation for OP_SPUT_OBJECT_VOLATILE */
-.LOP_SPUT_OBJECT_VOLATILE_finish: @ field ptr in r0
- mov r2, rINST, lsr #8 @ r2<- AA
- FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[AA]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- SMP_DMB @ releasing store
+
+
+.LOP_SPUT_OBJECT_VOLATILE_end:
str r1, [r0, #offStaticField_value] @ field<- vAA
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+ /* Continuation if the field has not yet been resolved.
+ * r1: BBBB field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_OBJECT_VOLATILE_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_VOLATILE_finish @ resume
+
+
/* continuation for OP_CONST_CLASS_JUMBO */
/*
@@ -12534,12 +12909,45 @@
.LOP_NEW_INSTANCE_JUMBO_finish: @ r0=new object
FETCH(r3, 3) @ r3<- BBBB
cmp r0, #0 @ failed?
+#if defined(WITH_JIT)
+ /*
+ * The JIT needs the class to be fully resolved before it can
+ * include this instruction in a trace.
+ */
+ ldrb r1, [rSELF, #offThread_subMode]
beq common_exceptionThrown @ yes, handle the exception
+ ands r1, #kSubModeJitTraceBuild @ under construction?
+ bne .LOP_NEW_INSTANCE_JUMBO_jitCheck
+#else
+ beq common_exceptionThrown @ yes, handle the exception
+#endif
+.LOP_NEW_INSTANCE_JUMBO_end:
FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
SET_VREG(r0, r3) @ vBBBB<- r0
GOTO_OPCODE(ip) @ jump to next instruction
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we need to stop the trace building early.
+ * r0: new object
+ * r3: vAA
+ */
+.LOP_NEW_INSTANCE_JUMBO_jitCheck:
+ ldr r1, [r10] @ reload resolved class
+ cmp r1, #0 @ okay?
+ bne .LOP_NEW_INSTANCE_JUMBO_end @ yes, finish
+ mov r9, r0 @ preserve new object
+ mov r10, r3 @ preserve vAA
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ FETCH_ADVANCE_INST(2) @ advance rPC, load rINST
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ SET_VREG(r9, r10) @ vAA<- new object
+ GOTO_OPCODE(ip) @ jump to next instruction
+#endif
+
/*
* Class initialization required.
*
@@ -12654,10 +13062,18 @@
* mode of filled-new-array.
*/
.LOP_FILLED_NEW_ARRAY_JUMBO_notimpl:
- ldr r0, .L_strFilledNewArrayNotImpl
+ ldr r0, .L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_JUMBO
bl dvmThrowInternalError
b common_exceptionThrown
+ /*
+ * Ideally we'd only define this once, but depending on layout we can
+ * exceed the range of the load above.
+ */
+
+.L_strFilledNewArrayNotImpl_OP_FILLED_NEW_ARRAY_JUMBO:
+ .word .LstrFilledNewArrayNotImpl
+
/* continuation for OP_IGET_JUMBO */
/*
@@ -13093,16 +13509,27 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_JUMBO_finish @ resume
/* continuation for OP_SGET_WIDE_JUMBO */
@@ -13125,185 +13552,324 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_JUMBO_finish @ resume
/* continuation for OP_SGET_BOOLEAN_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BOOLEAN_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BOOLEAN_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BOOLEAN_JUMBO_finish @ resume
/* continuation for OP_SGET_BYTE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_BYTE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_BYTE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_BYTE_JUMBO_finish @ resume
/* continuation for OP_SGET_CHAR_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_CHAR_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_CHAR_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_CHAR_JUMBO_finish @ resume
/* continuation for OP_SGET_SHORT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_SHORT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_SHORT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_SHORT_JUMBO_finish @ resume
/* continuation for OP_SPUT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_JUMBO_finish @ resume
/* continuation for OP_SPUT_WIDE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
- * r9: &fp[BBBB]
+ * r1: AAAAAAAA field ref
+ * r9: &fp[BBBB]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_JUMBO_finish @ resume
/* continuation for OP_SPUT_OBJECT_JUMBO */
-.LOP_SPUT_OBJECT_JUMBO_finish: @ field ptr in r0
- FETCH(r2, 3) @ r2<- BBBB
- FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[BBBB]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- @ no-op @ releasing store
+
+.LOP_SPUT_OBJECT_JUMBO_end:
str r1, [r0, #offStaticField_value] @ field<- vBBBB
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
-/* continuation for OP_SPUT_BOOLEAN_JUMBO */
-
- /*
- * Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ /* Continuation if the field has not yet been resolved.
+ * r1: AAAAaaaa field ref
+ * r10: dvmDex->pResFields
*/
-.LOP_SPUT_BOOLEAN_JUMBO_resolve:
- ldr r2, [rSELF, #offThread_method] @ r2<- current method
+.LOP_SPUT_OBJECT_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r9<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BOOLEAN_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_JUMBO_finish @ resume
+
+
+/* continuation for OP_SPUT_BOOLEAN_JUMBO */
+
+ /*
+ * Continuation if the field has not yet been resolved.
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_BOOLEAN_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BOOLEAN_JUMBO_finish @ resume
/* continuation for OP_SPUT_BYTE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_BYTE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_BYTE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_BYTE_JUMBO_finish @ resume
/* continuation for OP_SPUT_CHAR_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_CHAR_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_CHAR_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_CHAR_JUMBO_finish @ resume
/* continuation for OP_SPUT_SHORT_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_SHORT_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_SHORT_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_SHORT_JUMBO_finish @ resume
/* continuation for OP_INVOKE_VIRTUAL_JUMBO */
@@ -13313,24 +13879,24 @@
*/
.LOP_INVOKE_VIRTUAL_JUMBO_continue:
FETCH(r10, 4) @ r10<- CCCC
- GET_VREG(r1, r10) @ r1<- "this" ptr
+ GET_VREG(r9, r10) @ r9<- "this" ptr
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
- cmp r1, #0 @ is "this" null?
+ cmp r9, #0 @ is "this" null?
beq common_errNullObject @ null "this", throw exception
- ldr r3, [r1, #offObject_clazz] @ r1<- thisPtr->clazz
+ ldr r3, [r9, #offObject_clazz] @ r3<- thisPtr->clazz
ldr r3, [r3, #offClassObject_vtable] @ r3<- thisPtr->clazz->vtable
ldr r0, [r3, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
/* continuation for OP_INVOKE_SUPER_JUMBO */
/*
* At this point:
* r0 = resolved base method
- * r9 = method->clazz
+ * r10 = method->clazz
*/
.LOP_INVOKE_SUPER_JUMBO_continue:
- ldr r1, [r9, #offClassObject_super] @ r1<- method->clazz->super
+ ldr r1, [r10, #offClassObject_super] @ r1<- method->clazz->super
ldrh r2, [r0, #offMethod_methodIndex] @ r2<- baseMethod->methodIndex
ldr r3, [r1, #offClassObject_vtableCount] @ r3<- super->vtableCount
EXPORT_PC() @ must export for invoke
@@ -13338,10 +13904,10 @@
bcs .LOP_INVOKE_SUPER_JUMBO_nsm @ method not present in superclass
ldr r1, [r1, #offClassObject_vtable] @ r1<- ...clazz->super->vtable
ldr r0, [r1, r2, lsl #2] @ r3<- vtable[methodIndex]
- bl common_invokeMethodJumbo @ continue on
+ bl common_invokeMethodJumbo @ (r0=method, r9="this")
.LOP_INVOKE_SUPER_JUMBO_resolve:
- mov r0, r9 @ r0<- method->clazz
+ mov r0, r10 @ r0<- method->clazz
mov r2, #METHOD_VIRTUAL @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
@@ -13369,10 +13935,68 @@
mov r2, #METHOD_DIRECT @ resolver method type
bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
cmp r0, #0 @ got null?
- GET_VREG(r2, r10) @ r2<- "this" ptr (reload)
bne .LOP_INVOKE_DIRECT_JUMBO_finish @ no, continue
b common_exceptionThrown @ yes, handle exception
+/* continuation for OP_INVOKE_STATIC_JUMBO */
+
+
+.LOP_INVOKE_STATIC_JUMBO_resolve:
+ ldr r3, [rSELF, #offThread_method] @ r3<- self->method
+ ldr r0, [r3, #offMethod_clazz] @ r0<- method->clazz
+ mov r2, #METHOD_STATIC @ resolver method type
+ bl dvmResolveMethod @ r0<- call(clazz, ref, flags)
+ cmp r0, #0 @ got null?
+#if defined(WITH_JIT)
+ /*
+ * Check to see if we're actively building a trace. If so,
+ * we need to keep this instruction out of it.
+ * r10: &resolved_methodToCall
+ */
+ ldrb r2, [rSELF, #offThread_subMode]
+ beq common_exceptionThrown @ null, handle exception
+ ands r2, #kSubModeJitTraceBuild @ trace under construction?
+ beq common_invokeMethodJumboNoThis @ no (r0=method, r9="this")
+ ldr r1, [r10] @ reload resolved method
+ cmp r1, #0 @ finished resolving?
+ bne common_invokeMethodJumboNoThis @ yes (r0=method, r9="this")
+ mov r10, r0 @ preserve method
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self, pc)
+ mov r0, r10
+ b common_invokeMethodJumboNoThis @ whew, finally!
+#else
+ bne common_invokeMethodJumboNoThis @ (r0=method, r9="this")
+ b common_exceptionThrown @ yes, handle exception
+#endif
+
+/* continuation for OP_INVOKE_OBJECT_INIT_JUMBO */
+
+.LOP_INVOKE_OBJECT_INIT_JUMBO_setFinal:
+ EXPORT_PC() @ can throw
+ bl dvmSetFinalizable @ call dvmSetFinalizable(obj)
+ ldr r0, [rSELF, #offThread_exception] @ r0<- self->exception
+ cmp r0, #0 @ exception pending?
+ bne common_exceptionThrown @ yes, handle it
+ b .LOP_INVOKE_OBJECT_INIT_JUMBO_finish
+
+ /*
+ * A debugger is attached, so we need to go ahead and do
+ * this. For simplicity, we'll just jump directly to the
+ * corresponding handler. Note that we can't use
+ * rIBASE here because it may be in single-step mode.
+ * Load the primary table base directly.
+ */
+.LOP_INVOKE_OBJECT_INIT_JUMBO_debugger:
+ ldr r1, [rSELF, #offThread_mainHandlerTable]
+ .if 1
+ mov ip, #OP_INVOKE_DIRECT_JUMBO
+ .else
+ mov ip, #OP_INVOKE_DIRECT_RANGE
+ .endif
+ GOTO_OPCODE_BASE(r1,ip) @ execute it
+
/* continuation for OP_IGET_VOLATILE_JUMBO */
/*
@@ -13568,16 +14192,27 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SGET_WIDE_VOLATILE_JUMBO */
@@ -13600,66 +14235,117 @@
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SGET_OBJECT_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SGET_OBJECT_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_VOLATILE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
+ * r1: AAAAAAAA field ref
+ * r10: dvmDex->pResFields
*/
.LOP_SPUT_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
- bne .LOP_SPUT_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_WIDE_VOLATILE_JUMBO */
/*
* Continuation if the field has not yet been resolved.
- * r1: AAAAAAAA field ref
- * r9: &fp[BBBB]
+ * r1: AAAAAAAA field ref
+ * r9: &fp[BBBB]
+ * r10: dvmDex->pResFields
*
* Returns StaticField pointer in r2.
*/
.LOP_SPUT_WIDE_VOLATILE_JUMBO_resolve:
ldr r2, [rSELF, #offThread_method] @ r2<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
EXPORT_PC() @ resolve() could throw, so export now
ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
bl dvmResolveStaticField @ r0<- resolved StaticField ptr
cmp r0, #0 @ success?
mov r2, r0 @ copy to r2
- bne .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish @ yes, finish
- b common_exceptionThrown @ no, handle exception
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_WIDE_VOLATILE_JUMBO_finish @ resume
/* continuation for OP_SPUT_OBJECT_VOLATILE_JUMBO */
-.LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish: @ field ptr in r0
- FETCH(r2, 3) @ r2<- BBBB
- FETCH_ADVANCE_INST(4) @ advance rPC, load rINST
- GET_VREG(r1, r2) @ r1<- fp[BBBB]
- ldr r2, [rSELF, #offThread_cardTable] @ r2<- card table base
- ldr r9, [r0, #offField_clazz] @ r9<- field->clazz
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- SMP_DMB @ releasing store
+
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_end:
str r1, [r0, #offStaticField_value] @ field<- vBBBB
cmp r1, #0 @ stored a null object?
strneb r2, [r2, r9, lsr #GC_CARD_SHIFT] @ mark card based on obj head
GOTO_OPCODE(ip) @ jump to next instruction
+ /* Continuation if the field has not yet been resolved.
+ * r1: AAAAaaaa field ref
+ * r10: dvmDex->pResFields
+ */
+.LOP_SPUT_OBJECT_VOLATILE_JUMBO_resolve:
+ ldr r2, [rSELF, #offThread_method] @ r9<- current method
+#if defined(WITH_JIT)
+ add r10, r10, r1, lsl #2 @ r10<- &dvmDex->pResFields[field]
+#endif
+ EXPORT_PC() @ resolve() could throw, so export now
+ ldr r0, [r2, #offMethod_clazz] @ r0<- method->clazz
+ bl dvmResolveStaticField @ r0<- resolved StaticField ptr
+ cmp r0, #0 @ success?
+ beq common_exceptionThrown @ no, handle exception
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including this instruction.
+ */
+ bl common_verifyField
+#endif
+ b .LOP_SPUT_OBJECT_VOLATILE_JUMBO_finish @ resume
+
+
.size dvmAsmSisterStart, .-dvmAsmSisterStart
.global dvmAsmSisterEnd
dvmAsmSisterEnd:
@@ -13667,7196 +14353,11818 @@
.global dvmAsmAltInstructionStart
.type dvmAsmAltInstructionStart, %function
-dvmAsmAltInstructionStart:
.text
+dvmAsmAltInstructionStart = .L_ALT_OP_NOP
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOP: /* 0x00 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (0 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE: /* 0x01 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (1 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_FROM16: /* 0x02 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (2 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_16: /* 0x03 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (3 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE: /* 0x04 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (4 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE_FROM16: /* 0x05 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (5 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_WIDE_16: /* 0x06 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (6 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT: /* 0x07 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (7 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT_FROM16: /* 0x08 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (8 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_OBJECT_16: /* 0x09 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (9 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT: /* 0x0a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (10 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT_WIDE: /* 0x0b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (11 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_RESULT_OBJECT: /* 0x0c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (12 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MOVE_EXCEPTION: /* 0x0d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (13 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_VOID: /* 0x0e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (14 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN: /* 0x0f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (15 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_WIDE: /* 0x10 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (16 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_OBJECT: /* 0x11 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (17 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_4: /* 0x12 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (18 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_16: /* 0x13 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (19 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST: /* 0x14 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (20 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_HIGH16: /* 0x15 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (21 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_16: /* 0x16 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (22 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_32: /* 0x17 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (23 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE: /* 0x18 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (24 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_WIDE_HIGH16: /* 0x19 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (25 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_STRING: /* 0x1a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (26 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_STRING_JUMBO: /* 0x1b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (27 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_CLASS: /* 0x1c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (28 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MONITOR_ENTER: /* 0x1d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (29 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MONITOR_EXIT: /* 0x1e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (30 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CHECK_CAST: /* 0x1f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (31 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INSTANCE_OF: /* 0x20 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (32 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ARRAY_LENGTH: /* 0x21 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (33 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_INSTANCE: /* 0x22 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (34 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_ARRAY: /* 0x23 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (35 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY: /* 0x24 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (36 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY_RANGE: /* 0x25 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (37 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILL_ARRAY_DATA: /* 0x26 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (38 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW: /* 0x27 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (39 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO: /* 0x28 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (40 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO_16: /* 0x29 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (41 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_GOTO_32: /* 0x2a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (42 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_PACKED_SWITCH: /* 0x2b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (43 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPARSE_SWITCH: /* 0x2c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (44 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPL_FLOAT: /* 0x2d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (45 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPG_FLOAT: /* 0x2e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (46 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPL_DOUBLE: /* 0x2f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (47 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMPG_DOUBLE: /* 0x30 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (48 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CMP_LONG: /* 0x31 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (49 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_EQ: /* 0x32 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (50 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_NE: /* 0x33 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (51 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LT: /* 0x34 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (52 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GE: /* 0x35 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (53 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GT: /* 0x36 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (54 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LE: /* 0x37 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (55 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_EQZ: /* 0x38 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (56 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_NEZ: /* 0x39 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (57 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LTZ: /* 0x3a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (58 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GEZ: /* 0x3b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (59 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_GTZ: /* 0x3c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (60 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IF_LEZ: /* 0x3d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (61 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3E: /* 0x3e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (62 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3F: /* 0x3f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (63 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_40: /* 0x40 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (64 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_41: /* 0x41 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (65 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_42: /* 0x42 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (66 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_43: /* 0x43 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (67 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET: /* 0x44 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (68 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_WIDE: /* 0x45 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (69 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_OBJECT: /* 0x46 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (70 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_BOOLEAN: /* 0x47 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (71 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_BYTE: /* 0x48 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (72 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_CHAR: /* 0x49 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (73 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AGET_SHORT: /* 0x4a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (74 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT: /* 0x4b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (75 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_WIDE: /* 0x4c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (76 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_OBJECT: /* 0x4d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (77 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_BOOLEAN: /* 0x4e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (78 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_BYTE: /* 0x4f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (79 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_CHAR: /* 0x50 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (80 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_APUT_SHORT: /* 0x51 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (81 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET: /* 0x52 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (82 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE: /* 0x53 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (83 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT: /* 0x54 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (84 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BOOLEAN: /* 0x55 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (85 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BYTE: /* 0x56 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (86 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_CHAR: /* 0x57 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (87 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_SHORT: /* 0x58 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (88 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT: /* 0x59 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (89 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE: /* 0x5a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (90 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT: /* 0x5b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (91 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BOOLEAN: /* 0x5c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (92 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BYTE: /* 0x5d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (93 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_CHAR: /* 0x5e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (94 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_SHORT: /* 0x5f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (95 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET: /* 0x60 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (96 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE: /* 0x61 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (97 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT: /* 0x62 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (98 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BOOLEAN: /* 0x63 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (99 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BYTE: /* 0x64 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (100 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_CHAR: /* 0x65 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (101 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_SHORT: /* 0x66 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (102 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT: /* 0x67 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (103 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE: /* 0x68 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (104 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT: /* 0x69 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (105 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BOOLEAN: /* 0x6a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (106 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BYTE: /* 0x6b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (107 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_CHAR: /* 0x6c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (108 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_SHORT: /* 0x6d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (109 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL: /* 0x6e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (110 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER: /* 0x6f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (111 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT: /* 0x70 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (112 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC: /* 0x71 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (113 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE: /* 0x72 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (114 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_73: /* 0x73 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (115 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_RANGE: /* 0x74 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (116 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_RANGE: /* 0x75 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (117 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT_RANGE: /* 0x76 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (118 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC_RANGE: /* 0x77 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (119 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE_RANGE: /* 0x78 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (120 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_79: /* 0x79 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (121 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7A: /* 0x7a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (122 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_INT: /* 0x7b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (123 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOT_INT: /* 0x7c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (124 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_LONG: /* 0x7d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (125 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NOT_LONG: /* 0x7e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (126 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_FLOAT: /* 0x7f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (127 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEG_DOUBLE: /* 0x80 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (128 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_LONG: /* 0x81 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (129 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_FLOAT: /* 0x82 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (130 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_DOUBLE: /* 0x83 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (131 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_INT: /* 0x84 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (132 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_FLOAT: /* 0x85 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (133 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_LONG_TO_DOUBLE: /* 0x86 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (134 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_INT: /* 0x87 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (135 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_LONG: /* 0x88 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (136 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FLOAT_TO_DOUBLE: /* 0x89 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (137 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_INT: /* 0x8a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (138 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_LONG: /* 0x8b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (139 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DOUBLE_TO_FLOAT: /* 0x8c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (140 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_BYTE: /* 0x8d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (141 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_CHAR: /* 0x8e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (142 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INT_TO_SHORT: /* 0x8f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (143 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT: /* 0x90 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (144 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_INT: /* 0x91 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (145 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT: /* 0x92 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (146 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT: /* 0x93 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (147 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT: /* 0x94 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (148 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT: /* 0x95 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (149 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT: /* 0x96 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (150 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT: /* 0x97 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (151 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT: /* 0x98 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (152 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT: /* 0x99 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (153 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT: /* 0x9a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (154 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_LONG: /* 0x9b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (155 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_LONG: /* 0x9c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (156 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_LONG: /* 0x9d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (157 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_LONG: /* 0x9e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (158 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_LONG: /* 0x9f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (159 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_LONG: /* 0xa0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (160 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_LONG: /* 0xa1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (161 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_LONG: /* 0xa2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (162 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_LONG: /* 0xa3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (163 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_LONG: /* 0xa4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (164 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_LONG: /* 0xa5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (165 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_FLOAT: /* 0xa6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (166 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_FLOAT: /* 0xa7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (167 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_FLOAT: /* 0xa8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (168 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_FLOAT: /* 0xa9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (169 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_FLOAT: /* 0xaa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (170 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_DOUBLE: /* 0xab */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (171 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_DOUBLE: /* 0xac */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (172 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_DOUBLE: /* 0xad */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (173 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_DOUBLE: /* 0xae */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (174 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_DOUBLE: /* 0xaf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (175 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_2ADDR: /* 0xb0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (176 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_INT_2ADDR: /* 0xb1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (177 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_2ADDR: /* 0xb2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (178 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_2ADDR: /* 0xb3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (179 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_2ADDR: /* 0xb4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (180 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_2ADDR: /* 0xb5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (181 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_2ADDR: /* 0xb6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (182 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_2ADDR: /* 0xb7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (183 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT_2ADDR: /* 0xb8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (184 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT_2ADDR: /* 0xb9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (185 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT_2ADDR: /* 0xba */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (186 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_LONG_2ADDR: /* 0xbb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (187 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_LONG_2ADDR: /* 0xbc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (188 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_LONG_2ADDR: /* 0xbd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (189 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_LONG_2ADDR: /* 0xbe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (190 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_LONG_2ADDR: /* 0xbf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (191 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_LONG_2ADDR: /* 0xc0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (192 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_LONG_2ADDR: /* 0xc1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (193 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_LONG_2ADDR: /* 0xc2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (194 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_LONG_2ADDR: /* 0xc3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (195 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_LONG_2ADDR: /* 0xc4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (196 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_LONG_2ADDR: /* 0xc5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (197 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_FLOAT_2ADDR: /* 0xc6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (198 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_FLOAT_2ADDR: /* 0xc7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (199 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_FLOAT_2ADDR: /* 0xc8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (200 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_FLOAT_2ADDR: /* 0xc9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (201 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_FLOAT_2ADDR: /* 0xca */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (202 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_DOUBLE_2ADDR: /* 0xcb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (203 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SUB_DOUBLE_2ADDR: /* 0xcc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (204 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_DOUBLE_2ADDR: /* 0xcd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (205 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_DOUBLE_2ADDR: /* 0xce */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (206 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_DOUBLE_2ADDR: /* 0xcf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (207 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_LIT16: /* 0xd0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (208 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RSUB_INT: /* 0xd1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (209 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_LIT16: /* 0xd2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (210 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_LIT16: /* 0xd3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (211 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_LIT16: /* 0xd4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (212 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_LIT16: /* 0xd5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (213 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_LIT16: /* 0xd6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (214 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_LIT16: /* 0xd7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (215 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_ADD_INT_LIT8: /* 0xd8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (216 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RSUB_INT_LIT8: /* 0xd9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (217 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_MUL_INT_LIT8: /* 0xda */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (218 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DIV_INT_LIT8: /* 0xdb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (219 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_REM_INT_LIT8: /* 0xdc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (220 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_AND_INT_LIT8: /* 0xdd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (221 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_OR_INT_LIT8: /* 0xde */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (222 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_XOR_INT_LIT8: /* 0xdf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (223 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHL_INT_LIT8: /* 0xe0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (224 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SHR_INT_LIT8: /* 0xe1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (225 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_USHR_INT_LIT8: /* 0xe2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (226 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_VOLATILE: /* 0xe3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (227 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_VOLATILE: /* 0xe4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (228 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_VOLATILE: /* 0xe5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (229 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_VOLATILE: /* 0xe6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (230 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_VOLATILE: /* 0xe7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (231 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_VOLATILE: /* 0xe8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (232 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_VOLATILE: /* 0xe9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (233 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_VOLATILE: /* 0xea */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (234 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_VOLATILE: /* 0xeb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (235 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_BREAKPOINT: /* 0xec */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (236 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW_VERIFICATION_ERROR: /* 0xed */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (237 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_EXECUTE_INLINE: /* 0xee */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (238 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_EXECUTE_INLINE_RANGE: /* 0xef */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (239 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_OBJECT_INIT_RANGE: /* 0xf0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (240 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_RETURN_VOID_BARRIER: /* 0xf1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (241 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_QUICK: /* 0xf2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (242 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_QUICK: /* 0xf3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (243 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_QUICK: /* 0xf4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (244 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_QUICK: /* 0xf5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (245 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_QUICK: /* 0xf6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (246 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_QUICK: /* 0xf7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (247 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_QUICK: /* 0xf8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (248 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_QUICK_RANGE: /* 0xf9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (249 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_QUICK: /* 0xfa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (250 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_QUICK_RANGE: /* 0xfb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (251 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_VOLATILE: /* 0xfc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (252 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_VOLATILE: /* 0xfd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (253 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_VOLATILE: /* 0xfe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (254 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_DISPATCH_FF: /* 0xff */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (255 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CONST_CLASS_JUMBO: /* 0x100 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (256 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_CHECK_CAST_JUMBO: /* 0x101 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (257 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INSTANCE_OF_JUMBO: /* 0x102 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (258 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_INSTANCE_JUMBO: /* 0x103 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (259 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_NEW_ARRAY_JUMBO: /* 0x104 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (260 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_FILLED_NEW_ARRAY_JUMBO: /* 0x105 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (261 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_JUMBO: /* 0x106 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (262 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_JUMBO: /* 0x107 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (263 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_JUMBO: /* 0x108 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (264 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BOOLEAN_JUMBO: /* 0x109 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (265 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_BYTE_JUMBO: /* 0x10a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (266 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_CHAR_JUMBO: /* 0x10b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (267 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_SHORT_JUMBO: /* 0x10c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (268 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_JUMBO: /* 0x10d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (269 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_JUMBO: /* 0x10e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (270 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_JUMBO: /* 0x10f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (271 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BOOLEAN_JUMBO: /* 0x110 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (272 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_BYTE_JUMBO: /* 0x111 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (273 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_CHAR_JUMBO: /* 0x112 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (274 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_SHORT_JUMBO: /* 0x113 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (275 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_JUMBO: /* 0x114 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (276 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_JUMBO: /* 0x115 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (277 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_JUMBO: /* 0x116 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (278 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BOOLEAN_JUMBO: /* 0x117 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (279 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_BYTE_JUMBO: /* 0x118 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (280 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_CHAR_JUMBO: /* 0x119 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (281 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_SHORT_JUMBO: /* 0x11a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (282 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_JUMBO: /* 0x11b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (283 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_JUMBO: /* 0x11c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (284 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_JUMBO: /* 0x11d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (285 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BOOLEAN_JUMBO: /* 0x11e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (286 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_BYTE_JUMBO: /* 0x11f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (287 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_CHAR_JUMBO: /* 0x120 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (288 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_SHORT_JUMBO: /* 0x121 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (289 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_VIRTUAL_JUMBO: /* 0x122 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (290 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_SUPER_JUMBO: /* 0x123 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (291 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_DIRECT_JUMBO: /* 0x124 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (292 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_STATIC_JUMBO: /* 0x125 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (293 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_INTERFACE_JUMBO: /* 0x126 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (294 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_27FF: /* 0x127 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (295 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_28FF: /* 0x128 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (296 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_29FF: /* 0x129 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (297 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2AFF: /* 0x12a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (298 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2BFF: /* 0x12b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (299 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2CFF: /* 0x12c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (300 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2DFF: /* 0x12d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (301 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2EFF: /* 0x12e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (302 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_2FFF: /* 0x12f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (303 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_30FF: /* 0x130 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (304 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_31FF: /* 0x131 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (305 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_32FF: /* 0x132 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (306 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_33FF: /* 0x133 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (307 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_34FF: /* 0x134 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (308 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_35FF: /* 0x135 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (309 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_36FF: /* 0x136 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (310 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_37FF: /* 0x137 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (311 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_38FF: /* 0x138 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (312 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_39FF: /* 0x139 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (313 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3AFF: /* 0x13a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (314 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3BFF: /* 0x13b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (315 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3CFF: /* 0x13c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (316 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3DFF: /* 0x13d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (317 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3EFF: /* 0x13e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (318 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_3FFF: /* 0x13f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (319 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_40FF: /* 0x140 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (320 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_41FF: /* 0x141 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (321 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_42FF: /* 0x142 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (322 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_43FF: /* 0x143 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (323 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_44FF: /* 0x144 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (324 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_45FF: /* 0x145 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (325 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_46FF: /* 0x146 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (326 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_47FF: /* 0x147 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (327 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_48FF: /* 0x148 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (328 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_49FF: /* 0x149 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (329 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4AFF: /* 0x14a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (330 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4BFF: /* 0x14b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (331 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4CFF: /* 0x14c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (332 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4DFF: /* 0x14d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (333 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4EFF: /* 0x14e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (334 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_4FFF: /* 0x14f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (335 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_50FF: /* 0x150 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (336 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_51FF: /* 0x151 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (337 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_52FF: /* 0x152 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (338 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_53FF: /* 0x153 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (339 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_54FF: /* 0x154 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (340 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_55FF: /* 0x155 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (341 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_56FF: /* 0x156 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (342 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_57FF: /* 0x157 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (343 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_58FF: /* 0x158 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (344 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_59FF: /* 0x159 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (345 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5AFF: /* 0x15a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (346 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5BFF: /* 0x15b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (347 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5CFF: /* 0x15c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (348 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5DFF: /* 0x15d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (349 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5EFF: /* 0x15e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (350 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_5FFF: /* 0x15f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (351 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_60FF: /* 0x160 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (352 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_61FF: /* 0x161 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (353 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_62FF: /* 0x162 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (354 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_63FF: /* 0x163 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (355 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_64FF: /* 0x164 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (356 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_65FF: /* 0x165 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (357 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_66FF: /* 0x166 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (358 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_67FF: /* 0x167 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (359 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_68FF: /* 0x168 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (360 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_69FF: /* 0x169 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (361 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6AFF: /* 0x16a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (362 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6BFF: /* 0x16b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (363 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6CFF: /* 0x16c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (364 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6DFF: /* 0x16d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (365 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6EFF: /* 0x16e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (366 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_6FFF: /* 0x16f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (367 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_70FF: /* 0x170 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (368 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_71FF: /* 0x171 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (369 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_72FF: /* 0x172 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (370 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_73FF: /* 0x173 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (371 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_74FF: /* 0x174 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (372 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_75FF: /* 0x175 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (373 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_76FF: /* 0x176 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (374 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_77FF: /* 0x177 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (375 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_78FF: /* 0x178 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (376 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_79FF: /* 0x179 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (377 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7AFF: /* 0x17a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (378 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7BFF: /* 0x17b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (379 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7CFF: /* 0x17c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (380 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7DFF: /* 0x17d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (381 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7EFF: /* 0x17e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (382 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_7FFF: /* 0x17f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (383 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_80FF: /* 0x180 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (384 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_81FF: /* 0x181 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (385 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_82FF: /* 0x182 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (386 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_83FF: /* 0x183 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (387 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_84FF: /* 0x184 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (388 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_85FF: /* 0x185 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (389 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_86FF: /* 0x186 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (390 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_87FF: /* 0x187 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (391 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_88FF: /* 0x188 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (392 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_89FF: /* 0x189 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (393 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8AFF: /* 0x18a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (394 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8BFF: /* 0x18b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (395 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8CFF: /* 0x18c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (396 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8DFF: /* 0x18d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (397 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8EFF: /* 0x18e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (398 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_8FFF: /* 0x18f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (399 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_90FF: /* 0x190 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (400 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_91FF: /* 0x191 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (401 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_92FF: /* 0x192 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (402 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_93FF: /* 0x193 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (403 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_94FF: /* 0x194 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (404 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_95FF: /* 0x195 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (405 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_96FF: /* 0x196 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (406 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_97FF: /* 0x197 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (407 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_98FF: /* 0x198 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (408 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_99FF: /* 0x199 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (409 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9AFF: /* 0x19a */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (410 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9BFF: /* 0x19b */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (411 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9CFF: /* 0x19c */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (412 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9DFF: /* 0x19d */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (413 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9EFF: /* 0x19e */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (414 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_9FFF: /* 0x19f */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (415 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A0FF: /* 0x1a0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (416 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A1FF: /* 0x1a1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (417 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A2FF: /* 0x1a2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (418 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A3FF: /* 0x1a3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (419 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A4FF: /* 0x1a4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (420 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A5FF: /* 0x1a5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (421 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A6FF: /* 0x1a6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (422 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A7FF: /* 0x1a7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (423 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A8FF: /* 0x1a8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (424 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_A9FF: /* 0x1a9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (425 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AAFF: /* 0x1aa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (426 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ABFF: /* 0x1ab */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (427 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ACFF: /* 0x1ac */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (428 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ADFF: /* 0x1ad */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (429 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AEFF: /* 0x1ae */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (430 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_AFFF: /* 0x1af */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (431 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B0FF: /* 0x1b0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (432 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B1FF: /* 0x1b1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (433 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B2FF: /* 0x1b2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (434 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B3FF: /* 0x1b3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (435 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B4FF: /* 0x1b4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (436 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B5FF: /* 0x1b5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (437 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B6FF: /* 0x1b6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (438 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B7FF: /* 0x1b7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (439 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B8FF: /* 0x1b8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (440 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_B9FF: /* 0x1b9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (441 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BAFF: /* 0x1ba */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (442 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BBFF: /* 0x1bb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (443 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BCFF: /* 0x1bc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (444 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BDFF: /* 0x1bd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (445 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BEFF: /* 0x1be */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (446 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_BFFF: /* 0x1bf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (447 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C0FF: /* 0x1c0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (448 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C1FF: /* 0x1c1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (449 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C2FF: /* 0x1c2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (450 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C3FF: /* 0x1c3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (451 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C4FF: /* 0x1c4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (452 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C5FF: /* 0x1c5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (453 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C6FF: /* 0x1c6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (454 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C7FF: /* 0x1c7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (455 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C8FF: /* 0x1c8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (456 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_C9FF: /* 0x1c9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (457 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CAFF: /* 0x1ca */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (458 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CBFF: /* 0x1cb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (459 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CCFF: /* 0x1cc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (460 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CDFF: /* 0x1cd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (461 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CEFF: /* 0x1ce */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (462 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_CFFF: /* 0x1cf */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (463 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D0FF: /* 0x1d0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (464 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D1FF: /* 0x1d1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (465 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D2FF: /* 0x1d2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (466 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D3FF: /* 0x1d3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (467 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D4FF: /* 0x1d4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (468 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D5FF: /* 0x1d5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (469 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D6FF: /* 0x1d6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (470 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D7FF: /* 0x1d7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (471 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D8FF: /* 0x1d8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (472 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_D9FF: /* 0x1d9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (473 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DAFF: /* 0x1da */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (474 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DBFF: /* 0x1db */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (475 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DCFF: /* 0x1dc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (476 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DDFF: /* 0x1dd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (477 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DEFF: /* 0x1de */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (478 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_DFFF: /* 0x1df */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (479 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E0FF: /* 0x1e0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (480 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E1FF: /* 0x1e1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (481 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E2FF: /* 0x1e2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (482 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E3FF: /* 0x1e3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (483 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E4FF: /* 0x1e4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (484 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E5FF: /* 0x1e5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (485 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E6FF: /* 0x1e6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (486 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E7FF: /* 0x1e7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (487 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E8FF: /* 0x1e8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (488 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_E9FF: /* 0x1e9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (489 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EAFF: /* 0x1ea */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (490 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EBFF: /* 0x1eb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (491 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_ECFF: /* 0x1ec */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (492 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EDFF: /* 0x1ed */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (493 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EEFF: /* 0x1ee */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (494 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_EFFF: /* 0x1ef */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (495 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_F0FF: /* 0x1f0 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (496 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_UNUSED_F1FF: /* 0x1f1 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (497 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_INVOKE_OBJECT_INIT_JUMBO: /* 0x1f2 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (498 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_VOLATILE_JUMBO: /* 0x1f3 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (499 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_WIDE_VOLATILE_JUMBO: /* 0x1f4 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (500 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IGET_OBJECT_VOLATILE_JUMBO: /* 0x1f5 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (501 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_VOLATILE_JUMBO: /* 0x1f6 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (502 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_WIDE_VOLATILE_JUMBO: /* 0x1f7 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (503 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_IPUT_OBJECT_VOLATILE_JUMBO: /* 0x1f8 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (504 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_VOLATILE_JUMBO: /* 0x1f9 */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (505 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_WIDE_VOLATILE_JUMBO: /* 0x1fa */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (506 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SGET_OBJECT_VOLATILE_JUMBO: /* 0x1fb */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (507 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_VOLATILE_JUMBO: /* 0x1fc */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (508 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_WIDE_VOLATILE_JUMBO: /* 0x1fd */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (509 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_SPUT_OBJECT_VOLATILE_JUMBO: /* 0x1fe */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (510 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
/* ------------------------------ */
.balign 64
.L_ALT_OP_THROW_VERIFICATION_ERROR_JUMBO: /* 0x1ff */
/* File: armv5te/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
- * handler. Note that the call to dvmCheckInst is done as a tail call.
+ * handler. Note that the call to dvmCheckBefore is done as a tail call.
+ * rIBASE updates won't be seen until a refresh, and we can tell we have a
+ * stale rIBASE if breakFlags==0. Always refresh rIBASE here, and then
+ * bail to the real handler if breakFlags==0.
*/
+ ldrb r3, [rSELF, #offThread_breakFlags]
adrl lr, dvmAsmInstructionStart + (511 * 64)
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+ cmp r3, #0
+ bxeq lr @ nothing to do - jump to real handler
+ EXPORT_PC()
mov r0, rPC @ arg0
- mov r1, rSELF @ arg1
- b dvmCheckInst @ (dPC,self) tail call to instruction checker
+ mov r1, rFP @ arg1
+ mov r2, rSELF @ arg2
+ b dvmCheckBefore @ (dPC,dFP,self) tail call
.balign 64
.size dvmAsmAltInstructionStart, .-dvmAsmAltInstructionStart
.global dvmAsmAltInstructionEnd
dvmAsmAltInstructionEnd:
/* File: armv5te/footer.S */
-
/*
* ===========================================================================
* Common subroutines and data
* ===========================================================================
*/
-
-
.text
.align 2
#if defined(WITH_JIT)
+
#if defined(WITH_SELF_VERIFICATION)
+/*
+ * "longjmp" to a translation after single-stepping. Before returning
+ * to translation, must save state for self-verification.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r10, [rSELF,#offThread_jitResumeNPC] @ resume address
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ b jitSVShadowRunStart @ resume as if cache hit
+ @ expects resume addr in r10
+
.global dvmJitToInterpPunt
dvmJitToInterpPunt:
mov r2,#kSVSPunt @ r2<- interpreter entry point
@@ -20866,11 +26174,15 @@
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
+ mov rPC, r0 @ set up dalvik pc
+ EXPORT_PC()
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
mov r2,#kSVSSingleStep @ r2<- interpreter entry point
b jitSVShadowRunEnd @ doesn't return
+
.global dvmJitToInterpNoChainNoProfile
dvmJitToInterpNoChainNoProfile:
mov r0,rPC @ pass our target PC
@@ -20919,6 +26231,21 @@
str r3, [rSELF, #offThread_inJitCodeCache] @ Back to the interp land
b jitSVShadowRunEnd @ doesn't return
#else
+
+/*
+ * "longjmp" to a translation after single-stepping.
+ */
+ .global dvmJitResumeTranslation @ (Thread* self, u4* dFP)
+dvmJitResumeTranslation:
+ mov rSELF, r0 @ restore self
+ mov rPC, r1 @ restore Dalvik pc
+ mov rFP, r2 @ restore Dalvik fp
+ ldr r0, [rSELF,#offThread_jitResumeNPC]
+ mov r2, #0
+ str r2, [rSELF,#offThread_jitResumeNPC] @ reset resume address
+ ldr sp, [rSELF,#offThread_jitResumeNSP] @ cut back native stack
+ bx r0 @ resume translation
+
/*
* Return from the translation cache to the interpreter when the compiler is
* having issues translating/executing a Dalvik instruction. We have to skip
@@ -20943,26 +26270,33 @@
/*
* Return to the interpreter to handle a single instruction.
+ * We'll use the normal single-stepping mechanism via interpBreak,
+ * but also save the native pc of the resume point in the translation
+ * and the native sp so that we can later do the equivalent of a
+ * longjmp() to resume.
* On entry:
- * r0 <= PC
- * r1 <= PC of resume instruction
+ * dPC <= Dalvik PC of instrucion to interpret
* lr <= resume point in translation
+ * r1 <= Dalvik PC of next instruction
*/
.global dvmJitToInterpSingleStep
dvmJitToInterpSingleStep:
- str lr,[rSELF,#offThread_jitResumeNPC]
- str r1,[rSELF,#offThread_jitResumeDPC]
- mov r1,#kInterpEntryInstr
- @ enum is 4 byte in aapcs-EABI
- str r1, [rSELF, #offThread_entryPoint]
- mov rPC,r0
+ mov rPC, r0 @ set up dalvik pc
EXPORT_PC()
-
- ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- mov r2,#kJitSingleStep @ Ask for single step and then revert
- str r2,[rSELF,#offThread_jitState]
- mov r1,#1 @ set changeInterp to bail to debug interp
- b common_gotoBail
+ str lr, [rSELF,#offThread_jitResumeNPC]
+ str sp, [rSELF,#offThread_jitResumeNSP]
+ str r1, [rSELF,#offThread_jitResumeDPC]
+ mov r1, #1
+ str r1, [rSELF,#offThread_singleStepCount] @ just step once
+ mov r0, rSELF
+ mov r1, #kInterpSingleStep
+ mov r2, #kSubModeNormal
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
+ ldr rIBASE, [rSELF,#offThread_curHandlerTable]
+ FETCH_INST()
+ GET_INST_OPCODE(ip)
+ GOTO_OPCODE(ip)
/*
* Return from the translation cache and immediately request
@@ -20974,7 +26308,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -20993,7 +26328,8 @@
add rINST,lr,#-5 @ save start of chain branch
add rINST, #-4 @ .. which is 9 bytes back
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq 2f
@@ -21008,7 +26344,7 @@
/* No translation, so request one if profiling isn't disabled*/
2:
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
FETCH_INST()
cmp r0, #0
movne r2,#kJitTSelectRequestHot @ ask for trace selection
@@ -21039,7 +26375,8 @@
bl dvmBumpNormal
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
cmp r0,#0
beq toInterpreter @ go if not, otherwise do chain
@@ -21061,7 +26398,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21083,7 +26421,8 @@
bl dvmBumpNoChain
#endif
mov r0,rPC
- bl dvmJitGetTraceAddr @ Is there a translation?
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21101,21 +26440,27 @@
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
FETCH_INST()
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@ NOTE: intended fallthrough
/*
- * Common code to update potential trace start counter, and initiate
- * a trace-build if appropriate. On entry, rPC should point to the
- * next instruction to execute, and rINST should be already loaded with
- * the next opcode word, and r0 holds a pointer to the jit profile
- * table (pJitProfTable).
+ * Similar to common_updateProfile, but tests for null pJitProfTable
+ * r0 holds pJifProfTAble, rINST is loaded, rPC is current and
+ * rIBASE has been recently refreshed.
*/
common_testUpdateProfile:
- cmp r0,#0
- GET_INST_OPCODE(ip)
- GOTO_OPCODE_IFEQ(ip) @ if not profiling, fallthrough otherwise */
+ cmp r0, #0 @ JIT switched off?
+ beq 4f @ return to interp if so
+/*
+ * Common code to update potential trace start counter, and initiate
+ * a trace-build if appropriate.
+ * On entry here:
+ * r0 <= pJitProfTable (verified non-NULL)
+ * rPC <= Dalvik PC
+ * rINST <= next instruction
+ */
common_updateProfile:
eor r3,rPC,rPC,lsr #12 @ cheap, but fast hash function
lsl r3,r3,#(32 - JIT_PROF_SIZE_LOG_2) @ shift out excess bits
@@ -21125,18 +26470,13 @@
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ and store it
GOTO_OPCODE_IFNE(ip) @ if not threshold, fallthrough otherwise */
-/*
- * Here, we switch to the debug interpreter to request
- * trace selection. First, though, check to see if there
- * is already a native translation in place (and, if so,
- * jump to it now).
- */
-
- GET_JIT_THRESHOLD(r1)
+ /* Looks good, reset the counter */
+ ldr r1, [rSELF, #offThread_jitThreshold]
strb r1,[r0,r3,lsr #(32 - JIT_PROF_SIZE_LOG_2)] @ reset counter
EXPORT_PC()
mov r0,rPC
- bl dvmJitGetTraceAddr @ r0<- dvmJitGetTraceAddr(rPC)
+ mov r1,rSELF
+ bl dvmJitGetTraceAddrThread @ (pc, self)
str r0, [rSELF, #offThread_inJitCodeCache] @ set the inJitCodeCache flag
mov r1, rPC @ arg1 of translation may need this
mov lr, #0 @ in case target is HANDLER_INTERPRET
@@ -21167,15 +26507,30 @@
/*
* On entry:
- * r2 is jit state, e.g. kJitTSelectRequest or kJitTSelectRequestHot
+ * r2 is jit state.
*/
common_selectTrace:
-
+ ldrb r0,[rSELF,#offThread_breakFlags]
+ ands r0,#kInterpJitBreak
+ bne 3f @ already doing JIT work, continue
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
+ mov r0, rSELF
+/*
+ * Call out to validate trace-building request. If successful,
+ * rIBASE will be swapped to to send us into single-stepping trace
+ * building mode, so we need to refresh before we continue.
+ */
+ EXPORT_PC()
+ SAVE_PC_FP_TO_SELF() @ copy of pc/fp to Thread
+ bl dvmJitCheckTraceRequest
+3:
+ FETCH_INST()
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable]
+4:
+ GET_INST_OPCODE(ip) @ extract opcode from rINST
+ GOTO_OPCODE(ip)
+ /* no return */
+#endif
#if defined(WITH_SELF_VERIFICATION)
/*
@@ -21197,23 +26552,27 @@
/*
* Restore PC, registers, and interpreter state to original values
* before jumping back to the interpreter.
+ * On entry:
+ * r0: dPC
+ * r2: self verification state
*/
jitSVShadowRunEnd:
mov r1,rFP @ pass ending fp
mov r3,rSELF @ pass self ptr for convenience
bl dvmSelfVerificationRestoreState @ restore pc and fp values
- ldr rPC,[rSELF,#offThread_pc] @ restore PC
- ldr rFP,[rSELF,#offThread_fp] @ restore FP
+ LOAD_PC_FP_FROM_SELF() @ restore pc, fp
ldr r1,[r0,#offShadowSpace_svState] @ get self verification state
cmp r1,#0 @ check for punt condition
beq 1f
+ @ Set up SV single-stepping
+ mov r0, rSELF
+ mov r1, #kInterpJitBreak
+ mov r2, #kSubModeJitSV
+ mov r3, #1 @ true
+ bl dvmUpdateInterpBreak @ (self, newBreak, newMode, enable)
mov r2,#kJitSelfVerification @ ask for self verification
str r2,[rSELF,#offThread_jitState]
- mov r2,#kInterpEntryInstr @ normal entry reason
- str r2,[rSELF,#offThread_entryPoint]
- mov r1,#1 @ set changeInterp
- b common_gotoBail
-
+ @ intentional fallthrough
1: @ exit to interpreter without check
EXPORT_PC()
ldr rIBASE, [rSELF, #offThread_curHandlerTable]
@@ -21222,133 +26581,32 @@
GOTO_OPCODE(ip)
#endif
-#endif
-
-/*
- * Common code when a backward branch is taken.
- *
- * TODO: we could avoid a branch by just setting r0 and falling through
- * into the common_periodicChecks code, and having a test on r0 at the
- * end determine if we should return to the caller or update & branch to
- * the next instr.
- *
- * On entry:
- * r9 is PC adjustment *in bytes*
- */
-common_backwardBranch:
- mov r0, #kInterpEntryInstr
- bl common_periodicChecks
-#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- cmp r0,#0
- bne common_updateProfile
- GET_INST_OPCODE(ip)
- GOTO_OPCODE(ip)
-#else
- FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
- GET_INST_OPCODE(ip) @ extract opcode from rINST
- GOTO_OPCODE(ip) @ jump to next instruction
-#endif
-
-
-/*
- * Need to see if the thread needs to be suspended or debugger/profiler
- * activity has begun. If so, we suspend the thread or side-exit to
- * the debug interpreter as appropriate.
- *
- * The common case is no activity on any of these, so we want to figure
- * that out quickly. If something is up, we can then sort out what.
- *
- * We want to be fast if the VM was built without debugger or profiler
- * support, but we also need to recognize that the system is usually
- * shipped with both of these enabled.
- *
- * TODO: reduce this so we're just checking a single location.
- *
- * On entry:
- * r0 is reentry type, e.g. kInterpEntryInstr (for debugger/profiling)
- * r9 is trampoline PC adjustment *in bytes*
- */
-common_periodicChecks:
-/* TUNING - make this a direct load when interpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r3<- &interpBreak
- /* speculatively thread-specific suspend count */
- ldr ip, [rSELF, #offThread_suspendCount]
- ldr r1, [r1] @ r1<- interpBreak
- cmp r1, #0 @ anything unusual?
- bxeq lr @ return if not
- /*
- * One or more interesting events have happened. Figure out what.
- *
- * r0 still holds the reentry type.
- */
- cmp ip, #0 @ want suspend?
- beq 3f @ no, must be something else
-
- stmfd sp!, {r0, lr} @ preserve r0 and lr
-#if defined(WITH_JIT)
- /*
- * Refresh the Jit's cached copy of profile table pointer. This pointer
- * doubles as the Jit's on/off switch.
- */
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ r3<-&gDvmJit.pJitProfTable
- mov r0, rSELF @ r0<- self
- ldr r3, [r3] @ r3 <- pJitProfTable
- EXPORT_PC() @ need for precise GC
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh Jit's on/off switch
-#else
- mov r0, rSELF @ r0<- self
- EXPORT_PC() @ need for precise GC
-#endif
- bl dvmCheckSuspendPending @ do full check, suspend if necessary
- ldmfd sp!, {r0, lr} @ restore r0 and lr
-
- /*
- * Reload the interpBreak flags - they may have changed while we
- * were suspended.
- */
-/* TUNING - direct load when InterpBreak moved to Thread */
- ldr r1, [rSELF, #offThread_pInterpBreak] @ r1<- &interpBreak
- ldr r1, [r1] @ r1<- interpBreak
-3:
- /*
- * TODO: this code is too fragile. Need a general mechanism
- * to identify what actions to take by submode. Some profiling modes
- * (instruction count) need to single-step, while method tracing
- * may not. Debugging with breakpoints can run unfettered, but
- * source-level single-stepping requires Dalvik singlestepping.
- * GC may require a one-shot action and then full-speed resumption.
- */
- ands r1, #(kSubModeDebuggerActive | kSubModeEmulatorTrace | kSubModeInstCounting)
- bxeq lr @ nothing to do, return
-
- @ debugger/profiler enabled, bail out; self->entryPoint was set above
- str r0, [rSELF, #offThread_entryPoint] @ store r0, need for debug/prof
- add rPC, rPC, r9 @ update rPC
- mov r1, #1 @ "want switch" = true
- b common_gotoBail @ side exit
-
-
/*
* The equivalent of "goto bail", this calls through the "bail handler".
+ * It will end this interpreter activation, and return to the caller
+ * of dvmMterpStdRun.
*
- * State registers will be saved to the "thread" area before bailing.
- *
- * On entry:
- * r1 is "bool changeInterp", indicating if we want to switch to the
- * other interpreter or just bail all the way out
+ * State registers will be saved to the "thread" area before bailing
+ * debugging purposes
*/
common_gotoBail:
SAVE_PC_FP_TO_SELF() @ export state to "thread"
mov r0, rSELF @ r0<- self ptr
b dvmMterpStdBail @ call(self, changeInterp)
- @add r1, r1, #1 @ using (boolean+1)
- @add r0, rSELF, #offThread_jmpBuf @ r0<- &self->jmpBuf
- @bl _longjmp @ does not return
- @bl common_abort
-
+/*
+ * The JIT's invoke method needs to remember the callsite class and
+ * target pair. Save them here so that they are available to
+ * dvmCheckJit following the interpretation of this invoke.
+ */
+#if defined(WITH_JIT)
+save_callsiteinfo:
+ cmp r9, #0
+ ldrne r9, [r9, #offObject_clazz]
+ str r0, [rSELF, #offThread_methodToCall]
+ str r9, [rSELF, #offThread_callsiteClass]
+ bx lr
+#endif
/*
* Common code for jumbo method invocation.
@@ -21356,12 +26614,20 @@
* As a result, the savedPc in the stack frame will not be wholly accurate. So
* long as that is only used for source file line number calculations, we're
* okay.
- *
- * On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
*/
+common_invokeMethodJumboNoThis:
+#if defined(WITH_JIT)
+ /* On entry: r0 is "Method* methodToCall */
+ mov r9, #0 @ clear "this"
+#endif
common_invokeMethodJumbo:
+ /* On entry: r0 is "Method* methodToCall, r9 is "this" */
.LinvokeNewJumbo:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
add rPC, rPC, #4 @ adjust pc to make return consistent
FETCH(r2, 1) @ r2<- BBBB (arg count)
@@ -21375,10 +26641,15 @@
* Common code for method invocation with range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodRange:
.LinvokeNewRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #8 @ r2<- AA (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -21400,10 +26671,15 @@
* Common code for method invocation without range.
*
* On entry:
- * r0 is "Method* methodToCall", the method we're trying to call
+ * r0 is "Method* methodToCall", r9 is "this"
*/
common_invokeMethodNoRange:
.LinvokeNewNoRange:
+#if defined(WITH_JIT)
+ ldrb r1, [rSELF, #offThread_subMode]
+ ands r1, #kSubModeJitTraceBuild
+ blne save_callsiteinfo
+#endif
@ prepare to copy args to "outs" area of current frame
movs r2, rINST, lsr #12 @ r2<- B (arg count) -- test for zero
SAVEAREA_FROM_FP(r10, rFP) @ r10<- stack save area
@@ -21450,12 +26726,11 @@
ldr r9, [rSELF, #offThread_interpStackEnd] @ r9<- interpStackEnd
sub r3, r10, r3, lsl #2 @ r3<- bottom (newsave - outsSize)
cmp r3, r9 @ bottom < interpStackEnd?
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r3, [r0, #offMethod_accessFlags] @ r3<- methodToCall->accessFlags
blo .LstackOverflow @ yes, this frame will overflow stack
@ set up newSaveArea
- ldr lr, [lr] @ lr<- active submodes
#ifdef EASY_GDB
SAVEAREA_FROM_FP(ip, rFP) @ ip<- stack save area
str ip, [r10, #offStackSaveArea_prevSave]
@@ -21466,15 +26741,12 @@
mov r9, #0
str r9, [r10, #offStackSaveArea_returnAddr]
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 1f @ skip if not
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r1, rSELF
- @ r0=methodToCall, r1=rSELF
- bl dvmFastMethodTraceEnter
- ldmfd sp!, {r0-r3} @ restore r0-r3
-1:
str r0, [r10, #offStackSaveArea_method]
+
+ @ Profiling?
+ cmp lr, #0 @ any special modes happening?
+ bne 2f @ go if so
+1:
tst r3, #ACC_NATIVE
bne .LinvokeNative
@@ -21501,8 +26773,10 @@
@ r0=methodToCall, r1=newFp, r3=newMethodClass, r9=newINST
str r0, [rSELF, #offThread_method] @ self->method = methodToCall
str r3, [rSELF, #offThread_methodClassDex] @ self->methodClassDex = ...
+ mov r2, #1
+ str r2, [rSELF, #offThread_debugIsMethodEntry]
#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE(r0)
+ ldr r0, [rSELF, #offThread_pJitProfTable]
mov rFP, r1 @ fp = newFp
GET_PREFETCHED_OPCODE(ip, r9) @ extract prefetched opcode from r9
mov rINST, r9 @ publish new rINST
@@ -21518,15 +26792,22 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+2:
+ @ Profiling - record method entry. r0: methodToCall
+ stmfd sp!, {r0-r3} @ preserve r0-r3
+ mov r1, r0
+ mov r0, rSELF
+ bl dvmReportInvoke @ (self, method)
+ ldmfd sp!, {r0-r3} @ restore r0-r3
+ b 1b
+
.LinvokeNative:
@ Prep for the native call
@ r0=methodToCall, r1=newFp, r10=newSaveArea
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
ldr r9, [rSELF, #offThread_jniLocal_topCookie]@r9<-thread->localRef->...
str r1, [rSELF, #offThread_curFrame] @ self->curFrame = newFp
str r9, [r10, #offStackSaveArea_localRefCookie] @newFp->localRefCookie=top
- ldr lr, [lr] @ lr<- active submodes
-
mov r2, r0 @ r2<- methodToCall
mov r0, r1 @ r0<- newFp (points to args)
add r1, rSELF, #offThread_retval @ r1<- &retval
@@ -21543,45 +26824,45 @@
.Lskip:
#endif
- ands lr, #kSubModeMethodTrace @ method tracing?
- bne 330f @ hop if so
+ cmp lr, #0 @ any special SubModes active?
+ bne 11f @ go handle them if so
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
-220:
-#if defined(WITH_JIT)
- ldr r3, [rSELF, #offThread_ppJitProfTable] @ Refresh Jit's on/off status
-#endif
+7:
@ native return; r10=newSaveArea
@ equivalent to dvmPopJniLocals
ldr r0, [r10, #offStackSaveArea_localRefCookie] @ r0<- saved top
ldr r1, [rSELF, #offThread_exception] @ check for exception
-#if defined(WITH_JIT)
- ldr r3, [r3] @ r3 <- gDvmJit.pProfTable
-#endif
str rFP, [rSELF, #offThread_curFrame] @ self->curFrame = fp
cmp r1, #0 @ null?
str r0, [rSELF, #offThread_jniLocal_topCookie] @ new top <- old top
-#if defined(WITH_JIT)
- str r3, [rSELF, #offThread_pJitProfTable] @ refresh cached on/off switch
-#endif
bne common_exceptionThrown @ no, handle exception
FETCH_ADVANCE_INST(3) @ advance rPC, load rINST
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
-330:
- @ r2=JNIMethod, r6=rSELF
- stmfd sp!, {r2,r6}
+11:
+ @ r0=newFp, r1=&retval, r2=methodToCall, r3=self, lr=subModes
+ stmfd sp!, {r0-r3} @ save all but subModes
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPreNativeInvoke @ (pc, self, methodToCall)
+ ldmfd sp, {r0-r3} @ refresh. NOTE: no sp autoincrement
+ @ Call the native method
mov lr, pc @ set return addr
ldr pc, [r2, #offMethod_nativeFunc] @ pc<- methodToCall->nativeFunc
- @ r0=JNIMethod, r1=rSELF
- ldmfd sp!, {r0-r1}
- bl dvmFastNativeMethodTraceExit
- b 220b
+ @ Restore the pre-call arguments
+ ldmfd sp!, {r0-r3} @ r2<- methodToCall (others unneeded)
+
+ @ Finish up any post-invoke subMode requirements
+ mov r0, rPC
+ mov r1, rSELF
+ bl dvmReportPostNativeInvoke @ (pc, self, methodToCall)
+ b 7b @ resume
.LstackOverflow: @ r0=methodToCall
mov r1, r0 @ r1<- methodToCall
@@ -21629,37 +26910,27 @@
*/
common_returnFromMethod:
.LreturnNew:
- mov r0, #kInterpEntryReturn
- mov r9, #0
- bl common_periodicChecks
-
- ldr lr, [rSELF, #offThread_pInterpBreak]
+ ldrb lr, [rSELF, #offThread_subMode]
SAVEAREA_FROM_FP(r0, rFP)
- ldr lr, [lr] @ lr<- active submodes
ldr r9, [r0, #offStackSaveArea_savedPc] @ r9 = saveArea->savedPc
- ands lr, #kSubModeMethodTrace @ method tracing?
- beq 333f
- stmfd sp!, {r0-r3} @ preserve r0-r3
- mov r0, rSELF
- @ r0=rSELF
- bl dvmFastJavaMethodTraceExit
- ldmfd sp!, {r0-r3} @ restore r0-r3
-333:
+ cmp lr, #0 @ any special subMode handling needed?
+ bne 19f
+14:
ldr rFP, [r0, #offStackSaveArea_prevFrame] @ fp = saveArea->prevFrame
ldr r2, [rFP, #(offStackSaveArea_method - sizeofStackSaveArea)]
@ r2<- method we're returning to
cmp r2, #0 @ is this a break frame?
#if defined(WORKAROUND_CORTEX_A9_745320)
/* Don't use conditional loads if the HW defect exists */
- beq 101f
+ beq 15f
ldr r10, [r2, #offMethod_clazz] @ r10<- method->clazz
-101:
+15:
#else
ldrne r10, [r2, #offMethod_clazz] @ r10<- method->clazz
#endif
- mov r1, #0 @ "want switch" = false
beq common_gotoBail @ break frame, bail out completely
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
PREFETCH_ADVANCE_INST(rINST, r9, 3) @ advance r9, update new rINST
str r2, [rSELF, #offThread_method]@ self->method = newSave->method
ldr r1, [r10, #offClassObject_pDvmDex] @ r1<- method->clazz->pDvmDex
@@ -21680,6 +26951,16 @@
GOTO_OPCODE(ip) @ jump to next instruction
#endif
+19:
+ @ Handle special actions
+ @ On entry, r0: StackSaveArea
+ ldr r2, [r0, #offStackSaveArea_prevFrame] @ r2<- prevFP
+ mov r1, rPC
+ mov r0, rSELF
+ bl dvmReportReturn @ (self, pc, prevFP)
+ SAVEAREA_FROM_FP(r0, rFP) @ restore StackSaveArea
+ b 14b @ continue
+
/*
* Return handling, calls through "glue code".
*/
@@ -21705,17 +26986,24 @@
dvmMterpCommonExceptionThrown:
common_exceptionThrown:
.LexceptionNew:
- mov r0, #kInterpEntryThrow
- mov r9, #0
- bl common_periodicChecks
+
+ EXPORT_PC()
+
+ mov r0, rSELF
+ bl dvmCheckSuspendPending
ldr r9, [rSELF, #offThread_exception] @ r9<- self->exception
mov r1, rSELF @ r1<- self
mov r0, r9 @ r0<- exception
bl dvmAddTrackedAlloc @ don't let the exception be GCed
+ ldrb r2, [rSELF, #offThread_subMode] @ get subMode flags
mov r3, #0 @ r3<- NULL
str r3, [rSELF, #offThread_exception] @ self->exception = NULL
+ @ Special subMode?
+ cmp r2, #0 @ any special subMode handling needed?
+ bne 7f @ go if so
+8:
/* set up args and a local for "&fp" */
/* (str sp, [sp, #-4]! would be perfect here, but is discouraged) */
str rFP, [sp, #-4]! @ *--sp = fp
@@ -21725,6 +27013,7 @@
ldr r1, [rSELF, #offThread_method] @ r1<- self->method
mov r0, rSELF @ r0<- self
ldr r1, [r1, #offMethod_insns] @ r1<- method->insns
+ ldrb lr, [rSELF, #offThread_subMode] @ lr<- subMode flags
mov r2, r9 @ r2<- exception
sub r1, rPC, r1 @ r1<- pc - method->insns
mov r1, r1, asr #1 @ r1<- offset in code units
@@ -21765,12 +27054,22 @@
bl dvmReleaseTrackedAlloc @ release the exception
/* restore the exception if the handler wants it */
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh rIBASE
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
cmp ip, #OP_MOVE_EXCEPTION @ is it "move-exception"?
streq r9, [rSELF, #offThread_exception] @ yes, restore the exception
GOTO_OPCODE(ip) @ jump to next instruction
+ @ Manage debugger bookkeeping
+7:
+ mov r0, rSELF @ arg0<- self
+ ldr r1, [rSELF, #offThread_method] @ arg1<- curMethod
+ mov r2, rPC @ arg2<- pc
+ mov r3, rFP @ arg3<- fp
+ bl dvmReportExceptionThrow @ (self, method, pc, fp)
+ b 8b @ resume with normal handling
+
.LnotCaughtLocally: @ r9=exception
/* fix stack overflow if necessary */
ldrb r1, [rSELF, #offThread_stackOverflowed]
@@ -21807,7 +27106,6 @@
mov r0, r9 @ r0<- exception
mov r1, rSELF @ r1<- self
bl dvmReleaseTrackedAlloc @ release the exception
- mov r1, #0 @ "want switch" = false
b common_gotoBail @ bail out
@@ -21822,6 +27120,30 @@
b common_resumeAfterGlueCall
.endif
+#if defined(WITH_JIT)
+ /*
+ * If the JIT is actively building a trace we need to make sure
+ * that the field is fully resolved before including the current
+ * instruction.
+ *
+ * On entry:
+ * r10: &dvmDex->pResFields[field]
+ * r0: field pointer (must preserve)
+ */
+common_verifyField:
+ ldrb r3, [rSELF, #offThread_subMode] @ r3 <- submode byte
+ ands r3, #kSubModeJitTraceBuild
+ bxeq lr @ Not building trace, continue
+ ldr r1, [r10] @ r1<- reload resolved StaticField ptr
+ cmp r1, #0 @ resolution complete?
+ bxne lr @ yes, continue
+ stmfd sp!, {r0-r2,lr} @ save regs
+ mov r0, rSELF
+ mov r1, rPC
+ bl dvmJitEndTraceSelect @ (self,pc) end trace before this inst
+ ldmfd sp!, {r0-r2, lr}
+ bx lr @ return
+#endif
/*
* After returning from a "glued" function, pull out the updated
@@ -21829,6 +27151,7 @@
*/
common_resumeAfterGlueCall:
LOAD_PC_FP_FROM_SELF() @ pull rPC and rFP out of thread
+ ldr rIBASE, [rSELF, #offThread_curHandlerTable] @ refresh
FETCH_INST() @ load rINST from rPC
GET_INST_OPCODE(ip) @ extract opcode from rINST
GOTO_OPCODE(ip) @ jump to next instruction
diff --git a/vm/mterp/out/InterpAsm-x86.S b/vm/mterp/out/InterpAsm-x86.S
index 4435366..cafb897 100644
--- a/vm/mterp/out/InterpAsm-x86.S
+++ b/vm/mterp/out/InterpAsm-x86.S
@@ -1440,10 +1440,9 @@
* double to get a byte offset.
*/
/* goto +AA */
- movsbl rINSTbl,rINST # ebx<- ssssssAA
- testl rINST,rINST # test for <0
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movsbl rINSTbl,%eax # eax<- ssssssAA
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
@@ -1457,10 +1456,9 @@
* The branch distance is a signed code-unit offset
*/
/* goto/16 +AAAA */
- movswl 2(rPC),rINST # rINST<- ssssAAAA
- testl rINST,rINST # test for <0
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movswl 2(rPC),%eax # eax<- ssssAAAA
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
@@ -1472,15 +1470,11 @@
* Unconditional branch, 32-bit offset.
*
* The branch distance is a signed code-unit offset.
- *
- * Unlike most opcodes, this one is allowed to branch to itself, so
- * our "backward branch" test must be "<=0" instead of "<0".
*/
/* goto/32 AAAAAAAA */
- movl 2(rPC),rINST # rINST<- AAAAAAAA
- cmpl $0,rINST # test for <= 0
- jle common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movl 2(rPC),%eax # eax<- AAAAAAAA
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
@@ -1503,13 +1497,10 @@
leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
movl %eax,OUT_ARG1(%esp) # ARG1<- vAA
movl %ecx,OUT_ARG0(%esp) # ARG0<- switchData
- SPILL(rIBASE)
call dvmInterpHandlePackedSwitch
- UNSPILL(rIBASE)
- testl %eax,%eax
- movl %eax,rINST # set up word offset
- jle common_backwardBranch # check on special actions
- ADVANCE_PC_INDEXED rINST
+ movl rSELF,%ecx
+ ADVANCE_PC_INDEXED %eax
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST
GOTO_NEXT
@@ -1532,13 +1523,10 @@
leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
movl %eax,OUT_ARG1(%esp) # ARG1<- vAA
movl %ecx,OUT_ARG0(%esp) # ARG0<- switchData
- SPILL(rIBASE)
call dvmInterpHandleSparseSwitch
- UNSPILL(rIBASE)
- testl %eax,%eax
- movl %eax,rINST # set up word offset
- jle common_backwardBranch # check on special actions
- ADVANCE_PC_INDEXED rINST
+ movl rSELF,%ecx
+ ADVANCE_PC_INDEXED %eax
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST
GOTO_NEXT
@@ -1734,15 +1722,14 @@
movzx rINSTbl,%ecx # ecx <- A+
andb $0xf,%cl # ecx <- A
GET_VREG_R %eax %ecx # eax <- vA
- sarl $4,rINST # rINST<- B
+ sarl $4,rINST # rINST<- B
+ movl rSELF,%ecx
cmpl (rFP,rINST,4),%eax # compare (vA, vB)
- movswl 2(rPC),rINST # Get signed branch offset
movl $2,%eax # assume not taken
jne 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movswl 2(rPC),%eax # Get signed branch offset
1:
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
@@ -1763,15 +1750,14 @@
movzx rINSTbl,%ecx # ecx <- A+
andb $0xf,%cl # ecx <- A
GET_VREG_R %eax %ecx # eax <- vA
- sarl $4,rINST # rINST<- B
+ sarl $4,rINST # rINST<- B
+ movl rSELF,%ecx
cmpl (rFP,rINST,4),%eax # compare (vA, vB)
- movswl 2(rPC),rINST # Get signed branch offset
movl $2,%eax # assume not taken
je 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movswl 2(rPC),%eax # Get signed branch offset
1:
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
@@ -1792,15 +1778,14 @@
movzx rINSTbl,%ecx # ecx <- A+
andb $0xf,%cl # ecx <- A
GET_VREG_R %eax %ecx # eax <- vA
- sarl $4,rINST # rINST<- B
+ sarl $4,rINST # rINST<- B
+ movl rSELF,%ecx
cmpl (rFP,rINST,4),%eax # compare (vA, vB)
- movswl 2(rPC),rINST # Get signed branch offset
movl $2,%eax # assume not taken
jge 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movswl 2(rPC),%eax # Get signed branch offset
1:
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
@@ -1821,15 +1806,14 @@
movzx rINSTbl,%ecx # ecx <- A+
andb $0xf,%cl # ecx <- A
GET_VREG_R %eax %ecx # eax <- vA
- sarl $4,rINST # rINST<- B
+ sarl $4,rINST # rINST<- B
+ movl rSELF,%ecx
cmpl (rFP,rINST,4),%eax # compare (vA, vB)
- movswl 2(rPC),rINST # Get signed branch offset
movl $2,%eax # assume not taken
jl 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movswl 2(rPC),%eax # Get signed branch offset
1:
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
@@ -1850,15 +1834,14 @@
movzx rINSTbl,%ecx # ecx <- A+
andb $0xf,%cl # ecx <- A
GET_VREG_R %eax %ecx # eax <- vA
- sarl $4,rINST # rINST<- B
+ sarl $4,rINST # rINST<- B
+ movl rSELF,%ecx
cmpl (rFP,rINST,4),%eax # compare (vA, vB)
- movswl 2(rPC),rINST # Get signed branch offset
movl $2,%eax # assume not taken
jle 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movswl 2(rPC),%eax # Get signed branch offset
1:
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
@@ -1879,15 +1862,14 @@
movzx rINSTbl,%ecx # ecx <- A+
andb $0xf,%cl # ecx <- A
GET_VREG_R %eax %ecx # eax <- vA
- sarl $4,rINST # rINST<- B
+ sarl $4,rINST # rINST<- B
+ movl rSELF,%ecx
cmpl (rFP,rINST,4),%eax # compare (vA, vB)
- movswl 2(rPC),rINST # Get signed branch offset
movl $2,%eax # assume not taken
jg 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movswl 2(rPC),%eax # Get signed branch offset
1:
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
@@ -1906,12 +1888,11 @@
*/
/* if-cmp vAA, +BBBB */
cmpl $0,(rFP,rINST,4) # compare (vA, 0)
- movswl 2(rPC),rINST # fetch signed displacement
- movl $2,%eax # assume branch not taken
+ movl $2,%eax # assume branch not taken
jne 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movswl 2(rPC),%eax # fetch signed displacement
+ movl offThread_curHandlerTable(%ecx),rIBASE
1:
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
@@ -1931,12 +1912,11 @@
*/
/* if-cmp vAA, +BBBB */
cmpl $0,(rFP,rINST,4) # compare (vA, 0)
- movswl 2(rPC),rINST # fetch signed displacement
- movl $2,%eax # assume branch not taken
+ movl $2,%eax # assume branch not taken
je 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movswl 2(rPC),%eax # fetch signed displacement
+ movl offThread_curHandlerTable(%ecx),rIBASE
1:
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
@@ -1956,12 +1936,11 @@
*/
/* if-cmp vAA, +BBBB */
cmpl $0,(rFP,rINST,4) # compare (vA, 0)
- movswl 2(rPC),rINST # fetch signed displacement
- movl $2,%eax # assume branch not taken
+ movl $2,%eax # assume branch not taken
jge 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movswl 2(rPC),%eax # fetch signed displacement
+ movl offThread_curHandlerTable(%ecx),rIBASE
1:
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
@@ -1981,12 +1960,11 @@
*/
/* if-cmp vAA, +BBBB */
cmpl $0,(rFP,rINST,4) # compare (vA, 0)
- movswl 2(rPC),rINST # fetch signed displacement
- movl $2,%eax # assume branch not taken
+ movl $2,%eax # assume branch not taken
jl 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movswl 2(rPC),%eax # fetch signed displacement
+ movl offThread_curHandlerTable(%ecx),rIBASE
1:
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
@@ -2006,12 +1984,11 @@
*/
/* if-cmp vAA, +BBBB */
cmpl $0,(rFP,rINST,4) # compare (vA, 0)
- movswl 2(rPC),rINST # fetch signed displacement
- movl $2,%eax # assume branch not taken
+ movl $2,%eax # assume branch not taken
jle 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movswl 2(rPC),%eax # fetch signed displacement
+ movl offThread_curHandlerTable(%ecx),rIBASE
1:
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
@@ -2031,12 +2008,11 @@
*/
/* if-cmp vAA, +BBBB */
cmpl $0,(rFP,rINST,4) # compare (vA, 0)
- movswl 2(rPC),rINST # fetch signed displacement
- movl $2,%eax # assume branch not taken
+ movl $2,%eax # assume branch not taken
jg 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movswl 2(rPC),%eax # fetch signed displacement
+ movl offThread_curHandlerTable(%ecx),rIBASE
1:
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
@@ -7435,8 +7411,23 @@
/* ------------------------------ */
.L_OP_BREAKPOINT: /* 0xec */
/* File: x86/OP_BREAKPOINT.S */
-/* File: x86/unused.S */
- jmp common_abort
+ /*
+ * Breakpoint handler.
+ *
+ * Restart this instruction with the original opcode. By
+ * the time we get here, the breakpoint will have already been
+ * handled. We also assume that all other special "checkBefore"
+ * actions have been handled, so we'll transition directly
+ * to the real handler
+ */
+ SPILL(rIBASE)
+ movl rPC,OUT_ARG0(%esp)
+ call dvmGetOriginalOpcode
+ UNSPILL(rIBASE)
+ movl rSELF,%ecx
+ movzbl 1(rPC),rINST
+ movl offThread_mainHandlerTable(%ecx),%ecx
+ jmp *(%ecx,%eax,4)
/* ------------------------------ */
@@ -11493,8711 +11484,13319 @@
.global dvmAsmAltInstructionStartCode
.type dvmAsmAltInstructionStartCode, %function
-dvmAsmAltInstructionStartCode:
.text
+dvmAsmAltInstructionStartCode = .L_ALT_OP_NOP
/* ------------------------------ */
.L_ALT_OP_NOP: /* 0x00 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(0*4)
/* ------------------------------ */
.L_ALT_OP_MOVE: /* 0x01 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(1*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_FROM16: /* 0x02 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(2*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_16: /* 0x03 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(3*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_WIDE: /* 0x04 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(4*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_WIDE_FROM16: /* 0x05 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(5*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_WIDE_16: /* 0x06 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(6*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_OBJECT: /* 0x07 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(7*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_OBJECT_FROM16: /* 0x08 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(8*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_OBJECT_16: /* 0x09 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(9*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_RESULT: /* 0x0a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(10*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_RESULT_WIDE: /* 0x0b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(11*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_RESULT_OBJECT: /* 0x0c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(12*4)
/* ------------------------------ */
.L_ALT_OP_MOVE_EXCEPTION: /* 0x0d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(13*4)
/* ------------------------------ */
.L_ALT_OP_RETURN_VOID: /* 0x0e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(14*4)
/* ------------------------------ */
.L_ALT_OP_RETURN: /* 0x0f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(15*4)
/* ------------------------------ */
.L_ALT_OP_RETURN_WIDE: /* 0x10 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(16*4)
/* ------------------------------ */
.L_ALT_OP_RETURN_OBJECT: /* 0x11 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(17*4)
/* ------------------------------ */
.L_ALT_OP_CONST_4: /* 0x12 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(18*4)
/* ------------------------------ */
.L_ALT_OP_CONST_16: /* 0x13 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(19*4)
/* ------------------------------ */
.L_ALT_OP_CONST: /* 0x14 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(20*4)
/* ------------------------------ */
.L_ALT_OP_CONST_HIGH16: /* 0x15 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(21*4)
/* ------------------------------ */
.L_ALT_OP_CONST_WIDE_16: /* 0x16 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(22*4)
/* ------------------------------ */
.L_ALT_OP_CONST_WIDE_32: /* 0x17 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(23*4)
/* ------------------------------ */
.L_ALT_OP_CONST_WIDE: /* 0x18 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(24*4)
/* ------------------------------ */
.L_ALT_OP_CONST_WIDE_HIGH16: /* 0x19 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(25*4)
/* ------------------------------ */
.L_ALT_OP_CONST_STRING: /* 0x1a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(26*4)
/* ------------------------------ */
.L_ALT_OP_CONST_STRING_JUMBO: /* 0x1b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(27*4)
/* ------------------------------ */
.L_ALT_OP_CONST_CLASS: /* 0x1c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(28*4)
/* ------------------------------ */
.L_ALT_OP_MONITOR_ENTER: /* 0x1d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(29*4)
/* ------------------------------ */
.L_ALT_OP_MONITOR_EXIT: /* 0x1e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(30*4)
/* ------------------------------ */
.L_ALT_OP_CHECK_CAST: /* 0x1f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(31*4)
/* ------------------------------ */
.L_ALT_OP_INSTANCE_OF: /* 0x20 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(32*4)
/* ------------------------------ */
.L_ALT_OP_ARRAY_LENGTH: /* 0x21 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(33*4)
/* ------------------------------ */
.L_ALT_OP_NEW_INSTANCE: /* 0x22 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(34*4)
/* ------------------------------ */
.L_ALT_OP_NEW_ARRAY: /* 0x23 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(35*4)
/* ------------------------------ */
.L_ALT_OP_FILLED_NEW_ARRAY: /* 0x24 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(36*4)
/* ------------------------------ */
.L_ALT_OP_FILLED_NEW_ARRAY_RANGE: /* 0x25 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(37*4)
/* ------------------------------ */
.L_ALT_OP_FILL_ARRAY_DATA: /* 0x26 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(38*4)
/* ------------------------------ */
.L_ALT_OP_THROW: /* 0x27 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(39*4)
/* ------------------------------ */
.L_ALT_OP_GOTO: /* 0x28 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(40*4)
/* ------------------------------ */
.L_ALT_OP_GOTO_16: /* 0x29 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(41*4)
/* ------------------------------ */
.L_ALT_OP_GOTO_32: /* 0x2a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(42*4)
/* ------------------------------ */
.L_ALT_OP_PACKED_SWITCH: /* 0x2b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(43*4)
/* ------------------------------ */
.L_ALT_OP_SPARSE_SWITCH: /* 0x2c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(44*4)
/* ------------------------------ */
.L_ALT_OP_CMPL_FLOAT: /* 0x2d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(45*4)
/* ------------------------------ */
.L_ALT_OP_CMPG_FLOAT: /* 0x2e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(46*4)
/* ------------------------------ */
.L_ALT_OP_CMPL_DOUBLE: /* 0x2f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(47*4)
/* ------------------------------ */
.L_ALT_OP_CMPG_DOUBLE: /* 0x30 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(48*4)
/* ------------------------------ */
.L_ALT_OP_CMP_LONG: /* 0x31 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(49*4)
/* ------------------------------ */
.L_ALT_OP_IF_EQ: /* 0x32 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(50*4)
/* ------------------------------ */
.L_ALT_OP_IF_NE: /* 0x33 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(51*4)
/* ------------------------------ */
.L_ALT_OP_IF_LT: /* 0x34 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(52*4)
/* ------------------------------ */
.L_ALT_OP_IF_GE: /* 0x35 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(53*4)
/* ------------------------------ */
.L_ALT_OP_IF_GT: /* 0x36 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(54*4)
/* ------------------------------ */
.L_ALT_OP_IF_LE: /* 0x37 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(55*4)
/* ------------------------------ */
.L_ALT_OP_IF_EQZ: /* 0x38 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(56*4)
/* ------------------------------ */
.L_ALT_OP_IF_NEZ: /* 0x39 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(57*4)
/* ------------------------------ */
.L_ALT_OP_IF_LTZ: /* 0x3a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(58*4)
/* ------------------------------ */
.L_ALT_OP_IF_GEZ: /* 0x3b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(59*4)
/* ------------------------------ */
.L_ALT_OP_IF_GTZ: /* 0x3c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(60*4)
/* ------------------------------ */
.L_ALT_OP_IF_LEZ: /* 0x3d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(61*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_3E: /* 0x3e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(62*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_3F: /* 0x3f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(63*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_40: /* 0x40 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(64*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_41: /* 0x41 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(65*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_42: /* 0x42 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(66*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_43: /* 0x43 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(67*4)
/* ------------------------------ */
.L_ALT_OP_AGET: /* 0x44 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(68*4)
/* ------------------------------ */
.L_ALT_OP_AGET_WIDE: /* 0x45 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(69*4)
/* ------------------------------ */
.L_ALT_OP_AGET_OBJECT: /* 0x46 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(70*4)
/* ------------------------------ */
.L_ALT_OP_AGET_BOOLEAN: /* 0x47 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(71*4)
/* ------------------------------ */
.L_ALT_OP_AGET_BYTE: /* 0x48 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(72*4)
/* ------------------------------ */
.L_ALT_OP_AGET_CHAR: /* 0x49 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(73*4)
/* ------------------------------ */
.L_ALT_OP_AGET_SHORT: /* 0x4a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(74*4)
/* ------------------------------ */
.L_ALT_OP_APUT: /* 0x4b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(75*4)
/* ------------------------------ */
.L_ALT_OP_APUT_WIDE: /* 0x4c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(76*4)
/* ------------------------------ */
.L_ALT_OP_APUT_OBJECT: /* 0x4d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(77*4)
/* ------------------------------ */
.L_ALT_OP_APUT_BOOLEAN: /* 0x4e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(78*4)
/* ------------------------------ */
.L_ALT_OP_APUT_BYTE: /* 0x4f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(79*4)
/* ------------------------------ */
.L_ALT_OP_APUT_CHAR: /* 0x50 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(80*4)
/* ------------------------------ */
.L_ALT_OP_APUT_SHORT: /* 0x51 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(81*4)
/* ------------------------------ */
.L_ALT_OP_IGET: /* 0x52 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(82*4)
/* ------------------------------ */
.L_ALT_OP_IGET_WIDE: /* 0x53 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(83*4)
/* ------------------------------ */
.L_ALT_OP_IGET_OBJECT: /* 0x54 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(84*4)
/* ------------------------------ */
.L_ALT_OP_IGET_BOOLEAN: /* 0x55 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(85*4)
/* ------------------------------ */
.L_ALT_OP_IGET_BYTE: /* 0x56 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(86*4)
/* ------------------------------ */
.L_ALT_OP_IGET_CHAR: /* 0x57 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(87*4)
/* ------------------------------ */
.L_ALT_OP_IGET_SHORT: /* 0x58 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(88*4)
/* ------------------------------ */
.L_ALT_OP_IPUT: /* 0x59 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(89*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_WIDE: /* 0x5a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(90*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_OBJECT: /* 0x5b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(91*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_BOOLEAN: /* 0x5c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(92*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_BYTE: /* 0x5d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(93*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_CHAR: /* 0x5e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(94*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_SHORT: /* 0x5f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(95*4)
/* ------------------------------ */
.L_ALT_OP_SGET: /* 0x60 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(96*4)
/* ------------------------------ */
.L_ALT_OP_SGET_WIDE: /* 0x61 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(97*4)
/* ------------------------------ */
.L_ALT_OP_SGET_OBJECT: /* 0x62 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(98*4)
/* ------------------------------ */
.L_ALT_OP_SGET_BOOLEAN: /* 0x63 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(99*4)
/* ------------------------------ */
.L_ALT_OP_SGET_BYTE: /* 0x64 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(100*4)
/* ------------------------------ */
.L_ALT_OP_SGET_CHAR: /* 0x65 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(101*4)
/* ------------------------------ */
.L_ALT_OP_SGET_SHORT: /* 0x66 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(102*4)
/* ------------------------------ */
.L_ALT_OP_SPUT: /* 0x67 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(103*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_WIDE: /* 0x68 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(104*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_OBJECT: /* 0x69 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(105*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_BOOLEAN: /* 0x6a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(106*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_BYTE: /* 0x6b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(107*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_CHAR: /* 0x6c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(108*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_SHORT: /* 0x6d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(109*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_VIRTUAL: /* 0x6e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(110*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_SUPER: /* 0x6f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(111*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_DIRECT: /* 0x70 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(112*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_STATIC: /* 0x71 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(113*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_INTERFACE: /* 0x72 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(114*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_73: /* 0x73 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(115*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_VIRTUAL_RANGE: /* 0x74 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(116*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_SUPER_RANGE: /* 0x75 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(117*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_DIRECT_RANGE: /* 0x76 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(118*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_STATIC_RANGE: /* 0x77 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(119*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_INTERFACE_RANGE: /* 0x78 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(120*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_79: /* 0x79 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(121*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_7A: /* 0x7a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(122*4)
/* ------------------------------ */
.L_ALT_OP_NEG_INT: /* 0x7b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(123*4)
/* ------------------------------ */
.L_ALT_OP_NOT_INT: /* 0x7c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(124*4)
/* ------------------------------ */
.L_ALT_OP_NEG_LONG: /* 0x7d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(125*4)
/* ------------------------------ */
.L_ALT_OP_NOT_LONG: /* 0x7e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(126*4)
/* ------------------------------ */
.L_ALT_OP_NEG_FLOAT: /* 0x7f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(127*4)
/* ------------------------------ */
.L_ALT_OP_NEG_DOUBLE: /* 0x80 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(128*4)
/* ------------------------------ */
.L_ALT_OP_INT_TO_LONG: /* 0x81 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(129*4)
/* ------------------------------ */
.L_ALT_OP_INT_TO_FLOAT: /* 0x82 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(130*4)
/* ------------------------------ */
.L_ALT_OP_INT_TO_DOUBLE: /* 0x83 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(131*4)
/* ------------------------------ */
.L_ALT_OP_LONG_TO_INT: /* 0x84 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(132*4)
/* ------------------------------ */
.L_ALT_OP_LONG_TO_FLOAT: /* 0x85 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(133*4)
/* ------------------------------ */
.L_ALT_OP_LONG_TO_DOUBLE: /* 0x86 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(134*4)
/* ------------------------------ */
.L_ALT_OP_FLOAT_TO_INT: /* 0x87 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(135*4)
/* ------------------------------ */
.L_ALT_OP_FLOAT_TO_LONG: /* 0x88 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(136*4)
/* ------------------------------ */
.L_ALT_OP_FLOAT_TO_DOUBLE: /* 0x89 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(137*4)
/* ------------------------------ */
.L_ALT_OP_DOUBLE_TO_INT: /* 0x8a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(138*4)
/* ------------------------------ */
.L_ALT_OP_DOUBLE_TO_LONG: /* 0x8b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(139*4)
/* ------------------------------ */
.L_ALT_OP_DOUBLE_TO_FLOAT: /* 0x8c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(140*4)
/* ------------------------------ */
.L_ALT_OP_INT_TO_BYTE: /* 0x8d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(141*4)
/* ------------------------------ */
.L_ALT_OP_INT_TO_CHAR: /* 0x8e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(142*4)
/* ------------------------------ */
.L_ALT_OP_INT_TO_SHORT: /* 0x8f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(143*4)
/* ------------------------------ */
.L_ALT_OP_ADD_INT: /* 0x90 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(144*4)
/* ------------------------------ */
.L_ALT_OP_SUB_INT: /* 0x91 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(145*4)
/* ------------------------------ */
.L_ALT_OP_MUL_INT: /* 0x92 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(146*4)
/* ------------------------------ */
.L_ALT_OP_DIV_INT: /* 0x93 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(147*4)
/* ------------------------------ */
.L_ALT_OP_REM_INT: /* 0x94 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(148*4)
/* ------------------------------ */
.L_ALT_OP_AND_INT: /* 0x95 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(149*4)
/* ------------------------------ */
.L_ALT_OP_OR_INT: /* 0x96 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(150*4)
/* ------------------------------ */
.L_ALT_OP_XOR_INT: /* 0x97 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(151*4)
/* ------------------------------ */
.L_ALT_OP_SHL_INT: /* 0x98 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(152*4)
/* ------------------------------ */
.L_ALT_OP_SHR_INT: /* 0x99 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(153*4)
/* ------------------------------ */
.L_ALT_OP_USHR_INT: /* 0x9a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(154*4)
/* ------------------------------ */
.L_ALT_OP_ADD_LONG: /* 0x9b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(155*4)
/* ------------------------------ */
.L_ALT_OP_SUB_LONG: /* 0x9c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(156*4)
/* ------------------------------ */
.L_ALT_OP_MUL_LONG: /* 0x9d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(157*4)
/* ------------------------------ */
.L_ALT_OP_DIV_LONG: /* 0x9e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(158*4)
/* ------------------------------ */
.L_ALT_OP_REM_LONG: /* 0x9f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(159*4)
/* ------------------------------ */
.L_ALT_OP_AND_LONG: /* 0xa0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(160*4)
/* ------------------------------ */
.L_ALT_OP_OR_LONG: /* 0xa1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(161*4)
/* ------------------------------ */
.L_ALT_OP_XOR_LONG: /* 0xa2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(162*4)
/* ------------------------------ */
.L_ALT_OP_SHL_LONG: /* 0xa3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(163*4)
/* ------------------------------ */
.L_ALT_OP_SHR_LONG: /* 0xa4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(164*4)
/* ------------------------------ */
.L_ALT_OP_USHR_LONG: /* 0xa5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(165*4)
/* ------------------------------ */
.L_ALT_OP_ADD_FLOAT: /* 0xa6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(166*4)
/* ------------------------------ */
.L_ALT_OP_SUB_FLOAT: /* 0xa7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(167*4)
/* ------------------------------ */
.L_ALT_OP_MUL_FLOAT: /* 0xa8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(168*4)
/* ------------------------------ */
.L_ALT_OP_DIV_FLOAT: /* 0xa9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(169*4)
/* ------------------------------ */
.L_ALT_OP_REM_FLOAT: /* 0xaa */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(170*4)
/* ------------------------------ */
.L_ALT_OP_ADD_DOUBLE: /* 0xab */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(171*4)
/* ------------------------------ */
.L_ALT_OP_SUB_DOUBLE: /* 0xac */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(172*4)
/* ------------------------------ */
.L_ALT_OP_MUL_DOUBLE: /* 0xad */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(173*4)
/* ------------------------------ */
.L_ALT_OP_DIV_DOUBLE: /* 0xae */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(174*4)
/* ------------------------------ */
.L_ALT_OP_REM_DOUBLE: /* 0xaf */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(175*4)
/* ------------------------------ */
.L_ALT_OP_ADD_INT_2ADDR: /* 0xb0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(176*4)
/* ------------------------------ */
.L_ALT_OP_SUB_INT_2ADDR: /* 0xb1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(177*4)
/* ------------------------------ */
.L_ALT_OP_MUL_INT_2ADDR: /* 0xb2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(178*4)
/* ------------------------------ */
.L_ALT_OP_DIV_INT_2ADDR: /* 0xb3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(179*4)
/* ------------------------------ */
.L_ALT_OP_REM_INT_2ADDR: /* 0xb4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(180*4)
/* ------------------------------ */
.L_ALT_OP_AND_INT_2ADDR: /* 0xb5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(181*4)
/* ------------------------------ */
.L_ALT_OP_OR_INT_2ADDR: /* 0xb6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(182*4)
/* ------------------------------ */
.L_ALT_OP_XOR_INT_2ADDR: /* 0xb7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(183*4)
/* ------------------------------ */
.L_ALT_OP_SHL_INT_2ADDR: /* 0xb8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(184*4)
/* ------------------------------ */
.L_ALT_OP_SHR_INT_2ADDR: /* 0xb9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(185*4)
/* ------------------------------ */
.L_ALT_OP_USHR_INT_2ADDR: /* 0xba */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(186*4)
/* ------------------------------ */
.L_ALT_OP_ADD_LONG_2ADDR: /* 0xbb */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(187*4)
/* ------------------------------ */
.L_ALT_OP_SUB_LONG_2ADDR: /* 0xbc */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(188*4)
/* ------------------------------ */
.L_ALT_OP_MUL_LONG_2ADDR: /* 0xbd */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(189*4)
/* ------------------------------ */
.L_ALT_OP_DIV_LONG_2ADDR: /* 0xbe */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(190*4)
/* ------------------------------ */
.L_ALT_OP_REM_LONG_2ADDR: /* 0xbf */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(191*4)
/* ------------------------------ */
.L_ALT_OP_AND_LONG_2ADDR: /* 0xc0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(192*4)
/* ------------------------------ */
.L_ALT_OP_OR_LONG_2ADDR: /* 0xc1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(193*4)
/* ------------------------------ */
.L_ALT_OP_XOR_LONG_2ADDR: /* 0xc2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(194*4)
/* ------------------------------ */
.L_ALT_OP_SHL_LONG_2ADDR: /* 0xc3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(195*4)
/* ------------------------------ */
.L_ALT_OP_SHR_LONG_2ADDR: /* 0xc4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(196*4)
/* ------------------------------ */
.L_ALT_OP_USHR_LONG_2ADDR: /* 0xc5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(197*4)
/* ------------------------------ */
.L_ALT_OP_ADD_FLOAT_2ADDR: /* 0xc6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(198*4)
/* ------------------------------ */
.L_ALT_OP_SUB_FLOAT_2ADDR: /* 0xc7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(199*4)
/* ------------------------------ */
.L_ALT_OP_MUL_FLOAT_2ADDR: /* 0xc8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(200*4)
/* ------------------------------ */
.L_ALT_OP_DIV_FLOAT_2ADDR: /* 0xc9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(201*4)
/* ------------------------------ */
.L_ALT_OP_REM_FLOAT_2ADDR: /* 0xca */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(202*4)
/* ------------------------------ */
.L_ALT_OP_ADD_DOUBLE_2ADDR: /* 0xcb */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(203*4)
/* ------------------------------ */
.L_ALT_OP_SUB_DOUBLE_2ADDR: /* 0xcc */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(204*4)
/* ------------------------------ */
.L_ALT_OP_MUL_DOUBLE_2ADDR: /* 0xcd */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(205*4)
/* ------------------------------ */
.L_ALT_OP_DIV_DOUBLE_2ADDR: /* 0xce */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(206*4)
/* ------------------------------ */
.L_ALT_OP_REM_DOUBLE_2ADDR: /* 0xcf */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(207*4)
/* ------------------------------ */
.L_ALT_OP_ADD_INT_LIT16: /* 0xd0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(208*4)
/* ------------------------------ */
.L_ALT_OP_RSUB_INT: /* 0xd1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(209*4)
/* ------------------------------ */
.L_ALT_OP_MUL_INT_LIT16: /* 0xd2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(210*4)
/* ------------------------------ */
.L_ALT_OP_DIV_INT_LIT16: /* 0xd3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(211*4)
/* ------------------------------ */
.L_ALT_OP_REM_INT_LIT16: /* 0xd4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(212*4)
/* ------------------------------ */
.L_ALT_OP_AND_INT_LIT16: /* 0xd5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(213*4)
/* ------------------------------ */
.L_ALT_OP_OR_INT_LIT16: /* 0xd6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(214*4)
/* ------------------------------ */
.L_ALT_OP_XOR_INT_LIT16: /* 0xd7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(215*4)
/* ------------------------------ */
.L_ALT_OP_ADD_INT_LIT8: /* 0xd8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(216*4)
/* ------------------------------ */
.L_ALT_OP_RSUB_INT_LIT8: /* 0xd9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(217*4)
/* ------------------------------ */
.L_ALT_OP_MUL_INT_LIT8: /* 0xda */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(218*4)
/* ------------------------------ */
.L_ALT_OP_DIV_INT_LIT8: /* 0xdb */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(219*4)
/* ------------------------------ */
.L_ALT_OP_REM_INT_LIT8: /* 0xdc */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(220*4)
/* ------------------------------ */
.L_ALT_OP_AND_INT_LIT8: /* 0xdd */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(221*4)
/* ------------------------------ */
.L_ALT_OP_OR_INT_LIT8: /* 0xde */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(222*4)
/* ------------------------------ */
.L_ALT_OP_XOR_INT_LIT8: /* 0xdf */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(223*4)
/* ------------------------------ */
.L_ALT_OP_SHL_INT_LIT8: /* 0xe0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(224*4)
/* ------------------------------ */
.L_ALT_OP_SHR_INT_LIT8: /* 0xe1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(225*4)
/* ------------------------------ */
.L_ALT_OP_USHR_INT_LIT8: /* 0xe2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(226*4)
/* ------------------------------ */
.L_ALT_OP_IGET_VOLATILE: /* 0xe3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(227*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_VOLATILE: /* 0xe4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(228*4)
/* ------------------------------ */
.L_ALT_OP_SGET_VOLATILE: /* 0xe5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(229*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_VOLATILE: /* 0xe6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(230*4)
/* ------------------------------ */
.L_ALT_OP_IGET_OBJECT_VOLATILE: /* 0xe7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(231*4)
/* ------------------------------ */
.L_ALT_OP_IGET_WIDE_VOLATILE: /* 0xe8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(232*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_WIDE_VOLATILE: /* 0xe9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(233*4)
/* ------------------------------ */
.L_ALT_OP_SGET_WIDE_VOLATILE: /* 0xea */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(234*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_WIDE_VOLATILE: /* 0xeb */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(235*4)
/* ------------------------------ */
.L_ALT_OP_BREAKPOINT: /* 0xec */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(236*4)
/* ------------------------------ */
.L_ALT_OP_THROW_VERIFICATION_ERROR: /* 0xed */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(237*4)
/* ------------------------------ */
.L_ALT_OP_EXECUTE_INLINE: /* 0xee */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(238*4)
/* ------------------------------ */
.L_ALT_OP_EXECUTE_INLINE_RANGE: /* 0xef */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(239*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_OBJECT_INIT_RANGE: /* 0xf0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(240*4)
/* ------------------------------ */
.L_ALT_OP_RETURN_VOID_BARRIER: /* 0xf1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(241*4)
/* ------------------------------ */
.L_ALT_OP_IGET_QUICK: /* 0xf2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(242*4)
/* ------------------------------ */
.L_ALT_OP_IGET_WIDE_QUICK: /* 0xf3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(243*4)
/* ------------------------------ */
.L_ALT_OP_IGET_OBJECT_QUICK: /* 0xf4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(244*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_QUICK: /* 0xf5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(245*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_WIDE_QUICK: /* 0xf6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(246*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_OBJECT_QUICK: /* 0xf7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(247*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_VIRTUAL_QUICK: /* 0xf8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(248*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_VIRTUAL_QUICK_RANGE: /* 0xf9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(249*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_SUPER_QUICK: /* 0xfa */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(250*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_SUPER_QUICK_RANGE: /* 0xfb */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(251*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_OBJECT_VOLATILE: /* 0xfc */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(252*4)
/* ------------------------------ */
.L_ALT_OP_SGET_OBJECT_VOLATILE: /* 0xfd */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(253*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_OBJECT_VOLATILE: /* 0xfe */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(254*4)
/* ------------------------------ */
.L_ALT_OP_DISPATCH_FF: /* 0xff */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(255*4)
/* ------------------------------ */
.L_ALT_OP_CONST_CLASS_JUMBO: /* 0x100 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(256*4)
/* ------------------------------ */
.L_ALT_OP_CHECK_CAST_JUMBO: /* 0x101 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(257*4)
/* ------------------------------ */
.L_ALT_OP_INSTANCE_OF_JUMBO: /* 0x102 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(258*4)
/* ------------------------------ */
.L_ALT_OP_NEW_INSTANCE_JUMBO: /* 0x103 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(259*4)
/* ------------------------------ */
.L_ALT_OP_NEW_ARRAY_JUMBO: /* 0x104 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(260*4)
/* ------------------------------ */
.L_ALT_OP_FILLED_NEW_ARRAY_JUMBO: /* 0x105 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(261*4)
/* ------------------------------ */
.L_ALT_OP_IGET_JUMBO: /* 0x106 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(262*4)
/* ------------------------------ */
.L_ALT_OP_IGET_WIDE_JUMBO: /* 0x107 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(263*4)
/* ------------------------------ */
.L_ALT_OP_IGET_OBJECT_JUMBO: /* 0x108 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(264*4)
/* ------------------------------ */
.L_ALT_OP_IGET_BOOLEAN_JUMBO: /* 0x109 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(265*4)
/* ------------------------------ */
.L_ALT_OP_IGET_BYTE_JUMBO: /* 0x10a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(266*4)
/* ------------------------------ */
.L_ALT_OP_IGET_CHAR_JUMBO: /* 0x10b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(267*4)
/* ------------------------------ */
.L_ALT_OP_IGET_SHORT_JUMBO: /* 0x10c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(268*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_JUMBO: /* 0x10d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(269*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_WIDE_JUMBO: /* 0x10e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(270*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_OBJECT_JUMBO: /* 0x10f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(271*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_BOOLEAN_JUMBO: /* 0x110 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(272*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_BYTE_JUMBO: /* 0x111 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(273*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_CHAR_JUMBO: /* 0x112 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(274*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_SHORT_JUMBO: /* 0x113 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(275*4)
/* ------------------------------ */
.L_ALT_OP_SGET_JUMBO: /* 0x114 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(276*4)
/* ------------------------------ */
.L_ALT_OP_SGET_WIDE_JUMBO: /* 0x115 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(277*4)
/* ------------------------------ */
.L_ALT_OP_SGET_OBJECT_JUMBO: /* 0x116 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(278*4)
/* ------------------------------ */
.L_ALT_OP_SGET_BOOLEAN_JUMBO: /* 0x117 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(279*4)
/* ------------------------------ */
.L_ALT_OP_SGET_BYTE_JUMBO: /* 0x118 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(280*4)
/* ------------------------------ */
.L_ALT_OP_SGET_CHAR_JUMBO: /* 0x119 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(281*4)
/* ------------------------------ */
.L_ALT_OP_SGET_SHORT_JUMBO: /* 0x11a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(282*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_JUMBO: /* 0x11b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(283*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_WIDE_JUMBO: /* 0x11c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(284*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_OBJECT_JUMBO: /* 0x11d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(285*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_BOOLEAN_JUMBO: /* 0x11e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(286*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_BYTE_JUMBO: /* 0x11f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(287*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_CHAR_JUMBO: /* 0x120 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(288*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_SHORT_JUMBO: /* 0x121 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(289*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_VIRTUAL_JUMBO: /* 0x122 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(290*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_SUPER_JUMBO: /* 0x123 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(291*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_DIRECT_JUMBO: /* 0x124 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(292*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_STATIC_JUMBO: /* 0x125 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(293*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_INTERFACE_JUMBO: /* 0x126 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(294*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_27FF: /* 0x127 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(295*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_28FF: /* 0x128 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(296*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_29FF: /* 0x129 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(297*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_2AFF: /* 0x12a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(298*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_2BFF: /* 0x12b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(299*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_2CFF: /* 0x12c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(300*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_2DFF: /* 0x12d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(301*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_2EFF: /* 0x12e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(302*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_2FFF: /* 0x12f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(303*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_30FF: /* 0x130 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(304*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_31FF: /* 0x131 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(305*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_32FF: /* 0x132 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(306*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_33FF: /* 0x133 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(307*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_34FF: /* 0x134 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(308*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_35FF: /* 0x135 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(309*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_36FF: /* 0x136 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(310*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_37FF: /* 0x137 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(311*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_38FF: /* 0x138 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(312*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_39FF: /* 0x139 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(313*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_3AFF: /* 0x13a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(314*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_3BFF: /* 0x13b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(315*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_3CFF: /* 0x13c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(316*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_3DFF: /* 0x13d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(317*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_3EFF: /* 0x13e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(318*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_3FFF: /* 0x13f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(319*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_40FF: /* 0x140 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(320*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_41FF: /* 0x141 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(321*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_42FF: /* 0x142 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(322*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_43FF: /* 0x143 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(323*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_44FF: /* 0x144 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(324*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_45FF: /* 0x145 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(325*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_46FF: /* 0x146 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(326*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_47FF: /* 0x147 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(327*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_48FF: /* 0x148 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(328*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_49FF: /* 0x149 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(329*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_4AFF: /* 0x14a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(330*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_4BFF: /* 0x14b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(331*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_4CFF: /* 0x14c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(332*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_4DFF: /* 0x14d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(333*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_4EFF: /* 0x14e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(334*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_4FFF: /* 0x14f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(335*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_50FF: /* 0x150 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(336*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_51FF: /* 0x151 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(337*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_52FF: /* 0x152 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(338*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_53FF: /* 0x153 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(339*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_54FF: /* 0x154 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(340*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_55FF: /* 0x155 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(341*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_56FF: /* 0x156 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(342*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_57FF: /* 0x157 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(343*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_58FF: /* 0x158 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(344*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_59FF: /* 0x159 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(345*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_5AFF: /* 0x15a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(346*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_5BFF: /* 0x15b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(347*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_5CFF: /* 0x15c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(348*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_5DFF: /* 0x15d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(349*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_5EFF: /* 0x15e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(350*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_5FFF: /* 0x15f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(351*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_60FF: /* 0x160 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(352*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_61FF: /* 0x161 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(353*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_62FF: /* 0x162 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(354*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_63FF: /* 0x163 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(355*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_64FF: /* 0x164 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(356*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_65FF: /* 0x165 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(357*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_66FF: /* 0x166 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(358*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_67FF: /* 0x167 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(359*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_68FF: /* 0x168 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(360*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_69FF: /* 0x169 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(361*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_6AFF: /* 0x16a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(362*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_6BFF: /* 0x16b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(363*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_6CFF: /* 0x16c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(364*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_6DFF: /* 0x16d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(365*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_6EFF: /* 0x16e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(366*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_6FFF: /* 0x16f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(367*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_70FF: /* 0x170 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(368*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_71FF: /* 0x171 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(369*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_72FF: /* 0x172 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(370*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_73FF: /* 0x173 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(371*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_74FF: /* 0x174 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(372*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_75FF: /* 0x175 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(373*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_76FF: /* 0x176 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(374*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_77FF: /* 0x177 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(375*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_78FF: /* 0x178 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(376*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_79FF: /* 0x179 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(377*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_7AFF: /* 0x17a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(378*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_7BFF: /* 0x17b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(379*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_7CFF: /* 0x17c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(380*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_7DFF: /* 0x17d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(381*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_7EFF: /* 0x17e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(382*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_7FFF: /* 0x17f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(383*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_80FF: /* 0x180 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(384*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_81FF: /* 0x181 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(385*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_82FF: /* 0x182 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(386*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_83FF: /* 0x183 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(387*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_84FF: /* 0x184 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(388*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_85FF: /* 0x185 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(389*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_86FF: /* 0x186 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(390*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_87FF: /* 0x187 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(391*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_88FF: /* 0x188 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(392*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_89FF: /* 0x189 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(393*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_8AFF: /* 0x18a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(394*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_8BFF: /* 0x18b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(395*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_8CFF: /* 0x18c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(396*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_8DFF: /* 0x18d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(397*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_8EFF: /* 0x18e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(398*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_8FFF: /* 0x18f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(399*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_90FF: /* 0x190 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(400*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_91FF: /* 0x191 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(401*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_92FF: /* 0x192 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(402*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_93FF: /* 0x193 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(403*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_94FF: /* 0x194 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(404*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_95FF: /* 0x195 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(405*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_96FF: /* 0x196 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(406*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_97FF: /* 0x197 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(407*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_98FF: /* 0x198 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(408*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_99FF: /* 0x199 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(409*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_9AFF: /* 0x19a */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(410*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_9BFF: /* 0x19b */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(411*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_9CFF: /* 0x19c */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(412*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_9DFF: /* 0x19d */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(413*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_9EFF: /* 0x19e */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(414*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_9FFF: /* 0x19f */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(415*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A0FF: /* 0x1a0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(416*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A1FF: /* 0x1a1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(417*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A2FF: /* 0x1a2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(418*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A3FF: /* 0x1a3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(419*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A4FF: /* 0x1a4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(420*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A5FF: /* 0x1a5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(421*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A6FF: /* 0x1a6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(422*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A7FF: /* 0x1a7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(423*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A8FF: /* 0x1a8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(424*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_A9FF: /* 0x1a9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(425*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_AAFF: /* 0x1aa */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(426*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_ABFF: /* 0x1ab */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(427*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_ACFF: /* 0x1ac */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(428*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_ADFF: /* 0x1ad */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(429*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_AEFF: /* 0x1ae */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(430*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_AFFF: /* 0x1af */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(431*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B0FF: /* 0x1b0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(432*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B1FF: /* 0x1b1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(433*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B2FF: /* 0x1b2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(434*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B3FF: /* 0x1b3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(435*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B4FF: /* 0x1b4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(436*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B5FF: /* 0x1b5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(437*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B6FF: /* 0x1b6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(438*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B7FF: /* 0x1b7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(439*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B8FF: /* 0x1b8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(440*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_B9FF: /* 0x1b9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(441*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_BAFF: /* 0x1ba */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(442*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_BBFF: /* 0x1bb */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(443*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_BCFF: /* 0x1bc */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(444*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_BDFF: /* 0x1bd */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(445*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_BEFF: /* 0x1be */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(446*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_BFFF: /* 0x1bf */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(447*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C0FF: /* 0x1c0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(448*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C1FF: /* 0x1c1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(449*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C2FF: /* 0x1c2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(450*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C3FF: /* 0x1c3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(451*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C4FF: /* 0x1c4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(452*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C5FF: /* 0x1c5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(453*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C6FF: /* 0x1c6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(454*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C7FF: /* 0x1c7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(455*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C8FF: /* 0x1c8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(456*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_C9FF: /* 0x1c9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(457*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_CAFF: /* 0x1ca */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(458*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_CBFF: /* 0x1cb */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(459*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_CCFF: /* 0x1cc */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(460*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_CDFF: /* 0x1cd */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(461*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_CEFF: /* 0x1ce */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(462*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_CFFF: /* 0x1cf */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(463*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D0FF: /* 0x1d0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(464*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D1FF: /* 0x1d1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(465*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D2FF: /* 0x1d2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(466*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D3FF: /* 0x1d3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(467*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D4FF: /* 0x1d4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(468*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D5FF: /* 0x1d5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(469*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D6FF: /* 0x1d6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(470*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D7FF: /* 0x1d7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(471*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D8FF: /* 0x1d8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(472*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_D9FF: /* 0x1d9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(473*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_DAFF: /* 0x1da */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(474*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_DBFF: /* 0x1db */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(475*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_DCFF: /* 0x1dc */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(476*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_DDFF: /* 0x1dd */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(477*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_DEFF: /* 0x1de */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(478*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_DFFF: /* 0x1df */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(479*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E0FF: /* 0x1e0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(480*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E1FF: /* 0x1e1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(481*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E2FF: /* 0x1e2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(482*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E3FF: /* 0x1e3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(483*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E4FF: /* 0x1e4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(484*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E5FF: /* 0x1e5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(485*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E6FF: /* 0x1e6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(486*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E7FF: /* 0x1e7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(487*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E8FF: /* 0x1e8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(488*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_E9FF: /* 0x1e9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(489*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_EAFF: /* 0x1ea */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(490*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_EBFF: /* 0x1eb */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(491*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_ECFF: /* 0x1ec */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(492*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_EDFF: /* 0x1ed */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(493*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_EEFF: /* 0x1ee */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(494*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_EFFF: /* 0x1ef */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(495*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_F0FF: /* 0x1f0 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(496*4)
/* ------------------------------ */
.L_ALT_OP_UNUSED_F1FF: /* 0x1f1 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(497*4)
/* ------------------------------ */
.L_ALT_OP_INVOKE_OBJECT_INIT_JUMBO: /* 0x1f2 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(498*4)
/* ------------------------------ */
.L_ALT_OP_IGET_VOLATILE_JUMBO: /* 0x1f3 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(499*4)
/* ------------------------------ */
.L_ALT_OP_IGET_WIDE_VOLATILE_JUMBO: /* 0x1f4 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(500*4)
/* ------------------------------ */
.L_ALT_OP_IGET_OBJECT_VOLATILE_JUMBO: /* 0x1f5 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(501*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_VOLATILE_JUMBO: /* 0x1f6 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(502*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_WIDE_VOLATILE_JUMBO: /* 0x1f7 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(503*4)
/* ------------------------------ */
.L_ALT_OP_IPUT_OBJECT_VOLATILE_JUMBO: /* 0x1f8 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(504*4)
/* ------------------------------ */
.L_ALT_OP_SGET_VOLATILE_JUMBO: /* 0x1f9 */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(505*4)
/* ------------------------------ */
.L_ALT_OP_SGET_WIDE_VOLATILE_JUMBO: /* 0x1fa */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(506*4)
/* ------------------------------ */
.L_ALT_OP_SGET_OBJECT_VOLATILE_JUMBO: /* 0x1fb */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(507*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_VOLATILE_JUMBO: /* 0x1fc */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(508*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_WIDE_VOLATILE_JUMBO: /* 0x1fd */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(509*4)
/* ------------------------------ */
.L_ALT_OP_SPUT_OBJECT_VOLATILE_JUMBO: /* 0x1fe */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(510*4)
/* ------------------------------ */
.L_ALT_OP_THROW_VERIFICATION_ERROR_JUMBO: /* 0x1ff */
/* File: x86/alt_stub.S */
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(511*4)
.size dvmAsmAltInstructionStartCode, .-dvmAsmAltInstructionStartCode
@@ -21265,8 +25864,7 @@
dvmMterpStdRun:
push %ebp # save caller base pointer
movl %esp, %ebp # set our %ebp
- movl rSELF, %ecx # get incoming rGLUE
-
+ movl rSELF, %ecx # get incoming rSELF
/*
* At this point we've allocated one slot on the stack
* via push and stack is 8-byte aligned. Allocate space
@@ -21288,32 +25886,10 @@
/* Remember %esp for future "longjmp" */
movl %esp,offThread_bailPtr(%ecx)
-/* How to start? */
- movb offThread_entryPoint(%ecx),%al
-
-/* Normal start? */
- cmpb $kInterpEntryInstr,%al
- jne .Lnot_instr
-
/* Normal case: start executing the instruction at rPC */
FETCH_INST
GOTO_NEXT
-.Lnot_instr:
- /* Reset to normal case */
- movb $kInterpEntryInstr,offThread_entryPoint(%ecx)
- cmpb $kInterpEntryReturn,%al
- je common_returnFromMethod
- cmpb $kInterpEntryThrow,%al
- je common_exceptionThrown
- movzx %al,%eax
- movl %eax,OUT_ARG1(%esp)
- movl $.LstrBadEntryPoint,OUT_ARG0(%esp)
- call printf
- call dvmAbort
- /* Not reached */
-
-
.global dvmMterpStdBail
.type dvmMterpStdBail, %function
/*
@@ -21335,7 +25911,7 @@
movl 8(%esp),%eax # changeInterp to return reg
movl offThread_bailPtr(%ecx),%esp # Restore "setjmp" esp
movl %esp,%ebp
- addl $(FRAME_SIZE-4), %ebp # Restore %ebp at point of setjmp
+ addl $(FRAME_SIZE-4), %ebp # Restore %ebp at point of setjmp
movl EDI_SPILL(%ebp),%edi
movl ESI_SPILL(%ebp),%esi
movl EBX_SPILL(%ebp),%ebx
@@ -21409,6 +25985,9 @@
* OUT_ARG0+4(%esp) <= Dalvik PC of next instruction
*/
dvmJitToInterpSingleStep:
+/* TODO */
+ call dvmAbort
+#if 0
pop %eax
movl rSELF, %ecx
movl OUT_ARG0(%esp), %edx
@@ -21417,6 +25996,7 @@
movl $kInterpEntryInstr,offThread_entryPoint(%ecx)
movl $1,rINST # changeInterp <= true
jmp common_gotoBail
+#endif
.global dvmJitToInterpNoChainNoProfile
/*
@@ -21428,8 +26008,10 @@
#if defined(WITH_JIT_TUNING)
call dvmBumpNoChain
#endif
+ movl rSELF, %eax
movl rPC,OUT_ARG0(%esp)
- call dvmJitGetTraceAddr # is there a translation?
+ movl %eax,OUT_ARG1(%esp)
+ call dvmJitGetTraceAddrThread # (pc, self)
movl rSELF,%ecx # ecx <- self
movl %eax,offThread_inJitCodeCache(%ecx) # set inJitCodeCache flag
cmpl $0, %eax
@@ -21452,8 +26034,10 @@
#if defined(WITH_JIT_TUNING)
call dvmBumpNoChain
#endif
+ movl rSELF, %eax
movl rPC,OUT_ARG0(%esp)
- call dvmJitGetTraceAddr # is there a translation?
+ movl %eax,OUT_ARG1(%esp)
+ call dvmJitGetTraceAddrThread # (pc, self)
movl rSELF,%ecx
cmpl $0,%eax
movl %eax,offThread_inJitCodeCache(%ecx) # set inJitCodeCache flag
@@ -21483,12 +26067,14 @@
dvmJitToInterpTraceSelect:
pop rINST # save chain cell address in callee save reg
movl (rINST),rPC
+ movl rSELF, %eax
movl rPC,OUT_ARG0(%esp)
- call dvmJitGetTraceAddr # is there a translation?
+ movl %eax,OUT_ARG1(%esp)
+ call dvmJitGetTraceAddrThread # (pc, self)
cmpl $0,%eax
jz 1b # no - ask for one
movl %eax,OUT_ARG0(%esp)
-# FIXME - need to adjust rINST to beginning of sequence
+# TODO - need to adjust rINST to beginning of sequence
movl rINST,OUT_ARG1(%esp)
call dvmJitChain # Attempt dvmJitChain(codeAddr,chainAddr)
cmpl $0,%eax # Success?
@@ -21507,26 +26093,7 @@
dvmJitToInterpNoChain:
toInterpreter:
jmp common_abort
-#endif
-/*
- * Common code when a backwards branch is taken
- *
- * On entry:
- * ebx (a.k.a. rINST) -> PC adjustment in 16-bit words
- */
-common_backwardBranch:
- movl rSELF,%ecx
- call common_periodicChecks # rPC and ecx/rSELF preserved
-#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE %ecx rIBASE
- ADVANCE_PC_INDEXED rINST
- cmpl $0,rIBASE
- movl offThread_curHandlerTable(%ecx),rIBASE
- FETCH_INST
- jz 1f # Profiling off - continue
- .global updateProfile
-updateProfile:
common_updateProfile:
# quick & dirty hash
movl rPC, %eax
@@ -21548,27 +26115,27 @@
EXPORT_PC
movb rINSTbl,(%edx,%eax) # reset counter
movl %ecx,rINST # preserve rSELF
+ movl rSELF, %eax
movl rPC,OUT_ARG0(%esp)
- call dvmJitGetTraceAddr # already have one?
+ movl %eax,OUT_ARG1(%esp)
+ call dvmJitGetTraceAddr # (pc, self)
movl %eax,offThread_inJitCodeCache(rINST) # set the inJitCodeCache flag
cmpl $0,%eax
jz 1f
- call *%eax # FIXME: decide call vs/ jmp!. No return either way
+ call *%eax # TODO: decide call vs/ jmp!. No return either way
1:
movl $kJitTSelectRequest,%eax
# On entry, eax<- jitState, rPC valid
common_selectTrace:
-
+/* TODO */
+ call dvmAbort
+#if 0
movl rSELF,%ecx
movl %eax,offThread_jitState(%ecx)
movl $kInterpEntryInstr,offThread_entryPoint(%ecx)
movl $1,rINST
jmp common_gotoBail
-#else
- movl offThread_curHandlerTable(%ecx),rIBASE
- ADVANCE_PC_INDEXED rINST
- FETCH_INST
- GOTO_NEXT
+#endif
#endif
@@ -21622,8 +26189,9 @@
/*
- * %eax=methodToCall, %ecx=CCCC, LOCAL0_OFFSET(%ebp)=count, %edx=&outs (&stackSaveArea)
- * (very few methods have > 10 args; could unroll for common cases)
+ * %eax=methodToCall, %ecx=CCCC, LOCAL0_OFFSET(%ebp)=count,
+ * %edx=&outs (&stackSaveArea). (very few methods have > 10 args;
+ * could unroll for common cases)
*/
.LinvokeRangeArgs:
@@ -21717,11 +26285,11 @@
movl %eax, LOCAL1_OFFSET(%ebp) # LOCAL1_OFFSET(%ebp)<- &outs
subl $sizeofStackSaveArea, %eax # %eax<- newSaveArea (stack save area using newFP)
movl offThread_interpStackEnd(%edx), %edx # %edx<- self->interpStackEnd
- movl %edx, LOCAL2_OFFSET(%ebp) # LOCAL2_OFFSET<- self->interpStackEnd
+ movl %edx, TMP_SPILL1(%ebp) # spill self->interpStackEnd
shl $2, %ecx # %ecx<- update offset for outsSize
movl %eax, %edx # %edx<- newSaveArea
sub %ecx, %eax # %eax<- bottom; (newSaveArea - outsSize)
- cmp LOCAL2_OFFSET(%ebp), %eax # compare interpStackEnd and bottom
+ cmp TMP_SPILL1(%ebp), %eax # compare interpStackEnd and bottom
movl LOCAL0_OFFSET(%ebp), %eax # %eax<- restore methodToCall
jl .LstackOverflow # handle frame overflow
@@ -21733,9 +26301,14 @@
SAVEAREA_FROM_FP %ecx # %ecx<- &StackSaveArea
movl %ecx, offStackSaveArea_prevSave(%edx) # newSaveArea->prevSave<- &outs
#endif
- movl rSELF,%ecx # %ecx<- pthread
+ movl rSELF,%ecx # %ecx<- pthread
movl rFP, offStackSaveArea_prevFrame(%edx) # newSaveArea->prevFrame<- rFP
movl rPC, offStackSaveArea_savedPc(%edx) # newSaveArea->savedPc<- rPC
+
+ /* Any special actions to take? */
+ cmpb $0, offThread_subMode(%ecx)
+ jne 2f # Yes - handle them
+1:
testl $ACC_NATIVE, offMethod_accessFlags(%eax) # check for native call
movl %eax, offStackSaveArea_method(%edx) # newSaveArea->method<- method to call
jne .LinvokeNative # handle native call
@@ -21744,30 +26317,43 @@
* Update "self" values for the new method
* %eax=methodToCall, LOCAL1_OFFSET(%ebp)=newFp
*/
-
movl offMethod_clazz(%eax), %edx # %edx<- method->clazz
movl offClassObject_pDvmDex(%edx), %edx # %edx<- method->clazz->pDvmDex
movl %eax, offThread_method(%ecx) # self->method<- methodToCall
movl %edx, offThread_methodClassDex(%ecx) # self->methodClassDex<- method->clazz->pDvmDex
movl offMethod_insns(%eax), rPC # rPC<- methodToCall->insns
+ movl $1, offThread_debugIsMethodEntry(%ecx)
movl LOCAL1_OFFSET(%ebp), rFP # rFP<- newFP
movl rFP, offThread_curFrame(%ecx) # self->curFrame<- newFP
movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST
GOTO_NEXT # jump to methodToCall->insns
+2:
+ /* Live: %eax, %ecx, %edx - preserve */
+ SPILL_TMP1(%eax) # preserve methodToCall
+ SPILL_TMP2(%edx) # preserve newSaveArea
+ movl %ecx, OUT_ARG0(%esp)
+ movl %eax, OUT_ARG0(%esp)
+ call dvmReportInvoke # (self, method)
+ UNSPILL_TMP1(%eax)
+ UNSPILL_TMP2(%edx)
+ movl rSELF,%ecx # restore rSELF
+ jmp 1b
+
/*
* Prep for the native call
- * %eax=methodToCall, LOCAL1_OFFSET(%ebp)=newFP, %edx=newSaveArea
+ * %eax=methodToCall, LOCAL1_OFFSET(%ebp)=newFP, %edx=newSaveArea, %ecx=self
*/
.LinvokeNative:
- movl rSELF, %ecx
movl offThread_jniLocal_topCookie(%ecx), rINST # rINST<- self->localRef->...
movl rINST, offStackSaveArea_localRefCookie(%edx) # newSaveArea->localRefCookie<- top
movl %edx, LOCAL2_OFFSET(%ebp) # save newSaveArea
movl LOCAL1_OFFSET(%ebp), rINST # rINST<- newFP
movl rINST, offThread_curFrame(%ecx) # self->curFrame<- newFP
+ cmpb $0, offThread_subMode(%ecx) # Anything special going on?
+ jne 11f # yes - handle it
movl %ecx, OUT_ARG3(%esp) # push parameter self
movl %eax, OUT_ARG2(%esp) # push parameter methodToCall
lea offThread_retval(%ecx), %ecx # %ecx<- &retval
@@ -21787,6 +26373,35 @@
ADVANCE_PC 3
GOTO_NEXT_R %ecx # jump to next instruction
+11:
+ /*
+ * Handle any special subMode actions
+ * %eax=methodToCall, rINST=newFP, %ecx=self
+ */
+ SPILL_TMP1(%eax) # save methodTocall
+ movl %eax, OUT_ARG2(%esp)
+ movl %ecx, OUT_ARG1(%esp)
+ movl rPC, OUT_ARG0(%esp)
+ call dvmReportPreNativeInvoke # (pc, self, methodToCall)
+ UNSPILL_TMP1(%eax) # restore methodToCall
+ movl rSELF,%ecx # restore self
+
+ /* Do the native call */
+ movl %ecx, OUT_ARG3(%esp) # push parameter self
+ lea offThread_retval(%ecx), %ecx # %ecx<- &retval
+ movl %eax, OUT_ARG2(%esp) # push parameter methodToCall
+ movl %ecx, OUT_ARG1(%esp) # push parameter &retval
+ movl rINST, OUT_ARG0(%esp) # push parameter newFP
+ call *offMethod_nativeFunc(%eax) # call methodToCall->nativeFunc
+
+ UNSPILL_TMP1(%eax) # restore methodToCall
+ movl rSELF, %ecx
+ movl %eax, OUT_ARG2(%esp)
+ movl %ecx, OUT_ARG1(%esp)
+ movl rPC, OUT_ARG0(%esp)
+ call dvmReportPostNativeInvoke # (pc, self, methodToCall)
+ jmp 7b # rejoin
+
.LstackOverflow: # eax=methodToCall
movl %eax, OUT_ARG1(%esp) # push parameter methodToCall
movl rSELF,%eax # %eax<- self
@@ -21796,103 +26411,44 @@
/*
- * Do we need the thread to be suspended or have debugger/profiling activity?
- *
- * On entry:
- * ebx -> PC adjustment in 16-bit words (must be preserved)
- * ecx -> SELF pointer
- * reentry type, e.g. kInterpEntryInstr stored in rSELF->entryPoint
- *
- * Note: A call will normally kill %eax and %ecx. To
- * streamline the normal case, this routine will preserve
- * %ecx in addition to the normal caller save regs. The save/restore
- * is a bit ugly, but will happen in the relatively uncommon path.
- * TODO: Basic-block style Jit will need a hook here as well. Fold it into
- * the suspendCount check so we can get both in 1 shot.
- * TUNING: Improve scheduling here & do initial single test for all.
- */
-common_periodicChecks:
- cmpl $0,offThread_suspendCount(%ecx) # non-zero suspendCount?
- jne 1f
-
-6:
- movl offThread_pInterpBreak(%ecx),%eax # eax <- &interpBreak
- cmpl $0,(%eax) # something interesting happening?
- jne 3f # yes - switch interpreters
- ret
-
- /* Check for suspend */
-1:
- /* At this point, the return pointer to the caller of
- * common_periodicChecks is on the top of stack. We need to preserve
- * SELF(ecx).
- * The outgoing profile is:
- * bool dvmCheckSuspendPending(Thread* self)
- * Because we reached here via a call, go ahead and build a new frame.
- */
- EXPORT_PC # need for precise GC
- movl %ecx,%eax # eax<- self
- push %ebp
- movl %esp,%ebp
- subl $24,%esp
- movl %eax,OUT_ARG0(%esp)
- call dvmCheckSuspendPending
- addl $24,%esp
- pop %ebp
- movl rSELF,%ecx
-
- /*
- * Need to check to see if debugger or profiler flags got set
- * while we were suspended.
- */
- jmp 6b
-
- /* Switch interpreters */
- /* Note: %ebx contains the 16-bit word offset to be applied to rPC to
- * "complete" the interpretation of backwards branches. In effect, we
- * are completing the interpretation of the branch instruction here,
- * and the new interpreter will resume interpretation at the branch
- * target. However, a switch request recognized during the handling
- * of a return from method instruction results in an immediate abort,
- * and the new interpreter will resume by re-interpreting the return
- * instruction.
- */
-3:
- leal (rPC,%ebx,2),rPC # adjust pc to show target
- movl rSELF,%ecx # bail expect SELF already loaded
- movl $1,rINST # set changeInterp to true
- jmp common_gotoBail
-
-
-/*
* Common code for handling a return instruction
*/
common_returnFromMethod:
movl rSELF,%ecx
- /* Set entry mode in case we bail */
- movb $kInterpEntryReturn,offThread_entryPoint(%ecx)
- xorl rINST,rINST # zero offset in case we switch interps
- call common_periodicChecks # Note: expects %ecx to be preserved
-
SAVEAREA_FROM_FP %eax # eax<- saveArea (old)
movl offStackSaveArea_prevFrame(%eax),rFP # rFP<- prevFrame
+ cmpb $0, offThread_subMode(%ecx) # special action needed?
+ jne 19f # go if so
+14:
movl (offStackSaveArea_method-sizeofStackSaveArea)(rFP),rINST
cmpl $0,rINST # break?
je common_gotoBail # break frame, bail out completely
- movl offStackSaveArea_savedPc(%eax),rPC # pc<- saveArea->savedPC
- movl rINST,offThread_method(%ecx) # self->method = newSave->meethod
- movl rFP,offThread_curFrame(%ecx) # self->curFrame = fp
- movl offMethod_clazz(rINST),%eax # eax<- method->clazz
+ movl offStackSaveArea_savedPc(%eax),rPC # pc<- saveArea->savedPC
+ movl rINST,offThread_method(%ecx) # self->method = newSave->meethod
+ movl rFP,offThread_curFrame(%ecx) # self->curFrame = fp
+ movl offMethod_clazz(rINST),%eax # eax<- method->clazz
movl offThread_curHandlerTable(%ecx),rIBASE
- movl offClassObject_pDvmDex(%eax),rINST # rINST<- method->clazz->pDvmDex
+ movl offClassObject_pDvmDex(%eax),rINST # rINST<- method->clazz->pDvmDex
FETCH_INST_OPCODE 3 %eax
movl rINST,offThread_methodClassDex(%ecx)
ADVANCE_PC 3
- /* not bailing - restore entry mode to default */
- movb $kInterpEntryInstr,offThread_entryPoint(%ecx)
GOTO_NEXT_R %eax
+19:
+ /*
+ * Handle special subMode actions
+ * On entry, rFP: prevFP, %ecx: self, %eax: saveArea
+ */
+ movl rFP, OUT_ARG2(%esp) # parameter prevFP
+ movl rPC, OUT_ARG1(%esp) # parameter pc
+ movl %ecx, OUT_ARG1(%esp) # parameter self
+ call dvmReportReturn # (self, pc, prevFP)
+ movl rSELF, %ecx # restore self
+ SAVEAREA_FROM_FP %eax # restore saveArea
+ jmp 14b
+
+
/*
* Prepare to strip the current frame and "longjump" back to caller of
* dvmMterpStdRun.
@@ -21986,6 +26542,8 @@
* out of the interpreter), continue with whatever the next instruction
* now happens to be.
*
+ * NOTE: special subMode handling done in dvmMterp_exceptionThrown
+ *
* This does not return.
*/
common_exceptionThrown:
diff --git a/vm/mterp/out/InterpC-allstubs.c b/vm/mterp/out/InterpC-allstubs.c
index b6a095e..c6784c5 100644
--- a/vm/mterp/out/InterpC-allstubs.c
+++ b/vm/mterp/out/InterpC-allstubs.c
@@ -37,20 +37,7 @@
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
*/
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
# define CHECK_BRANCH_OFFSETS
@@ -329,24 +316,6 @@
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
@@ -411,14 +380,6 @@
}
/* File: cstubs/stubdefs.c */
-/* this is a standard (no debug support) interpreter */
-#define INTERP_TYPE INTERP_STD
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-# define CHECK_TRACKED_REFS() ((void)0)
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
-
/*
* In the C mterp stubs, "goto" is a function call followed immediately
* by a return.
@@ -452,6 +413,11 @@
/* ugh */
#define STUB_HACK(x) x
+#if defined(WITH_JIT)
+#define JIT_STUB_HACK(x) x
+#else
+#define JIT_STUB_HACK(x)
+#endif
/*
@@ -471,14 +437,23 @@
/*
* Like the "portable" FINISH, but don't reload "inst", and return to caller
- * when done.
+ * when done. Further, debugger/profiler checks are handled
+ * before handler execution in mterp, so we don't do them here either.
*/
+#if defined(WITH_JIT)
#define FINISH(_offset) { \
ADJUST_PC(_offset); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
+ dvmCheckJit(pc, self); \
+ } \
return; \
}
+#else
+#define FINISH(_offset) { \
+ ADJUST_PC(_offset); \
+ return; \
+ }
+#endif
/*
@@ -513,32 +488,22 @@
} while(false)
/*
- * As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
- * if we need to switch to the other interpreter upon our return.
+ * As a special case, "goto bail" turns into a longjmp.
*/
#define GOTO_bail() \
dvmMterpStdBail(self, false);
-#define GOTO_bail_switch() \
- dvmMterpStdBail(self, true);
/*
* Periodically check for thread suspension.
*
* While we're at it, see if a debugger has attached or the profiler has
- * started. If so, switch to a different "goto" table.
+ * started.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
- self->threadId, (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
/* File: c/opcommon.c */
@@ -648,7 +613,7 @@
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
@@ -663,7 +628,7 @@
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
@@ -1196,9 +1161,12 @@
/*
* The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
+ * Because the portable interpreter is not involved with the JIT
+ * and trace building, we only need the extra check here when this
+ * code is massaged into a stub called from an assembly interpreter.
+ * This is controlled by the JIT_STUB_HACK maco.
*/
+
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
@@ -1213,7 +1181,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1237,7 +1205,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1261,7 +1229,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1285,7 +1253,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1789,15 +1757,18 @@
if (!dvmIsClassInitialized(clazz) && !dvmInitClass(clazz))
GOTO_exceptionThrown();
+#if defined(WITH_JIT)
/*
* The JIT needs dvmDexGetResolvedClass() to return non-null.
* Since we use the portable interpreter to build the trace, this extra
* check is not needed for mterp.
*/
- if (!dvmDexGetResolvedClass(methodClassDex, ref)) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (!dvmDexGetResolvedClass(methodClassDex, ref))) {
/* Class initialization is still ongoing - end the trace */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
/*
* Verifier now tests for interface/abstract class.
@@ -1926,7 +1897,7 @@
ILOGV("|goto +0x%02x", ((s1)vdst));
ILOGV("> branch taken");
if ((s1)vdst < 0)
- PERIODIC_CHECKS(kInterpEntryInstr, (s1)vdst);
+ PERIODIC_CHECKS((s1)vdst);
FINISH((s1)vdst);
OP_END
@@ -1941,7 +1912,7 @@
ILOGV("|goto/16 +0x%04x", offset);
ILOGV("> branch taken");
if (offset < 0)
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
@@ -1958,7 +1929,7 @@
ILOGV("|goto/32 +0x%08x", offset);
ILOGV("> branch taken");
if (offset <= 0) /* allowed to branch to self */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
@@ -1989,7 +1960,7 @@
offset = dvmInterpHandlePackedSwitch(switchData, testVal);
ILOGV("> branch taken (0x%04x)\n", offset);
if (offset <= 0) /* uncommon */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
@@ -2020,7 +1991,7 @@
offset = dvmInterpHandleSparseSwitch(switchData, testVal);
ILOGV("> branch taken (0x%04x)\n", offset);
if (offset <= 0) /* uncommon */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
@@ -2904,7 +2875,6 @@
/* File: c/OP_BREAKPOINT.c */
HANDLE_OPCODE(OP_BREAKPOINT)
-#if (INTERP_TYPE == INTERP_DBG)
{
/*
* Restart this instruction with the original opcode. We do
@@ -2914,7 +2884,7 @@
* for the sake of anything that needs to do disambiguation in a
* common handler with INST_INST.
*
- * The breakpoint itself is handled over in updateDebugger(),
+ * The breakpoint itself is handled over in dvmUpdateDebugger(),
* because we need to detect other events (method entry, single
* step) and report them in the same event packet, and we're not
* yet handling those through breakpoint instructions. By the
@@ -2927,10 +2897,6 @@
inst = INST_REPLACE_OP(inst, originalOpcode);
FINISH_BKPT(originalOpcode);
}
-#else
- LOGE("Breakpoint hit in non-debug interpreter\n");
- dvmAbort();
-#endif
OP_END
/* File: c/OP_THROW_VERIFICATION_ERROR.c */
@@ -2992,13 +2958,13 @@
;
}
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ } else {
+ if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ }
}
FINISH(3);
OP_END
@@ -3037,13 +3003,13 @@
;
}
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ } else {
+ if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ }
}
FINISH(3);
OP_END
@@ -3071,12 +3037,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, false);
}
-#endif
FINISH(3);
}
OP_END
@@ -3261,15 +3225,18 @@
if (!dvmIsClassInitialized(clazz) && !dvmInitClass(clazz))
GOTO_exceptionThrown();
+#if defined(WITH_JIT)
/*
* The JIT needs dvmDexGetResolvedClass() to return non-null.
* Since we use the portable interpreter to build the trace, this extra
* check is not needed for mterp.
*/
- if (!dvmDexGetResolvedClass(methodClassDex, ref)) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (!dvmDexGetResolvedClass(methodClassDex, ref))) {
/* Class initialization is still ongoing - end the trace */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
/*
* Verifier now tests for interface/abstract class.
@@ -4318,12 +4285,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, true);
}
-#endif
FINISH(5);
}
OP_END
@@ -4405,51 +4370,32 @@
*
* This is only used for the "allstubs" variant.
*/
-bool dvmMterpStdRun(Thread* self)
+void dvmMterpStdRun(Thread* self)
{
jmp_buf jmpBuf;
- int changeInterp;
self->bailPtr = &jmpBuf;
- /*
- * We want to return "changeInterp" as a boolean, but we can't return
- * zero through longjmp, so we return (boolean+1).
- */
- changeInterp = setjmp(jmpBuf) -1;
- if (changeInterp >= 0) {
- LOGVV("mterp threadid=%d returning %d\n",
- dvmThreadSelf()->threadId, changeInterp);
- return changeInterp;
- }
-
- /*
- * We may not be starting at a point where we're executing instructions.
- * We need to pick up where the other interpreter left off.
- *
- * In some cases we need to call into a throw/return handler which
- * will do some processing and then either return to us (updating "self")
- * or longjmp back out.
- */
- switch (self->entryPoint) {
- case kInterpEntryInstr:
- /* just start at the start */
- break;
- case kInterpEntryReturn:
- dvmMterp_returnFromMethod(self);
- break;
- case kInterpEntryThrow:
- dvmMterp_exceptionThrown(self);
- break;
- default:
- dvmAbort();
+ /* We exit via a longjmp */
+ if (setjmp(jmpBuf)) {
+ LOGVV("mterp threadid=%d returning\n", dvmThreadSelf()->threadId);
+ return
}
/* run until somebody longjmp()s out */
while (true) {
typedef void (*Handler)(Thread* self);
- u2 inst = /*self->*/pc[0];
+ u2 inst = /*self->interpSave.*/pc[0];
+ /*
+ * In mterp, dvmCheckBefore is handled via the altHandlerTable,
+ * while in the portable interpreter it is part of the handler
+ * FINISH code. For allstubs, we must do an explicit check
+ * in the interpretation loop.
+ */
+ if (self-interpBreak.ctl.subMode) {
+ dvmCheckBefore(pc, fp, self, curMethod);
+ }
Handler handler = (Handler) gDvmMterpHandlers[inst & 0xff];
(void) gDvmMterpHandlerNames; /* avoid gcc "defined but not used" */
LOGVV("handler %p %s\n",
@@ -4461,10 +4407,10 @@
/*
* C mterp exit point. Call here to bail out of the interpreter.
*/
-void dvmMterpStdBail(Thread* self, bool changeInterp)
+void dvmMterpStdBail(Thread* self)
{
jmp_buf* pJmpBuf = self->bailPtr;
- longjmp(*pJmpBuf, ((int)changeInterp)+1);
+ longjmp(*pJmpBuf, 1);
}
/* File: c/gotoTargets.c */
@@ -4646,8 +4592,9 @@
assert(baseMethod->methodIndex < thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[baseMethod->methodIndex];
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->methodToCall = methodToCall;
+ self->callsiteClass = thisPtr->clazz;
#endif
#if 0
@@ -4760,6 +4707,7 @@
GOTO_exceptionThrown();
}
methodToCall = curMethod->clazz->super->vtable[baseMethod->methodIndex];
+
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
dvmThrowAbstractMethodError("abstract method not implemented");
@@ -4820,9 +4768,6 @@
thisClass = thisPtr->clazz;
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisClass;
-#endif
/*
* Given a class and a method index, find the Method* with the
@@ -4830,6 +4775,10 @@
*/
methodToCall = dvmFindInterfaceMethodInCache(thisClass, ref, curMethod,
methodClassDex);
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisClass;
+ self->methodToCall = methodToCall;
+#endif
if (methodToCall == NULL) {
assert(dvmCheckException(self));
GOTO_exceptionThrown();
@@ -4916,15 +4865,18 @@
GOTO_exceptionThrown();
}
+#if defined(WITH_JIT) && defined(MTERP_STUB)
/*
* The JIT needs dvmDexGetResolvedMethod() to return non-null.
- * Since we use the portable interpreter to build the trace, this extra
- * check is not needed for mterp.
+ * Include the check if this code is being used as a stub
+ * called from the assembly interpreter.
*/
- if (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL)) {
/* Class initialization is still ongoing */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
}
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
GOTO_TARGET_END
@@ -4958,9 +4910,6 @@
if (!checkForNull(thisPtr))
GOTO_exceptionThrown();
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
-#endif
/*
* Combine the object we found with the vtable offset in the
@@ -4968,6 +4917,10 @@
*/
assert(ref < (unsigned int) thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[ref];
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisPtr->clazz;
+ self->methodToCall = methodToCall;
+#endif
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
@@ -5042,7 +4995,6 @@
LOGVV("+++ super-virtual[%d]=%s.%s\n",
ref, methodToCall->clazz->descriptor, methodToCall->name);
assert(methodToCall != NULL);
-
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
}
GOTO_TARGET_END
@@ -5063,7 +5015,7 @@
* Since this is now an interpreter switch point, we must do it before
* we do anything at all.
*/
- PERIODIC_CHECKS(kInterpEntryReturn, 0);
+ PERIODIC_CHECKS(0);
ILOGV("> retval=0x%llx (leaving %s.%s %s)",
retval.j, curMethod->clazz->descriptor, curMethod->name,
@@ -5075,20 +5027,19 @@
#ifdef EASY_GDB
debugSaveArea = saveArea;
#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, curMethod);
-#endif
/* back up to previous frame and see if we hit a break */
fp = (u4*)saveArea->prevFrame;
assert(fp != NULL);
+
+ /* Handle any special subMode requirements */
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportReturn(self, pc, fp);
+ }
+
if (dvmIsBreakFrame(fp)) {
/* bail without popping the method frame from stack */
LOGVV("+++ returned into break frame\n");
-#if defined(WITH_JIT)
- /* Let the Jit know the return is terminating normally */
- CHECK_JIT_VOID();
-#endif
GOTO_bail();
}
@@ -5127,16 +5078,8 @@
Object* exception;
int catchRelPc;
- /*
- * Since this is now an interpreter switch point, we must do it before
- * we do anything at all.
- */
- PERIODIC_CHECKS(kInterpEntryThrow, 0);
+ PERIODIC_CHECKS(0);
-#if defined(WITH_JIT)
- // Something threw during trace selection - end the current trace
- END_JIT_TSELECT();
-#endif
/*
* We save off the exception and clear the exception status. While
* processing the exception we might need to load some Throwable
@@ -5152,9 +5095,8 @@
exception->clazz->descriptor, curMethod->name,
dvmLineNumFromPC(curMethod, pc - curMethod->insns));
-#if (INTERP_TYPE == INTERP_DBG)
/*
- * Tell the debugger about it.
+ * Report the exception throw to any "subMode" watchers.
*
* TODO: if the exception was thrown by interpreted code, control
* fell through native, and then back to us, we will report the
@@ -5167,14 +5109,9 @@
* here, and have the JNI exception code do the reporting to the
* debugger.
*/
- if (DEBUGGER_ACTIVE) {
- void* catchFrame;
- catchRelPc = dvmFindCatchBlock(self, pc - curMethod->insns,
- exception, true, &catchFrame);
- dvmDbgPostException(fp, pc - curMethod->insns, catchFrame,
- catchRelPc, exception);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportExceptionThrow(self, curMethod, pc, fp);
}
-#endif
/*
* We need to unroll to the catch block or the nearest "break"
@@ -5412,11 +5349,20 @@
#endif
newSaveArea->prevFrame = fp;
newSaveArea->savedPc = pc;
-#if defined(WITH_JIT)
+#if defined(WITH_JIT) && defined(MTERP_STUB)
newSaveArea->returnAddr = 0;
#endif
newSaveArea->method = methodToCall;
+ if (self->interpBreak.ctl.subMode != 0) {
+ /*
+ * We mark ENTER here for both native and non-native
+ * calls. For native calls, we'll mark EXIT on return.
+ * For non-native calls, EXIT is marked in the RETURN op.
+ */
+ dvmReportInvoke(self, methodToCall);
+ }
+
if (!dvmIsNativeMethod(methodToCall)) {
/*
* "Call" interpreted code. Reposition the PC, update the
@@ -5429,9 +5375,7 @@
#ifdef EASY_GDB
debugSaveArea = SAVEAREA_FROM_FP(newFp);
#endif
-#if INTERP_TYPE == INTERP_DBG
- debugIsMethodEntry = true; // profiling, debugging
-#endif
+ self->debugIsMethodEntry = true; // profiling, debugging
ILOGD("> pc <-- %s.%s %s", curMethod->clazz->descriptor,
curMethod->name, curMethod->shorty);
DUMP_REGS(curMethod, fp, true); // show input args
@@ -5444,25 +5388,12 @@
DUMP_REGS(methodToCall, newFp, true); // show input args
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_ENTRY);
- }
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_ENTER(self, methodToCall);
-#endif
-
- {
- ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
- methodToCall->name, methodToCall->shorty);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPreNativeInvoke(pc, self, methodToCall);
}
-#if defined(WITH_JIT)
- /* Allow the Jit to end any pending trace building */
- CHECK_JIT_VOID();
-#endif
+ ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
+ methodToCall->name, methodToCall->shorty);
/*
* Jump through native call bridge. Because we leave no
@@ -5471,15 +5402,9 @@
*/
(*methodToCall->nativeFunc)(newFp, &retval, methodToCall, self);
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_EXIT);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPostNativeInvoke(pc, self, methodToCall);
}
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, methodToCall);
-#endif
/* pop frame off */
dvmPopJniLocals(self, newSaveArea);
diff --git a/vm/mterp/out/InterpC-armv5te-vfp.c b/vm/mterp/out/InterpC-armv5te-vfp.c
index 5ab7de4..f05c3ee 100644
--- a/vm/mterp/out/InterpC-armv5te-vfp.c
+++ b/vm/mterp/out/InterpC-armv5te-vfp.c
@@ -37,20 +37,7 @@
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
*/
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
# define CHECK_BRANCH_OFFSETS
@@ -329,24 +316,6 @@
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
@@ -411,14 +380,6 @@
}
/* File: cstubs/stubdefs.c */
-/* this is a standard (no debug support) interpreter */
-#define INTERP_TYPE INTERP_STD
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-# define CHECK_TRACKED_REFS() ((void)0)
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
-
/*
* In the C mterp stubs, "goto" is a function call followed immediately
* by a return.
@@ -452,6 +413,11 @@
/* ugh */
#define STUB_HACK(x) x
+#if defined(WITH_JIT)
+#define JIT_STUB_HACK(x) x
+#else
+#define JIT_STUB_HACK(x)
+#endif
/*
@@ -471,14 +437,23 @@
/*
* Like the "portable" FINISH, but don't reload "inst", and return to caller
- * when done.
+ * when done. Further, debugger/profiler checks are handled
+ * before handler execution in mterp, so we don't do them here either.
*/
+#if defined(WITH_JIT)
#define FINISH(_offset) { \
ADJUST_PC(_offset); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
+ dvmCheckJit(pc, self); \
+ } \
return; \
}
+#else
+#define FINISH(_offset) { \
+ ADJUST_PC(_offset); \
+ return; \
+ }
+#endif
/*
@@ -513,32 +488,22 @@
} while(false)
/*
- * As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
- * if we need to switch to the other interpreter upon our return.
+ * As a special case, "goto bail" turns into a longjmp.
*/
#define GOTO_bail() \
dvmMterpStdBail(self, false);
-#define GOTO_bail_switch() \
- dvmMterpStdBail(self, true);
/*
* Periodically check for thread suspension.
*
* While we're at it, see if a debugger has attached or the profiler has
- * started. If so, switch to a different "goto" table.
+ * started.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
- self->threadId, (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
/* File: c/opcommon.c */
@@ -648,7 +613,7 @@
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
@@ -663,7 +628,7 @@
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
@@ -1196,9 +1161,12 @@
/*
* The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
+ * Because the portable interpreter is not involved with the JIT
+ * and trace building, we only need the extra check here when this
+ * code is massaged into a stub called from an assembly interpreter.
+ * This is controlled by the JIT_STUB_HACK maco.
*/
+
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
@@ -1213,7 +1181,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1237,7 +1205,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1261,7 +1229,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1285,7 +1253,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
diff --git a/vm/mterp/out/InterpC-armv5te.c b/vm/mterp/out/InterpC-armv5te.c
index e103164..3bf9fd4 100644
--- a/vm/mterp/out/InterpC-armv5te.c
+++ b/vm/mterp/out/InterpC-armv5te.c
@@ -37,20 +37,7 @@
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
*/
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
# define CHECK_BRANCH_OFFSETS
@@ -329,24 +316,6 @@
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
@@ -411,14 +380,6 @@
}
/* File: cstubs/stubdefs.c */
-/* this is a standard (no debug support) interpreter */
-#define INTERP_TYPE INTERP_STD
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-# define CHECK_TRACKED_REFS() ((void)0)
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
-
/*
* In the C mterp stubs, "goto" is a function call followed immediately
* by a return.
@@ -452,6 +413,11 @@
/* ugh */
#define STUB_HACK(x) x
+#if defined(WITH_JIT)
+#define JIT_STUB_HACK(x) x
+#else
+#define JIT_STUB_HACK(x)
+#endif
/*
@@ -471,14 +437,23 @@
/*
* Like the "portable" FINISH, but don't reload "inst", and return to caller
- * when done.
+ * when done. Further, debugger/profiler checks are handled
+ * before handler execution in mterp, so we don't do them here either.
*/
+#if defined(WITH_JIT)
#define FINISH(_offset) { \
ADJUST_PC(_offset); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
+ dvmCheckJit(pc, self); \
+ } \
return; \
}
+#else
+#define FINISH(_offset) { \
+ ADJUST_PC(_offset); \
+ return; \
+ }
+#endif
/*
@@ -513,32 +488,22 @@
} while(false)
/*
- * As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
- * if we need to switch to the other interpreter upon our return.
+ * As a special case, "goto bail" turns into a longjmp.
*/
#define GOTO_bail() \
dvmMterpStdBail(self, false);
-#define GOTO_bail_switch() \
- dvmMterpStdBail(self, true);
/*
* Periodically check for thread suspension.
*
* While we're at it, see if a debugger has attached or the profiler has
- * started. If so, switch to a different "goto" table.
+ * started.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
- self->threadId, (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
/* File: c/opcommon.c */
@@ -648,7 +613,7 @@
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
@@ -663,7 +628,7 @@
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
@@ -1196,9 +1161,12 @@
/*
* The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
+ * Because the portable interpreter is not involved with the JIT
+ * and trace building, we only need the extra check here when this
+ * code is massaged into a stub called from an assembly interpreter.
+ * This is controlled by the JIT_STUB_HACK maco.
*/
+
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
@@ -1213,7 +1181,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1237,7 +1205,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1261,7 +1229,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1285,7 +1253,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
diff --git a/vm/mterp/out/InterpC-armv7-a-neon.c b/vm/mterp/out/InterpC-armv7-a-neon.c
index 7c7d843..d233dbc 100644
--- a/vm/mterp/out/InterpC-armv7-a-neon.c
+++ b/vm/mterp/out/InterpC-armv7-a-neon.c
@@ -37,20 +37,7 @@
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
*/
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
# define CHECK_BRANCH_OFFSETS
@@ -329,24 +316,6 @@
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
@@ -411,14 +380,6 @@
}
/* File: cstubs/stubdefs.c */
-/* this is a standard (no debug support) interpreter */
-#define INTERP_TYPE INTERP_STD
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-# define CHECK_TRACKED_REFS() ((void)0)
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
-
/*
* In the C mterp stubs, "goto" is a function call followed immediately
* by a return.
@@ -452,6 +413,11 @@
/* ugh */
#define STUB_HACK(x) x
+#if defined(WITH_JIT)
+#define JIT_STUB_HACK(x) x
+#else
+#define JIT_STUB_HACK(x)
+#endif
/*
@@ -471,14 +437,23 @@
/*
* Like the "portable" FINISH, but don't reload "inst", and return to caller
- * when done.
+ * when done. Further, debugger/profiler checks are handled
+ * before handler execution in mterp, so we don't do them here either.
*/
+#if defined(WITH_JIT)
#define FINISH(_offset) { \
ADJUST_PC(_offset); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
+ dvmCheckJit(pc, self); \
+ } \
return; \
}
+#else
+#define FINISH(_offset) { \
+ ADJUST_PC(_offset); \
+ return; \
+ }
+#endif
/*
@@ -513,32 +488,22 @@
} while(false)
/*
- * As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
- * if we need to switch to the other interpreter upon our return.
+ * As a special case, "goto bail" turns into a longjmp.
*/
#define GOTO_bail() \
dvmMterpStdBail(self, false);
-#define GOTO_bail_switch() \
- dvmMterpStdBail(self, true);
/*
* Periodically check for thread suspension.
*
* While we're at it, see if a debugger has attached or the profiler has
- * started. If so, switch to a different "goto" table.
+ * started.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
- self->threadId, (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
/* File: c/opcommon.c */
@@ -648,7 +613,7 @@
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
@@ -663,7 +628,7 @@
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
@@ -1196,9 +1161,12 @@
/*
* The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
+ * Because the portable interpreter is not involved with the JIT
+ * and trace building, we only need the extra check here when this
+ * code is massaged into a stub called from an assembly interpreter.
+ * This is controlled by the JIT_STUB_HACK maco.
*/
+
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
@@ -1213,7 +1181,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1237,7 +1205,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1261,7 +1229,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1285,7 +1253,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
diff --git a/vm/mterp/out/InterpC-armv7-a.c b/vm/mterp/out/InterpC-armv7-a.c
index 6e9d2c7..94488e1 100644
--- a/vm/mterp/out/InterpC-armv7-a.c
+++ b/vm/mterp/out/InterpC-armv7-a.c
@@ -37,20 +37,7 @@
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
*/
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
# define CHECK_BRANCH_OFFSETS
@@ -329,24 +316,6 @@
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
@@ -411,14 +380,6 @@
}
/* File: cstubs/stubdefs.c */
-/* this is a standard (no debug support) interpreter */
-#define INTERP_TYPE INTERP_STD
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-# define CHECK_TRACKED_REFS() ((void)0)
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
-
/*
* In the C mterp stubs, "goto" is a function call followed immediately
* by a return.
@@ -452,6 +413,11 @@
/* ugh */
#define STUB_HACK(x) x
+#if defined(WITH_JIT)
+#define JIT_STUB_HACK(x) x
+#else
+#define JIT_STUB_HACK(x)
+#endif
/*
@@ -471,14 +437,23 @@
/*
* Like the "portable" FINISH, but don't reload "inst", and return to caller
- * when done.
+ * when done. Further, debugger/profiler checks are handled
+ * before handler execution in mterp, so we don't do them here either.
*/
+#if defined(WITH_JIT)
#define FINISH(_offset) { \
ADJUST_PC(_offset); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
+ dvmCheckJit(pc, self); \
+ } \
return; \
}
+#else
+#define FINISH(_offset) { \
+ ADJUST_PC(_offset); \
+ return; \
+ }
+#endif
/*
@@ -513,32 +488,22 @@
} while(false)
/*
- * As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
- * if we need to switch to the other interpreter upon our return.
+ * As a special case, "goto bail" turns into a longjmp.
*/
#define GOTO_bail() \
dvmMterpStdBail(self, false);
-#define GOTO_bail_switch() \
- dvmMterpStdBail(self, true);
/*
* Periodically check for thread suspension.
*
* While we're at it, see if a debugger has attached or the profiler has
- * started. If so, switch to a different "goto" table.
+ * started.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
- self->threadId, (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
/* File: c/opcommon.c */
@@ -648,7 +613,7 @@
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
@@ -663,7 +628,7 @@
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
@@ -1196,9 +1161,12 @@
/*
* The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
+ * Because the portable interpreter is not involved with the JIT
+ * and trace building, we only need the extra check here when this
+ * code is massaged into a stub called from an assembly interpreter.
+ * This is controlled by the JIT_STUB_HACK maco.
*/
+
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
@@ -1213,7 +1181,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1237,7 +1205,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1261,7 +1229,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1285,7 +1253,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
diff --git a/vm/mterp/out/InterpC-portstd.c b/vm/mterp/out/InterpC-portable.c
similarity index 94%
rename from vm/mterp/out/InterpC-portstd.c
rename to vm/mterp/out/InterpC-portable.c
index ead11f7..8d29d72 100644
--- a/vm/mterp/out/InterpC-portstd.c
+++ b/vm/mterp/out/InterpC-portable.c
@@ -1,5 +1,5 @@
/*
- * This file was generated automatically by gen-mterp.py for 'portstd'.
+ * This file was generated automatically by gen-mterp.py for 'portable'.
*
* --> DO NOT EDIT <--
*/
@@ -37,20 +37,7 @@
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
*/
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
# define CHECK_BRANCH_OFFSETS
@@ -329,24 +316,6 @@
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
@@ -410,16 +379,6 @@
return true;
}
-/* File: portable/portstd.c */
-#define INTERP_FUNC_NAME dvmInterpretStd
-#define INTERP_TYPE INTERP_STD
-
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
-
/* File: portable/stubdefs.c */
/*
* In the C mterp stubs, "goto" is a function call followed immediately
@@ -434,6 +393,7 @@
/* ugh */
#define STUB_HACK(x)
+#define JIT_STUB_HACK(x)
/*
* Instruction framing. For a switch-oriented implementation this is
@@ -442,18 +402,15 @@
*
* Assumes the existence of "const u2* pc" and (for threaded operation)
* "u2 inst".
- *
- * TODO: remove "switch" version.
*/
-#ifdef THREADED_INTERP
# define H(_op) &&op_##_op
# define HANDLE_OPCODE(_op) op_##_op:
# define FINISH(_offset) { \
ADJUST_PC(_offset); \
inst = FETCH(0); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
- if (CHECK_JIT_BOOL()) GOTO_bail_switch(); \
+ if (self->interpBreak.ctl.subMode) { \
+ dvmCheckBefore(pc, fp, self); \
+ } \
goto *handlerTable[INST_INST(inst)]; \
}
# define FINISH_BKPT(_opcode) { \
@@ -462,23 +419,9 @@
# define DISPATCH_EXTENDED(_opcode) { \
goto *handlerTable[0x100 + _opcode]; \
}
-#else
-# define HANDLE_OPCODE(_op) case _op:
-# define FINISH(_offset) { ADJUST_PC(_offset); break; }
-# define FINISH_BKPT(opcode) { > not implemented < }
-# define DISPATCH_EXTENDED(opcode) goto case (0x100 + opcode);
-#endif
#define OP_END
-#if defined(WITH_TRACKREF_CHECKS)
-# define CHECK_TRACKED_REFS() \
- dvmInterpCheckTrackedRefs(self, curMethod, debugTrackedRefStart)
-#else
-# define CHECK_TRACKED_REFS() ((void)0)
-#endif
-
-
/*
* The "goto" targets just turn into goto statements. The "arguments" are
* passed through local variables.
@@ -499,7 +442,6 @@
#define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) goto invokeMethod;
#define GOTO_bail() goto bail;
-#define GOTO_bail_switch() goto bail_switch;
/*
* Periodically check for thread suspension.
@@ -507,20 +449,11 @@
* While we're at it, see if a debugger has attached or the profiler has
* started. If so, switch to a different "goto" table.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to %s ep=%d adj=%d\n", \
- self->threadId, \
- (self->nextMode == INTERP_STD) ? "STD" : "DBG", \
- (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
/* File: c/opcommon.c */
@@ -630,7 +563,7 @@
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
@@ -645,7 +578,7 @@
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
@@ -1178,9 +1111,12 @@
/*
* The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
+ * Because the portable interpreter is not involved with the JIT
+ * and trace building, we only need the extra check here when this
+ * code is massaged into a stub called from an assembly interpreter.
+ * This is controlled by the JIT_STUB_HACK maco.
*/
+
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
@@ -1195,7 +1131,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1219,7 +1155,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1243,7 +1179,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1267,7 +1203,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1283,15 +1219,11 @@
*
* This was written with an ARM implementation in mind.
*/
-bool INTERP_FUNC_NAME(Thread* self)
+void dvmInterpretPortable(Thread* self)
{
#if defined(EASY_GDB)
StackSaveArea* debugSaveArea = SAVEAREA_FROM_FP(self->curFrame);
#endif
-#if INTERP_TYPE == INTERP_DBG
- bool debugIsMethodEntry = false;
- debugIsMethodEntry = self->debugIsMethodEntry;
-#endif
#if defined(WITH_TRACKREF_CHECKS)
int debugTrackedRefStart = self->interpSave.debugTrackedRefStart;
#endif
@@ -1312,46 +1244,8 @@
bool jumboFormat;
-#if defined(THREADED_INTERP)
/* static computed goto table */
DEFINE_GOTO_TABLE(handlerTable);
-#endif
-
-#if defined(WITH_JIT)
-#if 0
- LOGD("*DebugInterp - entrypoint is %d, tgt is 0x%x, %s\n",
- self->entryPoint,
- self->interpSave.pc,
- self->interpSave.method->name);
-#endif
-#if INTERP_TYPE == INTERP_DBG
- const ClassObject* callsiteClass = NULL;
-
-#if defined(WITH_SELF_VERIFICATION)
- if (self->jitState != kJitSelfVerification) {
- self->shadowSpace->jitExitState = kSVSIdle;
- }
-#endif
-
- /* Check to see if we've got a trace selection request. */
- if (
- /*
- * Only perform dvmJitCheckTraceRequest if the entry point is
- * EntryInstr and the jit state is either kJitTSelectRequest or
- * kJitTSelectRequestHot. If debugger/profiler happens to be attached,
- * dvmJitCheckTraceRequest will change the jitState to kJitDone but
- * but stay in the dbg interpreter.
- */
- (self->entryPoint == kInterpEntryInstr) &&
- (self->jitState == kJitTSelectRequest ||
- self->jitState == kJitTSelectRequestHot) &&
- dvmJitCheckTraceRequest(self)) {
- self->nextMode = INTERP_STD;
- //LOGD("Invalid trace request, exiting\n");
- return true;
- }
-#endif /* INTERP_TYPE == INTERP_DBG */
-#endif /* WITH_JIT */
/* copy state in */
curMethod = self->interpSave.method;
@@ -1361,49 +1255,24 @@
methodClassDex = curMethod->clazz->pDvmDex;
- LOGVV("threadid=%d: entry(%s) %s.%s pc=0x%x fp=%p ep=%d\n",
- self->threadId, (self->nextMode == INTERP_STD) ? "STD" : "DBG",
- curMethod->clazz->descriptor, curMethod->name, pc - curMethod->insns,
- fp, self->entryPoint);
+ LOGVV("threadid=%d: %s.%s pc=0x%x fp=%p\n",
+ self->threadId, curMethod->clazz->descriptor, curMethod->name,
+ pc - curMethod->insns, fp);
/*
* DEBUG: scramble this to ensure we're not relying on it.
*/
methodToCall = (const Method*) -1;
-#if INTERP_TYPE == INTERP_DBG
- if (debugIsMethodEntry) {
+#if 0
+ if (self->debugIsMethodEntry) {
ILOGD("|-- Now interpreting %s.%s", curMethod->clazz->descriptor,
curMethod->name);
DUMP_REGS(curMethod, self->interpSave.fp, false);
}
#endif
- switch (self->entryPoint) {
- case kInterpEntryInstr:
- /* just fall through to instruction loop or threaded kickstart */
- break;
- case kInterpEntryReturn:
- CHECK_JIT_VOID();
- goto returnFromMethod;
- case kInterpEntryThrow:
- goto exceptionThrown;
- default:
- dvmAbort();
- }
-
-#ifdef THREADED_INTERP
FINISH(0); /* fetch and execute first instruction */
-#else
- while (1) {
- CHECK_DEBUG_AND_PROF(); /* service debugger and profiling */
- CHECK_TRACKED_REFS(); /* check local reference tracking */
-
- /* fetch the next 16 bits from the instruction stream */
- inst = FETCH(0);
-
- switch (INST_INST(inst)) {
-#endif
/*--- start of opcodes ---*/
@@ -1901,15 +1770,18 @@
if (!dvmIsClassInitialized(clazz) && !dvmInitClass(clazz))
GOTO_exceptionThrown();
+#if defined(WITH_JIT)
/*
* The JIT needs dvmDexGetResolvedClass() to return non-null.
* Since we use the portable interpreter to build the trace, this extra
* check is not needed for mterp.
*/
- if (!dvmDexGetResolvedClass(methodClassDex, ref)) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (!dvmDexGetResolvedClass(methodClassDex, ref))) {
/* Class initialization is still ongoing - end the trace */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
/*
* Verifier now tests for interface/abstract class.
@@ -2038,7 +1910,7 @@
ILOGV("|goto +0x%02x", ((s1)vdst));
ILOGV("> branch taken");
if ((s1)vdst < 0)
- PERIODIC_CHECKS(kInterpEntryInstr, (s1)vdst);
+ PERIODIC_CHECKS((s1)vdst);
FINISH((s1)vdst);
OP_END
@@ -2053,7 +1925,7 @@
ILOGV("|goto/16 +0x%04x", offset);
ILOGV("> branch taken");
if (offset < 0)
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
@@ -2070,7 +1942,7 @@
ILOGV("|goto/32 +0x%08x", offset);
ILOGV("> branch taken");
if (offset <= 0) /* allowed to branch to self */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
@@ -2101,7 +1973,7 @@
offset = dvmInterpHandlePackedSwitch(switchData, testVal);
ILOGV("> branch taken (0x%04x)\n", offset);
if (offset <= 0) /* uncommon */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
@@ -2132,7 +2004,7 @@
offset = dvmInterpHandleSparseSwitch(switchData, testVal);
ILOGV("> branch taken (0x%04x)\n", offset);
if (offset <= 0) /* uncommon */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
+ PERIODIC_CHECKS(offset);
FINISH(offset);
}
OP_END
@@ -3016,7 +2888,6 @@
/* File: c/OP_BREAKPOINT.c */
HANDLE_OPCODE(OP_BREAKPOINT)
-#if (INTERP_TYPE == INTERP_DBG)
{
/*
* Restart this instruction with the original opcode. We do
@@ -3026,7 +2897,7 @@
* for the sake of anything that needs to do disambiguation in a
* common handler with INST_INST.
*
- * The breakpoint itself is handled over in updateDebugger(),
+ * The breakpoint itself is handled over in dvmUpdateDebugger(),
* because we need to detect other events (method entry, single
* step) and report them in the same event packet, and we're not
* yet handling those through breakpoint instructions. By the
@@ -3039,10 +2910,6 @@
inst = INST_REPLACE_OP(inst, originalOpcode);
FINISH_BKPT(originalOpcode);
}
-#else
- LOGE("Breakpoint hit in non-debug interpreter\n");
- dvmAbort();
-#endif
OP_END
/* File: c/OP_THROW_VERIFICATION_ERROR.c */
@@ -3104,13 +2971,13 @@
;
}
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ } else {
+ if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ }
}
FINISH(3);
OP_END
@@ -3149,13 +3016,13 @@
;
}
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ } else {
+ if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ }
}
FINISH(3);
OP_END
@@ -3183,12 +3050,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, false);
}
-#endif
FINISH(3);
}
OP_END
@@ -3373,15 +3238,18 @@
if (!dvmIsClassInitialized(clazz) && !dvmInitClass(clazz))
GOTO_exceptionThrown();
+#if defined(WITH_JIT)
/*
* The JIT needs dvmDexGetResolvedClass() to return non-null.
* Since we use the portable interpreter to build the trace, this extra
* check is not needed for mterp.
*/
- if (!dvmDexGetResolvedClass(methodClassDex, ref)) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (!dvmDexGetResolvedClass(methodClassDex, ref))) {
/* Class initialization is still ongoing - end the trace */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
/*
* Verifier now tests for interface/abstract class.
@@ -4430,12 +4298,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, true);
}
-#endif
FINISH(5);
}
OP_END
@@ -4676,8 +4542,9 @@
assert(baseMethod->methodIndex < thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[baseMethod->methodIndex];
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->methodToCall = methodToCall;
+ self->callsiteClass = thisPtr->clazz;
#endif
#if 0
@@ -4790,6 +4657,7 @@
GOTO_exceptionThrown();
}
methodToCall = curMethod->clazz->super->vtable[baseMethod->methodIndex];
+
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
dvmThrowAbstractMethodError("abstract method not implemented");
@@ -4850,9 +4718,6 @@
thisClass = thisPtr->clazz;
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisClass;
-#endif
/*
* Given a class and a method index, find the Method* with the
@@ -4860,6 +4725,10 @@
*/
methodToCall = dvmFindInterfaceMethodInCache(thisClass, ref, curMethod,
methodClassDex);
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisClass;
+ self->methodToCall = methodToCall;
+#endif
if (methodToCall == NULL) {
assert(dvmCheckException(self));
GOTO_exceptionThrown();
@@ -4946,15 +4815,18 @@
GOTO_exceptionThrown();
}
+#if defined(WITH_JIT) && defined(MTERP_STUB)
/*
* The JIT needs dvmDexGetResolvedMethod() to return non-null.
- * Since we use the portable interpreter to build the trace, this extra
- * check is not needed for mterp.
+ * Include the check if this code is being used as a stub
+ * called from the assembly interpreter.
*/
- if (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL)) {
/* Class initialization is still ongoing */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
}
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
GOTO_TARGET_END
@@ -4988,9 +4860,6 @@
if (!checkForNull(thisPtr))
GOTO_exceptionThrown();
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
-#endif
/*
* Combine the object we found with the vtable offset in the
@@ -4998,6 +4867,10 @@
*/
assert(ref < (unsigned int) thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[ref];
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisPtr->clazz;
+ self->methodToCall = methodToCall;
+#endif
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
@@ -5072,7 +4945,6 @@
LOGVV("+++ super-virtual[%d]=%s.%s\n",
ref, methodToCall->clazz->descriptor, methodToCall->name);
assert(methodToCall != NULL);
-
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
}
GOTO_TARGET_END
@@ -5093,7 +4965,7 @@
* Since this is now an interpreter switch point, we must do it before
* we do anything at all.
*/
- PERIODIC_CHECKS(kInterpEntryReturn, 0);
+ PERIODIC_CHECKS(0);
ILOGV("> retval=0x%llx (leaving %s.%s %s)",
retval.j, curMethod->clazz->descriptor, curMethod->name,
@@ -5105,20 +4977,19 @@
#ifdef EASY_GDB
debugSaveArea = saveArea;
#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, curMethod);
-#endif
/* back up to previous frame and see if we hit a break */
fp = (u4*)saveArea->prevFrame;
assert(fp != NULL);
+
+ /* Handle any special subMode requirements */
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportReturn(self, pc, fp);
+ }
+
if (dvmIsBreakFrame(fp)) {
/* bail without popping the method frame from stack */
LOGVV("+++ returned into break frame\n");
-#if defined(WITH_JIT)
- /* Let the Jit know the return is terminating normally */
- CHECK_JIT_VOID();
-#endif
GOTO_bail();
}
@@ -5157,16 +5028,8 @@
Object* exception;
int catchRelPc;
- /*
- * Since this is now an interpreter switch point, we must do it before
- * we do anything at all.
- */
- PERIODIC_CHECKS(kInterpEntryThrow, 0);
+ PERIODIC_CHECKS(0);
-#if defined(WITH_JIT)
- // Something threw during trace selection - end the current trace
- END_JIT_TSELECT();
-#endif
/*
* We save off the exception and clear the exception status. While
* processing the exception we might need to load some Throwable
@@ -5182,9 +5045,8 @@
exception->clazz->descriptor, curMethod->name,
dvmLineNumFromPC(curMethod, pc - curMethod->insns));
-#if (INTERP_TYPE == INTERP_DBG)
/*
- * Tell the debugger about it.
+ * Report the exception throw to any "subMode" watchers.
*
* TODO: if the exception was thrown by interpreted code, control
* fell through native, and then back to us, we will report the
@@ -5197,14 +5059,9 @@
* here, and have the JNI exception code do the reporting to the
* debugger.
*/
- if (DEBUGGER_ACTIVE) {
- void* catchFrame;
- catchRelPc = dvmFindCatchBlock(self, pc - curMethod->insns,
- exception, true, &catchFrame);
- dvmDbgPostException(fp, pc - curMethod->insns, catchFrame,
- catchRelPc, exception);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportExceptionThrow(self, curMethod, pc, fp);
}
-#endif
/*
* We need to unroll to the catch block or the nearest "break"
@@ -5442,11 +5299,20 @@
#endif
newSaveArea->prevFrame = fp;
newSaveArea->savedPc = pc;
-#if defined(WITH_JIT)
+#if defined(WITH_JIT) && defined(MTERP_STUB)
newSaveArea->returnAddr = 0;
#endif
newSaveArea->method = methodToCall;
+ if (self->interpBreak.ctl.subMode != 0) {
+ /*
+ * We mark ENTER here for both native and non-native
+ * calls. For native calls, we'll mark EXIT on return.
+ * For non-native calls, EXIT is marked in the RETURN op.
+ */
+ dvmReportInvoke(self, methodToCall);
+ }
+
if (!dvmIsNativeMethod(methodToCall)) {
/*
* "Call" interpreted code. Reposition the PC, update the
@@ -5459,9 +5325,7 @@
#ifdef EASY_GDB
debugSaveArea = SAVEAREA_FROM_FP(newFp);
#endif
-#if INTERP_TYPE == INTERP_DBG
- debugIsMethodEntry = true; // profiling, debugging
-#endif
+ self->debugIsMethodEntry = true; // profiling, debugging
ILOGD("> pc <-- %s.%s %s", curMethod->clazz->descriptor,
curMethod->name, curMethod->shorty);
DUMP_REGS(curMethod, fp, true); // show input args
@@ -5474,25 +5338,12 @@
DUMP_REGS(methodToCall, newFp, true); // show input args
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_ENTRY);
- }
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_ENTER(self, methodToCall);
-#endif
-
- {
- ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
- methodToCall->name, methodToCall->shorty);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPreNativeInvoke(pc, self, methodToCall);
}
-#if defined(WITH_JIT)
- /* Allow the Jit to end any pending trace building */
- CHECK_JIT_VOID();
-#endif
+ ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
+ methodToCall->name, methodToCall->shorty);
/*
* Jump through native call bridge. Because we leave no
@@ -5501,15 +5352,9 @@
*/
(*methodToCall->nativeFunc)(newFp, &retval, methodToCall, self);
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_EXIT);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPostNativeInvoke(pc, self, methodToCall);
}
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, methodToCall);
-#endif
/* pop frame off */
dvmPopJniLocals(self, newSaveArea);
@@ -5549,42 +5394,9 @@
/* File: portable/enddefs.c */
/*--- end of opcodes ---*/
-#ifndef THREADED_INTERP
- } // end of "switch"
- } // end of "while"
-#endif
-
bail:
ILOGD("|-- Leaving interpreter loop"); // note "curMethod" may be NULL
self->retval = retval;
- return false;
-
-bail_switch:
- /*
- * The standard interpreter currently doesn't set or care about the
- * "debugIsMethodEntry" value, so setting this is only of use if we're
- * switching between two "debug" interpreters, which we never do.
- *
- * TODO: figure out if preserving this makes any sense.
- */
-#if INTERP_TYPE == INTERP_DBG
- self->debugIsMethodEntry = debugIsMethodEntry;
-#else
- self->debugIsMethodEntry = false;
-#endif
-
- /* export state changes */
- self->interpSave.method = curMethod;
- self->interpSave.pc = pc;
- self->interpSave.fp = fp;
- /* debugTrackedRefStart doesn't change */
- self->retval = retval; /* need for _entryPoint=ret */
- self->nextMode =
- (INTERP_TYPE == INTERP_STD) ? INTERP_DBG : INTERP_STD;
- LOGVV(" meth='%s.%s' pc=0x%x fp=%p\n",
- curMethod->clazz->descriptor, curMethod->name,
- pc - curMethod->insns, fp);
- return true;
}
diff --git a/vm/mterp/out/InterpC-portdbg.c b/vm/mterp/out/InterpC-portdbg.c
deleted file mode 100644
index 5739dec..0000000
--- a/vm/mterp/out/InterpC-portdbg.c
+++ /dev/null
@@ -1,5840 +0,0 @@
-/*
- * This file was generated automatically by gen-mterp.py for 'portdbg'.
- *
- * --> DO NOT EDIT <--
- */
-
-/* File: c/header.c */
-/*
- * Copyright (C) 2008 The Android Open Source Project
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* common includes */
-#include "Dalvik.h"
-#include "interp/InterpDefs.h"
-#include "mterp/Mterp.h"
-#include <math.h> // needed for fmod, fmodf
-#include "mterp/common/FindInterface.h"
-
-/*
- * Configuration defines. These affect the C implementations, i.e. the
- * portable interpreter(s) and C stubs.
- *
- * Some defines are controlled by the Makefile, e.g.:
- * WITH_INSTR_CHECKS
- * WITH_TRACKREF_CHECKS
- * EASY_GDB
- * NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
- */
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
-
-#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
-# define CHECK_BRANCH_OFFSETS
-# define CHECK_REGISTER_INDICES
-#endif
-
-/*
- * Some architectures require 64-bit alignment for access to 64-bit data
- * types. We can't just use pointers to copy 64-bit values out of our
- * interpreted register set, because gcc may assume the pointer target is
- * aligned and generate invalid code.
- *
- * There are two common approaches:
- * (1) Use a union that defines a 32-bit pair and a 64-bit value.
- * (2) Call memcpy().
- *
- * Depending upon what compiler you're using and what options are specified,
- * one may be faster than the other. For example, the compiler might
- * convert a memcpy() of 8 bytes into a series of instructions and omit
- * the call. The union version could cause some strange side-effects,
- * e.g. for a while ARM gcc thought it needed separate storage for each
- * inlined instance, and generated instructions to zero out ~700 bytes of
- * stack space at the top of the interpreter.
- *
- * The default is to use memcpy(). The current gcc for ARM seems to do
- * better with the union.
- */
-#if defined(__ARM_EABI__)
-# define NO_UNALIGN_64__UNION
-#endif
-
-
-//#define LOG_INSTR /* verbose debugging */
-/* set and adjust ANDROID_LOG_TAGS='*:i jdwp:i dalvikvm:i dalvikvmi:i' */
-
-/*
- * Keep a tally of accesses to fields. Currently only works if full DEX
- * optimization is disabled.
- */
-#ifdef PROFILE_FIELD_ACCESS
-# define UPDATE_FIELD_GET(_field) { (_field)->gets++; }
-# define UPDATE_FIELD_PUT(_field) { (_field)->puts++; }
-#else
-# define UPDATE_FIELD_GET(_field) ((void)0)
-# define UPDATE_FIELD_PUT(_field) ((void)0)
-#endif
-
-/*
- * Export another copy of the PC on every instruction; this is largely
- * redundant with EXPORT_PC and the debugger code. This value can be
- * compared against what we have stored on the stack with EXPORT_PC to
- * help ensure that we aren't missing any export calls.
- */
-#if WITH_EXTRA_GC_CHECKS > 1
-# define EXPORT_EXTRA_PC() (self->currentPc2 = pc)
-#else
-# define EXPORT_EXTRA_PC()
-#endif
-
-/*
- * Adjust the program counter. "_offset" is a signed int, in 16-bit units.
- *
- * Assumes the existence of "const u2* pc" and "const u2* curMethod->insns".
- *
- * We don't advance the program counter until we finish an instruction or
- * branch, because we do want to have to unroll the PC if there's an
- * exception.
- */
-#ifdef CHECK_BRANCH_OFFSETS
-# define ADJUST_PC(_offset) do { \
- int myoff = _offset; /* deref only once */ \
- if (pc + myoff < curMethod->insns || \
- pc + myoff >= curMethod->insns + dvmGetMethodInsnsSize(curMethod)) \
- { \
- char* desc; \
- desc = dexProtoCopyMethodDescriptor(&curMethod->prototype); \
- LOGE("Invalid branch %d at 0x%04x in %s.%s %s\n", \
- myoff, (int) (pc - curMethod->insns), \
- curMethod->clazz->descriptor, curMethod->name, desc); \
- free(desc); \
- dvmAbort(); \
- } \
- pc += myoff; \
- EXPORT_EXTRA_PC(); \
- } while (false)
-#else
-# define ADJUST_PC(_offset) do { \
- pc += _offset; \
- EXPORT_EXTRA_PC(); \
- } while (false)
-#endif
-
-/*
- * If enabled, log instructions as we execute them.
- */
-#ifdef LOG_INSTR
-# define ILOGD(...) ILOG(LOG_DEBUG, __VA_ARGS__)
-# define ILOGV(...) ILOG(LOG_VERBOSE, __VA_ARGS__)
-# define ILOG(_level, ...) do { \
- char debugStrBuf[128]; \
- snprintf(debugStrBuf, sizeof(debugStrBuf), __VA_ARGS__); \
- if (curMethod != NULL) \
- LOG(_level, LOG_TAG"i", "%-2d|%04x%s\n", \
- self->threadId, (int)(pc - curMethod->insns), debugStrBuf); \
- else \
- LOG(_level, LOG_TAG"i", "%-2d|####%s\n", \
- self->threadId, debugStrBuf); \
- } while(false)
-void dvmDumpRegs(const Method* method, const u4* framePtr, bool inOnly);
-# define DUMP_REGS(_meth, _frame, _inOnly) dvmDumpRegs(_meth, _frame, _inOnly)
-static const char kSpacing[] = " ";
-#else
-# define ILOGD(...) ((void)0)
-# define ILOGV(...) ((void)0)
-# define DUMP_REGS(_meth, _frame, _inOnly) ((void)0)
-#endif
-
-/* get a long from an array of u4 */
-static inline s8 getLongFromArray(const u4* ptr, int idx)
-{
-#if defined(NO_UNALIGN_64__UNION)
- union { s8 ll; u4 parts[2]; } conv;
-
- ptr += idx;
- conv.parts[0] = ptr[0];
- conv.parts[1] = ptr[1];
- return conv.ll;
-#else
- s8 val;
- memcpy(&val, &ptr[idx], 8);
- return val;
-#endif
-}
-
-/* store a long into an array of u4 */
-static inline void putLongToArray(u4* ptr, int idx, s8 val)
-{
-#if defined(NO_UNALIGN_64__UNION)
- union { s8 ll; u4 parts[2]; } conv;
-
- ptr += idx;
- conv.ll = val;
- ptr[0] = conv.parts[0];
- ptr[1] = conv.parts[1];
-#else
- memcpy(&ptr[idx], &val, 8);
-#endif
-}
-
-/* get a double from an array of u4 */
-static inline double getDoubleFromArray(const u4* ptr, int idx)
-{
-#if defined(NO_UNALIGN_64__UNION)
- union { double d; u4 parts[2]; } conv;
-
- ptr += idx;
- conv.parts[0] = ptr[0];
- conv.parts[1] = ptr[1];
- return conv.d;
-#else
- double dval;
- memcpy(&dval, &ptr[idx], 8);
- return dval;
-#endif
-}
-
-/* store a double into an array of u4 */
-static inline void putDoubleToArray(u4* ptr, int idx, double dval)
-{
-#if defined(NO_UNALIGN_64__UNION)
- union { double d; u4 parts[2]; } conv;
-
- ptr += idx;
- conv.d = dval;
- ptr[0] = conv.parts[0];
- ptr[1] = conv.parts[1];
-#else
- memcpy(&ptr[idx], &dval, 8);
-#endif
-}
-
-/*
- * If enabled, validate the register number on every access. Otherwise,
- * just do an array access.
- *
- * Assumes the existence of "u4* fp".
- *
- * "_idx" may be referenced more than once.
- */
-#ifdef CHECK_REGISTER_INDICES
-# define GET_REGISTER(_idx) \
- ( (_idx) < curMethod->registersSize ? \
- (fp[(_idx)]) : (assert(!"bad reg"),1969) )
-# define SET_REGISTER(_idx, _val) \
- ( (_idx) < curMethod->registersSize ? \
- (fp[(_idx)] = (u4)(_val)) : (assert(!"bad reg"),1969) )
-# define GET_REGISTER_AS_OBJECT(_idx) ((Object *)GET_REGISTER(_idx))
-# define SET_REGISTER_AS_OBJECT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
-# define GET_REGISTER_INT(_idx) ((s4) GET_REGISTER(_idx))
-# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
-# define GET_REGISTER_WIDE(_idx) \
- ( (_idx) < curMethod->registersSize-1 ? \
- getLongFromArray(fp, (_idx)) : (assert(!"bad reg"),1969) )
-# define SET_REGISTER_WIDE(_idx, _val) \
- ( (_idx) < curMethod->registersSize-1 ? \
- putLongToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969) )
-# define GET_REGISTER_FLOAT(_idx) \
- ( (_idx) < curMethod->registersSize ? \
- (*((float*) &fp[(_idx)])) : (assert(!"bad reg"),1969.0f) )
-# define SET_REGISTER_FLOAT(_idx, _val) \
- ( (_idx) < curMethod->registersSize ? \
- (*((float*) &fp[(_idx)]) = (_val)) : (assert(!"bad reg"),1969.0f) )
-# define GET_REGISTER_DOUBLE(_idx) \
- ( (_idx) < curMethod->registersSize-1 ? \
- getDoubleFromArray(fp, (_idx)) : (assert(!"bad reg"),1969.0) )
-# define SET_REGISTER_DOUBLE(_idx, _val) \
- ( (_idx) < curMethod->registersSize-1 ? \
- putDoubleToArray(fp, (_idx), (_val)) : (assert(!"bad reg"),1969.0) )
-#else
-# define GET_REGISTER(_idx) (fp[(_idx)])
-# define SET_REGISTER(_idx, _val) (fp[(_idx)] = (_val))
-# define GET_REGISTER_AS_OBJECT(_idx) ((Object*) fp[(_idx)])
-# define SET_REGISTER_AS_OBJECT(_idx, _val) (fp[(_idx)] = (u4)(_val))
-# define GET_REGISTER_INT(_idx) ((s4)GET_REGISTER(_idx))
-# define SET_REGISTER_INT(_idx, _val) SET_REGISTER(_idx, (s4)_val)
-# define GET_REGISTER_WIDE(_idx) getLongFromArray(fp, (_idx))
-# define SET_REGISTER_WIDE(_idx, _val) putLongToArray(fp, (_idx), (_val))
-# define GET_REGISTER_FLOAT(_idx) (*((float*) &fp[(_idx)]))
-# define SET_REGISTER_FLOAT(_idx, _val) (*((float*) &fp[(_idx)]) = (_val))
-# define GET_REGISTER_DOUBLE(_idx) getDoubleFromArray(fp, (_idx))
-# define SET_REGISTER_DOUBLE(_idx, _val) putDoubleToArray(fp, (_idx), (_val))
-#endif
-
-/*
- * Get 16 bits from the specified offset of the program counter. We always
- * want to load 16 bits at a time from the instruction stream -- it's more
- * efficient than 8 and won't have the alignment problems that 32 might.
- *
- * Assumes existence of "const u2* pc".
- */
-#define FETCH(_offset) (pc[(_offset)])
-
-/*
- * Extract instruction byte from 16-bit fetch (_inst is a u2).
- */
-#define INST_INST(_inst) ((_inst) & 0xff)
-
-/*
- * Replace the opcode (used when handling breakpoints). _opcode is a u1.
- */
-#define INST_REPLACE_OP(_inst, _opcode) (((_inst) & 0xff00) | _opcode)
-
-/*
- * Extract the "vA, vB" 4-bit registers from the instruction word (_inst is u2).
- */
-#define INST_A(_inst) (((_inst) >> 8) & 0x0f)
-#define INST_B(_inst) ((_inst) >> 12)
-
-/*
- * Get the 8-bit "vAA" 8-bit register index from the instruction word.
- * (_inst is u2)
- */
-#define INST_AA(_inst) ((_inst) >> 8)
-
-/*
- * The current PC must be available to Throwable constructors, e.g.
- * those created by the various exception throw routines, so that the
- * exception stack trace can be generated correctly. If we don't do this,
- * the offset within the current method won't be shown correctly. See the
- * notes in Exception.c.
- *
- * This is also used to determine the address for precise GC.
- *
- * Assumes existence of "u4* fp" and "const u2* pc".
- */
-#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
-
-/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
- * Check to see if "obj" is NULL. If so, throw an exception. Assumes the
- * pc has already been exported to the stack.
- *
- * Perform additional checks on debug builds.
- *
- * Use this to check for NULL when the instruction handler calls into
- * something that could throw an exception (so we have already called
- * EXPORT_PC at the top).
- */
-static inline bool checkForNull(Object* obj)
-{
- if (obj == NULL) {
- dvmThrowNullPointerException(NULL);
- return false;
- }
-#ifdef WITH_EXTRA_OBJECT_VALIDATION
- if (!dvmIsValidObject(obj)) {
- LOGE("Invalid object %p\n", obj);
- dvmAbort();
- }
-#endif
-#ifndef NDEBUG
- if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
- /* probable heap corruption */
- LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
- dvmAbort();
- }
-#endif
- return true;
-}
-
-/*
- * Check to see if "obj" is NULL. If so, export the PC into the stack
- * frame and throw an exception.
- *
- * Perform additional checks on debug builds.
- *
- * Use this to check for NULL when the instruction handler doesn't do
- * anything else that can throw an exception.
- */
-static inline bool checkForNullExportPC(Object* obj, u4* fp, const u2* pc)
-{
- if (obj == NULL) {
- EXPORT_PC();
- dvmThrowNullPointerException(NULL);
- return false;
- }
-#ifdef WITH_EXTRA_OBJECT_VALIDATION
- if (!dvmIsValidObject(obj)) {
- LOGE("Invalid object %p\n", obj);
- dvmAbort();
- }
-#endif
-#ifndef NDEBUG
- if (obj->clazz == NULL || ((u4) obj->clazz) <= 65536) {
- /* probable heap corruption */
- LOGE("Invalid object class %p (in %p)\n", obj->clazz, obj);
- dvmAbort();
- }
-#endif
- return true;
-}
-
-/* File: portable/portdbg.c */
-#define INTERP_FUNC_NAME dvmInterpretDbg
-#define INTERP_TYPE INTERP_DBG
-
-#define CHECK_DEBUG_AND_PROF() \
- checkDebugAndProf(pc, fp, self, curMethod, &debugIsMethodEntry)
-
-#if defined(WITH_JIT)
-#define CHECK_JIT_BOOL() (dvmCheckJit(pc, self, callsiteClass,\
- methodToCall))
-#define CHECK_JIT_VOID() (dvmCheckJit(pc, self, callsiteClass,\
- methodToCall))
-#define END_JIT_TSELECT() (dvmJitEndTraceSelect(self))
-#else
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT(x) ((void)0)
-#endif
-
-/* File: portable/stubdefs.c */
-/*
- * In the C mterp stubs, "goto" is a function call followed immediately
- * by a return.
- */
-
-#define GOTO_TARGET_DECL(_target, ...)
-
-#define GOTO_TARGET(_target, ...) _target:
-
-#define GOTO_TARGET_END
-
-/* ugh */
-#define STUB_HACK(x)
-
-/*
- * Instruction framing. For a switch-oriented implementation this is
- * case/break, for a threaded implementation it's a goto label and an
- * instruction fetch/computed goto.
- *
- * Assumes the existence of "const u2* pc" and (for threaded operation)
- * "u2 inst".
- *
- * TODO: remove "switch" version.
- */
-#ifdef THREADED_INTERP
-# define H(_op) &&op_##_op
-# define HANDLE_OPCODE(_op) op_##_op:
-# define FINISH(_offset) { \
- ADJUST_PC(_offset); \
- inst = FETCH(0); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
- if (CHECK_JIT_BOOL()) GOTO_bail_switch(); \
- goto *handlerTable[INST_INST(inst)]; \
- }
-# define FINISH_BKPT(_opcode) { \
- goto *handlerTable[_opcode]; \
- }
-# define DISPATCH_EXTENDED(_opcode) { \
- goto *handlerTable[0x100 + _opcode]; \
- }
-#else
-# define HANDLE_OPCODE(_op) case _op:
-# define FINISH(_offset) { ADJUST_PC(_offset); break; }
-# define FINISH_BKPT(opcode) { > not implemented < }
-# define DISPATCH_EXTENDED(opcode) goto case (0x100 + opcode);
-#endif
-
-#define OP_END
-
-#if defined(WITH_TRACKREF_CHECKS)
-# define CHECK_TRACKED_REFS() \
- dvmInterpCheckTrackedRefs(self, curMethod, debugTrackedRefStart)
-#else
-# define CHECK_TRACKED_REFS() ((void)0)
-#endif
-
-
-/*
- * The "goto" targets just turn into goto statements. The "arguments" are
- * passed through local variables.
- */
-
-#define GOTO_exceptionThrown() goto exceptionThrown;
-
-#define GOTO_returnFromMethod() goto returnFromMethod;
-
-#define GOTO_invoke(_target, _methodCallRange, _jumboFormat) \
- do { \
- methodCallRange = _methodCallRange; \
- jumboFormat = _jumboFormat; \
- goto _target; \
- } while(false)
-
-/* for this, the "args" are already in the locals */
-#define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) goto invokeMethod;
-
-#define GOTO_bail() goto bail;
-#define GOTO_bail_switch() goto bail_switch;
-
-/*
- * Periodically check for thread suspension.
- *
- * While we're at it, see if a debugger has attached or the profiler has
- * started. If so, switch to a different "goto" table.
- */
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
- if (dvmCheckSuspendQuick(self)) { \
- EXPORT_PC(); /* need for precise GC */ \
- dvmCheckSuspendPending(self); \
- } \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to %s ep=%d adj=%d\n", \
- self->threadId, \
- (self->nextMode == INTERP_STD) ? "STD" : "DBG", \
- (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
- }
-
-/* File: c/opcommon.c */
-/* forward declarations of goto targets */
-GOTO_TARGET_DECL(filledNewArray, bool methodCallRange, bool jumboFormat);
-GOTO_TARGET_DECL(invokeVirtual, bool methodCallRange, bool jumboFormat);
-GOTO_TARGET_DECL(invokeSuper, bool methodCallRange, bool jumboFormat);
-GOTO_TARGET_DECL(invokeInterface, bool methodCallRange, bool jumboFormat);
-GOTO_TARGET_DECL(invokeDirect, bool methodCallRange, bool jumboFormat);
-GOTO_TARGET_DECL(invokeStatic, bool methodCallRange, bool jumboFormat);
-GOTO_TARGET_DECL(invokeVirtualQuick, bool methodCallRange, bool jumboFormat);
-GOTO_TARGET_DECL(invokeSuperQuick, bool methodCallRange, bool jumboFormat);
-GOTO_TARGET_DECL(invokeMethod, bool methodCallRange, const Method* methodToCall,
- u2 count, u2 regs);
-GOTO_TARGET_DECL(returnFromMethod);
-GOTO_TARGET_DECL(exceptionThrown);
-
-/*
- * ===========================================================================
- *
- * What follows are opcode definitions shared between multiple opcodes with
- * minor substitutions handled by the C pre-processor. These should probably
- * use the mterp substitution mechanism instead, with the code here moved
- * into common fragment files (like the asm "binop.S"), although it's hard
- * to give up the C preprocessor in favor of the much simpler text subst.
- *
- * ===========================================================================
- */
-
-#define HANDLE_NUMCONV(_opcode, _opname, _fromtype, _totype) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
- SET_REGISTER##_totype(vdst, \
- GET_REGISTER##_fromtype(vsrc1)); \
- FINISH(1);
-
-#define HANDLE_FLOAT_TO_INT(_opcode, _opname, _fromvtype, _fromrtype, \
- _tovtype, _tortype) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- { \
- /* spec defines specific handling for +/- inf and NaN values */ \
- _fromvtype val; \
- _tovtype intMin, intMax, result; \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
- val = GET_REGISTER##_fromrtype(vsrc1); \
- intMin = (_tovtype) 1 << (sizeof(_tovtype) * 8 -1); \
- intMax = ~intMin; \
- result = (_tovtype) val; \
- if (val >= intMax) /* +inf */ \
- result = intMax; \
- else if (val <= intMin) /* -inf */ \
- result = intMin; \
- else if (val != val) /* NaN */ \
- result = 0; \
- else \
- result = (_tovtype) val; \
- SET_REGISTER##_tortype(vdst, result); \
- } \
- FINISH(1);
-
-#define HANDLE_INT_TO_SMALL(_opcode, _opname, _type) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|int-to-%s v%d,v%d", (_opname), vdst, vsrc1); \
- SET_REGISTER(vdst, (_type) GET_REGISTER(vsrc1)); \
- FINISH(1);
-
-/* NOTE: the comparison result is always a signed 4-byte integer */
-#define HANDLE_OP_CMPX(_opcode, _opname, _varType, _type, _nanVal) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
- { \
- int result; \
- u2 regs; \
- _varType val1, val2; \
- vdst = INST_AA(inst); \
- regs = FETCH(1); \
- vsrc1 = regs & 0xff; \
- vsrc2 = regs >> 8; \
- ILOGV("|cmp%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
- val1 = GET_REGISTER##_type(vsrc1); \
- val2 = GET_REGISTER##_type(vsrc2); \
- if (val1 == val2) \
- result = 0; \
- else if (val1 < val2) \
- result = -1; \
- else if (val1 > val2) \
- result = 1; \
- else \
- result = (_nanVal); \
- ILOGV("+ result=%d\n", result); \
- SET_REGISTER(vdst, result); \
- } \
- FINISH(2);
-
-#define HANDLE_OP_IF_XX(_opcode, _opname, _cmp) \
- HANDLE_OPCODE(_opcode /*vA, vB, +CCCC*/) \
- vsrc1 = INST_A(inst); \
- vsrc2 = INST_B(inst); \
- if ((s4) GET_REGISTER(vsrc1) _cmp (s4) GET_REGISTER(vsrc2)) { \
- int branchOffset = (s2)FETCH(1); /* sign-extended */ \
- ILOGV("|if-%s v%d,v%d,+0x%04x", (_opname), vsrc1, vsrc2, \
- branchOffset); \
- ILOGV("> branch taken"); \
- if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
- FINISH(branchOffset); \
- } else { \
- ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
- FINISH(2); \
- }
-
-#define HANDLE_OP_IF_XXZ(_opcode, _opname, _cmp) \
- HANDLE_OPCODE(_opcode /*vAA, +BBBB*/) \
- vsrc1 = INST_AA(inst); \
- if ((s4) GET_REGISTER(vsrc1) _cmp 0) { \
- int branchOffset = (s2)FETCH(1); /* sign-extended */ \
- ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
- ILOGV("> branch taken"); \
- if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
- FINISH(branchOffset); \
- } else { \
- ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
- FINISH(2); \
- }
-
-#define HANDLE_UNOP(_opcode, _opname, _pfx, _sfx, _type) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|%s v%d,v%d", (_opname), vdst, vsrc1); \
- SET_REGISTER##_type(vdst, _pfx GET_REGISTER##_type(vsrc1) _sfx); \
- FINISH(1);
-
-#define HANDLE_OP_X_INT(_opcode, _opname, _op, _chkdiv) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
- { \
- u2 srcRegs; \
- vdst = INST_AA(inst); \
- srcRegs = FETCH(1); \
- vsrc1 = srcRegs & 0xff; \
- vsrc2 = srcRegs >> 8; \
- ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
- if (_chkdiv != 0) { \
- s4 firstVal, secondVal, result; \
- firstVal = GET_REGISTER(vsrc1); \
- secondVal = GET_REGISTER(vsrc2); \
- if (secondVal == 0) { \
- EXPORT_PC(); \
- dvmThrowArithmeticException("divide by zero"); \
- GOTO_exceptionThrown(); \
- } \
- if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
- if (_chkdiv == 1) \
- result = firstVal; /* division */ \
- else \
- result = 0; /* remainder */ \
- } else { \
- result = firstVal _op secondVal; \
- } \
- SET_REGISTER(vdst, result); \
- } else { \
- /* non-div/rem case */ \
- SET_REGISTER(vdst, \
- (s4) GET_REGISTER(vsrc1) _op (s4) GET_REGISTER(vsrc2)); \
- } \
- } \
- FINISH(2);
-
-#define HANDLE_OP_SHX_INT(_opcode, _opname, _cast, _op) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
- { \
- u2 srcRegs; \
- vdst = INST_AA(inst); \
- srcRegs = FETCH(1); \
- vsrc1 = srcRegs & 0xff; \
- vsrc2 = srcRegs >> 8; \
- ILOGV("|%s-int v%d,v%d", (_opname), vdst, vsrc1); \
- SET_REGISTER(vdst, \
- _cast GET_REGISTER(vsrc1) _op (GET_REGISTER(vsrc2) & 0x1f)); \
- } \
- FINISH(2);
-
-#define HANDLE_OP_X_INT_LIT16(_opcode, _opname, _op, _chkdiv) \
- HANDLE_OPCODE(_opcode /*vA, vB, #+CCCC*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- vsrc2 = FETCH(1); \
- ILOGV("|%s-int/lit16 v%d,v%d,#+0x%04x", \
- (_opname), vdst, vsrc1, vsrc2); \
- if (_chkdiv != 0) { \
- s4 firstVal, result; \
- firstVal = GET_REGISTER(vsrc1); \
- if ((s2) vsrc2 == 0) { \
- EXPORT_PC(); \
- dvmThrowArithmeticException("divide by zero"); \
- GOTO_exceptionThrown(); \
- } \
- if ((u4)firstVal == 0x80000000 && ((s2) vsrc2) == -1) { \
- /* won't generate /lit16 instr for this; check anyway */ \
- if (_chkdiv == 1) \
- result = firstVal; /* division */ \
- else \
- result = 0; /* remainder */ \
- } else { \
- result = firstVal _op (s2) vsrc2; \
- } \
- SET_REGISTER(vdst, result); \
- } else { \
- /* non-div/rem case */ \
- SET_REGISTER(vdst, GET_REGISTER(vsrc1) _op (s2) vsrc2); \
- } \
- FINISH(2);
-
-#define HANDLE_OP_X_INT_LIT8(_opcode, _opname, _op, _chkdiv) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
- { \
- u2 litInfo; \
- vdst = INST_AA(inst); \
- litInfo = FETCH(1); \
- vsrc1 = litInfo & 0xff; \
- vsrc2 = litInfo >> 8; /* constant */ \
- ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
- (_opname), vdst, vsrc1, vsrc2); \
- if (_chkdiv != 0) { \
- s4 firstVal, result; \
- firstVal = GET_REGISTER(vsrc1); \
- if ((s1) vsrc2 == 0) { \
- EXPORT_PC(); \
- dvmThrowArithmeticException("divide by zero"); \
- GOTO_exceptionThrown(); \
- } \
- if ((u4)firstVal == 0x80000000 && ((s1) vsrc2) == -1) { \
- if (_chkdiv == 1) \
- result = firstVal; /* division */ \
- else \
- result = 0; /* remainder */ \
- } else { \
- result = firstVal _op ((s1) vsrc2); \
- } \
- SET_REGISTER(vdst, result); \
- } else { \
- SET_REGISTER(vdst, \
- (s4) GET_REGISTER(vsrc1) _op (s1) vsrc2); \
- } \
- } \
- FINISH(2);
-
-#define HANDLE_OP_SHX_INT_LIT8(_opcode, _opname, _cast, _op) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, #+CC*/) \
- { \
- u2 litInfo; \
- vdst = INST_AA(inst); \
- litInfo = FETCH(1); \
- vsrc1 = litInfo & 0xff; \
- vsrc2 = litInfo >> 8; /* constant */ \
- ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", \
- (_opname), vdst, vsrc1, vsrc2); \
- SET_REGISTER(vdst, \
- _cast GET_REGISTER(vsrc1) _op (vsrc2 & 0x1f)); \
- } \
- FINISH(2);
-
-#define HANDLE_OP_X_INT_2ADDR(_opcode, _opname, _op, _chkdiv) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
- if (_chkdiv != 0) { \
- s4 firstVal, secondVal, result; \
- firstVal = GET_REGISTER(vdst); \
- secondVal = GET_REGISTER(vsrc1); \
- if (secondVal == 0) { \
- EXPORT_PC(); \
- dvmThrowArithmeticException("divide by zero"); \
- GOTO_exceptionThrown(); \
- } \
- if ((u4)firstVal == 0x80000000 && secondVal == -1) { \
- if (_chkdiv == 1) \
- result = firstVal; /* division */ \
- else \
- result = 0; /* remainder */ \
- } else { \
- result = firstVal _op secondVal; \
- } \
- SET_REGISTER(vdst, result); \
- } else { \
- SET_REGISTER(vdst, \
- (s4) GET_REGISTER(vdst) _op (s4) GET_REGISTER(vsrc1)); \
- } \
- FINISH(1);
-
-#define HANDLE_OP_SHX_INT_2ADDR(_opcode, _opname, _cast, _op) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|%s-int-2addr v%d,v%d", (_opname), vdst, vsrc1); \
- SET_REGISTER(vdst, \
- _cast GET_REGISTER(vdst) _op (GET_REGISTER(vsrc1) & 0x1f)); \
- FINISH(1);
-
-#define HANDLE_OP_X_LONG(_opcode, _opname, _op, _chkdiv) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
- { \
- u2 srcRegs; \
- vdst = INST_AA(inst); \
- srcRegs = FETCH(1); \
- vsrc1 = srcRegs & 0xff; \
- vsrc2 = srcRegs >> 8; \
- ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
- if (_chkdiv != 0) { \
- s8 firstVal, secondVal, result; \
- firstVal = GET_REGISTER_WIDE(vsrc1); \
- secondVal = GET_REGISTER_WIDE(vsrc2); \
- if (secondVal == 0LL) { \
- EXPORT_PC(); \
- dvmThrowArithmeticException("divide by zero"); \
- GOTO_exceptionThrown(); \
- } \
- if ((u8)firstVal == 0x8000000000000000ULL && \
- secondVal == -1LL) \
- { \
- if (_chkdiv == 1) \
- result = firstVal; /* division */ \
- else \
- result = 0; /* remainder */ \
- } else { \
- result = firstVal _op secondVal; \
- } \
- SET_REGISTER_WIDE(vdst, result); \
- } else { \
- SET_REGISTER_WIDE(vdst, \
- (s8) GET_REGISTER_WIDE(vsrc1) _op (s8) GET_REGISTER_WIDE(vsrc2)); \
- } \
- } \
- FINISH(2);
-
-#define HANDLE_OP_SHX_LONG(_opcode, _opname, _cast, _op) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
- { \
- u2 srcRegs; \
- vdst = INST_AA(inst); \
- srcRegs = FETCH(1); \
- vsrc1 = srcRegs & 0xff; \
- vsrc2 = srcRegs >> 8; \
- ILOGV("|%s-long v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
- SET_REGISTER_WIDE(vdst, \
- _cast GET_REGISTER_WIDE(vsrc1) _op (GET_REGISTER(vsrc2) & 0x3f)); \
- } \
- FINISH(2);
-
-#define HANDLE_OP_X_LONG_2ADDR(_opcode, _opname, _op, _chkdiv) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
- if (_chkdiv != 0) { \
- s8 firstVal, secondVal, result; \
- firstVal = GET_REGISTER_WIDE(vdst); \
- secondVal = GET_REGISTER_WIDE(vsrc1); \
- if (secondVal == 0LL) { \
- EXPORT_PC(); \
- dvmThrowArithmeticException("divide by zero"); \
- GOTO_exceptionThrown(); \
- } \
- if ((u8)firstVal == 0x8000000000000000ULL && \
- secondVal == -1LL) \
- { \
- if (_chkdiv == 1) \
- result = firstVal; /* division */ \
- else \
- result = 0; /* remainder */ \
- } else { \
- result = firstVal _op secondVal; \
- } \
- SET_REGISTER_WIDE(vdst, result); \
- } else { \
- SET_REGISTER_WIDE(vdst, \
- (s8) GET_REGISTER_WIDE(vdst) _op (s8)GET_REGISTER_WIDE(vsrc1));\
- } \
- FINISH(1);
-
-#define HANDLE_OP_SHX_LONG_2ADDR(_opcode, _opname, _cast, _op) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|%s-long-2addr v%d,v%d", (_opname), vdst, vsrc1); \
- SET_REGISTER_WIDE(vdst, \
- _cast GET_REGISTER_WIDE(vdst) _op (GET_REGISTER(vsrc1) & 0x3f)); \
- FINISH(1);
-
-#define HANDLE_OP_X_FLOAT(_opcode, _opname, _op) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
- { \
- u2 srcRegs; \
- vdst = INST_AA(inst); \
- srcRegs = FETCH(1); \
- vsrc1 = srcRegs & 0xff; \
- vsrc2 = srcRegs >> 8; \
- ILOGV("|%s-float v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
- SET_REGISTER_FLOAT(vdst, \
- GET_REGISTER_FLOAT(vsrc1) _op GET_REGISTER_FLOAT(vsrc2)); \
- } \
- FINISH(2);
-
-#define HANDLE_OP_X_DOUBLE(_opcode, _opname, _op) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
- { \
- u2 srcRegs; \
- vdst = INST_AA(inst); \
- srcRegs = FETCH(1); \
- vsrc1 = srcRegs & 0xff; \
- vsrc2 = srcRegs >> 8; \
- ILOGV("|%s-double v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
- SET_REGISTER_DOUBLE(vdst, \
- GET_REGISTER_DOUBLE(vsrc1) _op GET_REGISTER_DOUBLE(vsrc2)); \
- } \
- FINISH(2);
-
-#define HANDLE_OP_X_FLOAT_2ADDR(_opcode, _opname, _op) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|%s-float-2addr v%d,v%d", (_opname), vdst, vsrc1); \
- SET_REGISTER_FLOAT(vdst, \
- GET_REGISTER_FLOAT(vdst) _op GET_REGISTER_FLOAT(vsrc1)); \
- FINISH(1);
-
-#define HANDLE_OP_X_DOUBLE_2ADDR(_opcode, _opname, _op) \
- HANDLE_OPCODE(_opcode /*vA, vB*/) \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); \
- ILOGV("|%s-double-2addr v%d,v%d", (_opname), vdst, vsrc1); \
- SET_REGISTER_DOUBLE(vdst, \
- GET_REGISTER_DOUBLE(vdst) _op GET_REGISTER_DOUBLE(vsrc1)); \
- FINISH(1);
-
-#define HANDLE_OP_AGET(_opcode, _opname, _type, _regsize) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
- { \
- ArrayObject* arrayObj; \
- u2 arrayInfo; \
- EXPORT_PC(); \
- vdst = INST_AA(inst); \
- arrayInfo = FETCH(1); \
- vsrc1 = arrayInfo & 0xff; /* array ptr */ \
- vsrc2 = arrayInfo >> 8; /* index */ \
- ILOGV("|aget%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
- arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
- if (!checkForNull((Object*) arrayObj)) \
- GOTO_exceptionThrown(); \
- if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
- dvmThrowArrayIndexOutOfBoundsException( \
- arrayObj->length, GET_REGISTER(vsrc2)); \
- GOTO_exceptionThrown(); \
- } \
- SET_REGISTER##_regsize(vdst, \
- ((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)]); \
- ILOGV("+ AGET[%d]=0x%x", GET_REGISTER(vsrc2), GET_REGISTER(vdst)); \
- } \
- FINISH(2);
-
-#define HANDLE_OP_APUT(_opcode, _opname, _type, _regsize) \
- HANDLE_OPCODE(_opcode /*vAA, vBB, vCC*/) \
- { \
- ArrayObject* arrayObj; \
- u2 arrayInfo; \
- EXPORT_PC(); \
- vdst = INST_AA(inst); /* AA: source value */ \
- arrayInfo = FETCH(1); \
- vsrc1 = arrayInfo & 0xff; /* BB: array ptr */ \
- vsrc2 = arrayInfo >> 8; /* CC: index */ \
- ILOGV("|aput%s v%d,v%d,v%d", (_opname), vdst, vsrc1, vsrc2); \
- arrayObj = (ArrayObject*) GET_REGISTER(vsrc1); \
- if (!checkForNull((Object*) arrayObj)) \
- GOTO_exceptionThrown(); \
- if (GET_REGISTER(vsrc2) >= arrayObj->length) { \
- dvmThrowArrayIndexOutOfBoundsException( \
- arrayObj->length, GET_REGISTER(vsrc2)); \
- GOTO_exceptionThrown(); \
- } \
- ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));\
- ((_type*) arrayObj->contents)[GET_REGISTER(vsrc2)] = \
- GET_REGISTER##_regsize(vdst); \
- } \
- FINISH(2);
-
-/*
- * It's possible to get a bad value out of a field with sub-32-bit stores
- * because the -quick versions always operate on 32 bits. Consider:
- * short foo = -1 (sets a 32-bit register to 0xffffffff)
- * iput-quick foo (writes all 32 bits to the field)
- * short bar = 1 (sets a 32-bit register to 0x00000001)
- * iput-short (writes the low 16 bits to the field)
- * iget-quick foo (reads all 32 bits from the field, yielding 0xffff0001)
- * This can only happen when optimized and non-optimized code has interleaved
- * access to the same field. This is unlikely but possible.
- *
- * The easiest way to fix this is to always read/write 32 bits at a time. On
- * a device with a 16-bit data bus this is sub-optimal. (The alternative
- * approach is to have sub-int versions of iget-quick, but now we're wasting
- * Dalvik instruction space and making it less likely that handler code will
- * already be in the CPU i-cache.)
- */
-#define HANDLE_IGET_X(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
- { \
- InstField* ifield; \
- Object* obj; \
- EXPORT_PC(); \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); /* object ptr */ \
- ref = FETCH(1); /* field ref */ \
- ILOGV("|iget%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
- obj = (Object*) GET_REGISTER(vsrc1); \
- if (!checkForNull(obj)) \
- GOTO_exceptionThrown(); \
- ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
- if (ifield == NULL) { \
- ifield = dvmResolveInstField(curMethod->clazz, ref); \
- if (ifield == NULL) \
- GOTO_exceptionThrown(); \
- } \
- SET_REGISTER##_regsize(vdst, \
- dvmGetField##_ftype(obj, ifield->byteOffset)); \
- ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
- (u8) GET_REGISTER##_regsize(vdst)); \
- UPDATE_FIELD_GET(&ifield->field); \
- } \
- FINISH(2);
-
-#define HANDLE_IGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \
- { \
- InstField* ifield; \
- Object* obj; \
- EXPORT_PC(); \
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
- vdst = FETCH(3); \
- vsrc1 = FETCH(4); /* object ptr */ \
- ILOGV("|iget%s/jumbo v%d,v%d,field@0x%08x", \
- (_opname), vdst, vsrc1, ref); \
- obj = (Object*) GET_REGISTER(vsrc1); \
- if (!checkForNull(obj)) \
- GOTO_exceptionThrown(); \
- ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
- if (ifield == NULL) { \
- ifield = dvmResolveInstField(curMethod->clazz, ref); \
- if (ifield == NULL) \
- GOTO_exceptionThrown(); \
- } \
- SET_REGISTER##_regsize(vdst, \
- dvmGetField##_ftype(obj, ifield->byteOffset)); \
- ILOGV("+ IGET '%s'=0x%08llx", ifield->field.name, \
- (u8) GET_REGISTER##_regsize(vdst)); \
- UPDATE_FIELD_GET(&ifield->field); \
- } \
- FINISH(5);
-
-#define HANDLE_IGET_X_QUICK(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
- { \
- Object* obj; \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); /* object ptr */ \
- ref = FETCH(1); /* field offset */ \
- ILOGV("|iget%s-quick v%d,v%d,field@+%u", \
- (_opname), vdst, vsrc1, ref); \
- obj = (Object*) GET_REGISTER(vsrc1); \
- if (!checkForNullExportPC(obj, fp, pc)) \
- GOTO_exceptionThrown(); \
- SET_REGISTER##_regsize(vdst, dvmGetField##_ftype(obj, ref)); \
- ILOGV("+ IGETQ %d=0x%08llx", ref, \
- (u8) GET_REGISTER##_regsize(vdst)); \
- } \
- FINISH(2);
-
-#define HANDLE_IPUT_X(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
- { \
- InstField* ifield; \
- Object* obj; \
- EXPORT_PC(); \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); /* object ptr */ \
- ref = FETCH(1); /* field ref */ \
- ILOGV("|iput%s v%d,v%d,field@0x%04x", (_opname), vdst, vsrc1, ref); \
- obj = (Object*) GET_REGISTER(vsrc1); \
- if (!checkForNull(obj)) \
- GOTO_exceptionThrown(); \
- ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
- if (ifield == NULL) { \
- ifield = dvmResolveInstField(curMethod->clazz, ref); \
- if (ifield == NULL) \
- GOTO_exceptionThrown(); \
- } \
- dvmSetField##_ftype(obj, ifield->byteOffset, \
- GET_REGISTER##_regsize(vdst)); \
- ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
- (u8) GET_REGISTER##_regsize(vdst)); \
- UPDATE_FIELD_PUT(&ifield->field); \
- } \
- FINISH(2);
-
-#define HANDLE_IPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vBBBB, vCCCC, class@AAAAAAAA*/) \
- { \
- InstField* ifield; \
- Object* obj; \
- EXPORT_PC(); \
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
- vdst = FETCH(3); \
- vsrc1 = FETCH(4); /* object ptr */ \
- ILOGV("|iput%s/jumbo v%d,v%d,field@0x%08x", \
- (_opname), vdst, vsrc1, ref); \
- obj = (Object*) GET_REGISTER(vsrc1); \
- if (!checkForNull(obj)) \
- GOTO_exceptionThrown(); \
- ifield = (InstField*) dvmDexGetResolvedField(methodClassDex, ref); \
- if (ifield == NULL) { \
- ifield = dvmResolveInstField(curMethod->clazz, ref); \
- if (ifield == NULL) \
- GOTO_exceptionThrown(); \
- } \
- dvmSetField##_ftype(obj, ifield->byteOffset, \
- GET_REGISTER##_regsize(vdst)); \
- ILOGV("+ IPUT '%s'=0x%08llx", ifield->field.name, \
- (u8) GET_REGISTER##_regsize(vdst)); \
- UPDATE_FIELD_PUT(&ifield->field); \
- } \
- FINISH(5);
-
-#define HANDLE_IPUT_X_QUICK(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vA, vB, field@CCCC*/) \
- { \
- Object* obj; \
- vdst = INST_A(inst); \
- vsrc1 = INST_B(inst); /* object ptr */ \
- ref = FETCH(1); /* field offset */ \
- ILOGV("|iput%s-quick v%d,v%d,field@0x%04x", \
- (_opname), vdst, vsrc1, ref); \
- obj = (Object*) GET_REGISTER(vsrc1); \
- if (!checkForNullExportPC(obj, fp, pc)) \
- GOTO_exceptionThrown(); \
- dvmSetField##_ftype(obj, ref, GET_REGISTER##_regsize(vdst)); \
- ILOGV("+ IPUTQ %d=0x%08llx", ref, \
- (u8) GET_REGISTER##_regsize(vdst)); \
- } \
- FINISH(2);
-
-/*
- * The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
- */
-#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
- { \
- StaticField* sfield; \
- vdst = INST_AA(inst); \
- ref = FETCH(1); /* field ref */ \
- ILOGV("|sget%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
- sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
- if (sfield == NULL) { \
- EXPORT_PC(); \
- sfield = dvmResolveStaticField(curMethod->clazz, ref); \
- if (sfield == NULL) \
- GOTO_exceptionThrown(); \
- if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
- } \
- } \
- SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
- ILOGV("+ SGET '%s'=0x%08llx", \
- sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
- UPDATE_FIELD_GET(&sfield->field); \
- } \
- FINISH(2);
-
-#define HANDLE_SGET_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \
- { \
- StaticField* sfield; \
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
- vdst = FETCH(3); \
- ILOGV("|sget%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \
- sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
- if (sfield == NULL) { \
- EXPORT_PC(); \
- sfield = dvmResolveStaticField(curMethod->clazz, ref); \
- if (sfield == NULL) \
- GOTO_exceptionThrown(); \
- if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
- } \
- } \
- SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
- ILOGV("+ SGET '%s'=0x%08llx", \
- sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
- UPDATE_FIELD_GET(&sfield->field); \
- } \
- FINISH(4);
-
-#define HANDLE_SPUT_X(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
- { \
- StaticField* sfield; \
- vdst = INST_AA(inst); \
- ref = FETCH(1); /* field ref */ \
- ILOGV("|sput%s v%d,sfield@0x%04x", (_opname), vdst, ref); \
- sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
- if (sfield == NULL) { \
- EXPORT_PC(); \
- sfield = dvmResolveStaticField(curMethod->clazz, ref); \
- if (sfield == NULL) \
- GOTO_exceptionThrown(); \
- if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
- } \
- } \
- dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
- ILOGV("+ SPUT '%s'=0x%08llx", \
- sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
- UPDATE_FIELD_PUT(&sfield->field); \
- } \
- FINISH(2);
-
-#define HANDLE_SPUT_X_JUMBO(_opcode, _opname, _ftype, _regsize) \
- HANDLE_OPCODE(_opcode /*vBBBB, class@AAAAAAAA*/) \
- { \
- StaticField* sfield; \
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* field ref */ \
- vdst = FETCH(3); \
- ILOGV("|sput%s/jumbo v%d,sfield@0x%08x", (_opname), vdst, ref); \
- sfield = (StaticField*)dvmDexGetResolvedField(methodClassDex, ref); \
- if (sfield == NULL) { \
- EXPORT_PC(); \
- sfield = dvmResolveStaticField(curMethod->clazz, ref); \
- if (sfield == NULL) \
- GOTO_exceptionThrown(); \
- if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
- } \
- } \
- dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
- ILOGV("+ SPUT '%s'=0x%08llx", \
- sfield->field.name, (u8)GET_REGISTER##_regsize(vdst)); \
- UPDATE_FIELD_PUT(&sfield->field); \
- } \
- FINISH(4);
-
-/* File: portable/debug.c */
-/* code in here is only included in portable-debug interpreter */
-
-/*
- * Update the debugger on interesting events, such as hitting a breakpoint
- * or a single-step point. This is called from the top of the interpreter
- * loop, before the current instruction is processed.
- *
- * Set "methodEntry" if we've just entered the method. This detects
- * method exit by checking to see if the next instruction is "return".
- *
- * This can't catch native method entry/exit, so we have to handle that
- * at the point of invocation. We also need to catch it in dvmCallMethod
- * if we want to capture native->native calls made through JNI.
- *
- * Notes to self:
- * - Don't want to switch to VMWAIT while posting events to the debugger.
- * Let the debugger code decide if we need to change state.
- * - We may want to check for debugger-induced thread suspensions on
- * every instruction. That would make a "suspend all" more responsive
- * and reduce the chances of multiple simultaneous events occurring.
- * However, it could change the behavior some.
- *
- * TODO: method entry/exit events are probably less common than location
- * breakpoints. We may be able to speed things up a bit if we don't query
- * the event list unless we know there's at least one lurking within.
- */
-static void updateDebugger(const Method* method, const u2* pc, const u4* fp,
- bool methodEntry, Thread* self)
-{
- int eventFlags = 0;
-
- /*
- * Update xtra.currentPc on every instruction. We need to do this if
- * there's a chance that we could get suspended. This can happen if
- * eventFlags != 0 here, or somebody manually requests a suspend
- * (which gets handled at PERIOD_CHECKS time). One place where this
- * needs to be correct is in dvmAddSingleStep().
- */
- EXPORT_PC();
-
- if (methodEntry)
- eventFlags |= DBG_METHOD_ENTRY;
-
- /*
- * See if we have a breakpoint here.
- *
- * Depending on the "mods" associated with event(s) on this address,
- * we may or may not actually send a message to the debugger.
- */
- if (INST_INST(*pc) == OP_BREAKPOINT) {
- LOGV("+++ breakpoint hit at %p\n", pc);
- eventFlags |= DBG_BREAKPOINT;
- }
-
- /*
- * If the debugger is single-stepping one of our threads, check to
- * see if we're that thread and we've reached a step point.
- */
- const StepControl* pCtrl = &gDvm.stepControl;
- if (pCtrl->active && pCtrl->thread == self) {
- int frameDepth;
- bool doStop = false;
- const char* msg = NULL;
-
- assert(!dvmIsNativeMethod(method));
-
- if (pCtrl->depth == SD_INTO) {
- /*
- * Step into method calls. We break when the line number
- * or method pointer changes. If we're in SS_MIN mode, we
- * always stop.
- */
- if (pCtrl->method != method) {
- doStop = true;
- msg = "new method";
- } else if (pCtrl->size == SS_MIN) {
- doStop = true;
- msg = "new instruction";
- } else if (!dvmAddressSetGet(
- pCtrl->pAddressSet, pc - method->insns)) {
- doStop = true;
- msg = "new line";
- }
- } else if (pCtrl->depth == SD_OVER) {
- /*
- * Step over method calls. We break when the line number is
- * different and the frame depth is <= the original frame
- * depth. (We can't just compare on the method, because we
- * might get unrolled past it by an exception, and it's tricky
- * to identify recursion.)
- */
- frameDepth = dvmComputeVagueFrameDepth(self, fp);
- if (frameDepth < pCtrl->frameDepth) {
- /* popped up one or more frames, always trigger */
- doStop = true;
- msg = "method pop";
- } else if (frameDepth == pCtrl->frameDepth) {
- /* same depth, see if we moved */
- if (pCtrl->size == SS_MIN) {
- doStop = true;
- msg = "new instruction";
- } else if (!dvmAddressSetGet(pCtrl->pAddressSet,
- pc - method->insns)) {
- doStop = true;
- msg = "new line";
- }
- }
- } else {
- assert(pCtrl->depth == SD_OUT);
- /*
- * Return from the current method. We break when the frame
- * depth pops up.
- *
- * This differs from the "method exit" break in that it stops
- * with the PC at the next instruction in the returned-to
- * function, rather than the end of the returning function.
- */
- frameDepth = dvmComputeVagueFrameDepth(self, fp);
- if (frameDepth < pCtrl->frameDepth) {
- doStop = true;
- msg = "method pop";
- }
- }
-
- if (doStop) {
- LOGV("#####S %s\n", msg);
- eventFlags |= DBG_SINGLE_STEP;
- }
- }
-
- /*
- * Check to see if this is a "return" instruction. JDWP says we should
- * send the event *after* the code has been executed, but it also says
- * the location we provide is the last instruction. Since the "return"
- * instruction has no interesting side effects, we should be safe.
- * (We can't just move this down to the returnFromMethod label because
- * we potentially need to combine it with other events.)
- *
- * We're also not supposed to generate a method exit event if the method
- * terminates "with a thrown exception".
- */
- u2 inst = INST_INST(FETCH(0));
- if (inst == OP_RETURN_VOID || inst == OP_RETURN || inst == OP_RETURN_WIDE ||
- inst == OP_RETURN_OBJECT)
- {
- eventFlags |= DBG_METHOD_EXIT;
- }
-
- /*
- * If there's something interesting going on, see if it matches one
- * of the debugger filters.
- */
- if (eventFlags != 0) {
- Object* thisPtr = dvmGetThisPtr(method, fp);
- if (thisPtr != NULL && !dvmIsValidObject(thisPtr)) {
- /*
- * TODO: remove this check if we're confident that the "this"
- * pointer is where it should be -- slows us down, especially
- * during single-step.
- */
- char* desc = dexProtoCopyMethodDescriptor(&method->prototype);
- LOGE("HEY: invalid 'this' ptr %p (%s.%s %s)\n", thisPtr,
- method->clazz->descriptor, method->name, desc);
- free(desc);
- dvmAbort();
- }
- dvmDbgPostLocationEvent(method, pc - method->insns, thisPtr,
- eventFlags);
- }
-}
-
-/*
- * Perform some operations at the "top" of the interpreter loop.
- * This stuff is required to support debugging and profiling.
- *
- * Using" __attribute__((noinline))" seems to do more harm than good. This
- * is best when inlined due to the large number of parameters, most of
- * which are local vars in the main interp loop.
- */
-static void checkDebugAndProf(const u2* pc, const u4* fp, Thread* self,
- const Method* method, bool* pIsMethodEntry)
-{
- /* check to see if we've run off end of method */
- assert(pc >= method->insns && pc <
- method->insns + dvmGetMethodInsnsSize(method));
-
-#if 0
- /*
- * When we hit a specific method, enable verbose instruction logging.
- * Sometimes it's helpful to use the debugger attach as a trigger too.
- */
- if (*pIsMethodEntry) {
- static const char* cd = "Landroid/test/Arithmetic;";
- static const char* mn = "shiftTest2";
- static const char* sg = "()V";
-
- if (/*DEBUGGER_ACTIVE &&*/
- strcmp(method->clazz->descriptor, cd) == 0 &&
- strcmp(method->name, mn) == 0 &&
- strcmp(method->shorty, sg) == 0)
- {
- LOGW("Reached %s.%s, enabling verbose mode\n",
- method->clazz->descriptor, method->name);
- android_setMinPriority(LOG_TAG"i", ANDROID_LOG_VERBOSE);
- dumpRegs(method, fp, true);
- }
-
- if (!DEBUGGER_ACTIVE)
- *pIsMethodEntry = false;
- }
-#endif
-
- /*
- * If the debugger is attached, check for events. If the profiler is
- * enabled, update that too.
- *
- * This code is executed for every instruction we interpret, so for
- * performance we use a couple of #ifdef blocks instead of runtime tests.
- */
- bool isEntry = *pIsMethodEntry;
- if (isEntry) {
- *pIsMethodEntry = false;
- TRACE_METHOD_ENTER(self, method);
- }
- if (DEBUGGER_ACTIVE) {
- updateDebugger(method, pc, fp, isEntry, self);
- }
- if (gDvm.instructionCountEnableCount != 0) {
- /*
- * Count up the #of executed instructions. This isn't synchronized
- * for thread-safety; if we need that we should make this
- * thread-local and merge counts into the global area when threads
- * exit (perhaps suspending all other threads GC-style and pulling
- * the data out of them).
- */
- int inst = *pc & 0xff;
- gDvm.executedInstrCounts[inst]++;
- }
-}
-
-/* File: portable/entry.c */
-/*
- * Main interpreter loop.
- *
- * This was written with an ARM implementation in mind.
- */
-bool INTERP_FUNC_NAME(Thread* self)
-{
-#if defined(EASY_GDB)
- StackSaveArea* debugSaveArea = SAVEAREA_FROM_FP(self->curFrame);
-#endif
-#if INTERP_TYPE == INTERP_DBG
- bool debugIsMethodEntry = false;
- debugIsMethodEntry = self->debugIsMethodEntry;
-#endif
-#if defined(WITH_TRACKREF_CHECKS)
- int debugTrackedRefStart = self->interpSave.debugTrackedRefStart;
-#endif
- DvmDex* methodClassDex; // curMethod->clazz->pDvmDex
- JValue retval;
-
- /* core state */
- const Method* curMethod; // method we're interpreting
- const u2* pc; // program counter
- u4* fp; // frame pointer
- u2 inst; // current instruction
- /* instruction decoding */
- u4 ref; // 16 or 32-bit quantity fetched directly
- u2 vsrc1, vsrc2, vdst; // usually used for register indexes
- /* method call setup */
- const Method* methodToCall;
- bool methodCallRange;
- bool jumboFormat;
-
-
-#if defined(THREADED_INTERP)
- /* static computed goto table */
- DEFINE_GOTO_TABLE(handlerTable);
-#endif
-
-#if defined(WITH_JIT)
-#if 0
- LOGD("*DebugInterp - entrypoint is %d, tgt is 0x%x, %s\n",
- self->entryPoint,
- self->interpSave.pc,
- self->interpSave.method->name);
-#endif
-#if INTERP_TYPE == INTERP_DBG
- const ClassObject* callsiteClass = NULL;
-
-#if defined(WITH_SELF_VERIFICATION)
- if (self->jitState != kJitSelfVerification) {
- self->shadowSpace->jitExitState = kSVSIdle;
- }
-#endif
-
- /* Check to see if we've got a trace selection request. */
- if (
- /*
- * Only perform dvmJitCheckTraceRequest if the entry point is
- * EntryInstr and the jit state is either kJitTSelectRequest or
- * kJitTSelectRequestHot. If debugger/profiler happens to be attached,
- * dvmJitCheckTraceRequest will change the jitState to kJitDone but
- * but stay in the dbg interpreter.
- */
- (self->entryPoint == kInterpEntryInstr) &&
- (self->jitState == kJitTSelectRequest ||
- self->jitState == kJitTSelectRequestHot) &&
- dvmJitCheckTraceRequest(self)) {
- self->nextMode = INTERP_STD;
- //LOGD("Invalid trace request, exiting\n");
- return true;
- }
-#endif /* INTERP_TYPE == INTERP_DBG */
-#endif /* WITH_JIT */
-
- /* copy state in */
- curMethod = self->interpSave.method;
- pc = self->interpSave.pc;
- fp = self->interpSave.fp;
- retval = self->retval; /* only need for kInterpEntryReturn? */
-
- methodClassDex = curMethod->clazz->pDvmDex;
-
- LOGVV("threadid=%d: entry(%s) %s.%s pc=0x%x fp=%p ep=%d\n",
- self->threadId, (self->nextMode == INTERP_STD) ? "STD" : "DBG",
- curMethod->clazz->descriptor, curMethod->name, pc - curMethod->insns,
- fp, self->entryPoint);
-
- /*
- * DEBUG: scramble this to ensure we're not relying on it.
- */
- methodToCall = (const Method*) -1;
-
-#if INTERP_TYPE == INTERP_DBG
- if (debugIsMethodEntry) {
- ILOGD("|-- Now interpreting %s.%s", curMethod->clazz->descriptor,
- curMethod->name);
- DUMP_REGS(curMethod, self->interpSave.fp, false);
- }
-#endif
-
- switch (self->entryPoint) {
- case kInterpEntryInstr:
- /* just fall through to instruction loop or threaded kickstart */
- break;
- case kInterpEntryReturn:
- CHECK_JIT_VOID();
- goto returnFromMethod;
- case kInterpEntryThrow:
- goto exceptionThrown;
- default:
- dvmAbort();
- }
-
-#ifdef THREADED_INTERP
- FINISH(0); /* fetch and execute first instruction */
-#else
- while (1) {
- CHECK_DEBUG_AND_PROF(); /* service debugger and profiling */
- CHECK_TRACKED_REFS(); /* check local reference tracking */
-
- /* fetch the next 16 bits from the instruction stream */
- inst = FETCH(0);
-
- switch (INST_INST(inst)) {
-#endif
-
-/*--- start of opcodes ---*/
-
-/* File: c/OP_NOP.c */
-HANDLE_OPCODE(OP_NOP)
- FINISH(1);
-OP_END
-
-/* File: c/OP_MOVE.c */
-HANDLE_OPCODE(OP_MOVE /*vA, vB*/)
- vdst = INST_A(inst);
- vsrc1 = INST_B(inst);
- ILOGV("|move%s v%d,v%d %s(v%d=0x%08x)",
- (INST_INST(inst) == OP_MOVE) ? "" : "-object", vdst, vsrc1,
- kSpacing, vdst, GET_REGISTER(vsrc1));
- SET_REGISTER(vdst, GET_REGISTER(vsrc1));
- FINISH(1);
-OP_END
-
-/* File: c/OP_MOVE_FROM16.c */
-HANDLE_OPCODE(OP_MOVE_FROM16 /*vAA, vBBBB*/)
- vdst = INST_AA(inst);
- vsrc1 = FETCH(1);
- ILOGV("|move%s/from16 v%d,v%d %s(v%d=0x%08x)",
- (INST_INST(inst) == OP_MOVE_FROM16) ? "" : "-object", vdst, vsrc1,
- kSpacing, vdst, GET_REGISTER(vsrc1));
- SET_REGISTER(vdst, GET_REGISTER(vsrc1));
- FINISH(2);
-OP_END
-
-/* File: c/OP_MOVE_16.c */
-HANDLE_OPCODE(OP_MOVE_16 /*vAAAA, vBBBB*/)
- vdst = FETCH(1);
- vsrc1 = FETCH(2);
- ILOGV("|move%s/16 v%d,v%d %s(v%d=0x%08x)",
- (INST_INST(inst) == OP_MOVE_16) ? "" : "-object", vdst, vsrc1,
- kSpacing, vdst, GET_REGISTER(vsrc1));
- SET_REGISTER(vdst, GET_REGISTER(vsrc1));
- FINISH(3);
-OP_END
-
-/* File: c/OP_MOVE_WIDE.c */
-HANDLE_OPCODE(OP_MOVE_WIDE /*vA, vB*/)
- /* IMPORTANT: must correctly handle overlapping registers, e.g. both
- * "move-wide v6, v7" and "move-wide v7, v6" */
- vdst = INST_A(inst);
- vsrc1 = INST_B(inst);
- ILOGV("|move-wide v%d,v%d %s(v%d=0x%08llx)", vdst, vsrc1,
- kSpacing+5, vdst, GET_REGISTER_WIDE(vsrc1));
- SET_REGISTER_WIDE(vdst, GET_REGISTER_WIDE(vsrc1));
- FINISH(1);
-OP_END
-
-/* File: c/OP_MOVE_WIDE_FROM16.c */
-HANDLE_OPCODE(OP_MOVE_WIDE_FROM16 /*vAA, vBBBB*/)
- vdst = INST_AA(inst);
- vsrc1 = FETCH(1);
- ILOGV("|move-wide/from16 v%d,v%d (v%d=0x%08llx)", vdst, vsrc1,
- vdst, GET_REGISTER_WIDE(vsrc1));
- SET_REGISTER_WIDE(vdst, GET_REGISTER_WIDE(vsrc1));
- FINISH(2);
-OP_END
-
-/* File: c/OP_MOVE_WIDE_16.c */
-HANDLE_OPCODE(OP_MOVE_WIDE_16 /*vAAAA, vBBBB*/)
- vdst = FETCH(1);
- vsrc1 = FETCH(2);
- ILOGV("|move-wide/16 v%d,v%d %s(v%d=0x%08llx)", vdst, vsrc1,
- kSpacing+8, vdst, GET_REGISTER_WIDE(vsrc1));
- SET_REGISTER_WIDE(vdst, GET_REGISTER_WIDE(vsrc1));
- FINISH(3);
-OP_END
-
-/* File: c/OP_MOVE_OBJECT.c */
-/* File: c/OP_MOVE.c */
-HANDLE_OPCODE(OP_MOVE_OBJECT /*vA, vB*/)
- vdst = INST_A(inst);
- vsrc1 = INST_B(inst);
- ILOGV("|move%s v%d,v%d %s(v%d=0x%08x)",
- (INST_INST(inst) == OP_MOVE) ? "" : "-object", vdst, vsrc1,
- kSpacing, vdst, GET_REGISTER(vsrc1));
- SET_REGISTER(vdst, GET_REGISTER(vsrc1));
- FINISH(1);
-OP_END
-
-
-/* File: c/OP_MOVE_OBJECT_FROM16.c */
-/* File: c/OP_MOVE_FROM16.c */
-HANDLE_OPCODE(OP_MOVE_OBJECT_FROM16 /*vAA, vBBBB*/)
- vdst = INST_AA(inst);
- vsrc1 = FETCH(1);
- ILOGV("|move%s/from16 v%d,v%d %s(v%d=0x%08x)",
- (INST_INST(inst) == OP_MOVE_FROM16) ? "" : "-object", vdst, vsrc1,
- kSpacing, vdst, GET_REGISTER(vsrc1));
- SET_REGISTER(vdst, GET_REGISTER(vsrc1));
- FINISH(2);
-OP_END
-
-
-/* File: c/OP_MOVE_OBJECT_16.c */
-/* File: c/OP_MOVE_16.c */
-HANDLE_OPCODE(OP_MOVE_OBJECT_16 /*vAAAA, vBBBB*/)
- vdst = FETCH(1);
- vsrc1 = FETCH(2);
- ILOGV("|move%s/16 v%d,v%d %s(v%d=0x%08x)",
- (INST_INST(inst) == OP_MOVE_16) ? "" : "-object", vdst, vsrc1,
- kSpacing, vdst, GET_REGISTER(vsrc1));
- SET_REGISTER(vdst, GET_REGISTER(vsrc1));
- FINISH(3);
-OP_END
-
-
-/* File: c/OP_MOVE_RESULT.c */
-HANDLE_OPCODE(OP_MOVE_RESULT /*vAA*/)
- vdst = INST_AA(inst);
- ILOGV("|move-result%s v%d %s(v%d=0x%08x)",
- (INST_INST(inst) == OP_MOVE_RESULT) ? "" : "-object",
- vdst, kSpacing+4, vdst,retval.i);
- SET_REGISTER(vdst, retval.i);
- FINISH(1);
-OP_END
-
-/* File: c/OP_MOVE_RESULT_WIDE.c */
-HANDLE_OPCODE(OP_MOVE_RESULT_WIDE /*vAA*/)
- vdst = INST_AA(inst);
- ILOGV("|move-result-wide v%d %s(0x%08llx)", vdst, kSpacing, retval.j);
- SET_REGISTER_WIDE(vdst, retval.j);
- FINISH(1);
-OP_END
-
-/* File: c/OP_MOVE_RESULT_OBJECT.c */
-/* File: c/OP_MOVE_RESULT.c */
-HANDLE_OPCODE(OP_MOVE_RESULT_OBJECT /*vAA*/)
- vdst = INST_AA(inst);
- ILOGV("|move-result%s v%d %s(v%d=0x%08x)",
- (INST_INST(inst) == OP_MOVE_RESULT) ? "" : "-object",
- vdst, kSpacing+4, vdst,retval.i);
- SET_REGISTER(vdst, retval.i);
- FINISH(1);
-OP_END
-
-
-/* File: c/OP_MOVE_EXCEPTION.c */
-HANDLE_OPCODE(OP_MOVE_EXCEPTION /*vAA*/)
- vdst = INST_AA(inst);
- ILOGV("|move-exception v%d", vdst);
- assert(self->exception != NULL);
- SET_REGISTER(vdst, (u4)self->exception);
- dvmClearException(self);
- FINISH(1);
-OP_END
-
-/* File: c/OP_RETURN_VOID.c */
-HANDLE_OPCODE(OP_RETURN_VOID /**/)
- ILOGV("|return-void");
-#ifndef NDEBUG
- retval.j = 0xababababULL; // placate valgrind
-#endif
- GOTO_returnFromMethod();
-OP_END
-
-/* File: c/OP_RETURN.c */
-HANDLE_OPCODE(OP_RETURN /*vAA*/)
- vsrc1 = INST_AA(inst);
- ILOGV("|return%s v%d",
- (INST_INST(inst) == OP_RETURN) ? "" : "-object", vsrc1);
- retval.i = GET_REGISTER(vsrc1);
- GOTO_returnFromMethod();
-OP_END
-
-/* File: c/OP_RETURN_WIDE.c */
-HANDLE_OPCODE(OP_RETURN_WIDE /*vAA*/)
- vsrc1 = INST_AA(inst);
- ILOGV("|return-wide v%d", vsrc1);
- retval.j = GET_REGISTER_WIDE(vsrc1);
- GOTO_returnFromMethod();
-OP_END
-
-/* File: c/OP_RETURN_OBJECT.c */
-/* File: c/OP_RETURN.c */
-HANDLE_OPCODE(OP_RETURN_OBJECT /*vAA*/)
- vsrc1 = INST_AA(inst);
- ILOGV("|return%s v%d",
- (INST_INST(inst) == OP_RETURN) ? "" : "-object", vsrc1);
- retval.i = GET_REGISTER(vsrc1);
- GOTO_returnFromMethod();
-OP_END
-
-
-/* File: c/OP_CONST_4.c */
-HANDLE_OPCODE(OP_CONST_4 /*vA, #+B*/)
- {
- s4 tmp;
-
- vdst = INST_A(inst);
- tmp = (s4) (INST_B(inst) << 28) >> 28; // sign extend 4-bit value
- ILOGV("|const/4 v%d,#0x%02x", vdst, (s4)tmp);
- SET_REGISTER(vdst, tmp);
- }
- FINISH(1);
-OP_END
-
-/* File: c/OP_CONST_16.c */
-HANDLE_OPCODE(OP_CONST_16 /*vAA, #+BBBB*/)
- vdst = INST_AA(inst);
- vsrc1 = FETCH(1);
- ILOGV("|const/16 v%d,#0x%04x", vdst, (s2)vsrc1);
- SET_REGISTER(vdst, (s2) vsrc1);
- FINISH(2);
-OP_END
-
-/* File: c/OP_CONST.c */
-HANDLE_OPCODE(OP_CONST /*vAA, #+BBBBBBBB*/)
- {
- u4 tmp;
-
- vdst = INST_AA(inst);
- tmp = FETCH(1);
- tmp |= (u4)FETCH(2) << 16;
- ILOGV("|const v%d,#0x%08x", vdst, tmp);
- SET_REGISTER(vdst, tmp);
- }
- FINISH(3);
-OP_END
-
-/* File: c/OP_CONST_HIGH16.c */
-HANDLE_OPCODE(OP_CONST_HIGH16 /*vAA, #+BBBB0000*/)
- vdst = INST_AA(inst);
- vsrc1 = FETCH(1);
- ILOGV("|const/high16 v%d,#0x%04x0000", vdst, vsrc1);
- SET_REGISTER(vdst, vsrc1 << 16);
- FINISH(2);
-OP_END
-
-/* File: c/OP_CONST_WIDE_16.c */
-HANDLE_OPCODE(OP_CONST_WIDE_16 /*vAA, #+BBBB*/)
- vdst = INST_AA(inst);
- vsrc1 = FETCH(1);
- ILOGV("|const-wide/16 v%d,#0x%04x", vdst, (s2)vsrc1);
- SET_REGISTER_WIDE(vdst, (s2)vsrc1);
- FINISH(2);
-OP_END
-
-/* File: c/OP_CONST_WIDE_32.c */
-HANDLE_OPCODE(OP_CONST_WIDE_32 /*vAA, #+BBBBBBBB*/)
- {
- u4 tmp;
-
- vdst = INST_AA(inst);
- tmp = FETCH(1);
- tmp |= (u4)FETCH(2) << 16;
- ILOGV("|const-wide/32 v%d,#0x%08x", vdst, tmp);
- SET_REGISTER_WIDE(vdst, (s4) tmp);
- }
- FINISH(3);
-OP_END
-
-/* File: c/OP_CONST_WIDE.c */
-HANDLE_OPCODE(OP_CONST_WIDE /*vAA, #+BBBBBBBBBBBBBBBB*/)
- {
- u8 tmp;
-
- vdst = INST_AA(inst);
- tmp = FETCH(1);
- tmp |= (u8)FETCH(2) << 16;
- tmp |= (u8)FETCH(3) << 32;
- tmp |= (u8)FETCH(4) << 48;
- ILOGV("|const-wide v%d,#0x%08llx", vdst, tmp);
- SET_REGISTER_WIDE(vdst, tmp);
- }
- FINISH(5);
-OP_END
-
-/* File: c/OP_CONST_WIDE_HIGH16.c */
-HANDLE_OPCODE(OP_CONST_WIDE_HIGH16 /*vAA, #+BBBB000000000000*/)
- vdst = INST_AA(inst);
- vsrc1 = FETCH(1);
- ILOGV("|const-wide/high16 v%d,#0x%04x000000000000", vdst, vsrc1);
- SET_REGISTER_WIDE(vdst, ((u8) vsrc1) << 48);
- FINISH(2);
-OP_END
-
-/* File: c/OP_CONST_STRING.c */
-HANDLE_OPCODE(OP_CONST_STRING /*vAA, string@BBBB*/)
- {
- StringObject* strObj;
-
- vdst = INST_AA(inst);
- ref = FETCH(1);
- ILOGV("|const-string v%d string@0x%04x", vdst, ref);
- strObj = dvmDexGetResolvedString(methodClassDex, ref);
- if (strObj == NULL) {
- EXPORT_PC();
- strObj = dvmResolveString(curMethod->clazz, ref);
- if (strObj == NULL)
- GOTO_exceptionThrown();
- }
- SET_REGISTER(vdst, (u4) strObj);
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_CONST_STRING_JUMBO.c */
-HANDLE_OPCODE(OP_CONST_STRING_JUMBO /*vAA, string@BBBBBBBB*/)
- {
- StringObject* strObj;
- u4 tmp;
-
- vdst = INST_AA(inst);
- tmp = FETCH(1);
- tmp |= (u4)FETCH(2) << 16;
- ILOGV("|const-string/jumbo v%d string@0x%08x", vdst, tmp);
- strObj = dvmDexGetResolvedString(methodClassDex, tmp);
- if (strObj == NULL) {
- EXPORT_PC();
- strObj = dvmResolveString(curMethod->clazz, tmp);
- if (strObj == NULL)
- GOTO_exceptionThrown();
- }
- SET_REGISTER(vdst, (u4) strObj);
- }
- FINISH(3);
-OP_END
-
-/* File: c/OP_CONST_CLASS.c */
-HANDLE_OPCODE(OP_CONST_CLASS /*vAA, class@BBBB*/)
- {
- ClassObject* clazz;
-
- vdst = INST_AA(inst);
- ref = FETCH(1);
- ILOGV("|const-class v%d class@0x%04x", vdst, ref);
- clazz = dvmDexGetResolvedClass(methodClassDex, ref);
- if (clazz == NULL) {
- EXPORT_PC();
- clazz = dvmResolveClass(curMethod->clazz, ref, true);
- if (clazz == NULL)
- GOTO_exceptionThrown();
- }
- SET_REGISTER(vdst, (u4) clazz);
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_MONITOR_ENTER.c */
-HANDLE_OPCODE(OP_MONITOR_ENTER /*vAA*/)
- {
- Object* obj;
-
- vsrc1 = INST_AA(inst);
- ILOGV("|monitor-enter v%d %s(0x%08x)",
- vsrc1, kSpacing+6, GET_REGISTER(vsrc1));
- obj = (Object*)GET_REGISTER(vsrc1);
- if (!checkForNullExportPC(obj, fp, pc))
- GOTO_exceptionThrown();
- ILOGV("+ locking %p %s\n", obj, obj->clazz->descriptor);
- EXPORT_PC(); /* need for precise GC */
- dvmLockObject(self, obj);
- }
- FINISH(1);
-OP_END
-
-/* File: c/OP_MONITOR_EXIT.c */
-HANDLE_OPCODE(OP_MONITOR_EXIT /*vAA*/)
- {
- Object* obj;
-
- EXPORT_PC();
-
- vsrc1 = INST_AA(inst);
- ILOGV("|monitor-exit v%d %s(0x%08x)",
- vsrc1, kSpacing+5, GET_REGISTER(vsrc1));
- obj = (Object*)GET_REGISTER(vsrc1);
- if (!checkForNull(obj)) {
- /*
- * The exception needs to be processed at the *following*
- * instruction, not the current instruction (see the Dalvik
- * spec). Because we're jumping to an exception handler,
- * we're not actually at risk of skipping an instruction
- * by doing so.
- */
- ADJUST_PC(1); /* monitor-exit width is 1 */
- GOTO_exceptionThrown();
- }
- ILOGV("+ unlocking %p %s\n", obj, obj->clazz->descriptor);
- if (!dvmUnlockObject(self, obj)) {
- assert(dvmCheckException(self));
- ADJUST_PC(1);
- GOTO_exceptionThrown();
- }
- }
- FINISH(1);
-OP_END
-
-/* File: c/OP_CHECK_CAST.c */
-HANDLE_OPCODE(OP_CHECK_CAST /*vAA, class@BBBB*/)
- {
- ClassObject* clazz;
- Object* obj;
-
- EXPORT_PC();
-
- vsrc1 = INST_AA(inst);
- ref = FETCH(1); /* class to check against */
- ILOGV("|check-cast v%d,class@0x%04x", vsrc1, ref);
-
- obj = (Object*)GET_REGISTER(vsrc1);
- if (obj != NULL) {
-#if defined(WITH_EXTRA_OBJECT_VALIDATION)
- if (!checkForNull(obj))
- GOTO_exceptionThrown();
-#endif
- clazz = dvmDexGetResolvedClass(methodClassDex, ref);
- if (clazz == NULL) {
- clazz = dvmResolveClass(curMethod->clazz, ref, false);
- if (clazz == NULL)
- GOTO_exceptionThrown();
- }
- if (!dvmInstanceof(obj->clazz, clazz)) {
- dvmThrowClassCastException(obj->clazz, clazz);
- GOTO_exceptionThrown();
- }
- }
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_INSTANCE_OF.c */
-HANDLE_OPCODE(OP_INSTANCE_OF /*vA, vB, class@CCCC*/)
- {
- ClassObject* clazz;
- Object* obj;
-
- vdst = INST_A(inst);
- vsrc1 = INST_B(inst); /* object to check */
- ref = FETCH(1); /* class to check against */
- ILOGV("|instance-of v%d,v%d,class@0x%04x", vdst, vsrc1, ref);
-
- obj = (Object*)GET_REGISTER(vsrc1);
- if (obj == NULL) {
- SET_REGISTER(vdst, 0);
- } else {
-#if defined(WITH_EXTRA_OBJECT_VALIDATION)
- if (!checkForNullExportPC(obj, fp, pc))
- GOTO_exceptionThrown();
-#endif
- clazz = dvmDexGetResolvedClass(methodClassDex, ref);
- if (clazz == NULL) {
- EXPORT_PC();
- clazz = dvmResolveClass(curMethod->clazz, ref, true);
- if (clazz == NULL)
- GOTO_exceptionThrown();
- }
- SET_REGISTER(vdst, dvmInstanceof(obj->clazz, clazz));
- }
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_ARRAY_LENGTH.c */
-HANDLE_OPCODE(OP_ARRAY_LENGTH /*vA, vB*/)
- {
- ArrayObject* arrayObj;
-
- vdst = INST_A(inst);
- vsrc1 = INST_B(inst);
- arrayObj = (ArrayObject*) GET_REGISTER(vsrc1);
- ILOGV("|array-length v%d,v%d (%p)", vdst, vsrc1, arrayObj);
- if (!checkForNullExportPC((Object*) arrayObj, fp, pc))
- GOTO_exceptionThrown();
- /* verifier guarantees this is an array reference */
- SET_REGISTER(vdst, arrayObj->length);
- }
- FINISH(1);
-OP_END
-
-/* File: c/OP_NEW_INSTANCE.c */
-HANDLE_OPCODE(OP_NEW_INSTANCE /*vAA, class@BBBB*/)
- {
- ClassObject* clazz;
- Object* newObj;
-
- EXPORT_PC();
-
- vdst = INST_AA(inst);
- ref = FETCH(1);
- ILOGV("|new-instance v%d,class@0x%04x", vdst, ref);
- clazz = dvmDexGetResolvedClass(methodClassDex, ref);
- if (clazz == NULL) {
- clazz = dvmResolveClass(curMethod->clazz, ref, false);
- if (clazz == NULL)
- GOTO_exceptionThrown();
- }
-
- if (!dvmIsClassInitialized(clazz) && !dvmInitClass(clazz))
- GOTO_exceptionThrown();
-
- /*
- * The JIT needs dvmDexGetResolvedClass() to return non-null.
- * Since we use the portable interpreter to build the trace, this extra
- * check is not needed for mterp.
- */
- if (!dvmDexGetResolvedClass(methodClassDex, ref)) {
- /* Class initialization is still ongoing - end the trace */
- END_JIT_TSELECT();
- }
-
- /*
- * Verifier now tests for interface/abstract class.
- */
- //if (dvmIsInterfaceClass(clazz) || dvmIsAbstractClass(clazz)) {
- // dvmThrowExceptionWithClassMessage(gDvm.exInstantiationError,
- // clazz->descriptor);
- // GOTO_exceptionThrown();
- //}
- newObj = dvmAllocObject(clazz, ALLOC_DONT_TRACK);
- if (newObj == NULL)
- GOTO_exceptionThrown();
- SET_REGISTER(vdst, (u4) newObj);
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_NEW_ARRAY.c */
-HANDLE_OPCODE(OP_NEW_ARRAY /*vA, vB, class@CCCC*/)
- {
- ClassObject* arrayClass;
- ArrayObject* newArray;
- s4 length;
-
- EXPORT_PC();
-
- vdst = INST_A(inst);
- vsrc1 = INST_B(inst); /* length reg */
- ref = FETCH(1);
- ILOGV("|new-array v%d,v%d,class@0x%04x (%d elements)",
- vdst, vsrc1, ref, (s4) GET_REGISTER(vsrc1));
- length = (s4) GET_REGISTER(vsrc1);
- if (length < 0) {
- dvmThrowNegativeArraySizeException(length);
- GOTO_exceptionThrown();
- }
- arrayClass = dvmDexGetResolvedClass(methodClassDex, ref);
- if (arrayClass == NULL) {
- arrayClass = dvmResolveClass(curMethod->clazz, ref, false);
- if (arrayClass == NULL)
- GOTO_exceptionThrown();
- }
- /* verifier guarantees this is an array class */
- assert(dvmIsArrayClass(arrayClass));
- assert(dvmIsClassInitialized(arrayClass));
-
- newArray = dvmAllocArrayByClass(arrayClass, length, ALLOC_DONT_TRACK);
- if (newArray == NULL)
- GOTO_exceptionThrown();
- SET_REGISTER(vdst, (u4) newArray);
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_FILLED_NEW_ARRAY.c */
-HANDLE_OPCODE(OP_FILLED_NEW_ARRAY /*vB, {vD, vE, vF, vG, vA}, class@CCCC*/)
- GOTO_invoke(filledNewArray, false, false);
-OP_END
-
-/* File: c/OP_FILLED_NEW_ARRAY_RANGE.c */
-HANDLE_OPCODE(OP_FILLED_NEW_ARRAY_RANGE /*{vCCCC..v(CCCC+AA-1)}, class@BBBB*/)
- GOTO_invoke(filledNewArray, true, false);
-OP_END
-
-/* File: c/OP_FILL_ARRAY_DATA.c */
-HANDLE_OPCODE(OP_FILL_ARRAY_DATA) /*vAA, +BBBBBBBB*/
- {
- const u2* arrayData;
- s4 offset;
- ArrayObject* arrayObj;
-
- EXPORT_PC();
- vsrc1 = INST_AA(inst);
- offset = FETCH(1) | (((s4) FETCH(2)) << 16);
- ILOGV("|fill-array-data v%d +0x%04x", vsrc1, offset);
- arrayData = pc + offset; // offset in 16-bit units
-#ifndef NDEBUG
- if (arrayData < curMethod->insns ||
- arrayData >= curMethod->insns + dvmGetMethodInsnsSize(curMethod))
- {
- /* should have been caught in verifier */
- dvmThrowInternalError("bad fill array data");
- GOTO_exceptionThrown();
- }
-#endif
- arrayObj = (ArrayObject*) GET_REGISTER(vsrc1);
- if (!dvmInterpHandleFillArrayData(arrayObj, arrayData)) {
- GOTO_exceptionThrown();
- }
- FINISH(3);
- }
-OP_END
-
-/* File: c/OP_THROW.c */
-HANDLE_OPCODE(OP_THROW /*vAA*/)
- {
- Object* obj;
-
- /*
- * We don't create an exception here, but the process of searching
- * for a catch block can do class lookups and throw exceptions.
- * We need to update the saved PC.
- */
- EXPORT_PC();
-
- vsrc1 = INST_AA(inst);
- ILOGV("|throw v%d (%p)", vsrc1, (void*)GET_REGISTER(vsrc1));
- obj = (Object*) GET_REGISTER(vsrc1);
- if (!checkForNull(obj)) {
- /* will throw a null pointer exception */
- LOGVV("Bad exception\n");
- } else {
- /* use the requested exception */
- dvmSetException(self, obj);
- }
- GOTO_exceptionThrown();
- }
-OP_END
-
-/* File: c/OP_GOTO.c */
-HANDLE_OPCODE(OP_GOTO /*+AA*/)
- vdst = INST_AA(inst);
- if ((s1)vdst < 0)
- ILOGV("|goto -0x%02x", -((s1)vdst));
- else
- ILOGV("|goto +0x%02x", ((s1)vdst));
- ILOGV("> branch taken");
- if ((s1)vdst < 0)
- PERIODIC_CHECKS(kInterpEntryInstr, (s1)vdst);
- FINISH((s1)vdst);
-OP_END
-
-/* File: c/OP_GOTO_16.c */
-HANDLE_OPCODE(OP_GOTO_16 /*+AAAA*/)
- {
- s4 offset = (s2) FETCH(1); /* sign-extend next code unit */
-
- if (offset < 0)
- ILOGV("|goto/16 -0x%04x", -offset);
- else
- ILOGV("|goto/16 +0x%04x", offset);
- ILOGV("> branch taken");
- if (offset < 0)
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
- FINISH(offset);
- }
-OP_END
-
-/* File: c/OP_GOTO_32.c */
-HANDLE_OPCODE(OP_GOTO_32 /*+AAAAAAAA*/)
- {
- s4 offset = FETCH(1); /* low-order 16 bits */
- offset |= ((s4) FETCH(2)) << 16; /* high-order 16 bits */
-
- if (offset < 0)
- ILOGV("|goto/32 -0x%08x", -offset);
- else
- ILOGV("|goto/32 +0x%08x", offset);
- ILOGV("> branch taken");
- if (offset <= 0) /* allowed to branch to self */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
- FINISH(offset);
- }
-OP_END
-
-/* File: c/OP_PACKED_SWITCH.c */
-HANDLE_OPCODE(OP_PACKED_SWITCH /*vAA, +BBBB*/)
- {
- const u2* switchData;
- u4 testVal;
- s4 offset;
-
- vsrc1 = INST_AA(inst);
- offset = FETCH(1) | (((s4) FETCH(2)) << 16);
- ILOGV("|packed-switch v%d +0x%04x", vsrc1, vsrc2);
- switchData = pc + offset; // offset in 16-bit units
-#ifndef NDEBUG
- if (switchData < curMethod->insns ||
- switchData >= curMethod->insns + dvmGetMethodInsnsSize(curMethod))
- {
- /* should have been caught in verifier */
- EXPORT_PC();
- dvmThrowInternalError("bad packed switch");
- GOTO_exceptionThrown();
- }
-#endif
- testVal = GET_REGISTER(vsrc1);
-
- offset = dvmInterpHandlePackedSwitch(switchData, testVal);
- ILOGV("> branch taken (0x%04x)\n", offset);
- if (offset <= 0) /* uncommon */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
- FINISH(offset);
- }
-OP_END
-
-/* File: c/OP_SPARSE_SWITCH.c */
-HANDLE_OPCODE(OP_SPARSE_SWITCH /*vAA, +BBBB*/)
- {
- const u2* switchData;
- u4 testVal;
- s4 offset;
-
- vsrc1 = INST_AA(inst);
- offset = FETCH(1) | (((s4) FETCH(2)) << 16);
- ILOGV("|sparse-switch v%d +0x%04x", vsrc1, vsrc2);
- switchData = pc + offset; // offset in 16-bit units
-#ifndef NDEBUG
- if (switchData < curMethod->insns ||
- switchData >= curMethod->insns + dvmGetMethodInsnsSize(curMethod))
- {
- /* should have been caught in verifier */
- EXPORT_PC();
- dvmThrowInternalError("bad sparse switch");
- GOTO_exceptionThrown();
- }
-#endif
- testVal = GET_REGISTER(vsrc1);
-
- offset = dvmInterpHandleSparseSwitch(switchData, testVal);
- ILOGV("> branch taken (0x%04x)\n", offset);
- if (offset <= 0) /* uncommon */
- PERIODIC_CHECKS(kInterpEntryInstr, offset);
- FINISH(offset);
- }
-OP_END
-
-/* File: c/OP_CMPL_FLOAT.c */
-HANDLE_OP_CMPX(OP_CMPL_FLOAT, "l-float", float, _FLOAT, -1)
-OP_END
-
-/* File: c/OP_CMPG_FLOAT.c */
-HANDLE_OP_CMPX(OP_CMPG_FLOAT, "g-float", float, _FLOAT, 1)
-OP_END
-
-/* File: c/OP_CMPL_DOUBLE.c */
-HANDLE_OP_CMPX(OP_CMPL_DOUBLE, "l-double", double, _DOUBLE, -1)
-OP_END
-
-/* File: c/OP_CMPG_DOUBLE.c */
-HANDLE_OP_CMPX(OP_CMPG_DOUBLE, "g-double", double, _DOUBLE, 1)
-OP_END
-
-/* File: c/OP_CMP_LONG.c */
-HANDLE_OP_CMPX(OP_CMP_LONG, "-long", s8, _WIDE, 0)
-OP_END
-
-/* File: c/OP_IF_EQ.c */
-HANDLE_OP_IF_XX(OP_IF_EQ, "eq", ==)
-OP_END
-
-/* File: c/OP_IF_NE.c */
-HANDLE_OP_IF_XX(OP_IF_NE, "ne", !=)
-OP_END
-
-/* File: c/OP_IF_LT.c */
-HANDLE_OP_IF_XX(OP_IF_LT, "lt", <)
-OP_END
-
-/* File: c/OP_IF_GE.c */
-HANDLE_OP_IF_XX(OP_IF_GE, "ge", >=)
-OP_END
-
-/* File: c/OP_IF_GT.c */
-HANDLE_OP_IF_XX(OP_IF_GT, "gt", >)
-OP_END
-
-/* File: c/OP_IF_LE.c */
-HANDLE_OP_IF_XX(OP_IF_LE, "le", <=)
-OP_END
-
-/* File: c/OP_IF_EQZ.c */
-HANDLE_OP_IF_XXZ(OP_IF_EQZ, "eqz", ==)
-OP_END
-
-/* File: c/OP_IF_NEZ.c */
-HANDLE_OP_IF_XXZ(OP_IF_NEZ, "nez", !=)
-OP_END
-
-/* File: c/OP_IF_LTZ.c */
-HANDLE_OP_IF_XXZ(OP_IF_LTZ, "ltz", <)
-OP_END
-
-/* File: c/OP_IF_GEZ.c */
-HANDLE_OP_IF_XXZ(OP_IF_GEZ, "gez", >=)
-OP_END
-
-/* File: c/OP_IF_GTZ.c */
-HANDLE_OP_IF_XXZ(OP_IF_GTZ, "gtz", >)
-OP_END
-
-/* File: c/OP_IF_LEZ.c */
-HANDLE_OP_IF_XXZ(OP_IF_LEZ, "lez", <=)
-OP_END
-
-/* File: c/OP_UNUSED_3E.c */
-HANDLE_OPCODE(OP_UNUSED_3E)
-OP_END
-
-/* File: c/OP_UNUSED_3F.c */
-HANDLE_OPCODE(OP_UNUSED_3F)
-OP_END
-
-/* File: c/OP_UNUSED_40.c */
-HANDLE_OPCODE(OP_UNUSED_40)
-OP_END
-
-/* File: c/OP_UNUSED_41.c */
-HANDLE_OPCODE(OP_UNUSED_41)
-OP_END
-
-/* File: c/OP_UNUSED_42.c */
-HANDLE_OPCODE(OP_UNUSED_42)
-OP_END
-
-/* File: c/OP_UNUSED_43.c */
-HANDLE_OPCODE(OP_UNUSED_43)
-OP_END
-
-/* File: c/OP_AGET.c */
-HANDLE_OP_AGET(OP_AGET, "", u4, )
-OP_END
-
-/* File: c/OP_AGET_WIDE.c */
-HANDLE_OP_AGET(OP_AGET_WIDE, "-wide", s8, _WIDE)
-OP_END
-
-/* File: c/OP_AGET_OBJECT.c */
-HANDLE_OP_AGET(OP_AGET_OBJECT, "-object", u4, )
-OP_END
-
-/* File: c/OP_AGET_BOOLEAN.c */
-HANDLE_OP_AGET(OP_AGET_BOOLEAN, "-boolean", u1, )
-OP_END
-
-/* File: c/OP_AGET_BYTE.c */
-HANDLE_OP_AGET(OP_AGET_BYTE, "-byte", s1, )
-OP_END
-
-/* File: c/OP_AGET_CHAR.c */
-HANDLE_OP_AGET(OP_AGET_CHAR, "-char", u2, )
-OP_END
-
-/* File: c/OP_AGET_SHORT.c */
-HANDLE_OP_AGET(OP_AGET_SHORT, "-short", s2, )
-OP_END
-
-/* File: c/OP_APUT.c */
-HANDLE_OP_APUT(OP_APUT, "", u4, )
-OP_END
-
-/* File: c/OP_APUT_WIDE.c */
-HANDLE_OP_APUT(OP_APUT_WIDE, "-wide", s8, _WIDE)
-OP_END
-
-/* File: c/OP_APUT_OBJECT.c */
-HANDLE_OPCODE(OP_APUT_OBJECT /*vAA, vBB, vCC*/)
- {
- ArrayObject* arrayObj;
- Object* obj;
- u2 arrayInfo;
- EXPORT_PC();
- vdst = INST_AA(inst); /* AA: source value */
- arrayInfo = FETCH(1);
- vsrc1 = arrayInfo & 0xff; /* BB: array ptr */
- vsrc2 = arrayInfo >> 8; /* CC: index */
- ILOGV("|aput%s v%d,v%d,v%d", "-object", vdst, vsrc1, vsrc2);
- arrayObj = (ArrayObject*) GET_REGISTER(vsrc1);
- if (!checkForNull((Object*) arrayObj))
- GOTO_exceptionThrown();
- if (GET_REGISTER(vsrc2) >= arrayObj->length) {
- dvmThrowArrayIndexOutOfBoundsException(
- arrayObj->length, GET_REGISTER(vsrc2));
- GOTO_exceptionThrown();
- }
- obj = (Object*) GET_REGISTER(vdst);
- if (obj != NULL) {
- if (!checkForNull(obj))
- GOTO_exceptionThrown();
- if (!dvmCanPutArrayElement(obj->clazz, arrayObj->obj.clazz)) {
- LOGV("Can't put a '%s'(%p) into array type='%s'(%p)\n",
- obj->clazz->descriptor, obj,
- arrayObj->obj.clazz->descriptor, arrayObj);
- dvmThrowArrayStoreExceptionIncompatibleElement(obj->clazz, arrayObj->obj.clazz);
- GOTO_exceptionThrown();
- }
- }
- ILOGV("+ APUT[%d]=0x%08x", GET_REGISTER(vsrc2), GET_REGISTER(vdst));
- dvmSetObjectArrayElement(arrayObj,
- GET_REGISTER(vsrc2),
- (Object *)GET_REGISTER(vdst));
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_APUT_BOOLEAN.c */
-HANDLE_OP_APUT(OP_APUT_BOOLEAN, "-boolean", u1, )
-OP_END
-
-/* File: c/OP_APUT_BYTE.c */
-HANDLE_OP_APUT(OP_APUT_BYTE, "-byte", s1, )
-OP_END
-
-/* File: c/OP_APUT_CHAR.c */
-HANDLE_OP_APUT(OP_APUT_CHAR, "-char", u2, )
-OP_END
-
-/* File: c/OP_APUT_SHORT.c */
-HANDLE_OP_APUT(OP_APUT_SHORT, "-short", s2, )
-OP_END
-
-/* File: c/OP_IGET.c */
-HANDLE_IGET_X(OP_IGET, "", Int, )
-OP_END
-
-/* File: c/OP_IGET_WIDE.c */
-HANDLE_IGET_X(OP_IGET_WIDE, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_IGET_OBJECT.c */
-HANDLE_IGET_X(OP_IGET_OBJECT, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_IGET_BOOLEAN.c */
-HANDLE_IGET_X(OP_IGET_BOOLEAN, "", Int, )
-OP_END
-
-/* File: c/OP_IGET_BYTE.c */
-HANDLE_IGET_X(OP_IGET_BYTE, "", Int, )
-OP_END
-
-/* File: c/OP_IGET_CHAR.c */
-HANDLE_IGET_X(OP_IGET_CHAR, "", Int, )
-OP_END
-
-/* File: c/OP_IGET_SHORT.c */
-HANDLE_IGET_X(OP_IGET_SHORT, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT.c */
-HANDLE_IPUT_X(OP_IPUT, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_WIDE.c */
-HANDLE_IPUT_X(OP_IPUT_WIDE, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_IPUT_OBJECT.c */
-/*
- * The VM spec says we should verify that the reference being stored into
- * the field is assignment compatible. In practice, many popular VMs don't
- * do this because it slows down a very common operation. It's not so bad
- * for us, since "dexopt" quickens it whenever possible, but it's still an
- * issue.
- *
- * To make this spec-complaint, we'd need to add a ClassObject pointer to
- * the Field struct, resolve the field's type descriptor at link or class
- * init time, and then verify the type here.
- */
-HANDLE_IPUT_X(OP_IPUT_OBJECT, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_IPUT_BOOLEAN.c */
-HANDLE_IPUT_X(OP_IPUT_BOOLEAN, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_BYTE.c */
-HANDLE_IPUT_X(OP_IPUT_BYTE, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_CHAR.c */
-HANDLE_IPUT_X(OP_IPUT_CHAR, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_SHORT.c */
-HANDLE_IPUT_X(OP_IPUT_SHORT, "", Int, )
-OP_END
-
-/* File: c/OP_SGET.c */
-HANDLE_SGET_X(OP_SGET, "", Int, )
-OP_END
-
-/* File: c/OP_SGET_WIDE.c */
-HANDLE_SGET_X(OP_SGET_WIDE, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_SGET_OBJECT.c */
-HANDLE_SGET_X(OP_SGET_OBJECT, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_SGET_BOOLEAN.c */
-HANDLE_SGET_X(OP_SGET_BOOLEAN, "", Int, )
-OP_END
-
-/* File: c/OP_SGET_BYTE.c */
-HANDLE_SGET_X(OP_SGET_BYTE, "", Int, )
-OP_END
-
-/* File: c/OP_SGET_CHAR.c */
-HANDLE_SGET_X(OP_SGET_CHAR, "", Int, )
-OP_END
-
-/* File: c/OP_SGET_SHORT.c */
-HANDLE_SGET_X(OP_SGET_SHORT, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT.c */
-HANDLE_SPUT_X(OP_SPUT, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT_WIDE.c */
-HANDLE_SPUT_X(OP_SPUT_WIDE, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_SPUT_OBJECT.c */
-HANDLE_SPUT_X(OP_SPUT_OBJECT, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_SPUT_BOOLEAN.c */
-HANDLE_SPUT_X(OP_SPUT_BOOLEAN, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT_BYTE.c */
-HANDLE_SPUT_X(OP_SPUT_BYTE, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT_CHAR.c */
-HANDLE_SPUT_X(OP_SPUT_CHAR, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT_SHORT.c */
-HANDLE_SPUT_X(OP_SPUT_SHORT, "", Int, )
-OP_END
-
-/* File: c/OP_INVOKE_VIRTUAL.c */
-HANDLE_OPCODE(OP_INVOKE_VIRTUAL /*vB, {vD, vE, vF, vG, vA}, meth@CCCC*/)
- GOTO_invoke(invokeVirtual, false, false);
-OP_END
-
-/* File: c/OP_INVOKE_SUPER.c */
-HANDLE_OPCODE(OP_INVOKE_SUPER /*vB, {vD, vE, vF, vG, vA}, meth@CCCC*/)
- GOTO_invoke(invokeSuper, false, false);
-OP_END
-
-/* File: c/OP_INVOKE_DIRECT.c */
-HANDLE_OPCODE(OP_INVOKE_DIRECT /*vB, {vD, vE, vF, vG, vA}, meth@CCCC*/)
- GOTO_invoke(invokeDirect, false, false);
-OP_END
-
-/* File: c/OP_INVOKE_STATIC.c */
-HANDLE_OPCODE(OP_INVOKE_STATIC /*vB, {vD, vE, vF, vG, vA}, meth@CCCC*/)
- GOTO_invoke(invokeStatic, false, false);
-OP_END
-
-/* File: c/OP_INVOKE_INTERFACE.c */
-HANDLE_OPCODE(OP_INVOKE_INTERFACE /*vB, {vD, vE, vF, vG, vA}, meth@CCCC*/)
- GOTO_invoke(invokeInterface, false, false);
-OP_END
-
-/* File: c/OP_UNUSED_73.c */
-HANDLE_OPCODE(OP_UNUSED_73)
-OP_END
-
-/* File: c/OP_INVOKE_VIRTUAL_RANGE.c */
-HANDLE_OPCODE(OP_INVOKE_VIRTUAL_RANGE /*{vCCCC..v(CCCC+AA-1)}, meth@BBBB*/)
- GOTO_invoke(invokeVirtual, true, false);
-OP_END
-
-/* File: c/OP_INVOKE_SUPER_RANGE.c */
-HANDLE_OPCODE(OP_INVOKE_SUPER_RANGE /*{vCCCC..v(CCCC+AA-1)}, meth@BBBB*/)
- GOTO_invoke(invokeSuper, true, false);
-OP_END
-
-/* File: c/OP_INVOKE_DIRECT_RANGE.c */
-HANDLE_OPCODE(OP_INVOKE_DIRECT_RANGE /*{vCCCC..v(CCCC+AA-1)}, meth@BBBB*/)
- GOTO_invoke(invokeDirect, true, false);
-OP_END
-
-/* File: c/OP_INVOKE_STATIC_RANGE.c */
-HANDLE_OPCODE(OP_INVOKE_STATIC_RANGE /*{vCCCC..v(CCCC+AA-1)}, meth@BBBB*/)
- GOTO_invoke(invokeStatic, true, false);
-OP_END
-
-/* File: c/OP_INVOKE_INTERFACE_RANGE.c */
-HANDLE_OPCODE(OP_INVOKE_INTERFACE_RANGE /*{vCCCC..v(CCCC+AA-1)}, meth@BBBB*/)
- GOTO_invoke(invokeInterface, true, false);
-OP_END
-
-/* File: c/OP_UNUSED_79.c */
-HANDLE_OPCODE(OP_UNUSED_79)
-OP_END
-
-/* File: c/OP_UNUSED_7A.c */
-HANDLE_OPCODE(OP_UNUSED_7A)
-OP_END
-
-/* File: c/OP_NEG_INT.c */
-HANDLE_UNOP(OP_NEG_INT, "neg-int", -, , )
-OP_END
-
-/* File: c/OP_NOT_INT.c */
-HANDLE_UNOP(OP_NOT_INT, "not-int", , ^ 0xffffffff, )
-OP_END
-
-/* File: c/OP_NEG_LONG.c */
-HANDLE_UNOP(OP_NEG_LONG, "neg-long", -, , _WIDE)
-OP_END
-
-/* File: c/OP_NOT_LONG.c */
-HANDLE_UNOP(OP_NOT_LONG, "not-long", , ^ 0xffffffffffffffffULL, _WIDE)
-OP_END
-
-/* File: c/OP_NEG_FLOAT.c */
-HANDLE_UNOP(OP_NEG_FLOAT, "neg-float", -, , _FLOAT)
-OP_END
-
-/* File: c/OP_NEG_DOUBLE.c */
-HANDLE_UNOP(OP_NEG_DOUBLE, "neg-double", -, , _DOUBLE)
-OP_END
-
-/* File: c/OP_INT_TO_LONG.c */
-HANDLE_NUMCONV(OP_INT_TO_LONG, "int-to-long", _INT, _WIDE)
-OP_END
-
-/* File: c/OP_INT_TO_FLOAT.c */
-HANDLE_NUMCONV(OP_INT_TO_FLOAT, "int-to-float", _INT, _FLOAT)
-OP_END
-
-/* File: c/OP_INT_TO_DOUBLE.c */
-HANDLE_NUMCONV(OP_INT_TO_DOUBLE, "int-to-double", _INT, _DOUBLE)
-OP_END
-
-/* File: c/OP_LONG_TO_INT.c */
-HANDLE_NUMCONV(OP_LONG_TO_INT, "long-to-int", _WIDE, _INT)
-OP_END
-
-/* File: c/OP_LONG_TO_FLOAT.c */
-HANDLE_NUMCONV(OP_LONG_TO_FLOAT, "long-to-float", _WIDE, _FLOAT)
-OP_END
-
-/* File: c/OP_LONG_TO_DOUBLE.c */
-HANDLE_NUMCONV(OP_LONG_TO_DOUBLE, "long-to-double", _WIDE, _DOUBLE)
-OP_END
-
-/* File: c/OP_FLOAT_TO_INT.c */
-HANDLE_FLOAT_TO_INT(OP_FLOAT_TO_INT, "float-to-int",
- float, _FLOAT, s4, _INT)
-OP_END
-
-/* File: c/OP_FLOAT_TO_LONG.c */
-HANDLE_FLOAT_TO_INT(OP_FLOAT_TO_LONG, "float-to-long",
- float, _FLOAT, s8, _WIDE)
-OP_END
-
-/* File: c/OP_FLOAT_TO_DOUBLE.c */
-HANDLE_NUMCONV(OP_FLOAT_TO_DOUBLE, "float-to-double", _FLOAT, _DOUBLE)
-OP_END
-
-/* File: c/OP_DOUBLE_TO_INT.c */
-HANDLE_FLOAT_TO_INT(OP_DOUBLE_TO_INT, "double-to-int",
- double, _DOUBLE, s4, _INT)
-OP_END
-
-/* File: c/OP_DOUBLE_TO_LONG.c */
-HANDLE_FLOAT_TO_INT(OP_DOUBLE_TO_LONG, "double-to-long",
- double, _DOUBLE, s8, _WIDE)
-OP_END
-
-/* File: c/OP_DOUBLE_TO_FLOAT.c */
-HANDLE_NUMCONV(OP_DOUBLE_TO_FLOAT, "double-to-float", _DOUBLE, _FLOAT)
-OP_END
-
-/* File: c/OP_INT_TO_BYTE.c */
-HANDLE_INT_TO_SMALL(OP_INT_TO_BYTE, "byte", s1)
-OP_END
-
-/* File: c/OP_INT_TO_CHAR.c */
-HANDLE_INT_TO_SMALL(OP_INT_TO_CHAR, "char", u2)
-OP_END
-
-/* File: c/OP_INT_TO_SHORT.c */
-HANDLE_INT_TO_SMALL(OP_INT_TO_SHORT, "short", s2) /* want sign bit */
-OP_END
-
-/* File: c/OP_ADD_INT.c */
-HANDLE_OP_X_INT(OP_ADD_INT, "add", +, 0)
-OP_END
-
-/* File: c/OP_SUB_INT.c */
-HANDLE_OP_X_INT(OP_SUB_INT, "sub", -, 0)
-OP_END
-
-/* File: c/OP_MUL_INT.c */
-HANDLE_OP_X_INT(OP_MUL_INT, "mul", *, 0)
-OP_END
-
-/* File: c/OP_DIV_INT.c */
-HANDLE_OP_X_INT(OP_DIV_INT, "div", /, 1)
-OP_END
-
-/* File: c/OP_REM_INT.c */
-HANDLE_OP_X_INT(OP_REM_INT, "rem", %, 2)
-OP_END
-
-/* File: c/OP_AND_INT.c */
-HANDLE_OP_X_INT(OP_AND_INT, "and", &, 0)
-OP_END
-
-/* File: c/OP_OR_INT.c */
-HANDLE_OP_X_INT(OP_OR_INT, "or", |, 0)
-OP_END
-
-/* File: c/OP_XOR_INT.c */
-HANDLE_OP_X_INT(OP_XOR_INT, "xor", ^, 0)
-OP_END
-
-/* File: c/OP_SHL_INT.c */
-HANDLE_OP_SHX_INT(OP_SHL_INT, "shl", (s4), <<)
-OP_END
-
-/* File: c/OP_SHR_INT.c */
-HANDLE_OP_SHX_INT(OP_SHR_INT, "shr", (s4), >>)
-OP_END
-
-/* File: c/OP_USHR_INT.c */
-HANDLE_OP_SHX_INT(OP_USHR_INT, "ushr", (u4), >>)
-OP_END
-
-/* File: c/OP_ADD_LONG.c */
-HANDLE_OP_X_LONG(OP_ADD_LONG, "add", +, 0)
-OP_END
-
-/* File: c/OP_SUB_LONG.c */
-HANDLE_OP_X_LONG(OP_SUB_LONG, "sub", -, 0)
-OP_END
-
-/* File: c/OP_MUL_LONG.c */
-HANDLE_OP_X_LONG(OP_MUL_LONG, "mul", *, 0)
-OP_END
-
-/* File: c/OP_DIV_LONG.c */
-HANDLE_OP_X_LONG(OP_DIV_LONG, "div", /, 1)
-OP_END
-
-/* File: c/OP_REM_LONG.c */
-HANDLE_OP_X_LONG(OP_REM_LONG, "rem", %, 2)
-OP_END
-
-/* File: c/OP_AND_LONG.c */
-HANDLE_OP_X_LONG(OP_AND_LONG, "and", &, 0)
-OP_END
-
-/* File: c/OP_OR_LONG.c */
-HANDLE_OP_X_LONG(OP_OR_LONG, "or", |, 0)
-OP_END
-
-/* File: c/OP_XOR_LONG.c */
-HANDLE_OP_X_LONG(OP_XOR_LONG, "xor", ^, 0)
-OP_END
-
-/* File: c/OP_SHL_LONG.c */
-HANDLE_OP_SHX_LONG(OP_SHL_LONG, "shl", (s8), <<)
-OP_END
-
-/* File: c/OP_SHR_LONG.c */
-HANDLE_OP_SHX_LONG(OP_SHR_LONG, "shr", (s8), >>)
-OP_END
-
-/* File: c/OP_USHR_LONG.c */
-HANDLE_OP_SHX_LONG(OP_USHR_LONG, "ushr", (u8), >>)
-OP_END
-
-/* File: c/OP_ADD_FLOAT.c */
-HANDLE_OP_X_FLOAT(OP_ADD_FLOAT, "add", +)
-OP_END
-
-/* File: c/OP_SUB_FLOAT.c */
-HANDLE_OP_X_FLOAT(OP_SUB_FLOAT, "sub", -)
-OP_END
-
-/* File: c/OP_MUL_FLOAT.c */
-HANDLE_OP_X_FLOAT(OP_MUL_FLOAT, "mul", *)
-OP_END
-
-/* File: c/OP_DIV_FLOAT.c */
-HANDLE_OP_X_FLOAT(OP_DIV_FLOAT, "div", /)
-OP_END
-
-/* File: c/OP_REM_FLOAT.c */
-HANDLE_OPCODE(OP_REM_FLOAT /*vAA, vBB, vCC*/)
- {
- u2 srcRegs;
- vdst = INST_AA(inst);
- srcRegs = FETCH(1);
- vsrc1 = srcRegs & 0xff;
- vsrc2 = srcRegs >> 8;
- ILOGV("|%s-float v%d,v%d,v%d", "mod", vdst, vsrc1, vsrc2);
- SET_REGISTER_FLOAT(vdst,
- fmodf(GET_REGISTER_FLOAT(vsrc1), GET_REGISTER_FLOAT(vsrc2)));
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_ADD_DOUBLE.c */
-HANDLE_OP_X_DOUBLE(OP_ADD_DOUBLE, "add", +)
-OP_END
-
-/* File: c/OP_SUB_DOUBLE.c */
-HANDLE_OP_X_DOUBLE(OP_SUB_DOUBLE, "sub", -)
-OP_END
-
-/* File: c/OP_MUL_DOUBLE.c */
-HANDLE_OP_X_DOUBLE(OP_MUL_DOUBLE, "mul", *)
-OP_END
-
-/* File: c/OP_DIV_DOUBLE.c */
-HANDLE_OP_X_DOUBLE(OP_DIV_DOUBLE, "div", /)
-OP_END
-
-/* File: c/OP_REM_DOUBLE.c */
-HANDLE_OPCODE(OP_REM_DOUBLE /*vAA, vBB, vCC*/)
- {
- u2 srcRegs;
- vdst = INST_AA(inst);
- srcRegs = FETCH(1);
- vsrc1 = srcRegs & 0xff;
- vsrc2 = srcRegs >> 8;
- ILOGV("|%s-double v%d,v%d,v%d", "mod", vdst, vsrc1, vsrc2);
- SET_REGISTER_DOUBLE(vdst,
- fmod(GET_REGISTER_DOUBLE(vsrc1), GET_REGISTER_DOUBLE(vsrc2)));
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_ADD_INT_2ADDR.c */
-HANDLE_OP_X_INT_2ADDR(OP_ADD_INT_2ADDR, "add", +, 0)
-OP_END
-
-/* File: c/OP_SUB_INT_2ADDR.c */
-HANDLE_OP_X_INT_2ADDR(OP_SUB_INT_2ADDR, "sub", -, 0)
-OP_END
-
-/* File: c/OP_MUL_INT_2ADDR.c */
-HANDLE_OP_X_INT_2ADDR(OP_MUL_INT_2ADDR, "mul", *, 0)
-OP_END
-
-/* File: c/OP_DIV_INT_2ADDR.c */
-HANDLE_OP_X_INT_2ADDR(OP_DIV_INT_2ADDR, "div", /, 1)
-OP_END
-
-/* File: c/OP_REM_INT_2ADDR.c */
-HANDLE_OP_X_INT_2ADDR(OP_REM_INT_2ADDR, "rem", %, 2)
-OP_END
-
-/* File: c/OP_AND_INT_2ADDR.c */
-HANDLE_OP_X_INT_2ADDR(OP_AND_INT_2ADDR, "and", &, 0)
-OP_END
-
-/* File: c/OP_OR_INT_2ADDR.c */
-HANDLE_OP_X_INT_2ADDR(OP_OR_INT_2ADDR, "or", |, 0)
-OP_END
-
-/* File: c/OP_XOR_INT_2ADDR.c */
-HANDLE_OP_X_INT_2ADDR(OP_XOR_INT_2ADDR, "xor", ^, 0)
-OP_END
-
-/* File: c/OP_SHL_INT_2ADDR.c */
-HANDLE_OP_SHX_INT_2ADDR(OP_SHL_INT_2ADDR, "shl", (s4), <<)
-OP_END
-
-/* File: c/OP_SHR_INT_2ADDR.c */
-HANDLE_OP_SHX_INT_2ADDR(OP_SHR_INT_2ADDR, "shr", (s4), >>)
-OP_END
-
-/* File: c/OP_USHR_INT_2ADDR.c */
-HANDLE_OP_SHX_INT_2ADDR(OP_USHR_INT_2ADDR, "ushr", (u4), >>)
-OP_END
-
-/* File: c/OP_ADD_LONG_2ADDR.c */
-HANDLE_OP_X_LONG_2ADDR(OP_ADD_LONG_2ADDR, "add", +, 0)
-OP_END
-
-/* File: c/OP_SUB_LONG_2ADDR.c */
-HANDLE_OP_X_LONG_2ADDR(OP_SUB_LONG_2ADDR, "sub", -, 0)
-OP_END
-
-/* File: c/OP_MUL_LONG_2ADDR.c */
-HANDLE_OP_X_LONG_2ADDR(OP_MUL_LONG_2ADDR, "mul", *, 0)
-OP_END
-
-/* File: c/OP_DIV_LONG_2ADDR.c */
-HANDLE_OP_X_LONG_2ADDR(OP_DIV_LONG_2ADDR, "div", /, 1)
-OP_END
-
-/* File: c/OP_REM_LONG_2ADDR.c */
-HANDLE_OP_X_LONG_2ADDR(OP_REM_LONG_2ADDR, "rem", %, 2)
-OP_END
-
-/* File: c/OP_AND_LONG_2ADDR.c */
-HANDLE_OP_X_LONG_2ADDR(OP_AND_LONG_2ADDR, "and", &, 0)
-OP_END
-
-/* File: c/OP_OR_LONG_2ADDR.c */
-HANDLE_OP_X_LONG_2ADDR(OP_OR_LONG_2ADDR, "or", |, 0)
-OP_END
-
-/* File: c/OP_XOR_LONG_2ADDR.c */
-HANDLE_OP_X_LONG_2ADDR(OP_XOR_LONG_2ADDR, "xor", ^, 0)
-OP_END
-
-/* File: c/OP_SHL_LONG_2ADDR.c */
-HANDLE_OP_SHX_LONG_2ADDR(OP_SHL_LONG_2ADDR, "shl", (s8), <<)
-OP_END
-
-/* File: c/OP_SHR_LONG_2ADDR.c */
-HANDLE_OP_SHX_LONG_2ADDR(OP_SHR_LONG_2ADDR, "shr", (s8), >>)
-OP_END
-
-/* File: c/OP_USHR_LONG_2ADDR.c */
-HANDLE_OP_SHX_LONG_2ADDR(OP_USHR_LONG_2ADDR, "ushr", (u8), >>)
-OP_END
-
-/* File: c/OP_ADD_FLOAT_2ADDR.c */
-HANDLE_OP_X_FLOAT_2ADDR(OP_ADD_FLOAT_2ADDR, "add", +)
-OP_END
-
-/* File: c/OP_SUB_FLOAT_2ADDR.c */
-HANDLE_OP_X_FLOAT_2ADDR(OP_SUB_FLOAT_2ADDR, "sub", -)
-OP_END
-
-/* File: c/OP_MUL_FLOAT_2ADDR.c */
-HANDLE_OP_X_FLOAT_2ADDR(OP_MUL_FLOAT_2ADDR, "mul", *)
-OP_END
-
-/* File: c/OP_DIV_FLOAT_2ADDR.c */
-HANDLE_OP_X_FLOAT_2ADDR(OP_DIV_FLOAT_2ADDR, "div", /)
-OP_END
-
-/* File: c/OP_REM_FLOAT_2ADDR.c */
-HANDLE_OPCODE(OP_REM_FLOAT_2ADDR /*vA, vB*/)
- vdst = INST_A(inst);
- vsrc1 = INST_B(inst);
- ILOGV("|%s-float-2addr v%d,v%d", "mod", vdst, vsrc1);
- SET_REGISTER_FLOAT(vdst,
- fmodf(GET_REGISTER_FLOAT(vdst), GET_REGISTER_FLOAT(vsrc1)));
- FINISH(1);
-OP_END
-
-/* File: c/OP_ADD_DOUBLE_2ADDR.c */
-HANDLE_OP_X_DOUBLE_2ADDR(OP_ADD_DOUBLE_2ADDR, "add", +)
-OP_END
-
-/* File: c/OP_SUB_DOUBLE_2ADDR.c */
-HANDLE_OP_X_DOUBLE_2ADDR(OP_SUB_DOUBLE_2ADDR, "sub", -)
-OP_END
-
-/* File: c/OP_MUL_DOUBLE_2ADDR.c */
-HANDLE_OP_X_DOUBLE_2ADDR(OP_MUL_DOUBLE_2ADDR, "mul", *)
-OP_END
-
-/* File: c/OP_DIV_DOUBLE_2ADDR.c */
-HANDLE_OP_X_DOUBLE_2ADDR(OP_DIV_DOUBLE_2ADDR, "div", /)
-OP_END
-
-/* File: c/OP_REM_DOUBLE_2ADDR.c */
-HANDLE_OPCODE(OP_REM_DOUBLE_2ADDR /*vA, vB*/)
- vdst = INST_A(inst);
- vsrc1 = INST_B(inst);
- ILOGV("|%s-double-2addr v%d,v%d", "mod", vdst, vsrc1);
- SET_REGISTER_DOUBLE(vdst,
- fmod(GET_REGISTER_DOUBLE(vdst), GET_REGISTER_DOUBLE(vsrc1)));
- FINISH(1);
-OP_END
-
-/* File: c/OP_ADD_INT_LIT16.c */
-HANDLE_OP_X_INT_LIT16(OP_ADD_INT_LIT16, "add", +, 0)
-OP_END
-
-/* File: c/OP_RSUB_INT.c */
-HANDLE_OPCODE(OP_RSUB_INT /*vA, vB, #+CCCC*/)
- {
- vdst = INST_A(inst);
- vsrc1 = INST_B(inst);
- vsrc2 = FETCH(1);
- ILOGV("|rsub-int v%d,v%d,#+0x%04x", vdst, vsrc1, vsrc2);
- SET_REGISTER(vdst, (s2) vsrc2 - (s4) GET_REGISTER(vsrc1));
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_MUL_INT_LIT16.c */
-HANDLE_OP_X_INT_LIT16(OP_MUL_INT_LIT16, "mul", *, 0)
-OP_END
-
-/* File: c/OP_DIV_INT_LIT16.c */
-HANDLE_OP_X_INT_LIT16(OP_DIV_INT_LIT16, "div", /, 1)
-OP_END
-
-/* File: c/OP_REM_INT_LIT16.c */
-HANDLE_OP_X_INT_LIT16(OP_REM_INT_LIT16, "rem", %, 2)
-OP_END
-
-/* File: c/OP_AND_INT_LIT16.c */
-HANDLE_OP_X_INT_LIT16(OP_AND_INT_LIT16, "and", &, 0)
-OP_END
-
-/* File: c/OP_OR_INT_LIT16.c */
-HANDLE_OP_X_INT_LIT16(OP_OR_INT_LIT16, "or", |, 0)
-OP_END
-
-/* File: c/OP_XOR_INT_LIT16.c */
-HANDLE_OP_X_INT_LIT16(OP_XOR_INT_LIT16, "xor", ^, 0)
-OP_END
-
-/* File: c/OP_ADD_INT_LIT8.c */
-HANDLE_OP_X_INT_LIT8(OP_ADD_INT_LIT8, "add", +, 0)
-OP_END
-
-/* File: c/OP_RSUB_INT_LIT8.c */
-HANDLE_OPCODE(OP_RSUB_INT_LIT8 /*vAA, vBB, #+CC*/)
- {
- u2 litInfo;
- vdst = INST_AA(inst);
- litInfo = FETCH(1);
- vsrc1 = litInfo & 0xff;
- vsrc2 = litInfo >> 8;
- ILOGV("|%s-int/lit8 v%d,v%d,#+0x%02x", "rsub", vdst, vsrc1, vsrc2);
- SET_REGISTER(vdst, (s1) vsrc2 - (s4) GET_REGISTER(vsrc1));
- }
- FINISH(2);
-OP_END
-
-/* File: c/OP_MUL_INT_LIT8.c */
-HANDLE_OP_X_INT_LIT8(OP_MUL_INT_LIT8, "mul", *, 0)
-OP_END
-
-/* File: c/OP_DIV_INT_LIT8.c */
-HANDLE_OP_X_INT_LIT8(OP_DIV_INT_LIT8, "div", /, 1)
-OP_END
-
-/* File: c/OP_REM_INT_LIT8.c */
-HANDLE_OP_X_INT_LIT8(OP_REM_INT_LIT8, "rem", %, 2)
-OP_END
-
-/* File: c/OP_AND_INT_LIT8.c */
-HANDLE_OP_X_INT_LIT8(OP_AND_INT_LIT8, "and", &, 0)
-OP_END
-
-/* File: c/OP_OR_INT_LIT8.c */
-HANDLE_OP_X_INT_LIT8(OP_OR_INT_LIT8, "or", |, 0)
-OP_END
-
-/* File: c/OP_XOR_INT_LIT8.c */
-HANDLE_OP_X_INT_LIT8(OP_XOR_INT_LIT8, "xor", ^, 0)
-OP_END
-
-/* File: c/OP_SHL_INT_LIT8.c */
-HANDLE_OP_SHX_INT_LIT8(OP_SHL_INT_LIT8, "shl", (s4), <<)
-OP_END
-
-/* File: c/OP_SHR_INT_LIT8.c */
-HANDLE_OP_SHX_INT_LIT8(OP_SHR_INT_LIT8, "shr", (s4), >>)
-OP_END
-
-/* File: c/OP_USHR_INT_LIT8.c */
-HANDLE_OP_SHX_INT_LIT8(OP_USHR_INT_LIT8, "ushr", (u4), >>)
-OP_END
-
-/* File: c/OP_IGET_VOLATILE.c */
-HANDLE_IGET_X(OP_IGET_VOLATILE, "-volatile", IntVolatile, )
-OP_END
-
-/* File: c/OP_IPUT_VOLATILE.c */
-HANDLE_IPUT_X(OP_IPUT_VOLATILE, "-volatile", IntVolatile, )
-OP_END
-
-/* File: c/OP_SGET_VOLATILE.c */
-HANDLE_SGET_X(OP_SGET_VOLATILE, "-volatile", IntVolatile, )
-OP_END
-
-/* File: c/OP_SPUT_VOLATILE.c */
-HANDLE_SPUT_X(OP_SPUT_VOLATILE, "-volatile", IntVolatile, )
-OP_END
-
-/* File: c/OP_IGET_OBJECT_VOLATILE.c */
-HANDLE_IGET_X(OP_IGET_OBJECT_VOLATILE, "-object-volatile", ObjectVolatile, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_IGET_WIDE_VOLATILE.c */
-HANDLE_IGET_X(OP_IGET_WIDE_VOLATILE, "-wide-volatile", LongVolatile, _WIDE)
-OP_END
-
-/* File: c/OP_IPUT_WIDE_VOLATILE.c */
-HANDLE_IPUT_X(OP_IPUT_WIDE_VOLATILE, "-wide-volatile", LongVolatile, _WIDE)
-OP_END
-
-/* File: c/OP_SGET_WIDE_VOLATILE.c */
-HANDLE_SGET_X(OP_SGET_WIDE_VOLATILE, "-wide-volatile", LongVolatile, _WIDE)
-OP_END
-
-/* File: c/OP_SPUT_WIDE_VOLATILE.c */
-HANDLE_SPUT_X(OP_SPUT_WIDE_VOLATILE, "-wide-volatile", LongVolatile, _WIDE)
-OP_END
-
-/* File: c/OP_BREAKPOINT.c */
-HANDLE_OPCODE(OP_BREAKPOINT)
-#if (INTERP_TYPE == INTERP_DBG)
- {
- /*
- * Restart this instruction with the original opcode. We do
- * this by simply jumping to the handler.
- *
- * It's probably not necessary to update "inst", but we do it
- * for the sake of anything that needs to do disambiguation in a
- * common handler with INST_INST.
- *
- * The breakpoint itself is handled over in updateDebugger(),
- * because we need to detect other events (method entry, single
- * step) and report them in the same event packet, and we're not
- * yet handling those through breakpoint instructions. By the
- * time we get here, the breakpoint has already been handled and
- * the thread resumed.
- */
- u1 originalOpcode = dvmGetOriginalOpcode(pc);
- LOGV("+++ break 0x%02x (0x%04x -> 0x%04x)\n", originalOpcode, inst,
- INST_REPLACE_OP(inst, originalOpcode));
- inst = INST_REPLACE_OP(inst, originalOpcode);
- FINISH_BKPT(originalOpcode);
- }
-#else
- LOGE("Breakpoint hit in non-debug interpreter\n");
- dvmAbort();
-#endif
-OP_END
-
-/* File: c/OP_THROW_VERIFICATION_ERROR.c */
-HANDLE_OPCODE(OP_THROW_VERIFICATION_ERROR)
- EXPORT_PC();
- vsrc1 = INST_AA(inst);
- ref = FETCH(1); /* class/field/method ref */
- dvmThrowVerificationError(curMethod, vsrc1, ref);
- GOTO_exceptionThrown();
-OP_END
-
-/* File: c/OP_EXECUTE_INLINE.c */
-HANDLE_OPCODE(OP_EXECUTE_INLINE /*vB, {vD, vE, vF, vG}, inline@CCCC*/)
- {
- /*
- * This has the same form as other method calls, but we ignore
- * the 5th argument (vA). This is chiefly because the first four
- * arguments to a function on ARM are in registers.
- *
- * We only set the arguments that are actually used, leaving
- * the rest uninitialized. We're assuming that, if the method
- * needs them, they'll be specified in the call.
- *
- * However, this annoys gcc when optimizations are enabled,
- * causing a "may be used uninitialized" warning. Quieting
- * the warnings incurs a slight penalty (5%: 373ns vs. 393ns
- * on empty method). Note that valgrind is perfectly happy
- * either way as the uninitialiezd values are never actually
- * used.
- */
- u4 arg0, arg1, arg2, arg3;
- arg0 = arg1 = arg2 = arg3 = 0;
-
- EXPORT_PC();
-
- vsrc1 = INST_B(inst); /* #of args */
- ref = FETCH(1); /* inline call "ref" */
- vdst = FETCH(2); /* 0-4 register indices */
- ILOGV("|execute-inline args=%d @%d {regs=0x%04x}",
- vsrc1, ref, vdst);
-
- assert((vdst >> 16) == 0); // 16-bit type -or- high 16 bits clear
- assert(vsrc1 <= 4);
-
- switch (vsrc1) {
- case 4:
- arg3 = GET_REGISTER(vdst >> 12);
- /* fall through */
- case 3:
- arg2 = GET_REGISTER((vdst & 0x0f00) >> 8);
- /* fall through */
- case 2:
- arg1 = GET_REGISTER((vdst & 0x00f0) >> 4);
- /* fall through */
- case 1:
- arg0 = GET_REGISTER(vdst & 0x0f);
- /* fall through */
- default: // case 0
- ;
- }
-
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
- }
- FINISH(3);
-OP_END
-
-/* File: c/OP_EXECUTE_INLINE_RANGE.c */
-HANDLE_OPCODE(OP_EXECUTE_INLINE_RANGE /*{vCCCC..v(CCCC+AA-1)}, inline@BBBB*/)
- {
- u4 arg0, arg1, arg2, arg3;
- arg0 = arg1 = arg2 = arg3 = 0; /* placate gcc */
-
- EXPORT_PC();
-
- vsrc1 = INST_AA(inst); /* #of args */
- ref = FETCH(1); /* inline call "ref" */
- vdst = FETCH(2); /* range base */
- ILOGV("|execute-inline-range args=%d @%d {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
-
- assert((vdst >> 16) == 0); // 16-bit type -or- high 16 bits clear
- assert(vsrc1 <= 4);
-
- switch (vsrc1) {
- case 4:
- arg3 = GET_REGISTER(vdst+3);
- /* fall through */
- case 3:
- arg2 = GET_REGISTER(vdst+2);
- /* fall through */
- case 2:
- arg1 = GET_REGISTER(vdst+1);
- /* fall through */
- case 1:
- arg0 = GET_REGISTER(vdst+0);
- /* fall through */
- default: // case 0
- ;
- }
-
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
- }
- FINISH(3);
-OP_END
-
-/* File: c/OP_INVOKE_OBJECT_INIT_RANGE.c */
-HANDLE_OPCODE(OP_INVOKE_OBJECT_INIT_RANGE /*{vCCCC..v(CCCC+AA-1)}, meth@BBBB*/)
- {
- Object* obj;
-
- vsrc1 = FETCH(2); /* reg number of "this" pointer */
- obj = GET_REGISTER_AS_OBJECT(vsrc1);
-
- if (!checkForNullExportPC(obj, fp, pc))
- GOTO_exceptionThrown();
-
- /*
- * The object should be marked "finalizable" when Object.<init>
- * completes normally. We're going to assume it does complete
- * (by virtue of being nothing but a return-void) and set it now.
- */
- if (IS_CLASS_FLAG_SET(obj->clazz, CLASS_ISFINALIZABLE)) {
- EXPORT_PC();
- dvmSetFinalizable(obj);
- if (dvmGetException(self))
- GOTO_exceptionThrown();
- }
-
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
- /* behave like OP_INVOKE_DIRECT_RANGE */
- GOTO_invoke(invokeDirect, true, false);
- }
-#endif
- FINISH(3);
- }
-OP_END
-
-/* File: c/OP_RETURN_VOID_BARRIER.c */
-HANDLE_OPCODE(OP_RETURN_VOID_BARRIER /**/)
- ILOGV("|return-void");
-#ifndef NDEBUG
- retval.j = 0xababababULL; /* placate valgrind */
-#endif
- ANDROID_MEMBAR_STORE();
- GOTO_returnFromMethod();
-OP_END
-
-/* File: c/OP_IGET_QUICK.c */
-HANDLE_IGET_X_QUICK(OP_IGET_QUICK, "", Int, )
-OP_END
-
-/* File: c/OP_IGET_WIDE_QUICK.c */
-HANDLE_IGET_X_QUICK(OP_IGET_WIDE_QUICK, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_IGET_OBJECT_QUICK.c */
-HANDLE_IGET_X_QUICK(OP_IGET_OBJECT_QUICK, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_IPUT_QUICK.c */
-HANDLE_IPUT_X_QUICK(OP_IPUT_QUICK, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_WIDE_QUICK.c */
-HANDLE_IPUT_X_QUICK(OP_IPUT_WIDE_QUICK, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_IPUT_OBJECT_QUICK.c */
-HANDLE_IPUT_X_QUICK(OP_IPUT_OBJECT_QUICK, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_INVOKE_VIRTUAL_QUICK.c */
-HANDLE_OPCODE(OP_INVOKE_VIRTUAL_QUICK /*vB, {vD, vE, vF, vG, vA}, meth@CCCC*/)
- GOTO_invoke(invokeVirtualQuick, false, false);
-OP_END
-
-/* File: c/OP_INVOKE_VIRTUAL_QUICK_RANGE.c */
-HANDLE_OPCODE(OP_INVOKE_VIRTUAL_QUICK_RANGE/*{vCCCC..v(CCCC+AA-1)}, meth@BBBB*/)
- GOTO_invoke(invokeVirtualQuick, true, false);
-OP_END
-
-/* File: c/OP_INVOKE_SUPER_QUICK.c */
-HANDLE_OPCODE(OP_INVOKE_SUPER_QUICK /*vB, {vD, vE, vF, vG, vA}, meth@CCCC*/)
- GOTO_invoke(invokeSuperQuick, false, false);
-OP_END
-
-/* File: c/OP_INVOKE_SUPER_QUICK_RANGE.c */
-HANDLE_OPCODE(OP_INVOKE_SUPER_QUICK_RANGE /*{vCCCC..v(CCCC+AA-1)}, meth@BBBB*/)
- GOTO_invoke(invokeSuperQuick, true, false);
-OP_END
-
-/* File: c/OP_IPUT_OBJECT_VOLATILE.c */
-HANDLE_IPUT_X(OP_IPUT_OBJECT_VOLATILE, "-object-volatile", ObjectVolatile, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_SGET_OBJECT_VOLATILE.c */
-HANDLE_SGET_X(OP_SGET_OBJECT_VOLATILE, "-object-volatile", ObjectVolatile, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_SPUT_OBJECT_VOLATILE.c */
-HANDLE_SPUT_X(OP_SPUT_OBJECT_VOLATILE, "-object-volatile", ObjectVolatile, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_DISPATCH_FF.c */
-HANDLE_OPCODE(OP_DISPATCH_FF)
- /*
- * Indicates extended opcode. Use next 8 bits to choose where to branch.
- */
- DISPATCH_EXTENDED(INST_AA(inst));
-OP_END
-
-/* File: c/OP_CONST_CLASS_JUMBO.c */
-HANDLE_OPCODE(OP_CONST_CLASS_JUMBO /*vBBBB, class@AAAAAAAA*/)
- {
- ClassObject* clazz;
-
- ref = FETCH(1) | (u4)FETCH(2) << 16;
- vdst = FETCH(3);
- ILOGV("|const-class/jumbo v%d class@0x%08x", vdst, ref);
- clazz = dvmDexGetResolvedClass(methodClassDex, ref);
- if (clazz == NULL) {
- EXPORT_PC();
- clazz = dvmResolveClass(curMethod->clazz, ref, true);
- if (clazz == NULL)
- GOTO_exceptionThrown();
- }
- SET_REGISTER(vdst, (u4) clazz);
- }
- FINISH(4);
-OP_END
-
-/* File: c/OP_CHECK_CAST_JUMBO.c */
-HANDLE_OPCODE(OP_CHECK_CAST_JUMBO /*vBBBB, class@AAAAAAAA*/)
- {
- ClassObject* clazz;
- Object* obj;
-
- EXPORT_PC();
-
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* class to check against */
- vsrc1 = FETCH(3);
- ILOGV("|check-cast/jumbo v%d,class@0x%08x", vsrc1, ref);
-
- obj = (Object*)GET_REGISTER(vsrc1);
- if (obj != NULL) {
-#if defined(WITH_EXTRA_OBJECT_VALIDATION)
- if (!checkForNull(obj))
- GOTO_exceptionThrown();
-#endif
- clazz = dvmDexGetResolvedClass(methodClassDex, ref);
- if (clazz == NULL) {
- clazz = dvmResolveClass(curMethod->clazz, ref, false);
- if (clazz == NULL)
- GOTO_exceptionThrown();
- }
- if (!dvmInstanceof(obj->clazz, clazz)) {
- dvmThrowClassCastException(obj->clazz, clazz);
- GOTO_exceptionThrown();
- }
- }
- }
- FINISH(4);
-OP_END
-
-/* File: c/OP_INSTANCE_OF_JUMBO.c */
-HANDLE_OPCODE(OP_INSTANCE_OF_JUMBO /*vBBBB, vCCCC, class@AAAAAAAA*/)
- {
- ClassObject* clazz;
- Object* obj;
-
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* class to check against */
- vdst = FETCH(3);
- vsrc1 = FETCH(4); /* object to check */
- ILOGV("|instance-of/jumbo v%d,v%d,class@0x%08x", vdst, vsrc1, ref);
-
- obj = (Object*)GET_REGISTER(vsrc1);
- if (obj == NULL) {
- SET_REGISTER(vdst, 0);
- } else {
-#if defined(WITH_EXTRA_OBJECT_VALIDATION)
- if (!checkForNullExportPC(obj, fp, pc))
- GOTO_exceptionThrown();
-#endif
- clazz = dvmDexGetResolvedClass(methodClassDex, ref);
- if (clazz == NULL) {
- EXPORT_PC();
- clazz = dvmResolveClass(curMethod->clazz, ref, true);
- if (clazz == NULL)
- GOTO_exceptionThrown();
- }
- SET_REGISTER(vdst, dvmInstanceof(obj->clazz, clazz));
- }
- }
- FINISH(5);
-OP_END
-
-/* File: c/OP_NEW_INSTANCE_JUMBO.c */
-HANDLE_OPCODE(OP_NEW_INSTANCE_JUMBO /*vBBBB, class@AAAAAAAA*/)
- {
- ClassObject* clazz;
- Object* newObj;
-
- EXPORT_PC();
-
- ref = FETCH(1) | (u4)FETCH(2) << 16;
- vdst = FETCH(3);
- ILOGV("|new-instance/jumbo v%d,class@0x%08x", vdst, ref);
- clazz = dvmDexGetResolvedClass(methodClassDex, ref);
- if (clazz == NULL) {
- clazz = dvmResolveClass(curMethod->clazz, ref, false);
- if (clazz == NULL)
- GOTO_exceptionThrown();
- }
-
- if (!dvmIsClassInitialized(clazz) && !dvmInitClass(clazz))
- GOTO_exceptionThrown();
-
- /*
- * The JIT needs dvmDexGetResolvedClass() to return non-null.
- * Since we use the portable interpreter to build the trace, this extra
- * check is not needed for mterp.
- */
- if (!dvmDexGetResolvedClass(methodClassDex, ref)) {
- /* Class initialization is still ongoing - end the trace */
- END_JIT_TSELECT();
- }
-
- /*
- * Verifier now tests for interface/abstract class.
- */
- //if (dvmIsInterfaceClass(clazz) || dvmIsAbstractClass(clazz)) {
- // dvmThrowExceptionWithClassMessage(gDvm.exInstantiationError,
- // clazz->descriptor);
- // GOTO_exceptionThrown();
- //}
- newObj = dvmAllocObject(clazz, ALLOC_DONT_TRACK);
- if (newObj == NULL)
- GOTO_exceptionThrown();
- SET_REGISTER(vdst, (u4) newObj);
- }
- FINISH(4);
-OP_END
-
-/* File: c/OP_NEW_ARRAY_JUMBO.c */
-HANDLE_OPCODE(OP_NEW_ARRAY_JUMBO /*vBBBB, vCCCC, class@AAAAAAAA*/)
- {
- ClassObject* arrayClass;
- ArrayObject* newArray;
- s4 length;
-
- EXPORT_PC();
-
- ref = FETCH(1) | (u4)FETCH(2) << 16;
- vdst = FETCH(3);
- vsrc1 = FETCH(4); /* length reg */
- ILOGV("|new-array/jumbo v%d,v%d,class@0x%08x (%d elements)",
- vdst, vsrc1, ref, (s4) GET_REGISTER(vsrc1));
- length = (s4) GET_REGISTER(vsrc1);
- if (length < 0) {
- dvmThrowNegativeArraySizeException(length);
- GOTO_exceptionThrown();
- }
- arrayClass = dvmDexGetResolvedClass(methodClassDex, ref);
- if (arrayClass == NULL) {
- arrayClass = dvmResolveClass(curMethod->clazz, ref, false);
- if (arrayClass == NULL)
- GOTO_exceptionThrown();
- }
- /* verifier guarantees this is an array class */
- assert(dvmIsArrayClass(arrayClass));
- assert(dvmIsClassInitialized(arrayClass));
-
- newArray = dvmAllocArrayByClass(arrayClass, length, ALLOC_DONT_TRACK);
- if (newArray == NULL)
- GOTO_exceptionThrown();
- SET_REGISTER(vdst, (u4) newArray);
- }
- FINISH(5);
-OP_END
-
-/* File: c/OP_FILLED_NEW_ARRAY_JUMBO.c */
-HANDLE_OPCODE(OP_FILLED_NEW_ARRAY_JUMBO /*{vCCCC..v(CCCC+BBBB-1)}, class@AAAAAAAA*/)
- GOTO_invoke(filledNewArray, true, true);
-OP_END
-
-/* File: c/OP_IGET_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_IGET_WIDE_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_WIDE_JUMBO, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_IGET_OBJECT_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_OBJECT_JUMBO, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_IGET_BOOLEAN_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_BOOLEAN_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_IGET_BYTE_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_BYTE_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_IGET_CHAR_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_CHAR_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_IGET_SHORT_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_SHORT_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_JUMBO.c */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_WIDE_JUMBO.c */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_WIDE_JUMBO, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_IPUT_OBJECT_JUMBO.c */
-/*
- * The VM spec says we should verify that the reference being stored into
- * the field is assignment compatible. In practice, many popular VMs don't
- * do this because it slows down a very common operation. It's not so bad
- * for us, since "dexopt" quickens it whenever possible, but it's still an
- * issue.
- *
- * To make this spec-complaint, we'd need to add a ClassObject pointer to
- * the Field struct, resolve the field's type descriptor at link or class
- * init time, and then verify the type here.
- */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_OBJECT_JUMBO, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_IPUT_BOOLEAN_JUMBO.c */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_BOOLEAN_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_BYTE_JUMBO.c */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_BYTE_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_CHAR_JUMBO.c */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_CHAR_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_IPUT_SHORT_JUMBO.c */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_SHORT_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SGET_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SGET_WIDE_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_WIDE_JUMBO, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_SGET_OBJECT_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_OBJECT_JUMBO, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_SGET_BOOLEAN_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_BOOLEAN_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SGET_BYTE_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_BYTE_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SGET_CHAR_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_CHAR_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SGET_SHORT_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_SHORT_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT_WIDE_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_WIDE_JUMBO, "-wide", Long, _WIDE)
-OP_END
-
-/* File: c/OP_SPUT_OBJECT_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_OBJECT_JUMBO, "-object", Object, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_SPUT_BOOLEAN_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_BOOLEAN_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT_BYTE_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_BYTE_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT_CHAR_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_CHAR_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_SPUT_SHORT_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_SHORT_JUMBO, "", Int, )
-OP_END
-
-/* File: c/OP_INVOKE_VIRTUAL_JUMBO.c */
-HANDLE_OPCODE(OP_INVOKE_VIRTUAL_JUMBO /*{vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA*/)
- GOTO_invoke(invokeVirtual, true, true);
-OP_END
-
-/* File: c/OP_INVOKE_SUPER_JUMBO.c */
-HANDLE_OPCODE(OP_INVOKE_SUPER_JUMBO /*{vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA*/)
- GOTO_invoke(invokeSuper, true, true);
-OP_END
-
-/* File: c/OP_INVOKE_DIRECT_JUMBO.c */
-HANDLE_OPCODE(OP_INVOKE_DIRECT_JUMBO /*{vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA*/)
- GOTO_invoke(invokeDirect, true, true);
-OP_END
-
-/* File: c/OP_INVOKE_STATIC_JUMBO.c */
-HANDLE_OPCODE(OP_INVOKE_STATIC_JUMBO /*{vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA*/)
- GOTO_invoke(invokeStatic, true, true);
-OP_END
-
-/* File: c/OP_INVOKE_INTERFACE_JUMBO.c */
-HANDLE_OPCODE(OP_INVOKE_INTERFACE_JUMBO /*{vCCCC..v(CCCC+BBBB-1)}, meth@AAAAAAAA*/)
- GOTO_invoke(invokeInterface, true, true);
-OP_END
-
-/* File: c/OP_UNUSED_27FF.c */
-HANDLE_OPCODE(OP_UNUSED_27FF)
-OP_END
-
-/* File: c/OP_UNUSED_28FF.c */
-HANDLE_OPCODE(OP_UNUSED_28FF)
-OP_END
-
-/* File: c/OP_UNUSED_29FF.c */
-HANDLE_OPCODE(OP_UNUSED_29FF)
-OP_END
-
-/* File: c/OP_UNUSED_2AFF.c */
-HANDLE_OPCODE(OP_UNUSED_2AFF)
-OP_END
-
-/* File: c/OP_UNUSED_2BFF.c */
-HANDLE_OPCODE(OP_UNUSED_2BFF)
-OP_END
-
-/* File: c/OP_UNUSED_2CFF.c */
-HANDLE_OPCODE(OP_UNUSED_2CFF)
-OP_END
-
-/* File: c/OP_UNUSED_2DFF.c */
-HANDLE_OPCODE(OP_UNUSED_2DFF)
-OP_END
-
-/* File: c/OP_UNUSED_2EFF.c */
-HANDLE_OPCODE(OP_UNUSED_2EFF)
-OP_END
-
-/* File: c/OP_UNUSED_2FFF.c */
-HANDLE_OPCODE(OP_UNUSED_2FFF)
-OP_END
-
-/* File: c/OP_UNUSED_30FF.c */
-HANDLE_OPCODE(OP_UNUSED_30FF)
-OP_END
-
-/* File: c/OP_UNUSED_31FF.c */
-HANDLE_OPCODE(OP_UNUSED_31FF)
-OP_END
-
-/* File: c/OP_UNUSED_32FF.c */
-HANDLE_OPCODE(OP_UNUSED_32FF)
-OP_END
-
-/* File: c/OP_UNUSED_33FF.c */
-HANDLE_OPCODE(OP_UNUSED_33FF)
-OP_END
-
-/* File: c/OP_UNUSED_34FF.c */
-HANDLE_OPCODE(OP_UNUSED_34FF)
-OP_END
-
-/* File: c/OP_UNUSED_35FF.c */
-HANDLE_OPCODE(OP_UNUSED_35FF)
-OP_END
-
-/* File: c/OP_UNUSED_36FF.c */
-HANDLE_OPCODE(OP_UNUSED_36FF)
-OP_END
-
-/* File: c/OP_UNUSED_37FF.c */
-HANDLE_OPCODE(OP_UNUSED_37FF)
-OP_END
-
-/* File: c/OP_UNUSED_38FF.c */
-HANDLE_OPCODE(OP_UNUSED_38FF)
-OP_END
-
-/* File: c/OP_UNUSED_39FF.c */
-HANDLE_OPCODE(OP_UNUSED_39FF)
-OP_END
-
-/* File: c/OP_UNUSED_3AFF.c */
-HANDLE_OPCODE(OP_UNUSED_3AFF)
-OP_END
-
-/* File: c/OP_UNUSED_3BFF.c */
-HANDLE_OPCODE(OP_UNUSED_3BFF)
-OP_END
-
-/* File: c/OP_UNUSED_3CFF.c */
-HANDLE_OPCODE(OP_UNUSED_3CFF)
-OP_END
-
-/* File: c/OP_UNUSED_3DFF.c */
-HANDLE_OPCODE(OP_UNUSED_3DFF)
-OP_END
-
-/* File: c/OP_UNUSED_3EFF.c */
-HANDLE_OPCODE(OP_UNUSED_3EFF)
-OP_END
-
-/* File: c/OP_UNUSED_3FFF.c */
-HANDLE_OPCODE(OP_UNUSED_3FFF)
-OP_END
-
-/* File: c/OP_UNUSED_40FF.c */
-HANDLE_OPCODE(OP_UNUSED_40FF)
-OP_END
-
-/* File: c/OP_UNUSED_41FF.c */
-HANDLE_OPCODE(OP_UNUSED_41FF)
-OP_END
-
-/* File: c/OP_UNUSED_42FF.c */
-HANDLE_OPCODE(OP_UNUSED_42FF)
-OP_END
-
-/* File: c/OP_UNUSED_43FF.c */
-HANDLE_OPCODE(OP_UNUSED_43FF)
-OP_END
-
-/* File: c/OP_UNUSED_44FF.c */
-HANDLE_OPCODE(OP_UNUSED_44FF)
-OP_END
-
-/* File: c/OP_UNUSED_45FF.c */
-HANDLE_OPCODE(OP_UNUSED_45FF)
-OP_END
-
-/* File: c/OP_UNUSED_46FF.c */
-HANDLE_OPCODE(OP_UNUSED_46FF)
-OP_END
-
-/* File: c/OP_UNUSED_47FF.c */
-HANDLE_OPCODE(OP_UNUSED_47FF)
-OP_END
-
-/* File: c/OP_UNUSED_48FF.c */
-HANDLE_OPCODE(OP_UNUSED_48FF)
-OP_END
-
-/* File: c/OP_UNUSED_49FF.c */
-HANDLE_OPCODE(OP_UNUSED_49FF)
-OP_END
-
-/* File: c/OP_UNUSED_4AFF.c */
-HANDLE_OPCODE(OP_UNUSED_4AFF)
-OP_END
-
-/* File: c/OP_UNUSED_4BFF.c */
-HANDLE_OPCODE(OP_UNUSED_4BFF)
-OP_END
-
-/* File: c/OP_UNUSED_4CFF.c */
-HANDLE_OPCODE(OP_UNUSED_4CFF)
-OP_END
-
-/* File: c/OP_UNUSED_4DFF.c */
-HANDLE_OPCODE(OP_UNUSED_4DFF)
-OP_END
-
-/* File: c/OP_UNUSED_4EFF.c */
-HANDLE_OPCODE(OP_UNUSED_4EFF)
-OP_END
-
-/* File: c/OP_UNUSED_4FFF.c */
-HANDLE_OPCODE(OP_UNUSED_4FFF)
-OP_END
-
-/* File: c/OP_UNUSED_50FF.c */
-HANDLE_OPCODE(OP_UNUSED_50FF)
-OP_END
-
-/* File: c/OP_UNUSED_51FF.c */
-HANDLE_OPCODE(OP_UNUSED_51FF)
-OP_END
-
-/* File: c/OP_UNUSED_52FF.c */
-HANDLE_OPCODE(OP_UNUSED_52FF)
-OP_END
-
-/* File: c/OP_UNUSED_53FF.c */
-HANDLE_OPCODE(OP_UNUSED_53FF)
-OP_END
-
-/* File: c/OP_UNUSED_54FF.c */
-HANDLE_OPCODE(OP_UNUSED_54FF)
-OP_END
-
-/* File: c/OP_UNUSED_55FF.c */
-HANDLE_OPCODE(OP_UNUSED_55FF)
-OP_END
-
-/* File: c/OP_UNUSED_56FF.c */
-HANDLE_OPCODE(OP_UNUSED_56FF)
-OP_END
-
-/* File: c/OP_UNUSED_57FF.c */
-HANDLE_OPCODE(OP_UNUSED_57FF)
-OP_END
-
-/* File: c/OP_UNUSED_58FF.c */
-HANDLE_OPCODE(OP_UNUSED_58FF)
-OP_END
-
-/* File: c/OP_UNUSED_59FF.c */
-HANDLE_OPCODE(OP_UNUSED_59FF)
-OP_END
-
-/* File: c/OP_UNUSED_5AFF.c */
-HANDLE_OPCODE(OP_UNUSED_5AFF)
-OP_END
-
-/* File: c/OP_UNUSED_5BFF.c */
-HANDLE_OPCODE(OP_UNUSED_5BFF)
-OP_END
-
-/* File: c/OP_UNUSED_5CFF.c */
-HANDLE_OPCODE(OP_UNUSED_5CFF)
-OP_END
-
-/* File: c/OP_UNUSED_5DFF.c */
-HANDLE_OPCODE(OP_UNUSED_5DFF)
-OP_END
-
-/* File: c/OP_UNUSED_5EFF.c */
-HANDLE_OPCODE(OP_UNUSED_5EFF)
-OP_END
-
-/* File: c/OP_UNUSED_5FFF.c */
-HANDLE_OPCODE(OP_UNUSED_5FFF)
-OP_END
-
-/* File: c/OP_UNUSED_60FF.c */
-HANDLE_OPCODE(OP_UNUSED_60FF)
-OP_END
-
-/* File: c/OP_UNUSED_61FF.c */
-HANDLE_OPCODE(OP_UNUSED_61FF)
-OP_END
-
-/* File: c/OP_UNUSED_62FF.c */
-HANDLE_OPCODE(OP_UNUSED_62FF)
-OP_END
-
-/* File: c/OP_UNUSED_63FF.c */
-HANDLE_OPCODE(OP_UNUSED_63FF)
-OP_END
-
-/* File: c/OP_UNUSED_64FF.c */
-HANDLE_OPCODE(OP_UNUSED_64FF)
-OP_END
-
-/* File: c/OP_UNUSED_65FF.c */
-HANDLE_OPCODE(OP_UNUSED_65FF)
-OP_END
-
-/* File: c/OP_UNUSED_66FF.c */
-HANDLE_OPCODE(OP_UNUSED_66FF)
-OP_END
-
-/* File: c/OP_UNUSED_67FF.c */
-HANDLE_OPCODE(OP_UNUSED_67FF)
-OP_END
-
-/* File: c/OP_UNUSED_68FF.c */
-HANDLE_OPCODE(OP_UNUSED_68FF)
-OP_END
-
-/* File: c/OP_UNUSED_69FF.c */
-HANDLE_OPCODE(OP_UNUSED_69FF)
-OP_END
-
-/* File: c/OP_UNUSED_6AFF.c */
-HANDLE_OPCODE(OP_UNUSED_6AFF)
-OP_END
-
-/* File: c/OP_UNUSED_6BFF.c */
-HANDLE_OPCODE(OP_UNUSED_6BFF)
-OP_END
-
-/* File: c/OP_UNUSED_6CFF.c */
-HANDLE_OPCODE(OP_UNUSED_6CFF)
-OP_END
-
-/* File: c/OP_UNUSED_6DFF.c */
-HANDLE_OPCODE(OP_UNUSED_6DFF)
-OP_END
-
-/* File: c/OP_UNUSED_6EFF.c */
-HANDLE_OPCODE(OP_UNUSED_6EFF)
-OP_END
-
-/* File: c/OP_UNUSED_6FFF.c */
-HANDLE_OPCODE(OP_UNUSED_6FFF)
-OP_END
-
-/* File: c/OP_UNUSED_70FF.c */
-HANDLE_OPCODE(OP_UNUSED_70FF)
-OP_END
-
-/* File: c/OP_UNUSED_71FF.c */
-HANDLE_OPCODE(OP_UNUSED_71FF)
-OP_END
-
-/* File: c/OP_UNUSED_72FF.c */
-HANDLE_OPCODE(OP_UNUSED_72FF)
-OP_END
-
-/* File: c/OP_UNUSED_73FF.c */
-HANDLE_OPCODE(OP_UNUSED_73FF)
-OP_END
-
-/* File: c/OP_UNUSED_74FF.c */
-HANDLE_OPCODE(OP_UNUSED_74FF)
-OP_END
-
-/* File: c/OP_UNUSED_75FF.c */
-HANDLE_OPCODE(OP_UNUSED_75FF)
-OP_END
-
-/* File: c/OP_UNUSED_76FF.c */
-HANDLE_OPCODE(OP_UNUSED_76FF)
-OP_END
-
-/* File: c/OP_UNUSED_77FF.c */
-HANDLE_OPCODE(OP_UNUSED_77FF)
-OP_END
-
-/* File: c/OP_UNUSED_78FF.c */
-HANDLE_OPCODE(OP_UNUSED_78FF)
-OP_END
-
-/* File: c/OP_UNUSED_79FF.c */
-HANDLE_OPCODE(OP_UNUSED_79FF)
-OP_END
-
-/* File: c/OP_UNUSED_7AFF.c */
-HANDLE_OPCODE(OP_UNUSED_7AFF)
-OP_END
-
-/* File: c/OP_UNUSED_7BFF.c */
-HANDLE_OPCODE(OP_UNUSED_7BFF)
-OP_END
-
-/* File: c/OP_UNUSED_7CFF.c */
-HANDLE_OPCODE(OP_UNUSED_7CFF)
-OP_END
-
-/* File: c/OP_UNUSED_7DFF.c */
-HANDLE_OPCODE(OP_UNUSED_7DFF)
-OP_END
-
-/* File: c/OP_UNUSED_7EFF.c */
-HANDLE_OPCODE(OP_UNUSED_7EFF)
-OP_END
-
-/* File: c/OP_UNUSED_7FFF.c */
-HANDLE_OPCODE(OP_UNUSED_7FFF)
-OP_END
-
-/* File: c/OP_UNUSED_80FF.c */
-HANDLE_OPCODE(OP_UNUSED_80FF)
-OP_END
-
-/* File: c/OP_UNUSED_81FF.c */
-HANDLE_OPCODE(OP_UNUSED_81FF)
-OP_END
-
-/* File: c/OP_UNUSED_82FF.c */
-HANDLE_OPCODE(OP_UNUSED_82FF)
-OP_END
-
-/* File: c/OP_UNUSED_83FF.c */
-HANDLE_OPCODE(OP_UNUSED_83FF)
-OP_END
-
-/* File: c/OP_UNUSED_84FF.c */
-HANDLE_OPCODE(OP_UNUSED_84FF)
-OP_END
-
-/* File: c/OP_UNUSED_85FF.c */
-HANDLE_OPCODE(OP_UNUSED_85FF)
-OP_END
-
-/* File: c/OP_UNUSED_86FF.c */
-HANDLE_OPCODE(OP_UNUSED_86FF)
-OP_END
-
-/* File: c/OP_UNUSED_87FF.c */
-HANDLE_OPCODE(OP_UNUSED_87FF)
-OP_END
-
-/* File: c/OP_UNUSED_88FF.c */
-HANDLE_OPCODE(OP_UNUSED_88FF)
-OP_END
-
-/* File: c/OP_UNUSED_89FF.c */
-HANDLE_OPCODE(OP_UNUSED_89FF)
-OP_END
-
-/* File: c/OP_UNUSED_8AFF.c */
-HANDLE_OPCODE(OP_UNUSED_8AFF)
-OP_END
-
-/* File: c/OP_UNUSED_8BFF.c */
-HANDLE_OPCODE(OP_UNUSED_8BFF)
-OP_END
-
-/* File: c/OP_UNUSED_8CFF.c */
-HANDLE_OPCODE(OP_UNUSED_8CFF)
-OP_END
-
-/* File: c/OP_UNUSED_8DFF.c */
-HANDLE_OPCODE(OP_UNUSED_8DFF)
-OP_END
-
-/* File: c/OP_UNUSED_8EFF.c */
-HANDLE_OPCODE(OP_UNUSED_8EFF)
-OP_END
-
-/* File: c/OP_UNUSED_8FFF.c */
-HANDLE_OPCODE(OP_UNUSED_8FFF)
-OP_END
-
-/* File: c/OP_UNUSED_90FF.c */
-HANDLE_OPCODE(OP_UNUSED_90FF)
-OP_END
-
-/* File: c/OP_UNUSED_91FF.c */
-HANDLE_OPCODE(OP_UNUSED_91FF)
-OP_END
-
-/* File: c/OP_UNUSED_92FF.c */
-HANDLE_OPCODE(OP_UNUSED_92FF)
-OP_END
-
-/* File: c/OP_UNUSED_93FF.c */
-HANDLE_OPCODE(OP_UNUSED_93FF)
-OP_END
-
-/* File: c/OP_UNUSED_94FF.c */
-HANDLE_OPCODE(OP_UNUSED_94FF)
-OP_END
-
-/* File: c/OP_UNUSED_95FF.c */
-HANDLE_OPCODE(OP_UNUSED_95FF)
-OP_END
-
-/* File: c/OP_UNUSED_96FF.c */
-HANDLE_OPCODE(OP_UNUSED_96FF)
-OP_END
-
-/* File: c/OP_UNUSED_97FF.c */
-HANDLE_OPCODE(OP_UNUSED_97FF)
-OP_END
-
-/* File: c/OP_UNUSED_98FF.c */
-HANDLE_OPCODE(OP_UNUSED_98FF)
-OP_END
-
-/* File: c/OP_UNUSED_99FF.c */
-HANDLE_OPCODE(OP_UNUSED_99FF)
-OP_END
-
-/* File: c/OP_UNUSED_9AFF.c */
-HANDLE_OPCODE(OP_UNUSED_9AFF)
-OP_END
-
-/* File: c/OP_UNUSED_9BFF.c */
-HANDLE_OPCODE(OP_UNUSED_9BFF)
-OP_END
-
-/* File: c/OP_UNUSED_9CFF.c */
-HANDLE_OPCODE(OP_UNUSED_9CFF)
-OP_END
-
-/* File: c/OP_UNUSED_9DFF.c */
-HANDLE_OPCODE(OP_UNUSED_9DFF)
-OP_END
-
-/* File: c/OP_UNUSED_9EFF.c */
-HANDLE_OPCODE(OP_UNUSED_9EFF)
-OP_END
-
-/* File: c/OP_UNUSED_9FFF.c */
-HANDLE_OPCODE(OP_UNUSED_9FFF)
-OP_END
-
-/* File: c/OP_UNUSED_A0FF.c */
-HANDLE_OPCODE(OP_UNUSED_A0FF)
-OP_END
-
-/* File: c/OP_UNUSED_A1FF.c */
-HANDLE_OPCODE(OP_UNUSED_A1FF)
-OP_END
-
-/* File: c/OP_UNUSED_A2FF.c */
-HANDLE_OPCODE(OP_UNUSED_A2FF)
-OP_END
-
-/* File: c/OP_UNUSED_A3FF.c */
-HANDLE_OPCODE(OP_UNUSED_A3FF)
-OP_END
-
-/* File: c/OP_UNUSED_A4FF.c */
-HANDLE_OPCODE(OP_UNUSED_A4FF)
-OP_END
-
-/* File: c/OP_UNUSED_A5FF.c */
-HANDLE_OPCODE(OP_UNUSED_A5FF)
-OP_END
-
-/* File: c/OP_UNUSED_A6FF.c */
-HANDLE_OPCODE(OP_UNUSED_A6FF)
-OP_END
-
-/* File: c/OP_UNUSED_A7FF.c */
-HANDLE_OPCODE(OP_UNUSED_A7FF)
-OP_END
-
-/* File: c/OP_UNUSED_A8FF.c */
-HANDLE_OPCODE(OP_UNUSED_A8FF)
-OP_END
-
-/* File: c/OP_UNUSED_A9FF.c */
-HANDLE_OPCODE(OP_UNUSED_A9FF)
-OP_END
-
-/* File: c/OP_UNUSED_AAFF.c */
-HANDLE_OPCODE(OP_UNUSED_AAFF)
-OP_END
-
-/* File: c/OP_UNUSED_ABFF.c */
-HANDLE_OPCODE(OP_UNUSED_ABFF)
-OP_END
-
-/* File: c/OP_UNUSED_ACFF.c */
-HANDLE_OPCODE(OP_UNUSED_ACFF)
-OP_END
-
-/* File: c/OP_UNUSED_ADFF.c */
-HANDLE_OPCODE(OP_UNUSED_ADFF)
-OP_END
-
-/* File: c/OP_UNUSED_AEFF.c */
-HANDLE_OPCODE(OP_UNUSED_AEFF)
-OP_END
-
-/* File: c/OP_UNUSED_AFFF.c */
-HANDLE_OPCODE(OP_UNUSED_AFFF)
-OP_END
-
-/* File: c/OP_UNUSED_B0FF.c */
-HANDLE_OPCODE(OP_UNUSED_B0FF)
-OP_END
-
-/* File: c/OP_UNUSED_B1FF.c */
-HANDLE_OPCODE(OP_UNUSED_B1FF)
-OP_END
-
-/* File: c/OP_UNUSED_B2FF.c */
-HANDLE_OPCODE(OP_UNUSED_B2FF)
-OP_END
-
-/* File: c/OP_UNUSED_B3FF.c */
-HANDLE_OPCODE(OP_UNUSED_B3FF)
-OP_END
-
-/* File: c/OP_UNUSED_B4FF.c */
-HANDLE_OPCODE(OP_UNUSED_B4FF)
-OP_END
-
-/* File: c/OP_UNUSED_B5FF.c */
-HANDLE_OPCODE(OP_UNUSED_B5FF)
-OP_END
-
-/* File: c/OP_UNUSED_B6FF.c */
-HANDLE_OPCODE(OP_UNUSED_B6FF)
-OP_END
-
-/* File: c/OP_UNUSED_B7FF.c */
-HANDLE_OPCODE(OP_UNUSED_B7FF)
-OP_END
-
-/* File: c/OP_UNUSED_B8FF.c */
-HANDLE_OPCODE(OP_UNUSED_B8FF)
-OP_END
-
-/* File: c/OP_UNUSED_B9FF.c */
-HANDLE_OPCODE(OP_UNUSED_B9FF)
-OP_END
-
-/* File: c/OP_UNUSED_BAFF.c */
-HANDLE_OPCODE(OP_UNUSED_BAFF)
-OP_END
-
-/* File: c/OP_UNUSED_BBFF.c */
-HANDLE_OPCODE(OP_UNUSED_BBFF)
-OP_END
-
-/* File: c/OP_UNUSED_BCFF.c */
-HANDLE_OPCODE(OP_UNUSED_BCFF)
-OP_END
-
-/* File: c/OP_UNUSED_BDFF.c */
-HANDLE_OPCODE(OP_UNUSED_BDFF)
-OP_END
-
-/* File: c/OP_UNUSED_BEFF.c */
-HANDLE_OPCODE(OP_UNUSED_BEFF)
-OP_END
-
-/* File: c/OP_UNUSED_BFFF.c */
-HANDLE_OPCODE(OP_UNUSED_BFFF)
-OP_END
-
-/* File: c/OP_UNUSED_C0FF.c */
-HANDLE_OPCODE(OP_UNUSED_C0FF)
-OP_END
-
-/* File: c/OP_UNUSED_C1FF.c */
-HANDLE_OPCODE(OP_UNUSED_C1FF)
-OP_END
-
-/* File: c/OP_UNUSED_C2FF.c */
-HANDLE_OPCODE(OP_UNUSED_C2FF)
-OP_END
-
-/* File: c/OP_UNUSED_C3FF.c */
-HANDLE_OPCODE(OP_UNUSED_C3FF)
-OP_END
-
-/* File: c/OP_UNUSED_C4FF.c */
-HANDLE_OPCODE(OP_UNUSED_C4FF)
-OP_END
-
-/* File: c/OP_UNUSED_C5FF.c */
-HANDLE_OPCODE(OP_UNUSED_C5FF)
-OP_END
-
-/* File: c/OP_UNUSED_C6FF.c */
-HANDLE_OPCODE(OP_UNUSED_C6FF)
-OP_END
-
-/* File: c/OP_UNUSED_C7FF.c */
-HANDLE_OPCODE(OP_UNUSED_C7FF)
-OP_END
-
-/* File: c/OP_UNUSED_C8FF.c */
-HANDLE_OPCODE(OP_UNUSED_C8FF)
-OP_END
-
-/* File: c/OP_UNUSED_C9FF.c */
-HANDLE_OPCODE(OP_UNUSED_C9FF)
-OP_END
-
-/* File: c/OP_UNUSED_CAFF.c */
-HANDLE_OPCODE(OP_UNUSED_CAFF)
-OP_END
-
-/* File: c/OP_UNUSED_CBFF.c */
-HANDLE_OPCODE(OP_UNUSED_CBFF)
-OP_END
-
-/* File: c/OP_UNUSED_CCFF.c */
-HANDLE_OPCODE(OP_UNUSED_CCFF)
-OP_END
-
-/* File: c/OP_UNUSED_CDFF.c */
-HANDLE_OPCODE(OP_UNUSED_CDFF)
-OP_END
-
-/* File: c/OP_UNUSED_CEFF.c */
-HANDLE_OPCODE(OP_UNUSED_CEFF)
-OP_END
-
-/* File: c/OP_UNUSED_CFFF.c */
-HANDLE_OPCODE(OP_UNUSED_CFFF)
-OP_END
-
-/* File: c/OP_UNUSED_D0FF.c */
-HANDLE_OPCODE(OP_UNUSED_D0FF)
-OP_END
-
-/* File: c/OP_UNUSED_D1FF.c */
-HANDLE_OPCODE(OP_UNUSED_D1FF)
-OP_END
-
-/* File: c/OP_UNUSED_D2FF.c */
-HANDLE_OPCODE(OP_UNUSED_D2FF)
-OP_END
-
-/* File: c/OP_UNUSED_D3FF.c */
-HANDLE_OPCODE(OP_UNUSED_D3FF)
-OP_END
-
-/* File: c/OP_UNUSED_D4FF.c */
-HANDLE_OPCODE(OP_UNUSED_D4FF)
-OP_END
-
-/* File: c/OP_UNUSED_D5FF.c */
-HANDLE_OPCODE(OP_UNUSED_D5FF)
-OP_END
-
-/* File: c/OP_UNUSED_D6FF.c */
-HANDLE_OPCODE(OP_UNUSED_D6FF)
-OP_END
-
-/* File: c/OP_UNUSED_D7FF.c */
-HANDLE_OPCODE(OP_UNUSED_D7FF)
-OP_END
-
-/* File: c/OP_UNUSED_D8FF.c */
-HANDLE_OPCODE(OP_UNUSED_D8FF)
-OP_END
-
-/* File: c/OP_UNUSED_D9FF.c */
-HANDLE_OPCODE(OP_UNUSED_D9FF)
-OP_END
-
-/* File: c/OP_UNUSED_DAFF.c */
-HANDLE_OPCODE(OP_UNUSED_DAFF)
-OP_END
-
-/* File: c/OP_UNUSED_DBFF.c */
-HANDLE_OPCODE(OP_UNUSED_DBFF)
-OP_END
-
-/* File: c/OP_UNUSED_DCFF.c */
-HANDLE_OPCODE(OP_UNUSED_DCFF)
-OP_END
-
-/* File: c/OP_UNUSED_DDFF.c */
-HANDLE_OPCODE(OP_UNUSED_DDFF)
-OP_END
-
-/* File: c/OP_UNUSED_DEFF.c */
-HANDLE_OPCODE(OP_UNUSED_DEFF)
-OP_END
-
-/* File: c/OP_UNUSED_DFFF.c */
-HANDLE_OPCODE(OP_UNUSED_DFFF)
-OP_END
-
-/* File: c/OP_UNUSED_E0FF.c */
-HANDLE_OPCODE(OP_UNUSED_E0FF)
-OP_END
-
-/* File: c/OP_UNUSED_E1FF.c */
-HANDLE_OPCODE(OP_UNUSED_E1FF)
-OP_END
-
-/* File: c/OP_UNUSED_E2FF.c */
-HANDLE_OPCODE(OP_UNUSED_E2FF)
-OP_END
-
-/* File: c/OP_UNUSED_E3FF.c */
-HANDLE_OPCODE(OP_UNUSED_E3FF)
-OP_END
-
-/* File: c/OP_UNUSED_E4FF.c */
-HANDLE_OPCODE(OP_UNUSED_E4FF)
-OP_END
-
-/* File: c/OP_UNUSED_E5FF.c */
-HANDLE_OPCODE(OP_UNUSED_E5FF)
-OP_END
-
-/* File: c/OP_UNUSED_E6FF.c */
-HANDLE_OPCODE(OP_UNUSED_E6FF)
-OP_END
-
-/* File: c/OP_UNUSED_E7FF.c */
-HANDLE_OPCODE(OP_UNUSED_E7FF)
-OP_END
-
-/* File: c/OP_UNUSED_E8FF.c */
-HANDLE_OPCODE(OP_UNUSED_E8FF)
-OP_END
-
-/* File: c/OP_UNUSED_E9FF.c */
-HANDLE_OPCODE(OP_UNUSED_E9FF)
-OP_END
-
-/* File: c/OP_UNUSED_EAFF.c */
-HANDLE_OPCODE(OP_UNUSED_EAFF)
-OP_END
-
-/* File: c/OP_UNUSED_EBFF.c */
-HANDLE_OPCODE(OP_UNUSED_EBFF)
-OP_END
-
-/* File: c/OP_UNUSED_ECFF.c */
-HANDLE_OPCODE(OP_UNUSED_ECFF)
-OP_END
-
-/* File: c/OP_UNUSED_EDFF.c */
-HANDLE_OPCODE(OP_UNUSED_EDFF)
-OP_END
-
-/* File: c/OP_UNUSED_EEFF.c */
-HANDLE_OPCODE(OP_UNUSED_EEFF)
-OP_END
-
-/* File: c/OP_UNUSED_EFFF.c */
-HANDLE_OPCODE(OP_UNUSED_EFFF)
-OP_END
-
-/* File: c/OP_UNUSED_F0FF.c */
-HANDLE_OPCODE(OP_UNUSED_F0FF)
-OP_END
-
-/* File: c/OP_UNUSED_F1FF.c */
-HANDLE_OPCODE(OP_UNUSED_F1FF)
- /*
- * In portable interp, most unused opcodes will fall through to here.
- */
- LOGE("unknown opcode 0x%04x\n", inst);
- dvmAbort();
- FINISH(1);
-OP_END
-
-/* File: c/OP_INVOKE_OBJECT_INIT_JUMBO.c */
-HANDLE_OPCODE(OP_INVOKE_OBJECT_INIT_JUMBO /*{vCCCC..vNNNN}, meth@AAAAAAAA*/)
- {
- Object* obj;
-
- vsrc1 = FETCH(4); /* reg number of "this" pointer */
- obj = GET_REGISTER_AS_OBJECT(vsrc1);
-
- if (!checkForNullExportPC(obj, fp, pc))
- GOTO_exceptionThrown();
-
- /*
- * The object should be marked "finalizable" when Object.<init>
- * completes normally. We're going to assume it does complete
- * (by virtue of being nothing but a return-void) and set it now.
- */
- if (IS_CLASS_FLAG_SET(obj->clazz, CLASS_ISFINALIZABLE)) {
- EXPORT_PC();
- dvmSetFinalizable(obj);
- if (dvmGetException(self))
- GOTO_exceptionThrown();
- }
-
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
- /* behave like OP_INVOKE_DIRECT_RANGE */
- GOTO_invoke(invokeDirect, true, true);
- }
-#endif
- FINISH(5);
- }
-OP_END
-
-/* File: c/OP_IGET_VOLATILE_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_VOLATILE_JUMBO, "-volatile/jumbo", IntVolatile, )
-OP_END
-
-/* File: c/OP_IGET_WIDE_VOLATILE_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_WIDE_VOLATILE_JUMBO, "-wide-volatile/jumbo", LongVolatile, _WIDE)
-OP_END
-
-/* File: c/OP_IGET_OBJECT_VOLATILE_JUMBO.c */
-HANDLE_IGET_X_JUMBO(OP_IGET_OBJECT_VOLATILE_JUMBO, "-object-volatile/jumbo", ObjectVolatile, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_IPUT_VOLATILE_JUMBO.c */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_VOLATILE_JUMBO, "-volatile/jumbo", IntVolatile, )
-OP_END
-
-/* File: c/OP_IPUT_WIDE_VOLATILE_JUMBO.c */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_WIDE_VOLATILE_JUMBO, "-wide-volatile/jumbo", LongVolatile, _WIDE)
-OP_END
-
-/* File: c/OP_IPUT_OBJECT_VOLATILE_JUMBO.c */
-HANDLE_IPUT_X_JUMBO(OP_IPUT_OBJECT_VOLATILE_JUMBO, "-object-volatile/jumbo", ObjectVolatile, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_SGET_VOLATILE_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_VOLATILE_JUMBO, "-volatile/jumbo", IntVolatile, )
-OP_END
-
-/* File: c/OP_SGET_WIDE_VOLATILE_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_WIDE_VOLATILE_JUMBO, "-wide-volatile/jumbo", LongVolatile, _WIDE)
-OP_END
-
-/* File: c/OP_SGET_OBJECT_VOLATILE_JUMBO.c */
-HANDLE_SGET_X_JUMBO(OP_SGET_OBJECT_VOLATILE_JUMBO, "-object-volatile/jumbo", ObjectVolatile, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_SPUT_VOLATILE_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_VOLATILE_JUMBO, "-volatile", IntVolatile, )
-OP_END
-
-/* File: c/OP_SPUT_WIDE_VOLATILE_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_WIDE_VOLATILE_JUMBO, "-wide-volatile/jumbo", LongVolatile, _WIDE)
-OP_END
-
-/* File: c/OP_SPUT_OBJECT_VOLATILE_JUMBO.c */
-HANDLE_SPUT_X_JUMBO(OP_SPUT_OBJECT_VOLATILE_JUMBO, "-object-volatile/jumbo", ObjectVolatile, _AS_OBJECT)
-OP_END
-
-/* File: c/OP_THROW_VERIFICATION_ERROR_JUMBO.c */
-HANDLE_OPCODE(OP_THROW_VERIFICATION_ERROR_JUMBO)
- EXPORT_PC();
- vsrc1 = FETCH(3);
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* class/field/method ref */
- dvmThrowVerificationError(curMethod, vsrc1, ref);
- GOTO_exceptionThrown();
-OP_END
-
-/* File: c/gotoTargets.c */
-/*
- * C footer. This has some common code shared by the various targets.
- */
-
-/*
- * Everything from here on is a "goto target". In the basic interpreter
- * we jump into these targets and then jump directly to the handler for
- * next instruction. Here, these are subroutines that return to the caller.
- */
-
-GOTO_TARGET(filledNewArray, bool methodCallRange, bool jumboFormat)
- {
- ClassObject* arrayClass;
- ArrayObject* newArray;
- u4* contents;
- char typeCh;
- int i;
- u4 arg5;
-
- EXPORT_PC();
-
- if (jumboFormat) {
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* class ref */
- vsrc1 = FETCH(3); /* #of elements */
- vdst = FETCH(4); /* range base */
- arg5 = -1; /* silence compiler warning */
- ILOGV("|filled-new-array/jumbo args=%d @0x%08x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- } else {
- ref = FETCH(1); /* class ref */
- vdst = FETCH(2); /* first 4 regs -or- range base */
-
- if (methodCallRange) {
- vsrc1 = INST_AA(inst); /* #of elements */
- arg5 = -1; /* silence compiler warning */
- ILOGV("|filled-new-array-range args=%d @0x%04x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- } else {
- arg5 = INST_A(inst);
- vsrc1 = INST_B(inst); /* #of elements */
- ILOGV("|filled-new-array args=%d @0x%04x {regs=0x%04x %x}",
- vsrc1, ref, vdst, arg5);
- }
- }
-
- /*
- * Resolve the array class.
- */
- arrayClass = dvmDexGetResolvedClass(methodClassDex, ref);
- if (arrayClass == NULL) {
- arrayClass = dvmResolveClass(curMethod->clazz, ref, false);
- if (arrayClass == NULL)
- GOTO_exceptionThrown();
- }
- /*
- if (!dvmIsArrayClass(arrayClass)) {
- dvmThrowRuntimeException(
- "filled-new-array needs array class");
- GOTO_exceptionThrown();
- }
- */
- /* verifier guarantees this is an array class */
- assert(dvmIsArrayClass(arrayClass));
- assert(dvmIsClassInitialized(arrayClass));
-
- /*
- * Create an array of the specified type.
- */
- LOGVV("+++ filled-new-array type is '%s'\n", arrayClass->descriptor);
- typeCh = arrayClass->descriptor[1];
- if (typeCh == 'D' || typeCh == 'J') {
- /* category 2 primitives not allowed */
- dvmThrowRuntimeException("bad filled array req");
- GOTO_exceptionThrown();
- } else if (typeCh != 'L' && typeCh != '[' && typeCh != 'I') {
- /* TODO: requires multiple "fill in" loops with different widths */
- LOGE("non-int primitives not implemented\n");
- dvmThrowInternalError(
- "filled-new-array not implemented for anything but 'int'");
- GOTO_exceptionThrown();
- }
-
- newArray = dvmAllocArrayByClass(arrayClass, vsrc1, ALLOC_DONT_TRACK);
- if (newArray == NULL)
- GOTO_exceptionThrown();
-
- /*
- * Fill in the elements. It's legal for vsrc1 to be zero.
- */
- contents = (u4*) newArray->contents;
- if (methodCallRange) {
- for (i = 0; i < vsrc1; i++)
- contents[i] = GET_REGISTER(vdst+i);
- } else {
- assert(vsrc1 <= 5);
- if (vsrc1 == 5) {
- contents[4] = GET_REGISTER(arg5);
- vsrc1--;
- }
- for (i = 0; i < vsrc1; i++) {
- contents[i] = GET_REGISTER(vdst & 0x0f);
- vdst >>= 4;
- }
- }
- if (typeCh == 'L' || typeCh == '[') {
- dvmWriteBarrierArray(newArray, 0, newArray->length);
- }
-
- retval.l = newArray;
- }
- if (jumboFormat) {
- FINISH(5);
- } else {
- FINISH(3);
- }
-GOTO_TARGET_END
-
-
-GOTO_TARGET(invokeVirtual, bool methodCallRange, bool jumboFormat)
- {
- Method* baseMethod;
- Object* thisPtr;
-
- EXPORT_PC();
-
- if (jumboFormat) {
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* method ref */
- vsrc1 = FETCH(3); /* count */
- vdst = FETCH(4); /* first reg */
- ADJUST_PC(2); /* advance pc partially to make returns easier */
- ILOGV("|invoke-virtual/jumbo args=%d @0x%08x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisPtr = (Object*) GET_REGISTER(vdst);
- } else {
- vsrc1 = INST_AA(inst); /* AA (count) or BA (count + arg 5) */
- ref = FETCH(1); /* method ref */
- vdst = FETCH(2); /* 4 regs -or- first reg */
-
- /*
- * The object against which we are executing a method is always
- * in the first argument.
- */
- if (methodCallRange) {
- assert(vsrc1 > 0);
- ILOGV("|invoke-virtual-range args=%d @0x%04x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisPtr = (Object*) GET_REGISTER(vdst);
- } else {
- assert((vsrc1>>4) > 0);
- ILOGV("|invoke-virtual args=%d @0x%04x {regs=0x%04x %x}",
- vsrc1 >> 4, ref, vdst, vsrc1 & 0x0f);
- thisPtr = (Object*) GET_REGISTER(vdst & 0x0f);
- }
- }
-
- if (!checkForNull(thisPtr))
- GOTO_exceptionThrown();
-
- /*
- * Resolve the method. This is the correct method for the static
- * type of the object. We also verify access permissions here.
- */
- baseMethod = dvmDexGetResolvedMethod(methodClassDex, ref);
- if (baseMethod == NULL) {
- baseMethod = dvmResolveMethod(curMethod->clazz, ref,METHOD_VIRTUAL);
- if (baseMethod == NULL) {
- ILOGV("+ unknown method or access denied\n");
- GOTO_exceptionThrown();
- }
- }
-
- /*
- * Combine the object we found with the vtable offset in the
- * method.
- */
- assert(baseMethod->methodIndex < thisPtr->clazz->vtableCount);
- methodToCall = thisPtr->clazz->vtable[baseMethod->methodIndex];
-
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
-#endif
-
-#if 0
- if (dvmIsAbstractMethod(methodToCall)) {
- /*
- * This can happen if you create two classes, Base and Sub, where
- * Sub is a sub-class of Base. Declare a protected abstract
- * method foo() in Base, and invoke foo() from a method in Base.
- * Base is an "abstract base class" and is never instantiated
- * directly. Now, Override foo() in Sub, and use Sub. This
- * Works fine unless Sub stops providing an implementation of
- * the method.
- */
- dvmThrowAbstractMethodError("abstract method not implemented");
- GOTO_exceptionThrown();
- }
-#else
- assert(!dvmIsAbstractMethod(methodToCall) ||
- methodToCall->nativeFunc != NULL);
-#endif
-
- LOGVV("+++ base=%s.%s virtual[%d]=%s.%s\n",
- baseMethod->clazz->descriptor, baseMethod->name,
- (u4) baseMethod->methodIndex,
- methodToCall->clazz->descriptor, methodToCall->name);
- assert(methodToCall != NULL);
-
-#if 0
- if (vsrc1 != methodToCall->insSize) {
- LOGW("WRONG METHOD: base=%s.%s virtual[%d]=%s.%s\n",
- baseMethod->clazz->descriptor, baseMethod->name,
- (u4) baseMethod->methodIndex,
- methodToCall->clazz->descriptor, methodToCall->name);
- //dvmDumpClass(baseMethod->clazz);
- //dvmDumpClass(methodToCall->clazz);
- dvmDumpAllClasses(0);
- }
-#endif
-
- GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
- }
-GOTO_TARGET_END
-
-GOTO_TARGET(invokeSuper, bool methodCallRange, bool jumboFormat)
- {
- Method* baseMethod;
- u2 thisReg;
-
- EXPORT_PC();
-
- if (jumboFormat) {
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* method ref */
- vsrc1 = FETCH(3); /* count */
- vdst = FETCH(4); /* first reg */
- ADJUST_PC(2); /* advance pc partially to make returns easier */
- ILOGV("|invoke-super/jumbo args=%d @0x%08x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisReg = vdst;
- } else {
- vsrc1 = INST_AA(inst); /* AA (count) or BA (count + arg 5) */
- ref = FETCH(1); /* method ref */
- vdst = FETCH(2); /* 4 regs -or- first reg */
-
- if (methodCallRange) {
- ILOGV("|invoke-super-range args=%d @0x%04x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisReg = vdst;
- } else {
- ILOGV("|invoke-super args=%d @0x%04x {regs=0x%04x %x}",
- vsrc1 >> 4, ref, vdst, vsrc1 & 0x0f);
- thisReg = vdst & 0x0f;
- }
- }
-
- /* impossible in well-formed code, but we must check nevertheless */
- if (!checkForNull((Object*) GET_REGISTER(thisReg)))
- GOTO_exceptionThrown();
-
- /*
- * Resolve the method. This is the correct method for the static
- * type of the object. We also verify access permissions here.
- * The first arg to dvmResolveMethod() is just the referring class
- * (used for class loaders and such), so we don't want to pass
- * the superclass into the resolution call.
- */
- baseMethod = dvmDexGetResolvedMethod(methodClassDex, ref);
- if (baseMethod == NULL) {
- baseMethod = dvmResolveMethod(curMethod->clazz, ref,METHOD_VIRTUAL);
- if (baseMethod == NULL) {
- ILOGV("+ unknown method or access denied\n");
- GOTO_exceptionThrown();
- }
- }
-
- /*
- * Combine the object we found with the vtable offset in the
- * method's class.
- *
- * We're using the current method's class' superclass, not the
- * superclass of "this". This is because we might be executing
- * in a method inherited from a superclass, and we want to run
- * in that class' superclass.
- */
- if (baseMethod->methodIndex >= curMethod->clazz->super->vtableCount) {
- /*
- * Method does not exist in the superclass. Could happen if
- * superclass gets updated.
- */
- dvmThrowNoSuchMethodError(baseMethod->name);
- GOTO_exceptionThrown();
- }
- methodToCall = curMethod->clazz->super->vtable[baseMethod->methodIndex];
-#if 0
- if (dvmIsAbstractMethod(methodToCall)) {
- dvmThrowAbstractMethodError("abstract method not implemented");
- GOTO_exceptionThrown();
- }
-#else
- assert(!dvmIsAbstractMethod(methodToCall) ||
- methodToCall->nativeFunc != NULL);
-#endif
- LOGVV("+++ base=%s.%s super-virtual=%s.%s\n",
- baseMethod->clazz->descriptor, baseMethod->name,
- methodToCall->clazz->descriptor, methodToCall->name);
- assert(methodToCall != NULL);
-
- GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
- }
-GOTO_TARGET_END
-
-GOTO_TARGET(invokeInterface, bool methodCallRange, bool jumboFormat)
- {
- Object* thisPtr;
- ClassObject* thisClass;
-
- EXPORT_PC();
-
- if (jumboFormat) {
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* method ref */
- vsrc1 = FETCH(3); /* count */
- vdst = FETCH(4); /* first reg */
- ADJUST_PC(2); /* advance pc partially to make returns easier */
- ILOGV("|invoke-interface/jumbo args=%d @0x%08x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisPtr = (Object*) GET_REGISTER(vdst);
- } else {
- vsrc1 = INST_AA(inst); /* AA (count) or BA (count + arg 5) */
- ref = FETCH(1); /* method ref */
- vdst = FETCH(2); /* 4 regs -or- first reg */
-
- /*
- * The object against which we are executing a method is always
- * in the first argument.
- */
- if (methodCallRange) {
- assert(vsrc1 > 0);
- ILOGV("|invoke-interface-range args=%d @0x%04x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisPtr = (Object*) GET_REGISTER(vdst);
- } else {
- assert((vsrc1>>4) > 0);
- ILOGV("|invoke-interface args=%d @0x%04x {regs=0x%04x %x}",
- vsrc1 >> 4, ref, vdst, vsrc1 & 0x0f);
- thisPtr = (Object*) GET_REGISTER(vdst & 0x0f);
- }
- }
-
- if (!checkForNull(thisPtr))
- GOTO_exceptionThrown();
-
- thisClass = thisPtr->clazz;
-
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisClass;
-#endif
-
- /*
- * Given a class and a method index, find the Method* with the
- * actual code we want to execute.
- */
- methodToCall = dvmFindInterfaceMethodInCache(thisClass, ref, curMethod,
- methodClassDex);
- if (methodToCall == NULL) {
- assert(dvmCheckException(self));
- GOTO_exceptionThrown();
- }
-
- GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
- }
-GOTO_TARGET_END
-
-GOTO_TARGET(invokeDirect, bool methodCallRange, bool jumboFormat)
- {
- u2 thisReg;
-
- EXPORT_PC();
-
- if (jumboFormat) {
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* method ref */
- vsrc1 = FETCH(3); /* count */
- vdst = FETCH(4); /* first reg */
- ADJUST_PC(2); /* advance pc partially to make returns easier */
- ILOGV("|invoke-direct/jumbo args=%d @0x%08x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisReg = vdst;
- } else {
- vsrc1 = INST_AA(inst); /* AA (count) or BA (count + arg 5) */
- ref = FETCH(1); /* method ref */
- vdst = FETCH(2); /* 4 regs -or- first reg */
-
- if (methodCallRange) {
- ILOGV("|invoke-direct-range args=%d @0x%04x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisReg = vdst;
- } else {
- ILOGV("|invoke-direct args=%d @0x%04x {regs=0x%04x %x}",
- vsrc1 >> 4, ref, vdst, vsrc1 & 0x0f);
- thisReg = vdst & 0x0f;
- }
- }
-
- if (!checkForNull((Object*) GET_REGISTER(thisReg)))
- GOTO_exceptionThrown();
-
- methodToCall = dvmDexGetResolvedMethod(methodClassDex, ref);
- if (methodToCall == NULL) {
- methodToCall = dvmResolveMethod(curMethod->clazz, ref,
- METHOD_DIRECT);
- if (methodToCall == NULL) {
- ILOGV("+ unknown direct method\n"); // should be impossible
- GOTO_exceptionThrown();
- }
- }
- GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
- }
-GOTO_TARGET_END
-
-GOTO_TARGET(invokeStatic, bool methodCallRange, bool jumboFormat)
- EXPORT_PC();
-
- if (jumboFormat) {
- ref = FETCH(1) | (u4)FETCH(2) << 16; /* method ref */
- vsrc1 = FETCH(3); /* count */
- vdst = FETCH(4); /* first reg */
- ADJUST_PC(2); /* advance pc partially to make returns easier */
- ILOGV("|invoke-static/jumbo args=%d @0x%08x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- } else {
- vsrc1 = INST_AA(inst); /* AA (count) or BA (count + arg 5) */
- ref = FETCH(1); /* method ref */
- vdst = FETCH(2); /* 4 regs -or- first reg */
-
- if (methodCallRange)
- ILOGV("|invoke-static-range args=%d @0x%04x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- else
- ILOGV("|invoke-static args=%d @0x%04x {regs=0x%04x %x}",
- vsrc1 >> 4, ref, vdst, vsrc1 & 0x0f);
- }
-
- methodToCall = dvmDexGetResolvedMethod(methodClassDex, ref);
- if (methodToCall == NULL) {
- methodToCall = dvmResolveMethod(curMethod->clazz, ref, METHOD_STATIC);
- if (methodToCall == NULL) {
- ILOGV("+ unknown method\n");
- GOTO_exceptionThrown();
- }
-
- /*
- * The JIT needs dvmDexGetResolvedMethod() to return non-null.
- * Since we use the portable interpreter to build the trace, this extra
- * check is not needed for mterp.
- */
- if (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL) {
- /* Class initialization is still ongoing */
- END_JIT_TSELECT();
- }
- }
- GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
-GOTO_TARGET_END
-
-GOTO_TARGET(invokeVirtualQuick, bool methodCallRange, bool jumboFormat)
- {
- Object* thisPtr;
-
- EXPORT_PC();
-
- vsrc1 = INST_AA(inst); /* AA (count) or BA (count + arg 5) */
- ref = FETCH(1); /* vtable index */
- vdst = FETCH(2); /* 4 regs -or- first reg */
-
- /*
- * The object against which we are executing a method is always
- * in the first argument.
- */
- if (methodCallRange) {
- assert(vsrc1 > 0);
- ILOGV("|invoke-virtual-quick-range args=%d @0x%04x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisPtr = (Object*) GET_REGISTER(vdst);
- } else {
- assert((vsrc1>>4) > 0);
- ILOGV("|invoke-virtual-quick args=%d @0x%04x {regs=0x%04x %x}",
- vsrc1 >> 4, ref, vdst, vsrc1 & 0x0f);
- thisPtr = (Object*) GET_REGISTER(vdst & 0x0f);
- }
-
- if (!checkForNull(thisPtr))
- GOTO_exceptionThrown();
-
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
-#endif
-
- /*
- * Combine the object we found with the vtable offset in the
- * method.
- */
- assert(ref < (unsigned int) thisPtr->clazz->vtableCount);
- methodToCall = thisPtr->clazz->vtable[ref];
-
-#if 0
- if (dvmIsAbstractMethod(methodToCall)) {
- dvmThrowAbstractMethodError("abstract method not implemented");
- GOTO_exceptionThrown();
- }
-#else
- assert(!dvmIsAbstractMethod(methodToCall) ||
- methodToCall->nativeFunc != NULL);
-#endif
-
- LOGVV("+++ virtual[%d]=%s.%s\n",
- ref, methodToCall->clazz->descriptor, methodToCall->name);
- assert(methodToCall != NULL);
-
- GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
- }
-GOTO_TARGET_END
-
-GOTO_TARGET(invokeSuperQuick, bool methodCallRange, bool jumboFormat)
- {
- u2 thisReg;
-
- EXPORT_PC();
-
- vsrc1 = INST_AA(inst); /* AA (count) or BA (count + arg 5) */
- ref = FETCH(1); /* vtable index */
- vdst = FETCH(2); /* 4 regs -or- first reg */
-
- if (methodCallRange) {
- ILOGV("|invoke-super-quick-range args=%d @0x%04x {regs=v%d-v%d}",
- vsrc1, ref, vdst, vdst+vsrc1-1);
- thisReg = vdst;
- } else {
- ILOGV("|invoke-super-quick args=%d @0x%04x {regs=0x%04x %x}",
- vsrc1 >> 4, ref, vdst, vsrc1 & 0x0f);
- thisReg = vdst & 0x0f;
- }
- /* impossible in well-formed code, but we must check nevertheless */
- if (!checkForNull((Object*) GET_REGISTER(thisReg)))
- GOTO_exceptionThrown();
-
-#if 0 /* impossible in optimized + verified code */
- if (ref >= curMethod->clazz->super->vtableCount) {
- dvmThrowNoSuchMethodError(NULL);
- GOTO_exceptionThrown();
- }
-#else
- assert(ref < (unsigned int) curMethod->clazz->super->vtableCount);
-#endif
-
- /*
- * Combine the object we found with the vtable offset in the
- * method's class.
- *
- * We're using the current method's class' superclass, not the
- * superclass of "this". This is because we might be executing
- * in a method inherited from a superclass, and we want to run
- * in the method's class' superclass.
- */
- methodToCall = curMethod->clazz->super->vtable[ref];
-
-#if 0
- if (dvmIsAbstractMethod(methodToCall)) {
- dvmThrowAbstractMethodError("abstract method not implemented");
- GOTO_exceptionThrown();
- }
-#else
- assert(!dvmIsAbstractMethod(methodToCall) ||
- methodToCall->nativeFunc != NULL);
-#endif
- LOGVV("+++ super-virtual[%d]=%s.%s\n",
- ref, methodToCall->clazz->descriptor, methodToCall->name);
- assert(methodToCall != NULL);
-
- GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
- }
-GOTO_TARGET_END
-
-
- /*
- * General handling for return-void, return, and return-wide. Put the
- * return value in "retval" before jumping here.
- */
-GOTO_TARGET(returnFromMethod)
- {
- StackSaveArea* saveArea;
-
- /*
- * We must do this BEFORE we pop the previous stack frame off, so
- * that the GC can see the return value (if any) in the local vars.
- *
- * Since this is now an interpreter switch point, we must do it before
- * we do anything at all.
- */
- PERIODIC_CHECKS(kInterpEntryReturn, 0);
-
- ILOGV("> retval=0x%llx (leaving %s.%s %s)",
- retval.j, curMethod->clazz->descriptor, curMethod->name,
- curMethod->shorty);
- //DUMP_REGS(curMethod, fp);
-
- saveArea = SAVEAREA_FROM_FP(fp);
-
-#ifdef EASY_GDB
- debugSaveArea = saveArea;
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, curMethod);
-#endif
-
- /* back up to previous frame and see if we hit a break */
- fp = (u4*)saveArea->prevFrame;
- assert(fp != NULL);
- if (dvmIsBreakFrame(fp)) {
- /* bail without popping the method frame from stack */
- LOGVV("+++ returned into break frame\n");
-#if defined(WITH_JIT)
- /* Let the Jit know the return is terminating normally */
- CHECK_JIT_VOID();
-#endif
- GOTO_bail();
- }
-
- /* update thread FP, and reset local variables */
- self->curFrame = fp;
- curMethod = SAVEAREA_FROM_FP(fp)->method;
- //methodClass = curMethod->clazz;
- methodClassDex = curMethod->clazz->pDvmDex;
- pc = saveArea->savedPc;
- ILOGD("> (return to %s.%s %s)", curMethod->clazz->descriptor,
- curMethod->name, curMethod->shorty);
-
- /* use FINISH on the caller's invoke instruction */
- //u2 invokeInstr = INST_INST(FETCH(0));
- if (true /*invokeInstr >= OP_INVOKE_VIRTUAL &&
- invokeInstr <= OP_INVOKE_INTERFACE*/)
- {
- FINISH(3);
- } else {
- //LOGE("Unknown invoke instr %02x at %d\n",
- // invokeInstr, (int) (pc - curMethod->insns));
- assert(false);
- }
- }
-GOTO_TARGET_END
-
-
- /*
- * Jump here when the code throws an exception.
- *
- * By the time we get here, the Throwable has been created and the stack
- * trace has been saved off.
- */
-GOTO_TARGET(exceptionThrown)
- {
- Object* exception;
- int catchRelPc;
-
- /*
- * Since this is now an interpreter switch point, we must do it before
- * we do anything at all.
- */
- PERIODIC_CHECKS(kInterpEntryThrow, 0);
-
-#if defined(WITH_JIT)
- // Something threw during trace selection - end the current trace
- END_JIT_TSELECT();
-#endif
- /*
- * We save off the exception and clear the exception status. While
- * processing the exception we might need to load some Throwable
- * classes, and we don't want class loader exceptions to get
- * confused with this one.
- */
- assert(dvmCheckException(self));
- exception = dvmGetException(self);
- dvmAddTrackedAlloc(exception, self);
- dvmClearException(self);
-
- LOGV("Handling exception %s at %s:%d\n",
- exception->clazz->descriptor, curMethod->name,
- dvmLineNumFromPC(curMethod, pc - curMethod->insns));
-
-#if (INTERP_TYPE == INTERP_DBG)
- /*
- * Tell the debugger about it.
- *
- * TODO: if the exception was thrown by interpreted code, control
- * fell through native, and then back to us, we will report the
- * exception at the point of the throw and again here. We can avoid
- * this by not reporting exceptions when we jump here directly from
- * the native call code above, but then we won't report exceptions
- * that were thrown *from* the JNI code (as opposed to *through* it).
- *
- * The correct solution is probably to ignore from-native exceptions
- * here, and have the JNI exception code do the reporting to the
- * debugger.
- */
- if (DEBUGGER_ACTIVE) {
- void* catchFrame;
- catchRelPc = dvmFindCatchBlock(self, pc - curMethod->insns,
- exception, true, &catchFrame);
- dvmDbgPostException(fp, pc - curMethod->insns, catchFrame,
- catchRelPc, exception);
- }
-#endif
-
- /*
- * We need to unroll to the catch block or the nearest "break"
- * frame.
- *
- * A break frame could indicate that we have reached an intermediate
- * native call, or have gone off the top of the stack and the thread
- * needs to exit. Either way, we return from here, leaving the
- * exception raised.
- *
- * If we do find a catch block, we want to transfer execution to
- * that point.
- *
- * Note this can cause an exception while resolving classes in
- * the "catch" blocks.
- */
- catchRelPc = dvmFindCatchBlock(self, pc - curMethod->insns,
- exception, false, (void**)(void*)&fp);
-
- /*
- * Restore the stack bounds after an overflow. This isn't going to
- * be correct in all circumstances, e.g. if JNI code devours the
- * exception this won't happen until some other exception gets
- * thrown. If the code keeps pushing the stack bounds we'll end
- * up aborting the VM.
- *
- * Note we want to do this *after* the call to dvmFindCatchBlock,
- * because that may need extra stack space to resolve exception
- * classes (e.g. through a class loader).
- *
- * It's possible for the stack overflow handling to cause an
- * exception (specifically, class resolution in a "catch" block
- * during the call above), so we could see the thread's overflow
- * flag raised but actually be running in a "nested" interpreter
- * frame. We don't allow doubled-up StackOverflowErrors, so
- * we can check for this by just looking at the exception type
- * in the cleanup function. Also, we won't unroll past the SOE
- * point because the more-recent exception will hit a break frame
- * as it unrolls to here.
- */
- if (self->stackOverflowed)
- dvmCleanupStackOverflow(self, exception);
-
- if (catchRelPc < 0) {
- /* falling through to JNI code or off the bottom of the stack */
-#if DVM_SHOW_EXCEPTION >= 2
- LOGD("Exception %s from %s:%d not caught locally\n",
- exception->clazz->descriptor, dvmGetMethodSourceFile(curMethod),
- dvmLineNumFromPC(curMethod, pc - curMethod->insns));
-#endif
- dvmSetException(self, exception);
- dvmReleaseTrackedAlloc(exception, self);
- GOTO_bail();
- }
-
-#if DVM_SHOW_EXCEPTION >= 3
- {
- const Method* catchMethod = SAVEAREA_FROM_FP(fp)->method;
- LOGD("Exception %s thrown from %s:%d to %s:%d\n",
- exception->clazz->descriptor, dvmGetMethodSourceFile(curMethod),
- dvmLineNumFromPC(curMethod, pc - curMethod->insns),
- dvmGetMethodSourceFile(catchMethod),
- dvmLineNumFromPC(catchMethod, catchRelPc));
- }
-#endif
-
- /*
- * Adjust local variables to match self->curFrame and the
- * updated PC.
- */
- //fp = (u4*) self->curFrame;
- curMethod = SAVEAREA_FROM_FP(fp)->method;
- //methodClass = curMethod->clazz;
- methodClassDex = curMethod->clazz->pDvmDex;
- pc = curMethod->insns + catchRelPc;
- ILOGV("> pc <-- %s.%s %s", curMethod->clazz->descriptor,
- curMethod->name, curMethod->shorty);
- DUMP_REGS(curMethod, fp, false); // show all regs
-
- /*
- * Restore the exception if the handler wants it.
- *
- * The Dalvik spec mandates that, if an exception handler wants to
- * do something with the exception, the first instruction executed
- * must be "move-exception". We can pass the exception along
- * through the thread struct, and let the move-exception instruction
- * clear it for us.
- *
- * If the handler doesn't call move-exception, we don't want to
- * finish here with an exception still pending.
- */
- if (INST_INST(FETCH(0)) == OP_MOVE_EXCEPTION)
- dvmSetException(self, exception);
-
- dvmReleaseTrackedAlloc(exception, self);
- FINISH(0);
- }
-GOTO_TARGET_END
-
-
-
- /*
- * General handling for invoke-{virtual,super,direct,static,interface},
- * including "quick" variants.
- *
- * Set "methodToCall" to the Method we're calling, and "methodCallRange"
- * depending on whether this is a "/range" instruction.
- *
- * For a range call:
- * "vsrc1" holds the argument count (8 bits)
- * "vdst" holds the first argument in the range
- * For a non-range call:
- * "vsrc1" holds the argument count (4 bits) and the 5th argument index
- * "vdst" holds four 4-bit register indices
- *
- * The caller must EXPORT_PC before jumping here, because any method
- * call can throw a stack overflow exception.
- */
-GOTO_TARGET(invokeMethod, bool methodCallRange, const Method* _methodToCall,
- u2 count, u2 regs)
- {
- STUB_HACK(vsrc1 = count; vdst = regs; methodToCall = _methodToCall;);
-
- //printf("range=%d call=%p count=%d regs=0x%04x\n",
- // methodCallRange, methodToCall, count, regs);
- //printf(" --> %s.%s %s\n", methodToCall->clazz->descriptor,
- // methodToCall->name, methodToCall->shorty);
-
- u4* outs;
- int i;
-
- /*
- * Copy args. This may corrupt vsrc1/vdst.
- */
- if (methodCallRange) {
- // could use memcpy or a "Duff's device"; most functions have
- // so few args it won't matter much
- assert(vsrc1 <= curMethod->outsSize);
- assert(vsrc1 == methodToCall->insSize);
- outs = OUTS_FROM_FP(fp, vsrc1);
- for (i = 0; i < vsrc1; i++)
- outs[i] = GET_REGISTER(vdst+i);
- } else {
- u4 count = vsrc1 >> 4;
-
- assert(count <= curMethod->outsSize);
- assert(count == methodToCall->insSize);
- assert(count <= 5);
-
- outs = OUTS_FROM_FP(fp, count);
-#if 0
- if (count == 5) {
- outs[4] = GET_REGISTER(vsrc1 & 0x0f);
- count--;
- }
- for (i = 0; i < (int) count; i++) {
- outs[i] = GET_REGISTER(vdst & 0x0f);
- vdst >>= 4;
- }
-#else
- // This version executes fewer instructions but is larger
- // overall. Seems to be a teensy bit faster.
- assert((vdst >> 16) == 0); // 16 bits -or- high 16 bits clear
- switch (count) {
- case 5:
- outs[4] = GET_REGISTER(vsrc1 & 0x0f);
- case 4:
- outs[3] = GET_REGISTER(vdst >> 12);
- case 3:
- outs[2] = GET_REGISTER((vdst & 0x0f00) >> 8);
- case 2:
- outs[1] = GET_REGISTER((vdst & 0x00f0) >> 4);
- case 1:
- outs[0] = GET_REGISTER(vdst & 0x0f);
- default:
- ;
- }
-#endif
- }
- }
-
- /*
- * (This was originally a "goto" target; I've kept it separate from the
- * stuff above in case we want to refactor things again.)
- *
- * At this point, we have the arguments stored in the "outs" area of
- * the current method's stack frame, and the method to call in
- * "methodToCall". Push a new stack frame.
- */
- {
- StackSaveArea* newSaveArea;
- u4* newFp;
-
- ILOGV("> %s%s.%s %s",
- dvmIsNativeMethod(methodToCall) ? "(NATIVE) " : "",
- methodToCall->clazz->descriptor, methodToCall->name,
- methodToCall->shorty);
-
- newFp = (u4*) SAVEAREA_FROM_FP(fp) - methodToCall->registersSize;
- newSaveArea = SAVEAREA_FROM_FP(newFp);
-
- /* verify that we have enough space */
- if (true) {
- u1* bottom;
- bottom = (u1*) newSaveArea - methodToCall->outsSize * sizeof(u4);
- if (bottom < self->interpStackEnd) {
- /* stack overflow */
- LOGV("Stack overflow on method call (start=%p end=%p newBot=%p(%d) size=%d '%s')\n",
- self->interpStackStart, self->interpStackEnd, bottom,
- (u1*) fp - bottom, self->interpStackSize,
- methodToCall->name);
- dvmHandleStackOverflow(self, methodToCall);
- assert(dvmCheckException(self));
- GOTO_exceptionThrown();
- }
- //LOGD("+++ fp=%p newFp=%p newSave=%p bottom=%p\n",
- // fp, newFp, newSaveArea, bottom);
- }
-
-#ifdef LOG_INSTR
- if (methodToCall->registersSize > methodToCall->insSize) {
- /*
- * This makes valgrind quiet when we print registers that
- * haven't been initialized. Turn it off when the debug
- * messages are disabled -- we want valgrind to report any
- * used-before-initialized issues.
- */
- memset(newFp, 0xcc,
- (methodToCall->registersSize - methodToCall->insSize) * 4);
- }
-#endif
-
-#ifdef EASY_GDB
- newSaveArea->prevSave = SAVEAREA_FROM_FP(fp);
-#endif
- newSaveArea->prevFrame = fp;
- newSaveArea->savedPc = pc;
-#if defined(WITH_JIT)
- newSaveArea->returnAddr = 0;
-#endif
- newSaveArea->method = methodToCall;
-
- if (!dvmIsNativeMethod(methodToCall)) {
- /*
- * "Call" interpreted code. Reposition the PC, update the
- * frame pointer and other local state, and continue.
- */
- curMethod = methodToCall;
- methodClassDex = curMethod->clazz->pDvmDex;
- pc = methodToCall->insns;
- self->curFrame = fp = newFp;
-#ifdef EASY_GDB
- debugSaveArea = SAVEAREA_FROM_FP(newFp);
-#endif
-#if INTERP_TYPE == INTERP_DBG
- debugIsMethodEntry = true; // profiling, debugging
-#endif
- ILOGD("> pc <-- %s.%s %s", curMethod->clazz->descriptor,
- curMethod->name, curMethod->shorty);
- DUMP_REGS(curMethod, fp, true); // show input args
- FINISH(0); // jump to method start
- } else {
- /* set this up for JNI locals, even if not a JNI native */
- newSaveArea->xtra.localRefCookie = self->jniLocalRefTable.segmentState.all;
-
- self->curFrame = newFp;
-
- DUMP_REGS(methodToCall, newFp, true); // show input args
-
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_ENTRY);
- }
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_ENTER(self, methodToCall);
-#endif
-
- {
- ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
- methodToCall->name, methodToCall->shorty);
- }
-
-#if defined(WITH_JIT)
- /* Allow the Jit to end any pending trace building */
- CHECK_JIT_VOID();
-#endif
-
- /*
- * Jump through native call bridge. Because we leave no
- * space for locals on native calls, "newFp" points directly
- * to the method arguments.
- */
- (*methodToCall->nativeFunc)(newFp, &retval, methodToCall, self);
-
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_EXIT);
- }
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, methodToCall);
-#endif
-
- /* pop frame off */
- dvmPopJniLocals(self, newSaveArea);
- self->curFrame = fp;
-
- /*
- * If the native code threw an exception, or interpreted code
- * invoked by the native call threw one and nobody has cleared
- * it, jump to our local exception handling.
- */
- if (dvmCheckException(self)) {
- LOGV("Exception thrown by/below native code\n");
- GOTO_exceptionThrown();
- }
-
- ILOGD("> retval=0x%llx (leaving native)", retval.j);
- ILOGD("> (return from native %s.%s to %s.%s %s)",
- methodToCall->clazz->descriptor, methodToCall->name,
- curMethod->clazz->descriptor, curMethod->name,
- curMethod->shorty);
-
- //u2 invokeInstr = INST_INST(FETCH(0));
- if (true /*invokeInstr >= OP_INVOKE_VIRTUAL &&
- invokeInstr <= OP_INVOKE_INTERFACE*/)
- {
- FINISH(3);
- } else {
- //LOGE("Unknown invoke instr %02x at %d\n",
- // invokeInstr, (int) (pc - curMethod->insns));
- assert(false);
- }
- }
- }
- assert(false); // should not get here
-GOTO_TARGET_END
-
-/* File: portable/enddefs.c */
-/*--- end of opcodes ---*/
-
-#ifndef THREADED_INTERP
- } // end of "switch"
- } // end of "while"
-#endif
-
-bail:
- ILOGD("|-- Leaving interpreter loop"); // note "curMethod" may be NULL
-
- self->retval = retval;
- return false;
-
-bail_switch:
- /*
- * The standard interpreter currently doesn't set or care about the
- * "debugIsMethodEntry" value, so setting this is only of use if we're
- * switching between two "debug" interpreters, which we never do.
- *
- * TODO: figure out if preserving this makes any sense.
- */
-#if INTERP_TYPE == INTERP_DBG
- self->debugIsMethodEntry = debugIsMethodEntry;
-#else
- self->debugIsMethodEntry = false;
-#endif
-
- /* export state changes */
- self->interpSave.method = curMethod;
- self->interpSave.pc = pc;
- self->interpSave.fp = fp;
- /* debugTrackedRefStart doesn't change */
- self->retval = retval; /* need for _entryPoint=ret */
- self->nextMode =
- (INTERP_TYPE == INTERP_STD) ? INTERP_DBG : INTERP_STD;
- LOGVV(" meth='%s.%s' pc=0x%x fp=%p\n",
- curMethod->clazz->descriptor, curMethod->name,
- pc - curMethod->insns, fp);
- return true;
-}
-
diff --git a/vm/mterp/out/InterpC-x86-atom.c b/vm/mterp/out/InterpC-x86-atom.c
index 232ed20..1a3542c 100644
--- a/vm/mterp/out/InterpC-x86-atom.c
+++ b/vm/mterp/out/InterpC-x86-atom.c
@@ -37,20 +37,7 @@
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
*/
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
# define CHECK_BRANCH_OFFSETS
@@ -329,24 +316,6 @@
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
@@ -411,14 +380,6 @@
}
/* File: cstubs/stubdefs.c */
-/* this is a standard (no debug support) interpreter */
-#define INTERP_TYPE INTERP_STD
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-# define CHECK_TRACKED_REFS() ((void)0)
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
-
/*
* In the C mterp stubs, "goto" is a function call followed immediately
* by a return.
@@ -452,6 +413,11 @@
/* ugh */
#define STUB_HACK(x) x
+#if defined(WITH_JIT)
+#define JIT_STUB_HACK(x) x
+#else
+#define JIT_STUB_HACK(x)
+#endif
/*
@@ -471,14 +437,23 @@
/*
* Like the "portable" FINISH, but don't reload "inst", and return to caller
- * when done.
+ * when done. Further, debugger/profiler checks are handled
+ * before handler execution in mterp, so we don't do them here either.
*/
+#if defined(WITH_JIT)
#define FINISH(_offset) { \
ADJUST_PC(_offset); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
+ dvmCheckJit(pc, self); \
+ } \
return; \
}
+#else
+#define FINISH(_offset) { \
+ ADJUST_PC(_offset); \
+ return; \
+ }
+#endif
/*
@@ -513,32 +488,22 @@
} while(false)
/*
- * As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
- * if we need to switch to the other interpreter upon our return.
+ * As a special case, "goto bail" turns into a longjmp.
*/
#define GOTO_bail() \
dvmMterpStdBail(self, false);
-#define GOTO_bail_switch() \
- dvmMterpStdBail(self, true);
/*
* Periodically check for thread suspension.
*
* While we're at it, see if a debugger has attached or the profiler has
- * started. If so, switch to a different "goto" table.
+ * started.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
- self->threadId, (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
/* File: c/opcommon.c */
@@ -648,7 +613,7 @@
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
@@ -663,7 +628,7 @@
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
@@ -1196,9 +1161,12 @@
/*
* The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
+ * Because the portable interpreter is not involved with the JIT
+ * and trace building, we only need the extra check here when this
+ * code is massaged into a stub called from an assembly interpreter.
+ * This is controlled by the JIT_STUB_HACK maco.
*/
+
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
@@ -1213,7 +1181,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1237,7 +1205,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1261,7 +1229,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1285,7 +1253,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1333,7 +1301,6 @@
/* File: c/OP_BREAKPOINT.c */
HANDLE_OPCODE(OP_BREAKPOINT)
-#if (INTERP_TYPE == INTERP_DBG)
{
/*
* Restart this instruction with the original opcode. We do
@@ -1343,7 +1310,7 @@
* for the sake of anything that needs to do disambiguation in a
* common handler with INST_INST.
*
- * The breakpoint itself is handled over in updateDebugger(),
+ * The breakpoint itself is handled over in dvmUpdateDebugger(),
* because we need to detect other events (method entry, single
* step) and report them in the same event packet, and we're not
* yet handling those through breakpoint instructions. By the
@@ -1356,10 +1323,6 @@
inst = INST_REPLACE_OP(inst, originalOpcode);
FINISH_BKPT(originalOpcode);
}
-#else
- LOGE("Breakpoint hit in non-debug interpreter\n");
- dvmAbort();
-#endif
OP_END
/* File: c/OP_EXECUTE_INLINE_RANGE.c */
@@ -1396,13 +1359,13 @@
;
}
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ } else {
+ if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ }
}
FINISH(3);
OP_END
@@ -1430,12 +1393,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, false);
}
-#endif
FINISH(3);
}
OP_END
@@ -1485,12 +1446,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, true);
}
-#endif
FINISH(5);
}
OP_END
@@ -1722,8 +1681,9 @@
assert(baseMethod->methodIndex < thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[baseMethod->methodIndex];
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->methodToCall = methodToCall;
+ self->callsiteClass = thisPtr->clazz;
#endif
#if 0
@@ -1836,6 +1796,7 @@
GOTO_exceptionThrown();
}
methodToCall = curMethod->clazz->super->vtable[baseMethod->methodIndex];
+
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
dvmThrowAbstractMethodError("abstract method not implemented");
@@ -1896,9 +1857,6 @@
thisClass = thisPtr->clazz;
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisClass;
-#endif
/*
* Given a class and a method index, find the Method* with the
@@ -1906,6 +1864,10 @@
*/
methodToCall = dvmFindInterfaceMethodInCache(thisClass, ref, curMethod,
methodClassDex);
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisClass;
+ self->methodToCall = methodToCall;
+#endif
if (methodToCall == NULL) {
assert(dvmCheckException(self));
GOTO_exceptionThrown();
@@ -1992,15 +1954,18 @@
GOTO_exceptionThrown();
}
+#if defined(WITH_JIT) && defined(MTERP_STUB)
/*
* The JIT needs dvmDexGetResolvedMethod() to return non-null.
- * Since we use the portable interpreter to build the trace, this extra
- * check is not needed for mterp.
+ * Include the check if this code is being used as a stub
+ * called from the assembly interpreter.
*/
- if (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL)) {
/* Class initialization is still ongoing */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
}
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
GOTO_TARGET_END
@@ -2034,9 +1999,6 @@
if (!checkForNull(thisPtr))
GOTO_exceptionThrown();
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
-#endif
/*
* Combine the object we found with the vtable offset in the
@@ -2044,6 +2006,10 @@
*/
assert(ref < (unsigned int) thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[ref];
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisPtr->clazz;
+ self->methodToCall = methodToCall;
+#endif
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
@@ -2118,7 +2084,6 @@
LOGVV("+++ super-virtual[%d]=%s.%s\n",
ref, methodToCall->clazz->descriptor, methodToCall->name);
assert(methodToCall != NULL);
-
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
}
GOTO_TARGET_END
@@ -2139,7 +2104,7 @@
* Since this is now an interpreter switch point, we must do it before
* we do anything at all.
*/
- PERIODIC_CHECKS(kInterpEntryReturn, 0);
+ PERIODIC_CHECKS(0);
ILOGV("> retval=0x%llx (leaving %s.%s %s)",
retval.j, curMethod->clazz->descriptor, curMethod->name,
@@ -2151,20 +2116,19 @@
#ifdef EASY_GDB
debugSaveArea = saveArea;
#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, curMethod);
-#endif
/* back up to previous frame and see if we hit a break */
fp = (u4*)saveArea->prevFrame;
assert(fp != NULL);
+
+ /* Handle any special subMode requirements */
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportReturn(self, pc, fp);
+ }
+
if (dvmIsBreakFrame(fp)) {
/* bail without popping the method frame from stack */
LOGVV("+++ returned into break frame\n");
-#if defined(WITH_JIT)
- /* Let the Jit know the return is terminating normally */
- CHECK_JIT_VOID();
-#endif
GOTO_bail();
}
@@ -2203,16 +2167,8 @@
Object* exception;
int catchRelPc;
- /*
- * Since this is now an interpreter switch point, we must do it before
- * we do anything at all.
- */
- PERIODIC_CHECKS(kInterpEntryThrow, 0);
+ PERIODIC_CHECKS(0);
-#if defined(WITH_JIT)
- // Something threw during trace selection - end the current trace
- END_JIT_TSELECT();
-#endif
/*
* We save off the exception and clear the exception status. While
* processing the exception we might need to load some Throwable
@@ -2228,9 +2184,8 @@
exception->clazz->descriptor, curMethod->name,
dvmLineNumFromPC(curMethod, pc - curMethod->insns));
-#if (INTERP_TYPE == INTERP_DBG)
/*
- * Tell the debugger about it.
+ * Report the exception throw to any "subMode" watchers.
*
* TODO: if the exception was thrown by interpreted code, control
* fell through native, and then back to us, we will report the
@@ -2243,14 +2198,9 @@
* here, and have the JNI exception code do the reporting to the
* debugger.
*/
- if (DEBUGGER_ACTIVE) {
- void* catchFrame;
- catchRelPc = dvmFindCatchBlock(self, pc - curMethod->insns,
- exception, true, &catchFrame);
- dvmDbgPostException(fp, pc - curMethod->insns, catchFrame,
- catchRelPc, exception);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportExceptionThrow(self, curMethod, pc, fp);
}
-#endif
/*
* We need to unroll to the catch block or the nearest "break"
@@ -2488,11 +2438,20 @@
#endif
newSaveArea->prevFrame = fp;
newSaveArea->savedPc = pc;
-#if defined(WITH_JIT)
+#if defined(WITH_JIT) && defined(MTERP_STUB)
newSaveArea->returnAddr = 0;
#endif
newSaveArea->method = methodToCall;
+ if (self->interpBreak.ctl.subMode != 0) {
+ /*
+ * We mark ENTER here for both native and non-native
+ * calls. For native calls, we'll mark EXIT on return.
+ * For non-native calls, EXIT is marked in the RETURN op.
+ */
+ dvmReportInvoke(self, methodToCall);
+ }
+
if (!dvmIsNativeMethod(methodToCall)) {
/*
* "Call" interpreted code. Reposition the PC, update the
@@ -2505,9 +2464,7 @@
#ifdef EASY_GDB
debugSaveArea = SAVEAREA_FROM_FP(newFp);
#endif
-#if INTERP_TYPE == INTERP_DBG
- debugIsMethodEntry = true; // profiling, debugging
-#endif
+ self->debugIsMethodEntry = true; // profiling, debugging
ILOGD("> pc <-- %s.%s %s", curMethod->clazz->descriptor,
curMethod->name, curMethod->shorty);
DUMP_REGS(curMethod, fp, true); // show input args
@@ -2520,25 +2477,12 @@
DUMP_REGS(methodToCall, newFp, true); // show input args
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_ENTRY);
- }
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_ENTER(self, methodToCall);
-#endif
-
- {
- ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
- methodToCall->name, methodToCall->shorty);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPreNativeInvoke(pc, self, methodToCall);
}
-#if defined(WITH_JIT)
- /* Allow the Jit to end any pending trace building */
- CHECK_JIT_VOID();
-#endif
+ ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
+ methodToCall->name, methodToCall->shorty);
/*
* Jump through native call bridge. Because we leave no
@@ -2547,15 +2491,9 @@
*/
(*methodToCall->nativeFunc)(newFp, &retval, methodToCall, self);
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_EXIT);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPostNativeInvoke(pc, self, methodToCall);
}
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, methodToCall);
-#endif
/* pop frame off */
dvmPopJniLocals(self, newSaveArea);
diff --git a/vm/mterp/out/InterpC-x86.c b/vm/mterp/out/InterpC-x86.c
index 816477d..eb54a0f 100644
--- a/vm/mterp/out/InterpC-x86.c
+++ b/vm/mterp/out/InterpC-x86.c
@@ -37,20 +37,7 @@
* WITH_TRACKREF_CHECKS
* EASY_GDB
* NDEBUG
- *
- * If THREADED_INTERP is not defined, we use a classic "while true / switch"
- * interpreter. If it is defined, then the tail end of each instruction
- * handler fetches the next instruction and jumps directly to the handler.
- * This increases the size of the "Std" interpreter by about 10%, but
- * provides a speedup of about the same magnitude.
- *
- * There's a "hybrid" approach that uses a goto table instead of a switch
- * statement, avoiding the "is the opcode in range" tests required for switch.
- * The performance is close to the threaded version, and without the 10%
- * size increase, but the benchmark results are off enough that it's not
- * worth adding as a third option.
*/
-#define THREADED_INTERP /* threaded vs. while-loop interpreter */
#ifdef WITH_INSTR_CHECKS /* instruction-level paranoia (slow!) */
# define CHECK_BRANCH_OFFSETS
@@ -329,24 +316,6 @@
#define EXPORT_PC() (SAVEAREA_FROM_FP(fp)->xtra.currentPc = pc)
/*
- * Determine if we need to switch to a different interpreter. "_current"
- * is either INTERP_STD or INTERP_DBG. It should be fixed for a given
- * interpreter generation file, which should remove the outer conditional
- * from the following.
- *
- * If we're building without debug and profiling support, we never switch.
- */
-#if defined(WITH_JIT)
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmJitDebuggerOrProfilerActive() : !dvmJitDebuggerOrProfilerActive() )
-#else
-# define NEED_INTERP_SWITCH(_current) ( \
- (_current == INTERP_STD) ? \
- dvmDebuggerOrProfilerActive() : !dvmDebuggerOrProfilerActive() )
-#endif
-
-/*
* Check to see if "obj" is NULL. If so, throw an exception. Assumes the
* pc has already been exported to the stack.
*
@@ -411,14 +380,6 @@
}
/* File: cstubs/stubdefs.c */
-/* this is a standard (no debug support) interpreter */
-#define INTERP_TYPE INTERP_STD
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-# define CHECK_TRACKED_REFS() ((void)0)
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
-
/*
* In the C mterp stubs, "goto" is a function call followed immediately
* by a return.
@@ -452,6 +413,11 @@
/* ugh */
#define STUB_HACK(x) x
+#if defined(WITH_JIT)
+#define JIT_STUB_HACK(x) x
+#else
+#define JIT_STUB_HACK(x)
+#endif
/*
@@ -471,14 +437,23 @@
/*
* Like the "portable" FINISH, but don't reload "inst", and return to caller
- * when done.
+ * when done. Further, debugger/profiler checks are handled
+ * before handler execution in mterp, so we don't do them here either.
*/
+#if defined(WITH_JIT)
#define FINISH(_offset) { \
ADJUST_PC(_offset); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
+ if (self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) { \
+ dvmCheckJit(pc, self); \
+ } \
return; \
}
+#else
+#define FINISH(_offset) { \
+ ADJUST_PC(_offset); \
+ return; \
+ }
+#endif
/*
@@ -513,32 +488,22 @@
} while(false)
/*
- * As a special case, "goto bail" turns into a longjmp. Use "bail_switch"
- * if we need to switch to the other interpreter upon our return.
+ * As a special case, "goto bail" turns into a longjmp.
*/
#define GOTO_bail() \
dvmMterpStdBail(self, false);
-#define GOTO_bail_switch() \
- dvmMterpStdBail(self, true);
/*
* Periodically check for thread suspension.
*
* While we're at it, see if a debugger has attached or the profiler has
- * started. If so, switch to a different "goto" table.
+ * started.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to STD ep=%d adj=%d\n", \
- self->threadId, (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
/* File: c/opcommon.c */
@@ -648,7 +613,7 @@
branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,v%d,-", (_opname), vsrc1, vsrc2); \
@@ -663,7 +628,7 @@
ILOGV("|if-%s v%d,+0x%04x", (_opname), vsrc1, branchOffset); \
ILOGV("> branch taken"); \
if (branchOffset < 0) \
- PERIODIC_CHECKS(kInterpEntryInstr, branchOffset); \
+ PERIODIC_CHECKS(branchOffset); \
FINISH(branchOffset); \
} else { \
ILOGV("|if-%s v%d,-", (_opname), vsrc1); \
@@ -1196,9 +1161,12 @@
/*
* The JIT needs dvmDexGetResolvedField() to return non-null.
- * Since we use the portable interpreter to build the trace, the extra
- * checks in HANDLE_SGET_X and HANDLE_SPUT_X are not needed for mterp.
+ * Because the portable interpreter is not involved with the JIT
+ * and trace building, we only need the extra check here when this
+ * code is massaged into a stub called from an assembly interpreter.
+ * This is controlled by the JIT_STUB_HACK maco.
*/
+
#define HANDLE_SGET_X(_opcode, _opname, _ftype, _regsize) \
HANDLE_OPCODE(_opcode /*vAA, field@BBBB*/) \
{ \
@@ -1213,7 +1181,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1237,7 +1205,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
SET_REGISTER##_regsize(vdst, dvmGetStaticField##_ftype(sfield)); \
@@ -1261,7 +1229,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1285,7 +1253,7 @@
if (sfield == NULL) \
GOTO_exceptionThrown(); \
if (dvmDexGetResolvedField(methodClassDex, ref) == NULL) { \
- END_JIT_TSELECT(); \
+ JIT_STUB_HACK(dvmJitEndTraceSelect(self,pc)); \
} \
} \
dvmSetStaticField##_ftype(sfield, GET_REGISTER##_regsize(vdst)); \
@@ -1345,13 +1313,13 @@
;
}
-#if INTERP_TYPE == INTERP_DBG
- if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#else
- if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
- GOTO_exceptionThrown();
-#endif
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
+ if (!dvmPerformInlineOp4Dbg(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ } else {
+ if (!dvmPerformInlineOp4Std(arg0, arg1, arg2, arg3, &retval, ref))
+ GOTO_exceptionThrown();
+ }
}
FINISH(3);
OP_END
@@ -1379,12 +1347,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, false);
}
-#endif
FINISH(3);
}
OP_END
@@ -1422,12 +1388,10 @@
GOTO_exceptionThrown();
}
-#if INTERP_TYPE == INTERP_DBG
- if (DEBUGGER_ACTIVE) {
+ if (self->interpBreak.ctl.subMode & kSubModeDebuggerActive) {
/* behave like OP_INVOKE_DIRECT_RANGE */
GOTO_invoke(invokeDirect, true, true);
}
-#endif
FINISH(5);
}
OP_END
@@ -1659,8 +1623,9 @@
assert(baseMethod->methodIndex < thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[baseMethod->methodIndex];
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->methodToCall = methodToCall;
+ self->callsiteClass = thisPtr->clazz;
#endif
#if 0
@@ -1773,6 +1738,7 @@
GOTO_exceptionThrown();
}
methodToCall = curMethod->clazz->super->vtable[baseMethod->methodIndex];
+
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
dvmThrowAbstractMethodError("abstract method not implemented");
@@ -1833,9 +1799,6 @@
thisClass = thisPtr->clazz;
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisClass;
-#endif
/*
* Given a class and a method index, find the Method* with the
@@ -1843,6 +1806,10 @@
*/
methodToCall = dvmFindInterfaceMethodInCache(thisClass, ref, curMethod,
methodClassDex);
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisClass;
+ self->methodToCall = methodToCall;
+#endif
if (methodToCall == NULL) {
assert(dvmCheckException(self));
GOTO_exceptionThrown();
@@ -1929,15 +1896,18 @@
GOTO_exceptionThrown();
}
+#if defined(WITH_JIT) && defined(MTERP_STUB)
/*
* The JIT needs dvmDexGetResolvedMethod() to return non-null.
- * Since we use the portable interpreter to build the trace, this extra
- * check is not needed for mterp.
+ * Include the check if this code is being used as a stub
+ * called from the assembly interpreter.
*/
- if (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL) {
+ if ((self->interpBreak.ctl.subMode & kSubModeJitTraceBuild) &&
+ (dvmDexGetResolvedMethod(methodClassDex, ref) == NULL)) {
/* Class initialization is still ongoing */
- END_JIT_TSELECT();
+ dvmJitEndTraceSelect(self,pc);
}
+#endif
}
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
GOTO_TARGET_END
@@ -1971,9 +1941,6 @@
if (!checkForNull(thisPtr))
GOTO_exceptionThrown();
-#if defined(WITH_JIT) && (INTERP_TYPE == INTERP_DBG)
- callsiteClass = thisPtr->clazz;
-#endif
/*
* Combine the object we found with the vtable offset in the
@@ -1981,6 +1948,10 @@
*/
assert(ref < (unsigned int) thisPtr->clazz->vtableCount);
methodToCall = thisPtr->clazz->vtable[ref];
+#if defined(WITH_JIT) && defined(MTERP_STUB)
+ self->callsiteClass = thisPtr->clazz;
+ self->methodToCall = methodToCall;
+#endif
#if 0
if (dvmIsAbstractMethod(methodToCall)) {
@@ -2055,7 +2026,6 @@
LOGVV("+++ super-virtual[%d]=%s.%s\n",
ref, methodToCall->clazz->descriptor, methodToCall->name);
assert(methodToCall != NULL);
-
GOTO_invokeMethod(methodCallRange, methodToCall, vsrc1, vdst);
}
GOTO_TARGET_END
@@ -2076,7 +2046,7 @@
* Since this is now an interpreter switch point, we must do it before
* we do anything at all.
*/
- PERIODIC_CHECKS(kInterpEntryReturn, 0);
+ PERIODIC_CHECKS(0);
ILOGV("> retval=0x%llx (leaving %s.%s %s)",
retval.j, curMethod->clazz->descriptor, curMethod->name,
@@ -2088,20 +2058,19 @@
#ifdef EASY_GDB
debugSaveArea = saveArea;
#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, curMethod);
-#endif
/* back up to previous frame and see if we hit a break */
fp = (u4*)saveArea->prevFrame;
assert(fp != NULL);
+
+ /* Handle any special subMode requirements */
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportReturn(self, pc, fp);
+ }
+
if (dvmIsBreakFrame(fp)) {
/* bail without popping the method frame from stack */
LOGVV("+++ returned into break frame\n");
-#if defined(WITH_JIT)
- /* Let the Jit know the return is terminating normally */
- CHECK_JIT_VOID();
-#endif
GOTO_bail();
}
@@ -2140,16 +2109,8 @@
Object* exception;
int catchRelPc;
- /*
- * Since this is now an interpreter switch point, we must do it before
- * we do anything at all.
- */
- PERIODIC_CHECKS(kInterpEntryThrow, 0);
+ PERIODIC_CHECKS(0);
-#if defined(WITH_JIT)
- // Something threw during trace selection - end the current trace
- END_JIT_TSELECT();
-#endif
/*
* We save off the exception and clear the exception status. While
* processing the exception we might need to load some Throwable
@@ -2165,9 +2126,8 @@
exception->clazz->descriptor, curMethod->name,
dvmLineNumFromPC(curMethod, pc - curMethod->insns));
-#if (INTERP_TYPE == INTERP_DBG)
/*
- * Tell the debugger about it.
+ * Report the exception throw to any "subMode" watchers.
*
* TODO: if the exception was thrown by interpreted code, control
* fell through native, and then back to us, we will report the
@@ -2180,14 +2140,9 @@
* here, and have the JNI exception code do the reporting to the
* debugger.
*/
- if (DEBUGGER_ACTIVE) {
- void* catchFrame;
- catchRelPc = dvmFindCatchBlock(self, pc - curMethod->insns,
- exception, true, &catchFrame);
- dvmDbgPostException(fp, pc - curMethod->insns, catchFrame,
- catchRelPc, exception);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportExceptionThrow(self, curMethod, pc, fp);
}
-#endif
/*
* We need to unroll to the catch block or the nearest "break"
@@ -2425,11 +2380,20 @@
#endif
newSaveArea->prevFrame = fp;
newSaveArea->savedPc = pc;
-#if defined(WITH_JIT)
+#if defined(WITH_JIT) && defined(MTERP_STUB)
newSaveArea->returnAddr = 0;
#endif
newSaveArea->method = methodToCall;
+ if (self->interpBreak.ctl.subMode != 0) {
+ /*
+ * We mark ENTER here for both native and non-native
+ * calls. For native calls, we'll mark EXIT on return.
+ * For non-native calls, EXIT is marked in the RETURN op.
+ */
+ dvmReportInvoke(self, methodToCall);
+ }
+
if (!dvmIsNativeMethod(methodToCall)) {
/*
* "Call" interpreted code. Reposition the PC, update the
@@ -2442,9 +2406,7 @@
#ifdef EASY_GDB
debugSaveArea = SAVEAREA_FROM_FP(newFp);
#endif
-#if INTERP_TYPE == INTERP_DBG
- debugIsMethodEntry = true; // profiling, debugging
-#endif
+ self->debugIsMethodEntry = true; // profiling, debugging
ILOGD("> pc <-- %s.%s %s", curMethod->clazz->descriptor,
curMethod->name, curMethod->shorty);
DUMP_REGS(curMethod, fp, true); // show input args
@@ -2457,25 +2419,12 @@
DUMP_REGS(methodToCall, newFp, true); // show input args
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_ENTRY);
- }
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_ENTER(self, methodToCall);
-#endif
-
- {
- ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
- methodToCall->name, methodToCall->shorty);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPreNativeInvoke(pc, self, methodToCall);
}
-#if defined(WITH_JIT)
- /* Allow the Jit to end any pending trace building */
- CHECK_JIT_VOID();
-#endif
+ ILOGD("> native <-- %s.%s %s", methodToCall->clazz->descriptor,
+ methodToCall->name, methodToCall->shorty);
/*
* Jump through native call bridge. Because we leave no
@@ -2484,15 +2433,9 @@
*/
(*methodToCall->nativeFunc)(newFp, &retval, methodToCall, self);
-#if (INTERP_TYPE == INTERP_DBG)
- if (DEBUGGER_ACTIVE) {
- dvmDbgPostLocationEvent(methodToCall, -1,
- dvmGetThisPtr(curMethod, fp), DBG_METHOD_EXIT);
+ if (self->interpBreak.ctl.subMode != 0) {
+ dvmReportPostNativeInvoke(pc, self, methodToCall);
}
-#endif
-#if (INTERP_TYPE == INTERP_DBG)
- TRACE_METHOD_EXIT(self, methodToCall);
-#endif
/* pop frame off */
dvmPopJniLocals(self, newSaveArea);
diff --git a/vm/mterp/portable/debug.c b/vm/mterp/portable/debug.c
deleted file mode 100644
index e9fe72b..0000000
--- a/vm/mterp/portable/debug.c
+++ /dev/null
@@ -1,239 +0,0 @@
-/* code in here is only included in portable-debug interpreter */
-
-/*
- * Update the debugger on interesting events, such as hitting a breakpoint
- * or a single-step point. This is called from the top of the interpreter
- * loop, before the current instruction is processed.
- *
- * Set "methodEntry" if we've just entered the method. This detects
- * method exit by checking to see if the next instruction is "return".
- *
- * This can't catch native method entry/exit, so we have to handle that
- * at the point of invocation. We also need to catch it in dvmCallMethod
- * if we want to capture native->native calls made through JNI.
- *
- * Notes to self:
- * - Don't want to switch to VMWAIT while posting events to the debugger.
- * Let the debugger code decide if we need to change state.
- * - We may want to check for debugger-induced thread suspensions on
- * every instruction. That would make a "suspend all" more responsive
- * and reduce the chances of multiple simultaneous events occurring.
- * However, it could change the behavior some.
- *
- * TODO: method entry/exit events are probably less common than location
- * breakpoints. We may be able to speed things up a bit if we don't query
- * the event list unless we know there's at least one lurking within.
- */
-static void updateDebugger(const Method* method, const u2* pc, const u4* fp,
- bool methodEntry, Thread* self)
-{
- int eventFlags = 0;
-
- /*
- * Update xtra.currentPc on every instruction. We need to do this if
- * there's a chance that we could get suspended. This can happen if
- * eventFlags != 0 here, or somebody manually requests a suspend
- * (which gets handled at PERIOD_CHECKS time). One place where this
- * needs to be correct is in dvmAddSingleStep().
- */
- EXPORT_PC();
-
- if (methodEntry)
- eventFlags |= DBG_METHOD_ENTRY;
-
- /*
- * See if we have a breakpoint here.
- *
- * Depending on the "mods" associated with event(s) on this address,
- * we may or may not actually send a message to the debugger.
- */
- if (INST_INST(*pc) == OP_BREAKPOINT) {
- LOGV("+++ breakpoint hit at %p\n", pc);
- eventFlags |= DBG_BREAKPOINT;
- }
-
- /*
- * If the debugger is single-stepping one of our threads, check to
- * see if we're that thread and we've reached a step point.
- */
- const StepControl* pCtrl = &gDvm.stepControl;
- if (pCtrl->active && pCtrl->thread == self) {
- int frameDepth;
- bool doStop = false;
- const char* msg = NULL;
-
- assert(!dvmIsNativeMethod(method));
-
- if (pCtrl->depth == SD_INTO) {
- /*
- * Step into method calls. We break when the line number
- * or method pointer changes. If we're in SS_MIN mode, we
- * always stop.
- */
- if (pCtrl->method != method) {
- doStop = true;
- msg = "new method";
- } else if (pCtrl->size == SS_MIN) {
- doStop = true;
- msg = "new instruction";
- } else if (!dvmAddressSetGet(
- pCtrl->pAddressSet, pc - method->insns)) {
- doStop = true;
- msg = "new line";
- }
- } else if (pCtrl->depth == SD_OVER) {
- /*
- * Step over method calls. We break when the line number is
- * different and the frame depth is <= the original frame
- * depth. (We can't just compare on the method, because we
- * might get unrolled past it by an exception, and it's tricky
- * to identify recursion.)
- */
- frameDepth = dvmComputeVagueFrameDepth(self, fp);
- if (frameDepth < pCtrl->frameDepth) {
- /* popped up one or more frames, always trigger */
- doStop = true;
- msg = "method pop";
- } else if (frameDepth == pCtrl->frameDepth) {
- /* same depth, see if we moved */
- if (pCtrl->size == SS_MIN) {
- doStop = true;
- msg = "new instruction";
- } else if (!dvmAddressSetGet(pCtrl->pAddressSet,
- pc - method->insns)) {
- doStop = true;
- msg = "new line";
- }
- }
- } else {
- assert(pCtrl->depth == SD_OUT);
- /*
- * Return from the current method. We break when the frame
- * depth pops up.
- *
- * This differs from the "method exit" break in that it stops
- * with the PC at the next instruction in the returned-to
- * function, rather than the end of the returning function.
- */
- frameDepth = dvmComputeVagueFrameDepth(self, fp);
- if (frameDepth < pCtrl->frameDepth) {
- doStop = true;
- msg = "method pop";
- }
- }
-
- if (doStop) {
- LOGV("#####S %s\n", msg);
- eventFlags |= DBG_SINGLE_STEP;
- }
- }
-
- /*
- * Check to see if this is a "return" instruction. JDWP says we should
- * send the event *after* the code has been executed, but it also says
- * the location we provide is the last instruction. Since the "return"
- * instruction has no interesting side effects, we should be safe.
- * (We can't just move this down to the returnFromMethod label because
- * we potentially need to combine it with other events.)
- *
- * We're also not supposed to generate a method exit event if the method
- * terminates "with a thrown exception".
- */
- u2 inst = INST_INST(FETCH(0));
- if (inst == OP_RETURN_VOID || inst == OP_RETURN || inst == OP_RETURN_WIDE ||
- inst == OP_RETURN_OBJECT)
- {
- eventFlags |= DBG_METHOD_EXIT;
- }
-
- /*
- * If there's something interesting going on, see if it matches one
- * of the debugger filters.
- */
- if (eventFlags != 0) {
- Object* thisPtr = dvmGetThisPtr(method, fp);
- if (thisPtr != NULL && !dvmIsValidObject(thisPtr)) {
- /*
- * TODO: remove this check if we're confident that the "this"
- * pointer is where it should be -- slows us down, especially
- * during single-step.
- */
- char* desc = dexProtoCopyMethodDescriptor(&method->prototype);
- LOGE("HEY: invalid 'this' ptr %p (%s.%s %s)\n", thisPtr,
- method->clazz->descriptor, method->name, desc);
- free(desc);
- dvmAbort();
- }
- dvmDbgPostLocationEvent(method, pc - method->insns, thisPtr,
- eventFlags);
- }
-}
-
-/*
- * Perform some operations at the "top" of the interpreter loop.
- * This stuff is required to support debugging and profiling.
- *
- * Using" __attribute__((noinline))" seems to do more harm than good. This
- * is best when inlined due to the large number of parameters, most of
- * which are local vars in the main interp loop.
- */
-static void checkDebugAndProf(const u2* pc, const u4* fp, Thread* self,
- const Method* method, bool* pIsMethodEntry)
-{
- /* check to see if we've run off end of method */
- assert(pc >= method->insns && pc <
- method->insns + dvmGetMethodInsnsSize(method));
-
-#if 0
- /*
- * When we hit a specific method, enable verbose instruction logging.
- * Sometimes it's helpful to use the debugger attach as a trigger too.
- */
- if (*pIsMethodEntry) {
- static const char* cd = "Landroid/test/Arithmetic;";
- static const char* mn = "shiftTest2";
- static const char* sg = "()V";
-
- if (/*DEBUGGER_ACTIVE &&*/
- strcmp(method->clazz->descriptor, cd) == 0 &&
- strcmp(method->name, mn) == 0 &&
- strcmp(method->shorty, sg) == 0)
- {
- LOGW("Reached %s.%s, enabling verbose mode\n",
- method->clazz->descriptor, method->name);
- android_setMinPriority(LOG_TAG"i", ANDROID_LOG_VERBOSE);
- dumpRegs(method, fp, true);
- }
-
- if (!DEBUGGER_ACTIVE)
- *pIsMethodEntry = false;
- }
-#endif
-
- /*
- * If the debugger is attached, check for events. If the profiler is
- * enabled, update that too.
- *
- * This code is executed for every instruction we interpret, so for
- * performance we use a couple of #ifdef blocks instead of runtime tests.
- */
- bool isEntry = *pIsMethodEntry;
- if (isEntry) {
- *pIsMethodEntry = false;
- TRACE_METHOD_ENTER(self, method);
- }
- if (DEBUGGER_ACTIVE) {
- updateDebugger(method, pc, fp, isEntry, self);
- }
- if (gDvm.instructionCountEnableCount != 0) {
- /*
- * Count up the #of executed instructions. This isn't synchronized
- * for thread-safety; if we need that we should make this
- * thread-local and merge counts into the global area when threads
- * exit (perhaps suspending all other threads GC-style and pulling
- * the data out of them).
- */
- int inst = *pc & 0xff;
- gDvm.executedInstrCounts[inst]++;
- }
-}
diff --git a/vm/mterp/portable/enddefs.c b/vm/mterp/portable/enddefs.c
index 6f28d8b..5c4af52 100644
--- a/vm/mterp/portable/enddefs.c
+++ b/vm/mterp/portable/enddefs.c
@@ -1,40 +1,7 @@
/*--- end of opcodes ---*/
-#ifndef THREADED_INTERP
- } // end of "switch"
- } // end of "while"
-#endif
-
bail:
ILOGD("|-- Leaving interpreter loop"); // note "curMethod" may be NULL
self->retval = retval;
- return false;
-
-bail_switch:
- /*
- * The standard interpreter currently doesn't set or care about the
- * "debugIsMethodEntry" value, so setting this is only of use if we're
- * switching between two "debug" interpreters, which we never do.
- *
- * TODO: figure out if preserving this makes any sense.
- */
-#if INTERP_TYPE == INTERP_DBG
- self->debugIsMethodEntry = debugIsMethodEntry;
-#else
- self->debugIsMethodEntry = false;
-#endif
-
- /* export state changes */
- self->interpSave.method = curMethod;
- self->interpSave.pc = pc;
- self->interpSave.fp = fp;
- /* debugTrackedRefStart doesn't change */
- self->retval = retval; /* need for _entryPoint=ret */
- self->nextMode =
- (INTERP_TYPE == INTERP_STD) ? INTERP_DBG : INTERP_STD;
- LOGVV(" meth='%s.%s' pc=0x%x fp=%p\n",
- curMethod->clazz->descriptor, curMethod->name,
- pc - curMethod->insns, fp);
- return true;
}
diff --git a/vm/mterp/portable/entry.c b/vm/mterp/portable/entry.c
index c3139ee..fa1b4a8 100644
--- a/vm/mterp/portable/entry.c
+++ b/vm/mterp/portable/entry.c
@@ -3,15 +3,11 @@
*
* This was written with an ARM implementation in mind.
*/
-bool INTERP_FUNC_NAME(Thread* self)
+void dvmInterpretPortable(Thread* self)
{
#if defined(EASY_GDB)
StackSaveArea* debugSaveArea = SAVEAREA_FROM_FP(self->curFrame);
#endif
-#if INTERP_TYPE == INTERP_DBG
- bool debugIsMethodEntry = false;
- debugIsMethodEntry = self->debugIsMethodEntry;
-#endif
#if defined(WITH_TRACKREF_CHECKS)
int debugTrackedRefStart = self->interpSave.debugTrackedRefStart;
#endif
@@ -32,46 +28,8 @@
bool jumboFormat;
-#if defined(THREADED_INTERP)
/* static computed goto table */
DEFINE_GOTO_TABLE(handlerTable);
-#endif
-
-#if defined(WITH_JIT)
-#if 0
- LOGD("*DebugInterp - entrypoint is %d, tgt is 0x%x, %s\n",
- self->entryPoint,
- self->interpSave.pc,
- self->interpSave.method->name);
-#endif
-#if INTERP_TYPE == INTERP_DBG
- const ClassObject* callsiteClass = NULL;
-
-#if defined(WITH_SELF_VERIFICATION)
- if (self->jitState != kJitSelfVerification) {
- self->shadowSpace->jitExitState = kSVSIdle;
- }
-#endif
-
- /* Check to see if we've got a trace selection request. */
- if (
- /*
- * Only perform dvmJitCheckTraceRequest if the entry point is
- * EntryInstr and the jit state is either kJitTSelectRequest or
- * kJitTSelectRequestHot. If debugger/profiler happens to be attached,
- * dvmJitCheckTraceRequest will change the jitState to kJitDone but
- * but stay in the dbg interpreter.
- */
- (self->entryPoint == kInterpEntryInstr) &&
- (self->jitState == kJitTSelectRequest ||
- self->jitState == kJitTSelectRequestHot) &&
- dvmJitCheckTraceRequest(self)) {
- self->nextMode = INTERP_STD;
- //LOGD("Invalid trace request, exiting\n");
- return true;
- }
-#endif /* INTERP_TYPE == INTERP_DBG */
-#endif /* WITH_JIT */
/* copy state in */
curMethod = self->interpSave.method;
@@ -81,48 +39,23 @@
methodClassDex = curMethod->clazz->pDvmDex;
- LOGVV("threadid=%d: entry(%s) %s.%s pc=0x%x fp=%p ep=%d\n",
- self->threadId, (self->nextMode == INTERP_STD) ? "STD" : "DBG",
- curMethod->clazz->descriptor, curMethod->name, pc - curMethod->insns,
- fp, self->entryPoint);
+ LOGVV("threadid=%d: %s.%s pc=0x%x fp=%p\n",
+ self->threadId, curMethod->clazz->descriptor, curMethod->name,
+ pc - curMethod->insns, fp);
/*
* DEBUG: scramble this to ensure we're not relying on it.
*/
methodToCall = (const Method*) -1;
-#if INTERP_TYPE == INTERP_DBG
- if (debugIsMethodEntry) {
+#if 0
+ if (self->debugIsMethodEntry) {
ILOGD("|-- Now interpreting %s.%s", curMethod->clazz->descriptor,
curMethod->name);
DUMP_REGS(curMethod, self->interpSave.fp, false);
}
#endif
- switch (self->entryPoint) {
- case kInterpEntryInstr:
- /* just fall through to instruction loop or threaded kickstart */
- break;
- case kInterpEntryReturn:
- CHECK_JIT_VOID();
- goto returnFromMethod;
- case kInterpEntryThrow:
- goto exceptionThrown;
- default:
- dvmAbort();
- }
-
-#ifdef THREADED_INTERP
FINISH(0); /* fetch and execute first instruction */
-#else
- while (1) {
- CHECK_DEBUG_AND_PROF(); /* service debugger and profiling */
- CHECK_TRACKED_REFS(); /* check local reference tracking */
-
- /* fetch the next 16 bits from the instruction stream */
- inst = FETCH(0);
-
- switch (INST_INST(inst)) {
-#endif
/*--- start of opcodes ---*/
diff --git a/vm/mterp/portable/portdbg.c b/vm/mterp/portable/portdbg.c
deleted file mode 100644
index 4334627..0000000
--- a/vm/mterp/portable/portdbg.c
+++ /dev/null
@@ -1,17 +0,0 @@
-#define INTERP_FUNC_NAME dvmInterpretDbg
-#define INTERP_TYPE INTERP_DBG
-
-#define CHECK_DEBUG_AND_PROF() \
- checkDebugAndProf(pc, fp, self, curMethod, &debugIsMethodEntry)
-
-#if defined(WITH_JIT)
-#define CHECK_JIT_BOOL() (dvmCheckJit(pc, self, callsiteClass,\
- methodToCall))
-#define CHECK_JIT_VOID() (dvmCheckJit(pc, self, callsiteClass,\
- methodToCall))
-#define END_JIT_TSELECT() (dvmJitEndTraceSelect(self))
-#else
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT(x) ((void)0)
-#endif
diff --git a/vm/mterp/portable/portstd.c b/vm/mterp/portable/portstd.c
deleted file mode 100644
index 1c2b4ea..0000000
--- a/vm/mterp/portable/portstd.c
+++ /dev/null
@@ -1,8 +0,0 @@
-#define INTERP_FUNC_NAME dvmInterpretStd
-#define INTERP_TYPE INTERP_STD
-
-#define CHECK_DEBUG_AND_PROF() ((void)0)
-
-#define CHECK_JIT_BOOL() (false)
-#define CHECK_JIT_VOID()
-#define END_JIT_TSELECT() ((void)0)
diff --git a/vm/mterp/portable/stubdefs.c b/vm/mterp/portable/stubdefs.c
index 84bb6d3..e0523c8 100644
--- a/vm/mterp/portable/stubdefs.c
+++ b/vm/mterp/portable/stubdefs.c
@@ -11,6 +11,7 @@
/* ugh */
#define STUB_HACK(x)
+#define JIT_STUB_HACK(x)
/*
* Instruction framing. For a switch-oriented implementation this is
@@ -19,18 +20,15 @@
*
* Assumes the existence of "const u2* pc" and (for threaded operation)
* "u2 inst".
- *
- * TODO: remove "switch" version.
*/
-#ifdef THREADED_INTERP
# define H(_op) &&op_##_op
# define HANDLE_OPCODE(_op) op_##_op:
# define FINISH(_offset) { \
ADJUST_PC(_offset); \
inst = FETCH(0); \
- CHECK_DEBUG_AND_PROF(); \
- CHECK_TRACKED_REFS(); \
- if (CHECK_JIT_BOOL()) GOTO_bail_switch(); \
+ if (self->interpBreak.ctl.subMode) { \
+ dvmCheckBefore(pc, fp, self); \
+ } \
goto *handlerTable[INST_INST(inst)]; \
}
# define FINISH_BKPT(_opcode) { \
@@ -39,23 +37,9 @@
# define DISPATCH_EXTENDED(_opcode) { \
goto *handlerTable[0x100 + _opcode]; \
}
-#else
-# define HANDLE_OPCODE(_op) case _op:
-# define FINISH(_offset) { ADJUST_PC(_offset); break; }
-# define FINISH_BKPT(opcode) { > not implemented < }
-# define DISPATCH_EXTENDED(opcode) goto case (0x100 + opcode);
-#endif
#define OP_END
-#if defined(WITH_TRACKREF_CHECKS)
-# define CHECK_TRACKED_REFS() \
- dvmInterpCheckTrackedRefs(self, curMethod, debugTrackedRefStart)
-#else
-# define CHECK_TRACKED_REFS() ((void)0)
-#endif
-
-
/*
* The "goto" targets just turn into goto statements. The "arguments" are
* passed through local variables.
@@ -76,7 +60,6 @@
#define GOTO_invokeMethod(_methodCallRange, _methodToCall, _vsrc1, _vdst) goto invokeMethod;
#define GOTO_bail() goto bail;
-#define GOTO_bail_switch() goto bail_switch;
/*
* Periodically check for thread suspension.
@@ -84,18 +67,9 @@
* While we're at it, see if a debugger has attached or the profiler has
* started. If so, switch to a different "goto" table.
*/
-#define PERIODIC_CHECKS(_entryPoint, _pcadj) { \
+#define PERIODIC_CHECKS(_pcadj) { \
if (dvmCheckSuspendQuick(self)) { \
EXPORT_PC(); /* need for precise GC */ \
dvmCheckSuspendPending(self); \
} \
- if (NEED_INTERP_SWITCH(INTERP_TYPE)) { \
- ADJUST_PC(_pcadj); \
- self->entryPoint = _entryPoint; \
- LOGVV("threadid=%d: switch to %s ep=%d adj=%d\n", \
- self->threadId, \
- (self->nextMode == INTERP_STD) ? "STD" : "DBG", \
- (_entryPoint), (_pcadj)); \
- GOTO_bail_switch(); \
- } \
}
diff --git a/vm/mterp/rebuild.sh b/vm/mterp/rebuild.sh
index 8957926..2014324 100755
--- a/vm/mterp/rebuild.sh
+++ b/vm/mterp/rebuild.sh
@@ -20,10 +20,10 @@
#
set -e
-for arch in portstd portdbg allstubs armv5te armv5te-vfp armv7-a armv7-a-neon x86 x86-atom; do TARGET_ARCH_EXT=$arch make -f Makefile-mterp; done
+for arch in portable allstubs armv5te armv5te-vfp armv7-a armv7-a-neon x86 x86-atom; do TARGET_ARCH_EXT=$arch make -f Makefile-mterp; done
# These aren't actually used, so just go ahead and remove them. The correct
# approach is to prevent them from being generated in the first place, but
# this will do for now.
echo Removing unneeded assembly source for portable interpreter
-rm -f out/InterpAsm-portstd.S out/InterpAsm-portdbg.S
+rm -f out/InterpAsm-portable.S
diff --git a/vm/mterp/x86-atom/TODO.txt b/vm/mterp/x86-atom/TODO.txt
index da00bda..a16f857 100644
--- a/vm/mterp/x86-atom/TODO.txt
+++ b/vm/mterp/x86-atom/TODO.txt
@@ -3,18 +3,19 @@
(hi) Add gc card marking to aput/iput/sput/new_filled_array
(hi) Correct stack overflow handling (dvmCleanupStackOverflow takes an
additional argument now)
-(hi) "debugger active" test in common_periodicChecks must handle
- the case where glue->pDebuggerActive is a NULL pointer (used to
- skip a memory load when debugger support is completely disabled)
(hi) WITH_DEBUGGER and WITH_PROFILER are no longer defined (but are
assumed to be enabled)
(hi) Implement OP_DISPATCH_FF for real. (Right now it's treated as
an unused instruction.)
(hi) Rename dvmJitGetCodeAddr to dvmJitGetTraceAddr.
(hi) Remove references to rGLUE and replace with rSELF
-(hi) Rework footer.s's suspend check to reflect suspendCount change
(hi) Rework interpreter to co-exist the new switching model which
- elminiates a separate debug interpreter.
+ elminiates a separate debug interpreter. Needs a dedicated
+ rIBASE register (or alternate switching model with variable
+ handler base).
+(hi) Add dvmReportXXXX()" calls in footer.c to support profilers &
+ debuggers.
+(hi) Set self->debugIsMethodEntry in invoke code.
(md) Add implementations for jumbo opcodes (40 instructions) and
their volatile variants (13 instructions)
diff --git a/vm/mterp/x86/OP_BREAKPOINT.S b/vm/mterp/x86/OP_BREAKPOINT.S
index 31d98c1..6da9957 100644
--- a/vm/mterp/x86/OP_BREAKPOINT.S
+++ b/vm/mterp/x86/OP_BREAKPOINT.S
@@ -1 +1,19 @@
-%include "x86/unused.S"
+%verify "executed"
+ /*
+ * Breakpoint handler.
+ *
+ * Restart this instruction with the original opcode. By
+ * the time we get here, the breakpoint will have already been
+ * handled. We also assume that all other special "checkBefore"
+ * actions have been handled, so we'll transition directly
+ * to the real handler
+ */
+ SPILL(rIBASE)
+ movl rPC,OUT_ARG0(%esp)
+ call dvmGetOriginalOpcode
+ UNSPILL(rIBASE)
+ movl rSELF,%ecx
+ movzbl 1(rPC),rINST
+ movl offThread_mainHandlerTable(%ecx),%ecx
+ jmp *(%ecx,%eax,4)
+
diff --git a/vm/mterp/x86/OP_GOTO.S b/vm/mterp/x86/OP_GOTO.S
index c61d902..2fc4c31 100644
--- a/vm/mterp/x86/OP_GOTO.S
+++ b/vm/mterp/x86/OP_GOTO.S
@@ -7,10 +7,9 @@
* double to get a byte offset.
*/
/* goto +AA */
- movsbl rINSTbl,rINST # ebx<- ssssssAA
- testl rINST,rINST # test for <0
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movsbl rINSTbl,%eax # eax<- ssssssAA
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
diff --git a/vm/mterp/x86/OP_GOTO_16.S b/vm/mterp/x86/OP_GOTO_16.S
index 8b58d60..de0903c 100644
--- a/vm/mterp/x86/OP_GOTO_16.S
+++ b/vm/mterp/x86/OP_GOTO_16.S
@@ -6,10 +6,9 @@
* The branch distance is a signed code-unit offset
*/
/* goto/16 +AAAA */
- movswl 2(rPC),rINST # rINST<- ssssAAAA
- testl rINST,rINST # test for <0
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movswl 2(rPC),%eax # eax<- ssssAAAA
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
diff --git a/vm/mterp/x86/OP_GOTO_32.S b/vm/mterp/x86/OP_GOTO_32.S
index 2deae57..84806b0 100644
--- a/vm/mterp/x86/OP_GOTO_32.S
+++ b/vm/mterp/x86/OP_GOTO_32.S
@@ -4,15 +4,11 @@
* Unconditional branch, 32-bit offset.
*
* The branch distance is a signed code-unit offset.
- *
- * Unlike most opcodes, this one is allowed to branch to itself, so
- * our "backward branch" test must be "<=0" instead of "<0".
*/
/* goto/32 AAAAAAAA */
- movl 2(rPC),rINST # rINST<- AAAAAAAA
- cmpl $$0,rINST # test for <= 0
- jle common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movl 2(rPC),%eax # eax<- AAAAAAAA
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
diff --git a/vm/mterp/x86/OP_PACKED_SWITCH.S b/vm/mterp/x86/OP_PACKED_SWITCH.S
index bae1226..c762a8b 100644
--- a/vm/mterp/x86/OP_PACKED_SWITCH.S
+++ b/vm/mterp/x86/OP_PACKED_SWITCH.S
@@ -15,12 +15,9 @@
leal (rPC,%ecx,2),%ecx # ecx<- PC + BBBBbbbb*2
movl %eax,OUT_ARG1(%esp) # ARG1<- vAA
movl %ecx,OUT_ARG0(%esp) # ARG0<- switchData
- SPILL(rIBASE)
call $func
- UNSPILL(rIBASE)
- testl %eax,%eax
- movl %eax,rINST # set up word offset
- jle common_backwardBranch # check on special actions
- ADVANCE_PC_INDEXED rINST
+ movl rSELF,%ecx
+ ADVANCE_PC_INDEXED %eax
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST
GOTO_NEXT
diff --git a/vm/mterp/x86/alt_stub.S b/vm/mterp/x86/alt_stub.S
index c29dbc9..9807ad1 100644
--- a/vm/mterp/x86/alt_stub.S
+++ b/vm/mterp/x86/alt_stub.S
@@ -1,13 +1,22 @@
/*
- * Inter-instruction transfer stub. Call out to dvmCheckInst to handle
+ * Inter-instruction transfer stub. Call out to dvmCheckBefore to handle
* any interesting requests and then jump to the real instruction
* handler. Unlike the Arm handler, we can't do this as a tail call
* because rIBASE is caller save and we need to reload it.
+ *
+ * Note that unlike in the Arm implementation, we should never arrive
+ * here with a zero breakFlag because we always refresh rIBASE on
+ * return.
*/
+ EXPORT_PC
movl rSELF, %eax
movl rPC, OUT_ARG0(%esp)
- movl %eax, OUT_ARG1(%esp)
- call dvmCheckInst # (dPC, self)
- movl rSELF, %ecx
- movl offThread_curHandlerTable(%ecx), rIBASE # reload rIBASE
+ cmpb $$0,offThread_breakFlags(%eax) # anything to do?
+ movl rFP, OUT_ARG1(%esp)
+ je 1f # reload rIBASE & resume if not
+ movl %eax, OUT_ARG2(%esp)
+ call dvmCheckBefore # (dPC, dFP, self)
+ movl rSELF, %eax
+1:
+ movl offThread_curHandlerTable(%eax), rIBASE # reload rIBASE
jmp *dvmAsmInstructionStart+(${opnum}*4)
diff --git a/vm/mterp/x86/bincmp.S b/vm/mterp/x86/bincmp.S
index 2090553..ffa4a24 100644
--- a/vm/mterp/x86/bincmp.S
+++ b/vm/mterp/x86/bincmp.S
@@ -11,15 +11,14 @@
movzx rINSTbl,%ecx # ecx <- A+
andb $$0xf,%cl # ecx <- A
GET_VREG_R %eax %ecx # eax <- vA
- sarl $$4,rINST # rINST<- B
+ sarl $$4,rINST # rINST<- B
+ movl rSELF,%ecx
cmpl (rFP,rINST,4),%eax # compare (vA, vB)
- movswl 2(rPC),rINST # Get signed branch offset
movl $$2,%eax # assume not taken
j${revcmp} 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movswl 2(rPC),%eax # Get signed branch offset
1:
+ movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
GOTO_NEXT
diff --git a/vm/mterp/x86/entry.S b/vm/mterp/x86/entry.S
index b5c635c..b6f944a 100644
--- a/vm/mterp/x86/entry.S
+++ b/vm/mterp/x86/entry.S
@@ -27,8 +27,7 @@
dvmMterpStdRun:
push %ebp # save caller base pointer
movl %esp, %ebp # set our %ebp
- movl rSELF, %ecx # get incoming rGLUE
-
+ movl rSELF, %ecx # get incoming rSELF
/*
* At this point we've allocated one slot on the stack
* via push and stack is 8-byte aligned. Allocate space
@@ -50,32 +49,10 @@
/* Remember %esp for future "longjmp" */
movl %esp,offThread_bailPtr(%ecx)
-/* How to start? */
- movb offThread_entryPoint(%ecx),%al
-
-/* Normal start? */
- cmpb $$kInterpEntryInstr,%al
- jne .Lnot_instr
-
/* Normal case: start executing the instruction at rPC */
FETCH_INST
GOTO_NEXT
-.Lnot_instr:
- /* Reset to normal case */
- movb $$kInterpEntryInstr,offThread_entryPoint(%ecx)
- cmpb $$kInterpEntryReturn,%al
- je common_returnFromMethod
- cmpb $$kInterpEntryThrow,%al
- je common_exceptionThrown
- movzx %al,%eax
- movl %eax,OUT_ARG1(%esp)
- movl $$.LstrBadEntryPoint,OUT_ARG0(%esp)
- call printf
- call dvmAbort
- /* Not reached */
-
-
.global dvmMterpStdBail
.type dvmMterpStdBail, %function
/*
@@ -97,7 +74,7 @@
movl 8(%esp),%eax # changeInterp to return reg
movl offThread_bailPtr(%ecx),%esp # Restore "setjmp" esp
movl %esp,%ebp
- addl $$(FRAME_SIZE-4), %ebp # Restore %ebp at point of setjmp
+ addl $$(FRAME_SIZE-4), %ebp # Restore %ebp at point of setjmp
movl EDI_SPILL(%ebp),%edi
movl ESI_SPILL(%ebp),%esi
movl EBX_SPILL(%ebp),%ebx
diff --git a/vm/mterp/x86/footer.S b/vm/mterp/x86/footer.S
index 6015420..8aed133 100644
--- a/vm/mterp/x86/footer.S
+++ b/vm/mterp/x86/footer.S
@@ -54,6 +54,9 @@
* OUT_ARG0+4(%esp) <= Dalvik PC of next instruction
*/
dvmJitToInterpSingleStep:
+/* TODO */
+ call dvmAbort
+#if 0
pop %eax
movl rSELF, %ecx
movl OUT_ARG0(%esp), %edx
@@ -62,6 +65,7 @@
movl $$kInterpEntryInstr,offThread_entryPoint(%ecx)
movl $$1,rINST # changeInterp <= true
jmp common_gotoBail
+#endif
.global dvmJitToInterpNoChainNoProfile
/*
@@ -73,8 +77,10 @@
#if defined(WITH_JIT_TUNING)
call dvmBumpNoChain
#endif
+ movl rSELF, %eax
movl rPC,OUT_ARG0(%esp)
- call dvmJitGetTraceAddr # is there a translation?
+ movl %eax,OUT_ARG1(%esp)
+ call dvmJitGetTraceAddrThread # (pc, self)
movl rSELF,%ecx # ecx <- self
movl %eax,offThread_inJitCodeCache(%ecx) # set inJitCodeCache flag
cmpl $$0, %eax
@@ -97,8 +103,10 @@
#if defined(WITH_JIT_TUNING)
call dvmBumpNoChain
#endif
+ movl rSELF, %eax
movl rPC,OUT_ARG0(%esp)
- call dvmJitGetTraceAddr # is there a translation?
+ movl %eax,OUT_ARG1(%esp)
+ call dvmJitGetTraceAddrThread # (pc, self)
movl rSELF,%ecx
cmpl $$0,%eax
movl %eax,offThread_inJitCodeCache(%ecx) # set inJitCodeCache flag
@@ -128,12 +136,14 @@
dvmJitToInterpTraceSelect:
pop rINST # save chain cell address in callee save reg
movl (rINST),rPC
+ movl rSELF, %eax
movl rPC,OUT_ARG0(%esp)
- call dvmJitGetTraceAddr # is there a translation?
+ movl %eax,OUT_ARG1(%esp)
+ call dvmJitGetTraceAddrThread # (pc, self)
cmpl $$0,%eax
jz 1b # no - ask for one
movl %eax,OUT_ARG0(%esp)
-# FIXME - need to adjust rINST to beginning of sequence
+# TODO - need to adjust rINST to beginning of sequence
movl rINST,OUT_ARG1(%esp)
call dvmJitChain # Attempt dvmJitChain(codeAddr,chainAddr)
cmpl $$0,%eax # Success?
@@ -152,26 +162,7 @@
dvmJitToInterpNoChain:
toInterpreter:
jmp common_abort
-#endif
-/*
- * Common code when a backwards branch is taken
- *
- * On entry:
- * ebx (a.k.a. rINST) -> PC adjustment in 16-bit words
- */
-common_backwardBranch:
- movl rSELF,%ecx
- call common_periodicChecks # rPC and ecx/rSELF preserved
-#if defined(WITH_JIT)
- GET_JIT_PROF_TABLE %ecx rIBASE
- ADVANCE_PC_INDEXED rINST
- cmpl $$0,rIBASE
- movl offThread_curHandlerTable(%ecx),rIBASE
- FETCH_INST
- jz 1f # Profiling off - continue
- .global updateProfile
-updateProfile:
common_updateProfile:
# quick & dirty hash
movl rPC, %eax
@@ -193,27 +184,27 @@
EXPORT_PC
movb rINSTbl,(%edx,%eax) # reset counter
movl %ecx,rINST # preserve rSELF
+ movl rSELF, %eax
movl rPC,OUT_ARG0(%esp)
- call dvmJitGetTraceAddr # already have one?
+ movl %eax,OUT_ARG1(%esp)
+ call dvmJitGetTraceAddr # (pc, self)
movl %eax,offThread_inJitCodeCache(rINST) # set the inJitCodeCache flag
cmpl $$0,%eax
jz 1f
- call *%eax # FIXME: decide call vs/ jmp!. No return either way
+ call *%eax # TODO: decide call vs/ jmp!. No return either way
1:
movl $$kJitTSelectRequest,%eax
# On entry, eax<- jitState, rPC valid
common_selectTrace:
-
+/* TODO */
+ call dvmAbort
+#if 0
movl rSELF,%ecx
movl %eax,offThread_jitState(%ecx)
movl $$kInterpEntryInstr,offThread_entryPoint(%ecx)
movl $$1,rINST
jmp common_gotoBail
-#else
- movl offThread_curHandlerTable(%ecx),rIBASE
- ADVANCE_PC_INDEXED rINST
- FETCH_INST
- GOTO_NEXT
+#endif
#endif
@@ -267,8 +258,9 @@
/*
- * %eax=methodToCall, %ecx=CCCC, LOCAL0_OFFSET(%ebp)=count, %edx=&outs (&stackSaveArea)
- * (very few methods have > 10 args; could unroll for common cases)
+ * %eax=methodToCall, %ecx=CCCC, LOCAL0_OFFSET(%ebp)=count,
+ * %edx=&outs (&stackSaveArea). (very few methods have > 10 args;
+ * could unroll for common cases)
*/
.LinvokeRangeArgs:
@@ -362,11 +354,11 @@
movl %eax, LOCAL1_OFFSET(%ebp) # LOCAL1_OFFSET(%ebp)<- &outs
subl $$sizeofStackSaveArea, %eax # %eax<- newSaveArea (stack save area using newFP)
movl offThread_interpStackEnd(%edx), %edx # %edx<- self->interpStackEnd
- movl %edx, LOCAL2_OFFSET(%ebp) # LOCAL2_OFFSET<- self->interpStackEnd
+ movl %edx, TMP_SPILL1(%ebp) # spill self->interpStackEnd
shl $$2, %ecx # %ecx<- update offset for outsSize
movl %eax, %edx # %edx<- newSaveArea
sub %ecx, %eax # %eax<- bottom; (newSaveArea - outsSize)
- cmp LOCAL2_OFFSET(%ebp), %eax # compare interpStackEnd and bottom
+ cmp TMP_SPILL1(%ebp), %eax # compare interpStackEnd and bottom
movl LOCAL0_OFFSET(%ebp), %eax # %eax<- restore methodToCall
jl .LstackOverflow # handle frame overflow
@@ -378,9 +370,14 @@
SAVEAREA_FROM_FP %ecx # %ecx<- &StackSaveArea
movl %ecx, offStackSaveArea_prevSave(%edx) # newSaveArea->prevSave<- &outs
#endif
- movl rSELF,%ecx # %ecx<- pthread
+ movl rSELF,%ecx # %ecx<- pthread
movl rFP, offStackSaveArea_prevFrame(%edx) # newSaveArea->prevFrame<- rFP
movl rPC, offStackSaveArea_savedPc(%edx) # newSaveArea->savedPc<- rPC
+
+ /* Any special actions to take? */
+ cmpb $$0, offThread_subMode(%ecx)
+ jne 2f # Yes - handle them
+1:
testl $$ACC_NATIVE, offMethod_accessFlags(%eax) # check for native call
movl %eax, offStackSaveArea_method(%edx) # newSaveArea->method<- method to call
jne .LinvokeNative # handle native call
@@ -389,30 +386,43 @@
* Update "self" values for the new method
* %eax=methodToCall, LOCAL1_OFFSET(%ebp)=newFp
*/
-
movl offMethod_clazz(%eax), %edx # %edx<- method->clazz
movl offClassObject_pDvmDex(%edx), %edx # %edx<- method->clazz->pDvmDex
movl %eax, offThread_method(%ecx) # self->method<- methodToCall
movl %edx, offThread_methodClassDex(%ecx) # self->methodClassDex<- method->clazz->pDvmDex
movl offMethod_insns(%eax), rPC # rPC<- methodToCall->insns
+ movl $$1, offThread_debugIsMethodEntry(%ecx)
movl LOCAL1_OFFSET(%ebp), rFP # rFP<- newFP
movl rFP, offThread_curFrame(%ecx) # self->curFrame<- newFP
movl offThread_curHandlerTable(%ecx),rIBASE
FETCH_INST
GOTO_NEXT # jump to methodToCall->insns
+2:
+ /* Live: %eax, %ecx, %edx - preserve */
+ SPILL_TMP1(%eax) # preserve methodToCall
+ SPILL_TMP2(%edx) # preserve newSaveArea
+ movl %ecx, OUT_ARG0(%esp)
+ movl %eax, OUT_ARG0(%esp)
+ call dvmReportInvoke # (self, method)
+ UNSPILL_TMP1(%eax)
+ UNSPILL_TMP2(%edx)
+ movl rSELF,%ecx # restore rSELF
+ jmp 1b
+
/*
* Prep for the native call
- * %eax=methodToCall, LOCAL1_OFFSET(%ebp)=newFP, %edx=newSaveArea
+ * %eax=methodToCall, LOCAL1_OFFSET(%ebp)=newFP, %edx=newSaveArea, %ecx=self
*/
.LinvokeNative:
- movl rSELF, %ecx
movl offThread_jniLocal_topCookie(%ecx), rINST # rINST<- self->localRef->...
movl rINST, offStackSaveArea_localRefCookie(%edx) # newSaveArea->localRefCookie<- top
movl %edx, LOCAL2_OFFSET(%ebp) # save newSaveArea
movl LOCAL1_OFFSET(%ebp), rINST # rINST<- newFP
movl rINST, offThread_curFrame(%ecx) # self->curFrame<- newFP
+ cmpb $$0, offThread_subMode(%ecx) # Anything special going on?
+ jne 11f # yes - handle it
movl %ecx, OUT_ARG3(%esp) # push parameter self
movl %eax, OUT_ARG2(%esp) # push parameter methodToCall
lea offThread_retval(%ecx), %ecx # %ecx<- &retval
@@ -432,6 +442,35 @@
ADVANCE_PC 3
GOTO_NEXT_R %ecx # jump to next instruction
+11:
+ /*
+ * Handle any special subMode actions
+ * %eax=methodToCall, rINST=newFP, %ecx=self
+ */
+ SPILL_TMP1(%eax) # save methodTocall
+ movl %eax, OUT_ARG2(%esp)
+ movl %ecx, OUT_ARG1(%esp)
+ movl rPC, OUT_ARG0(%esp)
+ call dvmReportPreNativeInvoke # (pc, self, methodToCall)
+ UNSPILL_TMP1(%eax) # restore methodToCall
+ movl rSELF,%ecx # restore self
+
+ /* Do the native call */
+ movl %ecx, OUT_ARG3(%esp) # push parameter self
+ lea offThread_retval(%ecx), %ecx # %ecx<- &retval
+ movl %eax, OUT_ARG2(%esp) # push parameter methodToCall
+ movl %ecx, OUT_ARG1(%esp) # push parameter &retval
+ movl rINST, OUT_ARG0(%esp) # push parameter newFP
+ call *offMethod_nativeFunc(%eax) # call methodToCall->nativeFunc
+
+ UNSPILL_TMP1(%eax) # restore methodToCall
+ movl rSELF, %ecx
+ movl %eax, OUT_ARG2(%esp)
+ movl %ecx, OUT_ARG1(%esp)
+ movl rPC, OUT_ARG0(%esp)
+ call dvmReportPostNativeInvoke # (pc, self, methodToCall)
+ jmp 7b # rejoin
+
.LstackOverflow: # eax=methodToCall
movl %eax, OUT_ARG1(%esp) # push parameter methodToCall
movl rSELF,%eax # %eax<- self
@@ -441,103 +480,44 @@
/*
- * Do we need the thread to be suspended or have debugger/profiling activity?
- *
- * On entry:
- * ebx -> PC adjustment in 16-bit words (must be preserved)
- * ecx -> SELF pointer
- * reentry type, e.g. kInterpEntryInstr stored in rSELF->entryPoint
- *
- * Note: A call will normally kill %eax and %ecx. To
- * streamline the normal case, this routine will preserve
- * %ecx in addition to the normal caller save regs. The save/restore
- * is a bit ugly, but will happen in the relatively uncommon path.
- * TODO: Basic-block style Jit will need a hook here as well. Fold it into
- * the suspendCount check so we can get both in 1 shot.
- * TUNING: Improve scheduling here & do initial single test for all.
- */
-common_periodicChecks:
- cmpl $$0,offThread_suspendCount(%ecx) # non-zero suspendCount?
- jne 1f
-
-6:
- movl offThread_pInterpBreak(%ecx),%eax # eax <- &interpBreak
- cmpl $$0,(%eax) # something interesting happening?
- jne 3f # yes - switch interpreters
- ret
-
- /* Check for suspend */
-1:
- /* At this point, the return pointer to the caller of
- * common_periodicChecks is on the top of stack. We need to preserve
- * SELF(ecx).
- * The outgoing profile is:
- * bool dvmCheckSuspendPending(Thread* self)
- * Because we reached here via a call, go ahead and build a new frame.
- */
- EXPORT_PC # need for precise GC
- movl %ecx,%eax # eax<- self
- push %ebp
- movl %esp,%ebp
- subl $$24,%esp
- movl %eax,OUT_ARG0(%esp)
- call dvmCheckSuspendPending
- addl $$24,%esp
- pop %ebp
- movl rSELF,%ecx
-
- /*
- * Need to check to see if debugger or profiler flags got set
- * while we were suspended.
- */
- jmp 6b
-
- /* Switch interpreters */
- /* Note: %ebx contains the 16-bit word offset to be applied to rPC to
- * "complete" the interpretation of backwards branches. In effect, we
- * are completing the interpretation of the branch instruction here,
- * and the new interpreter will resume interpretation at the branch
- * target. However, a switch request recognized during the handling
- * of a return from method instruction results in an immediate abort,
- * and the new interpreter will resume by re-interpreting the return
- * instruction.
- */
-3:
- leal (rPC,%ebx,2),rPC # adjust pc to show target
- movl rSELF,%ecx # bail expect SELF already loaded
- movl $$1,rINST # set changeInterp to true
- jmp common_gotoBail
-
-
-/*
* Common code for handling a return instruction
*/
common_returnFromMethod:
movl rSELF,%ecx
- /* Set entry mode in case we bail */
- movb $$kInterpEntryReturn,offThread_entryPoint(%ecx)
- xorl rINST,rINST # zero offset in case we switch interps
- call common_periodicChecks # Note: expects %ecx to be preserved
-
SAVEAREA_FROM_FP %eax # eax<- saveArea (old)
movl offStackSaveArea_prevFrame(%eax),rFP # rFP<- prevFrame
+ cmpb $$0, offThread_subMode(%ecx) # special action needed?
+ jne 19f # go if so
+14:
movl (offStackSaveArea_method-sizeofStackSaveArea)(rFP),rINST
cmpl $$0,rINST # break?
je common_gotoBail # break frame, bail out completely
- movl offStackSaveArea_savedPc(%eax),rPC # pc<- saveArea->savedPC
- movl rINST,offThread_method(%ecx) # self->method = newSave->meethod
- movl rFP,offThread_curFrame(%ecx) # self->curFrame = fp
- movl offMethod_clazz(rINST),%eax # eax<- method->clazz
+ movl offStackSaveArea_savedPc(%eax),rPC # pc<- saveArea->savedPC
+ movl rINST,offThread_method(%ecx) # self->method = newSave->meethod
+ movl rFP,offThread_curFrame(%ecx) # self->curFrame = fp
+ movl offMethod_clazz(rINST),%eax # eax<- method->clazz
movl offThread_curHandlerTable(%ecx),rIBASE
- movl offClassObject_pDvmDex(%eax),rINST # rINST<- method->clazz->pDvmDex
+ movl offClassObject_pDvmDex(%eax),rINST # rINST<- method->clazz->pDvmDex
FETCH_INST_OPCODE 3 %eax
movl rINST,offThread_methodClassDex(%ecx)
ADVANCE_PC 3
- /* not bailing - restore entry mode to default */
- movb $$kInterpEntryInstr,offThread_entryPoint(%ecx)
GOTO_NEXT_R %eax
+19:
+ /*
+ * Handle special subMode actions
+ * On entry, rFP: prevFP, %ecx: self, %eax: saveArea
+ */
+ movl rFP, OUT_ARG2(%esp) # parameter prevFP
+ movl rPC, OUT_ARG1(%esp) # parameter pc
+ movl %ecx, OUT_ARG1(%esp) # parameter self
+ call dvmReportReturn # (self, pc, prevFP)
+ movl rSELF, %ecx # restore self
+ SAVEAREA_FROM_FP %eax # restore saveArea
+ jmp 14b
+
+
/*
* Prepare to strip the current frame and "longjump" back to caller of
* dvmMterpStdRun.
@@ -631,6 +611,8 @@
* out of the interpreter), continue with whatever the next instruction
* now happens to be.
*
+ * NOTE: special subMode handling done in dvmMterp_exceptionThrown
+ *
* This does not return.
*/
common_exceptionThrown:
diff --git a/vm/mterp/x86/zcmp.S b/vm/mterp/x86/zcmp.S
index ca6dee4..cbda889 100644
--- a/vm/mterp/x86/zcmp.S
+++ b/vm/mterp/x86/zcmp.S
@@ -9,12 +9,11 @@
*/
/* if-cmp vAA, +BBBB */
cmpl $$0,(rFP,rINST,4) # compare (vA, 0)
- movswl 2(rPC),rINST # fetch signed displacement
- movl $$2,%eax # assume branch not taken
+ movl $$2,%eax # assume branch not taken
j${revcmp} 1f
- testl rINST,rINST
- js common_backwardBranch
- movl rINST,%eax
+ movl rSELF,%ecx
+ movswl 2(rPC),%eax # fetch signed displacement
+ movl offThread_curHandlerTable(%ecx),rIBASE
1:
FETCH_INST_INDEXED %eax
ADVANCE_PC_INDEXED %eax
diff --git a/vm/oo/Class.c b/vm/oo/Class.c
index 71d8e98..a054bdc 100644
--- a/vm/oo/Class.c
+++ b/vm/oo/Class.c
@@ -2843,7 +2843,7 @@
* The class has been prepared and resolved but possibly not yet verified
* at this point.
*/
- if (DEBUGGER_ACTIVE) {
+ if (gDvm.debuggerActive) {
dvmDbgPostClassPrepare(clazz);
}