Fix right shift by constant 0 in Jit.  Bug #2135879
diff --git a/vm/compiler/codegen/arm/Codegen.c b/vm/compiler/codegen/arm/Codegen.c
index 8ae22af..30dc508 100644
--- a/vm/compiler/codegen/arm/Codegen.c
+++ b/vm/compiler/codegen/arm/Codegen.c
@@ -2640,8 +2640,12 @@
                     break;
                 default: dvmAbort();
             }
-            opRegRegImm(cUnit, op, regDest, reg0, lit, reg1);
-            storeValue(cUnit, regDest, vDest, reg1);
+            if (lit != 0) {
+                opRegRegImm(cUnit, op, regDest, reg0, lit, reg1);
+                storeValue(cUnit, regDest, vDest, reg1);
+            } else {
+                storeValue(cUnit, reg0, vDest, reg1);
+            }
             break;
 
         case OP_DIV_INT_LIT8: